Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <net/mac80211.h>
34
35 #include "iwl-eeprom.h"
36 #include "iwl-dev.h" /* FIXME: remove */
37 #include "iwl-debug.h"
38 #include "iwl-core.h"
39 #include "iwl-io.h"
40 #include "iwl-power.h"
41 #include "iwl-sta.h"
42 #include "iwl-helpers.h"
43
44
45 MODULE_DESCRIPTION("iwl core");
46 MODULE_VERSION(IWLWIFI_VERSION);
47 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49
50 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
51         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
52          0, COEX_UNASSOC_IDLE_FLAGS},
53         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
54          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
55         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
56          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
57         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
58          0, COEX_CALIBRATION_FLAGS},
59         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
60          0, COEX_PERIODIC_CALIBRATION_FLAGS},
61         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
62          0, COEX_CONNECTION_ESTAB_FLAGS},
63         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
64          0, COEX_ASSOCIATED_IDLE_FLAGS},
65         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
66          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
67         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
68          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
69         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
70          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
71         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
72         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
73         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
74          0, COEX_STAND_ALONE_DEBUG_FLAGS},
75         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
76          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
77         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
78         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
79 };
80
81 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np)    \
82         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,      \
83                                     IWL_RATE_SISO_##s##M_PLCP, \
84                                     IWL_RATE_MIMO2_##s##M_PLCP,\
85                                     IWL_RATE_MIMO3_##s##M_PLCP,\
86                                     IWL_RATE_##r##M_IEEE,      \
87                                     IWL_RATE_##ip##M_INDEX,    \
88                                     IWL_RATE_##in##M_INDEX,    \
89                                     IWL_RATE_##rp##M_INDEX,    \
90                                     IWL_RATE_##rn##M_INDEX,    \
91                                     IWL_RATE_##pp##M_INDEX,    \
92                                     IWL_RATE_##np##M_INDEX }
93
94 u32 iwl_debug_level;
95 EXPORT_SYMBOL(iwl_debug_level);
96
97 static irqreturn_t iwl_isr(int irq, void *data);
98
99 /*
100  * Parameter order:
101  *   rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
102  *
103  * If there isn't a valid next or previous rate then INV is used which
104  * maps to IWL_RATE_INVALID
105  *
106  */
107 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
108         IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2),    /*  1mbps */
109         IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5),          /*  2mbps */
110         IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
111         IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18),      /* 11mbps */
112         IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
113         IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11),       /*  9mbps */
114         IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
115         IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
116         IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
117         IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
118         IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
119         IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
120         IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
121         /* FIXME:RS:          ^^    should be INV (legacy) */
122 };
123 EXPORT_SYMBOL(iwl_rates);
124
125 /**
126  * translate ucode response to mac80211 tx status control values
127  */
128 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
129                                   struct ieee80211_tx_info *info)
130 {
131         struct ieee80211_tx_rate *r = &info->control.rates[0];
132
133         info->antenna_sel_tx =
134                 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
135         if (rate_n_flags & RATE_MCS_HT_MSK)
136                 r->flags |= IEEE80211_TX_RC_MCS;
137         if (rate_n_flags & RATE_MCS_GF_MSK)
138                 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
139         if (rate_n_flags & RATE_MCS_HT40_MSK)
140                 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
141         if (rate_n_flags & RATE_MCS_DUP_MSK)
142                 r->flags |= IEEE80211_TX_RC_DUP_DATA;
143         if (rate_n_flags & RATE_MCS_SGI_MSK)
144                 r->flags |= IEEE80211_TX_RC_SHORT_GI;
145         r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
146 }
147 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
148
149 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
150 {
151         int idx = 0;
152
153         /* HT rate format */
154         if (rate_n_flags & RATE_MCS_HT_MSK) {
155                 idx = (rate_n_flags & 0xff);
156
157                 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
158                         idx = idx - IWL_RATE_MIMO3_6M_PLCP;
159                 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
160                         idx = idx - IWL_RATE_MIMO2_6M_PLCP;
161
162                 idx += IWL_FIRST_OFDM_RATE;
163                 /* skip 9M not supported in ht*/
164                 if (idx >= IWL_RATE_9M_INDEX)
165                         idx += 1;
166                 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
167                         return idx;
168
169         /* legacy rate format, search for match in table */
170         } else {
171                 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
172                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
173                                 return idx;
174         }
175
176         return -1;
177 }
178 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
179
180 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
181 {
182         int idx = 0;
183         int band_offset = 0;
184
185         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
186         if (rate_n_flags & RATE_MCS_HT_MSK) {
187                 idx = (rate_n_flags & 0xff);
188                 return idx;
189         /* Legacy rate format, search for match in table */
190         } else {
191                 if (band == IEEE80211_BAND_5GHZ)
192                         band_offset = IWL_FIRST_OFDM_RATE;
193                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
194                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
195                                 return idx - band_offset;
196         }
197
198         return -1;
199 }
200
201 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
202 {
203         int i;
204         u8 ind = ant;
205         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
206                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
207                 if (priv->hw_params.valid_tx_ant & BIT(ind))
208                         return ind;
209         }
210         return ant;
211 }
212 EXPORT_SYMBOL(iwl_toggle_tx_ant);
213
214 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
215 EXPORT_SYMBOL(iwl_bcast_addr);
216
217
218 /* This function both allocates and initializes hw and priv. */
219 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
220                 struct ieee80211_ops *hw_ops)
221 {
222         struct iwl_priv *priv;
223
224         /* mac80211 allocates memory for this device instance, including
225          *   space for this driver's private structure */
226         struct ieee80211_hw *hw =
227                 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
228         if (hw == NULL) {
229                 printk(KERN_ERR "%s: Can not allocate network device\n",
230                        cfg->name);
231                 goto out;
232         }
233
234         priv = hw->priv;
235         priv->hw = hw;
236
237 out:
238         return hw;
239 }
240 EXPORT_SYMBOL(iwl_alloc_all);
241
242 void iwl_hw_detect(struct iwl_priv *priv)
243 {
244         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
245         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
246         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
247 }
248 EXPORT_SYMBOL(iwl_hw_detect);
249
250 int iwl_hw_nic_init(struct iwl_priv *priv)
251 {
252         unsigned long flags;
253         struct iwl_rx_queue *rxq = &priv->rxq;
254         int ret;
255
256         /* nic_init */
257         spin_lock_irqsave(&priv->lock, flags);
258         priv->cfg->ops->lib->apm_ops.init(priv);
259
260         /* Set interrupt coalescing timer to 512 usecs */
261         iwl_write8(priv, CSR_INT_COALESCING, 512 / 32);
262
263         spin_unlock_irqrestore(&priv->lock, flags);
264
265         ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
266
267         priv->cfg->ops->lib->apm_ops.config(priv);
268
269         /* Allocate the RX queue, or reset if it is already allocated */
270         if (!rxq->bd) {
271                 ret = iwl_rx_queue_alloc(priv);
272                 if (ret) {
273                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
274                         return -ENOMEM;
275                 }
276         } else
277                 iwl_rx_queue_reset(priv, rxq);
278
279         iwl_rx_replenish(priv);
280
281         iwl_rx_init(priv, rxq);
282
283         spin_lock_irqsave(&priv->lock, flags);
284
285         rxq->need_update = 1;
286         iwl_rx_queue_update_write_ptr(priv, rxq);
287
288         spin_unlock_irqrestore(&priv->lock, flags);
289
290         /* Allocate and init all Tx and Command queues */
291         ret = iwl_txq_ctx_reset(priv);
292         if (ret)
293                 return ret;
294
295         set_bit(STATUS_INIT, &priv->status);
296
297         return 0;
298 }
299 EXPORT_SYMBOL(iwl_hw_nic_init);
300
301 /*
302  * QoS  support
303 */
304 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
305 {
306         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
307                 return;
308
309         priv->qos_data.def_qos_parm.qos_flags = 0;
310
311         if (priv->qos_data.qos_cap.q_AP.queue_request &&
312             !priv->qos_data.qos_cap.q_AP.txop_request)
313                 priv->qos_data.def_qos_parm.qos_flags |=
314                         QOS_PARAM_FLG_TXOP_TYPE_MSK;
315         if (priv->qos_data.qos_active)
316                 priv->qos_data.def_qos_parm.qos_flags |=
317                         QOS_PARAM_FLG_UPDATE_EDCA_MSK;
318
319         if (priv->current_ht_config.is_ht)
320                 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
321
322         if (force || iwl_is_associated(priv)) {
323                 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
324                                 priv->qos_data.qos_active,
325                                 priv->qos_data.def_qos_parm.qos_flags);
326
327                 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
328                                        sizeof(struct iwl_qosparam_cmd),
329                                        &priv->qos_data.def_qos_parm, NULL);
330         }
331 }
332 EXPORT_SYMBOL(iwl_activate_qos);
333
334 /*
335  * AC        CWmin         CW max      AIFSN      TXOP Limit    TXOP Limit
336  *                                              (802.11b)      (802.11a/g)
337  * AC_BK      15            1023        7           0               0
338  * AC_BE      15            1023        3           0               0
339  * AC_VI       7              15        2          6.016ms       3.008ms
340  * AC_VO       3               7        2          3.264ms       1.504ms
341  */
342 void iwl_reset_qos(struct iwl_priv *priv)
343 {
344         u16 cw_min = 15;
345         u16 cw_max = 1023;
346         u8 aifs = 2;
347         bool is_legacy = false;
348         unsigned long flags;
349         int i;
350
351         spin_lock_irqsave(&priv->lock, flags);
352         /* QoS always active in AP and ADHOC mode
353          * In STA mode wait for association
354          */
355         if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
356             priv->iw_mode == NL80211_IFTYPE_AP)
357                 priv->qos_data.qos_active = 1;
358         else
359                 priv->qos_data.qos_active = 0;
360
361         /* check for legacy mode */
362         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
363             (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
364             (priv->iw_mode == NL80211_IFTYPE_STATION &&
365             (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
366                 cw_min = 31;
367                 is_legacy = 1;
368         }
369
370         if (priv->qos_data.qos_active)
371                 aifs = 3;
372
373         /* AC_BE */
374         priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
375         priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
376         priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
377         priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
378         priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
379
380         if (priv->qos_data.qos_active) {
381                 /* AC_BK */
382                 i = 1;
383                 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
384                 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
385                 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
386                 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
387                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
388
389                 /* AC_VI */
390                 i = 2;
391                 priv->qos_data.def_qos_parm.ac[i].cw_min =
392                         cpu_to_le16((cw_min + 1) / 2 - 1);
393                 priv->qos_data.def_qos_parm.ac[i].cw_max =
394                         cpu_to_le16(cw_min);
395                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
396                 if (is_legacy)
397                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
398                                 cpu_to_le16(6016);
399                 else
400                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
401                                 cpu_to_le16(3008);
402                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
403
404                 /* AC_VO */
405                 i = 3;
406                 priv->qos_data.def_qos_parm.ac[i].cw_min =
407                         cpu_to_le16((cw_min + 1) / 4 - 1);
408                 priv->qos_data.def_qos_parm.ac[i].cw_max =
409                         cpu_to_le16((cw_min + 1) / 2 - 1);
410                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
411                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
412                 if (is_legacy)
413                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
414                                 cpu_to_le16(3264);
415                 else
416                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
417                                 cpu_to_le16(1504);
418         } else {
419                 for (i = 1; i < 4; i++) {
420                         priv->qos_data.def_qos_parm.ac[i].cw_min =
421                                 cpu_to_le16(cw_min);
422                         priv->qos_data.def_qos_parm.ac[i].cw_max =
423                                 cpu_to_le16(cw_max);
424                         priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
425                         priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
426                         priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
427                 }
428         }
429         IWL_DEBUG_QOS(priv, "set QoS to default \n");
430
431         spin_unlock_irqrestore(&priv->lock, flags);
432 }
433 EXPORT_SYMBOL(iwl_reset_qos);
434
435 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
436 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
437 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
438                               struct ieee80211_sta_ht_cap *ht_info,
439                               enum ieee80211_band band)
440 {
441         u16 max_bit_rate = 0;
442         u8 rx_chains_num = priv->hw_params.rx_chains_num;
443         u8 tx_chains_num = priv->hw_params.tx_chains_num;
444
445         ht_info->cap = 0;
446         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
447
448         ht_info->ht_supported = true;
449
450         if (priv->cfg->ht_greenfield_support)
451                 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
452         ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
453         max_bit_rate = MAX_BIT_RATE_20_MHZ;
454         if (priv->hw_params.ht40_channel & BIT(band)) {
455                 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
456                 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
457                 ht_info->mcs.rx_mask[4] = 0x01;
458                 max_bit_rate = MAX_BIT_RATE_40_MHZ;
459         }
460
461         if (priv->cfg->mod_params->amsdu_size_8K)
462                 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
463
464         ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
465         ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
466
467         ht_info->mcs.rx_mask[0] = 0xFF;
468         if (rx_chains_num >= 2)
469                 ht_info->mcs.rx_mask[1] = 0xFF;
470         if (rx_chains_num >= 3)
471                 ht_info->mcs.rx_mask[2] = 0xFF;
472
473         /* Highest supported Rx data rate */
474         max_bit_rate *= rx_chains_num;
475         WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
476         ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
477
478         /* Tx MCS capabilities */
479         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
480         if (tx_chains_num != rx_chains_num) {
481                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
482                 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
483                                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
484         }
485 }
486
487 /**
488  * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
489  */
490 int iwlcore_init_geos(struct iwl_priv *priv)
491 {
492         struct iwl_channel_info *ch;
493         struct ieee80211_supported_band *sband;
494         struct ieee80211_channel *channels;
495         struct ieee80211_channel *geo_ch;
496         struct ieee80211_rate *rates;
497         int i = 0;
498
499         if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
500             priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
501                 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
502                 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
503                 return 0;
504         }
505
506         channels = kzalloc(sizeof(struct ieee80211_channel) *
507                            priv->channel_count, GFP_KERNEL);
508         if (!channels)
509                 return -ENOMEM;
510
511         rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
512                         GFP_KERNEL);
513         if (!rates) {
514                 kfree(channels);
515                 return -ENOMEM;
516         }
517
518         /* 5.2GHz channels start after the 2.4GHz channels */
519         sband = &priv->bands[IEEE80211_BAND_5GHZ];
520         sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
521         /* just OFDM */
522         sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
523         sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
524
525         if (priv->cfg->sku & IWL_SKU_N)
526                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
527                                          IEEE80211_BAND_5GHZ);
528
529         sband = &priv->bands[IEEE80211_BAND_2GHZ];
530         sband->channels = channels;
531         /* OFDM & CCK */
532         sband->bitrates = rates;
533         sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
534
535         if (priv->cfg->sku & IWL_SKU_N)
536                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
537                                          IEEE80211_BAND_2GHZ);
538
539         priv->ieee_channels = channels;
540         priv->ieee_rates = rates;
541
542         for (i = 0;  i < priv->channel_count; i++) {
543                 ch = &priv->channel_info[i];
544
545                 /* FIXME: might be removed if scan is OK */
546                 if (!is_channel_valid(ch))
547                         continue;
548
549                 if (is_channel_a_band(ch))
550                         sband =  &priv->bands[IEEE80211_BAND_5GHZ];
551                 else
552                         sband =  &priv->bands[IEEE80211_BAND_2GHZ];
553
554                 geo_ch = &sband->channels[sband->n_channels++];
555
556                 geo_ch->center_freq =
557                                 ieee80211_channel_to_frequency(ch->channel);
558                 geo_ch->max_power = ch->max_power_avg;
559                 geo_ch->max_antenna_gain = 0xff;
560                 geo_ch->hw_value = ch->channel;
561
562                 if (is_channel_valid(ch)) {
563                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
564                                 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
565
566                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
567                                 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
568
569                         if (ch->flags & EEPROM_CHANNEL_RADAR)
570                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
571
572                         geo_ch->flags |= ch->ht40_extension_channel;
573
574                         if (ch->max_power_avg > priv->tx_power_device_lmt)
575                                 priv->tx_power_device_lmt = ch->max_power_avg;
576                 } else {
577                         geo_ch->flags |= IEEE80211_CHAN_DISABLED;
578                 }
579
580                 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
581                                 ch->channel, geo_ch->center_freq,
582                                 is_channel_a_band(ch) ?  "5.2" : "2.4",
583                                 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
584                                 "restricted" : "valid",
585                                  geo_ch->flags);
586         }
587
588         if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
589              priv->cfg->sku & IWL_SKU_A) {
590                 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
591                         "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
592                            priv->pci_dev->device,
593                            priv->pci_dev->subsystem_device);
594                 priv->cfg->sku &= ~IWL_SKU_A;
595         }
596
597         IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
598                    priv->bands[IEEE80211_BAND_2GHZ].n_channels,
599                    priv->bands[IEEE80211_BAND_5GHZ].n_channels);
600
601         set_bit(STATUS_GEO_CONFIGURED, &priv->status);
602
603         return 0;
604 }
605 EXPORT_SYMBOL(iwlcore_init_geos);
606
607 /*
608  * iwlcore_free_geos - undo allocations in iwlcore_init_geos
609  */
610 void iwlcore_free_geos(struct iwl_priv *priv)
611 {
612         kfree(priv->ieee_channels);
613         kfree(priv->ieee_rates);
614         clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
615 }
616 EXPORT_SYMBOL(iwlcore_free_geos);
617
618 /*
619  *  iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
620  *  function.
621  */
622 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
623                                 __le32 *tx_flags)
624 {
625         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
626                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
627                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
628         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
629                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
630                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
631         }
632 }
633 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
634
635 static bool is_single_rx_stream(struct iwl_priv *priv)
636 {
637         return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
638                priv->current_ht_config.single_chain_sufficient;
639 }
640
641 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
642                                    enum ieee80211_band band,
643                                    u16 channel, u8 extension_chan_offset)
644 {
645         const struct iwl_channel_info *ch_info;
646
647         ch_info = iwl_get_channel_info(priv, band, channel);
648         if (!is_channel_valid(ch_info))
649                 return 0;
650
651         if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
652                 return !(ch_info->ht40_extension_channel &
653                                         IEEE80211_CHAN_NO_HT40PLUS);
654         else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
655                 return !(ch_info->ht40_extension_channel &
656                                         IEEE80211_CHAN_NO_HT40MINUS);
657
658         return 0;
659 }
660
661 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
662                          struct ieee80211_sta_ht_cap *sta_ht_inf)
663 {
664         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
665
666         if (!ht_conf->is_ht || !ht_conf->is_40mhz)
667                 return 0;
668
669         /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
670          * the bit will not set if it is pure 40MHz case
671          */
672         if (sta_ht_inf) {
673                 if (!sta_ht_inf->ht_supported)
674                         return 0;
675         }
676 #ifdef CONFIG_IWLWIFI_DEBUG
677         if (priv->disable_ht40)
678                 return 0;
679 #endif
680         return iwl_is_channel_extension(priv, priv->band,
681                         le16_to_cpu(priv->staging_rxon.channel),
682                         ht_conf->extension_chan_offset);
683 }
684 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
685
686 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
687 {
688         u16 new_val = 0;
689         u16 beacon_factor = 0;
690
691         beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
692         new_val = beacon_val / beacon_factor;
693
694         if (!new_val)
695                 new_val = max_beacon_val;
696
697         return new_val;
698 }
699
700 void iwl_setup_rxon_timing(struct iwl_priv *priv)
701 {
702         u64 tsf;
703         s32 interval_tm, rem;
704         unsigned long flags;
705         struct ieee80211_conf *conf = NULL;
706         u16 beacon_int;
707
708         conf = ieee80211_get_hw_conf(priv->hw);
709
710         spin_lock_irqsave(&priv->lock, flags);
711         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
712         priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
713
714         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
715                 beacon_int = priv->beacon_int;
716                 priv->rxon_timing.atim_window = 0;
717         } else {
718                 beacon_int = priv->vif->bss_conf.beacon_int;
719
720                 /* TODO: we need to get atim_window from upper stack
721                  * for now we set to 0 */
722                 priv->rxon_timing.atim_window = 0;
723         }
724
725         beacon_int = iwl_adjust_beacon_interval(beacon_int,
726                                 priv->hw_params.max_beacon_itrvl * 1024);
727         priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
728
729         tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
730         interval_tm = beacon_int * 1024;
731         rem = do_div(tsf, interval_tm);
732         priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
733
734         spin_unlock_irqrestore(&priv->lock, flags);
735         IWL_DEBUG_ASSOC(priv,
736                         "beacon interval %d beacon timer %d beacon tim %d\n",
737                         le16_to_cpu(priv->rxon_timing.beacon_interval),
738                         le32_to_cpu(priv->rxon_timing.beacon_init_val),
739                         le16_to_cpu(priv->rxon_timing.atim_window));
740 }
741 EXPORT_SYMBOL(iwl_setup_rxon_timing);
742
743 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
744 {
745         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
746
747         if (hw_decrypt)
748                 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
749         else
750                 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
751
752 }
753 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
754
755 /**
756  * iwl_check_rxon_cmd - validate RXON structure is valid
757  *
758  * NOTE:  This is really only useful during development and can eventually
759  * be #ifdef'd out once the driver is stable and folks aren't actively
760  * making changes
761  */
762 int iwl_check_rxon_cmd(struct iwl_priv *priv)
763 {
764         int error = 0;
765         int counter = 1;
766         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
767
768         if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
769                 error |= le32_to_cpu(rxon->flags &
770                                 (RXON_FLG_TGJ_NARROW_BAND_MSK |
771                                  RXON_FLG_RADAR_DETECT_MSK));
772                 if (error)
773                         IWL_WARN(priv, "check 24G fields %d | %d\n",
774                                     counter++, error);
775         } else {
776                 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
777                                 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
778                 if (error)
779                         IWL_WARN(priv, "check 52 fields %d | %d\n",
780                                     counter++, error);
781                 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
782                 if (error)
783                         IWL_WARN(priv, "check 52 CCK %d | %d\n",
784                                     counter++, error);
785         }
786         error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
787         if (error)
788                 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
789
790         /* make sure basic rates 6Mbps and 1Mbps are supported */
791         error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
792                   ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
793         if (error)
794                 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
795
796         error |= (le16_to_cpu(rxon->assoc_id) > 2007);
797         if (error)
798                 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
799
800         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
801                         == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
802         if (error)
803                 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
804                             counter++, error);
805
806         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
807                         == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
808         if (error)
809                 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
810                             counter++, error);
811
812         error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
813                         RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
814         if (error)
815                 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
816                             counter++, error);
817
818         if (error)
819                 IWL_WARN(priv, "Tuning to channel %d\n",
820                             le16_to_cpu(rxon->channel));
821
822         if (error) {
823                 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
824                 return -1;
825         }
826         return 0;
827 }
828 EXPORT_SYMBOL(iwl_check_rxon_cmd);
829
830 /**
831  * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
832  * @priv: staging_rxon is compared to active_rxon
833  *
834  * If the RXON structure is changing enough to require a new tune,
835  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
836  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
837  */
838 int iwl_full_rxon_required(struct iwl_priv *priv)
839 {
840
841         /* These items are only settable from the full RXON command */
842         if (!(iwl_is_associated(priv)) ||
843             compare_ether_addr(priv->staging_rxon.bssid_addr,
844                                priv->active_rxon.bssid_addr) ||
845             compare_ether_addr(priv->staging_rxon.node_addr,
846                                priv->active_rxon.node_addr) ||
847             compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
848                                priv->active_rxon.wlap_bssid_addr) ||
849             (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
850             (priv->staging_rxon.channel != priv->active_rxon.channel) ||
851             (priv->staging_rxon.air_propagation !=
852              priv->active_rxon.air_propagation) ||
853             (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
854              priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
855             (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
856              priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
857             (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
858              priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
859             (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
860                 return 1;
861
862         /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
863          * be updated with the RXON_ASSOC command -- however only some
864          * flag transitions are allowed using RXON_ASSOC */
865
866         /* Check if we are not switching bands */
867         if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
868             (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
869                 return 1;
870
871         /* Check if we are switching association toggle */
872         if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
873                 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
874                 return 1;
875
876         return 0;
877 }
878 EXPORT_SYMBOL(iwl_full_rxon_required);
879
880 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
881 {
882         int i;
883         int rate_mask;
884
885         /* Set rate mask*/
886         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
887                 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
888         else
889                 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
890
891         /* Find lowest valid rate */
892         for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
893                                         i = iwl_rates[i].next_ieee) {
894                 if (rate_mask & (1 << i))
895                         return iwl_rates[i].plcp;
896         }
897
898         /* No valid rate was found. Assign the lowest one */
899         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
900                 return IWL_RATE_1M_PLCP;
901         else
902                 return IWL_RATE_6M_PLCP;
903 }
904 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
905
906 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
907 {
908         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
909
910         if (!ht_conf->is_ht) {
911                 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
912                         RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
913                         RXON_FLG_HT40_PROT_MSK |
914                         RXON_FLG_HT_PROT_MSK);
915                 return;
916         }
917
918         /* FIXME: if the definition of ht_protection changed, the "translation"
919          * will be needed for rxon->flags
920          */
921         rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
922
923         /* Set up channel bandwidth:
924          * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
925         /* clear the HT channel mode before set the mode */
926         rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
927                          RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
928         if (iwl_is_ht40_tx_allowed(priv, NULL)) {
929                 /* pure ht40 */
930                 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
931                         rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
932                         /* Note: control channel is opposite of extension channel */
933                         switch (ht_conf->extension_chan_offset) {
934                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
935                                 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
936                                 break;
937                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
938                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
939                                 break;
940                         }
941                 } else {
942                         /* Note: control channel is opposite of extension channel */
943                         switch (ht_conf->extension_chan_offset) {
944                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
945                                 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
946                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
947                                 break;
948                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
949                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
950                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
951                                 break;
952                         case IEEE80211_HT_PARAM_CHA_SEC_NONE:
953                         default:
954                                 /* channel location only valid if in Mixed mode */
955                                 IWL_ERR(priv, "invalid extension channel offset\n");
956                                 break;
957                         }
958                 }
959         } else {
960                 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
961         }
962
963         if (priv->cfg->ops->hcmd->set_rxon_chain)
964                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
965
966         IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
967                         "extension channel offset 0x%x\n",
968                         le32_to_cpu(rxon->flags), ht_conf->ht_protection,
969                         ht_conf->extension_chan_offset);
970         return;
971 }
972 EXPORT_SYMBOL(iwl_set_rxon_ht);
973
974 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
975 #define IWL_NUM_RX_CHAINS_SINGLE        2
976 #define IWL_NUM_IDLE_CHAINS_DUAL        2
977 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
978
979 /*
980  * Determine how many receiver/antenna chains to use.
981  *
982  * More provides better reception via diversity.  Fewer saves power
983  * at the expense of throughput, but only when not in powersave to
984  * start with.
985  *
986  * MIMO (dual stream) requires at least 2, but works better with 3.
987  * This does not determine *which* chains to use, just how many.
988  */
989 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
990 {
991         /* # of Rx chains to use when expecting MIMO. */
992         if (is_single_rx_stream(priv))
993                 return IWL_NUM_RX_CHAINS_SINGLE;
994         else
995                 return IWL_NUM_RX_CHAINS_MULTIPLE;
996 }
997
998 /*
999  * When we are in power saving mode, unless device support spatial
1000  * multiplexing power save, use the active count for rx chain count.
1001  */
1002 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1003 {
1004         /* # Rx chains when idling, depending on SMPS mode */
1005         switch (priv->current_ht_config.smps) {
1006         case IEEE80211_SMPS_STATIC:
1007         case IEEE80211_SMPS_DYNAMIC:
1008                 return IWL_NUM_IDLE_CHAINS_SINGLE;
1009         case IEEE80211_SMPS_OFF:
1010                 return active_cnt;
1011         default:
1012                 WARN(1, "invalid SMPS mode %d",
1013                      priv->current_ht_config.smps);
1014                 return active_cnt;
1015         }
1016 }
1017
1018 /* up to 4 chains */
1019 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1020 {
1021         u8 res;
1022         res = (chain_bitmap & BIT(0)) >> 0;
1023         res += (chain_bitmap & BIT(1)) >> 1;
1024         res += (chain_bitmap & BIT(2)) >> 2;
1025         res += (chain_bitmap & BIT(3)) >> 3;
1026         return res;
1027 }
1028
1029 /**
1030  * iwl_is_monitor_mode - Determine if interface in monitor mode
1031  *
1032  * priv->iw_mode is set in add_interface, but add_interface is
1033  * never called for monitor mode. The only way mac80211 informs us about
1034  * monitor mode is through configuring filters (call to configure_filter).
1035  */
1036 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1037 {
1038         return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1039 }
1040 EXPORT_SYMBOL(iwl_is_monitor_mode);
1041
1042 /**
1043  * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1044  *
1045  * Selects how many and which Rx receivers/antennas/chains to use.
1046  * This should not be used for scan command ... it puts data in wrong place.
1047  */
1048 void iwl_set_rxon_chain(struct iwl_priv *priv)
1049 {
1050         bool is_single = is_single_rx_stream(priv);
1051         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1052         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1053         u32 active_chains;
1054         u16 rx_chain;
1055
1056         /* Tell uCode which antennas are actually connected.
1057          * Before first association, we assume all antennas are connected.
1058          * Just after first association, iwl_chain_noise_calibration()
1059          *    checks which antennas actually *are* connected. */
1060          if (priv->chain_noise_data.active_chains)
1061                 active_chains = priv->chain_noise_data.active_chains;
1062         else
1063                 active_chains = priv->hw_params.valid_rx_ant;
1064
1065         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1066
1067         /* How many receivers should we use? */
1068         active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1069         idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1070
1071
1072         /* correct rx chain count according hw settings
1073          * and chain noise calibration
1074          */
1075         valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1076         if (valid_rx_cnt < active_rx_cnt)
1077                 active_rx_cnt = valid_rx_cnt;
1078
1079         if (valid_rx_cnt < idle_rx_cnt)
1080                 idle_rx_cnt = valid_rx_cnt;
1081
1082         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1083         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
1084
1085         /* copied from 'iwl_bg_request_scan()' */
1086         /* Force use of chains B and C (0x6) for Rx for 4965
1087          * Avoid A (0x1) because of its off-channel reception on A-band.
1088          * MIMO is not used here, but value is required */
1089         if (iwl_is_monitor_mode(priv) &&
1090             !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1091             ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1092                 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1093                 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1094                 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1095                 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1096         }
1097
1098         priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1099
1100         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1101                 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1102         else
1103                 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1104
1105         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1106                         priv->staging_rxon.rx_chain,
1107                         active_rx_cnt, idle_rx_cnt);
1108
1109         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1110                 active_rx_cnt < idle_rx_cnt);
1111 }
1112 EXPORT_SYMBOL(iwl_set_rxon_chain);
1113
1114 /**
1115  * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1116  * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1117  * @channel: Any channel valid for the requested phymode
1118
1119  * In addition to setting the staging RXON, priv->phymode is also set.
1120  *
1121  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
1122  * in the staging RXON flag structure based on the phymode
1123  */
1124 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1125 {
1126         enum ieee80211_band band = ch->band;
1127         u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1128
1129         if (!iwl_get_channel_info(priv, band, channel)) {
1130                 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1131                                channel, band);
1132                 return -EINVAL;
1133         }
1134
1135         if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1136             (priv->band == band))
1137                 return 0;
1138
1139         priv->staging_rxon.channel = cpu_to_le16(channel);
1140         if (band == IEEE80211_BAND_5GHZ)
1141                 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1142         else
1143                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1144
1145         priv->band = band;
1146
1147         IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1148
1149         return 0;
1150 }
1151 EXPORT_SYMBOL(iwl_set_rxon_channel);
1152
1153 void iwl_set_flags_for_band(struct iwl_priv *priv,
1154                             enum ieee80211_band band)
1155 {
1156         if (band == IEEE80211_BAND_5GHZ) {
1157                 priv->staging_rxon.flags &=
1158                     ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1159                       | RXON_FLG_CCK_MSK);
1160                 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1161         } else {
1162                 /* Copied from iwl_post_associate() */
1163                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1164                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1165                 else
1166                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1167
1168                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1169                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1170
1171                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1172                 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1173                 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1174         }
1175 }
1176
1177 /*
1178  * initialize rxon structure with default values from eeprom
1179  */
1180 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1181 {
1182         const struct iwl_channel_info *ch_info;
1183
1184         memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1185
1186         switch (mode) {
1187         case NL80211_IFTYPE_AP:
1188                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1189                 break;
1190
1191         case NL80211_IFTYPE_STATION:
1192                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1193                 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1194                 break;
1195
1196         case NL80211_IFTYPE_ADHOC:
1197                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1198                 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1199                 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1200                                                   RXON_FILTER_ACCEPT_GRP_MSK;
1201                 break;
1202
1203         default:
1204                 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1205                 break;
1206         }
1207
1208 #if 0
1209         /* TODO:  Figure out when short_preamble would be set and cache from
1210          * that */
1211         if (!hw_to_local(priv->hw)->short_preamble)
1212                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1213         else
1214                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1215 #endif
1216
1217         ch_info = iwl_get_channel_info(priv, priv->band,
1218                                        le16_to_cpu(priv->active_rxon.channel));
1219
1220         if (!ch_info)
1221                 ch_info = &priv->channel_info[0];
1222
1223         /*
1224          * in some case A channels are all non IBSS
1225          * in this case force B/G channel
1226          */
1227         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1228             !(is_channel_ibss(ch_info)))
1229                 ch_info = &priv->channel_info[0];
1230
1231         priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1232         priv->band = ch_info->band;
1233
1234         iwl_set_flags_for_band(priv, priv->band);
1235
1236         priv->staging_rxon.ofdm_basic_rates =
1237             (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1238         priv->staging_rxon.cck_basic_rates =
1239             (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1240
1241         /* clear both MIX and PURE40 mode flag */
1242         priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1243                                         RXON_FLG_CHANNEL_MODE_PURE_40);
1244         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1245         memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1246         priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1247         priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1248         priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1249 }
1250 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1251
1252 static void iwl_set_rate(struct iwl_priv *priv)
1253 {
1254         const struct ieee80211_supported_band *hw = NULL;
1255         struct ieee80211_rate *rate;
1256         int i;
1257
1258         hw = iwl_get_hw_mode(priv, priv->band);
1259         if (!hw) {
1260                 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1261                 return;
1262         }
1263
1264         priv->active_rate = 0;
1265         priv->active_rate_basic = 0;
1266
1267         for (i = 0; i < hw->n_bitrates; i++) {
1268                 rate = &(hw->bitrates[i]);
1269                 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1270                         priv->active_rate |= (1 << rate->hw_value);
1271         }
1272
1273         IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1274                        priv->active_rate, priv->active_rate_basic);
1275
1276         /*
1277          * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1278          * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1279          * OFDM
1280          */
1281         if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1282                 priv->staging_rxon.cck_basic_rates =
1283                     ((priv->active_rate_basic &
1284                       IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1285         else
1286                 priv->staging_rxon.cck_basic_rates =
1287                     (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1288
1289         if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1290                 priv->staging_rxon.ofdm_basic_rates =
1291                     ((priv->active_rate_basic &
1292                       (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1293                       IWL_FIRST_OFDM_RATE) & 0xFF;
1294         else
1295                 priv->staging_rxon.ofdm_basic_rates =
1296                    (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1297 }
1298
1299 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1300 {
1301         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1302         struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1303         struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1304
1305         if (priv->switch_rxon.switch_in_progress) {
1306                 if (!le32_to_cpu(csa->status) &&
1307                     (csa->channel == priv->switch_rxon.channel)) {
1308                         rxon->channel = csa->channel;
1309                         priv->staging_rxon.channel = csa->channel;
1310                         IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1311                               le16_to_cpu(csa->channel));
1312                 } else
1313                         IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1314                               le16_to_cpu(csa->channel));
1315
1316                 priv->switch_rxon.switch_in_progress = false;
1317         }
1318 }
1319 EXPORT_SYMBOL(iwl_rx_csa);
1320
1321 #ifdef CONFIG_IWLWIFI_DEBUG
1322 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1323 {
1324         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1325
1326         IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1327         iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1328         IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1329         IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1330         IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1331                         le32_to_cpu(rxon->filter_flags));
1332         IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1333         IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1334                         rxon->ofdm_basic_rates);
1335         IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1336         IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1337         IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1338         IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1339 }
1340 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1341 #endif
1342 /**
1343  * iwl_irq_handle_error - called for HW or SW error interrupt from card
1344  */
1345 void iwl_irq_handle_error(struct iwl_priv *priv)
1346 {
1347         /* Set the FW error flag -- cleared on iwl_down */
1348         set_bit(STATUS_FW_ERROR, &priv->status);
1349
1350         /* Cancel currently queued command. */
1351         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1352
1353         priv->cfg->ops->lib->dump_nic_error_log(priv);
1354         if (priv->cfg->ops->lib->dump_csr)
1355                 priv->cfg->ops->lib->dump_csr(priv);
1356         priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
1357 #ifdef CONFIG_IWLWIFI_DEBUG
1358         if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1359                 iwl_print_rx_config_cmd(priv);
1360 #endif
1361
1362         wake_up_interruptible(&priv->wait_command_queue);
1363
1364         /* Keep the restart process from trying to send host
1365          * commands by clearing the INIT status bit */
1366         clear_bit(STATUS_READY, &priv->status);
1367
1368         if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1369                 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1370                           "Restarting adapter due to uCode error.\n");
1371
1372                 if (priv->cfg->mod_params->restart_fw)
1373                         queue_work(priv->workqueue, &priv->restart);
1374         }
1375 }
1376 EXPORT_SYMBOL(iwl_irq_handle_error);
1377
1378 int iwl_apm_stop_master(struct iwl_priv *priv)
1379 {
1380         int ret = 0;
1381
1382         /* stop device's busmaster DMA activity */
1383         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1384
1385         ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1386                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1387         if (ret)
1388                 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1389
1390         IWL_DEBUG_INFO(priv, "stop master\n");
1391
1392         return ret;
1393 }
1394 EXPORT_SYMBOL(iwl_apm_stop_master);
1395
1396 void iwl_apm_stop(struct iwl_priv *priv)
1397 {
1398         IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1399
1400         /* Stop device's DMA activity */
1401         iwl_apm_stop_master(priv);
1402
1403         /* Reset the entire device */
1404         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1405
1406         udelay(10);
1407
1408         /*
1409          * Clear "initialization complete" bit to move adapter from
1410          * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1411          */
1412         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1413 }
1414 EXPORT_SYMBOL(iwl_apm_stop);
1415
1416
1417 /*
1418  * Start up NIC's basic functionality after it has been reset
1419  * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1420  * NOTE:  This does not load uCode nor start the embedded processor
1421  */
1422 int iwl_apm_init(struct iwl_priv *priv)
1423 {
1424         int ret = 0;
1425         u16 lctl;
1426
1427         IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1428
1429         /*
1430          * Use "set_bit" below rather than "write", to preserve any hardware
1431          * bits already set by default after reset.
1432          */
1433
1434         /* Disable L0S exit timer (platform NMI Work/Around) */
1435         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1436                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1437
1438         /*
1439          * Disable L0s without affecting L1;
1440          *  don't wait for ICH L0s (ICH bug W/A)
1441          */
1442         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1443                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1444
1445         /* Set FH wait threshold to maximum (HW error during stress W/A) */
1446         iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1447
1448         /*
1449          * Enable HAP INTA (interrupt from management bus) to
1450          * wake device's PCI Express link L1a -> L0s
1451          * NOTE:  This is no-op for 3945 (non-existant bit)
1452          */
1453         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1454                                     CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1455
1456         /*
1457          * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1458          * Check if BIOS (or OS) enabled L1-ASPM on this device.
1459          * If so (likely), disable L0S, so device moves directly L0->L1;
1460          *    costs negligible amount of power savings.
1461          * If not (unlikely), enable L0S, so there is at least some
1462          *    power savings, even without L1.
1463          */
1464         if (priv->cfg->set_l0s) {
1465                 lctl = iwl_pcie_link_ctl(priv);
1466                 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1467                                         PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1468                         /* L1-ASPM enabled; disable(!) L0S  */
1469                         iwl_set_bit(priv, CSR_GIO_REG,
1470                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1471                         IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1472                 } else {
1473                         /* L1-ASPM disabled; enable(!) L0S */
1474                         iwl_clear_bit(priv, CSR_GIO_REG,
1475                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1476                         IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1477                 }
1478         }
1479
1480         /* Configure analog phase-lock-loop before activating to D0A */
1481         if (priv->cfg->pll_cfg_val)
1482                 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1483
1484         /*
1485          * Set "initialization complete" bit to move adapter from
1486          * D0U* --> D0A* (powered-up active) state.
1487          */
1488         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1489
1490         /*
1491          * Wait for clock stabilization; once stabilized, access to
1492          * device-internal resources is supported, e.g. iwl_write_prph()
1493          * and accesses to uCode SRAM.
1494          */
1495         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1496                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1497                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1498         if (ret < 0) {
1499                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1500                 goto out;
1501         }
1502
1503         /*
1504          * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1505          * BSM (Boostrap State Machine) is only in 3945 and 4965;
1506          * later devices (i.e. 5000 and later) have non-volatile SRAM,
1507          * and don't need BSM to restore data after power-saving sleep.
1508          *
1509          * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1510          * do not disable clocks.  This preserves any hardware bits already
1511          * set by default in "CLK_CTRL_REG" after reset.
1512          */
1513         if (priv->cfg->use_bsm)
1514                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1515                         APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1516         else
1517                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1518                         APMG_CLK_VAL_DMA_CLK_RQT);
1519         udelay(20);
1520
1521         /* Disable L1-Active */
1522         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1523                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1524
1525 out:
1526         return ret;
1527 }
1528 EXPORT_SYMBOL(iwl_apm_init);
1529
1530
1531
1532 void iwl_configure_filter(struct ieee80211_hw *hw,
1533                           unsigned int changed_flags,
1534                           unsigned int *total_flags,
1535                           u64 multicast)
1536 {
1537         struct iwl_priv *priv = hw->priv;
1538         __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1539
1540         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1541                         changed_flags, *total_flags);
1542
1543         if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1544                 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1545                         *filter_flags |= RXON_FILTER_PROMISC_MSK;
1546                 else
1547                         *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1548         }
1549         if (changed_flags & FIF_ALLMULTI) {
1550                 if (*total_flags & FIF_ALLMULTI)
1551                         *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1552                 else
1553                         *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1554         }
1555         if (changed_flags & FIF_CONTROL) {
1556                 if (*total_flags & FIF_CONTROL)
1557                         *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1558                 else
1559                         *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1560         }
1561         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1562                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1563                         *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1564                 else
1565                         *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1566         }
1567
1568         /* We avoid iwl_commit_rxon here to commit the new filter flags
1569          * since mac80211 will call ieee80211_hw_config immediately.
1570          * (mc_list is not supported at this time). Otherwise, we need to
1571          * queue a background iwl_commit_rxon work.
1572          */
1573
1574         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1575                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1576 }
1577 EXPORT_SYMBOL(iwl_configure_filter);
1578
1579 int iwl_set_hw_params(struct iwl_priv *priv)
1580 {
1581         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1582         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1583         if (priv->cfg->mod_params->amsdu_size_8K)
1584                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1585         else
1586                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1587
1588         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1589
1590         if (priv->cfg->mod_params->disable_11n)
1591                 priv->cfg->sku &= ~IWL_SKU_N;
1592
1593         /* Device-specific setup */
1594         return priv->cfg->ops->lib->set_hw_params(priv);
1595 }
1596 EXPORT_SYMBOL(iwl_set_hw_params);
1597
1598 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1599 {
1600         int ret = 0;
1601         s8 prev_tx_power = priv->tx_power_user_lmt;
1602
1603         if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1604                 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1605                          tx_power,
1606                          IWL_TX_POWER_TARGET_POWER_MIN);
1607                 return -EINVAL;
1608         }
1609
1610         if (tx_power > priv->tx_power_device_lmt) {
1611                 IWL_WARN(priv,
1612                         "Requested user TXPOWER %d above upper limit %d.\n",
1613                          tx_power, priv->tx_power_device_lmt);
1614                 return -EINVAL;
1615         }
1616
1617         if (priv->tx_power_user_lmt != tx_power)
1618                 force = true;
1619
1620         /* if nic is not up don't send command */
1621         if (iwl_is_ready_rf(priv)) {
1622                 priv->tx_power_user_lmt = tx_power;
1623                 if (force && priv->cfg->ops->lib->send_tx_power)
1624                         ret = priv->cfg->ops->lib->send_tx_power(priv);
1625                 else if (!priv->cfg->ops->lib->send_tx_power)
1626                         ret = -EOPNOTSUPP;
1627                 /*
1628                  * if fail to set tx_power, restore the orig. tx power
1629                  */
1630                 if (ret)
1631                         priv->tx_power_user_lmt = prev_tx_power;
1632         }
1633
1634         /*
1635          * Even this is an async host command, the command
1636          * will always report success from uCode
1637          * So once driver can placing the command into the queue
1638          * successfully, driver can use priv->tx_power_user_lmt
1639          * to reflect the current tx power
1640          */
1641         return ret;
1642 }
1643 EXPORT_SYMBOL(iwl_set_tx_power);
1644
1645 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1646
1647 /* Free dram table */
1648 void iwl_free_isr_ict(struct iwl_priv *priv)
1649 {
1650         if (priv->ict_tbl_vir) {
1651                 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1652                                         PAGE_SIZE, priv->ict_tbl_vir,
1653                                         priv->ict_tbl_dma);
1654                 priv->ict_tbl_vir = NULL;
1655         }
1656 }
1657 EXPORT_SYMBOL(iwl_free_isr_ict);
1658
1659
1660 /* allocate dram shared table it is a PAGE_SIZE aligned
1661  * also reset all data related to ICT table interrupt.
1662  */
1663 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1664 {
1665
1666         if (priv->cfg->use_isr_legacy)
1667                 return 0;
1668         /* allocate shrared data table */
1669         priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1670                                                   ICT_COUNT) + PAGE_SIZE,
1671                                                   &priv->ict_tbl_dma);
1672         if (!priv->ict_tbl_vir)
1673                 return -ENOMEM;
1674
1675         /* align table to PAGE_SIZE boundry */
1676         priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1677
1678         IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1679                              (unsigned long long)priv->ict_tbl_dma,
1680                              (unsigned long long)priv->aligned_ict_tbl_dma,
1681                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1682
1683         priv->ict_tbl =  priv->ict_tbl_vir +
1684                           (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1685
1686         IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1687                              priv->ict_tbl, priv->ict_tbl_vir,
1688                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1689
1690         /* reset table and index to all 0 */
1691         memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1692         priv->ict_index = 0;
1693
1694         /* add periodic RX interrupt */
1695         priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1696         return 0;
1697 }
1698 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1699
1700 /* Device is going up inform it about using ICT interrupt table,
1701  * also we need to tell the driver to start using ICT interrupt.
1702  */
1703 int iwl_reset_ict(struct iwl_priv *priv)
1704 {
1705         u32 val;
1706         unsigned long flags;
1707
1708         if (!priv->ict_tbl_vir)
1709                 return 0;
1710
1711         spin_lock_irqsave(&priv->lock, flags);
1712         iwl_disable_interrupts(priv);
1713
1714         memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1715
1716         val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1717
1718         val |= CSR_DRAM_INT_TBL_ENABLE;
1719         val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1720
1721         IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1722                         "aligned dma address %Lx\n",
1723                         val, (unsigned long long)priv->aligned_ict_tbl_dma);
1724
1725         iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1726         priv->use_ict = true;
1727         priv->ict_index = 0;
1728         iwl_write32(priv, CSR_INT, priv->inta_mask);
1729         iwl_enable_interrupts(priv);
1730         spin_unlock_irqrestore(&priv->lock, flags);
1731
1732         return 0;
1733 }
1734 EXPORT_SYMBOL(iwl_reset_ict);
1735
1736 /* Device is going down disable ict interrupt usage */
1737 void iwl_disable_ict(struct iwl_priv *priv)
1738 {
1739         unsigned long flags;
1740
1741         spin_lock_irqsave(&priv->lock, flags);
1742         priv->use_ict = false;
1743         spin_unlock_irqrestore(&priv->lock, flags);
1744 }
1745 EXPORT_SYMBOL(iwl_disable_ict);
1746
1747 /* interrupt handler using ict table, with this interrupt driver will
1748  * stop using INTA register to get device's interrupt, reading this register
1749  * is expensive, device will write interrupts in ICT dram table, increment
1750  * index then will fire interrupt to driver, driver will OR all ICT table
1751  * entries from current index up to table entry with 0 value. the result is
1752  * the interrupt we need to service, driver will set the entries back to 0 and
1753  * set index.
1754  */
1755 irqreturn_t iwl_isr_ict(int irq, void *data)
1756 {
1757         struct iwl_priv *priv = data;
1758         u32 inta, inta_mask;
1759         u32 val = 0;
1760
1761         if (!priv)
1762                 return IRQ_NONE;
1763
1764         /* dram interrupt table not set yet,
1765          * use legacy interrupt.
1766          */
1767         if (!priv->use_ict)
1768                 return iwl_isr(irq, data);
1769
1770         spin_lock(&priv->lock);
1771
1772         /* Disable (but don't clear!) interrupts here to avoid
1773          * back-to-back ISRs and sporadic interrupts from our NIC.
1774          * If we have something to service, the tasklet will re-enable ints.
1775          * If we *don't* have something, we'll re-enable before leaving here.
1776          */
1777         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1778         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1779
1780
1781         /* Ignore interrupt if there's nothing in NIC to service.
1782          * This may be due to IRQ shared with another device,
1783          * or due to sporadic interrupts thrown from our NIC. */
1784         if (!priv->ict_tbl[priv->ict_index]) {
1785                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1786                 goto none;
1787         }
1788
1789         /* read all entries that not 0 start with ict_index */
1790         while (priv->ict_tbl[priv->ict_index]) {
1791
1792                 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1793                 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1794                                 priv->ict_index,
1795                                 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1796                 priv->ict_tbl[priv->ict_index] = 0;
1797                 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1798                                                      ICT_COUNT);
1799
1800         }
1801
1802         /* We should not get this value, just ignore it. */
1803         if (val == 0xffffffff)
1804                 val = 0;
1805
1806         inta = (0xff & val) | ((0xff00 & val) << 16);
1807         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1808                         inta, inta_mask, val);
1809
1810         inta &= priv->inta_mask;
1811         priv->inta |= inta;
1812
1813         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1814         if (likely(inta))
1815                 tasklet_schedule(&priv->irq_tasklet);
1816         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1817                 /* Allow interrupt if was disabled by this handler and
1818                  * no tasklet was schedules, We should not enable interrupt,
1819                  * tasklet will enable it.
1820                  */
1821                 iwl_enable_interrupts(priv);
1822         }
1823
1824         spin_unlock(&priv->lock);
1825         return IRQ_HANDLED;
1826
1827  none:
1828         /* re-enable interrupts here since we don't have anything to service.
1829          * only Re-enable if disabled by irq.
1830          */
1831         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1832                 iwl_enable_interrupts(priv);
1833
1834         spin_unlock(&priv->lock);
1835         return IRQ_NONE;
1836 }
1837 EXPORT_SYMBOL(iwl_isr_ict);
1838
1839
1840 static irqreturn_t iwl_isr(int irq, void *data)
1841 {
1842         struct iwl_priv *priv = data;
1843         u32 inta, inta_mask;
1844 #ifdef CONFIG_IWLWIFI_DEBUG
1845         u32 inta_fh;
1846 #endif
1847         if (!priv)
1848                 return IRQ_NONE;
1849
1850         spin_lock(&priv->lock);
1851
1852         /* Disable (but don't clear!) interrupts here to avoid
1853          *    back-to-back ISRs and sporadic interrupts from our NIC.
1854          * If we have something to service, the tasklet will re-enable ints.
1855          * If we *don't* have something, we'll re-enable before leaving here. */
1856         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1857         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1858
1859         /* Discover which interrupts are active/pending */
1860         inta = iwl_read32(priv, CSR_INT);
1861
1862         /* Ignore interrupt if there's nothing in NIC to service.
1863          * This may be due to IRQ shared with another device,
1864          * or due to sporadic interrupts thrown from our NIC. */
1865         if (!inta) {
1866                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1867                 goto none;
1868         }
1869
1870         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1871                 /* Hardware disappeared. It might have already raised
1872                  * an interrupt */
1873                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1874                 goto unplugged;
1875         }
1876
1877 #ifdef CONFIG_IWLWIFI_DEBUG
1878         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1879                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1880                 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1881                               "fh 0x%08x\n", inta, inta_mask, inta_fh);
1882         }
1883 #endif
1884
1885         priv->inta |= inta;
1886         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1887         if (likely(inta))
1888                 tasklet_schedule(&priv->irq_tasklet);
1889         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1890                 iwl_enable_interrupts(priv);
1891
1892  unplugged:
1893         spin_unlock(&priv->lock);
1894         return IRQ_HANDLED;
1895
1896  none:
1897         /* re-enable interrupts here since we don't have anything to service. */
1898         /* only Re-enable if diabled by irq  and no schedules tasklet. */
1899         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1900                 iwl_enable_interrupts(priv);
1901
1902         spin_unlock(&priv->lock);
1903         return IRQ_NONE;
1904 }
1905
1906 irqreturn_t iwl_isr_legacy(int irq, void *data)
1907 {
1908         struct iwl_priv *priv = data;
1909         u32 inta, inta_mask;
1910         u32 inta_fh;
1911         if (!priv)
1912                 return IRQ_NONE;
1913
1914         spin_lock(&priv->lock);
1915
1916         /* Disable (but don't clear!) interrupts here to avoid
1917          *    back-to-back ISRs and sporadic interrupts from our NIC.
1918          * If we have something to service, the tasklet will re-enable ints.
1919          * If we *don't* have something, we'll re-enable before leaving here. */
1920         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1921         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1922
1923         /* Discover which interrupts are active/pending */
1924         inta = iwl_read32(priv, CSR_INT);
1925         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1926
1927         /* Ignore interrupt if there's nothing in NIC to service.
1928          * This may be due to IRQ shared with another device,
1929          * or due to sporadic interrupts thrown from our NIC. */
1930         if (!inta && !inta_fh) {
1931                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1932                 goto none;
1933         }
1934
1935         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1936                 /* Hardware disappeared. It might have already raised
1937                  * an interrupt */
1938                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1939                 goto unplugged;
1940         }
1941
1942         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1943                       inta, inta_mask, inta_fh);
1944
1945         inta &= ~CSR_INT_BIT_SCD;
1946
1947         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1948         if (likely(inta || inta_fh))
1949                 tasklet_schedule(&priv->irq_tasklet);
1950
1951  unplugged:
1952         spin_unlock(&priv->lock);
1953         return IRQ_HANDLED;
1954
1955  none:
1956         /* re-enable interrupts here since we don't have anything to service. */
1957         /* only Re-enable if diabled by irq */
1958         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1959                 iwl_enable_interrupts(priv);
1960         spin_unlock(&priv->lock);
1961         return IRQ_NONE;
1962 }
1963 EXPORT_SYMBOL(iwl_isr_legacy);
1964
1965 int iwl_send_bt_config(struct iwl_priv *priv)
1966 {
1967         struct iwl_bt_cmd bt_cmd = {
1968                 .flags = BT_COEX_MODE_4W,
1969                 .lead_time = BT_LEAD_TIME_DEF,
1970                 .max_kill = BT_MAX_KILL_DEF,
1971                 .kill_ack_mask = 0,
1972                 .kill_cts_mask = 0,
1973         };
1974
1975         return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1976                                 sizeof(struct iwl_bt_cmd), &bt_cmd);
1977 }
1978 EXPORT_SYMBOL(iwl_send_bt_config);
1979
1980 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1981 {
1982         struct iwl_statistics_cmd statistics_cmd = {
1983                 .configuration_flags =
1984                         clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1985         };
1986
1987         if (flags & CMD_ASYNC)
1988                 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1989                                                sizeof(struct iwl_statistics_cmd),
1990                                                &statistics_cmd, NULL);
1991         else
1992                 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1993                                         sizeof(struct iwl_statistics_cmd),
1994                                         &statistics_cmd);
1995 }
1996 EXPORT_SYMBOL(iwl_send_statistics_request);
1997
1998 /**
1999  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2000  *   using sample data 100 bytes apart.  If these sample points are good,
2001  *   it's a pretty good bet that everything between them is good, too.
2002  */
2003 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2004 {
2005         u32 val;
2006         int ret = 0;
2007         u32 errcnt = 0;
2008         u32 i;
2009
2010         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2011
2012         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2013                 /* read data comes through single port, auto-incr addr */
2014                 /* NOTE: Use the debugless read so we don't flood kernel log
2015                  * if IWL_DL_IO is set */
2016                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2017                         i + IWL49_RTC_INST_LOWER_BOUND);
2018                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2019                 if (val != le32_to_cpu(*image)) {
2020                         ret = -EIO;
2021                         errcnt++;
2022                         if (errcnt >= 3)
2023                                 break;
2024                 }
2025         }
2026
2027         return ret;
2028 }
2029
2030 /**
2031  * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2032  *     looking at all data.
2033  */
2034 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2035                                  u32 len)
2036 {
2037         u32 val;
2038         u32 save_len = len;
2039         int ret = 0;
2040         u32 errcnt;
2041
2042         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2043
2044         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2045                            IWL49_RTC_INST_LOWER_BOUND);
2046
2047         errcnt = 0;
2048         for (; len > 0; len -= sizeof(u32), image++) {
2049                 /* read data comes through single port, auto-incr addr */
2050                 /* NOTE: Use the debugless read so we don't flood kernel log
2051                  * if IWL_DL_IO is set */
2052                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2053                 if (val != le32_to_cpu(*image)) {
2054                         IWL_ERR(priv, "uCode INST section is invalid at "
2055                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2056                                   save_len - len, val, le32_to_cpu(*image));
2057                         ret = -EIO;
2058                         errcnt++;
2059                         if (errcnt >= 20)
2060                                 break;
2061                 }
2062         }
2063
2064         if (!errcnt)
2065                 IWL_DEBUG_INFO(priv,
2066                     "ucode image in INSTRUCTION memory is good\n");
2067
2068         return ret;
2069 }
2070
2071 /**
2072  * iwl_verify_ucode - determine which instruction image is in SRAM,
2073  *    and verify its contents
2074  */
2075 int iwl_verify_ucode(struct iwl_priv *priv)
2076 {
2077         __le32 *image;
2078         u32 len;
2079         int ret;
2080
2081         /* Try bootstrap */
2082         image = (__le32 *)priv->ucode_boot.v_addr;
2083         len = priv->ucode_boot.len;
2084         ret = iwlcore_verify_inst_sparse(priv, image, len);
2085         if (!ret) {
2086                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2087                 return 0;
2088         }
2089
2090         /* Try initialize */
2091         image = (__le32 *)priv->ucode_init.v_addr;
2092         len = priv->ucode_init.len;
2093         ret = iwlcore_verify_inst_sparse(priv, image, len);
2094         if (!ret) {
2095                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2096                 return 0;
2097         }
2098
2099         /* Try runtime/protocol */
2100         image = (__le32 *)priv->ucode_code.v_addr;
2101         len = priv->ucode_code.len;
2102         ret = iwlcore_verify_inst_sparse(priv, image, len);
2103         if (!ret) {
2104                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2105                 return 0;
2106         }
2107
2108         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2109
2110         /* Since nothing seems to match, show first several data entries in
2111          * instruction SRAM, so maybe visual inspection will give a clue.
2112          * Selection of bootstrap image (vs. other images) is arbitrary. */
2113         image = (__le32 *)priv->ucode_boot.v_addr;
2114         len = priv->ucode_boot.len;
2115         ret = iwl_verify_inst_full(priv, image, len);
2116
2117         return ret;
2118 }
2119 EXPORT_SYMBOL(iwl_verify_ucode);
2120
2121
2122 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2123 {
2124         struct iwl_ct_kill_config cmd;
2125         struct iwl_ct_kill_throttling_config adv_cmd;
2126         unsigned long flags;
2127         int ret = 0;
2128
2129         spin_lock_irqsave(&priv->lock, flags);
2130         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2131                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2132         spin_unlock_irqrestore(&priv->lock, flags);
2133         priv->thermal_throttle.ct_kill_toggle = false;
2134
2135         if (priv->cfg->support_ct_kill_exit) {
2136                 adv_cmd.critical_temperature_enter =
2137                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2138                 adv_cmd.critical_temperature_exit =
2139                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2140
2141                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2142                                        sizeof(adv_cmd), &adv_cmd);
2143                 if (ret)
2144                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2145                 else
2146                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2147                                         "succeeded, "
2148                                         "critical temperature enter is %d,"
2149                                         "exit is %d\n",
2150                                        priv->hw_params.ct_kill_threshold,
2151                                        priv->hw_params.ct_kill_exit_threshold);
2152         } else {
2153                 cmd.critical_temperature_R =
2154                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2155
2156                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2157                                        sizeof(cmd), &cmd);
2158                 if (ret)
2159                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2160                 else
2161                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2162                                         "succeeded, "
2163                                         "critical temperature is %d\n",
2164                                         priv->hw_params.ct_kill_threshold);
2165         }
2166 }
2167 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2168
2169
2170 /*
2171  * CARD_STATE_CMD
2172  *
2173  * Use: Sets the device's internal card state to enable, disable, or halt
2174  *
2175  * When in the 'enable' state the card operates as normal.
2176  * When in the 'disable' state, the card enters into a low power mode.
2177  * When in the 'halt' state, the card is shut down and must be fully
2178  * restarted to come back on.
2179  */
2180 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2181 {
2182         struct iwl_host_cmd cmd = {
2183                 .id = REPLY_CARD_STATE_CMD,
2184                 .len = sizeof(u32),
2185                 .data = &flags,
2186                 .flags = meta_flag,
2187         };
2188
2189         return iwl_send_cmd(priv, &cmd);
2190 }
2191
2192 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2193                            struct iwl_rx_mem_buffer *rxb)
2194 {
2195 #ifdef CONFIG_IWLWIFI_DEBUG
2196         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2197         struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2198         IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2199                      sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2200 #endif
2201 }
2202 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2203
2204 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2205                                       struct iwl_rx_mem_buffer *rxb)
2206 {
2207         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2208         u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2209         IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2210                         "notification for %s:\n", len,
2211                         get_cmd_string(pkt->hdr.cmd));
2212         iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2213 }
2214 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2215
2216 void iwl_rx_reply_error(struct iwl_priv *priv,
2217                         struct iwl_rx_mem_buffer *rxb)
2218 {
2219         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2220
2221         IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2222                 "seq 0x%04X ser 0x%08X\n",
2223                 le32_to_cpu(pkt->u.err_resp.error_type),
2224                 get_cmd_string(pkt->u.err_resp.cmd_id),
2225                 pkt->u.err_resp.cmd_id,
2226                 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2227                 le32_to_cpu(pkt->u.err_resp.error_info));
2228 }
2229 EXPORT_SYMBOL(iwl_rx_reply_error);
2230
2231 void iwl_clear_isr_stats(struct iwl_priv *priv)
2232 {
2233         memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2234 }
2235
2236 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2237                            const struct ieee80211_tx_queue_params *params)
2238 {
2239         struct iwl_priv *priv = hw->priv;
2240         unsigned long flags;
2241         int q;
2242
2243         IWL_DEBUG_MAC80211(priv, "enter\n");
2244
2245         if (!iwl_is_ready_rf(priv)) {
2246                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2247                 return -EIO;
2248         }
2249
2250         if (queue >= AC_NUM) {
2251                 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2252                 return 0;
2253         }
2254
2255         q = AC_NUM - 1 - queue;
2256
2257         spin_lock_irqsave(&priv->lock, flags);
2258
2259         priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2260         priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2261         priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2262         priv->qos_data.def_qos_parm.ac[q].edca_txop =
2263                         cpu_to_le16((params->txop * 32));
2264
2265         priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2266         priv->qos_data.qos_active = 1;
2267
2268         if (priv->iw_mode == NL80211_IFTYPE_AP)
2269                 iwl_activate_qos(priv, 1);
2270         else if (priv->assoc_id && iwl_is_associated(priv))
2271                 iwl_activate_qos(priv, 0);
2272
2273         spin_unlock_irqrestore(&priv->lock, flags);
2274
2275         IWL_DEBUG_MAC80211(priv, "leave\n");
2276         return 0;
2277 }
2278 EXPORT_SYMBOL(iwl_mac_conf_tx);
2279
2280 static void iwl_ht_conf(struct iwl_priv *priv,
2281                         struct ieee80211_bss_conf *bss_conf)
2282 {
2283         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2284         struct ieee80211_sta *sta;
2285
2286         IWL_DEBUG_MAC80211(priv, "enter: \n");
2287
2288         if (!ht_conf->is_ht)
2289                 return;
2290
2291         ht_conf->ht_protection =
2292                 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2293         ht_conf->non_GF_STA_present =
2294                 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2295
2296         ht_conf->single_chain_sufficient = false;
2297
2298         switch (priv->iw_mode) {
2299         case NL80211_IFTYPE_STATION:
2300                 rcu_read_lock();
2301                 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2302                 if (sta) {
2303                         struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2304                         int maxstreams;
2305
2306                         maxstreams = (ht_cap->mcs.tx_params &
2307                                       IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2308                                         >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2309                         maxstreams += 1;
2310
2311                         if ((ht_cap->mcs.rx_mask[1] == 0) &&
2312                             (ht_cap->mcs.rx_mask[2] == 0))
2313                                 ht_conf->single_chain_sufficient = true;
2314                         if (maxstreams <= 1)
2315                                 ht_conf->single_chain_sufficient = true;
2316                 } else {
2317                         /*
2318                          * If at all, this can only happen through a race
2319                          * when the AP disconnects us while we're still
2320                          * setting up the connection, in that case mac80211
2321                          * will soon tell us about that.
2322                          */
2323                         ht_conf->single_chain_sufficient = true;
2324                 }
2325                 rcu_read_unlock();
2326                 break;
2327         case NL80211_IFTYPE_ADHOC:
2328                 ht_conf->single_chain_sufficient = true;
2329                 break;
2330         default:
2331                 break;
2332         }
2333
2334         IWL_DEBUG_MAC80211(priv, "leave\n");
2335 }
2336
2337 static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2338 {
2339         priv->assoc_id = 0;
2340         iwl_led_disassociate(priv);
2341         /*
2342          * inform the ucode that there is no longer an
2343          * association and that no more packets should be
2344          * sent
2345          */
2346         priv->staging_rxon.filter_flags &=
2347                 ~RXON_FILTER_ASSOC_MSK;
2348         priv->staging_rxon.assoc_id = 0;
2349         iwlcore_commit_rxon(priv);
2350 }
2351
2352 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2353 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2354                           struct ieee80211_vif *vif,
2355                           struct ieee80211_bss_conf *bss_conf,
2356                           u32 changes)
2357 {
2358         struct iwl_priv *priv = hw->priv;
2359         int ret;
2360
2361         IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2362
2363         if (!iwl_is_alive(priv))
2364                 return;
2365
2366         mutex_lock(&priv->mutex);
2367
2368         if (changes & BSS_CHANGED_BEACON &&
2369             priv->iw_mode == NL80211_IFTYPE_AP) {
2370                 dev_kfree_skb(priv->ibss_beacon);
2371                 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2372         }
2373
2374         if (changes & BSS_CHANGED_BEACON_INT) {
2375                 priv->beacon_int = bss_conf->beacon_int;
2376                 /* TODO: in AP mode, do something to make this take effect */
2377         }
2378
2379         if (changes & BSS_CHANGED_BSSID) {
2380                 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2381
2382                 /*
2383                  * If there is currently a HW scan going on in the
2384                  * background then we need to cancel it else the RXON
2385                  * below/in post_associate will fail.
2386                  */
2387                 if (iwl_scan_cancel_timeout(priv, 100)) {
2388                         IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2389                         IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2390                         mutex_unlock(&priv->mutex);
2391                         return;
2392                 }
2393
2394                 /* mac80211 only sets assoc when in STATION mode */
2395                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2396                     bss_conf->assoc) {
2397                         memcpy(priv->staging_rxon.bssid_addr,
2398                                bss_conf->bssid, ETH_ALEN);
2399
2400                         /* currently needed in a few places */
2401                         memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2402                 } else {
2403                         priv->staging_rxon.filter_flags &=
2404                                 ~RXON_FILTER_ASSOC_MSK;
2405                 }
2406
2407         }
2408
2409         /*
2410          * This needs to be after setting the BSSID in case
2411          * mac80211 decides to do both changes at once because
2412          * it will invoke post_associate.
2413          */
2414         if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2415             changes & BSS_CHANGED_BEACON) {
2416                 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2417
2418                 if (beacon)
2419                         iwl_mac_beacon_update(hw, beacon);
2420         }
2421
2422         if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2423                 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2424                                    bss_conf->use_short_preamble);
2425                 if (bss_conf->use_short_preamble)
2426                         priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2427                 else
2428                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2429         }
2430
2431         if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2432                 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2433                 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2434                         priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2435                 else
2436                         priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2437         }
2438
2439         if (changes & BSS_CHANGED_BASIC_RATES) {
2440                 /* XXX use this information
2441                  *
2442                  * To do that, remove code from iwl_set_rate() and put something
2443                  * like this here:
2444                  *
2445                 if (A-band)
2446                         priv->staging_rxon.ofdm_basic_rates =
2447                                 bss_conf->basic_rates;
2448                 else
2449                         priv->staging_rxon.ofdm_basic_rates =
2450                                 bss_conf->basic_rates >> 4;
2451                         priv->staging_rxon.cck_basic_rates =
2452                                 bss_conf->basic_rates & 0xF;
2453                  */
2454         }
2455
2456         if (changes & BSS_CHANGED_HT) {
2457                 iwl_ht_conf(priv, bss_conf);
2458
2459                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2460                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2461         }
2462
2463         if (changes & BSS_CHANGED_ASSOC) {
2464                 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2465                 if (bss_conf->assoc) {
2466                         priv->assoc_id = bss_conf->aid;
2467                         priv->beacon_int = bss_conf->beacon_int;
2468                         priv->timestamp = bss_conf->timestamp;
2469                         priv->assoc_capability = bss_conf->assoc_capability;
2470
2471                         iwl_led_associate(priv);
2472
2473                         /*
2474                          * We have just associated, don't start scan too early
2475                          * leave time for EAPOL exchange to complete.
2476                          *
2477                          * XXX: do this in mac80211
2478                          */
2479                         priv->next_scan_jiffies = jiffies +
2480                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2481                         if (!iwl_is_rfkill(priv))
2482                                 priv->cfg->ops->lib->post_associate(priv);
2483                 } else
2484                         iwl_set_no_assoc(priv);
2485         }
2486
2487         if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2488                 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2489                                    changes);
2490                 ret = iwl_send_rxon_assoc(priv);
2491                 if (!ret) {
2492                         /* Sync active_rxon with latest change. */
2493                         memcpy((void *)&priv->active_rxon,
2494                                 &priv->staging_rxon,
2495                                 sizeof(struct iwl_rxon_cmd));
2496                 }
2497         }
2498
2499         if (changes & BSS_CHANGED_BEACON_ENABLED) {
2500                 if (vif->bss_conf.enable_beacon) {
2501                         memcpy(priv->staging_rxon.bssid_addr,
2502                                bss_conf->bssid, ETH_ALEN);
2503                         memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2504                         iwlcore_config_ap(priv);
2505                 } else
2506                         iwl_set_no_assoc(priv);
2507         }
2508
2509         mutex_unlock(&priv->mutex);
2510
2511         IWL_DEBUG_MAC80211(priv, "leave\n");
2512 }
2513 EXPORT_SYMBOL(iwl_bss_info_changed);
2514
2515 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2516 {
2517         struct iwl_priv *priv = hw->priv;
2518         unsigned long flags;
2519         __le64 timestamp;
2520
2521         IWL_DEBUG_MAC80211(priv, "enter\n");
2522
2523         if (!iwl_is_ready_rf(priv)) {
2524                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2525                 return -EIO;
2526         }
2527
2528         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2529                 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2530                 return -EIO;
2531         }
2532
2533         spin_lock_irqsave(&priv->lock, flags);
2534
2535         if (priv->ibss_beacon)
2536                 dev_kfree_skb(priv->ibss_beacon);
2537
2538         priv->ibss_beacon = skb;
2539
2540         priv->assoc_id = 0;
2541         timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2542         priv->timestamp = le64_to_cpu(timestamp);
2543
2544         IWL_DEBUG_MAC80211(priv, "leave\n");
2545         spin_unlock_irqrestore(&priv->lock, flags);
2546
2547         iwl_reset_qos(priv);
2548
2549         priv->cfg->ops->lib->post_associate(priv);
2550
2551
2552         return 0;
2553 }
2554 EXPORT_SYMBOL(iwl_mac_beacon_update);
2555
2556 int iwl_set_mode(struct iwl_priv *priv, int mode)
2557 {
2558         if (mode == NL80211_IFTYPE_ADHOC) {
2559                 const struct iwl_channel_info *ch_info;
2560
2561                 ch_info = iwl_get_channel_info(priv,
2562                         priv->band,
2563                         le16_to_cpu(priv->staging_rxon.channel));
2564
2565                 if (!ch_info || !is_channel_ibss(ch_info)) {
2566                         IWL_ERR(priv, "channel %d not IBSS channel\n",
2567                                   le16_to_cpu(priv->staging_rxon.channel));
2568                         return -EINVAL;
2569                 }
2570         }
2571
2572         iwl_connection_init_rx_config(priv, mode);
2573
2574         if (priv->cfg->ops->hcmd->set_rxon_chain)
2575                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2576
2577         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2578
2579         iwl_clear_stations_table(priv);
2580
2581         /* dont commit rxon if rf-kill is on*/
2582         if (!iwl_is_ready_rf(priv))
2583                 return -EAGAIN;
2584
2585         iwlcore_commit_rxon(priv);
2586
2587         return 0;
2588 }
2589 EXPORT_SYMBOL(iwl_set_mode);
2590
2591 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2592                                  struct ieee80211_vif *vif)
2593 {
2594         struct iwl_priv *priv = hw->priv;
2595         unsigned long flags;
2596
2597         IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
2598
2599         if (priv->vif) {
2600                 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2601                 return -EOPNOTSUPP;
2602         }
2603
2604         spin_lock_irqsave(&priv->lock, flags);
2605         priv->vif = vif;
2606         priv->iw_mode = vif->type;
2607
2608         spin_unlock_irqrestore(&priv->lock, flags);
2609
2610         mutex_lock(&priv->mutex);
2611
2612         if (vif->addr) {
2613                 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2614                 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
2615         }
2616
2617         if (iwl_set_mode(priv, vif->type) == -EAGAIN)
2618                 /* we are not ready, will run again when ready */
2619                 set_bit(STATUS_MODE_PENDING, &priv->status);
2620
2621         mutex_unlock(&priv->mutex);
2622
2623         IWL_DEBUG_MAC80211(priv, "leave\n");
2624         return 0;
2625 }
2626 EXPORT_SYMBOL(iwl_mac_add_interface);
2627
2628 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2629                                      struct ieee80211_vif *vif)
2630 {
2631         struct iwl_priv *priv = hw->priv;
2632
2633         IWL_DEBUG_MAC80211(priv, "enter\n");
2634
2635         mutex_lock(&priv->mutex);
2636
2637         if (iwl_is_ready_rf(priv)) {
2638                 iwl_scan_cancel_timeout(priv, 100);
2639                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2640                 iwlcore_commit_rxon(priv);
2641         }
2642         if (priv->vif == vif) {
2643                 priv->vif = NULL;
2644                 memset(priv->bssid, 0, ETH_ALEN);
2645         }
2646         mutex_unlock(&priv->mutex);
2647
2648         IWL_DEBUG_MAC80211(priv, "leave\n");
2649
2650 }
2651 EXPORT_SYMBOL(iwl_mac_remove_interface);
2652
2653 /**
2654  * iwl_mac_config - mac80211 config callback
2655  *
2656  * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2657  * be set inappropriately and the driver currently sets the hardware up to
2658  * use it whenever needed.
2659  */
2660 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2661 {
2662         struct iwl_priv *priv = hw->priv;
2663         const struct iwl_channel_info *ch_info;
2664         struct ieee80211_conf *conf = &hw->conf;
2665         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2666         unsigned long flags = 0;
2667         int ret = 0;
2668         u16 ch;
2669         int scan_active = 0;
2670
2671         mutex_lock(&priv->mutex);
2672
2673         IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2674                                         conf->channel->hw_value, changed);
2675
2676         if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2677                         test_bit(STATUS_SCANNING, &priv->status))) {
2678                 scan_active = 1;
2679                 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2680         }
2681
2682         if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2683                        IEEE80211_CONF_CHANGE_CHANNEL)) {
2684                 /* mac80211 uses static for non-HT which is what we want */
2685                 priv->current_ht_config.smps = conf->smps_mode;
2686
2687                 /*
2688                  * Recalculate chain counts.
2689                  *
2690                  * If monitor mode is enabled then mac80211 will
2691                  * set up the SM PS mode to OFF if an HT channel is
2692                  * configured.
2693                  */
2694                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2695                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2696         }
2697
2698         /* during scanning mac80211 will delay channel setting until
2699          * scan finish with changed = 0
2700          */
2701         if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2702                 if (scan_active)
2703                         goto set_ch_out;
2704
2705                 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2706                 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2707                 if (!is_channel_valid(ch_info)) {
2708                         IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2709                         ret = -EINVAL;
2710                         goto set_ch_out;
2711                 }
2712
2713                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2714                         !is_channel_ibss(ch_info)) {
2715                         IWL_ERR(priv, "channel %d in band %d not "
2716                                 "IBSS channel\n",
2717                                 conf->channel->hw_value, conf->channel->band);
2718                         ret = -EINVAL;
2719                         goto set_ch_out;
2720                 }
2721
2722                 spin_lock_irqsave(&priv->lock, flags);
2723
2724                 /* Configure HT40 channels */
2725                 ht_conf->is_ht = conf_is_ht(conf);
2726                 if (ht_conf->is_ht) {
2727                         if (conf_is_ht40_minus(conf)) {
2728                                 ht_conf->extension_chan_offset =
2729                                         IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2730                                 ht_conf->is_40mhz = true;
2731                         } else if (conf_is_ht40_plus(conf)) {
2732                                 ht_conf->extension_chan_offset =
2733                                         IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2734                                 ht_conf->is_40mhz = true;
2735                         } else {
2736                                 ht_conf->extension_chan_offset =
2737                                         IEEE80211_HT_PARAM_CHA_SEC_NONE;
2738                                 ht_conf->is_40mhz = false;
2739                         }
2740                 } else
2741                         ht_conf->is_40mhz = false;
2742                 /* Default to no protection. Protection mode will later be set
2743                  * from BSS config in iwl_ht_conf */
2744                 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2745
2746                 /* if we are switching from ht to 2.4 clear flags
2747                  * from any ht related info since 2.4 does not
2748                  * support ht */
2749                 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2750                         priv->staging_rxon.flags = 0;
2751
2752                 iwl_set_rxon_channel(priv, conf->channel);
2753
2754                 iwl_set_flags_for_band(priv, conf->channel->band);
2755                 spin_unlock_irqrestore(&priv->lock, flags);
2756                 if (iwl_is_associated(priv) &&
2757                     (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2758                     priv->cfg->ops->lib->set_channel_switch) {
2759                         iwl_set_rate(priv);
2760                         /*
2761                          * at this point, staging_rxon has the
2762                          * configuration for channel switch
2763                          */
2764                         ret = priv->cfg->ops->lib->set_channel_switch(priv,
2765                                 ch);
2766                         if (!ret) {
2767                                 iwl_print_rx_config_cmd(priv);
2768                                 goto out;
2769                         }
2770                         priv->switch_rxon.switch_in_progress = false;
2771                 }
2772  set_ch_out:
2773                 /* The list of supported rates and rate mask can be different
2774                  * for each band; since the band may have changed, reset
2775                  * the rate mask to what mac80211 lists */
2776                 iwl_set_rate(priv);
2777         }
2778
2779         if (changed & (IEEE80211_CONF_CHANGE_PS |
2780                         IEEE80211_CONF_CHANGE_IDLE)) {
2781                 ret = iwl_power_update_mode(priv, false);
2782                 if (ret)
2783                         IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2784         }
2785
2786         if (changed & IEEE80211_CONF_CHANGE_POWER) {
2787                 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2788                         priv->tx_power_user_lmt, conf->power_level);
2789
2790                 iwl_set_tx_power(priv, conf->power_level, false);
2791         }
2792
2793         if (!iwl_is_ready(priv)) {
2794                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2795                 goto out;
2796         }
2797
2798         if (scan_active)
2799                 goto out;
2800
2801         if (memcmp(&priv->active_rxon,
2802                    &priv->staging_rxon, sizeof(priv->staging_rxon)))
2803                 iwlcore_commit_rxon(priv);
2804         else
2805                 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2806
2807
2808 out:
2809         IWL_DEBUG_MAC80211(priv, "leave\n");
2810         mutex_unlock(&priv->mutex);
2811         return ret;
2812 }
2813 EXPORT_SYMBOL(iwl_mac_config);
2814
2815 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2816                          struct ieee80211_tx_queue_stats *stats)
2817 {
2818         struct iwl_priv *priv = hw->priv;
2819         int i, avail;
2820         struct iwl_tx_queue *txq;
2821         struct iwl_queue *q;
2822         unsigned long flags;
2823
2824         IWL_DEBUG_MAC80211(priv, "enter\n");
2825
2826         if (!iwl_is_ready_rf(priv)) {
2827                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2828                 return -EIO;
2829         }
2830
2831         spin_lock_irqsave(&priv->lock, flags);
2832
2833         for (i = 0; i < AC_NUM; i++) {
2834                 txq = &priv->txq[i];
2835                 q = &txq->q;
2836                 avail = iwl_queue_space(q);
2837
2838                 stats[i].len = q->n_window - avail;
2839                 stats[i].limit = q->n_window - q->high_mark;
2840                 stats[i].count = q->n_window;
2841
2842         }
2843         spin_unlock_irqrestore(&priv->lock, flags);
2844
2845         IWL_DEBUG_MAC80211(priv, "leave\n");
2846
2847         return 0;
2848 }
2849 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2850
2851 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2852 {
2853         struct iwl_priv *priv = hw->priv;
2854         unsigned long flags;
2855
2856         mutex_lock(&priv->mutex);
2857         IWL_DEBUG_MAC80211(priv, "enter\n");
2858
2859         spin_lock_irqsave(&priv->lock, flags);
2860         memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2861         spin_unlock_irqrestore(&priv->lock, flags);
2862
2863         iwl_reset_qos(priv);
2864
2865         spin_lock_irqsave(&priv->lock, flags);
2866         priv->assoc_id = 0;
2867         priv->assoc_capability = 0;
2868         priv->assoc_station_added = 0;
2869
2870         /* new association get rid of ibss beacon skb */
2871         if (priv->ibss_beacon)
2872                 dev_kfree_skb(priv->ibss_beacon);
2873
2874         priv->ibss_beacon = NULL;
2875
2876         priv->beacon_int = priv->vif->bss_conf.beacon_int;
2877         priv->timestamp = 0;
2878         if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2879                 priv->beacon_int = 0;
2880
2881         spin_unlock_irqrestore(&priv->lock, flags);
2882
2883         if (!iwl_is_ready_rf(priv)) {
2884                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2885                 mutex_unlock(&priv->mutex);
2886                 return;
2887         }
2888
2889         /* we are restarting association process
2890          * clear RXON_FILTER_ASSOC_MSK bit
2891          */
2892         if (priv->iw_mode != NL80211_IFTYPE_AP) {
2893                 iwl_scan_cancel_timeout(priv, 100);
2894                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2895                 iwlcore_commit_rxon(priv);
2896         }
2897
2898         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2899                 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2900                 mutex_unlock(&priv->mutex);
2901                 return;
2902         }
2903
2904         iwl_set_rate(priv);
2905
2906         mutex_unlock(&priv->mutex);
2907
2908         IWL_DEBUG_MAC80211(priv, "leave\n");
2909 }
2910 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2911
2912 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2913 {
2914         if (!priv->txq)
2915                 priv->txq = kzalloc(
2916                         sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2917                         GFP_KERNEL);
2918         if (!priv->txq) {
2919                 IWL_ERR(priv, "Not enough memory for txq \n");
2920                 return -ENOMEM;
2921         }
2922         return 0;
2923 }
2924 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2925
2926 void iwl_free_txq_mem(struct iwl_priv *priv)
2927 {
2928         kfree(priv->txq);
2929         priv->txq = NULL;
2930 }
2931 EXPORT_SYMBOL(iwl_free_txq_mem);
2932
2933 int iwl_send_wimax_coex(struct iwl_priv *priv)
2934 {
2935         struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2936
2937         if (priv->cfg->support_wimax_coexist) {
2938                 /* UnMask wake up src at associated sleep */
2939                 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2940
2941                 /* UnMask wake up src at unassociated sleep */
2942                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2943                 memcpy(coex_cmd.sta_prio, cu_priorities,
2944                         sizeof(struct iwl_wimax_coex_event_entry) *
2945                          COEX_NUM_OF_EVENTS);
2946
2947                 /* enabling the coexistence feature */
2948                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2949
2950                 /* enabling the priorities tables */
2951                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2952         } else {
2953                 /* coexistence is disabled */
2954                 memset(&coex_cmd, 0, sizeof(coex_cmd));
2955         }
2956         return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2957                                 sizeof(coex_cmd), &coex_cmd);
2958 }
2959 EXPORT_SYMBOL(iwl_send_wimax_coex);
2960
2961 #ifdef CONFIG_IWLWIFI_DEBUGFS
2962
2963 #define IWL_TRAFFIC_DUMP_SIZE   (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2964
2965 void iwl_reset_traffic_log(struct iwl_priv *priv)
2966 {
2967         priv->tx_traffic_idx = 0;
2968         priv->rx_traffic_idx = 0;
2969         if (priv->tx_traffic)
2970                 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2971         if (priv->rx_traffic)
2972                 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2973 }
2974
2975 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2976 {
2977         u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2978
2979         if (iwl_debug_level & IWL_DL_TX) {
2980                 if (!priv->tx_traffic) {
2981                         priv->tx_traffic =
2982                                 kzalloc(traffic_size, GFP_KERNEL);
2983                         if (!priv->tx_traffic)
2984                                 return -ENOMEM;
2985                 }
2986         }
2987         if (iwl_debug_level & IWL_DL_RX) {
2988                 if (!priv->rx_traffic) {
2989                         priv->rx_traffic =
2990                                 kzalloc(traffic_size, GFP_KERNEL);
2991                         if (!priv->rx_traffic)
2992                                 return -ENOMEM;
2993                 }
2994         }
2995         iwl_reset_traffic_log(priv);
2996         return 0;
2997 }
2998 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2999
3000 void iwl_free_traffic_mem(struct iwl_priv *priv)
3001 {
3002         kfree(priv->tx_traffic);
3003         priv->tx_traffic = NULL;
3004
3005         kfree(priv->rx_traffic);
3006         priv->rx_traffic = NULL;
3007 }
3008 EXPORT_SYMBOL(iwl_free_traffic_mem);
3009
3010 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
3011                       u16 length, struct ieee80211_hdr *header)
3012 {
3013         __le16 fc;
3014         u16 len;
3015
3016         if (likely(!(iwl_debug_level & IWL_DL_TX)))
3017                 return;
3018
3019         if (!priv->tx_traffic)
3020                 return;
3021
3022         fc = header->frame_control;
3023         if (ieee80211_is_data(fc)) {
3024                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3025                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
3026                 memcpy((priv->tx_traffic +
3027                        (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3028                        header, len);
3029                 priv->tx_traffic_idx =
3030                         (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3031         }
3032 }
3033 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3034
3035 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3036                       u16 length, struct ieee80211_hdr *header)
3037 {
3038         __le16 fc;
3039         u16 len;
3040
3041         if (likely(!(iwl_debug_level & IWL_DL_RX)))
3042                 return;
3043
3044         if (!priv->rx_traffic)
3045                 return;
3046
3047         fc = header->frame_control;
3048         if (ieee80211_is_data(fc)) {
3049                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3050                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
3051                 memcpy((priv->rx_traffic +
3052                        (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3053                        header, len);
3054                 priv->rx_traffic_idx =
3055                         (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3056         }
3057 }
3058 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3059
3060 const char *get_mgmt_string(int cmd)
3061 {
3062         switch (cmd) {
3063                 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3064                 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3065                 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3066                 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3067                 IWL_CMD(MANAGEMENT_PROBE_REQ);
3068                 IWL_CMD(MANAGEMENT_PROBE_RESP);
3069                 IWL_CMD(MANAGEMENT_BEACON);
3070                 IWL_CMD(MANAGEMENT_ATIM);
3071                 IWL_CMD(MANAGEMENT_DISASSOC);
3072                 IWL_CMD(MANAGEMENT_AUTH);
3073                 IWL_CMD(MANAGEMENT_DEAUTH);
3074                 IWL_CMD(MANAGEMENT_ACTION);
3075         default:
3076                 return "UNKNOWN";
3077
3078         }
3079 }
3080
3081 const char *get_ctrl_string(int cmd)
3082 {
3083         switch (cmd) {
3084                 IWL_CMD(CONTROL_BACK_REQ);
3085                 IWL_CMD(CONTROL_BACK);
3086                 IWL_CMD(CONTROL_PSPOLL);
3087                 IWL_CMD(CONTROL_RTS);
3088                 IWL_CMD(CONTROL_CTS);
3089                 IWL_CMD(CONTROL_ACK);
3090                 IWL_CMD(CONTROL_CFEND);
3091                 IWL_CMD(CONTROL_CFENDACK);
3092         default:
3093                 return "UNKNOWN";
3094
3095         }
3096 }
3097
3098 void iwl_clear_traffic_stats(struct iwl_priv *priv)
3099 {
3100         memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3101         memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3102         priv->led_tpt = 0;
3103 }
3104
3105 /*
3106  * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3107  * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3108  * Use debugFs to display the rx/rx_statistics
3109  * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3110  * information will be recorded, but DATA pkt still will be recorded
3111  * for the reason of iwl_led.c need to control the led blinking based on
3112  * number of tx and rx data.
3113  *
3114  */
3115 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3116 {
3117         struct traffic_stats    *stats;
3118
3119         if (is_tx)
3120                 stats = &priv->tx_stats;
3121         else
3122                 stats = &priv->rx_stats;
3123
3124         if (ieee80211_is_mgmt(fc)) {
3125                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3126                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3127                         stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3128                         break;
3129                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3130                         stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3131                         break;
3132                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3133                         stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3134                         break;
3135                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3136                         stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3137                         break;
3138                 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3139                         stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3140                         break;
3141                 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3142                         stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3143                         break;
3144                 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3145                         stats->mgmt[MANAGEMENT_BEACON]++;
3146                         break;
3147                 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3148                         stats->mgmt[MANAGEMENT_ATIM]++;
3149                         break;
3150                 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3151                         stats->mgmt[MANAGEMENT_DISASSOC]++;
3152                         break;
3153                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3154                         stats->mgmt[MANAGEMENT_AUTH]++;
3155                         break;
3156                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3157                         stats->mgmt[MANAGEMENT_DEAUTH]++;
3158                         break;
3159                 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3160                         stats->mgmt[MANAGEMENT_ACTION]++;
3161                         break;
3162                 }
3163         } else if (ieee80211_is_ctl(fc)) {
3164                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3165                 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3166                         stats->ctrl[CONTROL_BACK_REQ]++;
3167                         break;
3168                 case cpu_to_le16(IEEE80211_STYPE_BACK):
3169                         stats->ctrl[CONTROL_BACK]++;
3170                         break;
3171                 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3172                         stats->ctrl[CONTROL_PSPOLL]++;
3173                         break;
3174                 case cpu_to_le16(IEEE80211_STYPE_RTS):
3175                         stats->ctrl[CONTROL_RTS]++;
3176                         break;
3177                 case cpu_to_le16(IEEE80211_STYPE_CTS):
3178                         stats->ctrl[CONTROL_CTS]++;
3179                         break;
3180                 case cpu_to_le16(IEEE80211_STYPE_ACK):
3181                         stats->ctrl[CONTROL_ACK]++;
3182                         break;
3183                 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3184                         stats->ctrl[CONTROL_CFEND]++;
3185                         break;
3186                 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3187                         stats->ctrl[CONTROL_CFENDACK]++;
3188                         break;
3189                 }
3190         } else {
3191                 /* data */
3192                 stats->data_cnt++;
3193                 stats->data_bytes += len;
3194         }
3195         iwl_leds_background(priv);
3196 }
3197 EXPORT_SYMBOL(iwl_update_stats);
3198 #endif
3199
3200 const static char *get_csr_string(int cmd)
3201 {
3202         switch (cmd) {
3203                 IWL_CMD(CSR_HW_IF_CONFIG_REG);
3204                 IWL_CMD(CSR_INT_COALESCING);
3205                 IWL_CMD(CSR_INT);
3206                 IWL_CMD(CSR_INT_MASK);
3207                 IWL_CMD(CSR_FH_INT_STATUS);
3208                 IWL_CMD(CSR_GPIO_IN);
3209                 IWL_CMD(CSR_RESET);
3210                 IWL_CMD(CSR_GP_CNTRL);
3211                 IWL_CMD(CSR_HW_REV);
3212                 IWL_CMD(CSR_EEPROM_REG);
3213                 IWL_CMD(CSR_EEPROM_GP);
3214                 IWL_CMD(CSR_OTP_GP_REG);
3215                 IWL_CMD(CSR_GIO_REG);
3216                 IWL_CMD(CSR_GP_UCODE_REG);
3217                 IWL_CMD(CSR_GP_DRIVER_REG);
3218                 IWL_CMD(CSR_UCODE_DRV_GP1);
3219                 IWL_CMD(CSR_UCODE_DRV_GP2);
3220                 IWL_CMD(CSR_LED_REG);
3221                 IWL_CMD(CSR_DRAM_INT_TBL_REG);
3222                 IWL_CMD(CSR_GIO_CHICKEN_BITS);
3223                 IWL_CMD(CSR_ANA_PLL_CFG);
3224                 IWL_CMD(CSR_HW_REV_WA_REG);
3225                 IWL_CMD(CSR_DBG_HPET_MEM_REG);
3226         default:
3227                 return "UNKNOWN";
3228
3229         }
3230 }
3231
3232 void iwl_dump_csr(struct iwl_priv *priv)
3233 {
3234         int i;
3235         u32 csr_tbl[] = {
3236                 CSR_HW_IF_CONFIG_REG,
3237                 CSR_INT_COALESCING,
3238                 CSR_INT,
3239                 CSR_INT_MASK,
3240                 CSR_FH_INT_STATUS,
3241                 CSR_GPIO_IN,
3242                 CSR_RESET,
3243                 CSR_GP_CNTRL,
3244                 CSR_HW_REV,
3245                 CSR_EEPROM_REG,
3246                 CSR_EEPROM_GP,
3247                 CSR_OTP_GP_REG,
3248                 CSR_GIO_REG,
3249                 CSR_GP_UCODE_REG,
3250                 CSR_GP_DRIVER_REG,
3251                 CSR_UCODE_DRV_GP1,
3252                 CSR_UCODE_DRV_GP2,
3253                 CSR_LED_REG,
3254                 CSR_DRAM_INT_TBL_REG,
3255                 CSR_GIO_CHICKEN_BITS,
3256                 CSR_ANA_PLL_CFG,
3257                 CSR_HW_REV_WA_REG,
3258                 CSR_DBG_HPET_MEM_REG
3259         };
3260         IWL_ERR(priv, "CSR values:\n");
3261         IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
3262                 "CSR_INT_PERIODIC_REG)\n");
3263         for (i = 0; i <  ARRAY_SIZE(csr_tbl); i++) {
3264                 IWL_ERR(priv, "  %25s: 0X%08x\n",
3265                         get_csr_string(csr_tbl[i]),
3266                         iwl_read32(priv, csr_tbl[i]));
3267         }
3268 }
3269 EXPORT_SYMBOL(iwl_dump_csr);
3270
3271 #ifdef CONFIG_PM
3272
3273 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3274 {
3275         struct iwl_priv *priv = pci_get_drvdata(pdev);
3276
3277         /*
3278          * This function is called when system goes into suspend state
3279          * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3280          * first but since iwl_mac_stop() has no knowledge of who the caller is,
3281          * it will not call apm_ops.stop() to stop the DMA operation.
3282          * Calling apm_ops.stop here to make sure we stop the DMA.
3283          */
3284         priv->cfg->ops->lib->apm_ops.stop(priv);
3285
3286         pci_save_state(pdev);
3287         pci_disable_device(pdev);
3288         pci_set_power_state(pdev, PCI_D3hot);
3289
3290         return 0;
3291 }
3292 EXPORT_SYMBOL(iwl_pci_suspend);
3293
3294 int iwl_pci_resume(struct pci_dev *pdev)
3295 {
3296         struct iwl_priv *priv = pci_get_drvdata(pdev);
3297         int ret;
3298
3299         pci_set_power_state(pdev, PCI_D0);
3300         ret = pci_enable_device(pdev);
3301         if (ret)
3302                 return ret;
3303         pci_restore_state(pdev);
3304         iwl_enable_interrupts(priv);
3305
3306         return 0;
3307 }
3308 EXPORT_SYMBOL(iwl_pci_resume);
3309
3310 #endif /* CONFIG_PM */