iwlagn: use direct call for led functions
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-agn-calib.h"
61 #include "iwl-agn.h"
62
63
64 /******************************************************************************
65  *
66  * module boiler plate
67  *
68  ******************************************************************************/
69
70 /*
71  * module name, copyright, version, etc.
72  */
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
74
75 #ifdef CONFIG_IWLWIFI_DEBUG
76 #define VD "d"
77 #else
78 #define VD
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89 static int iwlagn_ant_coupling;
90 static bool iwlagn_bt_ch_announce = 1;
91
92 void iwl_update_chain_flags(struct iwl_priv *priv)
93 {
94         struct iwl_rxon_context *ctx;
95
96         if (priv->cfg->ops->hcmd->set_rxon_chain) {
97                 for_each_context(priv, ctx) {
98                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
99                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
100                                 iwlcore_commit_rxon(priv, ctx);
101                 }
102         }
103 }
104
105 static void iwl_clear_free_frames(struct iwl_priv *priv)
106 {
107         struct list_head *element;
108
109         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
110                        priv->frames_count);
111
112         while (!list_empty(&priv->free_frames)) {
113                 element = priv->free_frames.next;
114                 list_del(element);
115                 kfree(list_entry(element, struct iwl_frame, list));
116                 priv->frames_count--;
117         }
118
119         if (priv->frames_count) {
120                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
121                             priv->frames_count);
122                 priv->frames_count = 0;
123         }
124 }
125
126 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
127 {
128         struct iwl_frame *frame;
129         struct list_head *element;
130         if (list_empty(&priv->free_frames)) {
131                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
132                 if (!frame) {
133                         IWL_ERR(priv, "Could not allocate frame!\n");
134                         return NULL;
135                 }
136
137                 priv->frames_count++;
138                 return frame;
139         }
140
141         element = priv->free_frames.next;
142         list_del(element);
143         return list_entry(element, struct iwl_frame, list);
144 }
145
146 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
147 {
148         memset(frame, 0, sizeof(*frame));
149         list_add(&frame->list, &priv->free_frames);
150 }
151
152 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
153                                  struct ieee80211_hdr *hdr,
154                                  int left)
155 {
156         lockdep_assert_held(&priv->mutex);
157
158         if (!priv->beacon_skb)
159                 return 0;
160
161         if (priv->beacon_skb->len > left)
162                 return 0;
163
164         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
165
166         return priv->beacon_skb->len;
167 }
168
169 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
170 static void iwl_set_beacon_tim(struct iwl_priv *priv,
171                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
172                                u8 *beacon, u32 frame_size)
173 {
174         u16 tim_idx;
175         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
176
177         /*
178          * The index is relative to frame start but we start looking at the
179          * variable-length part of the beacon.
180          */
181         tim_idx = mgmt->u.beacon.variable - beacon;
182
183         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
184         while ((tim_idx < (frame_size - 2)) &&
185                         (beacon[tim_idx] != WLAN_EID_TIM))
186                 tim_idx += beacon[tim_idx+1] + 2;
187
188         /* If TIM field was found, set variables */
189         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
190                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
191                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
192         } else
193                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
194 }
195
196 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
197                                        struct iwl_frame *frame)
198 {
199         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
200         u32 frame_size;
201         u32 rate_flags;
202         u32 rate;
203         /*
204          * We have to set up the TX command, the TX Beacon command, and the
205          * beacon contents.
206          */
207
208         lockdep_assert_held(&priv->mutex);
209
210         if (!priv->beacon_ctx) {
211                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
212                 return 0;
213         }
214
215         /* Initialize memory */
216         tx_beacon_cmd = &frame->u.beacon;
217         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
218
219         /* Set up TX beacon contents */
220         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
221                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
222         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
223                 return 0;
224         if (!frame_size)
225                 return 0;
226
227         /* Set up TX command fields */
228         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
229         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
230         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
231         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
232                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
233
234         /* Set up TX beacon command fields */
235         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
236                            frame_size);
237
238         /* Set up packet rate and flags */
239         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
240         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
241                                               priv->hw_params.valid_tx_ant);
242         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
243         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
244                 rate_flags |= RATE_MCS_CCK_MSK;
245         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
246                         rate_flags);
247
248         return sizeof(*tx_beacon_cmd) + frame_size;
249 }
250
251 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
252 {
253         struct iwl_frame *frame;
254         unsigned int frame_size;
255         int rc;
256
257         frame = iwl_get_free_frame(priv);
258         if (!frame) {
259                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
260                           "command.\n");
261                 return -ENOMEM;
262         }
263
264         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
265         if (!frame_size) {
266                 IWL_ERR(priv, "Error configuring the beacon command\n");
267                 iwl_free_frame(priv, frame);
268                 return -EINVAL;
269         }
270
271         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
272                               &frame->u.cmd[0]);
273
274         iwl_free_frame(priv, frame);
275
276         return rc;
277 }
278
279 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
280 {
281         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
282
283         dma_addr_t addr = get_unaligned_le32(&tb->lo);
284         if (sizeof(dma_addr_t) > sizeof(u32))
285                 addr |=
286                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
287
288         return addr;
289 }
290
291 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
292 {
293         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
294
295         return le16_to_cpu(tb->hi_n_len) >> 4;
296 }
297
298 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
299                                   dma_addr_t addr, u16 len)
300 {
301         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
302         u16 hi_n_len = len << 4;
303
304         put_unaligned_le32(addr, &tb->lo);
305         if (sizeof(dma_addr_t) > sizeof(u32))
306                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
307
308         tb->hi_n_len = cpu_to_le16(hi_n_len);
309
310         tfd->num_tbs = idx + 1;
311 }
312
313 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
314 {
315         return tfd->num_tbs & 0x1f;
316 }
317
318 /**
319  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
320  * @priv - driver private data
321  * @txq - tx queue
322  *
323  * Does NOT advance any TFD circular buffer read/write indexes
324  * Does NOT free the TFD itself (which is within circular buffer)
325  */
326 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
327 {
328         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
329         struct iwl_tfd *tfd;
330         struct pci_dev *dev = priv->pci_dev;
331         int index = txq->q.read_ptr;
332         int i;
333         int num_tbs;
334
335         tfd = &tfd_tmp[index];
336
337         /* Sanity check on number of chunks */
338         num_tbs = iwl_tfd_get_num_tbs(tfd);
339
340         if (num_tbs >= IWL_NUM_OF_TBS) {
341                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
342                 /* @todo issue fatal error, it is quite serious situation */
343                 return;
344         }
345
346         /* Unmap tx_cmd */
347         if (num_tbs)
348                 pci_unmap_single(dev,
349                                 dma_unmap_addr(&txq->meta[index], mapping),
350                                 dma_unmap_len(&txq->meta[index], len),
351                                 PCI_DMA_BIDIRECTIONAL);
352
353         /* Unmap chunks, if any. */
354         for (i = 1; i < num_tbs; i++)
355                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
356                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
357
358         /* free SKB */
359         if (txq->txb) {
360                 struct sk_buff *skb;
361
362                 skb = txq->txb[txq->q.read_ptr].skb;
363
364                 /* can be called from irqs-disabled context */
365                 if (skb) {
366                         dev_kfree_skb_any(skb);
367                         txq->txb[txq->q.read_ptr].skb = NULL;
368                 }
369         }
370 }
371
372 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
373                                  struct iwl_tx_queue *txq,
374                                  dma_addr_t addr, u16 len,
375                                  u8 reset, u8 pad)
376 {
377         struct iwl_queue *q;
378         struct iwl_tfd *tfd, *tfd_tmp;
379         u32 num_tbs;
380
381         q = &txq->q;
382         tfd_tmp = (struct iwl_tfd *)txq->tfds;
383         tfd = &tfd_tmp[q->write_ptr];
384
385         if (reset)
386                 memset(tfd, 0, sizeof(*tfd));
387
388         num_tbs = iwl_tfd_get_num_tbs(tfd);
389
390         /* Each TFD can point to a maximum 20 Tx buffers */
391         if (num_tbs >= IWL_NUM_OF_TBS) {
392                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
393                           IWL_NUM_OF_TBS);
394                 return -EINVAL;
395         }
396
397         BUG_ON(addr & ~DMA_BIT_MASK(36));
398         if (unlikely(addr & ~IWL_TX_DMA_MASK))
399                 IWL_ERR(priv, "Unaligned address = %llx\n",
400                           (unsigned long long)addr);
401
402         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
403
404         return 0;
405 }
406
407 /*
408  * Tell nic where to find circular buffer of Tx Frame Descriptors for
409  * given Tx queue, and enable the DMA channel used for that queue.
410  *
411  * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
412  * channels supported in hardware.
413  */
414 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
415                          struct iwl_tx_queue *txq)
416 {
417         int txq_id = txq->q.id;
418
419         /* Circular buffer (TFD queue in DRAM) physical base address */
420         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
421                              txq->q.dma_addr >> 8);
422
423         return 0;
424 }
425
426 static void iwl_bg_beacon_update(struct work_struct *work)
427 {
428         struct iwl_priv *priv =
429                 container_of(work, struct iwl_priv, beacon_update);
430         struct sk_buff *beacon;
431
432         mutex_lock(&priv->mutex);
433         if (!priv->beacon_ctx) {
434                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
435                 goto out;
436         }
437
438         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
439                 /*
440                  * The ucode will send beacon notifications even in
441                  * IBSS mode, but we don't want to process them. But
442                  * we need to defer the type check to here due to
443                  * requiring locking around the beacon_ctx access.
444                  */
445                 goto out;
446         }
447
448         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
449         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
450         if (!beacon) {
451                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
452                 goto out;
453         }
454
455         /* new beacon skb is allocated every time; dispose previous.*/
456         dev_kfree_skb(priv->beacon_skb);
457
458         priv->beacon_skb = beacon;
459
460         iwlagn_send_beacon_cmd(priv);
461  out:
462         mutex_unlock(&priv->mutex);
463 }
464
465 static void iwl_bg_bt_runtime_config(struct work_struct *work)
466 {
467         struct iwl_priv *priv =
468                 container_of(work, struct iwl_priv, bt_runtime_config);
469
470         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
471                 return;
472
473         /* dont send host command if rf-kill is on */
474         if (!iwl_is_ready_rf(priv))
475                 return;
476         priv->cfg->ops->hcmd->send_bt_config(priv);
477 }
478
479 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
480 {
481         struct iwl_priv *priv =
482                 container_of(work, struct iwl_priv, bt_full_concurrency);
483         struct iwl_rxon_context *ctx;
484
485         mutex_lock(&priv->mutex);
486
487         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
488                 goto out;
489
490         /* dont send host command if rf-kill is on */
491         if (!iwl_is_ready_rf(priv))
492                 goto out;
493
494         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
495                        priv->bt_full_concurrent ?
496                        "full concurrency" : "3-wire");
497
498         /*
499          * LQ & RXON updated cmds must be sent before BT Config cmd
500          * to avoid 3-wire collisions
501          */
502         for_each_context(priv, ctx) {
503                 if (priv->cfg->ops->hcmd->set_rxon_chain)
504                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
505                 iwlcore_commit_rxon(priv, ctx);
506         }
507
508         priv->cfg->ops->hcmd->send_bt_config(priv);
509 out:
510         mutex_unlock(&priv->mutex);
511 }
512
513 /**
514  * iwl_bg_statistics_periodic - Timer callback to queue statistics
515  *
516  * This callback is provided in order to send a statistics request.
517  *
518  * This timer function is continually reset to execute within
519  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
520  * was received.  We need to ensure we receive the statistics in order
521  * to update the temperature used for calibrating the TXPOWER.
522  */
523 static void iwl_bg_statistics_periodic(unsigned long data)
524 {
525         struct iwl_priv *priv = (struct iwl_priv *)data;
526
527         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
528                 return;
529
530         /* dont send host command if rf-kill is on */
531         if (!iwl_is_ready_rf(priv))
532                 return;
533
534         iwl_send_statistics_request(priv, CMD_ASYNC, false);
535 }
536
537
538 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
539                                         u32 start_idx, u32 num_events,
540                                         u32 mode)
541 {
542         u32 i;
543         u32 ptr;        /* SRAM byte address of log data */
544         u32 ev, time, data; /* event log data */
545         unsigned long reg_flags;
546
547         if (mode == 0)
548                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
549         else
550                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
551
552         /* Make sure device is powered up for SRAM reads */
553         spin_lock_irqsave(&priv->reg_lock, reg_flags);
554         if (iwl_grab_nic_access(priv)) {
555                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
556                 return;
557         }
558
559         /* Set starting address; reads will auto-increment */
560         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
561         rmb();
562
563         /*
564          * "time" is actually "data" for mode 0 (no timestamp).
565          * place event id # at far right for easier visual parsing.
566          */
567         for (i = 0; i < num_events; i++) {
568                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
569                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
570                 if (mode == 0) {
571                         trace_iwlwifi_dev_ucode_cont_event(priv,
572                                                         0, time, ev);
573                 } else {
574                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
575                         trace_iwlwifi_dev_ucode_cont_event(priv,
576                                                 time, data, ev);
577                 }
578         }
579         /* Allow device to power down */
580         iwl_release_nic_access(priv);
581         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
582 }
583
584 static void iwl_continuous_event_trace(struct iwl_priv *priv)
585 {
586         u32 capacity;   /* event log capacity in # entries */
587         u32 base;       /* SRAM byte address of event log header */
588         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
589         u32 num_wraps;  /* # times uCode wrapped to top of log */
590         u32 next_entry; /* index of next entry to be written by uCode */
591
592         base = priv->device_pointers.error_event_table;
593         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
594                 capacity = iwl_read_targ_mem(priv, base);
595                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
596                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
597                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
598         } else
599                 return;
600
601         if (num_wraps == priv->event_log.num_wraps) {
602                 iwl_print_cont_event_trace(priv,
603                                        base, priv->event_log.next_entry,
604                                        next_entry - priv->event_log.next_entry,
605                                        mode);
606                 priv->event_log.non_wraps_count++;
607         } else {
608                 if ((num_wraps - priv->event_log.num_wraps) > 1)
609                         priv->event_log.wraps_more_count++;
610                 else
611                         priv->event_log.wraps_once_count++;
612                 trace_iwlwifi_dev_ucode_wrap_event(priv,
613                                 num_wraps - priv->event_log.num_wraps,
614                                 next_entry, priv->event_log.next_entry);
615                 if (next_entry < priv->event_log.next_entry) {
616                         iwl_print_cont_event_trace(priv, base,
617                                priv->event_log.next_entry,
618                                capacity - priv->event_log.next_entry,
619                                mode);
620
621                         iwl_print_cont_event_trace(priv, base, 0,
622                                 next_entry, mode);
623                 } else {
624                         iwl_print_cont_event_trace(priv, base,
625                                next_entry, capacity - next_entry,
626                                mode);
627
628                         iwl_print_cont_event_trace(priv, base, 0,
629                                 next_entry, mode);
630                 }
631         }
632         priv->event_log.num_wraps = num_wraps;
633         priv->event_log.next_entry = next_entry;
634 }
635
636 /**
637  * iwl_bg_ucode_trace - Timer callback to log ucode event
638  *
639  * The timer is continually set to execute every
640  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
641  * this function is to perform continuous uCode event logging operation
642  * if enabled
643  */
644 static void iwl_bg_ucode_trace(unsigned long data)
645 {
646         struct iwl_priv *priv = (struct iwl_priv *)data;
647
648         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
649                 return;
650
651         if (priv->event_log.ucode_trace) {
652                 iwl_continuous_event_trace(priv);
653                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
654                 mod_timer(&priv->ucode_trace,
655                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
656         }
657 }
658
659 static void iwl_bg_tx_flush(struct work_struct *work)
660 {
661         struct iwl_priv *priv =
662                 container_of(work, struct iwl_priv, tx_flush);
663
664         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
665                 return;
666
667         /* do nothing if rf-kill is on */
668         if (!iwl_is_ready_rf(priv))
669                 return;
670
671         if (priv->cfg->ops->lib->txfifo_flush) {
672                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
673                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
674         }
675 }
676
677 /**
678  * iwl_rx_handle - Main entry function for receiving responses from uCode
679  *
680  * Uses the priv->rx_handlers callback function array to invoke
681  * the appropriate handlers, including command responses,
682  * frame-received notifications, and other notifications.
683  */
684 static void iwl_rx_handle(struct iwl_priv *priv)
685 {
686         struct iwl_rx_mem_buffer *rxb;
687         struct iwl_rx_packet *pkt;
688         struct iwl_rx_queue *rxq = &priv->rxq;
689         u32 r, i;
690         int reclaim;
691         unsigned long flags;
692         u8 fill_rx = 0;
693         u32 count = 8;
694         int total_empty;
695
696         /* uCode's read index (stored in shared DRAM) indicates the last Rx
697          * buffer that the driver may process (last buffer filled by ucode). */
698         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
699         i = rxq->read;
700
701         /* Rx interrupt, but nothing sent from uCode */
702         if (i == r)
703                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
704
705         /* calculate total frames need to be restock after handling RX */
706         total_empty = r - rxq->write_actual;
707         if (total_empty < 0)
708                 total_empty += RX_QUEUE_SIZE;
709
710         if (total_empty > (RX_QUEUE_SIZE / 2))
711                 fill_rx = 1;
712
713         while (i != r) {
714                 int len;
715
716                 rxb = rxq->queue[i];
717
718                 /* If an RXB doesn't have a Rx queue slot associated with it,
719                  * then a bug has been introduced in the queue refilling
720                  * routines -- catch it here */
721                 BUG_ON(rxb == NULL);
722
723                 rxq->queue[i] = NULL;
724
725                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
726                                PAGE_SIZE << priv->hw_params.rx_page_order,
727                                PCI_DMA_FROMDEVICE);
728                 pkt = rxb_addr(rxb);
729
730                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
731                 len += sizeof(u32); /* account for status word */
732                 trace_iwlwifi_dev_rx(priv, pkt, len);
733
734                 /* Reclaim a command buffer only if this packet is a response
735                  *   to a (driver-originated) command.
736                  * If the packet (e.g. Rx frame) originated from uCode,
737                  *   there is no command buffer to reclaim.
738                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
739                  *   but apparently a few don't get set; catch them here. */
740                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
741                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
742                         (pkt->hdr.cmd != REPLY_RX) &&
743                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
744                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
745                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
746                         (pkt->hdr.cmd != REPLY_TX);
747
748                 /*
749                  * Do the notification wait before RX handlers so
750                  * even if the RX handler consumes the RXB we have
751                  * access to it in the notification wait entry.
752                  */
753                 if (!list_empty(&priv->_agn.notif_waits)) {
754                         struct iwl_notification_wait *w;
755
756                         spin_lock(&priv->_agn.notif_wait_lock);
757                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
758                                 if (w->cmd == pkt->hdr.cmd) {
759                                         w->triggered = true;
760                                         if (w->fn)
761                                                 w->fn(priv, pkt);
762                                 }
763                         }
764                         spin_unlock(&priv->_agn.notif_wait_lock);
765
766                         wake_up_all(&priv->_agn.notif_waitq);
767                 }
768
769                 /* Based on type of command response or notification,
770                  *   handle those that need handling via function in
771                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
772                 if (priv->rx_handlers[pkt->hdr.cmd]) {
773                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
774                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
775                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
776                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
777                 } else {
778                         /* No handling needed */
779                         IWL_DEBUG_RX(priv,
780                                 "r %d i %d No handler needed for %s, 0x%02x\n",
781                                 r, i, get_cmd_string(pkt->hdr.cmd),
782                                 pkt->hdr.cmd);
783                 }
784
785                 /*
786                  * XXX: After here, we should always check rxb->page
787                  * against NULL before touching it or its virtual
788                  * memory (pkt). Because some rx_handler might have
789                  * already taken or freed the pages.
790                  */
791
792                 if (reclaim) {
793                         /* Invoke any callbacks, transfer the buffer to caller,
794                          * and fire off the (possibly) blocking iwl_send_cmd()
795                          * as we reclaim the driver command queue */
796                         if (rxb->page)
797                                 iwl_tx_cmd_complete(priv, rxb);
798                         else
799                                 IWL_WARN(priv, "Claim null rxb?\n");
800                 }
801
802                 /* Reuse the page if possible. For notification packets and
803                  * SKBs that fail to Rx correctly, add them back into the
804                  * rx_free list for reuse later. */
805                 spin_lock_irqsave(&rxq->lock, flags);
806                 if (rxb->page != NULL) {
807                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
808                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
809                                 PCI_DMA_FROMDEVICE);
810                         list_add_tail(&rxb->list, &rxq->rx_free);
811                         rxq->free_count++;
812                 } else
813                         list_add_tail(&rxb->list, &rxq->rx_used);
814
815                 spin_unlock_irqrestore(&rxq->lock, flags);
816
817                 i = (i + 1) & RX_QUEUE_MASK;
818                 /* If there are a lot of unused frames,
819                  * restock the Rx queue so ucode wont assert. */
820                 if (fill_rx) {
821                         count++;
822                         if (count >= 8) {
823                                 rxq->read = i;
824                                 iwlagn_rx_replenish_now(priv);
825                                 count = 0;
826                         }
827                 }
828         }
829
830         /* Backtrack one entry */
831         rxq->read = i;
832         if (fill_rx)
833                 iwlagn_rx_replenish_now(priv);
834         else
835                 iwlagn_rx_queue_restock(priv);
836 }
837
838 /* call this function to flush any scheduled tasklet */
839 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
840 {
841         /* wait to make sure we flush pending tasklet*/
842         synchronize_irq(priv->pci_dev->irq);
843         tasklet_kill(&priv->irq_tasklet);
844 }
845
846 /* tasklet for iwlagn interrupt */
847 static void iwl_irq_tasklet(struct iwl_priv *priv)
848 {
849         u32 inta = 0;
850         u32 handled = 0;
851         unsigned long flags;
852         u32 i;
853 #ifdef CONFIG_IWLWIFI_DEBUG
854         u32 inta_mask;
855 #endif
856
857         spin_lock_irqsave(&priv->lock, flags);
858
859         /* Ack/clear/reset pending uCode interrupts.
860          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
861          */
862         /* There is a hardware bug in the interrupt mask function that some
863          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
864          * they are disabled in the CSR_INT_MASK register. Furthermore the
865          * ICT interrupt handling mechanism has another bug that might cause
866          * these unmasked interrupts fail to be detected. We workaround the
867          * hardware bugs here by ACKing all the possible interrupts so that
868          * interrupt coalescing can still be achieved.
869          */
870         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
871
872         inta = priv->_agn.inta;
873
874 #ifdef CONFIG_IWLWIFI_DEBUG
875         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
876                 /* just for debug */
877                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
878                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
879                                 inta, inta_mask);
880         }
881 #endif
882
883         spin_unlock_irqrestore(&priv->lock, flags);
884
885         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
886         priv->_agn.inta = 0;
887
888         /* Now service all interrupt bits discovered above. */
889         if (inta & CSR_INT_BIT_HW_ERR) {
890                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
891
892                 /* Tell the device to stop sending interrupts */
893                 iwl_disable_interrupts(priv);
894
895                 priv->isr_stats.hw++;
896                 iwl_irq_handle_error(priv);
897
898                 handled |= CSR_INT_BIT_HW_ERR;
899
900                 return;
901         }
902
903 #ifdef CONFIG_IWLWIFI_DEBUG
904         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
905                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
906                 if (inta & CSR_INT_BIT_SCD) {
907                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
908                                       "the frame/frames.\n");
909                         priv->isr_stats.sch++;
910                 }
911
912                 /* Alive notification via Rx interrupt will do the real work */
913                 if (inta & CSR_INT_BIT_ALIVE) {
914                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
915                         priv->isr_stats.alive++;
916                 }
917         }
918 #endif
919         /* Safely ignore these bits for debug checks below */
920         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
921
922         /* HW RF KILL switch toggled */
923         if (inta & CSR_INT_BIT_RF_KILL) {
924                 int hw_rf_kill = 0;
925                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
926                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
927                         hw_rf_kill = 1;
928
929                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
930                                 hw_rf_kill ? "disable radio" : "enable radio");
931
932                 priv->isr_stats.rfkill++;
933
934                 /* driver only loads ucode once setting the interface up.
935                  * the driver allows loading the ucode even if the radio
936                  * is killed. Hence update the killswitch state here. The
937                  * rfkill handler will care about restarting if needed.
938                  */
939                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
940                         if (hw_rf_kill)
941                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
942                         else
943                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
944                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
945                 }
946
947                 handled |= CSR_INT_BIT_RF_KILL;
948         }
949
950         /* Chip got too hot and stopped itself */
951         if (inta & CSR_INT_BIT_CT_KILL) {
952                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
953                 priv->isr_stats.ctkill++;
954                 handled |= CSR_INT_BIT_CT_KILL;
955         }
956
957         /* Error detected by uCode */
958         if (inta & CSR_INT_BIT_SW_ERR) {
959                 IWL_ERR(priv, "Microcode SW error detected. "
960                         " Restarting 0x%X.\n", inta);
961                 priv->isr_stats.sw++;
962                 iwl_irq_handle_error(priv);
963                 handled |= CSR_INT_BIT_SW_ERR;
964         }
965
966         /* uCode wakes up after power-down sleep */
967         if (inta & CSR_INT_BIT_WAKEUP) {
968                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
969                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
970                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
971                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
972
973                 priv->isr_stats.wakeup++;
974
975                 handled |= CSR_INT_BIT_WAKEUP;
976         }
977
978         /* All uCode command responses, including Tx command responses,
979          * Rx "responses" (frame-received notification), and other
980          * notifications from uCode come through here*/
981         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
982                         CSR_INT_BIT_RX_PERIODIC)) {
983                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
984                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
985                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
986                         iwl_write32(priv, CSR_FH_INT_STATUS,
987                                         CSR_FH_INT_RX_MASK);
988                 }
989                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
990                         handled |= CSR_INT_BIT_RX_PERIODIC;
991                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
992                 }
993                 /* Sending RX interrupt require many steps to be done in the
994                  * the device:
995                  * 1- write interrupt to current index in ICT table.
996                  * 2- dma RX frame.
997                  * 3- update RX shared data to indicate last write index.
998                  * 4- send interrupt.
999                  * This could lead to RX race, driver could receive RX interrupt
1000                  * but the shared data changes does not reflect this;
1001                  * periodic interrupt will detect any dangling Rx activity.
1002                  */
1003
1004                 /* Disable periodic interrupt; we use it as just a one-shot. */
1005                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1006                             CSR_INT_PERIODIC_DIS);
1007                 iwl_rx_handle(priv);
1008
1009                 /*
1010                  * Enable periodic interrupt in 8 msec only if we received
1011                  * real RX interrupt (instead of just periodic int), to catch
1012                  * any dangling Rx interrupt.  If it was just the periodic
1013                  * interrupt, there was no dangling Rx activity, and no need
1014                  * to extend the periodic interrupt; one-shot is enough.
1015                  */
1016                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1017                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1018                                     CSR_INT_PERIODIC_ENA);
1019
1020                 priv->isr_stats.rx++;
1021         }
1022
1023         /* This "Tx" DMA channel is used only for loading uCode */
1024         if (inta & CSR_INT_BIT_FH_TX) {
1025                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1026                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1027                 priv->isr_stats.tx++;
1028                 handled |= CSR_INT_BIT_FH_TX;
1029                 /* Wake up uCode load routine, now that load is complete */
1030                 priv->ucode_write_complete = 1;
1031                 wake_up_interruptible(&priv->wait_command_queue);
1032         }
1033
1034         if (inta & ~handled) {
1035                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1036                 priv->isr_stats.unhandled++;
1037         }
1038
1039         if (inta & ~(priv->inta_mask)) {
1040                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1041                          inta & ~priv->inta_mask);
1042         }
1043
1044         /* Re-enable all interrupts */
1045         /* only Re-enable if disabled by irq */
1046         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1047                 iwl_enable_interrupts(priv);
1048         /* Re-enable RF_KILL if it occurred */
1049         else if (handled & CSR_INT_BIT_RF_KILL)
1050                 iwl_enable_rfkill_int(priv);
1051 }
1052
1053 /*****************************************************************************
1054  *
1055  * sysfs attributes
1056  *
1057  *****************************************************************************/
1058
1059 #ifdef CONFIG_IWLWIFI_DEBUG
1060
1061 /*
1062  * The following adds a new attribute to the sysfs representation
1063  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1064  * used for controlling the debug level.
1065  *
1066  * See the level definitions in iwl for details.
1067  *
1068  * The debug_level being managed using sysfs below is a per device debug
1069  * level that is used instead of the global debug level if it (the per
1070  * device debug level) is set.
1071  */
1072 static ssize_t show_debug_level(struct device *d,
1073                                 struct device_attribute *attr, char *buf)
1074 {
1075         struct iwl_priv *priv = dev_get_drvdata(d);
1076         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1077 }
1078 static ssize_t store_debug_level(struct device *d,
1079                                 struct device_attribute *attr,
1080                                  const char *buf, size_t count)
1081 {
1082         struct iwl_priv *priv = dev_get_drvdata(d);
1083         unsigned long val;
1084         int ret;
1085
1086         ret = strict_strtoul(buf, 0, &val);
1087         if (ret)
1088                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1089         else {
1090                 priv->debug_level = val;
1091                 if (iwl_alloc_traffic_mem(priv))
1092                         IWL_ERR(priv,
1093                                 "Not enough memory to generate traffic log\n");
1094         }
1095         return strnlen(buf, count);
1096 }
1097
1098 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1099                         show_debug_level, store_debug_level);
1100
1101
1102 #endif /* CONFIG_IWLWIFI_DEBUG */
1103
1104
1105 static ssize_t show_temperature(struct device *d,
1106                                 struct device_attribute *attr, char *buf)
1107 {
1108         struct iwl_priv *priv = dev_get_drvdata(d);
1109
1110         if (!iwl_is_alive(priv))
1111                 return -EAGAIN;
1112
1113         return sprintf(buf, "%d\n", priv->temperature);
1114 }
1115
1116 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1117
1118 static ssize_t show_tx_power(struct device *d,
1119                              struct device_attribute *attr, char *buf)
1120 {
1121         struct iwl_priv *priv = dev_get_drvdata(d);
1122
1123         if (!iwl_is_ready_rf(priv))
1124                 return sprintf(buf, "off\n");
1125         else
1126                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1127 }
1128
1129 static ssize_t store_tx_power(struct device *d,
1130                               struct device_attribute *attr,
1131                               const char *buf, size_t count)
1132 {
1133         struct iwl_priv *priv = dev_get_drvdata(d);
1134         unsigned long val;
1135         int ret;
1136
1137         ret = strict_strtoul(buf, 10, &val);
1138         if (ret)
1139                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1140         else {
1141                 ret = iwl_set_tx_power(priv, val, false);
1142                 if (ret)
1143                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1144                                 ret);
1145                 else
1146                         ret = count;
1147         }
1148         return ret;
1149 }
1150
1151 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1152
1153 static struct attribute *iwl_sysfs_entries[] = {
1154         &dev_attr_temperature.attr,
1155         &dev_attr_tx_power.attr,
1156 #ifdef CONFIG_IWLWIFI_DEBUG
1157         &dev_attr_debug_level.attr,
1158 #endif
1159         NULL
1160 };
1161
1162 static struct attribute_group iwl_attribute_group = {
1163         .name = NULL,           /* put in device directory */
1164         .attrs = iwl_sysfs_entries,
1165 };
1166
1167 /******************************************************************************
1168  *
1169  * uCode download functions
1170  *
1171  ******************************************************************************/
1172
1173 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1174 {
1175         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1176         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1177         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1178         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1179 }
1180
1181 static void iwl_nic_start(struct iwl_priv *priv)
1182 {
1183         /* Remove all resets to allow NIC to operate */
1184         iwl_write32(priv, CSR_RESET, 0);
1185 }
1186
1187 struct iwlagn_ucode_capabilities {
1188         u32 max_probe_length;
1189         u32 standard_phy_calibration_size;
1190         u32 flags;
1191 };
1192
1193 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1194 static int iwl_mac_setup_register(struct iwl_priv *priv,
1195                                   struct iwlagn_ucode_capabilities *capa);
1196
1197 #define UCODE_EXPERIMENTAL_INDEX        100
1198 #define UCODE_EXPERIMENTAL_TAG          "exp"
1199
1200 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1201 {
1202         const char *name_pre = priv->cfg->fw_name_pre;
1203         char tag[8];
1204
1205         if (first) {
1206 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1207                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1208                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1209         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1210 #endif
1211                 priv->fw_index = priv->cfg->ucode_api_max;
1212                 sprintf(tag, "%d", priv->fw_index);
1213         } else {
1214                 priv->fw_index--;
1215                 sprintf(tag, "%d", priv->fw_index);
1216         }
1217
1218         if (priv->fw_index < priv->cfg->ucode_api_min) {
1219                 IWL_ERR(priv, "no suitable firmware found!\n");
1220                 return -ENOENT;
1221         }
1222
1223         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1224
1225         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1226                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1227                                 ? "EXPERIMENTAL " : "",
1228                        priv->firmware_name);
1229
1230         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1231                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1232                                        iwl_ucode_callback);
1233 }
1234
1235 struct iwlagn_firmware_pieces {
1236         const void *inst, *data, *init, *init_data;
1237         size_t inst_size, data_size, init_size, init_data_size;
1238
1239         u32 build;
1240
1241         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1242         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1243 };
1244
1245 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1246                                        const struct firmware *ucode_raw,
1247                                        struct iwlagn_firmware_pieces *pieces)
1248 {
1249         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1250         u32 api_ver, hdr_size;
1251         const u8 *src;
1252
1253         priv->ucode_ver = le32_to_cpu(ucode->ver);
1254         api_ver = IWL_UCODE_API(priv->ucode_ver);
1255
1256         switch (api_ver) {
1257         default:
1258                 hdr_size = 28;
1259                 if (ucode_raw->size < hdr_size) {
1260                         IWL_ERR(priv, "File size too small!\n");
1261                         return -EINVAL;
1262                 }
1263                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1264                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1265                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1266                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1267                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1268                 src = ucode->u.v2.data;
1269                 break;
1270         case 0:
1271         case 1:
1272         case 2:
1273                 hdr_size = 24;
1274                 if (ucode_raw->size < hdr_size) {
1275                         IWL_ERR(priv, "File size too small!\n");
1276                         return -EINVAL;
1277                 }
1278                 pieces->build = 0;
1279                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1280                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1281                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1282                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1283                 src = ucode->u.v1.data;
1284                 break;
1285         }
1286
1287         /* Verify size of file vs. image size info in file's header */
1288         if (ucode_raw->size != hdr_size + pieces->inst_size +
1289                                 pieces->data_size + pieces->init_size +
1290                                 pieces->init_data_size) {
1291
1292                 IWL_ERR(priv,
1293                         "uCode file size %d does not match expected size\n",
1294                         (int)ucode_raw->size);
1295                 return -EINVAL;
1296         }
1297
1298         pieces->inst = src;
1299         src += pieces->inst_size;
1300         pieces->data = src;
1301         src += pieces->data_size;
1302         pieces->init = src;
1303         src += pieces->init_size;
1304         pieces->init_data = src;
1305         src += pieces->init_data_size;
1306
1307         return 0;
1308 }
1309
1310 static int iwlagn_wanted_ucode_alternative = 1;
1311
1312 static int iwlagn_load_firmware(struct iwl_priv *priv,
1313                                 const struct firmware *ucode_raw,
1314                                 struct iwlagn_firmware_pieces *pieces,
1315                                 struct iwlagn_ucode_capabilities *capa)
1316 {
1317         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1318         struct iwl_ucode_tlv *tlv;
1319         size_t len = ucode_raw->size;
1320         const u8 *data;
1321         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1322         u64 alternatives;
1323         u32 tlv_len;
1324         enum iwl_ucode_tlv_type tlv_type;
1325         const u8 *tlv_data;
1326
1327         if (len < sizeof(*ucode)) {
1328                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1329                 return -EINVAL;
1330         }
1331
1332         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1333                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1334                         le32_to_cpu(ucode->magic));
1335                 return -EINVAL;
1336         }
1337
1338         /*
1339          * Check which alternatives are present, and "downgrade"
1340          * when the chosen alternative is not present, warning
1341          * the user when that happens. Some files may not have
1342          * any alternatives, so don't warn in that case.
1343          */
1344         alternatives = le64_to_cpu(ucode->alternatives);
1345         tmp = wanted_alternative;
1346         if (wanted_alternative > 63)
1347                 wanted_alternative = 63;
1348         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1349                 wanted_alternative--;
1350         if (wanted_alternative && wanted_alternative != tmp)
1351                 IWL_WARN(priv,
1352                          "uCode alternative %d not available, choosing %d\n",
1353                          tmp, wanted_alternative);
1354
1355         priv->ucode_ver = le32_to_cpu(ucode->ver);
1356         pieces->build = le32_to_cpu(ucode->build);
1357         data = ucode->data;
1358
1359         len -= sizeof(*ucode);
1360
1361         while (len >= sizeof(*tlv)) {
1362                 u16 tlv_alt;
1363
1364                 len -= sizeof(*tlv);
1365                 tlv = (void *)data;
1366
1367                 tlv_len = le32_to_cpu(tlv->length);
1368                 tlv_type = le16_to_cpu(tlv->type);
1369                 tlv_alt = le16_to_cpu(tlv->alternative);
1370                 tlv_data = tlv->data;
1371
1372                 if (len < tlv_len) {
1373                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1374                                 len, tlv_len);
1375                         return -EINVAL;
1376                 }
1377                 len -= ALIGN(tlv_len, 4);
1378                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1379
1380                 /*
1381                  * Alternative 0 is always valid.
1382                  *
1383                  * Skip alternative TLVs that are not selected.
1384                  */
1385                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1386                         continue;
1387
1388                 switch (tlv_type) {
1389                 case IWL_UCODE_TLV_INST:
1390                         pieces->inst = tlv_data;
1391                         pieces->inst_size = tlv_len;
1392                         break;
1393                 case IWL_UCODE_TLV_DATA:
1394                         pieces->data = tlv_data;
1395                         pieces->data_size = tlv_len;
1396                         break;
1397                 case IWL_UCODE_TLV_INIT:
1398                         pieces->init = tlv_data;
1399                         pieces->init_size = tlv_len;
1400                         break;
1401                 case IWL_UCODE_TLV_INIT_DATA:
1402                         pieces->init_data = tlv_data;
1403                         pieces->init_data_size = tlv_len;
1404                         break;
1405                 case IWL_UCODE_TLV_BOOT:
1406                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1407                         break;
1408                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1409                         if (tlv_len != sizeof(u32))
1410                                 goto invalid_tlv_len;
1411                         capa->max_probe_length =
1412                                         le32_to_cpup((__le32 *)tlv_data);
1413                         break;
1414                 case IWL_UCODE_TLV_PAN:
1415                         if (tlv_len)
1416                                 goto invalid_tlv_len;
1417                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1418                         break;
1419                 case IWL_UCODE_TLV_FLAGS:
1420                         /* must be at least one u32 */
1421                         if (tlv_len < sizeof(u32))
1422                                 goto invalid_tlv_len;
1423                         /* and a proper number of u32s */
1424                         if (tlv_len % sizeof(u32))
1425                                 goto invalid_tlv_len;
1426                         /*
1427                          * This driver only reads the first u32 as
1428                          * right now no more features are defined,
1429                          * if that changes then either the driver
1430                          * will not work with the new firmware, or
1431                          * it'll not take advantage of new features.
1432                          */
1433                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1434                         break;
1435                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1436                         if (tlv_len != sizeof(u32))
1437                                 goto invalid_tlv_len;
1438                         pieces->init_evtlog_ptr =
1439                                         le32_to_cpup((__le32 *)tlv_data);
1440                         break;
1441                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1442                         if (tlv_len != sizeof(u32))
1443                                 goto invalid_tlv_len;
1444                         pieces->init_evtlog_size =
1445                                         le32_to_cpup((__le32 *)tlv_data);
1446                         break;
1447                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1448                         if (tlv_len != sizeof(u32))
1449                                 goto invalid_tlv_len;
1450                         pieces->init_errlog_ptr =
1451                                         le32_to_cpup((__le32 *)tlv_data);
1452                         break;
1453                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1454                         if (tlv_len != sizeof(u32))
1455                                 goto invalid_tlv_len;
1456                         pieces->inst_evtlog_ptr =
1457                                         le32_to_cpup((__le32 *)tlv_data);
1458                         break;
1459                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1460                         if (tlv_len != sizeof(u32))
1461                                 goto invalid_tlv_len;
1462                         pieces->inst_evtlog_size =
1463                                         le32_to_cpup((__le32 *)tlv_data);
1464                         break;
1465                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1466                         if (tlv_len != sizeof(u32))
1467                                 goto invalid_tlv_len;
1468                         pieces->inst_errlog_ptr =
1469                                         le32_to_cpup((__le32 *)tlv_data);
1470                         break;
1471                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1472                         if (tlv_len)
1473                                 goto invalid_tlv_len;
1474                         priv->enhance_sensitivity_table = true;
1475                         break;
1476                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1477                         if (tlv_len != sizeof(u32))
1478                                 goto invalid_tlv_len;
1479                         capa->standard_phy_calibration_size =
1480                                         le32_to_cpup((__le32 *)tlv_data);
1481                         break;
1482                 default:
1483                         IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1484                         break;
1485                 }
1486         }
1487
1488         if (len) {
1489                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1490                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1491                 return -EINVAL;
1492         }
1493
1494         return 0;
1495
1496  invalid_tlv_len:
1497         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1498         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1499
1500         return -EINVAL;
1501 }
1502
1503 /**
1504  * iwl_ucode_callback - callback when firmware was loaded
1505  *
1506  * If loaded successfully, copies the firmware into buffers
1507  * for the card to fetch (via DMA).
1508  */
1509 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1510 {
1511         struct iwl_priv *priv = context;
1512         struct iwl_ucode_header *ucode;
1513         int err;
1514         struct iwlagn_firmware_pieces pieces;
1515         const unsigned int api_max = priv->cfg->ucode_api_max;
1516         const unsigned int api_min = priv->cfg->ucode_api_min;
1517         u32 api_ver;
1518         char buildstr[25];
1519         u32 build;
1520         struct iwlagn_ucode_capabilities ucode_capa = {
1521                 .max_probe_length = 200,
1522                 .standard_phy_calibration_size =
1523                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1524         };
1525
1526         memset(&pieces, 0, sizeof(pieces));
1527
1528         if (!ucode_raw) {
1529                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1530                         IWL_ERR(priv,
1531                                 "request for firmware file '%s' failed.\n",
1532                                 priv->firmware_name);
1533                 goto try_again;
1534         }
1535
1536         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1537                        priv->firmware_name, ucode_raw->size);
1538
1539         /* Make sure that we got at least the API version number */
1540         if (ucode_raw->size < 4) {
1541                 IWL_ERR(priv, "File size way too small!\n");
1542                 goto try_again;
1543         }
1544
1545         /* Data from ucode file:  header followed by uCode images */
1546         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1547
1548         if (ucode->ver)
1549                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1550         else
1551                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1552                                            &ucode_capa);
1553
1554         if (err)
1555                 goto try_again;
1556
1557         api_ver = IWL_UCODE_API(priv->ucode_ver);
1558         build = pieces.build;
1559
1560         /*
1561          * api_ver should match the api version forming part of the
1562          * firmware filename ... but we don't check for that and only rely
1563          * on the API version read from firmware header from here on forward
1564          */
1565         /* no api version check required for experimental uCode */
1566         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1567                 if (api_ver < api_min || api_ver > api_max) {
1568                         IWL_ERR(priv,
1569                                 "Driver unable to support your firmware API. "
1570                                 "Driver supports v%u, firmware is v%u.\n",
1571                                 api_max, api_ver);
1572                         goto try_again;
1573                 }
1574
1575                 if (api_ver != api_max)
1576                         IWL_ERR(priv,
1577                                 "Firmware has old API version. Expected v%u, "
1578                                 "got v%u. New firmware can be obtained "
1579                                 "from http://www.intellinuxwireless.org.\n",
1580                                 api_max, api_ver);
1581         }
1582
1583         if (build)
1584                 sprintf(buildstr, " build %u%s", build,
1585                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1586                                 ? " (EXP)" : "");
1587         else
1588                 buildstr[0] = '\0';
1589
1590         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1591                  IWL_UCODE_MAJOR(priv->ucode_ver),
1592                  IWL_UCODE_MINOR(priv->ucode_ver),
1593                  IWL_UCODE_API(priv->ucode_ver),
1594                  IWL_UCODE_SERIAL(priv->ucode_ver),
1595                  buildstr);
1596
1597         snprintf(priv->hw->wiphy->fw_version,
1598                  sizeof(priv->hw->wiphy->fw_version),
1599                  "%u.%u.%u.%u%s",
1600                  IWL_UCODE_MAJOR(priv->ucode_ver),
1601                  IWL_UCODE_MINOR(priv->ucode_ver),
1602                  IWL_UCODE_API(priv->ucode_ver),
1603                  IWL_UCODE_SERIAL(priv->ucode_ver),
1604                  buildstr);
1605
1606         /*
1607          * For any of the failures below (before allocating pci memory)
1608          * we will try to load a version with a smaller API -- maybe the
1609          * user just got a corrupted version of the latest API.
1610          */
1611
1612         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1613                        priv->ucode_ver);
1614         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1615                        pieces.inst_size);
1616         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1617                        pieces.data_size);
1618         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1619                        pieces.init_size);
1620         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1621                        pieces.init_data_size);
1622
1623         /* Verify that uCode images will fit in card's SRAM */
1624         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1625                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1626                         pieces.inst_size);
1627                 goto try_again;
1628         }
1629
1630         if (pieces.data_size > priv->hw_params.max_data_size) {
1631                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1632                         pieces.data_size);
1633                 goto try_again;
1634         }
1635
1636         if (pieces.init_size > priv->hw_params.max_inst_size) {
1637                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1638                         pieces.init_size);
1639                 goto try_again;
1640         }
1641
1642         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1643                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1644                         pieces.init_data_size);
1645                 goto try_again;
1646         }
1647
1648         /* Allocate ucode buffers for card's bus-master loading ... */
1649
1650         /* Runtime instructions and 2 copies of data:
1651          * 1) unmodified from disk
1652          * 2) backup cache for save/restore during power-downs */
1653         priv->ucode_code.len = pieces.inst_size;
1654         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1655
1656         priv->ucode_data.len = pieces.data_size;
1657         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1658
1659         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr)
1660                 goto err_pci_alloc;
1661
1662         /* Initialization instructions and data */
1663         if (pieces.init_size && pieces.init_data_size) {
1664                 priv->ucode_init.len = pieces.init_size;
1665                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1666
1667                 priv->ucode_init_data.len = pieces.init_data_size;
1668                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1669
1670                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1671                         goto err_pci_alloc;
1672         }
1673
1674         /* Now that we can no longer fail, copy information */
1675
1676         /*
1677          * The (size - 16) / 12 formula is based on the information recorded
1678          * for each event, which is of mode 1 (including timestamp) for all
1679          * new microcodes that include this information.
1680          */
1681         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1682         if (pieces.init_evtlog_size)
1683                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1684         else
1685                 priv->_agn.init_evtlog_size =
1686                         priv->cfg->base_params->max_event_log_size;
1687         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1688         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1689         if (pieces.inst_evtlog_size)
1690                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1691         else
1692                 priv->_agn.inst_evtlog_size =
1693                         priv->cfg->base_params->max_event_log_size;
1694         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1695
1696         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1697                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1698                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1699         } else
1700                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1701
1702         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1703                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1704         else
1705                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1706
1707         /* Copy images into buffers for card's bus-master reads ... */
1708
1709         /* Runtime instructions (first block of data in file) */
1710         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1711                         pieces.inst_size);
1712         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1713
1714         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1715                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1716
1717         /*
1718          * Runtime data
1719          * NOTE:  Copy into backup buffer will be done in iwl_up()
1720          */
1721         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1722                         pieces.data_size);
1723         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1724
1725         /* Initialization instructions */
1726         if (pieces.init_size) {
1727                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1728                                 pieces.init_size);
1729                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1730         }
1731
1732         /* Initialization data */
1733         if (pieces.init_data_size) {
1734                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1735                                pieces.init_data_size);
1736                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1737                        pieces.init_data_size);
1738         }
1739
1740         /*
1741          * figure out the offset of chain noise reset and gain commands
1742          * base on the size of standard phy calibration commands table size
1743          */
1744         if (ucode_capa.standard_phy_calibration_size >
1745             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1746                 ucode_capa.standard_phy_calibration_size =
1747                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1748
1749         priv->_agn.phy_calib_chain_noise_reset_cmd =
1750                 ucode_capa.standard_phy_calibration_size;
1751         priv->_agn.phy_calib_chain_noise_gain_cmd =
1752                 ucode_capa.standard_phy_calibration_size + 1;
1753
1754         /**************************************************
1755          * This is still part of probe() in a sense...
1756          *
1757          * 9. Setup and register with mac80211 and debugfs
1758          **************************************************/
1759         err = iwl_mac_setup_register(priv, &ucode_capa);
1760         if (err)
1761                 goto out_unbind;
1762
1763         err = iwl_dbgfs_register(priv, DRV_NAME);
1764         if (err)
1765                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1766
1767         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1768                                         &iwl_attribute_group);
1769         if (err) {
1770                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1771                 goto out_unbind;
1772         }
1773
1774         /* We have our copies now, allow OS release its copies */
1775         release_firmware(ucode_raw);
1776         complete(&priv->_agn.firmware_loading_complete);
1777         return;
1778
1779  try_again:
1780         /* try next, if any */
1781         if (iwl_request_firmware(priv, false))
1782                 goto out_unbind;
1783         release_firmware(ucode_raw);
1784         return;
1785
1786  err_pci_alloc:
1787         IWL_ERR(priv, "failed to allocate pci memory\n");
1788         iwl_dealloc_ucode_pci(priv);
1789  out_unbind:
1790         complete(&priv->_agn.firmware_loading_complete);
1791         device_release_driver(&priv->pci_dev->dev);
1792         release_firmware(ucode_raw);
1793 }
1794
1795 static const char *desc_lookup_text[] = {
1796         "OK",
1797         "FAIL",
1798         "BAD_PARAM",
1799         "BAD_CHECKSUM",
1800         "NMI_INTERRUPT_WDG",
1801         "SYSASSERT",
1802         "FATAL_ERROR",
1803         "BAD_COMMAND",
1804         "HW_ERROR_TUNE_LOCK",
1805         "HW_ERROR_TEMPERATURE",
1806         "ILLEGAL_CHAN_FREQ",
1807         "VCC_NOT_STABLE",
1808         "FH_ERROR",
1809         "NMI_INTERRUPT_HOST",
1810         "NMI_INTERRUPT_ACTION_PT",
1811         "NMI_INTERRUPT_UNKNOWN",
1812         "UCODE_VERSION_MISMATCH",
1813         "HW_ERROR_ABS_LOCK",
1814         "HW_ERROR_CAL_LOCK_FAIL",
1815         "NMI_INTERRUPT_INST_ACTION_PT",
1816         "NMI_INTERRUPT_DATA_ACTION_PT",
1817         "NMI_TRM_HW_ER",
1818         "NMI_INTERRUPT_TRM",
1819         "NMI_INTERRUPT_BREAK_POINT"
1820         "DEBUG_0",
1821         "DEBUG_1",
1822         "DEBUG_2",
1823         "DEBUG_3",
1824 };
1825
1826 static struct { char *name; u8 num; } advanced_lookup[] = {
1827         { "NMI_INTERRUPT_WDG", 0x34 },
1828         { "SYSASSERT", 0x35 },
1829         { "UCODE_VERSION_MISMATCH", 0x37 },
1830         { "BAD_COMMAND", 0x38 },
1831         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1832         { "FATAL_ERROR", 0x3D },
1833         { "NMI_TRM_HW_ERR", 0x46 },
1834         { "NMI_INTERRUPT_TRM", 0x4C },
1835         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1836         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1837         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1838         { "NMI_INTERRUPT_HOST", 0x66 },
1839         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1840         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1841         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1842         { "ADVANCED_SYSASSERT", 0 },
1843 };
1844
1845 static const char *desc_lookup(u32 num)
1846 {
1847         int i;
1848         int max = ARRAY_SIZE(desc_lookup_text);
1849
1850         if (num < max)
1851                 return desc_lookup_text[num];
1852
1853         max = ARRAY_SIZE(advanced_lookup) - 1;
1854         for (i = 0; i < max; i++) {
1855                 if (advanced_lookup[i].num == num)
1856                         break;;
1857         }
1858         return advanced_lookup[i].name;
1859 }
1860
1861 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1862 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1863
1864 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1865 {
1866         u32 data2, line;
1867         u32 desc, time, count, base, data1;
1868         u32 blink1, blink2, ilink1, ilink2;
1869         u32 pc, hcmd;
1870
1871         base = priv->device_pointers.error_event_table;
1872         if (priv->ucode_type == UCODE_INIT) {
1873                 if (!base)
1874                         base = priv->_agn.init_errlog_ptr;
1875         } else {
1876                 if (!base)
1877                         base = priv->_agn.inst_errlog_ptr;
1878         }
1879
1880         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1881                 IWL_ERR(priv,
1882                         "Not valid error log pointer 0x%08X for %s uCode\n",
1883                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1884                 return;
1885         }
1886
1887         count = iwl_read_targ_mem(priv, base);
1888
1889         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1890                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1891                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1892                         priv->status, count);
1893         }
1894
1895         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1896         priv->isr_stats.err_code = desc;
1897         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
1898         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1899         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1900         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1901         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1902         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1903         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1904         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1905         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1906         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
1907
1908         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1909                                       blink1, blink2, ilink1, ilink2);
1910
1911         IWL_ERR(priv, "Desc                                  Time       "
1912                 "data1      data2      line\n");
1913         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1914                 desc_lookup(desc), desc, time, data1, data2, line);
1915         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1916         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1917                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1918 }
1919
1920 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1921
1922 /**
1923  * iwl_print_event_log - Dump error event log to syslog
1924  *
1925  */
1926 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1927                                u32 num_events, u32 mode,
1928                                int pos, char **buf, size_t bufsz)
1929 {
1930         u32 i;
1931         u32 base;       /* SRAM byte address of event log header */
1932         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1933         u32 ptr;        /* SRAM byte address of log data */
1934         u32 ev, time, data; /* event log data */
1935         unsigned long reg_flags;
1936
1937         if (num_events == 0)
1938                 return pos;
1939
1940         base = priv->device_pointers.log_event_table;
1941         if (priv->ucode_type == UCODE_INIT) {
1942                 if (!base)
1943                         base = priv->_agn.init_evtlog_ptr;
1944         } else {
1945                 if (!base)
1946                         base = priv->_agn.inst_evtlog_ptr;
1947         }
1948
1949         if (mode == 0)
1950                 event_size = 2 * sizeof(u32);
1951         else
1952                 event_size = 3 * sizeof(u32);
1953
1954         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1955
1956         /* Make sure device is powered up for SRAM reads */
1957         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1958         iwl_grab_nic_access(priv);
1959
1960         /* Set starting address; reads will auto-increment */
1961         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
1962         rmb();
1963
1964         /* "time" is actually "data" for mode 0 (no timestamp).
1965         * place event id # at far right for easier visual parsing. */
1966         for (i = 0; i < num_events; i++) {
1967                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1968                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1969                 if (mode == 0) {
1970                         /* data, ev */
1971                         if (bufsz) {
1972                                 pos += scnprintf(*buf + pos, bufsz - pos,
1973                                                 "EVT_LOG:0x%08x:%04u\n",
1974                                                 time, ev);
1975                         } else {
1976                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1977                                         time, ev);
1978                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1979                                         time, ev);
1980                         }
1981                 } else {
1982                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1983                         if (bufsz) {
1984                                 pos += scnprintf(*buf + pos, bufsz - pos,
1985                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1986                                                  time, data, ev);
1987                         } else {
1988                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1989                                         time, data, ev);
1990                                 trace_iwlwifi_dev_ucode_event(priv, time,
1991                                         data, ev);
1992                         }
1993                 }
1994         }
1995
1996         /* Allow device to power down */
1997         iwl_release_nic_access(priv);
1998         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1999         return pos;
2000 }
2001
2002 /**
2003  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2004  */
2005 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2006                                     u32 num_wraps, u32 next_entry,
2007                                     u32 size, u32 mode,
2008                                     int pos, char **buf, size_t bufsz)
2009 {
2010         /*
2011          * display the newest DEFAULT_LOG_ENTRIES entries
2012          * i.e the entries just before the next ont that uCode would fill.
2013          */
2014         if (num_wraps) {
2015                 if (next_entry < size) {
2016                         pos = iwl_print_event_log(priv,
2017                                                 capacity - (size - next_entry),
2018                                                 size - next_entry, mode,
2019                                                 pos, buf, bufsz);
2020                         pos = iwl_print_event_log(priv, 0,
2021                                                   next_entry, mode,
2022                                                   pos, buf, bufsz);
2023                 } else
2024                         pos = iwl_print_event_log(priv, next_entry - size,
2025                                                   size, mode, pos, buf, bufsz);
2026         } else {
2027                 if (next_entry < size) {
2028                         pos = iwl_print_event_log(priv, 0, next_entry,
2029                                                   mode, pos, buf, bufsz);
2030                 } else {
2031                         pos = iwl_print_event_log(priv, next_entry - size,
2032                                                   size, mode, pos, buf, bufsz);
2033                 }
2034         }
2035         return pos;
2036 }
2037
2038 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2039
2040 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2041                             char **buf, bool display)
2042 {
2043         u32 base;       /* SRAM byte address of event log header */
2044         u32 capacity;   /* event log capacity in # entries */
2045         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2046         u32 num_wraps;  /* # times uCode wrapped to top of log */
2047         u32 next_entry; /* index of next entry to be written by uCode */
2048         u32 size;       /* # entries that we'll print */
2049         u32 logsize;
2050         int pos = 0;
2051         size_t bufsz = 0;
2052
2053         base = priv->device_pointers.log_event_table;
2054         if (priv->ucode_type == UCODE_INIT) {
2055                 logsize = priv->_agn.init_evtlog_size;
2056                 if (!base)
2057                         base = priv->_agn.init_evtlog_ptr;
2058         } else {
2059                 logsize = priv->_agn.inst_evtlog_size;
2060                 if (!base)
2061                         base = priv->_agn.inst_evtlog_ptr;
2062         }
2063
2064         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2065                 IWL_ERR(priv,
2066                         "Invalid event log pointer 0x%08X for %s uCode\n",
2067                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2068                 return -EINVAL;
2069         }
2070
2071         /* event log header */
2072         capacity = iwl_read_targ_mem(priv, base);
2073         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2074         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2075         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2076
2077         if (capacity > logsize) {
2078                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2079                         capacity, logsize);
2080                 capacity = logsize;
2081         }
2082
2083         if (next_entry > logsize) {
2084                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2085                         next_entry, logsize);
2086                 next_entry = logsize;
2087         }
2088
2089         size = num_wraps ? capacity : next_entry;
2090
2091         /* bail out if nothing in log */
2092         if (size == 0) {
2093                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2094                 return pos;
2095         }
2096
2097         /* enable/disable bt channel inhibition */
2098         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2099
2100 #ifdef CONFIG_IWLWIFI_DEBUG
2101         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2102                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2103                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2104 #else
2105         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2106                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2107 #endif
2108         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2109                 size);
2110
2111 #ifdef CONFIG_IWLWIFI_DEBUG
2112         if (display) {
2113                 if (full_log)
2114                         bufsz = capacity * 48;
2115                 else
2116                         bufsz = size * 48;
2117                 *buf = kmalloc(bufsz, GFP_KERNEL);
2118                 if (!*buf)
2119                         return -ENOMEM;
2120         }
2121         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2122                 /*
2123                  * if uCode has wrapped back to top of log,
2124                  * start at the oldest entry,
2125                  * i.e the next one that uCode would fill.
2126                  */
2127                 if (num_wraps)
2128                         pos = iwl_print_event_log(priv, next_entry,
2129                                                 capacity - next_entry, mode,
2130                                                 pos, buf, bufsz);
2131                 /* (then/else) start at top of log */
2132                 pos = iwl_print_event_log(priv, 0,
2133                                           next_entry, mode, pos, buf, bufsz);
2134         } else
2135                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2136                                                 next_entry, size, mode,
2137                                                 pos, buf, bufsz);
2138 #else
2139         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2140                                         next_entry, size, mode,
2141                                         pos, buf, bufsz);
2142 #endif
2143         return pos;
2144 }
2145
2146 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2147 {
2148         struct iwl_ct_kill_config cmd;
2149         struct iwl_ct_kill_throttling_config adv_cmd;
2150         unsigned long flags;
2151         int ret = 0;
2152
2153         spin_lock_irqsave(&priv->lock, flags);
2154         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2155                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2156         spin_unlock_irqrestore(&priv->lock, flags);
2157         priv->thermal_throttle.ct_kill_toggle = false;
2158
2159         if (priv->cfg->base_params->support_ct_kill_exit) {
2160                 adv_cmd.critical_temperature_enter =
2161                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2162                 adv_cmd.critical_temperature_exit =
2163                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2164
2165                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2166                                        sizeof(adv_cmd), &adv_cmd);
2167                 if (ret)
2168                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2169                 else
2170                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2171                                         "succeeded, "
2172                                         "critical temperature enter is %d,"
2173                                         "exit is %d\n",
2174                                        priv->hw_params.ct_kill_threshold,
2175                                        priv->hw_params.ct_kill_exit_threshold);
2176         } else {
2177                 cmd.critical_temperature_R =
2178                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2179
2180                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2181                                        sizeof(cmd), &cmd);
2182                 if (ret)
2183                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2184                 else
2185                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2186                                         "succeeded, "
2187                                         "critical temperature is %d\n",
2188                                         priv->hw_params.ct_kill_threshold);
2189         }
2190 }
2191
2192 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2193 {
2194         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2195         struct iwl_host_cmd cmd = {
2196                 .id = CALIBRATION_CFG_CMD,
2197                 .len = sizeof(struct iwl_calib_cfg_cmd),
2198                 .data = &calib_cfg_cmd,
2199         };
2200
2201         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2202         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2203         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2204
2205         return iwl_send_cmd(priv, &cmd);
2206 }
2207
2208
2209 /**
2210  * iwl_alive_start - called after REPLY_ALIVE notification received
2211  *                   from protocol/runtime uCode (initialization uCode's
2212  *                   Alive gets handled by iwl_init_alive_start()).
2213  */
2214 static void iwl_alive_start(struct iwl_priv *priv)
2215 {
2216         int ret = 0;
2217         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2218
2219         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2220
2221         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2222          * This is a paranoid check, because we would not have gotten the
2223          * "runtime" alive if code weren't properly loaded.  */
2224         if (iwl_verify_ucode(priv, &priv->ucode_code)) {
2225                 /* Runtime instruction load was bad;
2226                  * take it all the way back down so we can try again */
2227                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2228                 goto restart;
2229         }
2230
2231         ret = iwlagn_alive_notify(priv);
2232         if (ret) {
2233                 IWL_WARN(priv,
2234                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2235                 goto restart;
2236         }
2237
2238
2239         /* After the ALIVE response, we can send host commands to the uCode */
2240         set_bit(STATUS_ALIVE, &priv->status);
2241
2242         /* Enable watchdog to monitor the driver tx queues */
2243         iwl_setup_watchdog(priv);
2244
2245         if (iwl_is_rfkill(priv))
2246                 return;
2247
2248         /* download priority table before any calibration request */
2249         if (priv->cfg->bt_params &&
2250             priv->cfg->bt_params->advanced_bt_coexist) {
2251                 /* Configure Bluetooth device coexistence support */
2252                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2253                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2254                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2255                 priv->cfg->ops->hcmd->send_bt_config(priv);
2256                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2257                 iwlagn_send_prio_tbl(priv);
2258
2259                 /* FIXME: w/a to force change uCode BT state machine */
2260                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2261                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2262                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2263                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2264         }
2265         if (priv->hw_params.calib_rt_cfg)
2266                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2267
2268         ieee80211_wake_queues(priv->hw);
2269
2270         priv->active_rate = IWL_RATES_MASK;
2271
2272         /* Configure Tx antenna selection based on H/W config */
2273         if (priv->cfg->ops->hcmd->set_tx_ant)
2274                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2275
2276         if (iwl_is_associated_ctx(ctx)) {
2277                 struct iwl_rxon_cmd *active_rxon =
2278                                 (struct iwl_rxon_cmd *)&ctx->active;
2279                 /* apply any changes in staging */
2280                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2281                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2282         } else {
2283                 struct iwl_rxon_context *tmp;
2284                 /* Initialize our rx_config data */
2285                 for_each_context(priv, tmp)
2286                         iwl_connection_init_rx_config(priv, tmp);
2287
2288                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2289                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2290         }
2291
2292         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2293             !priv->cfg->bt_params->advanced_bt_coexist)) {
2294                 /*
2295                  * default is 2-wire BT coexexistence support
2296                  */
2297                 priv->cfg->ops->hcmd->send_bt_config(priv);
2298         }
2299
2300         iwl_reset_run_time_calib(priv);
2301
2302         set_bit(STATUS_READY, &priv->status);
2303
2304         /* Configure the adapter for unassociated operation */
2305         iwlcore_commit_rxon(priv, ctx);
2306
2307         /* At this point, the NIC is initialized and operational */
2308         iwl_rf_kill_ct_config(priv);
2309
2310         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2311         wake_up_interruptible(&priv->wait_command_queue);
2312
2313         iwl_power_update_mode(priv, true);
2314         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2315
2316
2317         return;
2318
2319  restart:
2320         queue_work(priv->workqueue, &priv->restart);
2321 }
2322
2323 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2324
2325 static void __iwl_down(struct iwl_priv *priv)
2326 {
2327         unsigned long flags;
2328         int exit_pending;
2329
2330         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2331
2332         iwl_scan_cancel_timeout(priv, 200);
2333
2334         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2335
2336         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2337          * to prevent rearm timer */
2338         del_timer_sync(&priv->watchdog);
2339
2340         iwl_clear_ucode_stations(priv, NULL);
2341         iwl_dealloc_bcast_stations(priv);
2342         iwl_clear_driver_stations(priv);
2343
2344         /* reset BT coex data */
2345         priv->bt_status = 0;
2346         if (priv->cfg->bt_params)
2347                 priv->bt_traffic_load =
2348                          priv->cfg->bt_params->bt_init_traffic_load;
2349         else
2350                 priv->bt_traffic_load = 0;
2351         priv->bt_full_concurrent = false;
2352         priv->bt_ci_compliance = 0;
2353
2354         /* Wipe out the EXIT_PENDING status bit if we are not actually
2355          * exiting the module */
2356         if (!exit_pending)
2357                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2358
2359         /* stop and reset the on-board processor */
2360         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2361
2362         /* tell the device to stop sending interrupts */
2363         spin_lock_irqsave(&priv->lock, flags);
2364         iwl_disable_interrupts(priv);
2365         spin_unlock_irqrestore(&priv->lock, flags);
2366         iwl_synchronize_irq(priv);
2367
2368         if (priv->mac80211_registered)
2369                 ieee80211_stop_queues(priv->hw);
2370
2371         /* If we have not previously called iwl_init() then
2372          * clear all bits but the RF Kill bit and return */
2373         if (!iwl_is_init(priv)) {
2374                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2375                                         STATUS_RF_KILL_HW |
2376                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2377                                         STATUS_GEO_CONFIGURED |
2378                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2379                                         STATUS_EXIT_PENDING;
2380                 goto exit;
2381         }
2382
2383         /* ...otherwise clear out all the status bits but the RF Kill
2384          * bit and continue taking the NIC down. */
2385         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2386                                 STATUS_RF_KILL_HW |
2387                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2388                                 STATUS_GEO_CONFIGURED |
2389                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2390                                 STATUS_FW_ERROR |
2391                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2392                                 STATUS_EXIT_PENDING;
2393
2394         /* device going down, Stop using ICT table */
2395         iwl_disable_ict(priv);
2396
2397         iwlagn_txq_ctx_stop(priv);
2398         iwlagn_rxq_stop(priv);
2399
2400         /* Power-down device's busmaster DMA clocks */
2401         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2402         udelay(5);
2403
2404         /* Make sure (redundant) we've released our request to stay awake */
2405         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2406
2407         /* Stop the device, and put it in low power state */
2408         iwl_apm_stop(priv);
2409
2410  exit:
2411         dev_kfree_skb(priv->beacon_skb);
2412         priv->beacon_skb = NULL;
2413
2414         /* clear out any free frames */
2415         iwl_clear_free_frames(priv);
2416 }
2417
2418 static void iwl_down(struct iwl_priv *priv)
2419 {
2420         mutex_lock(&priv->mutex);
2421         __iwl_down(priv);
2422         mutex_unlock(&priv->mutex);
2423
2424         iwl_cancel_deferred_work(priv);
2425 }
2426
2427 #define HW_READY_TIMEOUT (50)
2428
2429 static int iwl_set_hw_ready(struct iwl_priv *priv)
2430 {
2431         int ret = 0;
2432
2433         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2434                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2435
2436         /* See if we got it */
2437         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2438                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2439                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2440                                 HW_READY_TIMEOUT);
2441         if (ret != -ETIMEDOUT)
2442                 priv->hw_ready = true;
2443         else
2444                 priv->hw_ready = false;
2445
2446         IWL_DEBUG_INFO(priv, "hardware %s\n",
2447                       (priv->hw_ready == 1) ? "ready" : "not ready");
2448         return ret;
2449 }
2450
2451 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2452 {
2453         int ret = 0;
2454
2455         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2456
2457         ret = iwl_set_hw_ready(priv);
2458         if (priv->hw_ready)
2459                 return ret;
2460
2461         /* If HW is not ready, prepare the conditions to check again */
2462         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2463                         CSR_HW_IF_CONFIG_REG_PREPARE);
2464
2465         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2466                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2467                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2468
2469         /* HW should be ready by now, check again. */
2470         if (ret != -ETIMEDOUT)
2471                 iwl_set_hw_ready(priv);
2472
2473         return ret;
2474 }
2475
2476 #define MAX_HW_RESTARTS 5
2477
2478 static int __iwl_up(struct iwl_priv *priv)
2479 {
2480         struct iwl_rxon_context *ctx;
2481         int i;
2482         int ret;
2483
2484         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2485                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2486                 return -EIO;
2487         }
2488
2489         for_each_context(priv, ctx) {
2490                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2491                 if (ret) {
2492                         iwl_dealloc_bcast_stations(priv);
2493                         return ret;
2494                 }
2495         }
2496
2497         iwl_prepare_card_hw(priv);
2498
2499         if (!priv->hw_ready) {
2500                 IWL_WARN(priv, "Exit HW not ready\n");
2501                 return -EIO;
2502         }
2503
2504         /* If platform's RF_KILL switch is NOT set to KILL */
2505         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2506                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2507         else
2508                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2509
2510         if (iwl_is_rfkill(priv)) {
2511                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2512
2513                 iwl_enable_interrupts(priv);
2514                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2515                 return 0;
2516         }
2517
2518         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2519
2520         ret = iwlagn_hw_nic_init(priv);
2521         if (ret) {
2522                 IWL_ERR(priv, "Unable to init nic\n");
2523                 return ret;
2524         }
2525
2526         /* make sure rfkill handshake bits are cleared */
2527         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2528         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2529                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2530
2531         /* clear (again), then enable host interrupts */
2532         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2533         iwl_enable_interrupts(priv);
2534
2535         /* really make sure rfkill handshake bits are cleared */
2536         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2537         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2538
2539         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2540
2541                 /* load bootstrap state machine,
2542                  * load bootstrap program into processor's memory,
2543                  * prepare to load the "initialize" uCode */
2544                 ret = iwlagn_load_ucode(priv);
2545
2546                 if (ret) {
2547                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2548                                 ret);
2549                         continue;
2550                 }
2551
2552                 /* start card; "initialize" will load runtime ucode */
2553                 iwl_nic_start(priv);
2554
2555                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2556
2557                 return 0;
2558         }
2559
2560         set_bit(STATUS_EXIT_PENDING, &priv->status);
2561         __iwl_down(priv);
2562         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2563
2564         /* tried to restart and config the device for as long as our
2565          * patience could withstand */
2566         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2567         return -EIO;
2568 }
2569
2570
2571 /*****************************************************************************
2572  *
2573  * Workqueue callbacks
2574  *
2575  *****************************************************************************/
2576
2577 static void iwl_bg_init_alive_start(struct work_struct *data)
2578 {
2579         struct iwl_priv *priv =
2580             container_of(data, struct iwl_priv, init_alive_start.work);
2581
2582         mutex_lock(&priv->mutex);
2583
2584         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2585                 mutex_unlock(&priv->mutex);
2586                 return;
2587         }
2588
2589         iwlagn_init_alive_start(priv);
2590         mutex_unlock(&priv->mutex);
2591 }
2592
2593 static void iwl_bg_alive_start(struct work_struct *data)
2594 {
2595         struct iwl_priv *priv =
2596             container_of(data, struct iwl_priv, alive_start.work);
2597
2598         mutex_lock(&priv->mutex);
2599         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2600                 goto unlock;
2601
2602         /* enable dram interrupt */
2603         iwl_reset_ict(priv);
2604
2605         iwl_alive_start(priv);
2606 unlock:
2607         mutex_unlock(&priv->mutex);
2608 }
2609
2610 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2611 {
2612         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2613                         run_time_calib_work);
2614
2615         mutex_lock(&priv->mutex);
2616
2617         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2618             test_bit(STATUS_SCANNING, &priv->status)) {
2619                 mutex_unlock(&priv->mutex);
2620                 return;
2621         }
2622
2623         if (priv->start_calib) {
2624                 iwl_chain_noise_calibration(priv);
2625                 iwl_sensitivity_calibration(priv);
2626         }
2627
2628         mutex_unlock(&priv->mutex);
2629 }
2630
2631 static void iwl_bg_restart(struct work_struct *data)
2632 {
2633         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2634
2635         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2636                 return;
2637
2638         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2639                 struct iwl_rxon_context *ctx;
2640                 bool bt_full_concurrent;
2641                 u8 bt_ci_compliance;
2642                 u8 bt_load;
2643                 u8 bt_status;
2644
2645                 mutex_lock(&priv->mutex);
2646                 for_each_context(priv, ctx)
2647                         ctx->vif = NULL;
2648                 priv->is_open = 0;
2649
2650                 /*
2651                  * __iwl_down() will clear the BT status variables,
2652                  * which is correct, but when we restart we really
2653                  * want to keep them so restore them afterwards.
2654                  *
2655                  * The restart process will later pick them up and
2656                  * re-configure the hw when we reconfigure the BT
2657                  * command.
2658                  */
2659                 bt_full_concurrent = priv->bt_full_concurrent;
2660                 bt_ci_compliance = priv->bt_ci_compliance;
2661                 bt_load = priv->bt_traffic_load;
2662                 bt_status = priv->bt_status;
2663
2664                 __iwl_down(priv);
2665
2666                 priv->bt_full_concurrent = bt_full_concurrent;
2667                 priv->bt_ci_compliance = bt_ci_compliance;
2668                 priv->bt_traffic_load = bt_load;
2669                 priv->bt_status = bt_status;
2670
2671                 mutex_unlock(&priv->mutex);
2672                 iwl_cancel_deferred_work(priv);
2673                 ieee80211_restart_hw(priv->hw);
2674         } else {
2675                 iwl_down(priv);
2676
2677                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2678                         return;
2679
2680                 mutex_lock(&priv->mutex);
2681                 __iwl_up(priv);
2682                 mutex_unlock(&priv->mutex);
2683         }
2684 }
2685
2686 static void iwl_bg_rx_replenish(struct work_struct *data)
2687 {
2688         struct iwl_priv *priv =
2689             container_of(data, struct iwl_priv, rx_replenish);
2690
2691         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2692                 return;
2693
2694         mutex_lock(&priv->mutex);
2695         iwlagn_rx_replenish(priv);
2696         mutex_unlock(&priv->mutex);
2697 }
2698
2699 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2700                                  struct ieee80211_channel *chan,
2701                                  enum nl80211_channel_type channel_type,
2702                                  unsigned int wait)
2703 {
2704         struct iwl_priv *priv = hw->priv;
2705         int ret;
2706
2707         /* Not supported if we don't have PAN */
2708         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2709                 ret = -EOPNOTSUPP;
2710                 goto free;
2711         }
2712
2713         /* Not supported on pre-P2P firmware */
2714         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2715                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2716                 ret = -EOPNOTSUPP;
2717                 goto free;
2718         }
2719
2720         mutex_lock(&priv->mutex);
2721
2722         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2723                 /*
2724                  * If the PAN context is free, use the normal
2725                  * way of doing remain-on-channel offload + TX.
2726                  */
2727                 ret = 1;
2728                 goto out;
2729         }
2730
2731         /* TODO: queue up if scanning? */
2732         if (test_bit(STATUS_SCANNING, &priv->status) ||
2733             priv->_agn.offchan_tx_skb) {
2734                 ret = -EBUSY;
2735                 goto out;
2736         }
2737
2738         /*
2739          * max_scan_ie_len doesn't include the blank SSID or the header,
2740          * so need to add that again here.
2741          */
2742         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2743                 ret = -ENOBUFS;
2744                 goto out;
2745         }
2746
2747         priv->_agn.offchan_tx_skb = skb;
2748         priv->_agn.offchan_tx_timeout = wait;
2749         priv->_agn.offchan_tx_chan = chan;
2750
2751         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2752                                 IWL_SCAN_OFFCH_TX, chan->band);
2753         if (ret)
2754                 priv->_agn.offchan_tx_skb = NULL;
2755  out:
2756         mutex_unlock(&priv->mutex);
2757  free:
2758         if (ret < 0)
2759                 kfree_skb(skb);
2760
2761         return ret;
2762 }
2763
2764 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2765 {
2766         struct iwl_priv *priv = hw->priv;
2767         int ret;
2768
2769         mutex_lock(&priv->mutex);
2770
2771         if (!priv->_agn.offchan_tx_skb) {
2772                 ret = -EINVAL;
2773                 goto unlock;
2774         }
2775
2776         priv->_agn.offchan_tx_skb = NULL;
2777
2778         ret = iwl_scan_cancel_timeout(priv, 200);
2779         if (ret)
2780                 ret = -EIO;
2781 unlock:
2782         mutex_unlock(&priv->mutex);
2783
2784         return ret;
2785 }
2786
2787 /*****************************************************************************
2788  *
2789  * mac80211 entry point functions
2790  *
2791  *****************************************************************************/
2792
2793 #define UCODE_READY_TIMEOUT     (4 * HZ)
2794
2795 /*
2796  * Not a mac80211 entry point function, but it fits in with all the
2797  * other mac80211 functions grouped here.
2798  */
2799 static int iwl_mac_setup_register(struct iwl_priv *priv,
2800                                   struct iwlagn_ucode_capabilities *capa)
2801 {
2802         int ret;
2803         struct ieee80211_hw *hw = priv->hw;
2804         struct iwl_rxon_context *ctx;
2805
2806         hw->rate_control_algorithm = "iwl-agn-rs";
2807
2808         /* Tell mac80211 our characteristics */
2809         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2810                     IEEE80211_HW_AMPDU_AGGREGATION |
2811                     IEEE80211_HW_NEED_DTIM_PERIOD |
2812                     IEEE80211_HW_SPECTRUM_MGMT |
2813                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2814
2815         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2816
2817         hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2818                      IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2819
2820         if (priv->cfg->sku & IWL_SKU_N)
2821                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2822                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2823
2824         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2825                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2826
2827         hw->sta_data_size = sizeof(struct iwl_station_priv);
2828         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2829
2830         for_each_context(priv, ctx) {
2831                 hw->wiphy->interface_modes |= ctx->interface_modes;
2832                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2833         }
2834
2835         hw->wiphy->max_remain_on_channel_duration = 1000;
2836
2837         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2838                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2839                             WIPHY_FLAG_IBSS_RSN;
2840
2841         /*
2842          * For now, disable PS by default because it affects
2843          * RX performance significantly.
2844          */
2845         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2846
2847         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2848         /* we create the 802.11 header and a zero-length SSID element */
2849         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2850
2851         /* Default value; 4 EDCA QOS priorities */
2852         hw->queues = 4;
2853
2854         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2855
2856         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2857                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2858                         &priv->bands[IEEE80211_BAND_2GHZ];
2859         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2860                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2861                         &priv->bands[IEEE80211_BAND_5GHZ];
2862
2863         iwl_leds_init(priv);
2864
2865         ret = ieee80211_register_hw(priv->hw);
2866         if (ret) {
2867                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2868                 return ret;
2869         }
2870         priv->mac80211_registered = 1;
2871
2872         return 0;
2873 }
2874
2875
2876 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2877 {
2878         struct iwl_priv *priv = hw->priv;
2879         int ret;
2880
2881         IWL_DEBUG_MAC80211(priv, "enter\n");
2882
2883         /* we should be verifying the device is ready to be opened */
2884         mutex_lock(&priv->mutex);
2885         ret = __iwl_up(priv);
2886         mutex_unlock(&priv->mutex);
2887
2888         if (ret)
2889                 return ret;
2890
2891         if (iwl_is_rfkill(priv))
2892                 goto out;
2893
2894         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2895
2896         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2897          * mac80211 will not be run successfully. */
2898         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2899                         test_bit(STATUS_READY, &priv->status),
2900                         UCODE_READY_TIMEOUT);
2901         if (!ret) {
2902                 if (!test_bit(STATUS_READY, &priv->status)) {
2903                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2904                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2905                         return -ETIMEDOUT;
2906                 }
2907         }
2908
2909         iwlagn_led_enable(priv);
2910
2911 out:
2912         priv->is_open = 1;
2913         IWL_DEBUG_MAC80211(priv, "leave\n");
2914         return 0;
2915 }
2916
2917 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2918 {
2919         struct iwl_priv *priv = hw->priv;
2920
2921         IWL_DEBUG_MAC80211(priv, "enter\n");
2922
2923         if (!priv->is_open)
2924                 return;
2925
2926         priv->is_open = 0;
2927
2928         iwl_down(priv);
2929
2930         flush_workqueue(priv->workqueue);
2931
2932         /* User space software may expect getting rfkill changes
2933          * even if interface is down */
2934         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2935         iwl_enable_rfkill_int(priv);
2936
2937         IWL_DEBUG_MAC80211(priv, "leave\n");
2938 }
2939
2940 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2941 {
2942         struct iwl_priv *priv = hw->priv;
2943
2944         IWL_DEBUG_MACDUMP(priv, "enter\n");
2945
2946         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2947                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2948
2949         if (iwlagn_tx_skb(priv, skb))
2950                 dev_kfree_skb_any(skb);
2951
2952         IWL_DEBUG_MACDUMP(priv, "leave\n");
2953 }
2954
2955 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2956                                        struct ieee80211_vif *vif,
2957                                        struct ieee80211_key_conf *keyconf,
2958                                        struct ieee80211_sta *sta,
2959                                        u32 iv32, u16 *phase1key)
2960 {
2961         struct iwl_priv *priv = hw->priv;
2962         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2963
2964         IWL_DEBUG_MAC80211(priv, "enter\n");
2965
2966         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2967                             iv32, phase1key);
2968
2969         IWL_DEBUG_MAC80211(priv, "leave\n");
2970 }
2971
2972 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2973                               struct ieee80211_vif *vif,
2974                               struct ieee80211_sta *sta,
2975                               struct ieee80211_key_conf *key)
2976 {
2977         struct iwl_priv *priv = hw->priv;
2978         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2979         struct iwl_rxon_context *ctx = vif_priv->ctx;
2980         int ret;
2981         u8 sta_id;
2982         bool is_default_wep_key = false;
2983
2984         IWL_DEBUG_MAC80211(priv, "enter\n");
2985
2986         if (priv->cfg->mod_params->sw_crypto) {
2987                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2988                 return -EOPNOTSUPP;
2989         }
2990
2991         /*
2992          * To support IBSS RSN, don't program group keys in IBSS, the
2993          * hardware will then not attempt to decrypt the frames.
2994          */
2995         if (vif->type == NL80211_IFTYPE_ADHOC &&
2996             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2997                 return -EOPNOTSUPP;
2998
2999         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3000         if (sta_id == IWL_INVALID_STATION)
3001                 return -EINVAL;
3002
3003         mutex_lock(&priv->mutex);
3004         iwl_scan_cancel_timeout(priv, 100);
3005
3006         /*
3007          * If we are getting WEP group key and we didn't receive any key mapping
3008          * so far, we are in legacy wep mode (group key only), otherwise we are
3009          * in 1X mode.
3010          * In legacy wep mode, we use another host command to the uCode.
3011          */
3012         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3013              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3014             !sta) {
3015                 if (cmd == SET_KEY)
3016                         is_default_wep_key = !ctx->key_mapping_keys;
3017                 else
3018                         is_default_wep_key =
3019                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3020         }
3021
3022         switch (cmd) {
3023         case SET_KEY:
3024                 if (is_default_wep_key)
3025                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3026                 else
3027                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3028                                                   key, sta_id);
3029
3030                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3031                 break;
3032         case DISABLE_KEY:
3033                 if (is_default_wep_key)
3034                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3035                 else
3036                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3037
3038                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3039                 break;
3040         default:
3041                 ret = -EINVAL;
3042         }
3043
3044         mutex_unlock(&priv->mutex);
3045         IWL_DEBUG_MAC80211(priv, "leave\n");
3046
3047         return ret;
3048 }
3049
3050 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3051                                    struct ieee80211_vif *vif,
3052                                    enum ieee80211_ampdu_mlme_action action,
3053                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
3054                                    u8 buf_size)
3055 {
3056         struct iwl_priv *priv = hw->priv;
3057         int ret = -EINVAL;
3058         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
3059
3060         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3061                      sta->addr, tid);
3062
3063         if (!(priv->cfg->sku & IWL_SKU_N))
3064                 return -EACCES;
3065
3066         mutex_lock(&priv->mutex);
3067
3068         switch (action) {
3069         case IEEE80211_AMPDU_RX_START:
3070                 IWL_DEBUG_HT(priv, "start Rx\n");
3071                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3072                 break;
3073         case IEEE80211_AMPDU_RX_STOP:
3074                 IWL_DEBUG_HT(priv, "stop Rx\n");
3075                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3076                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3077                         ret = 0;
3078                 break;
3079         case IEEE80211_AMPDU_TX_START:
3080                 IWL_DEBUG_HT(priv, "start Tx\n");
3081                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3082                 if (ret == 0) {
3083                         priv->_agn.agg_tids_count++;
3084                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3085                                      priv->_agn.agg_tids_count);
3086                 }
3087                 break;
3088         case IEEE80211_AMPDU_TX_STOP:
3089                 IWL_DEBUG_HT(priv, "stop Tx\n");
3090                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3091                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3092                         priv->_agn.agg_tids_count--;
3093                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3094                                      priv->_agn.agg_tids_count);
3095                 }
3096                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3097                         ret = 0;
3098                 if (priv->cfg->ht_params &&
3099                     priv->cfg->ht_params->use_rts_for_aggregation) {
3100                         struct iwl_station_priv *sta_priv =
3101                                 (void *) sta->drv_priv;
3102                         /*
3103                          * switch off RTS/CTS if it was previously enabled
3104                          */
3105
3106                         sta_priv->lq_sta.lq.general_params.flags &=
3107                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3108                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3109                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3110                 }
3111                 break;
3112         case IEEE80211_AMPDU_TX_OPERATIONAL:
3113                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
3114
3115                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
3116
3117                 /*
3118                  * If the limit is 0, then it wasn't initialised yet,
3119                  * use the default. We can do that since we take the
3120                  * minimum below, and we don't want to go above our
3121                  * default due to hardware restrictions.
3122                  */
3123                 if (sta_priv->max_agg_bufsize == 0)
3124                         sta_priv->max_agg_bufsize =
3125                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
3126
3127                 /*
3128                  * Even though in theory the peer could have different
3129                  * aggregation reorder buffer sizes for different sessions,
3130                  * our ucode doesn't allow for that and has a global limit
3131                  * for each station. Therefore, use the minimum of all the
3132                  * aggregation sessions and our default value.
3133                  */
3134                 sta_priv->max_agg_bufsize =
3135                         min(sta_priv->max_agg_bufsize, buf_size);
3136
3137                 if (priv->cfg->ht_params &&
3138                     priv->cfg->ht_params->use_rts_for_aggregation) {
3139                         /*
3140                          * switch to RTS/CTS if it is the prefer protection
3141                          * method for HT traffic
3142                          */
3143
3144                         sta_priv->lq_sta.lq.general_params.flags |=
3145                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3146                 }
3147
3148                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
3149                         sta_priv->max_agg_bufsize;
3150
3151                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3152                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3153                 ret = 0;
3154                 break;
3155         }
3156         mutex_unlock(&priv->mutex);
3157
3158         return ret;
3159 }
3160
3161 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3162                               struct ieee80211_vif *vif,
3163                               struct ieee80211_sta *sta)
3164 {
3165         struct iwl_priv *priv = hw->priv;
3166         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3167         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3168         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3169         int ret;
3170         u8 sta_id;
3171
3172         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3173                         sta->addr);
3174         mutex_lock(&priv->mutex);
3175         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3176                         sta->addr);
3177         sta_priv->common.sta_id = IWL_INVALID_STATION;
3178
3179         atomic_set(&sta_priv->pending_frames, 0);
3180         if (vif->type == NL80211_IFTYPE_AP)
3181                 sta_priv->client = true;
3182
3183         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3184                                      is_ap, sta, &sta_id);
3185         if (ret) {
3186                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3187                         sta->addr, ret);
3188                 /* Should we return success if return code is EEXIST ? */
3189                 mutex_unlock(&priv->mutex);
3190                 return ret;
3191         }
3192
3193         sta_priv->common.sta_id = sta_id;
3194
3195         /* Initialize rate scaling */
3196         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3197                        sta->addr);
3198         iwl_rs_rate_init(priv, sta, sta_id);
3199         mutex_unlock(&priv->mutex);
3200
3201         return 0;
3202 }
3203
3204 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3205                                 struct ieee80211_channel_switch *ch_switch)
3206 {
3207         struct iwl_priv *priv = hw->priv;
3208         const struct iwl_channel_info *ch_info;
3209         struct ieee80211_conf *conf = &hw->conf;
3210         struct ieee80211_channel *channel = ch_switch->channel;
3211         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3212         /*
3213          * MULTI-FIXME
3214          * When we add support for multiple interfaces, we need to
3215          * revisit this. The channel switch command in the device
3216          * only affects the BSS context, but what does that really
3217          * mean? And what if we get a CSA on the second interface?
3218          * This needs a lot of work.
3219          */
3220         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3221         u16 ch;
3222         unsigned long flags = 0;
3223
3224         IWL_DEBUG_MAC80211(priv, "enter\n");
3225
3226         mutex_lock(&priv->mutex);
3227
3228         if (iwl_is_rfkill(priv))
3229                 goto out;
3230
3231         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3232             test_bit(STATUS_SCANNING, &priv->status))
3233                 goto out;
3234
3235         if (!iwl_is_associated_ctx(ctx))
3236                 goto out;
3237
3238         /* channel switch in progress */
3239         if (priv->switch_rxon.switch_in_progress == true)
3240                 goto out;
3241
3242         if (priv->cfg->ops->lib->set_channel_switch) {
3243
3244                 ch = channel->hw_value;
3245                 if (le16_to_cpu(ctx->active.channel) != ch) {
3246                         ch_info = iwl_get_channel_info(priv,
3247                                                        channel->band,
3248                                                        ch);
3249                         if (!is_channel_valid(ch_info)) {
3250                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3251                                 goto out;
3252                         }
3253                         spin_lock_irqsave(&priv->lock, flags);
3254
3255                         priv->current_ht_config.smps = conf->smps_mode;
3256
3257                         /* Configure HT40 channels */
3258                         ctx->ht.enabled = conf_is_ht(conf);
3259                         if (ctx->ht.enabled) {
3260                                 if (conf_is_ht40_minus(conf)) {
3261                                         ctx->ht.extension_chan_offset =
3262                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3263                                         ctx->ht.is_40mhz = true;
3264                                 } else if (conf_is_ht40_plus(conf)) {
3265                                         ctx->ht.extension_chan_offset =
3266                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3267                                         ctx->ht.is_40mhz = true;
3268                                 } else {
3269                                         ctx->ht.extension_chan_offset =
3270                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3271                                         ctx->ht.is_40mhz = false;
3272                                 }
3273                         } else
3274                                 ctx->ht.is_40mhz = false;
3275
3276                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3277                                 ctx->staging.flags = 0;
3278
3279                         iwl_set_rxon_channel(priv, channel, ctx);
3280                         iwl_set_rxon_ht(priv, ht_conf);
3281                         iwl_set_flags_for_band(priv, ctx, channel->band,
3282                                                ctx->vif);
3283                         spin_unlock_irqrestore(&priv->lock, flags);
3284
3285                         iwl_set_rate(priv);
3286                         /*
3287                          * at this point, staging_rxon has the
3288                          * configuration for channel switch
3289                          */
3290                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3291                                                                     ch_switch))
3292                                 priv->switch_rxon.switch_in_progress = false;
3293                 }
3294         }
3295 out:
3296         mutex_unlock(&priv->mutex);
3297         if (!priv->switch_rxon.switch_in_progress)
3298                 ieee80211_chswitch_done(ctx->vif, false);
3299         IWL_DEBUG_MAC80211(priv, "leave\n");
3300 }
3301
3302 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3303                                     unsigned int changed_flags,
3304                                     unsigned int *total_flags,
3305                                     u64 multicast)
3306 {
3307         struct iwl_priv *priv = hw->priv;
3308         __le32 filter_or = 0, filter_nand = 0;
3309         struct iwl_rxon_context *ctx;
3310
3311 #define CHK(test, flag) do { \
3312         if (*total_flags & (test))              \
3313                 filter_or |= (flag);            \
3314         else                                    \
3315                 filter_nand |= (flag);          \
3316         } while (0)
3317
3318         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3319                         changed_flags, *total_flags);
3320
3321         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3322         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
3323         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
3324         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3325
3326 #undef CHK
3327
3328         mutex_lock(&priv->mutex);
3329
3330         for_each_context(priv, ctx) {
3331                 ctx->staging.filter_flags &= ~filter_nand;
3332                 ctx->staging.filter_flags |= filter_or;
3333
3334                 /*
3335                  * Not committing directly because hardware can perform a scan,
3336                  * but we'll eventually commit the filter flags change anyway.
3337                  */
3338         }
3339
3340         mutex_unlock(&priv->mutex);
3341
3342         /*
3343          * Receiving all multicast frames is always enabled by the
3344          * default flags setup in iwl_connection_init_rx_config()
3345          * since we currently do not support programming multicast
3346          * filters into the device.
3347          */
3348         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3349                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3350 }
3351
3352 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3353 {
3354         struct iwl_priv *priv = hw->priv;
3355
3356         mutex_lock(&priv->mutex);
3357         IWL_DEBUG_MAC80211(priv, "enter\n");
3358
3359         /* do not support "flush" */
3360         if (!priv->cfg->ops->lib->txfifo_flush)
3361                 goto done;
3362
3363         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3364                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3365                 goto done;
3366         }
3367         if (iwl_is_rfkill(priv)) {
3368                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3369                 goto done;
3370         }
3371
3372         /*
3373          * mac80211 will not push any more frames for transmit
3374          * until the flush is completed
3375          */
3376         if (drop) {
3377                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3378                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3379                         IWL_ERR(priv, "flush request fail\n");
3380                         goto done;
3381                 }
3382         }
3383         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3384         iwlagn_wait_tx_queue_empty(priv);
3385 done:
3386         mutex_unlock(&priv->mutex);
3387         IWL_DEBUG_MAC80211(priv, "leave\n");
3388 }
3389
3390 static void iwlagn_disable_roc(struct iwl_priv *priv)
3391 {
3392         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3393         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3394
3395         lockdep_assert_held(&priv->mutex);
3396
3397         if (!ctx->is_active)
3398                 return;
3399
3400         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3401         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3402         iwl_set_rxon_channel(priv, chan, ctx);
3403         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3404
3405         priv->_agn.hw_roc_channel = NULL;
3406
3407         iwlcore_commit_rxon(priv, ctx);
3408
3409         ctx->is_active = false;
3410 }
3411
3412 static void iwlagn_bg_roc_done(struct work_struct *work)
3413 {
3414         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3415                                              _agn.hw_roc_work.work);
3416
3417         mutex_lock(&priv->mutex);
3418         ieee80211_remain_on_channel_expired(priv->hw);
3419         iwlagn_disable_roc(priv);
3420         mutex_unlock(&priv->mutex);
3421 }
3422
3423 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3424                                      struct ieee80211_channel *channel,
3425                                      enum nl80211_channel_type channel_type,
3426                                      int duration)
3427 {
3428         struct iwl_priv *priv = hw->priv;
3429         int err = 0;
3430
3431         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3432                 return -EOPNOTSUPP;
3433
3434         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3435                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3436                 return -EOPNOTSUPP;
3437
3438         mutex_lock(&priv->mutex);
3439
3440         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3441             test_bit(STATUS_SCAN_HW, &priv->status)) {
3442                 err = -EBUSY;
3443                 goto out;
3444         }
3445
3446         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3447         priv->_agn.hw_roc_channel = channel;
3448         priv->_agn.hw_roc_chantype = channel_type;
3449         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3450         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3451         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3452                            msecs_to_jiffies(duration + 20));
3453
3454         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3455         ieee80211_ready_on_channel(priv->hw);
3456
3457  out:
3458         mutex_unlock(&priv->mutex);
3459
3460         return err;
3461 }
3462
3463 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3464 {
3465         struct iwl_priv *priv = hw->priv;
3466
3467         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3468                 return -EOPNOTSUPP;
3469
3470         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3471
3472         mutex_lock(&priv->mutex);
3473         iwlagn_disable_roc(priv);
3474         mutex_unlock(&priv->mutex);
3475
3476         return 0;
3477 }
3478
3479 /*****************************************************************************
3480  *
3481  * driver setup and teardown
3482  *
3483  *****************************************************************************/
3484
3485 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3486 {
3487         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3488
3489         init_waitqueue_head(&priv->wait_command_queue);
3490
3491         INIT_WORK(&priv->restart, iwl_bg_restart);
3492         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3493         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3494         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3495         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3496         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3497         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3498         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3499         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3500         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3501
3502         iwl_setup_scan_deferred_work(priv);
3503
3504         if (priv->cfg->ops->lib->setup_deferred_work)
3505                 priv->cfg->ops->lib->setup_deferred_work(priv);
3506
3507         init_timer(&priv->statistics_periodic);
3508         priv->statistics_periodic.data = (unsigned long)priv;
3509         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3510
3511         init_timer(&priv->ucode_trace);
3512         priv->ucode_trace.data = (unsigned long)priv;
3513         priv->ucode_trace.function = iwl_bg_ucode_trace;
3514
3515         init_timer(&priv->watchdog);
3516         priv->watchdog.data = (unsigned long)priv;
3517         priv->watchdog.function = iwl_bg_watchdog;
3518
3519         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3520                 iwl_irq_tasklet, (unsigned long)priv);
3521 }
3522
3523 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3524 {
3525         if (priv->cfg->ops->lib->cancel_deferred_work)
3526                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3527
3528         cancel_delayed_work_sync(&priv->init_alive_start);
3529         cancel_delayed_work(&priv->alive_start);
3530         cancel_work_sync(&priv->run_time_calib_work);
3531         cancel_work_sync(&priv->beacon_update);
3532
3533         iwl_cancel_scan_deferred_work(priv);
3534
3535         cancel_work_sync(&priv->bt_full_concurrency);
3536         cancel_work_sync(&priv->bt_runtime_config);
3537
3538         del_timer_sync(&priv->statistics_periodic);
3539         del_timer_sync(&priv->ucode_trace);
3540 }
3541
3542 static void iwl_init_hw_rates(struct iwl_priv *priv,
3543                               struct ieee80211_rate *rates)
3544 {
3545         int i;
3546
3547         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3548                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3549                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3550                 rates[i].hw_value_short = i;
3551                 rates[i].flags = 0;
3552                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3553                         /*
3554                          * If CCK != 1M then set short preamble rate flag.
3555                          */
3556                         rates[i].flags |=
3557                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3558                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3559                 }
3560         }
3561 }
3562
3563 static int iwl_init_drv(struct iwl_priv *priv)
3564 {
3565         int ret;
3566
3567         spin_lock_init(&priv->sta_lock);
3568         spin_lock_init(&priv->hcmd_lock);
3569
3570         INIT_LIST_HEAD(&priv->free_frames);
3571
3572         mutex_init(&priv->mutex);
3573
3574         priv->ieee_channels = NULL;
3575         priv->ieee_rates = NULL;
3576         priv->band = IEEE80211_BAND_2GHZ;
3577
3578         priv->iw_mode = NL80211_IFTYPE_STATION;
3579         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3580         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3581         priv->_agn.agg_tids_count = 0;
3582
3583         /* initialize force reset */
3584         priv->force_reset[IWL_RF_RESET].reset_duration =
3585                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3586         priv->force_reset[IWL_FW_RESET].reset_duration =
3587                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3588
3589         priv->rx_statistics_jiffies = jiffies;
3590
3591         /* Choose which receivers/antennas to use */
3592         if (priv->cfg->ops->hcmd->set_rxon_chain)
3593                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3594                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3595
3596         iwl_init_scan_params(priv);
3597
3598         /* init bt coex */
3599         if (priv->cfg->bt_params &&
3600             priv->cfg->bt_params->advanced_bt_coexist) {
3601                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3602                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3603                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3604                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3605                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3606                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3607         }
3608
3609         /* Set the tx_power_user_lmt to the lowest power level
3610          * this value will get overwritten by channel max power avg
3611          * from eeprom */
3612         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3613         priv->tx_power_next = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3614
3615         ret = iwl_init_channel_map(priv);
3616         if (ret) {
3617                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3618                 goto err;
3619         }
3620
3621         ret = iwlcore_init_geos(priv);
3622         if (ret) {
3623                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3624                 goto err_free_channel_map;
3625         }
3626         iwl_init_hw_rates(priv, priv->ieee_rates);
3627
3628         return 0;
3629
3630 err_free_channel_map:
3631         iwl_free_channel_map(priv);
3632 err:
3633         return ret;
3634 }
3635
3636 static void iwl_uninit_drv(struct iwl_priv *priv)
3637 {
3638         iwl_calib_free_results(priv);
3639         iwlcore_free_geos(priv);
3640         iwl_free_channel_map(priv);
3641         kfree(priv->scan_cmd);
3642 }
3643
3644 struct ieee80211_ops iwlagn_hw_ops = {
3645         .tx = iwlagn_mac_tx,
3646         .start = iwlagn_mac_start,
3647         .stop = iwlagn_mac_stop,
3648         .add_interface = iwl_mac_add_interface,
3649         .remove_interface = iwl_mac_remove_interface,
3650         .change_interface = iwl_mac_change_interface,
3651         .config = iwlagn_mac_config,
3652         .configure_filter = iwlagn_configure_filter,
3653         .set_key = iwlagn_mac_set_key,
3654         .update_tkip_key = iwlagn_mac_update_tkip_key,
3655         .conf_tx = iwl_mac_conf_tx,
3656         .bss_info_changed = iwlagn_bss_info_changed,
3657         .ampdu_action = iwlagn_mac_ampdu_action,
3658         .hw_scan = iwl_mac_hw_scan,
3659         .sta_notify = iwlagn_mac_sta_notify,
3660         .sta_add = iwlagn_mac_sta_add,
3661         .sta_remove = iwl_mac_sta_remove,
3662         .channel_switch = iwlagn_mac_channel_switch,
3663         .flush = iwlagn_mac_flush,
3664         .tx_last_beacon = iwl_mac_tx_last_beacon,
3665         .remain_on_channel = iwl_mac_remain_on_channel,
3666         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3667         .offchannel_tx = iwl_mac_offchannel_tx,
3668         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3669 };
3670
3671 static u32 iwl_hw_detect(struct iwl_priv *priv)
3672 {
3673         u8 rev_id;
3674
3675         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3676         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3677         return iwl_read32(priv, CSR_HW_REV);
3678 }
3679
3680 static int iwl_set_hw_params(struct iwl_priv *priv)
3681 {
3682         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3683         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3684         if (priv->cfg->mod_params->amsdu_size_8K)
3685                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3686         else
3687                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3688
3689         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3690
3691         if (priv->cfg->mod_params->disable_11n)
3692                 priv->cfg->sku &= ~IWL_SKU_N;
3693
3694         /* Device-specific setup */
3695         return priv->cfg->ops->lib->set_hw_params(priv);
3696 }
3697
3698 static const u8 iwlagn_bss_ac_to_fifo[] = {
3699         IWL_TX_FIFO_VO,
3700         IWL_TX_FIFO_VI,
3701         IWL_TX_FIFO_BE,
3702         IWL_TX_FIFO_BK,
3703 };
3704
3705 static const u8 iwlagn_bss_ac_to_queue[] = {
3706         0, 1, 2, 3,
3707 };
3708
3709 static const u8 iwlagn_pan_ac_to_fifo[] = {
3710         IWL_TX_FIFO_VO_IPAN,
3711         IWL_TX_FIFO_VI_IPAN,
3712         IWL_TX_FIFO_BE_IPAN,
3713         IWL_TX_FIFO_BK_IPAN,
3714 };
3715
3716 static const u8 iwlagn_pan_ac_to_queue[] = {
3717         7, 6, 5, 4,
3718 };
3719
3720 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3721 {
3722         int err = 0, i;
3723         struct iwl_priv *priv;
3724         struct ieee80211_hw *hw;
3725         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3726         unsigned long flags;
3727         u16 pci_cmd, num_mac;
3728         u32 hw_rev;
3729
3730         /************************
3731          * 1. Allocating HW data
3732          ************************/
3733
3734         hw = iwl_alloc_all(cfg);
3735         if (!hw) {
3736                 err = -ENOMEM;
3737                 goto out;
3738         }
3739         priv = hw->priv;
3740         /* At this point both hw and priv are allocated. */
3741
3742         /*
3743          * The default context is always valid,
3744          * more may be discovered when firmware
3745          * is loaded.
3746          */
3747         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3748
3749         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3750                 priv->contexts[i].ctxid = i;
3751
3752         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3753         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3754         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3755         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3756         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3757         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3758         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3759         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3760         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3761         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3762         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3763                 BIT(NL80211_IFTYPE_ADHOC);
3764         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3765                 BIT(NL80211_IFTYPE_STATION);
3766         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3767         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3768         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3769         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3770
3771         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3772         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3773         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3774         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3775         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3776         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3777         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3778         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3779         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3780         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3781         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3782         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3783                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3784 #ifdef CONFIG_IWL_P2P
3785         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3786                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3787 #endif
3788         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3789         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3790         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3791
3792         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3793
3794         SET_IEEE80211_DEV(hw, &pdev->dev);
3795
3796         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3797         priv->cfg = cfg;
3798         priv->pci_dev = pdev;
3799         priv->inta_mask = CSR_INI_SET_MASK;
3800
3801         /* is antenna coupling more than 35dB ? */
3802         priv->bt_ant_couple_ok =
3803                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3804                 true : false;
3805
3806         /* enable/disable bt channel inhibition */
3807         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3808         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3809                        (priv->bt_ch_announce) ? "On" : "Off");
3810
3811         if (iwl_alloc_traffic_mem(priv))
3812                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3813
3814         /**************************
3815          * 2. Initializing PCI bus
3816          **************************/
3817         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3818                                 PCIE_LINK_STATE_CLKPM);
3819
3820         if (pci_enable_device(pdev)) {
3821                 err = -ENODEV;
3822                 goto out_ieee80211_free_hw;
3823         }
3824
3825         pci_set_master(pdev);
3826
3827         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3828         if (!err)
3829                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3830         if (err) {
3831                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3832                 if (!err)
3833                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3834                 /* both attempts failed: */
3835                 if (err) {
3836                         IWL_WARN(priv, "No suitable DMA available.\n");
3837                         goto out_pci_disable_device;
3838                 }
3839         }
3840
3841         err = pci_request_regions(pdev, DRV_NAME);
3842         if (err)
3843                 goto out_pci_disable_device;
3844
3845         pci_set_drvdata(pdev, priv);
3846
3847
3848         /***********************
3849          * 3. Read REV register
3850          ***********************/
3851         priv->hw_base = pci_iomap(pdev, 0, 0);
3852         if (!priv->hw_base) {
3853                 err = -ENODEV;
3854                 goto out_pci_release_regions;
3855         }
3856
3857         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3858                 (unsigned long long) pci_resource_len(pdev, 0));
3859         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3860
3861         /* these spin locks will be used in apm_ops.init and EEPROM access
3862          * we should init now
3863          */
3864         spin_lock_init(&priv->reg_lock);
3865         spin_lock_init(&priv->lock);
3866
3867         /*
3868          * stop and reset the on-board processor just in case it is in a
3869          * strange state ... like being left stranded by a primary kernel
3870          * and this is now the kdump kernel trying to start up
3871          */
3872         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3873
3874         hw_rev = iwl_hw_detect(priv);
3875         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3876                 priv->cfg->name, hw_rev);
3877
3878         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3879          * PCI Tx retries from interfering with C3 CPU state */
3880         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3881
3882         iwl_prepare_card_hw(priv);
3883         if (!priv->hw_ready) {
3884                 IWL_WARN(priv, "Failed, HW not ready\n");
3885                 goto out_iounmap;
3886         }
3887
3888         /*****************
3889          * 4. Read EEPROM
3890          *****************/
3891         /* Read the EEPROM */
3892         err = iwl_eeprom_init(priv, hw_rev);
3893         if (err) {
3894                 IWL_ERR(priv, "Unable to init EEPROM\n");
3895                 goto out_iounmap;
3896         }
3897         err = iwl_eeprom_check_version(priv);
3898         if (err)
3899                 goto out_free_eeprom;
3900
3901         err = iwl_eeprom_check_sku(priv);
3902         if (err)
3903                 goto out_free_eeprom;
3904
3905         /* extract MAC Address */
3906         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3907         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3908         priv->hw->wiphy->addresses = priv->addresses;
3909         priv->hw->wiphy->n_addresses = 1;
3910         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3911         if (num_mac > 1) {
3912                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3913                        ETH_ALEN);
3914                 priv->addresses[1].addr[5]++;
3915                 priv->hw->wiphy->n_addresses++;
3916         }
3917
3918         /************************
3919          * 5. Setup HW constants
3920          ************************/
3921         if (iwl_set_hw_params(priv)) {
3922                 IWL_ERR(priv, "failed to set hw parameters\n");
3923                 goto out_free_eeprom;
3924         }
3925
3926         /*******************
3927          * 6. Setup priv
3928          *******************/
3929
3930         err = iwl_init_drv(priv);
3931         if (err)
3932                 goto out_free_eeprom;
3933         /* At this point both hw and priv are initialized. */
3934
3935         /********************
3936          * 7. Setup services
3937          ********************/
3938         spin_lock_irqsave(&priv->lock, flags);
3939         iwl_disable_interrupts(priv);
3940         spin_unlock_irqrestore(&priv->lock, flags);
3941
3942         pci_enable_msi(priv->pci_dev);
3943
3944         iwl_alloc_isr_ict(priv);
3945
3946         err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
3947                           IRQF_SHARED, DRV_NAME, priv);
3948         if (err) {
3949                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3950                 goto out_disable_msi;
3951         }
3952
3953         iwl_setup_deferred_work(priv);
3954         iwl_setup_rx_handlers(priv);
3955
3956         /*********************************************
3957          * 8. Enable interrupts and read RFKILL state
3958          *********************************************/
3959
3960         /* enable rfkill interrupt: hw bug w/a */
3961         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3962         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3963                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3964                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3965         }
3966
3967         iwl_enable_rfkill_int(priv);
3968
3969         /* If platform's RF_KILL switch is NOT set to KILL */
3970         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3971                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3972         else
3973                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3974
3975         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3976                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3977
3978         iwl_power_initialize(priv);
3979         iwl_tt_initialize(priv);
3980
3981         init_completion(&priv->_agn.firmware_loading_complete);
3982
3983         err = iwl_request_firmware(priv, true);
3984         if (err)
3985                 goto out_destroy_workqueue;
3986
3987         return 0;
3988
3989  out_destroy_workqueue:
3990         destroy_workqueue(priv->workqueue);
3991         priv->workqueue = NULL;
3992         free_irq(priv->pci_dev->irq, priv);
3993         iwl_free_isr_ict(priv);
3994  out_disable_msi:
3995         pci_disable_msi(priv->pci_dev);
3996         iwl_uninit_drv(priv);
3997  out_free_eeprom:
3998         iwl_eeprom_free(priv);
3999  out_iounmap:
4000         pci_iounmap(pdev, priv->hw_base);
4001  out_pci_release_regions:
4002         pci_set_drvdata(pdev, NULL);
4003         pci_release_regions(pdev);
4004  out_pci_disable_device:
4005         pci_disable_device(pdev);
4006  out_ieee80211_free_hw:
4007         iwl_free_traffic_mem(priv);
4008         ieee80211_free_hw(priv->hw);
4009  out:
4010         return err;
4011 }
4012
4013 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4014 {
4015         struct iwl_priv *priv = pci_get_drvdata(pdev);
4016         unsigned long flags;
4017
4018         if (!priv)
4019                 return;
4020
4021         wait_for_completion(&priv->_agn.firmware_loading_complete);
4022
4023         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4024
4025         iwl_dbgfs_unregister(priv);
4026         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4027
4028         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4029          * to be called and iwl_down since we are removing the device
4030          * we need to set STATUS_EXIT_PENDING bit.
4031          */
4032         set_bit(STATUS_EXIT_PENDING, &priv->status);
4033
4034         iwl_leds_exit(priv);
4035
4036         if (priv->mac80211_registered) {
4037                 ieee80211_unregister_hw(priv->hw);
4038                 priv->mac80211_registered = 0;
4039         } else {
4040                 iwl_down(priv);
4041         }
4042
4043         /*
4044          * Make sure device is reset to low power before unloading driver.
4045          * This may be redundant with iwl_down(), but there are paths to
4046          * run iwl_down() without calling apm_ops.stop(), and there are
4047          * paths to avoid running iwl_down() at all before leaving driver.
4048          * This (inexpensive) call *makes sure* device is reset.
4049          */
4050         iwl_apm_stop(priv);
4051
4052         iwl_tt_exit(priv);
4053
4054         /* make sure we flush any pending irq or
4055          * tasklet for the driver
4056          */
4057         spin_lock_irqsave(&priv->lock, flags);
4058         iwl_disable_interrupts(priv);
4059         spin_unlock_irqrestore(&priv->lock, flags);
4060
4061         iwl_synchronize_irq(priv);
4062
4063         iwl_dealloc_ucode_pci(priv);
4064
4065         if (priv->rxq.bd)
4066                 iwlagn_rx_queue_free(priv, &priv->rxq);
4067         iwlagn_hw_txq_ctx_free(priv);
4068
4069         iwl_eeprom_free(priv);
4070
4071
4072         /*netif_stop_queue(dev); */
4073         flush_workqueue(priv->workqueue);
4074
4075         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4076          * priv->workqueue... so we can't take down the workqueue
4077          * until now... */
4078         destroy_workqueue(priv->workqueue);
4079         priv->workqueue = NULL;
4080         iwl_free_traffic_mem(priv);
4081
4082         free_irq(priv->pci_dev->irq, priv);
4083         pci_disable_msi(priv->pci_dev);
4084         pci_iounmap(pdev, priv->hw_base);
4085         pci_release_regions(pdev);
4086         pci_disable_device(pdev);
4087         pci_set_drvdata(pdev, NULL);
4088
4089         iwl_uninit_drv(priv);
4090
4091         iwl_free_isr_ict(priv);
4092
4093         dev_kfree_skb(priv->beacon_skb);
4094
4095         ieee80211_free_hw(priv->hw);
4096 }
4097
4098
4099 /*****************************************************************************
4100  *
4101  * driver and module entry point
4102  *
4103  *****************************************************************************/
4104
4105 /* Hardware specific file defines the PCI IDs table for that hardware module */
4106 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4107         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4108         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4109         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4110         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4111         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4112         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4113         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4114         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4115         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4116         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4117         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4118         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4119         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4120         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4121         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4122         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4123         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4124         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4125         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4126         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4127         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4128         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4129         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4130         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4131
4132 /* 5300 Series WiFi */
4133         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4134         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4135         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4136         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4137         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4138         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4139         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4140         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4141         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4142         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4143         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4144         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4145
4146 /* 5350 Series WiFi/WiMax */
4147         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4148         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4149         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4150
4151 /* 5150 Series Wifi/WiMax */
4152         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4153         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4154         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4155         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4156         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4157         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4158
4159         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4160         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4161         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4162         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4163
4164 /* 6x00 Series */
4165         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4166         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4167         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4168         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4169         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4170         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4171         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4172         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4173         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4174         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4175
4176 /* 6x05 Series */
4177         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
4178         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
4179         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
4180         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
4181         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
4182         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
4183         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
4184
4185 /* 6x30 Series */
4186         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
4187         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
4188         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
4189         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
4190         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
4191         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
4192         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
4193         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
4194         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
4195         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
4196         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
4197         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
4198         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
4199         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
4200         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
4201         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
4202
4203 /* 6x50 WiFi/WiMax Series */
4204         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4205         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4206         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4207         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4208         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4209         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4210
4211 /* 6150 WiFi/WiMax Series */
4212         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
4213         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg)},
4214         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
4215         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg)},
4216         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
4217         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg)},
4218
4219 /* 1000 Series WiFi */
4220         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4221         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4222         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4223         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4224         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4225         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4226         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4227         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4228         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4229         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4230         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4231         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4232
4233 /* 100 Series WiFi */
4234         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4235         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4236         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4237         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
4238         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4239         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
4240
4241 /* 130 Series WiFi */
4242         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4243         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4244         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4245         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4246         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4247         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4248
4249 /* 2x00 Series */
4250         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
4251         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
4252         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
4253         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
4254         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
4255         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
4256
4257 /* 2x30 Series */
4258         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
4259         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
4260         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
4261         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
4262         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
4263         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
4264
4265 /* 6x35 Series */
4266         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
4267         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
4268         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
4269         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
4270         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
4271         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
4272         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
4273         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
4274         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
4275
4276 /* 200 Series */
4277         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl200_bgn_cfg)},
4278         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl200_bgn_cfg)},
4279         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl200_bgn_cfg)},
4280         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl200_bg_cfg)},
4281         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl200_bg_cfg)},
4282         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl200_bg_cfg)},
4283
4284 /* 230 Series */
4285         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl230_bgn_cfg)},
4286         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl230_bgn_cfg)},
4287         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl230_bgn_cfg)},
4288         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl230_bg_cfg)},
4289         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl230_bg_cfg)},
4290         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl230_bg_cfg)},
4291
4292         {0}
4293 };
4294 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4295
4296 static struct pci_driver iwl_driver = {
4297         .name = DRV_NAME,
4298         .id_table = iwl_hw_card_ids,
4299         .probe = iwl_pci_probe,
4300         .remove = __devexit_p(iwl_pci_remove),
4301         .driver.pm = IWL_PM_OPS,
4302 };
4303
4304 static int __init iwl_init(void)
4305 {
4306
4307         int ret;
4308         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4309         pr_info(DRV_COPYRIGHT "\n");
4310
4311         ret = iwlagn_rate_control_register();
4312         if (ret) {
4313                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4314                 return ret;
4315         }
4316
4317         ret = pci_register_driver(&iwl_driver);
4318         if (ret) {
4319                 pr_err("Unable to initialize PCI module\n");
4320                 goto error_register;
4321         }
4322
4323         return ret;
4324
4325 error_register:
4326         iwlagn_rate_control_unregister();
4327         return ret;
4328 }
4329
4330 static void __exit iwl_exit(void)
4331 {
4332         pci_unregister_driver(&iwl_driver);
4333         iwlagn_rate_control_unregister();
4334 }
4335
4336 module_exit(iwl_exit);
4337 module_init(iwl_init);
4338
4339 #ifdef CONFIG_IWLWIFI_DEBUG
4340 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4341 MODULE_PARM_DESC(debug, "debug output mask");
4342 #endif
4343
4344 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4345 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4346 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4347 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4348 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4349 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4350 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4351                    int, S_IRUGO);
4352 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4353 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4354 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4355
4356 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4357                    S_IRUGO);
4358 MODULE_PARM_DESC(ucode_alternative,
4359                  "specify ucode alternative to use from ucode file");
4360
4361 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4362 MODULE_PARM_DESC(antenna_coupling,
4363                  "specify antenna coupling in dB (defualt: 0 dB)");
4364
4365 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
4366 MODULE_PARM_DESC(bt_ch_inhibition,
4367                  "Disable BT channel inhibition (default: enable)");
4368
4369 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
4370 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
4371
4372 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
4373 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");