iwlwifi: add bt full concurrency support
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-calib.h"
61 #include "iwl-agn.h"
62
63
64 /******************************************************************************
65  *
66  * module boiler plate
67  *
68  ******************************************************************************/
69
70 /*
71  * module name, copyright, version, etc.
72  */
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
74
75 #ifdef CONFIG_IWLWIFI_DEBUG
76 #define VD "d"
77 #else
78 #define VD
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 static int iwlagn_ant_coupling;
91
92 /**
93  * iwl_commit_rxon - commit staging_rxon to hardware
94  *
95  * The RXON command in staging_rxon is committed to the hardware and
96  * the active_rxon structure is updated with the new data.  This
97  * function correctly transitions out of the RXON_ASSOC_MSK state if
98  * a HW tune is required based on the RXON structure changes.
99  */
100 int iwl_commit_rxon(struct iwl_priv *priv)
101 {
102         /* cast away the const for active_rxon in this function */
103         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
104         int ret;
105         bool new_assoc =
106                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
107
108         if (!iwl_is_alive(priv))
109                 return -EBUSY;
110
111         /* always get timestamp with Rx frame */
112         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
113
114         ret = iwl_check_rxon_cmd(priv);
115         if (ret) {
116                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
117                 return -EINVAL;
118         }
119
120         /*
121          * receive commit_rxon request
122          * abort any previous channel switch if still in process
123          */
124         if (priv->switch_rxon.switch_in_progress &&
125             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
126                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
127                       le16_to_cpu(priv->switch_rxon.channel));
128                 iwl_chswitch_done(priv, false);
129         }
130
131         /* If we don't need to send a full RXON, we can use
132          * iwl_rxon_assoc_cmd which is used to reconfigure filter
133          * and other flags for the current radio configuration. */
134         if (!iwl_full_rxon_required(priv)) {
135                 ret = iwl_send_rxon_assoc(priv);
136                 if (ret) {
137                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
138                         return ret;
139                 }
140
141                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
142                 iwl_print_rx_config_cmd(priv);
143                 return 0;
144         }
145
146         /* If we are currently associated and the new config requires
147          * an RXON_ASSOC and the new config wants the associated mask enabled,
148          * we must clear the associated from the active configuration
149          * before we apply the new config */
150         if (iwl_is_associated(priv) && new_assoc) {
151                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
152                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
153
154                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
155                                       sizeof(struct iwl_rxon_cmd),
156                                       &priv->active_rxon);
157
158                 /* If the mask clearing failed then we set
159                  * active_rxon back to what it was previously */
160                 if (ret) {
161                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
162                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
163                         return ret;
164                 }
165                 iwl_clear_ucode_stations(priv);
166                 iwl_restore_stations(priv);
167                 ret = iwl_restore_default_wep_keys(priv);
168                 if (ret) {
169                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
170                         return ret;
171                 }
172         }
173
174         IWL_DEBUG_INFO(priv, "Sending RXON\n"
175                        "* with%s RXON_FILTER_ASSOC_MSK\n"
176                        "* channel = %d\n"
177                        "* bssid = %pM\n",
178                        (new_assoc ? "" : "out"),
179                        le16_to_cpu(priv->staging_rxon.channel),
180                        priv->staging_rxon.bssid_addr);
181
182         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
183
184         /* Apply the new configuration
185          * RXON unassoc clears the station table in uCode so restoration of
186          * stations is needed after it (the RXON command) completes
187          */
188         if (!new_assoc) {
189                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
190                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
191                 if (ret) {
192                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
193                         return ret;
194                 }
195                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
196                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
197                 iwl_clear_ucode_stations(priv);
198                 iwl_restore_stations(priv);
199                 ret = iwl_restore_default_wep_keys(priv);
200                 if (ret) {
201                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
202                         return ret;
203                 }
204         }
205
206         priv->start_calib = 0;
207         if (new_assoc) {
208                 /* Apply the new configuration
209                  * RXON assoc doesn't clear the station table in uCode,
210                  */
211                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
212                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
213                 if (ret) {
214                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
215                         return ret;
216                 }
217                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
218         }
219         iwl_print_rx_config_cmd(priv);
220
221         iwl_init_sensitivity(priv);
222
223         /* If we issue a new RXON command which required a tune then we must
224          * send a new TXPOWER command or we won't be able to Tx any frames */
225         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
226         if (ret) {
227                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
228                 return ret;
229         }
230
231         return 0;
232 }
233
234 void iwl_update_chain_flags(struct iwl_priv *priv)
235 {
236
237         if (priv->cfg->ops->hcmd->set_rxon_chain)
238                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
239         iwlcore_commit_rxon(priv);
240 }
241
242 static void iwl_clear_free_frames(struct iwl_priv *priv)
243 {
244         struct list_head *element;
245
246         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
247                        priv->frames_count);
248
249         while (!list_empty(&priv->free_frames)) {
250                 element = priv->free_frames.next;
251                 list_del(element);
252                 kfree(list_entry(element, struct iwl_frame, list));
253                 priv->frames_count--;
254         }
255
256         if (priv->frames_count) {
257                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
258                             priv->frames_count);
259                 priv->frames_count = 0;
260         }
261 }
262
263 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
264 {
265         struct iwl_frame *frame;
266         struct list_head *element;
267         if (list_empty(&priv->free_frames)) {
268                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
269                 if (!frame) {
270                         IWL_ERR(priv, "Could not allocate frame!\n");
271                         return NULL;
272                 }
273
274                 priv->frames_count++;
275                 return frame;
276         }
277
278         element = priv->free_frames.next;
279         list_del(element);
280         return list_entry(element, struct iwl_frame, list);
281 }
282
283 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
284 {
285         memset(frame, 0, sizeof(*frame));
286         list_add(&frame->list, &priv->free_frames);
287 }
288
289 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
290                                           struct ieee80211_hdr *hdr,
291                                           int left)
292 {
293         if (!priv->ibss_beacon)
294                 return 0;
295
296         if (priv->ibss_beacon->len > left)
297                 return 0;
298
299         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
300
301         return priv->ibss_beacon->len;
302 }
303
304 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
305 static void iwl_set_beacon_tim(struct iwl_priv *priv,
306                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
307                 u8 *beacon, u32 frame_size)
308 {
309         u16 tim_idx;
310         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
311
312         /*
313          * The index is relative to frame start but we start looking at the
314          * variable-length part of the beacon.
315          */
316         tim_idx = mgmt->u.beacon.variable - beacon;
317
318         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
319         while ((tim_idx < (frame_size - 2)) &&
320                         (beacon[tim_idx] != WLAN_EID_TIM))
321                 tim_idx += beacon[tim_idx+1] + 2;
322
323         /* If TIM field was found, set variables */
324         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
325                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
326                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
327         } else
328                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
329 }
330
331 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
332                                        struct iwl_frame *frame)
333 {
334         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
335         u32 frame_size;
336         u32 rate_flags;
337         u32 rate;
338         /*
339          * We have to set up the TX command, the TX Beacon command, and the
340          * beacon contents.
341          */
342
343         /* Initialize memory */
344         tx_beacon_cmd = &frame->u.beacon;
345         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
346
347         /* Set up TX beacon contents */
348         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
349                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
350         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
351                 return 0;
352
353         /* Set up TX command fields */
354         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
355         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
356         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
357         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
358                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
359
360         /* Set up TX beacon command fields */
361         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
362                         frame_size);
363
364         /* Set up packet rate and flags */
365         rate = iwl_rate_get_lowest_plcp(priv);
366         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
367                                               priv->hw_params.valid_tx_ant);
368         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
369         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
370                 rate_flags |= RATE_MCS_CCK_MSK;
371         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
372                         rate_flags);
373
374         return sizeof(*tx_beacon_cmd) + frame_size;
375 }
376 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
377 {
378         struct iwl_frame *frame;
379         unsigned int frame_size;
380         int rc;
381
382         frame = iwl_get_free_frame(priv);
383         if (!frame) {
384                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
385                           "command.\n");
386                 return -ENOMEM;
387         }
388
389         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
390         if (!frame_size) {
391                 IWL_ERR(priv, "Error configuring the beacon command\n");
392                 iwl_free_frame(priv, frame);
393                 return -EINVAL;
394         }
395
396         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
397                               &frame->u.cmd[0]);
398
399         iwl_free_frame(priv, frame);
400
401         return rc;
402 }
403
404 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
405 {
406         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
407
408         dma_addr_t addr = get_unaligned_le32(&tb->lo);
409         if (sizeof(dma_addr_t) > sizeof(u32))
410                 addr |=
411                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
412
413         return addr;
414 }
415
416 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
417 {
418         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
419
420         return le16_to_cpu(tb->hi_n_len) >> 4;
421 }
422
423 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
424                                   dma_addr_t addr, u16 len)
425 {
426         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
427         u16 hi_n_len = len << 4;
428
429         put_unaligned_le32(addr, &tb->lo);
430         if (sizeof(dma_addr_t) > sizeof(u32))
431                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
432
433         tb->hi_n_len = cpu_to_le16(hi_n_len);
434
435         tfd->num_tbs = idx + 1;
436 }
437
438 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
439 {
440         return tfd->num_tbs & 0x1f;
441 }
442
443 /**
444  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
445  * @priv - driver private data
446  * @txq - tx queue
447  *
448  * Does NOT advance any TFD circular buffer read/write indexes
449  * Does NOT free the TFD itself (which is within circular buffer)
450  */
451 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
452 {
453         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
454         struct iwl_tfd *tfd;
455         struct pci_dev *dev = priv->pci_dev;
456         int index = txq->q.read_ptr;
457         int i;
458         int num_tbs;
459
460         tfd = &tfd_tmp[index];
461
462         /* Sanity check on number of chunks */
463         num_tbs = iwl_tfd_get_num_tbs(tfd);
464
465         if (num_tbs >= IWL_NUM_OF_TBS) {
466                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
467                 /* @todo issue fatal error, it is quite serious situation */
468                 return;
469         }
470
471         /* Unmap tx_cmd */
472         if (num_tbs)
473                 pci_unmap_single(dev,
474                                 dma_unmap_addr(&txq->meta[index], mapping),
475                                 dma_unmap_len(&txq->meta[index], len),
476                                 PCI_DMA_BIDIRECTIONAL);
477
478         /* Unmap chunks, if any. */
479         for (i = 1; i < num_tbs; i++)
480                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
481                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
482
483         /* free SKB */
484         if (txq->txb) {
485                 struct sk_buff *skb;
486
487                 skb = txq->txb[txq->q.read_ptr].skb;
488
489                 /* can be called from irqs-disabled context */
490                 if (skb) {
491                         dev_kfree_skb_any(skb);
492                         txq->txb[txq->q.read_ptr].skb = NULL;
493                 }
494         }
495 }
496
497 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
498                                  struct iwl_tx_queue *txq,
499                                  dma_addr_t addr, u16 len,
500                                  u8 reset, u8 pad)
501 {
502         struct iwl_queue *q;
503         struct iwl_tfd *tfd, *tfd_tmp;
504         u32 num_tbs;
505
506         q = &txq->q;
507         tfd_tmp = (struct iwl_tfd *)txq->tfds;
508         tfd = &tfd_tmp[q->write_ptr];
509
510         if (reset)
511                 memset(tfd, 0, sizeof(*tfd));
512
513         num_tbs = iwl_tfd_get_num_tbs(tfd);
514
515         /* Each TFD can point to a maximum 20 Tx buffers */
516         if (num_tbs >= IWL_NUM_OF_TBS) {
517                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
518                           IWL_NUM_OF_TBS);
519                 return -EINVAL;
520         }
521
522         BUG_ON(addr & ~DMA_BIT_MASK(36));
523         if (unlikely(addr & ~IWL_TX_DMA_MASK))
524                 IWL_ERR(priv, "Unaligned address = %llx\n",
525                           (unsigned long long)addr);
526
527         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
528
529         return 0;
530 }
531
532 /*
533  * Tell nic where to find circular buffer of Tx Frame Descriptors for
534  * given Tx queue, and enable the DMA channel used for that queue.
535  *
536  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
537  * channels supported in hardware.
538  */
539 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
540                          struct iwl_tx_queue *txq)
541 {
542         int txq_id = txq->q.id;
543
544         /* Circular buffer (TFD queue in DRAM) physical base address */
545         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
546                              txq->q.dma_addr >> 8);
547
548         return 0;
549 }
550
551 /******************************************************************************
552  *
553  * Generic RX handler implementations
554  *
555  ******************************************************************************/
556 static void iwl_rx_reply_alive(struct iwl_priv *priv,
557                                 struct iwl_rx_mem_buffer *rxb)
558 {
559         struct iwl_rx_packet *pkt = rxb_addr(rxb);
560         struct iwl_alive_resp *palive;
561         struct delayed_work *pwork;
562
563         palive = &pkt->u.alive_frame;
564
565         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
566                        "0x%01X 0x%01X\n",
567                        palive->is_valid, palive->ver_type,
568                        palive->ver_subtype);
569
570         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
571                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
572                 memcpy(&priv->card_alive_init,
573                        &pkt->u.alive_frame,
574                        sizeof(struct iwl_init_alive_resp));
575                 pwork = &priv->init_alive_start;
576         } else {
577                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
578                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
579                        sizeof(struct iwl_alive_resp));
580                 pwork = &priv->alive_start;
581         }
582
583         /* We delay the ALIVE response by 5ms to
584          * give the HW RF Kill time to activate... */
585         if (palive->is_valid == UCODE_VALID_OK)
586                 queue_delayed_work(priv->workqueue, pwork,
587                                    msecs_to_jiffies(5));
588         else
589                 IWL_WARN(priv, "uCode did not respond OK.\n");
590 }
591
592 static void iwl_bg_beacon_update(struct work_struct *work)
593 {
594         struct iwl_priv *priv =
595                 container_of(work, struct iwl_priv, beacon_update);
596         struct sk_buff *beacon;
597
598         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
599         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
600
601         if (!beacon) {
602                 IWL_ERR(priv, "update beacon failed\n");
603                 return;
604         }
605
606         mutex_lock(&priv->mutex);
607         /* new beacon skb is allocated every time; dispose previous.*/
608         if (priv->ibss_beacon)
609                 dev_kfree_skb(priv->ibss_beacon);
610
611         priv->ibss_beacon = beacon;
612         mutex_unlock(&priv->mutex);
613
614         iwl_send_beacon_cmd(priv);
615 }
616
617 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
618 {
619         struct iwl_priv *priv =
620                 container_of(work, struct iwl_priv, bt_full_concurrency);
621
622         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
623                 return;
624
625         /* dont send host command if rf-kill is on */
626         if (!iwl_is_ready_rf(priv))
627                 return;
628
629         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
630                        priv->bt_full_concurrent ?
631                        "full concurrency" : "3-wire");
632
633         /*
634          * LQ & RXON updated cmds must be sent before BT Config cmd
635          * to avoid 3-wire collisions
636          */
637         if (priv->cfg->ops->hcmd->set_rxon_chain)
638                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
639         iwlcore_commit_rxon(priv);
640
641         priv->cfg->ops->hcmd->send_bt_config(priv);
642 }
643
644 /**
645  * iwl_bg_statistics_periodic - Timer callback to queue statistics
646  *
647  * This callback is provided in order to send a statistics request.
648  *
649  * This timer function is continually reset to execute within
650  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
651  * was received.  We need to ensure we receive the statistics in order
652  * to update the temperature used for calibrating the TXPOWER.
653  */
654 static void iwl_bg_statistics_periodic(unsigned long data)
655 {
656         struct iwl_priv *priv = (struct iwl_priv *)data;
657
658         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
659                 return;
660
661         /* dont send host command if rf-kill is on */
662         if (!iwl_is_ready_rf(priv))
663                 return;
664
665         iwl_send_statistics_request(priv, CMD_ASYNC, false);
666 }
667
668
669 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
670                                         u32 start_idx, u32 num_events,
671                                         u32 mode)
672 {
673         u32 i;
674         u32 ptr;        /* SRAM byte address of log data */
675         u32 ev, time, data; /* event log data */
676         unsigned long reg_flags;
677
678         if (mode == 0)
679                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
680         else
681                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
682
683         /* Make sure device is powered up for SRAM reads */
684         spin_lock_irqsave(&priv->reg_lock, reg_flags);
685         if (iwl_grab_nic_access(priv)) {
686                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
687                 return;
688         }
689
690         /* Set starting address; reads will auto-increment */
691         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
692         rmb();
693
694         /*
695          * "time" is actually "data" for mode 0 (no timestamp).
696          * place event id # at far right for easier visual parsing.
697          */
698         for (i = 0; i < num_events; i++) {
699                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
700                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
701                 if (mode == 0) {
702                         trace_iwlwifi_dev_ucode_cont_event(priv,
703                                                         0, time, ev);
704                 } else {
705                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
706                         trace_iwlwifi_dev_ucode_cont_event(priv,
707                                                 time, data, ev);
708                 }
709         }
710         /* Allow device to power down */
711         iwl_release_nic_access(priv);
712         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
713 }
714
715 static void iwl_continuous_event_trace(struct iwl_priv *priv)
716 {
717         u32 capacity;   /* event log capacity in # entries */
718         u32 base;       /* SRAM byte address of event log header */
719         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
720         u32 num_wraps;  /* # times uCode wrapped to top of log */
721         u32 next_entry; /* index of next entry to be written by uCode */
722
723         if (priv->ucode_type == UCODE_INIT)
724                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
725         else
726                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
727         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
728                 capacity = iwl_read_targ_mem(priv, base);
729                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
730                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
731                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
732         } else
733                 return;
734
735         if (num_wraps == priv->event_log.num_wraps) {
736                 iwl_print_cont_event_trace(priv,
737                                        base, priv->event_log.next_entry,
738                                        next_entry - priv->event_log.next_entry,
739                                        mode);
740                 priv->event_log.non_wraps_count++;
741         } else {
742                 if ((num_wraps - priv->event_log.num_wraps) > 1)
743                         priv->event_log.wraps_more_count++;
744                 else
745                         priv->event_log.wraps_once_count++;
746                 trace_iwlwifi_dev_ucode_wrap_event(priv,
747                                 num_wraps - priv->event_log.num_wraps,
748                                 next_entry, priv->event_log.next_entry);
749                 if (next_entry < priv->event_log.next_entry) {
750                         iwl_print_cont_event_trace(priv, base,
751                                priv->event_log.next_entry,
752                                capacity - priv->event_log.next_entry,
753                                mode);
754
755                         iwl_print_cont_event_trace(priv, base, 0,
756                                 next_entry, mode);
757                 } else {
758                         iwl_print_cont_event_trace(priv, base,
759                                next_entry, capacity - next_entry,
760                                mode);
761
762                         iwl_print_cont_event_trace(priv, base, 0,
763                                 next_entry, mode);
764                 }
765         }
766         priv->event_log.num_wraps = num_wraps;
767         priv->event_log.next_entry = next_entry;
768 }
769
770 /**
771  * iwl_bg_ucode_trace - Timer callback to log ucode event
772  *
773  * The timer is continually set to execute every
774  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
775  * this function is to perform continuous uCode event logging operation
776  * if enabled
777  */
778 static void iwl_bg_ucode_trace(unsigned long data)
779 {
780         struct iwl_priv *priv = (struct iwl_priv *)data;
781
782         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
783                 return;
784
785         if (priv->event_log.ucode_trace) {
786                 iwl_continuous_event_trace(priv);
787                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
788                 mod_timer(&priv->ucode_trace,
789                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
790         }
791 }
792
793 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
794                                 struct iwl_rx_mem_buffer *rxb)
795 {
796         struct iwl_rx_packet *pkt = rxb_addr(rxb);
797         struct iwl4965_beacon_notif *beacon =
798                 (struct iwl4965_beacon_notif *)pkt->u.raw;
799 #ifdef CONFIG_IWLWIFI_DEBUG
800         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
801
802         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
803                 "tsf %d %d rate %d\n",
804                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
805                 beacon->beacon_notify_hdr.failure_frame,
806                 le32_to_cpu(beacon->ibss_mgr_status),
807                 le32_to_cpu(beacon->high_tsf),
808                 le32_to_cpu(beacon->low_tsf), rate);
809 #endif
810
811         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
812
813         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
814             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
815                 queue_work(priv->workqueue, &priv->beacon_update);
816 }
817
818 /* Handle notification from uCode that card's power state is changing
819  * due to software, hardware, or critical temperature RFKILL */
820 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
821                                     struct iwl_rx_mem_buffer *rxb)
822 {
823         struct iwl_rx_packet *pkt = rxb_addr(rxb);
824         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
825         unsigned long status = priv->status;
826
827         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
828                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
829                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
830                           (flags & CT_CARD_DISABLED) ?
831                           "Reached" : "Not reached");
832
833         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
834                      CT_CARD_DISABLED)) {
835
836                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
837                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
838
839                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
840                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
841
842                 if (!(flags & RXON_CARD_DISABLED)) {
843                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
844                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
845                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
846                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
847                 }
848                 if (flags & CT_CARD_DISABLED)
849                         iwl_tt_enter_ct_kill(priv);
850         }
851         if (!(flags & CT_CARD_DISABLED))
852                 iwl_tt_exit_ct_kill(priv);
853
854         if (flags & HW_CARD_DISABLED)
855                 set_bit(STATUS_RF_KILL_HW, &priv->status);
856         else
857                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
858
859
860         if (!(flags & RXON_CARD_DISABLED))
861                 iwl_scan_cancel(priv);
862
863         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
864              test_bit(STATUS_RF_KILL_HW, &priv->status)))
865                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
866                         test_bit(STATUS_RF_KILL_HW, &priv->status));
867         else
868                 wake_up_interruptible(&priv->wait_command_queue);
869 }
870
871 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
872 {
873         if (src == IWL_PWR_SRC_VAUX) {
874                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
875                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
876                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
877                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
878         } else {
879                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
880                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
881                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
882         }
883
884         return 0;
885 }
886
887 static void iwl_bg_tx_flush(struct work_struct *work)
888 {
889         struct iwl_priv *priv =
890                 container_of(work, struct iwl_priv, tx_flush);
891
892         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
893                 return;
894
895         /* do nothing if rf-kill is on */
896         if (!iwl_is_ready_rf(priv))
897                 return;
898
899         if (priv->cfg->ops->lib->txfifo_flush) {
900                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
901                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
902         }
903 }
904
905 /**
906  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
907  *
908  * Setup the RX handlers for each of the reply types sent from the uCode
909  * to the host.
910  *
911  * This function chains into the hardware specific files for them to setup
912  * any hardware specific handlers as well.
913  */
914 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
915 {
916         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
917         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
918         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
919         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
920                         iwl_rx_spectrum_measure_notif;
921         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
922         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
923             iwl_rx_pm_debug_statistics_notif;
924         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
925
926         /*
927          * The same handler is used for both the REPLY to a discrete
928          * statistics request from the host as well as for the periodic
929          * statistics notifications (after received beacons) from the uCode.
930          */
931         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
932         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
933
934         iwl_setup_rx_scan_handlers(priv);
935
936         /* status change handler */
937         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
938
939         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
940             iwl_rx_missed_beacon_notif;
941         /* Rx handlers */
942         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
943         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
944         /* block ack */
945         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
946         /* Set up hardware specific Rx handlers */
947         priv->cfg->ops->lib->rx_handler_setup(priv);
948 }
949
950 /**
951  * iwl_rx_handle - Main entry function for receiving responses from uCode
952  *
953  * Uses the priv->rx_handlers callback function array to invoke
954  * the appropriate handlers, including command responses,
955  * frame-received notifications, and other notifications.
956  */
957 void iwl_rx_handle(struct iwl_priv *priv)
958 {
959         struct iwl_rx_mem_buffer *rxb;
960         struct iwl_rx_packet *pkt;
961         struct iwl_rx_queue *rxq = &priv->rxq;
962         u32 r, i;
963         int reclaim;
964         unsigned long flags;
965         u8 fill_rx = 0;
966         u32 count = 8;
967         int total_empty;
968
969         /* uCode's read index (stored in shared DRAM) indicates the last Rx
970          * buffer that the driver may process (last buffer filled by ucode). */
971         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
972         i = rxq->read;
973
974         /* Rx interrupt, but nothing sent from uCode */
975         if (i == r)
976                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
977
978         /* calculate total frames need to be restock after handling RX */
979         total_empty = r - rxq->write_actual;
980         if (total_empty < 0)
981                 total_empty += RX_QUEUE_SIZE;
982
983         if (total_empty > (RX_QUEUE_SIZE / 2))
984                 fill_rx = 1;
985
986         while (i != r) {
987                 int len;
988
989                 rxb = rxq->queue[i];
990
991                 /* If an RXB doesn't have a Rx queue slot associated with it,
992                  * then a bug has been introduced in the queue refilling
993                  * routines -- catch it here */
994                 BUG_ON(rxb == NULL);
995
996                 rxq->queue[i] = NULL;
997
998                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
999                                PAGE_SIZE << priv->hw_params.rx_page_order,
1000                                PCI_DMA_FROMDEVICE);
1001                 pkt = rxb_addr(rxb);
1002
1003                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1004                 len += sizeof(u32); /* account for status word */
1005                 trace_iwlwifi_dev_rx(priv, pkt, len);
1006
1007                 /* Reclaim a command buffer only if this packet is a response
1008                  *   to a (driver-originated) command.
1009                  * If the packet (e.g. Rx frame) originated from uCode,
1010                  *   there is no command buffer to reclaim.
1011                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1012                  *   but apparently a few don't get set; catch them here. */
1013                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1014                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1015                         (pkt->hdr.cmd != REPLY_RX) &&
1016                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1017                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1018                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1019                         (pkt->hdr.cmd != REPLY_TX);
1020
1021                 /* Based on type of command response or notification,
1022                  *   handle those that need handling via function in
1023                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1024                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1025                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1026                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1027                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1028                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1029                 } else {
1030                         /* No handling needed */
1031                         IWL_DEBUG_RX(priv,
1032                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1033                                 r, i, get_cmd_string(pkt->hdr.cmd),
1034                                 pkt->hdr.cmd);
1035                 }
1036
1037                 /*
1038                  * XXX: After here, we should always check rxb->page
1039                  * against NULL before touching it or its virtual
1040                  * memory (pkt). Because some rx_handler might have
1041                  * already taken or freed the pages.
1042                  */
1043
1044                 if (reclaim) {
1045                         /* Invoke any callbacks, transfer the buffer to caller,
1046                          * and fire off the (possibly) blocking iwl_send_cmd()
1047                          * as we reclaim the driver command queue */
1048                         if (rxb->page)
1049                                 iwl_tx_cmd_complete(priv, rxb);
1050                         else
1051                                 IWL_WARN(priv, "Claim null rxb?\n");
1052                 }
1053
1054                 /* Reuse the page if possible. For notification packets and
1055                  * SKBs that fail to Rx correctly, add them back into the
1056                  * rx_free list for reuse later. */
1057                 spin_lock_irqsave(&rxq->lock, flags);
1058                 if (rxb->page != NULL) {
1059                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1060                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1061                                 PCI_DMA_FROMDEVICE);
1062                         list_add_tail(&rxb->list, &rxq->rx_free);
1063                         rxq->free_count++;
1064                 } else
1065                         list_add_tail(&rxb->list, &rxq->rx_used);
1066
1067                 spin_unlock_irqrestore(&rxq->lock, flags);
1068
1069                 i = (i + 1) & RX_QUEUE_MASK;
1070                 /* If there are a lot of unused frames,
1071                  * restock the Rx queue so ucode wont assert. */
1072                 if (fill_rx) {
1073                         count++;
1074                         if (count >= 8) {
1075                                 rxq->read = i;
1076                                 iwlagn_rx_replenish_now(priv);
1077                                 count = 0;
1078                         }
1079                 }
1080         }
1081
1082         /* Backtrack one entry */
1083         rxq->read = i;
1084         if (fill_rx)
1085                 iwlagn_rx_replenish_now(priv);
1086         else
1087                 iwlagn_rx_queue_restock(priv);
1088 }
1089
1090 /* call this function to flush any scheduled tasklet */
1091 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1092 {
1093         /* wait to make sure we flush pending tasklet*/
1094         synchronize_irq(priv->pci_dev->irq);
1095         tasklet_kill(&priv->irq_tasklet);
1096 }
1097
1098 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1099 {
1100         u32 inta, handled = 0;
1101         u32 inta_fh;
1102         unsigned long flags;
1103         u32 i;
1104 #ifdef CONFIG_IWLWIFI_DEBUG
1105         u32 inta_mask;
1106 #endif
1107
1108         spin_lock_irqsave(&priv->lock, flags);
1109
1110         /* Ack/clear/reset pending uCode interrupts.
1111          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1112          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1113         inta = iwl_read32(priv, CSR_INT);
1114         iwl_write32(priv, CSR_INT, inta);
1115
1116         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1117          * Any new interrupts that happen after this, either while we're
1118          * in this tasklet, or later, will show up in next ISR/tasklet. */
1119         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1120         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1121
1122 #ifdef CONFIG_IWLWIFI_DEBUG
1123         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1124                 /* just for debug */
1125                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1126                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1127                               inta, inta_mask, inta_fh);
1128         }
1129 #endif
1130
1131         spin_unlock_irqrestore(&priv->lock, flags);
1132
1133         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1134          * atomic, make sure that inta covers all the interrupts that
1135          * we've discovered, even if FH interrupt came in just after
1136          * reading CSR_INT. */
1137         if (inta_fh & CSR49_FH_INT_RX_MASK)
1138                 inta |= CSR_INT_BIT_FH_RX;
1139         if (inta_fh & CSR49_FH_INT_TX_MASK)
1140                 inta |= CSR_INT_BIT_FH_TX;
1141
1142         /* Now service all interrupt bits discovered above. */
1143         if (inta & CSR_INT_BIT_HW_ERR) {
1144                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1145
1146                 /* Tell the device to stop sending interrupts */
1147                 iwl_disable_interrupts(priv);
1148
1149                 priv->isr_stats.hw++;
1150                 iwl_irq_handle_error(priv);
1151
1152                 handled |= CSR_INT_BIT_HW_ERR;
1153
1154                 return;
1155         }
1156
1157 #ifdef CONFIG_IWLWIFI_DEBUG
1158         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1159                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1160                 if (inta & CSR_INT_BIT_SCD) {
1161                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1162                                       "the frame/frames.\n");
1163                         priv->isr_stats.sch++;
1164                 }
1165
1166                 /* Alive notification via Rx interrupt will do the real work */
1167                 if (inta & CSR_INT_BIT_ALIVE) {
1168                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1169                         priv->isr_stats.alive++;
1170                 }
1171         }
1172 #endif
1173         /* Safely ignore these bits for debug checks below */
1174         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1175
1176         /* HW RF KILL switch toggled */
1177         if (inta & CSR_INT_BIT_RF_KILL) {
1178                 int hw_rf_kill = 0;
1179                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1180                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1181                         hw_rf_kill = 1;
1182
1183                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1184                                 hw_rf_kill ? "disable radio" : "enable radio");
1185
1186                 priv->isr_stats.rfkill++;
1187
1188                 /* driver only loads ucode once setting the interface up.
1189                  * the driver allows loading the ucode even if the radio
1190                  * is killed. Hence update the killswitch state here. The
1191                  * rfkill handler will care about restarting if needed.
1192                  */
1193                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1194                         if (hw_rf_kill)
1195                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1196                         else
1197                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1198                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1199                 }
1200
1201                 handled |= CSR_INT_BIT_RF_KILL;
1202         }
1203
1204         /* Chip got too hot and stopped itself */
1205         if (inta & CSR_INT_BIT_CT_KILL) {
1206                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1207                 priv->isr_stats.ctkill++;
1208                 handled |= CSR_INT_BIT_CT_KILL;
1209         }
1210
1211         /* Error detected by uCode */
1212         if (inta & CSR_INT_BIT_SW_ERR) {
1213                 IWL_ERR(priv, "Microcode SW error detected. "
1214                         " Restarting 0x%X.\n", inta);
1215                 priv->isr_stats.sw++;
1216                 priv->isr_stats.sw_err = inta;
1217                 iwl_irq_handle_error(priv);
1218                 handled |= CSR_INT_BIT_SW_ERR;
1219         }
1220
1221         /*
1222          * uCode wakes up after power-down sleep.
1223          * Tell device about any new tx or host commands enqueued,
1224          * and about any Rx buffers made available while asleep.
1225          */
1226         if (inta & CSR_INT_BIT_WAKEUP) {
1227                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1228                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1229                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1230                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1231                 priv->isr_stats.wakeup++;
1232                 handled |= CSR_INT_BIT_WAKEUP;
1233         }
1234
1235         /* All uCode command responses, including Tx command responses,
1236          * Rx "responses" (frame-received notification), and other
1237          * notifications from uCode come through here*/
1238         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1239                 iwl_rx_handle(priv);
1240                 priv->isr_stats.rx++;
1241                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1242         }
1243
1244         /* This "Tx" DMA channel is used only for loading uCode */
1245         if (inta & CSR_INT_BIT_FH_TX) {
1246                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1247                 priv->isr_stats.tx++;
1248                 handled |= CSR_INT_BIT_FH_TX;
1249                 /* Wake up uCode load routine, now that load is complete */
1250                 priv->ucode_write_complete = 1;
1251                 wake_up_interruptible(&priv->wait_command_queue);
1252         }
1253
1254         if (inta & ~handled) {
1255                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1256                 priv->isr_stats.unhandled++;
1257         }
1258
1259         if (inta & ~(priv->inta_mask)) {
1260                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1261                          inta & ~priv->inta_mask);
1262                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1263         }
1264
1265         /* Re-enable all interrupts */
1266         /* only Re-enable if diabled by irq */
1267         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1268                 iwl_enable_interrupts(priv);
1269
1270 #ifdef CONFIG_IWLWIFI_DEBUG
1271         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1272                 inta = iwl_read32(priv, CSR_INT);
1273                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1274                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1275                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1276                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1277         }
1278 #endif
1279 }
1280
1281 /* tasklet for iwlagn interrupt */
1282 static void iwl_irq_tasklet(struct iwl_priv *priv)
1283 {
1284         u32 inta = 0;
1285         u32 handled = 0;
1286         unsigned long flags;
1287         u32 i;
1288 #ifdef CONFIG_IWLWIFI_DEBUG
1289         u32 inta_mask;
1290 #endif
1291
1292         spin_lock_irqsave(&priv->lock, flags);
1293
1294         /* Ack/clear/reset pending uCode interrupts.
1295          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1296          */
1297         /* There is a hardware bug in the interrupt mask function that some
1298          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1299          * they are disabled in the CSR_INT_MASK register. Furthermore the
1300          * ICT interrupt handling mechanism has another bug that might cause
1301          * these unmasked interrupts fail to be detected. We workaround the
1302          * hardware bugs here by ACKing all the possible interrupts so that
1303          * interrupt coalescing can still be achieved.
1304          */
1305         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1306
1307         inta = priv->_agn.inta;
1308
1309 #ifdef CONFIG_IWLWIFI_DEBUG
1310         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1311                 /* just for debug */
1312                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1313                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1314                                 inta, inta_mask);
1315         }
1316 #endif
1317
1318         spin_unlock_irqrestore(&priv->lock, flags);
1319
1320         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1321         priv->_agn.inta = 0;
1322
1323         /* Now service all interrupt bits discovered above. */
1324         if (inta & CSR_INT_BIT_HW_ERR) {
1325                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1326
1327                 /* Tell the device to stop sending interrupts */
1328                 iwl_disable_interrupts(priv);
1329
1330                 priv->isr_stats.hw++;
1331                 iwl_irq_handle_error(priv);
1332
1333                 handled |= CSR_INT_BIT_HW_ERR;
1334
1335                 return;
1336         }
1337
1338 #ifdef CONFIG_IWLWIFI_DEBUG
1339         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1340                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1341                 if (inta & CSR_INT_BIT_SCD) {
1342                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1343                                       "the frame/frames.\n");
1344                         priv->isr_stats.sch++;
1345                 }
1346
1347                 /* Alive notification via Rx interrupt will do the real work */
1348                 if (inta & CSR_INT_BIT_ALIVE) {
1349                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1350                         priv->isr_stats.alive++;
1351                 }
1352         }
1353 #endif
1354         /* Safely ignore these bits for debug checks below */
1355         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1356
1357         /* HW RF KILL switch toggled */
1358         if (inta & CSR_INT_BIT_RF_KILL) {
1359                 int hw_rf_kill = 0;
1360                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1361                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1362                         hw_rf_kill = 1;
1363
1364                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1365                                 hw_rf_kill ? "disable radio" : "enable radio");
1366
1367                 priv->isr_stats.rfkill++;
1368
1369                 /* driver only loads ucode once setting the interface up.
1370                  * the driver allows loading the ucode even if the radio
1371                  * is killed. Hence update the killswitch state here. The
1372                  * rfkill handler will care about restarting if needed.
1373                  */
1374                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1375                         if (hw_rf_kill)
1376                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1377                         else
1378                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1379                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1380                 }
1381
1382                 handled |= CSR_INT_BIT_RF_KILL;
1383         }
1384
1385         /* Chip got too hot and stopped itself */
1386         if (inta & CSR_INT_BIT_CT_KILL) {
1387                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1388                 priv->isr_stats.ctkill++;
1389                 handled |= CSR_INT_BIT_CT_KILL;
1390         }
1391
1392         /* Error detected by uCode */
1393         if (inta & CSR_INT_BIT_SW_ERR) {
1394                 IWL_ERR(priv, "Microcode SW error detected. "
1395                         " Restarting 0x%X.\n", inta);
1396                 priv->isr_stats.sw++;
1397                 priv->isr_stats.sw_err = inta;
1398                 iwl_irq_handle_error(priv);
1399                 handled |= CSR_INT_BIT_SW_ERR;
1400         }
1401
1402         /* uCode wakes up after power-down sleep */
1403         if (inta & CSR_INT_BIT_WAKEUP) {
1404                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1405                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1406                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1407                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1408
1409                 priv->isr_stats.wakeup++;
1410
1411                 handled |= CSR_INT_BIT_WAKEUP;
1412         }
1413
1414         /* All uCode command responses, including Tx command responses,
1415          * Rx "responses" (frame-received notification), and other
1416          * notifications from uCode come through here*/
1417         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1418                         CSR_INT_BIT_RX_PERIODIC)) {
1419                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1420                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1421                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1422                         iwl_write32(priv, CSR_FH_INT_STATUS,
1423                                         CSR49_FH_INT_RX_MASK);
1424                 }
1425                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1426                         handled |= CSR_INT_BIT_RX_PERIODIC;
1427                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1428                 }
1429                 /* Sending RX interrupt require many steps to be done in the
1430                  * the device:
1431                  * 1- write interrupt to current index in ICT table.
1432                  * 2- dma RX frame.
1433                  * 3- update RX shared data to indicate last write index.
1434                  * 4- send interrupt.
1435                  * This could lead to RX race, driver could receive RX interrupt
1436                  * but the shared data changes does not reflect this;
1437                  * periodic interrupt will detect any dangling Rx activity.
1438                  */
1439
1440                 /* Disable periodic interrupt; we use it as just a one-shot. */
1441                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1442                             CSR_INT_PERIODIC_DIS);
1443                 iwl_rx_handle(priv);
1444
1445                 /*
1446                  * Enable periodic interrupt in 8 msec only if we received
1447                  * real RX interrupt (instead of just periodic int), to catch
1448                  * any dangling Rx interrupt.  If it was just the periodic
1449                  * interrupt, there was no dangling Rx activity, and no need
1450                  * to extend the periodic interrupt; one-shot is enough.
1451                  */
1452                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1453                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1454                                     CSR_INT_PERIODIC_ENA);
1455
1456                 priv->isr_stats.rx++;
1457         }
1458
1459         /* This "Tx" DMA channel is used only for loading uCode */
1460         if (inta & CSR_INT_BIT_FH_TX) {
1461                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1462                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1463                 priv->isr_stats.tx++;
1464                 handled |= CSR_INT_BIT_FH_TX;
1465                 /* Wake up uCode load routine, now that load is complete */
1466                 priv->ucode_write_complete = 1;
1467                 wake_up_interruptible(&priv->wait_command_queue);
1468         }
1469
1470         if (inta & ~handled) {
1471                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1472                 priv->isr_stats.unhandled++;
1473         }
1474
1475         if (inta & ~(priv->inta_mask)) {
1476                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1477                          inta & ~priv->inta_mask);
1478         }
1479
1480         /* Re-enable all interrupts */
1481         /* only Re-enable if diabled by irq */
1482         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1483                 iwl_enable_interrupts(priv);
1484 }
1485
1486 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1487 #define ACK_CNT_RATIO (50)
1488 #define BA_TIMEOUT_CNT (5)
1489 #define BA_TIMEOUT_MAX (16)
1490
1491 /**
1492  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1493  *
1494  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1495  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1496  * operation state.
1497  */
1498 bool iwl_good_ack_health(struct iwl_priv *priv,
1499                                 struct iwl_rx_packet *pkt)
1500 {
1501         bool rc = true;
1502         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1503         int ba_timeout_delta;
1504
1505         actual_ack_cnt_delta =
1506                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1507                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1508         expected_ack_cnt_delta =
1509                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1510                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1511         ba_timeout_delta =
1512                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1513                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1514         if ((priv->_agn.agg_tids_count > 0) &&
1515             (expected_ack_cnt_delta > 0) &&
1516             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1517                 < ACK_CNT_RATIO) &&
1518             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1519                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1520                                 " expected_ack_cnt = %d\n",
1521                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1522
1523 #ifdef CONFIG_IWLWIFI_DEBUGFS
1524                 /*
1525                  * This is ifdef'ed on DEBUGFS because otherwise the
1526                  * statistics aren't available. If DEBUGFS is set but
1527                  * DEBUG is not, these will just compile out.
1528                  */
1529                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1530                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1531                 IWL_DEBUG_RADIO(priv,
1532                                 "ack_or_ba_timeout_collision delta = %d\n",
1533                                 priv->_agn.delta_statistics.tx.
1534                                 ack_or_ba_timeout_collision);
1535 #endif
1536                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1537                                 ba_timeout_delta);
1538                 if (!actual_ack_cnt_delta &&
1539                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1540                         rc = false;
1541         }
1542         return rc;
1543 }
1544
1545
1546 /*****************************************************************************
1547  *
1548  * sysfs attributes
1549  *
1550  *****************************************************************************/
1551
1552 #ifdef CONFIG_IWLWIFI_DEBUG
1553
1554 /*
1555  * The following adds a new attribute to the sysfs representation
1556  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1557  * used for controlling the debug level.
1558  *
1559  * See the level definitions in iwl for details.
1560  *
1561  * The debug_level being managed using sysfs below is a per device debug
1562  * level that is used instead of the global debug level if it (the per
1563  * device debug level) is set.
1564  */
1565 static ssize_t show_debug_level(struct device *d,
1566                                 struct device_attribute *attr, char *buf)
1567 {
1568         struct iwl_priv *priv = dev_get_drvdata(d);
1569         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1570 }
1571 static ssize_t store_debug_level(struct device *d,
1572                                 struct device_attribute *attr,
1573                                  const char *buf, size_t count)
1574 {
1575         struct iwl_priv *priv = dev_get_drvdata(d);
1576         unsigned long val;
1577         int ret;
1578
1579         ret = strict_strtoul(buf, 0, &val);
1580         if (ret)
1581                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1582         else {
1583                 priv->debug_level = val;
1584                 if (iwl_alloc_traffic_mem(priv))
1585                         IWL_ERR(priv,
1586                                 "Not enough memory to generate traffic log\n");
1587         }
1588         return strnlen(buf, count);
1589 }
1590
1591 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1592                         show_debug_level, store_debug_level);
1593
1594
1595 #endif /* CONFIG_IWLWIFI_DEBUG */
1596
1597
1598 static ssize_t show_temperature(struct device *d,
1599                                 struct device_attribute *attr, char *buf)
1600 {
1601         struct iwl_priv *priv = dev_get_drvdata(d);
1602
1603         if (!iwl_is_alive(priv))
1604                 return -EAGAIN;
1605
1606         return sprintf(buf, "%d\n", priv->temperature);
1607 }
1608
1609 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1610
1611 static ssize_t show_tx_power(struct device *d,
1612                              struct device_attribute *attr, char *buf)
1613 {
1614         struct iwl_priv *priv = dev_get_drvdata(d);
1615
1616         if (!iwl_is_ready_rf(priv))
1617                 return sprintf(buf, "off\n");
1618         else
1619                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1620 }
1621
1622 static ssize_t store_tx_power(struct device *d,
1623                               struct device_attribute *attr,
1624                               const char *buf, size_t count)
1625 {
1626         struct iwl_priv *priv = dev_get_drvdata(d);
1627         unsigned long val;
1628         int ret;
1629
1630         ret = strict_strtoul(buf, 10, &val);
1631         if (ret)
1632                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1633         else {
1634                 ret = iwl_set_tx_power(priv, val, false);
1635                 if (ret)
1636                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1637                                 ret);
1638                 else
1639                         ret = count;
1640         }
1641         return ret;
1642 }
1643
1644 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1645
1646 static struct attribute *iwl_sysfs_entries[] = {
1647         &dev_attr_temperature.attr,
1648         &dev_attr_tx_power.attr,
1649 #ifdef CONFIG_IWLWIFI_DEBUG
1650         &dev_attr_debug_level.attr,
1651 #endif
1652         NULL
1653 };
1654
1655 static struct attribute_group iwl_attribute_group = {
1656         .name = NULL,           /* put in device directory */
1657         .attrs = iwl_sysfs_entries,
1658 };
1659
1660 /******************************************************************************
1661  *
1662  * uCode download functions
1663  *
1664  ******************************************************************************/
1665
1666 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1667 {
1668         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1669         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1670         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1671         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1672         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1673         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1674 }
1675
1676 static void iwl_nic_start(struct iwl_priv *priv)
1677 {
1678         /* Remove all resets to allow NIC to operate */
1679         iwl_write32(priv, CSR_RESET, 0);
1680 }
1681
1682 struct iwlagn_ucode_capabilities {
1683         u32 max_probe_length;
1684         u32 standard_phy_calibration_size;
1685 };
1686
1687 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1688 static int iwl_mac_setup_register(struct iwl_priv *priv,
1689                                   struct iwlagn_ucode_capabilities *capa);
1690
1691 #define UCODE_EXPERIMENTAL_INDEX        100
1692 #define UCODE_EXPERIMENTAL_TAG          "exp"
1693
1694 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1695 {
1696         const char *name_pre = priv->cfg->fw_name_pre;
1697         char tag[8];
1698
1699         if (first) {
1700 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1701                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1702                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1703         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1704 #endif
1705                 priv->fw_index = priv->cfg->ucode_api_max;
1706                 sprintf(tag, "%d", priv->fw_index);
1707         } else {
1708                 priv->fw_index--;
1709                 sprintf(tag, "%d", priv->fw_index);
1710         }
1711
1712         if (priv->fw_index < priv->cfg->ucode_api_min) {
1713                 IWL_ERR(priv, "no suitable firmware found!\n");
1714                 return -ENOENT;
1715         }
1716
1717         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1718
1719         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1720                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1721                                 ? "EXPERIMENTAL " : "",
1722                        priv->firmware_name);
1723
1724         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1725                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1726                                        iwl_ucode_callback);
1727 }
1728
1729 struct iwlagn_firmware_pieces {
1730         const void *inst, *data, *init, *init_data, *boot;
1731         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1732
1733         u32 build;
1734
1735         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1736         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1737 };
1738
1739 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1740                                        const struct firmware *ucode_raw,
1741                                        struct iwlagn_firmware_pieces *pieces)
1742 {
1743         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1744         u32 api_ver, hdr_size;
1745         const u8 *src;
1746
1747         priv->ucode_ver = le32_to_cpu(ucode->ver);
1748         api_ver = IWL_UCODE_API(priv->ucode_ver);
1749
1750         switch (api_ver) {
1751         default:
1752                 /*
1753                  * 4965 doesn't revision the firmware file format
1754                  * along with the API version, it always uses v1
1755                  * file format.
1756                  */
1757                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1758                                 CSR_HW_REV_TYPE_4965) {
1759                         hdr_size = 28;
1760                         if (ucode_raw->size < hdr_size) {
1761                                 IWL_ERR(priv, "File size too small!\n");
1762                                 return -EINVAL;
1763                         }
1764                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1765                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1766                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1767                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1768                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1769                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1770                         src = ucode->u.v2.data;
1771                         break;
1772                 }
1773                 /* fall through for 4965 */
1774         case 0:
1775         case 1:
1776         case 2:
1777                 hdr_size = 24;
1778                 if (ucode_raw->size < hdr_size) {
1779                         IWL_ERR(priv, "File size too small!\n");
1780                         return -EINVAL;
1781                 }
1782                 pieces->build = 0;
1783                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1784                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1785                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1786                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1787                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1788                 src = ucode->u.v1.data;
1789                 break;
1790         }
1791
1792         /* Verify size of file vs. image size info in file's header */
1793         if (ucode_raw->size != hdr_size + pieces->inst_size +
1794                                 pieces->data_size + pieces->init_size +
1795                                 pieces->init_data_size + pieces->boot_size) {
1796
1797                 IWL_ERR(priv,
1798                         "uCode file size %d does not match expected size\n",
1799                         (int)ucode_raw->size);
1800                 return -EINVAL;
1801         }
1802
1803         pieces->inst = src;
1804         src += pieces->inst_size;
1805         pieces->data = src;
1806         src += pieces->data_size;
1807         pieces->init = src;
1808         src += pieces->init_size;
1809         pieces->init_data = src;
1810         src += pieces->init_data_size;
1811         pieces->boot = src;
1812         src += pieces->boot_size;
1813
1814         return 0;
1815 }
1816
1817 static int iwlagn_wanted_ucode_alternative = 1;
1818
1819 static int iwlagn_load_firmware(struct iwl_priv *priv,
1820                                 const struct firmware *ucode_raw,
1821                                 struct iwlagn_firmware_pieces *pieces,
1822                                 struct iwlagn_ucode_capabilities *capa)
1823 {
1824         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1825         struct iwl_ucode_tlv *tlv;
1826         size_t len = ucode_raw->size;
1827         const u8 *data;
1828         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1829         u64 alternatives;
1830         u32 tlv_len;
1831         enum iwl_ucode_tlv_type tlv_type;
1832         const u8 *tlv_data;
1833
1834         if (len < sizeof(*ucode)) {
1835                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1836                 return -EINVAL;
1837         }
1838
1839         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1840                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1841                         le32_to_cpu(ucode->magic));
1842                 return -EINVAL;
1843         }
1844
1845         /*
1846          * Check which alternatives are present, and "downgrade"
1847          * when the chosen alternative is not present, warning
1848          * the user when that happens. Some files may not have
1849          * any alternatives, so don't warn in that case.
1850          */
1851         alternatives = le64_to_cpu(ucode->alternatives);
1852         tmp = wanted_alternative;
1853         if (wanted_alternative > 63)
1854                 wanted_alternative = 63;
1855         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1856                 wanted_alternative--;
1857         if (wanted_alternative && wanted_alternative != tmp)
1858                 IWL_WARN(priv,
1859                          "uCode alternative %d not available, choosing %d\n",
1860                          tmp, wanted_alternative);
1861
1862         priv->ucode_ver = le32_to_cpu(ucode->ver);
1863         pieces->build = le32_to_cpu(ucode->build);
1864         data = ucode->data;
1865
1866         len -= sizeof(*ucode);
1867
1868         while (len >= sizeof(*tlv)) {
1869                 u16 tlv_alt;
1870
1871                 len -= sizeof(*tlv);
1872                 tlv = (void *)data;
1873
1874                 tlv_len = le32_to_cpu(tlv->length);
1875                 tlv_type = le16_to_cpu(tlv->type);
1876                 tlv_alt = le16_to_cpu(tlv->alternative);
1877                 tlv_data = tlv->data;
1878
1879                 if (len < tlv_len) {
1880                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1881                                 len, tlv_len);
1882                         return -EINVAL;
1883                 }
1884                 len -= ALIGN(tlv_len, 4);
1885                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1886
1887                 /*
1888                  * Alternative 0 is always valid.
1889                  *
1890                  * Skip alternative TLVs that are not selected.
1891                  */
1892                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1893                         continue;
1894
1895                 switch (tlv_type) {
1896                 case IWL_UCODE_TLV_INST:
1897                         pieces->inst = tlv_data;
1898                         pieces->inst_size = tlv_len;
1899                         break;
1900                 case IWL_UCODE_TLV_DATA:
1901                         pieces->data = tlv_data;
1902                         pieces->data_size = tlv_len;
1903                         break;
1904                 case IWL_UCODE_TLV_INIT:
1905                         pieces->init = tlv_data;
1906                         pieces->init_size = tlv_len;
1907                         break;
1908                 case IWL_UCODE_TLV_INIT_DATA:
1909                         pieces->init_data = tlv_data;
1910                         pieces->init_data_size = tlv_len;
1911                         break;
1912                 case IWL_UCODE_TLV_BOOT:
1913                         pieces->boot = tlv_data;
1914                         pieces->boot_size = tlv_len;
1915                         break;
1916                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1917                         if (tlv_len != sizeof(u32))
1918                                 goto invalid_tlv_len;
1919                         capa->max_probe_length =
1920                                         le32_to_cpup((__le32 *)tlv_data);
1921                         break;
1922                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1923                         if (tlv_len != sizeof(u32))
1924                                 goto invalid_tlv_len;
1925                         pieces->init_evtlog_ptr =
1926                                         le32_to_cpup((__le32 *)tlv_data);
1927                         break;
1928                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1929                         if (tlv_len != sizeof(u32))
1930                                 goto invalid_tlv_len;
1931                         pieces->init_evtlog_size =
1932                                         le32_to_cpup((__le32 *)tlv_data);
1933                         break;
1934                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1935                         if (tlv_len != sizeof(u32))
1936                                 goto invalid_tlv_len;
1937                         pieces->init_errlog_ptr =
1938                                         le32_to_cpup((__le32 *)tlv_data);
1939                         break;
1940                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1941                         if (tlv_len != sizeof(u32))
1942                                 goto invalid_tlv_len;
1943                         pieces->inst_evtlog_ptr =
1944                                         le32_to_cpup((__le32 *)tlv_data);
1945                         break;
1946                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1947                         if (tlv_len != sizeof(u32))
1948                                 goto invalid_tlv_len;
1949                         pieces->inst_evtlog_size =
1950                                         le32_to_cpup((__le32 *)tlv_data);
1951                         break;
1952                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1953                         if (tlv_len != sizeof(u32))
1954                                 goto invalid_tlv_len;
1955                         pieces->inst_errlog_ptr =
1956                                         le32_to_cpup((__le32 *)tlv_data);
1957                         break;
1958                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1959                         if (tlv_len)
1960                                 goto invalid_tlv_len;
1961                         priv->enhance_sensitivity_table = true;
1962                         break;
1963                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1964                         if (tlv_len != sizeof(u32))
1965                                 goto invalid_tlv_len;
1966                         capa->standard_phy_calibration_size =
1967                                         le32_to_cpup((__le32 *)tlv_data);
1968                         break;
1969                 default:
1970                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1971                         break;
1972                 }
1973         }
1974
1975         if (len) {
1976                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1977                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1978                 return -EINVAL;
1979         }
1980
1981         return 0;
1982
1983  invalid_tlv_len:
1984         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1985         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1986
1987         return -EINVAL;
1988 }
1989
1990 /**
1991  * iwl_ucode_callback - callback when firmware was loaded
1992  *
1993  * If loaded successfully, copies the firmware into buffers
1994  * for the card to fetch (via DMA).
1995  */
1996 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1997 {
1998         struct iwl_priv *priv = context;
1999         struct iwl_ucode_header *ucode;
2000         int err;
2001         struct iwlagn_firmware_pieces pieces;
2002         const unsigned int api_max = priv->cfg->ucode_api_max;
2003         const unsigned int api_min = priv->cfg->ucode_api_min;
2004         u32 api_ver;
2005         char buildstr[25];
2006         u32 build;
2007         struct iwlagn_ucode_capabilities ucode_capa = {
2008                 .max_probe_length = 200,
2009                 .standard_phy_calibration_size =
2010                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2011         };
2012
2013         memset(&pieces, 0, sizeof(pieces));
2014
2015         if (!ucode_raw) {
2016                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2017                         IWL_ERR(priv,
2018                                 "request for firmware file '%s' failed.\n",
2019                                 priv->firmware_name);
2020                 goto try_again;
2021         }
2022
2023         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2024                        priv->firmware_name, ucode_raw->size);
2025
2026         /* Make sure that we got at least the API version number */
2027         if (ucode_raw->size < 4) {
2028                 IWL_ERR(priv, "File size way too small!\n");
2029                 goto try_again;
2030         }
2031
2032         /* Data from ucode file:  header followed by uCode images */
2033         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2034
2035         if (ucode->ver)
2036                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2037         else
2038                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2039                                            &ucode_capa);
2040
2041         if (err)
2042                 goto try_again;
2043
2044         api_ver = IWL_UCODE_API(priv->ucode_ver);
2045         build = pieces.build;
2046
2047         /*
2048          * api_ver should match the api version forming part of the
2049          * firmware filename ... but we don't check for that and only rely
2050          * on the API version read from firmware header from here on forward
2051          */
2052         if (api_ver < api_min || api_ver > api_max) {
2053                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2054                           "Driver supports v%u, firmware is v%u.\n",
2055                           api_max, api_ver);
2056                 goto try_again;
2057         }
2058
2059         if (api_ver != api_max)
2060                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2061                           "got v%u. New firmware can be obtained "
2062                           "from http://www.intellinuxwireless.org.\n",
2063                           api_max, api_ver);
2064
2065         if (build)
2066                 sprintf(buildstr, " build %u%s", build,
2067                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2068                                 ? " (EXP)" : "");
2069         else
2070                 buildstr[0] = '\0';
2071
2072         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2073                  IWL_UCODE_MAJOR(priv->ucode_ver),
2074                  IWL_UCODE_MINOR(priv->ucode_ver),
2075                  IWL_UCODE_API(priv->ucode_ver),
2076                  IWL_UCODE_SERIAL(priv->ucode_ver),
2077                  buildstr);
2078
2079         snprintf(priv->hw->wiphy->fw_version,
2080                  sizeof(priv->hw->wiphy->fw_version),
2081                  "%u.%u.%u.%u%s",
2082                  IWL_UCODE_MAJOR(priv->ucode_ver),
2083                  IWL_UCODE_MINOR(priv->ucode_ver),
2084                  IWL_UCODE_API(priv->ucode_ver),
2085                  IWL_UCODE_SERIAL(priv->ucode_ver),
2086                  buildstr);
2087
2088         /*
2089          * For any of the failures below (before allocating pci memory)
2090          * we will try to load a version with a smaller API -- maybe the
2091          * user just got a corrupted version of the latest API.
2092          */
2093
2094         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2095                        priv->ucode_ver);
2096         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2097                        pieces.inst_size);
2098         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2099                        pieces.data_size);
2100         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2101                        pieces.init_size);
2102         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2103                        pieces.init_data_size);
2104         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2105                        pieces.boot_size);
2106
2107         /* Verify that uCode images will fit in card's SRAM */
2108         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2109                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2110                         pieces.inst_size);
2111                 goto try_again;
2112         }
2113
2114         if (pieces.data_size > priv->hw_params.max_data_size) {
2115                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2116                         pieces.data_size);
2117                 goto try_again;
2118         }
2119
2120         if (pieces.init_size > priv->hw_params.max_inst_size) {
2121                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2122                         pieces.init_size);
2123                 goto try_again;
2124         }
2125
2126         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2127                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2128                         pieces.init_data_size);
2129                 goto try_again;
2130         }
2131
2132         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2133                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2134                         pieces.boot_size);
2135                 goto try_again;
2136         }
2137
2138         /* Allocate ucode buffers for card's bus-master loading ... */
2139
2140         /* Runtime instructions and 2 copies of data:
2141          * 1) unmodified from disk
2142          * 2) backup cache for save/restore during power-downs */
2143         priv->ucode_code.len = pieces.inst_size;
2144         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2145
2146         priv->ucode_data.len = pieces.data_size;
2147         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2148
2149         priv->ucode_data_backup.len = pieces.data_size;
2150         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2151
2152         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2153             !priv->ucode_data_backup.v_addr)
2154                 goto err_pci_alloc;
2155
2156         /* Initialization instructions and data */
2157         if (pieces.init_size && pieces.init_data_size) {
2158                 priv->ucode_init.len = pieces.init_size;
2159                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2160
2161                 priv->ucode_init_data.len = pieces.init_data_size;
2162                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2163
2164                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2165                         goto err_pci_alloc;
2166         }
2167
2168         /* Bootstrap (instructions only, no data) */
2169         if (pieces.boot_size) {
2170                 priv->ucode_boot.len = pieces.boot_size;
2171                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2172
2173                 if (!priv->ucode_boot.v_addr)
2174                         goto err_pci_alloc;
2175         }
2176
2177         /* Now that we can no longer fail, copy information */
2178
2179         /*
2180          * The (size - 16) / 12 formula is based on the information recorded
2181          * for each event, which is of mode 1 (including timestamp) for all
2182          * new microcodes that include this information.
2183          */
2184         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2185         if (pieces.init_evtlog_size)
2186                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2187         else
2188                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2189         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2190         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2191         if (pieces.inst_evtlog_size)
2192                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2193         else
2194                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2195         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2196
2197         /* Copy images into buffers for card's bus-master reads ... */
2198
2199         /* Runtime instructions (first block of data in file) */
2200         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2201                         pieces.inst_size);
2202         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2203
2204         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2205                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2206
2207         /*
2208          * Runtime data
2209          * NOTE:  Copy into backup buffer will be done in iwl_up()
2210          */
2211         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2212                         pieces.data_size);
2213         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2214         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2215
2216         /* Initialization instructions */
2217         if (pieces.init_size) {
2218                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2219                                 pieces.init_size);
2220                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2221         }
2222
2223         /* Initialization data */
2224         if (pieces.init_data_size) {
2225                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2226                                pieces.init_data_size);
2227                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2228                        pieces.init_data_size);
2229         }
2230
2231         /* Bootstrap instructions */
2232         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2233                         pieces.boot_size);
2234         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2235
2236         /*
2237          * figure out the offset of chain noise reset and gain commands
2238          * base on the size of standard phy calibration commands table size
2239          */
2240         if (ucode_capa.standard_phy_calibration_size >
2241             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2242                 ucode_capa.standard_phy_calibration_size =
2243                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2244
2245         priv->_agn.phy_calib_chain_noise_reset_cmd =
2246                 ucode_capa.standard_phy_calibration_size;
2247         priv->_agn.phy_calib_chain_noise_gain_cmd =
2248                 ucode_capa.standard_phy_calibration_size + 1;
2249
2250         /**************************************************
2251          * This is still part of probe() in a sense...
2252          *
2253          * 9. Setup and register with mac80211 and debugfs
2254          **************************************************/
2255         err = iwl_mac_setup_register(priv, &ucode_capa);
2256         if (err)
2257                 goto out_unbind;
2258
2259         err = iwl_dbgfs_register(priv, DRV_NAME);
2260         if (err)
2261                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2262
2263         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2264                                         &iwl_attribute_group);
2265         if (err) {
2266                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2267                 goto out_unbind;
2268         }
2269
2270         /* We have our copies now, allow OS release its copies */
2271         release_firmware(ucode_raw);
2272         complete(&priv->_agn.firmware_loading_complete);
2273         return;
2274
2275  try_again:
2276         /* try next, if any */
2277         if (iwl_request_firmware(priv, false))
2278                 goto out_unbind;
2279         release_firmware(ucode_raw);
2280         return;
2281
2282  err_pci_alloc:
2283         IWL_ERR(priv, "failed to allocate pci memory\n");
2284         iwl_dealloc_ucode_pci(priv);
2285  out_unbind:
2286         complete(&priv->_agn.firmware_loading_complete);
2287         device_release_driver(&priv->pci_dev->dev);
2288         release_firmware(ucode_raw);
2289 }
2290
2291 static const char *desc_lookup_text[] = {
2292         "OK",
2293         "FAIL",
2294         "BAD_PARAM",
2295         "BAD_CHECKSUM",
2296         "NMI_INTERRUPT_WDG",
2297         "SYSASSERT",
2298         "FATAL_ERROR",
2299         "BAD_COMMAND",
2300         "HW_ERROR_TUNE_LOCK",
2301         "HW_ERROR_TEMPERATURE",
2302         "ILLEGAL_CHAN_FREQ",
2303         "VCC_NOT_STABLE",
2304         "FH_ERROR",
2305         "NMI_INTERRUPT_HOST",
2306         "NMI_INTERRUPT_ACTION_PT",
2307         "NMI_INTERRUPT_UNKNOWN",
2308         "UCODE_VERSION_MISMATCH",
2309         "HW_ERROR_ABS_LOCK",
2310         "HW_ERROR_CAL_LOCK_FAIL",
2311         "NMI_INTERRUPT_INST_ACTION_PT",
2312         "NMI_INTERRUPT_DATA_ACTION_PT",
2313         "NMI_TRM_HW_ER",
2314         "NMI_INTERRUPT_TRM",
2315         "NMI_INTERRUPT_BREAK_POINT"
2316         "DEBUG_0",
2317         "DEBUG_1",
2318         "DEBUG_2",
2319         "DEBUG_3",
2320 };
2321
2322 static struct { char *name; u8 num; } advanced_lookup[] = {
2323         { "NMI_INTERRUPT_WDG", 0x34 },
2324         { "SYSASSERT", 0x35 },
2325         { "UCODE_VERSION_MISMATCH", 0x37 },
2326         { "BAD_COMMAND", 0x38 },
2327         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2328         { "FATAL_ERROR", 0x3D },
2329         { "NMI_TRM_HW_ERR", 0x46 },
2330         { "NMI_INTERRUPT_TRM", 0x4C },
2331         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2332         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2333         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2334         { "NMI_INTERRUPT_HOST", 0x66 },
2335         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2336         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2337         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2338         { "ADVANCED_SYSASSERT", 0 },
2339 };
2340
2341 static const char *desc_lookup(u32 num)
2342 {
2343         int i;
2344         int max = ARRAY_SIZE(desc_lookup_text);
2345
2346         if (num < max)
2347                 return desc_lookup_text[num];
2348
2349         max = ARRAY_SIZE(advanced_lookup) - 1;
2350         for (i = 0; i < max; i++) {
2351                 if (advanced_lookup[i].num == num)
2352                         break;;
2353         }
2354         return advanced_lookup[i].name;
2355 }
2356
2357 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2358 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2359
2360 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2361 {
2362         u32 data2, line;
2363         u32 desc, time, count, base, data1;
2364         u32 blink1, blink2, ilink1, ilink2;
2365         u32 pc, hcmd;
2366
2367         if (priv->ucode_type == UCODE_INIT) {
2368                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2369                 if (!base)
2370                         base = priv->_agn.init_errlog_ptr;
2371         } else {
2372                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2373                 if (!base)
2374                         base = priv->_agn.inst_errlog_ptr;
2375         }
2376
2377         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2378                 IWL_ERR(priv,
2379                         "Not valid error log pointer 0x%08X for %s uCode\n",
2380                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2381                 return;
2382         }
2383
2384         count = iwl_read_targ_mem(priv, base);
2385
2386         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2387                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2388                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2389                         priv->status, count);
2390         }
2391
2392         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2393         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2394         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2395         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2396         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2397         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2398         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2399         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2400         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2401         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2402         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2403
2404         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2405                                       blink1, blink2, ilink1, ilink2);
2406
2407         IWL_ERR(priv, "Desc                                  Time       "
2408                 "data1      data2      line\n");
2409         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2410                 desc_lookup(desc), desc, time, data1, data2, line);
2411         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2412         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2413                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2414 }
2415
2416 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2417
2418 /**
2419  * iwl_print_event_log - Dump error event log to syslog
2420  *
2421  */
2422 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2423                                u32 num_events, u32 mode,
2424                                int pos, char **buf, size_t bufsz)
2425 {
2426         u32 i;
2427         u32 base;       /* SRAM byte address of event log header */
2428         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2429         u32 ptr;        /* SRAM byte address of log data */
2430         u32 ev, time, data; /* event log data */
2431         unsigned long reg_flags;
2432
2433         if (num_events == 0)
2434                 return pos;
2435
2436         if (priv->ucode_type == UCODE_INIT) {
2437                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2438                 if (!base)
2439                         base = priv->_agn.init_evtlog_ptr;
2440         } else {
2441                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2442                 if (!base)
2443                         base = priv->_agn.inst_evtlog_ptr;
2444         }
2445
2446         if (mode == 0)
2447                 event_size = 2 * sizeof(u32);
2448         else
2449                 event_size = 3 * sizeof(u32);
2450
2451         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2452
2453         /* Make sure device is powered up for SRAM reads */
2454         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2455         iwl_grab_nic_access(priv);
2456
2457         /* Set starting address; reads will auto-increment */
2458         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2459         rmb();
2460
2461         /* "time" is actually "data" for mode 0 (no timestamp).
2462         * place event id # at far right for easier visual parsing. */
2463         for (i = 0; i < num_events; i++) {
2464                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2465                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2466                 if (mode == 0) {
2467                         /* data, ev */
2468                         if (bufsz) {
2469                                 pos += scnprintf(*buf + pos, bufsz - pos,
2470                                                 "EVT_LOG:0x%08x:%04u\n",
2471                                                 time, ev);
2472                         } else {
2473                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2474                                         time, ev);
2475                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2476                                         time, ev);
2477                         }
2478                 } else {
2479                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2480                         if (bufsz) {
2481                                 pos += scnprintf(*buf + pos, bufsz - pos,
2482                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2483                                                  time, data, ev);
2484                         } else {
2485                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2486                                         time, data, ev);
2487                                 trace_iwlwifi_dev_ucode_event(priv, time,
2488                                         data, ev);
2489                         }
2490                 }
2491         }
2492
2493         /* Allow device to power down */
2494         iwl_release_nic_access(priv);
2495         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2496         return pos;
2497 }
2498
2499 /**
2500  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2501  */
2502 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2503                                     u32 num_wraps, u32 next_entry,
2504                                     u32 size, u32 mode,
2505                                     int pos, char **buf, size_t bufsz)
2506 {
2507         /*
2508          * display the newest DEFAULT_LOG_ENTRIES entries
2509          * i.e the entries just before the next ont that uCode would fill.
2510          */
2511         if (num_wraps) {
2512                 if (next_entry < size) {
2513                         pos = iwl_print_event_log(priv,
2514                                                 capacity - (size - next_entry),
2515                                                 size - next_entry, mode,
2516                                                 pos, buf, bufsz);
2517                         pos = iwl_print_event_log(priv, 0,
2518                                                   next_entry, mode,
2519                                                   pos, buf, bufsz);
2520                 } else
2521                         pos = iwl_print_event_log(priv, next_entry - size,
2522                                                   size, mode, pos, buf, bufsz);
2523         } else {
2524                 if (next_entry < size) {
2525                         pos = iwl_print_event_log(priv, 0, next_entry,
2526                                                   mode, pos, buf, bufsz);
2527                 } else {
2528                         pos = iwl_print_event_log(priv, next_entry - size,
2529                                                   size, mode, pos, buf, bufsz);
2530                 }
2531         }
2532         return pos;
2533 }
2534
2535 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2536
2537 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2538                             char **buf, bool display)
2539 {
2540         u32 base;       /* SRAM byte address of event log header */
2541         u32 capacity;   /* event log capacity in # entries */
2542         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2543         u32 num_wraps;  /* # times uCode wrapped to top of log */
2544         u32 next_entry; /* index of next entry to be written by uCode */
2545         u32 size;       /* # entries that we'll print */
2546         u32 logsize;
2547         int pos = 0;
2548         size_t bufsz = 0;
2549
2550         if (priv->ucode_type == UCODE_INIT) {
2551                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2552                 logsize = priv->_agn.init_evtlog_size;
2553                 if (!base)
2554                         base = priv->_agn.init_evtlog_ptr;
2555         } else {
2556                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2557                 logsize = priv->_agn.inst_evtlog_size;
2558                 if (!base)
2559                         base = priv->_agn.inst_evtlog_ptr;
2560         }
2561
2562         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2563                 IWL_ERR(priv,
2564                         "Invalid event log pointer 0x%08X for %s uCode\n",
2565                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2566                 return -EINVAL;
2567         }
2568
2569         /* event log header */
2570         capacity = iwl_read_targ_mem(priv, base);
2571         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2572         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2573         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2574
2575         if (capacity > logsize) {
2576                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2577                         capacity, logsize);
2578                 capacity = logsize;
2579         }
2580
2581         if (next_entry > logsize) {
2582                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2583                         next_entry, logsize);
2584                 next_entry = logsize;
2585         }
2586
2587         size = num_wraps ? capacity : next_entry;
2588
2589         /* bail out if nothing in log */
2590         if (size == 0) {
2591                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2592                 return pos;
2593         }
2594
2595 #ifdef CONFIG_IWLWIFI_DEBUG
2596         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2597                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2598                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2599 #else
2600         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2601                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2602 #endif
2603         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2604                 size);
2605
2606 #ifdef CONFIG_IWLWIFI_DEBUG
2607         if (display) {
2608                 if (full_log)
2609                         bufsz = capacity * 48;
2610                 else
2611                         bufsz = size * 48;
2612                 *buf = kmalloc(bufsz, GFP_KERNEL);
2613                 if (!*buf)
2614                         return -ENOMEM;
2615         }
2616         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2617                 /*
2618                  * if uCode has wrapped back to top of log,
2619                  * start at the oldest entry,
2620                  * i.e the next one that uCode would fill.
2621                  */
2622                 if (num_wraps)
2623                         pos = iwl_print_event_log(priv, next_entry,
2624                                                 capacity - next_entry, mode,
2625                                                 pos, buf, bufsz);
2626                 /* (then/else) start at top of log */
2627                 pos = iwl_print_event_log(priv, 0,
2628                                           next_entry, mode, pos, buf, bufsz);
2629         } else
2630                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2631                                                 next_entry, size, mode,
2632                                                 pos, buf, bufsz);
2633 #else
2634         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2635                                         next_entry, size, mode,
2636                                         pos, buf, bufsz);
2637 #endif
2638         return pos;
2639 }
2640
2641 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2642 {
2643         struct iwl_ct_kill_config cmd;
2644         struct iwl_ct_kill_throttling_config adv_cmd;
2645         unsigned long flags;
2646         int ret = 0;
2647
2648         spin_lock_irqsave(&priv->lock, flags);
2649         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2650                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2651         spin_unlock_irqrestore(&priv->lock, flags);
2652         priv->thermal_throttle.ct_kill_toggle = false;
2653
2654         if (priv->cfg->support_ct_kill_exit) {
2655                 adv_cmd.critical_temperature_enter =
2656                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2657                 adv_cmd.critical_temperature_exit =
2658                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2659
2660                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2661                                        sizeof(adv_cmd), &adv_cmd);
2662                 if (ret)
2663                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2664                 else
2665                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2666                                         "succeeded, "
2667                                         "critical temperature enter is %d,"
2668                                         "exit is %d\n",
2669                                        priv->hw_params.ct_kill_threshold,
2670                                        priv->hw_params.ct_kill_exit_threshold);
2671         } else {
2672                 cmd.critical_temperature_R =
2673                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2674
2675                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2676                                        sizeof(cmd), &cmd);
2677                 if (ret)
2678                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2679                 else
2680                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2681                                         "succeeded, "
2682                                         "critical temperature is %d\n",
2683                                         priv->hw_params.ct_kill_threshold);
2684         }
2685 }
2686
2687 /**
2688  * iwl_alive_start - called after REPLY_ALIVE notification received
2689  *                   from protocol/runtime uCode (initialization uCode's
2690  *                   Alive gets handled by iwl_init_alive_start()).
2691  */
2692 static void iwl_alive_start(struct iwl_priv *priv)
2693 {
2694         int ret = 0;
2695
2696         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2697
2698         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2699                 /* We had an error bringing up the hardware, so take it
2700                  * all the way back down so we can try again */
2701                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2702                 goto restart;
2703         }
2704
2705         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2706          * This is a paranoid check, because we would not have gotten the
2707          * "runtime" alive if code weren't properly loaded.  */
2708         if (iwl_verify_ucode(priv)) {
2709                 /* Runtime instruction load was bad;
2710                  * take it all the way back down so we can try again */
2711                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2712                 goto restart;
2713         }
2714
2715         ret = priv->cfg->ops->lib->alive_notify(priv);
2716         if (ret) {
2717                 IWL_WARN(priv,
2718                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2719                 goto restart;
2720         }
2721
2722         /* After the ALIVE response, we can send host commands to the uCode */
2723         set_bit(STATUS_ALIVE, &priv->status);
2724
2725         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2726                 /* Enable timer to monitor the driver queues */
2727                 mod_timer(&priv->monitor_recover,
2728                         jiffies +
2729                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2730         }
2731
2732         if (iwl_is_rfkill(priv))
2733                 return;
2734
2735         ieee80211_wake_queues(priv->hw);
2736
2737         priv->active_rate = IWL_RATES_MASK;
2738
2739         /* Configure Tx antenna selection based on H/W config */
2740         if (priv->cfg->ops->hcmd->set_tx_ant)
2741                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2742
2743         if (iwl_is_associated(priv)) {
2744                 struct iwl_rxon_cmd *active_rxon =
2745                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2746                 /* apply any changes in staging */
2747                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2748                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2749         } else {
2750                 /* Initialize our rx_config data */
2751                 iwl_connection_init_rx_config(priv, NULL);
2752
2753                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2754                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2755         }
2756
2757         /* Configure Bluetooth device coexistence support */
2758         priv->cfg->ops->hcmd->send_bt_config(priv);
2759
2760         iwl_reset_run_time_calib(priv);
2761
2762         /* Configure the adapter for unassociated operation */
2763         iwlcore_commit_rxon(priv);
2764
2765         /* At this point, the NIC is initialized and operational */
2766         iwl_rf_kill_ct_config(priv);
2767
2768         iwl_leds_init(priv);
2769
2770         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2771         set_bit(STATUS_READY, &priv->status);
2772         wake_up_interruptible(&priv->wait_command_queue);
2773
2774         iwl_power_update_mode(priv, true);
2775         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2776
2777
2778         return;
2779
2780  restart:
2781         queue_work(priv->workqueue, &priv->restart);
2782 }
2783
2784 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2785
2786 static void __iwl_down(struct iwl_priv *priv)
2787 {
2788         unsigned long flags;
2789         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2790
2791         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2792
2793         if (!exit_pending)
2794                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2795
2796         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2797          * to prevent rearm timer */
2798         if (priv->cfg->ops->lib->recover_from_tx_stall)
2799                 del_timer_sync(&priv->monitor_recover);
2800
2801         iwl_clear_ucode_stations(priv);
2802         iwl_dealloc_bcast_station(priv);
2803         iwl_clear_driver_stations(priv);
2804
2805         /* reset BT coex data */
2806         priv->bt_traffic_load = 0;
2807         priv->bt_sco_active = false;
2808         priv->bt_full_concurrent = false;
2809         priv->bt_ci_compliance = 0;
2810
2811         /* Unblock any waiting calls */
2812         wake_up_interruptible_all(&priv->wait_command_queue);
2813
2814         /* Wipe out the EXIT_PENDING status bit if we are not actually
2815          * exiting the module */
2816         if (!exit_pending)
2817                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2818
2819         /* stop and reset the on-board processor */
2820         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2821
2822         /* tell the device to stop sending interrupts */
2823         spin_lock_irqsave(&priv->lock, flags);
2824         iwl_disable_interrupts(priv);
2825         spin_unlock_irqrestore(&priv->lock, flags);
2826         iwl_synchronize_irq(priv);
2827
2828         if (priv->mac80211_registered)
2829                 ieee80211_stop_queues(priv->hw);
2830
2831         /* If we have not previously called iwl_init() then
2832          * clear all bits but the RF Kill bit and return */
2833         if (!iwl_is_init(priv)) {
2834                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2835                                         STATUS_RF_KILL_HW |
2836                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2837                                         STATUS_GEO_CONFIGURED |
2838                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2839                                         STATUS_EXIT_PENDING;
2840                 goto exit;
2841         }
2842
2843         /* ...otherwise clear out all the status bits but the RF Kill
2844          * bit and continue taking the NIC down. */
2845         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2846                                 STATUS_RF_KILL_HW |
2847                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2848                                 STATUS_GEO_CONFIGURED |
2849                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2850                                 STATUS_FW_ERROR |
2851                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2852                                 STATUS_EXIT_PENDING;
2853
2854         /* device going down, Stop using ICT table */
2855         iwl_disable_ict(priv);
2856
2857         iwlagn_txq_ctx_stop(priv);
2858         iwlagn_rxq_stop(priv);
2859
2860         /* Power-down device's busmaster DMA clocks */
2861         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2862         udelay(5);
2863
2864         /* Make sure (redundant) we've released our request to stay awake */
2865         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2866
2867         /* Stop the device, and put it in low power state */
2868         priv->cfg->ops->lib->apm_ops.stop(priv);
2869
2870  exit:
2871         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2872
2873         if (priv->ibss_beacon)
2874                 dev_kfree_skb(priv->ibss_beacon);
2875         priv->ibss_beacon = NULL;
2876
2877         /* clear out any free frames */
2878         iwl_clear_free_frames(priv);
2879 }
2880
2881 static void iwl_down(struct iwl_priv *priv)
2882 {
2883         mutex_lock(&priv->mutex);
2884         __iwl_down(priv);
2885         mutex_unlock(&priv->mutex);
2886
2887         iwl_cancel_deferred_work(priv);
2888 }
2889
2890 #define HW_READY_TIMEOUT (50)
2891
2892 static int iwl_set_hw_ready(struct iwl_priv *priv)
2893 {
2894         int ret = 0;
2895
2896         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2897                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2898
2899         /* See if we got it */
2900         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2901                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2902                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2903                                 HW_READY_TIMEOUT);
2904         if (ret != -ETIMEDOUT)
2905                 priv->hw_ready = true;
2906         else
2907                 priv->hw_ready = false;
2908
2909         IWL_DEBUG_INFO(priv, "hardware %s\n",
2910                       (priv->hw_ready == 1) ? "ready" : "not ready");
2911         return ret;
2912 }
2913
2914 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2915 {
2916         int ret = 0;
2917
2918         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2919
2920         ret = iwl_set_hw_ready(priv);
2921         if (priv->hw_ready)
2922                 return ret;
2923
2924         /* If HW is not ready, prepare the conditions to check again */
2925         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2926                         CSR_HW_IF_CONFIG_REG_PREPARE);
2927
2928         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2929                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2930                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2931
2932         /* HW should be ready by now, check again. */
2933         if (ret != -ETIMEDOUT)
2934                 iwl_set_hw_ready(priv);
2935
2936         return ret;
2937 }
2938
2939 #define MAX_HW_RESTARTS 5
2940
2941 static int __iwl_up(struct iwl_priv *priv)
2942 {
2943         int i;
2944         int ret;
2945
2946         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2947                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2948                 return -EIO;
2949         }
2950
2951         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2952                 IWL_ERR(priv, "ucode not available for device bringup\n");
2953                 return -EIO;
2954         }
2955
2956         ret = iwl_alloc_bcast_station(priv, true);
2957         if (ret)
2958                 return ret;
2959
2960         iwl_prepare_card_hw(priv);
2961
2962         if (!priv->hw_ready) {
2963                 IWL_WARN(priv, "Exit HW not ready\n");
2964                 return -EIO;
2965         }
2966
2967         /* If platform's RF_KILL switch is NOT set to KILL */
2968         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2969                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2970         else
2971                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2972
2973         if (iwl_is_rfkill(priv)) {
2974                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2975
2976                 iwl_enable_interrupts(priv);
2977                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2978                 return 0;
2979         }
2980
2981         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2982
2983         ret = iwlagn_hw_nic_init(priv);
2984         if (ret) {
2985                 IWL_ERR(priv, "Unable to init nic\n");
2986                 return ret;
2987         }
2988
2989         /* make sure rfkill handshake bits are cleared */
2990         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2991         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2992                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2993
2994         /* clear (again), then enable host interrupts */
2995         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2996         iwl_enable_interrupts(priv);
2997
2998         /* really make sure rfkill handshake bits are cleared */
2999         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3000         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3001
3002         /* Copy original ucode data image from disk into backup cache.
3003          * This will be used to initialize the on-board processor's
3004          * data SRAM for a clean start when the runtime program first loads. */
3005         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3006                priv->ucode_data.len);
3007
3008         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3009
3010                 /* load bootstrap state machine,
3011                  * load bootstrap program into processor's memory,
3012                  * prepare to load the "initialize" uCode */
3013                 ret = priv->cfg->ops->lib->load_ucode(priv);
3014
3015                 if (ret) {
3016                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3017                                 ret);
3018                         continue;
3019                 }
3020
3021                 /* start card; "initialize" will load runtime ucode */
3022                 iwl_nic_start(priv);
3023
3024                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3025
3026                 return 0;
3027         }
3028
3029         set_bit(STATUS_EXIT_PENDING, &priv->status);
3030         __iwl_down(priv);
3031         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3032
3033         /* tried to restart and config the device for as long as our
3034          * patience could withstand */
3035         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3036         return -EIO;
3037 }
3038
3039
3040 /*****************************************************************************
3041  *
3042  * Workqueue callbacks
3043  *
3044  *****************************************************************************/
3045
3046 static void iwl_bg_init_alive_start(struct work_struct *data)
3047 {
3048         struct iwl_priv *priv =
3049             container_of(data, struct iwl_priv, init_alive_start.work);
3050
3051         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3052                 return;
3053
3054         mutex_lock(&priv->mutex);
3055         priv->cfg->ops->lib->init_alive_start(priv);
3056         mutex_unlock(&priv->mutex);
3057 }
3058
3059 static void iwl_bg_alive_start(struct work_struct *data)
3060 {
3061         struct iwl_priv *priv =
3062             container_of(data, struct iwl_priv, alive_start.work);
3063
3064         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3065                 return;
3066
3067         /* enable dram interrupt */
3068         iwl_reset_ict(priv);
3069
3070         mutex_lock(&priv->mutex);
3071         iwl_alive_start(priv);
3072         mutex_unlock(&priv->mutex);
3073 }
3074
3075 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3076 {
3077         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3078                         run_time_calib_work);
3079
3080         mutex_lock(&priv->mutex);
3081
3082         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3083             test_bit(STATUS_SCANNING, &priv->status)) {
3084                 mutex_unlock(&priv->mutex);
3085                 return;
3086         }
3087
3088         if (priv->start_calib) {
3089                 if (priv->cfg->bt_statistics) {
3090                         iwl_chain_noise_calibration(priv,
3091                                         (void *)&priv->_agn.statistics_bt);
3092                         iwl_sensitivity_calibration(priv,
3093                                         (void *)&priv->_agn.statistics_bt);
3094                 } else {
3095                         iwl_chain_noise_calibration(priv,
3096                                         (void *)&priv->_agn.statistics);
3097                         iwl_sensitivity_calibration(priv,
3098                                         (void *)&priv->_agn.statistics);
3099                 }
3100         }
3101
3102         mutex_unlock(&priv->mutex);
3103 }
3104
3105 static void iwl_bg_restart(struct work_struct *data)
3106 {
3107         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3108
3109         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3110                 return;
3111
3112         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3113                 bool bt_sco, bt_full_concurrent;
3114                 u8 bt_ci_compliance;
3115                 u8 bt_load;
3116
3117                 mutex_lock(&priv->mutex);
3118                 priv->vif = NULL;
3119                 priv->is_open = 0;
3120
3121                 /*
3122                  * __iwl_down() will clear the BT status variables,
3123                  * which is correct, but when we restart we really
3124                  * want to keep them so restore them afterwards.
3125                  *
3126                  * The restart process will later pick them up and
3127                  * re-configure the hw when we reconfigure the BT
3128                  * command.
3129                  */
3130                 bt_sco = priv->bt_sco_active;
3131                 bt_full_concurrent = priv->bt_full_concurrent;
3132                 bt_ci_compliance = priv->bt_ci_compliance;
3133                 bt_load = priv->bt_traffic_load;
3134
3135                 __iwl_down(priv);
3136
3137                 priv->bt_sco_active = bt_sco;
3138                 priv->bt_full_concurrent = bt_full_concurrent;
3139                 priv->bt_ci_compliance = bt_ci_compliance;
3140                 priv->bt_traffic_load = bt_load;
3141
3142                 mutex_unlock(&priv->mutex);
3143                 iwl_cancel_deferred_work(priv);
3144                 ieee80211_restart_hw(priv->hw);
3145         } else {
3146                 iwl_down(priv);
3147
3148                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3149                         return;
3150
3151                 mutex_lock(&priv->mutex);
3152                 __iwl_up(priv);
3153                 mutex_unlock(&priv->mutex);
3154         }
3155 }
3156
3157 static void iwl_bg_rx_replenish(struct work_struct *data)
3158 {
3159         struct iwl_priv *priv =
3160             container_of(data, struct iwl_priv, rx_replenish);
3161
3162         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3163                 return;
3164
3165         mutex_lock(&priv->mutex);
3166         iwlagn_rx_replenish(priv);
3167         mutex_unlock(&priv->mutex);
3168 }
3169
3170 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3171
3172 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3173 {
3174         struct ieee80211_conf *conf = NULL;
3175         int ret = 0;
3176
3177         if (!vif || !priv->is_open)
3178                 return;
3179
3180         if (vif->type == NL80211_IFTYPE_AP) {
3181                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3182                 return;
3183         }
3184
3185         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3186                 return;
3187
3188         iwl_scan_cancel_timeout(priv, 200);
3189
3190         conf = ieee80211_get_hw_conf(priv->hw);
3191
3192         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3193         iwlcore_commit_rxon(priv);
3194
3195         ret = iwl_send_rxon_timing(priv, vif);
3196         if (ret)
3197                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3198                             "Attempting to continue.\n");
3199
3200         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3201
3202         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3203
3204         if (priv->cfg->ops->hcmd->set_rxon_chain)
3205                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3206
3207         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3208
3209         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3210                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3211
3212         if (vif->bss_conf.use_short_preamble)
3213                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3214         else
3215                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3216
3217         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3218                 if (vif->bss_conf.use_short_slot)
3219                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3220                 else
3221                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3222         }
3223
3224         iwlcore_commit_rxon(priv);
3225
3226         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3227                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3228
3229         switch (vif->type) {
3230         case NL80211_IFTYPE_STATION:
3231                 break;
3232         case NL80211_IFTYPE_ADHOC:
3233                 iwl_send_beacon_cmd(priv);
3234                 break;
3235         default:
3236                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3237                           __func__, vif->type);
3238                 break;
3239         }
3240
3241         /* the chain noise calibration will enabled PM upon completion
3242          * If chain noise has already been run, then we need to enable
3243          * power management here */
3244         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3245                 iwl_power_update_mode(priv, false);
3246
3247         /* Enable Rx differential gain and sensitivity calibrations */
3248         iwl_chain_noise_reset(priv);
3249         priv->start_calib = 1;
3250
3251 }
3252
3253 /*****************************************************************************
3254  *
3255  * mac80211 entry point functions
3256  *
3257  *****************************************************************************/
3258
3259 #define UCODE_READY_TIMEOUT     (4 * HZ)
3260
3261 /*
3262  * Not a mac80211 entry point function, but it fits in with all the
3263  * other mac80211 functions grouped here.
3264  */
3265 static int iwl_mac_setup_register(struct iwl_priv *priv,
3266                                   struct iwlagn_ucode_capabilities *capa)
3267 {
3268         int ret;
3269         struct ieee80211_hw *hw = priv->hw;
3270         hw->rate_control_algorithm = "iwl-agn-rs";
3271
3272         /* Tell mac80211 our characteristics */
3273         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3274                     IEEE80211_HW_AMPDU_AGGREGATION |
3275                     IEEE80211_HW_SPECTRUM_MGMT;
3276
3277         if (!priv->cfg->broken_powersave)
3278                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3279                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3280
3281         if (priv->cfg->sku & IWL_SKU_N)
3282                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3283                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3284
3285         hw->sta_data_size = sizeof(struct iwl_station_priv);
3286         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3287
3288         hw->wiphy->interface_modes =
3289                 BIT(NL80211_IFTYPE_STATION) |
3290                 BIT(NL80211_IFTYPE_ADHOC);
3291
3292         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3293                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3294
3295         /*
3296          * For now, disable PS by default because it affects
3297          * RX performance significantly.
3298          */
3299         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3300
3301         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3302         /* we create the 802.11 header and a zero-length SSID element */
3303         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3304
3305         /* Default value; 4 EDCA QOS priorities */
3306         hw->queues = 4;
3307
3308         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3309
3310         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3311                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3312                         &priv->bands[IEEE80211_BAND_2GHZ];
3313         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3314                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3315                         &priv->bands[IEEE80211_BAND_5GHZ];
3316
3317         ret = ieee80211_register_hw(priv->hw);
3318         if (ret) {
3319                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3320                 return ret;
3321         }
3322         priv->mac80211_registered = 1;
3323
3324         return 0;
3325 }
3326
3327
3328 static int iwl_mac_start(struct ieee80211_hw *hw)
3329 {
3330         struct iwl_priv *priv = hw->priv;
3331         int ret;
3332
3333         IWL_DEBUG_MAC80211(priv, "enter\n");
3334
3335         /* we should be verifying the device is ready to be opened */
3336         mutex_lock(&priv->mutex);
3337         ret = __iwl_up(priv);
3338         mutex_unlock(&priv->mutex);
3339
3340         if (ret)
3341                 return ret;
3342
3343         if (iwl_is_rfkill(priv))
3344                 goto out;
3345
3346         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3347
3348         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3349          * mac80211 will not be run successfully. */
3350         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3351                         test_bit(STATUS_READY, &priv->status),
3352                         UCODE_READY_TIMEOUT);
3353         if (!ret) {
3354                 if (!test_bit(STATUS_READY, &priv->status)) {
3355                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3356                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3357                         return -ETIMEDOUT;
3358                 }
3359         }
3360
3361         iwl_led_start(priv);
3362
3363 out:
3364         priv->is_open = 1;
3365         IWL_DEBUG_MAC80211(priv, "leave\n");
3366         return 0;
3367 }
3368
3369 static void iwl_mac_stop(struct ieee80211_hw *hw)
3370 {
3371         struct iwl_priv *priv = hw->priv;
3372
3373         IWL_DEBUG_MAC80211(priv, "enter\n");
3374
3375         if (!priv->is_open)
3376                 return;
3377
3378         priv->is_open = 0;
3379
3380         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3381                 /* stop mac, cancel any scan request and clear
3382                  * RXON_FILTER_ASSOC_MSK BIT
3383                  */
3384                 mutex_lock(&priv->mutex);
3385                 iwl_scan_cancel_timeout(priv, 100);
3386                 mutex_unlock(&priv->mutex);
3387         }
3388
3389         iwl_down(priv);
3390
3391         flush_workqueue(priv->workqueue);
3392
3393         /* enable interrupts again in order to receive rfkill changes */
3394         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3395         iwl_enable_interrupts(priv);
3396
3397         IWL_DEBUG_MAC80211(priv, "leave\n");
3398 }
3399
3400 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3401 {
3402         struct iwl_priv *priv = hw->priv;
3403
3404         IWL_DEBUG_MACDUMP(priv, "enter\n");
3405
3406         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3407                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3408
3409         if (iwlagn_tx_skb(priv, skb))
3410                 dev_kfree_skb_any(skb);
3411
3412         IWL_DEBUG_MACDUMP(priv, "leave\n");
3413         return NETDEV_TX_OK;
3414 }
3415
3416 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3417 {
3418         int ret = 0;
3419
3420         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3421                 return;
3422
3423         /* The following should be done only at AP bring up */
3424         if (!iwl_is_associated(priv)) {
3425
3426                 /* RXON - unassoc (to set timing command) */
3427                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3428                 iwlcore_commit_rxon(priv);
3429
3430                 /* RXON Timing */
3431                 ret = iwl_send_rxon_timing(priv, vif);
3432                 if (ret)
3433                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3434                                         "Attempting to continue.\n");
3435
3436                 /* AP has all antennas */
3437                 priv->chain_noise_data.active_chains =
3438                         priv->hw_params.valid_rx_ant;
3439                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3440                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3441                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3442
3443                 priv->staging_rxon.assoc_id = 0;
3444
3445                 if (vif->bss_conf.use_short_preamble)
3446                         priv->staging_rxon.flags |=
3447                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3448                 else
3449                         priv->staging_rxon.flags &=
3450                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3451
3452                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3453                         if (vif->bss_conf.use_short_slot)
3454                                 priv->staging_rxon.flags |=
3455                                         RXON_FLG_SHORT_SLOT_MSK;
3456                         else
3457                                 priv->staging_rxon.flags &=
3458                                         ~RXON_FLG_SHORT_SLOT_MSK;
3459                 }
3460                 /* restore RXON assoc */
3461                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3462                 iwlcore_commit_rxon(priv);
3463         }
3464         iwl_send_beacon_cmd(priv);
3465
3466         /* FIXME - we need to add code here to detect a totally new
3467          * configuration, reset the AP, unassoc, rxon timing, assoc,
3468          * clear sta table, add BCAST sta... */
3469 }
3470
3471 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3472                                     struct ieee80211_vif *vif,
3473                                     struct ieee80211_key_conf *keyconf,
3474                                     struct ieee80211_sta *sta,
3475                                     u32 iv32, u16 *phase1key)
3476 {
3477
3478         struct iwl_priv *priv = hw->priv;
3479         IWL_DEBUG_MAC80211(priv, "enter\n");
3480
3481         iwl_update_tkip_key(priv, keyconf, sta,
3482                             iv32, phase1key);
3483
3484         IWL_DEBUG_MAC80211(priv, "leave\n");
3485 }
3486
3487 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3488                            struct ieee80211_vif *vif,
3489                            struct ieee80211_sta *sta,
3490                            struct ieee80211_key_conf *key)
3491 {
3492         struct iwl_priv *priv = hw->priv;
3493         int ret;
3494         u8 sta_id;
3495         bool is_default_wep_key = false;
3496
3497         IWL_DEBUG_MAC80211(priv, "enter\n");
3498
3499         if (priv->cfg->mod_params->sw_crypto) {
3500                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3501                 return -EOPNOTSUPP;
3502         }
3503
3504         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3505         if (sta_id == IWL_INVALID_STATION)
3506                 return -EINVAL;
3507
3508         mutex_lock(&priv->mutex);
3509         iwl_scan_cancel_timeout(priv, 100);
3510
3511         /*
3512          * If we are getting WEP group key and we didn't receive any key mapping
3513          * so far, we are in legacy wep mode (group key only), otherwise we are
3514          * in 1X mode.
3515          * In legacy wep mode, we use another host command to the uCode.
3516          */
3517         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3518              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3519             !sta) {
3520                 if (cmd == SET_KEY)
3521                         is_default_wep_key = !priv->key_mapping_key;
3522                 else
3523                         is_default_wep_key =
3524                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3525         }
3526
3527         switch (cmd) {
3528         case SET_KEY:
3529                 if (is_default_wep_key)
3530                         ret = iwl_set_default_wep_key(priv, key);
3531                 else
3532                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3533
3534                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3535                 break;
3536         case DISABLE_KEY:
3537                 if (is_default_wep_key)
3538                         ret = iwl_remove_default_wep_key(priv, key);
3539                 else
3540                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3541
3542                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3543                 break;
3544         default:
3545                 ret = -EINVAL;
3546         }
3547
3548         mutex_unlock(&priv->mutex);
3549         IWL_DEBUG_MAC80211(priv, "leave\n");
3550
3551         return ret;
3552 }
3553
3554 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3555                                 struct ieee80211_vif *vif,
3556                                 enum ieee80211_ampdu_mlme_action action,
3557                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3558 {
3559         struct iwl_priv *priv = hw->priv;
3560         int ret = -EINVAL;
3561
3562         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3563                      sta->addr, tid);
3564
3565         if (!(priv->cfg->sku & IWL_SKU_N))
3566                 return -EACCES;
3567
3568         mutex_lock(&priv->mutex);
3569
3570         switch (action) {
3571         case IEEE80211_AMPDU_RX_START:
3572                 IWL_DEBUG_HT(priv, "start Rx\n");
3573                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3574                 break;
3575         case IEEE80211_AMPDU_RX_STOP:
3576                 IWL_DEBUG_HT(priv, "stop Rx\n");
3577                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3578                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3579                         ret = 0;
3580                 break;
3581         case IEEE80211_AMPDU_TX_START:
3582                 IWL_DEBUG_HT(priv, "start Tx\n");
3583                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3584                 if (ret == 0) {
3585                         priv->_agn.agg_tids_count++;
3586                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3587                                      priv->_agn.agg_tids_count);
3588                 }
3589                 break;
3590         case IEEE80211_AMPDU_TX_STOP:
3591                 IWL_DEBUG_HT(priv, "stop Tx\n");
3592                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3593                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3594                         priv->_agn.agg_tids_count--;
3595                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3596                                      priv->_agn.agg_tids_count);
3597                 }
3598                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3599                         ret = 0;
3600                 if (priv->cfg->use_rts_for_aggregation) {
3601                         struct iwl_station_priv *sta_priv =
3602                                 (void *) sta->drv_priv;
3603                         /*
3604                          * switch off RTS/CTS if it was previously enabled
3605                          */
3606
3607                         sta_priv->lq_sta.lq.general_params.flags &=
3608                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3609                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3610                                 CMD_ASYNC, false);
3611                 }
3612                 break;
3613         case IEEE80211_AMPDU_TX_OPERATIONAL:
3614                 if (priv->cfg->use_rts_for_aggregation) {
3615                         struct iwl_station_priv *sta_priv =
3616                                 (void *) sta->drv_priv;
3617
3618                         /*
3619                          * switch to RTS/CTS if it is the prefer protection
3620                          * method for HT traffic
3621                          */
3622
3623                         sta_priv->lq_sta.lq.general_params.flags |=
3624                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3625                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3626                                 CMD_ASYNC, false);
3627                 }
3628                 ret = 0;
3629                 break;
3630         }
3631         mutex_unlock(&priv->mutex);
3632
3633         return ret;
3634 }
3635
3636 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3637                                struct ieee80211_vif *vif,
3638                                enum sta_notify_cmd cmd,
3639                                struct ieee80211_sta *sta)
3640 {
3641         struct iwl_priv *priv = hw->priv;
3642         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3643         int sta_id;
3644
3645         switch (cmd) {
3646         case STA_NOTIFY_SLEEP:
3647                 WARN_ON(!sta_priv->client);
3648                 sta_priv->asleep = true;
3649                 if (atomic_read(&sta_priv->pending_frames) > 0)
3650                         ieee80211_sta_block_awake(hw, sta, true);
3651                 break;
3652         case STA_NOTIFY_AWAKE:
3653                 WARN_ON(!sta_priv->client);
3654                 if (!sta_priv->asleep)
3655                         break;
3656                 sta_priv->asleep = false;
3657                 sta_id = iwl_sta_id(sta);
3658                 if (sta_id != IWL_INVALID_STATION)
3659                         iwl_sta_modify_ps_wake(priv, sta_id);
3660                 break;
3661         default:
3662                 break;
3663         }
3664 }
3665
3666 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3667                               struct ieee80211_vif *vif,
3668                               struct ieee80211_sta *sta)
3669 {
3670         struct iwl_priv *priv = hw->priv;
3671         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3672         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3673         int ret;
3674         u8 sta_id;
3675
3676         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3677                         sta->addr);
3678         mutex_lock(&priv->mutex);
3679         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3680                         sta->addr);
3681         sta_priv->common.sta_id = IWL_INVALID_STATION;
3682
3683         atomic_set(&sta_priv->pending_frames, 0);
3684         if (vif->type == NL80211_IFTYPE_AP)
3685                 sta_priv->client = true;
3686
3687         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3688                                      &sta_id);
3689         if (ret) {
3690                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3691                         sta->addr, ret);
3692                 /* Should we return success if return code is EEXIST ? */
3693                 mutex_unlock(&priv->mutex);
3694                 return ret;
3695         }
3696
3697         sta_priv->common.sta_id = sta_id;
3698
3699         /* Initialize rate scaling */
3700         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3701                        sta->addr);
3702         iwl_rs_rate_init(priv, sta, sta_id);
3703         mutex_unlock(&priv->mutex);
3704
3705         return 0;
3706 }
3707
3708 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3709                                    struct ieee80211_channel_switch *ch_switch)
3710 {
3711         struct iwl_priv *priv = hw->priv;
3712         const struct iwl_channel_info *ch_info;
3713         struct ieee80211_conf *conf = &hw->conf;
3714         struct ieee80211_channel *channel = ch_switch->channel;
3715         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3716         u16 ch;
3717         unsigned long flags = 0;
3718
3719         IWL_DEBUG_MAC80211(priv, "enter\n");
3720
3721         if (iwl_is_rfkill(priv))
3722                 goto out_exit;
3723
3724         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3725             test_bit(STATUS_SCANNING, &priv->status))
3726                 goto out_exit;
3727
3728         if (!iwl_is_associated(priv))
3729                 goto out_exit;
3730
3731         /* channel switch in progress */
3732         if (priv->switch_rxon.switch_in_progress == true)
3733                 goto out_exit;
3734
3735         mutex_lock(&priv->mutex);
3736         if (priv->cfg->ops->lib->set_channel_switch) {
3737
3738                 ch = channel->hw_value;
3739                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3740                         ch_info = iwl_get_channel_info(priv,
3741                                                        channel->band,
3742                                                        ch);
3743                         if (!is_channel_valid(ch_info)) {
3744                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3745                                 goto out;
3746                         }
3747                         spin_lock_irqsave(&priv->lock, flags);
3748
3749                         priv->current_ht_config.smps = conf->smps_mode;
3750
3751                         /* Configure HT40 channels */
3752                         ht_conf->is_ht = conf_is_ht(conf);
3753                         if (ht_conf->is_ht) {
3754                                 if (conf_is_ht40_minus(conf)) {
3755                                         ht_conf->extension_chan_offset =
3756                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3757                                         ht_conf->is_40mhz = true;
3758                                 } else if (conf_is_ht40_plus(conf)) {
3759                                         ht_conf->extension_chan_offset =
3760                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3761                                         ht_conf->is_40mhz = true;
3762                                 } else {
3763                                         ht_conf->extension_chan_offset =
3764                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3765                                         ht_conf->is_40mhz = false;
3766                                 }
3767                         } else
3768                                 ht_conf->is_40mhz = false;
3769
3770                         if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3771                                 priv->staging_rxon.flags = 0;
3772
3773                         iwl_set_rxon_channel(priv, channel);
3774                         iwl_set_rxon_ht(priv, ht_conf);
3775                         iwl_set_flags_for_band(priv, channel->band,
3776                                                priv->vif);
3777                         spin_unlock_irqrestore(&priv->lock, flags);
3778
3779                         iwl_set_rate(priv);
3780                         /*
3781                          * at this point, staging_rxon has the
3782                          * configuration for channel switch
3783                          */
3784                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3785                                                                     ch_switch))
3786                                 priv->switch_rxon.switch_in_progress = false;
3787                 }
3788         }
3789 out:
3790         mutex_unlock(&priv->mutex);
3791 out_exit:
3792         if (!priv->switch_rxon.switch_in_progress)
3793                 ieee80211_chswitch_done(priv->vif, false);
3794         IWL_DEBUG_MAC80211(priv, "leave\n");
3795 }
3796
3797 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3798                                     unsigned int changed_flags,
3799                                     unsigned int *total_flags,
3800                                     u64 multicast)
3801 {
3802         struct iwl_priv *priv = hw->priv;
3803         __le32 filter_or = 0, filter_nand = 0;
3804
3805 #define CHK(test, flag) do { \
3806         if (*total_flags & (test))              \
3807                 filter_or |= (flag);            \
3808         else                                    \
3809                 filter_nand |= (flag);          \
3810         } while (0)
3811
3812         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3813                         changed_flags, *total_flags);
3814
3815         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3816         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3817         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3818
3819 #undef CHK
3820
3821         mutex_lock(&priv->mutex);
3822
3823         priv->staging_rxon.filter_flags &= ~filter_nand;
3824         priv->staging_rxon.filter_flags |= filter_or;
3825
3826         iwlcore_commit_rxon(priv);
3827
3828         mutex_unlock(&priv->mutex);
3829
3830         /*
3831          * Receiving all multicast frames is always enabled by the
3832          * default flags setup in iwl_connection_init_rx_config()
3833          * since we currently do not support programming multicast
3834          * filters into the device.
3835          */
3836         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3837                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3838 }
3839
3840 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3841 {
3842         struct iwl_priv *priv = hw->priv;
3843
3844         mutex_lock(&priv->mutex);
3845         IWL_DEBUG_MAC80211(priv, "enter\n");
3846
3847         /* do not support "flush" */
3848         if (!priv->cfg->ops->lib->txfifo_flush)
3849                 goto done;
3850
3851         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3852                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3853                 goto done;
3854         }
3855         if (iwl_is_rfkill(priv)) {
3856                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3857                 goto done;
3858         }
3859
3860         /*
3861          * mac80211 will not push any more frames for transmit
3862          * until the flush is completed
3863          */
3864         if (drop) {
3865                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3866                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3867                         IWL_ERR(priv, "flush request fail\n");
3868                         goto done;
3869                 }
3870         }
3871         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3872         iwlagn_wait_tx_queue_empty(priv);
3873 done:
3874         mutex_unlock(&priv->mutex);
3875         IWL_DEBUG_MAC80211(priv, "leave\n");
3876 }
3877
3878 /*****************************************************************************
3879  *
3880  * driver setup and teardown
3881  *
3882  *****************************************************************************/
3883
3884 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3885 {
3886         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3887
3888         init_waitqueue_head(&priv->wait_command_queue);
3889
3890         INIT_WORK(&priv->restart, iwl_bg_restart);
3891         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3892         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3893         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3894         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3895         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3896         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3897         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3898
3899         iwl_setup_scan_deferred_work(priv);
3900
3901         if (priv->cfg->ops->lib->setup_deferred_work)
3902                 priv->cfg->ops->lib->setup_deferred_work(priv);
3903
3904         init_timer(&priv->statistics_periodic);
3905         priv->statistics_periodic.data = (unsigned long)priv;
3906         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3907
3908         init_timer(&priv->ucode_trace);
3909         priv->ucode_trace.data = (unsigned long)priv;
3910         priv->ucode_trace.function = iwl_bg_ucode_trace;
3911
3912         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3913                 init_timer(&priv->monitor_recover);
3914                 priv->monitor_recover.data = (unsigned long)priv;
3915                 priv->monitor_recover.function =
3916                         priv->cfg->ops->lib->recover_from_tx_stall;
3917         }
3918
3919         if (!priv->cfg->use_isr_legacy)
3920                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3921                         iwl_irq_tasklet, (unsigned long)priv);
3922         else
3923                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3924                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3925 }
3926
3927 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3928 {
3929         if (priv->cfg->ops->lib->cancel_deferred_work)
3930                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3931
3932         cancel_delayed_work_sync(&priv->init_alive_start);
3933         cancel_delayed_work(&priv->scan_check);
3934         cancel_work_sync(&priv->start_internal_scan);
3935         cancel_delayed_work(&priv->alive_start);
3936         cancel_work_sync(&priv->run_time_calib_work);
3937         cancel_work_sync(&priv->beacon_update);
3938         cancel_work_sync(&priv->bt_full_concurrency);
3939         del_timer_sync(&priv->statistics_periodic);
3940         del_timer_sync(&priv->ucode_trace);
3941 }
3942
3943 static void iwl_init_hw_rates(struct iwl_priv *priv,
3944                               struct ieee80211_rate *rates)
3945 {
3946         int i;
3947
3948         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3949                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3950                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3951                 rates[i].hw_value_short = i;
3952                 rates[i].flags = 0;
3953                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3954                         /*
3955                          * If CCK != 1M then set short preamble rate flag.
3956                          */
3957                         rates[i].flags |=
3958                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3959                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3960                 }
3961         }
3962 }
3963
3964 static int iwl_init_drv(struct iwl_priv *priv)
3965 {
3966         int ret;
3967
3968         priv->ibss_beacon = NULL;
3969
3970         spin_lock_init(&priv->sta_lock);
3971         spin_lock_init(&priv->hcmd_lock);
3972
3973         INIT_LIST_HEAD(&priv->free_frames);
3974
3975         mutex_init(&priv->mutex);
3976         mutex_init(&priv->sync_cmd_mutex);
3977
3978         priv->ieee_channels = NULL;
3979         priv->ieee_rates = NULL;
3980         priv->band = IEEE80211_BAND_2GHZ;
3981
3982         priv->iw_mode = NL80211_IFTYPE_STATION;
3983         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3984         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3985         priv->_agn.agg_tids_count = 0;
3986
3987         /* initialize force reset */
3988         priv->force_reset[IWL_RF_RESET].reset_duration =
3989                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3990         priv->force_reset[IWL_FW_RESET].reset_duration =
3991                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3992
3993         /* Choose which receivers/antennas to use */
3994         if (priv->cfg->ops->hcmd->set_rxon_chain)
3995                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3996
3997         iwl_init_scan_params(priv);
3998
3999         /* Set the tx_power_user_lmt to the lowest power level
4000          * this value will get overwritten by channel max power avg
4001          * from eeprom */
4002         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4003
4004         ret = iwl_init_channel_map(priv);
4005         if (ret) {
4006                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4007                 goto err;
4008         }
4009
4010         ret = iwlcore_init_geos(priv);
4011         if (ret) {
4012                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4013                 goto err_free_channel_map;
4014         }
4015         iwl_init_hw_rates(priv, priv->ieee_rates);
4016
4017         return 0;
4018
4019 err_free_channel_map:
4020         iwl_free_channel_map(priv);
4021 err:
4022         return ret;
4023 }
4024
4025 static void iwl_uninit_drv(struct iwl_priv *priv)
4026 {
4027         iwl_calib_free_results(priv);
4028         iwlcore_free_geos(priv);
4029         iwl_free_channel_map(priv);
4030         kfree(priv->scan_cmd);
4031 }
4032
4033 static struct ieee80211_ops iwl_hw_ops = {
4034         .tx = iwl_mac_tx,
4035         .start = iwl_mac_start,
4036         .stop = iwl_mac_stop,
4037         .add_interface = iwl_mac_add_interface,
4038         .remove_interface = iwl_mac_remove_interface,
4039         .config = iwl_mac_config,
4040         .configure_filter = iwlagn_configure_filter,
4041         .set_key = iwl_mac_set_key,
4042         .update_tkip_key = iwl_mac_update_tkip_key,
4043         .conf_tx = iwl_mac_conf_tx,
4044         .reset_tsf = iwl_mac_reset_tsf,
4045         .bss_info_changed = iwl_bss_info_changed,
4046         .ampdu_action = iwl_mac_ampdu_action,
4047         .hw_scan = iwl_mac_hw_scan,
4048         .sta_notify = iwl_mac_sta_notify,
4049         .sta_add = iwlagn_mac_sta_add,
4050         .sta_remove = iwl_mac_sta_remove,
4051         .channel_switch = iwl_mac_channel_switch,
4052         .flush = iwl_mac_flush,
4053         .tx_last_beacon = iwl_mac_tx_last_beacon,
4054 };
4055
4056 static void iwl_hw_detect(struct iwl_priv *priv)
4057 {
4058         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4059         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4060         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4061         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4062 }
4063
4064 static int iwl_set_hw_params(struct iwl_priv *priv)
4065 {
4066         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4067         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4068         if (priv->cfg->mod_params->amsdu_size_8K)
4069                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4070         else
4071                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4072
4073         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4074
4075         if (priv->cfg->mod_params->disable_11n)
4076                 priv->cfg->sku &= ~IWL_SKU_N;
4077
4078         /* Device-specific setup */
4079         return priv->cfg->ops->lib->set_hw_params(priv);
4080 }
4081
4082 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4083 {
4084         int err = 0;
4085         struct iwl_priv *priv;
4086         struct ieee80211_hw *hw;
4087         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4088         unsigned long flags;
4089         u16 pci_cmd, num_mac;
4090
4091         /************************
4092          * 1. Allocating HW data
4093          ************************/
4094
4095         /* Disabling hardware scan means that mac80211 will perform scans
4096          * "the hard way", rather than using device's scan. */
4097         if (cfg->mod_params->disable_hw_scan) {
4098                 if (iwl_debug_level & IWL_DL_INFO)
4099                         dev_printk(KERN_DEBUG, &(pdev->dev),
4100                                    "Disabling hw_scan\n");
4101                 iwl_hw_ops.hw_scan = NULL;
4102         }
4103
4104         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4105         if (!hw) {
4106                 err = -ENOMEM;
4107                 goto out;
4108         }
4109         priv = hw->priv;
4110         /* At this point both hw and priv are allocated. */
4111
4112         SET_IEEE80211_DEV(hw, &pdev->dev);
4113
4114         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4115         priv->cfg = cfg;
4116         priv->pci_dev = pdev;
4117         priv->inta_mask = CSR_INI_SET_MASK;
4118
4119         /* is antenna coupling more than 35dB ? */
4120         priv->bt_ant_couple_ok =
4121                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4122                 true : false;
4123
4124         if (iwl_alloc_traffic_mem(priv))
4125                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4126
4127         /**************************
4128          * 2. Initializing PCI bus
4129          **************************/
4130         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4131                                 PCIE_LINK_STATE_CLKPM);
4132
4133         if (pci_enable_device(pdev)) {
4134                 err = -ENODEV;
4135                 goto out_ieee80211_free_hw;
4136         }
4137
4138         pci_set_master(pdev);
4139
4140         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4141         if (!err)
4142                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4143         if (err) {
4144                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4145                 if (!err)
4146                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4147                 /* both attempts failed: */
4148                 if (err) {
4149                         IWL_WARN(priv, "No suitable DMA available.\n");
4150                         goto out_pci_disable_device;
4151                 }
4152         }
4153
4154         err = pci_request_regions(pdev, DRV_NAME);
4155         if (err)
4156                 goto out_pci_disable_device;
4157
4158         pci_set_drvdata(pdev, priv);
4159
4160
4161         /***********************
4162          * 3. Read REV register
4163          ***********************/
4164         priv->hw_base = pci_iomap(pdev, 0, 0);
4165         if (!priv->hw_base) {
4166                 err = -ENODEV;
4167                 goto out_pci_release_regions;
4168         }
4169
4170         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4171                 (unsigned long long) pci_resource_len(pdev, 0));
4172         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4173
4174         /* these spin locks will be used in apm_ops.init and EEPROM access
4175          * we should init now
4176          */
4177         spin_lock_init(&priv->reg_lock);
4178         spin_lock_init(&priv->lock);
4179
4180         /*
4181          * stop and reset the on-board processor just in case it is in a
4182          * strange state ... like being left stranded by a primary kernel
4183          * and this is now the kdump kernel trying to start up
4184          */
4185         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4186
4187         iwl_hw_detect(priv);
4188         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4189                 priv->cfg->name, priv->hw_rev);
4190
4191         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4192          * PCI Tx retries from interfering with C3 CPU state */
4193         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4194
4195         iwl_prepare_card_hw(priv);
4196         if (!priv->hw_ready) {
4197                 IWL_WARN(priv, "Failed, HW not ready\n");
4198                 goto out_iounmap;
4199         }
4200
4201         /*****************
4202          * 4. Read EEPROM
4203          *****************/
4204         /* Read the EEPROM */
4205         err = iwl_eeprom_init(priv);
4206         if (err) {
4207                 IWL_ERR(priv, "Unable to init EEPROM\n");
4208                 goto out_iounmap;
4209         }
4210         err = iwl_eeprom_check_version(priv);
4211         if (err)
4212                 goto out_free_eeprom;
4213
4214         /* extract MAC Address */
4215         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4216         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4217         priv->hw->wiphy->addresses = priv->addresses;
4218         priv->hw->wiphy->n_addresses = 1;
4219         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4220         if (num_mac > 1) {
4221                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4222                        ETH_ALEN);
4223                 priv->addresses[1].addr[5]++;
4224                 priv->hw->wiphy->n_addresses++;
4225         }
4226
4227         /************************
4228          * 5. Setup HW constants
4229          ************************/
4230         if (iwl_set_hw_params(priv)) {
4231                 IWL_ERR(priv, "failed to set hw parameters\n");
4232                 goto out_free_eeprom;
4233         }
4234
4235         /*******************
4236          * 6. Setup priv
4237          *******************/
4238
4239         err = iwl_init_drv(priv);
4240         if (err)
4241                 goto out_free_eeprom;
4242         /* At this point both hw and priv are initialized. */
4243
4244         /********************
4245          * 7. Setup services
4246          ********************/
4247         spin_lock_irqsave(&priv->lock, flags);
4248         iwl_disable_interrupts(priv);
4249         spin_unlock_irqrestore(&priv->lock, flags);
4250
4251         pci_enable_msi(priv->pci_dev);
4252
4253         iwl_alloc_isr_ict(priv);
4254         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4255                           IRQF_SHARED, DRV_NAME, priv);
4256         if (err) {
4257                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4258                 goto out_disable_msi;
4259         }
4260
4261         iwl_setup_deferred_work(priv);
4262         iwl_setup_rx_handlers(priv);
4263
4264         /*********************************************
4265          * 8. Enable interrupts and read RFKILL state
4266          *********************************************/
4267
4268         /* enable interrupts if needed: hw bug w/a */
4269         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4270         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4271                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4272                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4273         }
4274
4275         iwl_enable_interrupts(priv);
4276
4277         /* If platform's RF_KILL switch is NOT set to KILL */
4278         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4279                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4280         else
4281                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4282
4283         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4284                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4285
4286         iwl_power_initialize(priv);
4287         iwl_tt_initialize(priv);
4288
4289         init_completion(&priv->_agn.firmware_loading_complete);
4290
4291         err = iwl_request_firmware(priv, true);
4292         if (err)
4293                 goto out_destroy_workqueue;
4294
4295         return 0;
4296
4297  out_destroy_workqueue:
4298         destroy_workqueue(priv->workqueue);
4299         priv->workqueue = NULL;
4300         free_irq(priv->pci_dev->irq, priv);
4301         iwl_free_isr_ict(priv);
4302  out_disable_msi:
4303         pci_disable_msi(priv->pci_dev);
4304         iwl_uninit_drv(priv);
4305  out_free_eeprom:
4306         iwl_eeprom_free(priv);
4307  out_iounmap:
4308         pci_iounmap(pdev, priv->hw_base);
4309  out_pci_release_regions:
4310         pci_set_drvdata(pdev, NULL);
4311         pci_release_regions(pdev);
4312  out_pci_disable_device:
4313         pci_disable_device(pdev);
4314  out_ieee80211_free_hw:
4315         iwl_free_traffic_mem(priv);
4316         ieee80211_free_hw(priv->hw);
4317  out:
4318         return err;
4319 }
4320
4321 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4322 {
4323         struct iwl_priv *priv = pci_get_drvdata(pdev);
4324         unsigned long flags;
4325
4326         if (!priv)
4327                 return;
4328
4329         wait_for_completion(&priv->_agn.firmware_loading_complete);
4330
4331         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4332
4333         iwl_dbgfs_unregister(priv);
4334         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4335
4336         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4337          * to be called and iwl_down since we are removing the device
4338          * we need to set STATUS_EXIT_PENDING bit.
4339          */
4340         set_bit(STATUS_EXIT_PENDING, &priv->status);
4341         if (priv->mac80211_registered) {
4342                 ieee80211_unregister_hw(priv->hw);
4343                 priv->mac80211_registered = 0;
4344         } else {
4345                 iwl_down(priv);
4346         }
4347
4348         /*
4349          * Make sure device is reset to low power before unloading driver.
4350          * This may be redundant with iwl_down(), but there are paths to
4351          * run iwl_down() without calling apm_ops.stop(), and there are
4352          * paths to avoid running iwl_down() at all before leaving driver.
4353          * This (inexpensive) call *makes sure* device is reset.
4354          */
4355         priv->cfg->ops->lib->apm_ops.stop(priv);
4356
4357         iwl_tt_exit(priv);
4358
4359         /* make sure we flush any pending irq or
4360          * tasklet for the driver
4361          */
4362         spin_lock_irqsave(&priv->lock, flags);
4363         iwl_disable_interrupts(priv);
4364         spin_unlock_irqrestore(&priv->lock, flags);
4365
4366         iwl_synchronize_irq(priv);
4367
4368         iwl_dealloc_ucode_pci(priv);
4369
4370         if (priv->rxq.bd)
4371                 iwlagn_rx_queue_free(priv, &priv->rxq);
4372         iwlagn_hw_txq_ctx_free(priv);
4373
4374         iwl_eeprom_free(priv);
4375
4376
4377         /*netif_stop_queue(dev); */
4378         flush_workqueue(priv->workqueue);
4379
4380         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4381          * priv->workqueue... so we can't take down the workqueue
4382          * until now... */
4383         destroy_workqueue(priv->workqueue);
4384         priv->workqueue = NULL;
4385         iwl_free_traffic_mem(priv);
4386
4387         free_irq(priv->pci_dev->irq, priv);
4388         pci_disable_msi(priv->pci_dev);
4389         pci_iounmap(pdev, priv->hw_base);
4390         pci_release_regions(pdev);
4391         pci_disable_device(pdev);
4392         pci_set_drvdata(pdev, NULL);
4393
4394         iwl_uninit_drv(priv);
4395
4396         iwl_free_isr_ict(priv);
4397
4398         if (priv->ibss_beacon)
4399                 dev_kfree_skb(priv->ibss_beacon);
4400
4401         ieee80211_free_hw(priv->hw);
4402 }
4403
4404
4405 /*****************************************************************************
4406  *
4407  * driver and module entry point
4408  *
4409  *****************************************************************************/
4410
4411 /* Hardware specific file defines the PCI IDs table for that hardware module */
4412 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4413 #ifdef CONFIG_IWL4965
4414         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4415         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4416 #endif /* CONFIG_IWL4965 */
4417 #ifdef CONFIG_IWL5000
4418 /* 5100 Series WiFi */
4419         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4420         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4421         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4422         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4423         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4424         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4425         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4426         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4427         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4428         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4429         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4430         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4431         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4432         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4433         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4434         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4435         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4436         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4437         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4438         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4439         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4440         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4441         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4442         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4443
4444 /* 5300 Series WiFi */
4445         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4446         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4447         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4448         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4449         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4450         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4451         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4452         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4453         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4454         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4455         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4456         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4457
4458 /* 5350 Series WiFi/WiMax */
4459         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4460         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4461         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4462
4463 /* 5150 Series Wifi/WiMax */
4464         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4465         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4466         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4467         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4468         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4469         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4470
4471         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4472         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4473         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4474         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4475
4476 /* 6x00 Series */
4477         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4478         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4479         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4480         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4481         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4482         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4483         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4484         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4485         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4486         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4487
4488 /* 6x00 Series Gen2a */
4489         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4490         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4491         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4492         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4493         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4494         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4495         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4496         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4497         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4498         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4499         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4500         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4501         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4502         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4503
4504 /* 6x00 Series Gen2b */
4505         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4506         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4507         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4508         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4509         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4510         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4511         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4512         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4513         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4514         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4515         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4516         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4517         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4518         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4519         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4520         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4521         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4522         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4523         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4524         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4525         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4526         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4527         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4528         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4529         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4530         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4531         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4532         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4533
4534 /* 6x50 WiFi/WiMax Series */
4535         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4536         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4537         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4538         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4539         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4540         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4541
4542 /* 6x50 WiFi/WiMax Series Gen2 */
4543         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4544         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4545         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4546         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4547         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4548         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4549
4550 /* 1000 Series WiFi */
4551         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4552         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4553         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4554         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4555         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4556         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4557         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4558         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4559         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4560         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4561         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4562         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4563 #endif /* CONFIG_IWL5000 */
4564
4565         {0}
4566 };
4567 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4568
4569 static struct pci_driver iwl_driver = {
4570         .name = DRV_NAME,
4571         .id_table = iwl_hw_card_ids,
4572         .probe = iwl_pci_probe,
4573         .remove = __devexit_p(iwl_pci_remove),
4574 #ifdef CONFIG_PM
4575         .suspend = iwl_pci_suspend,
4576         .resume = iwl_pci_resume,
4577 #endif
4578 };
4579
4580 static int __init iwl_init(void)
4581 {
4582
4583         int ret;
4584         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4585         pr_info(DRV_COPYRIGHT "\n");
4586
4587         ret = iwlagn_rate_control_register();
4588         if (ret) {
4589                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4590                 return ret;
4591         }
4592
4593         ret = pci_register_driver(&iwl_driver);
4594         if (ret) {
4595                 pr_err("Unable to initialize PCI module\n");
4596                 goto error_register;
4597         }
4598
4599         return ret;
4600
4601 error_register:
4602         iwlagn_rate_control_unregister();
4603         return ret;
4604 }
4605
4606 static void __exit iwl_exit(void)
4607 {
4608         pci_unregister_driver(&iwl_driver);
4609         iwlagn_rate_control_unregister();
4610 }
4611
4612 module_exit(iwl_exit);
4613 module_init(iwl_init);
4614
4615 #ifdef CONFIG_IWLWIFI_DEBUG
4616 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4617 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4618 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4619 MODULE_PARM_DESC(debug, "debug output mask");
4620 #endif
4621
4622 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4623 MODULE_PARM_DESC(swcrypto50,
4624                  "using crypto in software (default 0 [hardware]) (deprecated)");
4625 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4626 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4627 module_param_named(queues_num50,
4628                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4629 MODULE_PARM_DESC(queues_num50,
4630                  "number of hw queues in 50xx series (deprecated)");
4631 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4632 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4633 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4634 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4635 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4636 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4637 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4638                    int, S_IRUGO);
4639 MODULE_PARM_DESC(amsdu_size_8K50,
4640                  "enable 8K amsdu size in 50XX series (deprecated)");
4641 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4642                    int, S_IRUGO);
4643 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4644 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4645 MODULE_PARM_DESC(fw_restart50,
4646                  "restart firmware in case of error (deprecated)");
4647 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4648 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4649 module_param_named(
4650         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4651 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4652
4653 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4654                    S_IRUGO);
4655 MODULE_PARM_DESC(ucode_alternative,
4656                  "specify ucode alternative to use from ucode file");
4657
4658 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4659 MODULE_PARM_DESC(antenna_coupling,
4660                  "specify antenna coupling in dB (defualt: 0 dB)");