iwlagn: init cmd_queue earlier
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-agn-calib.h"
61 #include "iwl-agn.h"
62 #include "iwl-agn-led.h"
63
64
65 /******************************************************************************
66  *
67  * module boiler plate
68  *
69  ******************************************************************************/
70
71 /*
72  * module name, copyright, version, etc.
73  */
74 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
75
76 #ifdef CONFIG_IWLWIFI_DEBUG
77 #define VD "d"
78 #else
79 #define VD
80 #endif
81
82 #define DRV_VERSION     IWLWIFI_VERSION VD
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89
90 static int iwlagn_ant_coupling;
91 static bool iwlagn_bt_ch_announce = 1;
92
93 void iwl_update_chain_flags(struct iwl_priv *priv)
94 {
95         struct iwl_rxon_context *ctx;
96
97         if (priv->cfg->ops->hcmd->set_rxon_chain) {
98                 for_each_context(priv, ctx) {
99                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
100                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
101                                 iwlcore_commit_rxon(priv, ctx);
102                 }
103         }
104 }
105
106 static void iwl_clear_free_frames(struct iwl_priv *priv)
107 {
108         struct list_head *element;
109
110         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
111                        priv->frames_count);
112
113         while (!list_empty(&priv->free_frames)) {
114                 element = priv->free_frames.next;
115                 list_del(element);
116                 kfree(list_entry(element, struct iwl_frame, list));
117                 priv->frames_count--;
118         }
119
120         if (priv->frames_count) {
121                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
122                             priv->frames_count);
123                 priv->frames_count = 0;
124         }
125 }
126
127 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
128 {
129         struct iwl_frame *frame;
130         struct list_head *element;
131         if (list_empty(&priv->free_frames)) {
132                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
133                 if (!frame) {
134                         IWL_ERR(priv, "Could not allocate frame!\n");
135                         return NULL;
136                 }
137
138                 priv->frames_count++;
139                 return frame;
140         }
141
142         element = priv->free_frames.next;
143         list_del(element);
144         return list_entry(element, struct iwl_frame, list);
145 }
146
147 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
148 {
149         memset(frame, 0, sizeof(*frame));
150         list_add(&frame->list, &priv->free_frames);
151 }
152
153 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
154                                  struct ieee80211_hdr *hdr,
155                                  int left)
156 {
157         lockdep_assert_held(&priv->mutex);
158
159         if (!priv->beacon_skb)
160                 return 0;
161
162         if (priv->beacon_skb->len > left)
163                 return 0;
164
165         memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
166
167         return priv->beacon_skb->len;
168 }
169
170 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
171 static void iwl_set_beacon_tim(struct iwl_priv *priv,
172                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
173                                u8 *beacon, u32 frame_size)
174 {
175         u16 tim_idx;
176         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
177
178         /*
179          * The index is relative to frame start but we start looking at the
180          * variable-length part of the beacon.
181          */
182         tim_idx = mgmt->u.beacon.variable - beacon;
183
184         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
185         while ((tim_idx < (frame_size - 2)) &&
186                         (beacon[tim_idx] != WLAN_EID_TIM))
187                 tim_idx += beacon[tim_idx+1] + 2;
188
189         /* If TIM field was found, set variables */
190         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
191                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
192                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
193         } else
194                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
195 }
196
197 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
198                                        struct iwl_frame *frame)
199 {
200         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
201         u32 frame_size;
202         u32 rate_flags;
203         u32 rate;
204         /*
205          * We have to set up the TX command, the TX Beacon command, and the
206          * beacon contents.
207          */
208
209         lockdep_assert_held(&priv->mutex);
210
211         if (!priv->beacon_ctx) {
212                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
213                 return 0;
214         }
215
216         /* Initialize memory */
217         tx_beacon_cmd = &frame->u.beacon;
218         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
219
220         /* Set up TX beacon contents */
221         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
222                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
223         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
224                 return 0;
225         if (!frame_size)
226                 return 0;
227
228         /* Set up TX command fields */
229         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
230         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
231         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
232         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
233                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
234
235         /* Set up TX beacon command fields */
236         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
237                            frame_size);
238
239         /* Set up packet rate and flags */
240         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
241         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
242                                               priv->hw_params.valid_tx_ant);
243         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
244         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
245                 rate_flags |= RATE_MCS_CCK_MSK;
246         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
247                         rate_flags);
248
249         return sizeof(*tx_beacon_cmd) + frame_size;
250 }
251
252 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
253 {
254         struct iwl_frame *frame;
255         unsigned int frame_size;
256         int rc;
257
258         frame = iwl_get_free_frame(priv);
259         if (!frame) {
260                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
261                           "command.\n");
262                 return -ENOMEM;
263         }
264
265         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
266         if (!frame_size) {
267                 IWL_ERR(priv, "Error configuring the beacon command\n");
268                 iwl_free_frame(priv, frame);
269                 return -EINVAL;
270         }
271
272         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
273                               &frame->u.cmd[0]);
274
275         iwl_free_frame(priv, frame);
276
277         return rc;
278 }
279
280 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
281 {
282         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
283
284         dma_addr_t addr = get_unaligned_le32(&tb->lo);
285         if (sizeof(dma_addr_t) > sizeof(u32))
286                 addr |=
287                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
288
289         return addr;
290 }
291
292 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
293 {
294         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
295
296         return le16_to_cpu(tb->hi_n_len) >> 4;
297 }
298
299 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
300                                   dma_addr_t addr, u16 len)
301 {
302         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
303         u16 hi_n_len = len << 4;
304
305         put_unaligned_le32(addr, &tb->lo);
306         if (sizeof(dma_addr_t) > sizeof(u32))
307                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
308
309         tb->hi_n_len = cpu_to_le16(hi_n_len);
310
311         tfd->num_tbs = idx + 1;
312 }
313
314 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
315 {
316         return tfd->num_tbs & 0x1f;
317 }
318
319 /**
320  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
321  * @priv - driver private data
322  * @txq - tx queue
323  *
324  * Does NOT advance any TFD circular buffer read/write indexes
325  * Does NOT free the TFD itself (which is within circular buffer)
326  */
327 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
328 {
329         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
330         struct iwl_tfd *tfd;
331         struct pci_dev *dev = priv->pci_dev;
332         int index = txq->q.read_ptr;
333         int i;
334         int num_tbs;
335
336         tfd = &tfd_tmp[index];
337
338         /* Sanity check on number of chunks */
339         num_tbs = iwl_tfd_get_num_tbs(tfd);
340
341         if (num_tbs >= IWL_NUM_OF_TBS) {
342                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
343                 /* @todo issue fatal error, it is quite serious situation */
344                 return;
345         }
346
347         /* Unmap tx_cmd */
348         if (num_tbs)
349                 pci_unmap_single(dev,
350                                 dma_unmap_addr(&txq->meta[index], mapping),
351                                 dma_unmap_len(&txq->meta[index], len),
352                                 PCI_DMA_BIDIRECTIONAL);
353
354         /* Unmap chunks, if any. */
355         for (i = 1; i < num_tbs; i++)
356                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
357                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
358
359         /* free SKB */
360         if (txq->txb) {
361                 struct sk_buff *skb;
362
363                 skb = txq->txb[txq->q.read_ptr].skb;
364
365                 /* can be called from irqs-disabled context */
366                 if (skb) {
367                         dev_kfree_skb_any(skb);
368                         txq->txb[txq->q.read_ptr].skb = NULL;
369                 }
370         }
371 }
372
373 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
374                                  struct iwl_tx_queue *txq,
375                                  dma_addr_t addr, u16 len,
376                                  u8 reset, u8 pad)
377 {
378         struct iwl_queue *q;
379         struct iwl_tfd *tfd, *tfd_tmp;
380         u32 num_tbs;
381
382         q = &txq->q;
383         tfd_tmp = (struct iwl_tfd *)txq->tfds;
384         tfd = &tfd_tmp[q->write_ptr];
385
386         if (reset)
387                 memset(tfd, 0, sizeof(*tfd));
388
389         num_tbs = iwl_tfd_get_num_tbs(tfd);
390
391         /* Each TFD can point to a maximum 20 Tx buffers */
392         if (num_tbs >= IWL_NUM_OF_TBS) {
393                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
394                           IWL_NUM_OF_TBS);
395                 return -EINVAL;
396         }
397
398         BUG_ON(addr & ~DMA_BIT_MASK(36));
399         if (unlikely(addr & ~IWL_TX_DMA_MASK))
400                 IWL_ERR(priv, "Unaligned address = %llx\n",
401                           (unsigned long long)addr);
402
403         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
404
405         return 0;
406 }
407
408 /*
409  * Tell nic where to find circular buffer of Tx Frame Descriptors for
410  * given Tx queue, and enable the DMA channel used for that queue.
411  *
412  * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
413  * channels supported in hardware.
414  */
415 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
416                          struct iwl_tx_queue *txq)
417 {
418         int txq_id = txq->q.id;
419
420         /* Circular buffer (TFD queue in DRAM) physical base address */
421         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
422                              txq->q.dma_addr >> 8);
423
424         return 0;
425 }
426
427 static void iwl_bg_beacon_update(struct work_struct *work)
428 {
429         struct iwl_priv *priv =
430                 container_of(work, struct iwl_priv, beacon_update);
431         struct sk_buff *beacon;
432
433         mutex_lock(&priv->mutex);
434         if (!priv->beacon_ctx) {
435                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
436                 goto out;
437         }
438
439         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
440                 /*
441                  * The ucode will send beacon notifications even in
442                  * IBSS mode, but we don't want to process them. But
443                  * we need to defer the type check to here due to
444                  * requiring locking around the beacon_ctx access.
445                  */
446                 goto out;
447         }
448
449         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
450         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
451         if (!beacon) {
452                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
453                 goto out;
454         }
455
456         /* new beacon skb is allocated every time; dispose previous.*/
457         dev_kfree_skb(priv->beacon_skb);
458
459         priv->beacon_skb = beacon;
460
461         iwlagn_send_beacon_cmd(priv);
462  out:
463         mutex_unlock(&priv->mutex);
464 }
465
466 static void iwl_bg_bt_runtime_config(struct work_struct *work)
467 {
468         struct iwl_priv *priv =
469                 container_of(work, struct iwl_priv, bt_runtime_config);
470
471         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
472                 return;
473
474         /* dont send host command if rf-kill is on */
475         if (!iwl_is_ready_rf(priv))
476                 return;
477         priv->cfg->ops->hcmd->send_bt_config(priv);
478 }
479
480 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
481 {
482         struct iwl_priv *priv =
483                 container_of(work, struct iwl_priv, bt_full_concurrency);
484         struct iwl_rxon_context *ctx;
485
486         mutex_lock(&priv->mutex);
487
488         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
489                 goto out;
490
491         /* dont send host command if rf-kill is on */
492         if (!iwl_is_ready_rf(priv))
493                 goto out;
494
495         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
496                        priv->bt_full_concurrent ?
497                        "full concurrency" : "3-wire");
498
499         /*
500          * LQ & RXON updated cmds must be sent before BT Config cmd
501          * to avoid 3-wire collisions
502          */
503         for_each_context(priv, ctx) {
504                 if (priv->cfg->ops->hcmd->set_rxon_chain)
505                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
506                 iwlcore_commit_rxon(priv, ctx);
507         }
508
509         priv->cfg->ops->hcmd->send_bt_config(priv);
510 out:
511         mutex_unlock(&priv->mutex);
512 }
513
514 /**
515  * iwl_bg_statistics_periodic - Timer callback to queue statistics
516  *
517  * This callback is provided in order to send a statistics request.
518  *
519  * This timer function is continually reset to execute within
520  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
521  * was received.  We need to ensure we receive the statistics in order
522  * to update the temperature used for calibrating the TXPOWER.
523  */
524 static void iwl_bg_statistics_periodic(unsigned long data)
525 {
526         struct iwl_priv *priv = (struct iwl_priv *)data;
527
528         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
529                 return;
530
531         /* dont send host command if rf-kill is on */
532         if (!iwl_is_ready_rf(priv))
533                 return;
534
535         iwl_send_statistics_request(priv, CMD_ASYNC, false);
536 }
537
538
539 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
540                                         u32 start_idx, u32 num_events,
541                                         u32 mode)
542 {
543         u32 i;
544         u32 ptr;        /* SRAM byte address of log data */
545         u32 ev, time, data; /* event log data */
546         unsigned long reg_flags;
547
548         if (mode == 0)
549                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
550         else
551                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
552
553         /* Make sure device is powered up for SRAM reads */
554         spin_lock_irqsave(&priv->reg_lock, reg_flags);
555         if (iwl_grab_nic_access(priv)) {
556                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
557                 return;
558         }
559
560         /* Set starting address; reads will auto-increment */
561         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
562         rmb();
563
564         /*
565          * "time" is actually "data" for mode 0 (no timestamp).
566          * place event id # at far right for easier visual parsing.
567          */
568         for (i = 0; i < num_events; i++) {
569                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
570                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
571                 if (mode == 0) {
572                         trace_iwlwifi_dev_ucode_cont_event(priv,
573                                                         0, time, ev);
574                 } else {
575                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
576                         trace_iwlwifi_dev_ucode_cont_event(priv,
577                                                 time, data, ev);
578                 }
579         }
580         /* Allow device to power down */
581         iwl_release_nic_access(priv);
582         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
583 }
584
585 static void iwl_continuous_event_trace(struct iwl_priv *priv)
586 {
587         u32 capacity;   /* event log capacity in # entries */
588         u32 base;       /* SRAM byte address of event log header */
589         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
590         u32 num_wraps;  /* # times uCode wrapped to top of log */
591         u32 next_entry; /* index of next entry to be written by uCode */
592
593         base = priv->device_pointers.error_event_table;
594         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
595                 capacity = iwl_read_targ_mem(priv, base);
596                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
597                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
598                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
599         } else
600                 return;
601
602         if (num_wraps == priv->event_log.num_wraps) {
603                 iwl_print_cont_event_trace(priv,
604                                        base, priv->event_log.next_entry,
605                                        next_entry - priv->event_log.next_entry,
606                                        mode);
607                 priv->event_log.non_wraps_count++;
608         } else {
609                 if ((num_wraps - priv->event_log.num_wraps) > 1)
610                         priv->event_log.wraps_more_count++;
611                 else
612                         priv->event_log.wraps_once_count++;
613                 trace_iwlwifi_dev_ucode_wrap_event(priv,
614                                 num_wraps - priv->event_log.num_wraps,
615                                 next_entry, priv->event_log.next_entry);
616                 if (next_entry < priv->event_log.next_entry) {
617                         iwl_print_cont_event_trace(priv, base,
618                                priv->event_log.next_entry,
619                                capacity - priv->event_log.next_entry,
620                                mode);
621
622                         iwl_print_cont_event_trace(priv, base, 0,
623                                 next_entry, mode);
624                 } else {
625                         iwl_print_cont_event_trace(priv, base,
626                                next_entry, capacity - next_entry,
627                                mode);
628
629                         iwl_print_cont_event_trace(priv, base, 0,
630                                 next_entry, mode);
631                 }
632         }
633         priv->event_log.num_wraps = num_wraps;
634         priv->event_log.next_entry = next_entry;
635 }
636
637 /**
638  * iwl_bg_ucode_trace - Timer callback to log ucode event
639  *
640  * The timer is continually set to execute every
641  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
642  * this function is to perform continuous uCode event logging operation
643  * if enabled
644  */
645 static void iwl_bg_ucode_trace(unsigned long data)
646 {
647         struct iwl_priv *priv = (struct iwl_priv *)data;
648
649         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
650                 return;
651
652         if (priv->event_log.ucode_trace) {
653                 iwl_continuous_event_trace(priv);
654                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
655                 mod_timer(&priv->ucode_trace,
656                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
657         }
658 }
659
660 static void iwl_bg_tx_flush(struct work_struct *work)
661 {
662         struct iwl_priv *priv =
663                 container_of(work, struct iwl_priv, tx_flush);
664
665         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
666                 return;
667
668         /* do nothing if rf-kill is on */
669         if (!iwl_is_ready_rf(priv))
670                 return;
671
672         if (priv->cfg->ops->lib->txfifo_flush) {
673                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
674                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
675         }
676 }
677
678 /**
679  * iwl_rx_handle - Main entry function for receiving responses from uCode
680  *
681  * Uses the priv->rx_handlers callback function array to invoke
682  * the appropriate handlers, including command responses,
683  * frame-received notifications, and other notifications.
684  */
685 static void iwl_rx_handle(struct iwl_priv *priv)
686 {
687         struct iwl_rx_mem_buffer *rxb;
688         struct iwl_rx_packet *pkt;
689         struct iwl_rx_queue *rxq = &priv->rxq;
690         u32 r, i;
691         int reclaim;
692         unsigned long flags;
693         u8 fill_rx = 0;
694         u32 count = 8;
695         int total_empty;
696
697         /* uCode's read index (stored in shared DRAM) indicates the last Rx
698          * buffer that the driver may process (last buffer filled by ucode). */
699         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
700         i = rxq->read;
701
702         /* Rx interrupt, but nothing sent from uCode */
703         if (i == r)
704                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
705
706         /* calculate total frames need to be restock after handling RX */
707         total_empty = r - rxq->write_actual;
708         if (total_empty < 0)
709                 total_empty += RX_QUEUE_SIZE;
710
711         if (total_empty > (RX_QUEUE_SIZE / 2))
712                 fill_rx = 1;
713
714         while (i != r) {
715                 int len;
716
717                 rxb = rxq->queue[i];
718
719                 /* If an RXB doesn't have a Rx queue slot associated with it,
720                  * then a bug has been introduced in the queue refilling
721                  * routines -- catch it here */
722                 BUG_ON(rxb == NULL);
723
724                 rxq->queue[i] = NULL;
725
726                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
727                                PAGE_SIZE << priv->hw_params.rx_page_order,
728                                PCI_DMA_FROMDEVICE);
729                 pkt = rxb_addr(rxb);
730
731                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
732                 len += sizeof(u32); /* account for status word */
733                 trace_iwlwifi_dev_rx(priv, pkt, len);
734
735                 /* Reclaim a command buffer only if this packet is a response
736                  *   to a (driver-originated) command.
737                  * If the packet (e.g. Rx frame) originated from uCode,
738                  *   there is no command buffer to reclaim.
739                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
740                  *   but apparently a few don't get set; catch them here. */
741                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
742                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
743                         (pkt->hdr.cmd != REPLY_RX) &&
744                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
745                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
746                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
747                         (pkt->hdr.cmd != REPLY_TX);
748
749                 /*
750                  * Do the notification wait before RX handlers so
751                  * even if the RX handler consumes the RXB we have
752                  * access to it in the notification wait entry.
753                  */
754                 if (!list_empty(&priv->_agn.notif_waits)) {
755                         struct iwl_notification_wait *w;
756
757                         spin_lock(&priv->_agn.notif_wait_lock);
758                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
759                                 if (w->cmd == pkt->hdr.cmd) {
760                                         w->triggered = true;
761                                         if (w->fn)
762                                                 w->fn(priv, pkt);
763                                 }
764                         }
765                         spin_unlock(&priv->_agn.notif_wait_lock);
766
767                         wake_up_all(&priv->_agn.notif_waitq);
768                 }
769
770                 /* Based on type of command response or notification,
771                  *   handle those that need handling via function in
772                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
773                 if (priv->rx_handlers[pkt->hdr.cmd]) {
774                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
775                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
776                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
777                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
778                 } else {
779                         /* No handling needed */
780                         IWL_DEBUG_RX(priv,
781                                 "r %d i %d No handler needed for %s, 0x%02x\n",
782                                 r, i, get_cmd_string(pkt->hdr.cmd),
783                                 pkt->hdr.cmd);
784                 }
785
786                 /*
787                  * XXX: After here, we should always check rxb->page
788                  * against NULL before touching it or its virtual
789                  * memory (pkt). Because some rx_handler might have
790                  * already taken or freed the pages.
791                  */
792
793                 if (reclaim) {
794                         /* Invoke any callbacks, transfer the buffer to caller,
795                          * and fire off the (possibly) blocking iwl_send_cmd()
796                          * as we reclaim the driver command queue */
797                         if (rxb->page)
798                                 iwl_tx_cmd_complete(priv, rxb);
799                         else
800                                 IWL_WARN(priv, "Claim null rxb?\n");
801                 }
802
803                 /* Reuse the page if possible. For notification packets and
804                  * SKBs that fail to Rx correctly, add them back into the
805                  * rx_free list for reuse later. */
806                 spin_lock_irqsave(&rxq->lock, flags);
807                 if (rxb->page != NULL) {
808                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
809                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
810                                 PCI_DMA_FROMDEVICE);
811                         list_add_tail(&rxb->list, &rxq->rx_free);
812                         rxq->free_count++;
813                 } else
814                         list_add_tail(&rxb->list, &rxq->rx_used);
815
816                 spin_unlock_irqrestore(&rxq->lock, flags);
817
818                 i = (i + 1) & RX_QUEUE_MASK;
819                 /* If there are a lot of unused frames,
820                  * restock the Rx queue so ucode wont assert. */
821                 if (fill_rx) {
822                         count++;
823                         if (count >= 8) {
824                                 rxq->read = i;
825                                 iwlagn_rx_replenish_now(priv);
826                                 count = 0;
827                         }
828                 }
829         }
830
831         /* Backtrack one entry */
832         rxq->read = i;
833         if (fill_rx)
834                 iwlagn_rx_replenish_now(priv);
835         else
836                 iwlagn_rx_queue_restock(priv);
837 }
838
839 /* call this function to flush any scheduled tasklet */
840 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
841 {
842         /* wait to make sure we flush pending tasklet*/
843         synchronize_irq(priv->pci_dev->irq);
844         tasklet_kill(&priv->irq_tasklet);
845 }
846
847 /* tasklet for iwlagn interrupt */
848 static void iwl_irq_tasklet(struct iwl_priv *priv)
849 {
850         u32 inta = 0;
851         u32 handled = 0;
852         unsigned long flags;
853         u32 i;
854 #ifdef CONFIG_IWLWIFI_DEBUG
855         u32 inta_mask;
856 #endif
857
858         spin_lock_irqsave(&priv->lock, flags);
859
860         /* Ack/clear/reset pending uCode interrupts.
861          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
862          */
863         /* There is a hardware bug in the interrupt mask function that some
864          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
865          * they are disabled in the CSR_INT_MASK register. Furthermore the
866          * ICT interrupt handling mechanism has another bug that might cause
867          * these unmasked interrupts fail to be detected. We workaround the
868          * hardware bugs here by ACKing all the possible interrupts so that
869          * interrupt coalescing can still be achieved.
870          */
871         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
872
873         inta = priv->_agn.inta;
874
875 #ifdef CONFIG_IWLWIFI_DEBUG
876         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
877                 /* just for debug */
878                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
879                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
880                                 inta, inta_mask);
881         }
882 #endif
883
884         spin_unlock_irqrestore(&priv->lock, flags);
885
886         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
887         priv->_agn.inta = 0;
888
889         /* Now service all interrupt bits discovered above. */
890         if (inta & CSR_INT_BIT_HW_ERR) {
891                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
892
893                 /* Tell the device to stop sending interrupts */
894                 iwl_disable_interrupts(priv);
895
896                 priv->isr_stats.hw++;
897                 iwl_irq_handle_error(priv);
898
899                 handled |= CSR_INT_BIT_HW_ERR;
900
901                 return;
902         }
903
904 #ifdef CONFIG_IWLWIFI_DEBUG
905         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
906                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
907                 if (inta & CSR_INT_BIT_SCD) {
908                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
909                                       "the frame/frames.\n");
910                         priv->isr_stats.sch++;
911                 }
912
913                 /* Alive notification via Rx interrupt will do the real work */
914                 if (inta & CSR_INT_BIT_ALIVE) {
915                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
916                         priv->isr_stats.alive++;
917                 }
918         }
919 #endif
920         /* Safely ignore these bits for debug checks below */
921         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
922
923         /* HW RF KILL switch toggled */
924         if (inta & CSR_INT_BIT_RF_KILL) {
925                 int hw_rf_kill = 0;
926                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
927                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
928                         hw_rf_kill = 1;
929
930                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
931                                 hw_rf_kill ? "disable radio" : "enable radio");
932
933                 priv->isr_stats.rfkill++;
934
935                 /* driver only loads ucode once setting the interface up.
936                  * the driver allows loading the ucode even if the radio
937                  * is killed. Hence update the killswitch state here. The
938                  * rfkill handler will care about restarting if needed.
939                  */
940                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
941                         if (hw_rf_kill)
942                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
943                         else
944                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
945                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
946                 }
947
948                 handled |= CSR_INT_BIT_RF_KILL;
949         }
950
951         /* Chip got too hot and stopped itself */
952         if (inta & CSR_INT_BIT_CT_KILL) {
953                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
954                 priv->isr_stats.ctkill++;
955                 handled |= CSR_INT_BIT_CT_KILL;
956         }
957
958         /* Error detected by uCode */
959         if (inta & CSR_INT_BIT_SW_ERR) {
960                 IWL_ERR(priv, "Microcode SW error detected. "
961                         " Restarting 0x%X.\n", inta);
962                 priv->isr_stats.sw++;
963                 iwl_irq_handle_error(priv);
964                 handled |= CSR_INT_BIT_SW_ERR;
965         }
966
967         /* uCode wakes up after power-down sleep */
968         if (inta & CSR_INT_BIT_WAKEUP) {
969                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
970                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
971                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
972                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
973
974                 priv->isr_stats.wakeup++;
975
976                 handled |= CSR_INT_BIT_WAKEUP;
977         }
978
979         /* All uCode command responses, including Tx command responses,
980          * Rx "responses" (frame-received notification), and other
981          * notifications from uCode come through here*/
982         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
983                         CSR_INT_BIT_RX_PERIODIC)) {
984                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
985                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
986                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
987                         iwl_write32(priv, CSR_FH_INT_STATUS,
988                                         CSR_FH_INT_RX_MASK);
989                 }
990                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
991                         handled |= CSR_INT_BIT_RX_PERIODIC;
992                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
993                 }
994                 /* Sending RX interrupt require many steps to be done in the
995                  * the device:
996                  * 1- write interrupt to current index in ICT table.
997                  * 2- dma RX frame.
998                  * 3- update RX shared data to indicate last write index.
999                  * 4- send interrupt.
1000                  * This could lead to RX race, driver could receive RX interrupt
1001                  * but the shared data changes does not reflect this;
1002                  * periodic interrupt will detect any dangling Rx activity.
1003                  */
1004
1005                 /* Disable periodic interrupt; we use it as just a one-shot. */
1006                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1007                             CSR_INT_PERIODIC_DIS);
1008                 iwl_rx_handle(priv);
1009
1010                 /*
1011                  * Enable periodic interrupt in 8 msec only if we received
1012                  * real RX interrupt (instead of just periodic int), to catch
1013                  * any dangling Rx interrupt.  If it was just the periodic
1014                  * interrupt, there was no dangling Rx activity, and no need
1015                  * to extend the periodic interrupt; one-shot is enough.
1016                  */
1017                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1018                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1019                                     CSR_INT_PERIODIC_ENA);
1020
1021                 priv->isr_stats.rx++;
1022         }
1023
1024         /* This "Tx" DMA channel is used only for loading uCode */
1025         if (inta & CSR_INT_BIT_FH_TX) {
1026                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1027                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1028                 priv->isr_stats.tx++;
1029                 handled |= CSR_INT_BIT_FH_TX;
1030                 /* Wake up uCode load routine, now that load is complete */
1031                 priv->ucode_write_complete = 1;
1032                 wake_up_interruptible(&priv->wait_command_queue);
1033         }
1034
1035         if (inta & ~handled) {
1036                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1037                 priv->isr_stats.unhandled++;
1038         }
1039
1040         if (inta & ~(priv->inta_mask)) {
1041                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1042                          inta & ~priv->inta_mask);
1043         }
1044
1045         /* Re-enable all interrupts */
1046         /* only Re-enable if disabled by irq */
1047         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1048                 iwl_enable_interrupts(priv);
1049         /* Re-enable RF_KILL if it occurred */
1050         else if (handled & CSR_INT_BIT_RF_KILL)
1051                 iwl_enable_rfkill_int(priv);
1052 }
1053
1054 /*****************************************************************************
1055  *
1056  * sysfs attributes
1057  *
1058  *****************************************************************************/
1059
1060 #ifdef CONFIG_IWLWIFI_DEBUG
1061
1062 /*
1063  * The following adds a new attribute to the sysfs representation
1064  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1065  * used for controlling the debug level.
1066  *
1067  * See the level definitions in iwl for details.
1068  *
1069  * The debug_level being managed using sysfs below is a per device debug
1070  * level that is used instead of the global debug level if it (the per
1071  * device debug level) is set.
1072  */
1073 static ssize_t show_debug_level(struct device *d,
1074                                 struct device_attribute *attr, char *buf)
1075 {
1076         struct iwl_priv *priv = dev_get_drvdata(d);
1077         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1078 }
1079 static ssize_t store_debug_level(struct device *d,
1080                                 struct device_attribute *attr,
1081                                  const char *buf, size_t count)
1082 {
1083         struct iwl_priv *priv = dev_get_drvdata(d);
1084         unsigned long val;
1085         int ret;
1086
1087         ret = strict_strtoul(buf, 0, &val);
1088         if (ret)
1089                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1090         else {
1091                 priv->debug_level = val;
1092                 if (iwl_alloc_traffic_mem(priv))
1093                         IWL_ERR(priv,
1094                                 "Not enough memory to generate traffic log\n");
1095         }
1096         return strnlen(buf, count);
1097 }
1098
1099 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1100                         show_debug_level, store_debug_level);
1101
1102
1103 #endif /* CONFIG_IWLWIFI_DEBUG */
1104
1105
1106 static ssize_t show_temperature(struct device *d,
1107                                 struct device_attribute *attr, char *buf)
1108 {
1109         struct iwl_priv *priv = dev_get_drvdata(d);
1110
1111         if (!iwl_is_alive(priv))
1112                 return -EAGAIN;
1113
1114         return sprintf(buf, "%d\n", priv->temperature);
1115 }
1116
1117 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1118
1119 static ssize_t show_tx_power(struct device *d,
1120                              struct device_attribute *attr, char *buf)
1121 {
1122         struct iwl_priv *priv = dev_get_drvdata(d);
1123
1124         if (!iwl_is_ready_rf(priv))
1125                 return sprintf(buf, "off\n");
1126         else
1127                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1128 }
1129
1130 static ssize_t store_tx_power(struct device *d,
1131                               struct device_attribute *attr,
1132                               const char *buf, size_t count)
1133 {
1134         struct iwl_priv *priv = dev_get_drvdata(d);
1135         unsigned long val;
1136         int ret;
1137
1138         ret = strict_strtoul(buf, 10, &val);
1139         if (ret)
1140                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1141         else {
1142                 ret = iwl_set_tx_power(priv, val, false);
1143                 if (ret)
1144                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1145                                 ret);
1146                 else
1147                         ret = count;
1148         }
1149         return ret;
1150 }
1151
1152 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1153
1154 static struct attribute *iwl_sysfs_entries[] = {
1155         &dev_attr_temperature.attr,
1156         &dev_attr_tx_power.attr,
1157 #ifdef CONFIG_IWLWIFI_DEBUG
1158         &dev_attr_debug_level.attr,
1159 #endif
1160         NULL
1161 };
1162
1163 static struct attribute_group iwl_attribute_group = {
1164         .name = NULL,           /* put in device directory */
1165         .attrs = iwl_sysfs_entries,
1166 };
1167
1168 /******************************************************************************
1169  *
1170  * uCode download functions
1171  *
1172  ******************************************************************************/
1173
1174 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1175 {
1176         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1177         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1178         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1179         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1180 }
1181
1182 static void iwl_nic_start(struct iwl_priv *priv)
1183 {
1184         /* Remove all resets to allow NIC to operate */
1185         iwl_write32(priv, CSR_RESET, 0);
1186 }
1187
1188 struct iwlagn_ucode_capabilities {
1189         u32 max_probe_length;
1190         u32 standard_phy_calibration_size;
1191         u32 flags;
1192 };
1193
1194 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1195 static int iwl_mac_setup_register(struct iwl_priv *priv,
1196                                   struct iwlagn_ucode_capabilities *capa);
1197
1198 #define UCODE_EXPERIMENTAL_INDEX        100
1199 #define UCODE_EXPERIMENTAL_TAG          "exp"
1200
1201 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1202 {
1203         const char *name_pre = priv->cfg->fw_name_pre;
1204         char tag[8];
1205
1206         if (first) {
1207 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1208                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1209                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1210         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1211 #endif
1212                 priv->fw_index = priv->cfg->ucode_api_max;
1213                 sprintf(tag, "%d", priv->fw_index);
1214         } else {
1215                 priv->fw_index--;
1216                 sprintf(tag, "%d", priv->fw_index);
1217         }
1218
1219         if (priv->fw_index < priv->cfg->ucode_api_min) {
1220                 IWL_ERR(priv, "no suitable firmware found!\n");
1221                 return -ENOENT;
1222         }
1223
1224         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1225
1226         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1227                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1228                                 ? "EXPERIMENTAL " : "",
1229                        priv->firmware_name);
1230
1231         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1232                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1233                                        iwl_ucode_callback);
1234 }
1235
1236 struct iwlagn_firmware_pieces {
1237         const void *inst, *data, *init, *init_data;
1238         size_t inst_size, data_size, init_size, init_data_size;
1239
1240         u32 build;
1241
1242         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1243         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1244 };
1245
1246 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1247                                        const struct firmware *ucode_raw,
1248                                        struct iwlagn_firmware_pieces *pieces)
1249 {
1250         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1251         u32 api_ver, hdr_size;
1252         const u8 *src;
1253
1254         priv->ucode_ver = le32_to_cpu(ucode->ver);
1255         api_ver = IWL_UCODE_API(priv->ucode_ver);
1256
1257         switch (api_ver) {
1258         default:
1259                 hdr_size = 28;
1260                 if (ucode_raw->size < hdr_size) {
1261                         IWL_ERR(priv, "File size too small!\n");
1262                         return -EINVAL;
1263                 }
1264                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1265                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1266                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1267                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1268                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1269                 src = ucode->u.v2.data;
1270                 break;
1271         case 0:
1272         case 1:
1273         case 2:
1274                 hdr_size = 24;
1275                 if (ucode_raw->size < hdr_size) {
1276                         IWL_ERR(priv, "File size too small!\n");
1277                         return -EINVAL;
1278                 }
1279                 pieces->build = 0;
1280                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1281                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1282                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1283                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1284                 src = ucode->u.v1.data;
1285                 break;
1286         }
1287
1288         /* Verify size of file vs. image size info in file's header */
1289         if (ucode_raw->size != hdr_size + pieces->inst_size +
1290                                 pieces->data_size + pieces->init_size +
1291                                 pieces->init_data_size) {
1292
1293                 IWL_ERR(priv,
1294                         "uCode file size %d does not match expected size\n",
1295                         (int)ucode_raw->size);
1296                 return -EINVAL;
1297         }
1298
1299         pieces->inst = src;
1300         src += pieces->inst_size;
1301         pieces->data = src;
1302         src += pieces->data_size;
1303         pieces->init = src;
1304         src += pieces->init_size;
1305         pieces->init_data = src;
1306         src += pieces->init_data_size;
1307
1308         return 0;
1309 }
1310
1311 static int iwlagn_wanted_ucode_alternative = 1;
1312
1313 static int iwlagn_load_firmware(struct iwl_priv *priv,
1314                                 const struct firmware *ucode_raw,
1315                                 struct iwlagn_firmware_pieces *pieces,
1316                                 struct iwlagn_ucode_capabilities *capa)
1317 {
1318         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1319         struct iwl_ucode_tlv *tlv;
1320         size_t len = ucode_raw->size;
1321         const u8 *data;
1322         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1323         u64 alternatives;
1324         u32 tlv_len;
1325         enum iwl_ucode_tlv_type tlv_type;
1326         const u8 *tlv_data;
1327
1328         if (len < sizeof(*ucode)) {
1329                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1330                 return -EINVAL;
1331         }
1332
1333         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1334                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1335                         le32_to_cpu(ucode->magic));
1336                 return -EINVAL;
1337         }
1338
1339         /*
1340          * Check which alternatives are present, and "downgrade"
1341          * when the chosen alternative is not present, warning
1342          * the user when that happens. Some files may not have
1343          * any alternatives, so don't warn in that case.
1344          */
1345         alternatives = le64_to_cpu(ucode->alternatives);
1346         tmp = wanted_alternative;
1347         if (wanted_alternative > 63)
1348                 wanted_alternative = 63;
1349         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1350                 wanted_alternative--;
1351         if (wanted_alternative && wanted_alternative != tmp)
1352                 IWL_WARN(priv,
1353                          "uCode alternative %d not available, choosing %d\n",
1354                          tmp, wanted_alternative);
1355
1356         priv->ucode_ver = le32_to_cpu(ucode->ver);
1357         pieces->build = le32_to_cpu(ucode->build);
1358         data = ucode->data;
1359
1360         len -= sizeof(*ucode);
1361
1362         while (len >= sizeof(*tlv)) {
1363                 u16 tlv_alt;
1364
1365                 len -= sizeof(*tlv);
1366                 tlv = (void *)data;
1367
1368                 tlv_len = le32_to_cpu(tlv->length);
1369                 tlv_type = le16_to_cpu(tlv->type);
1370                 tlv_alt = le16_to_cpu(tlv->alternative);
1371                 tlv_data = tlv->data;
1372
1373                 if (len < tlv_len) {
1374                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1375                                 len, tlv_len);
1376                         return -EINVAL;
1377                 }
1378                 len -= ALIGN(tlv_len, 4);
1379                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1380
1381                 /*
1382                  * Alternative 0 is always valid.
1383                  *
1384                  * Skip alternative TLVs that are not selected.
1385                  */
1386                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1387                         continue;
1388
1389                 switch (tlv_type) {
1390                 case IWL_UCODE_TLV_INST:
1391                         pieces->inst = tlv_data;
1392                         pieces->inst_size = tlv_len;
1393                         break;
1394                 case IWL_UCODE_TLV_DATA:
1395                         pieces->data = tlv_data;
1396                         pieces->data_size = tlv_len;
1397                         break;
1398                 case IWL_UCODE_TLV_INIT:
1399                         pieces->init = tlv_data;
1400                         pieces->init_size = tlv_len;
1401                         break;
1402                 case IWL_UCODE_TLV_INIT_DATA:
1403                         pieces->init_data = tlv_data;
1404                         pieces->init_data_size = tlv_len;
1405                         break;
1406                 case IWL_UCODE_TLV_BOOT:
1407                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1408                         break;
1409                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1410                         if (tlv_len != sizeof(u32))
1411                                 goto invalid_tlv_len;
1412                         capa->max_probe_length =
1413                                         le32_to_cpup((__le32 *)tlv_data);
1414                         break;
1415                 case IWL_UCODE_TLV_PAN:
1416                         if (tlv_len)
1417                                 goto invalid_tlv_len;
1418                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1419                         break;
1420                 case IWL_UCODE_TLV_FLAGS:
1421                         /* must be at least one u32 */
1422                         if (tlv_len < sizeof(u32))
1423                                 goto invalid_tlv_len;
1424                         /* and a proper number of u32s */
1425                         if (tlv_len % sizeof(u32))
1426                                 goto invalid_tlv_len;
1427                         /*
1428                          * This driver only reads the first u32 as
1429                          * right now no more features are defined,
1430                          * if that changes then either the driver
1431                          * will not work with the new firmware, or
1432                          * it'll not take advantage of new features.
1433                          */
1434                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1435                         break;
1436                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1437                         if (tlv_len != sizeof(u32))
1438                                 goto invalid_tlv_len;
1439                         pieces->init_evtlog_ptr =
1440                                         le32_to_cpup((__le32 *)tlv_data);
1441                         break;
1442                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1443                         if (tlv_len != sizeof(u32))
1444                                 goto invalid_tlv_len;
1445                         pieces->init_evtlog_size =
1446                                         le32_to_cpup((__le32 *)tlv_data);
1447                         break;
1448                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1449                         if (tlv_len != sizeof(u32))
1450                                 goto invalid_tlv_len;
1451                         pieces->init_errlog_ptr =
1452                                         le32_to_cpup((__le32 *)tlv_data);
1453                         break;
1454                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1455                         if (tlv_len != sizeof(u32))
1456                                 goto invalid_tlv_len;
1457                         pieces->inst_evtlog_ptr =
1458                                         le32_to_cpup((__le32 *)tlv_data);
1459                         break;
1460                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1461                         if (tlv_len != sizeof(u32))
1462                                 goto invalid_tlv_len;
1463                         pieces->inst_evtlog_size =
1464                                         le32_to_cpup((__le32 *)tlv_data);
1465                         break;
1466                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1467                         if (tlv_len != sizeof(u32))
1468                                 goto invalid_tlv_len;
1469                         pieces->inst_errlog_ptr =
1470                                         le32_to_cpup((__le32 *)tlv_data);
1471                         break;
1472                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1473                         if (tlv_len)
1474                                 goto invalid_tlv_len;
1475                         priv->enhance_sensitivity_table = true;
1476                         break;
1477                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1478                         if (tlv_len != sizeof(u32))
1479                                 goto invalid_tlv_len;
1480                         capa->standard_phy_calibration_size =
1481                                         le32_to_cpup((__le32 *)tlv_data);
1482                         break;
1483                 default:
1484                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1485                         break;
1486                 }
1487         }
1488
1489         if (len) {
1490                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1491                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1492                 return -EINVAL;
1493         }
1494
1495         return 0;
1496
1497  invalid_tlv_len:
1498         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1499         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1500
1501         return -EINVAL;
1502 }
1503
1504 /**
1505  * iwl_ucode_callback - callback when firmware was loaded
1506  *
1507  * If loaded successfully, copies the firmware into buffers
1508  * for the card to fetch (via DMA).
1509  */
1510 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1511 {
1512         struct iwl_priv *priv = context;
1513         struct iwl_ucode_header *ucode;
1514         int err;
1515         struct iwlagn_firmware_pieces pieces;
1516         const unsigned int api_max = priv->cfg->ucode_api_max;
1517         const unsigned int api_min = priv->cfg->ucode_api_min;
1518         u32 api_ver;
1519         char buildstr[25];
1520         u32 build;
1521         struct iwlagn_ucode_capabilities ucode_capa = {
1522                 .max_probe_length = 200,
1523                 .standard_phy_calibration_size =
1524                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1525         };
1526
1527         memset(&pieces, 0, sizeof(pieces));
1528
1529         if (!ucode_raw) {
1530                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1531                         IWL_ERR(priv,
1532                                 "request for firmware file '%s' failed.\n",
1533                                 priv->firmware_name);
1534                 goto try_again;
1535         }
1536
1537         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1538                        priv->firmware_name, ucode_raw->size);
1539
1540         /* Make sure that we got at least the API version number */
1541         if (ucode_raw->size < 4) {
1542                 IWL_ERR(priv, "File size way too small!\n");
1543                 goto try_again;
1544         }
1545
1546         /* Data from ucode file:  header followed by uCode images */
1547         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1548
1549         if (ucode->ver)
1550                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1551         else
1552                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1553                                            &ucode_capa);
1554
1555         if (err)
1556                 goto try_again;
1557
1558         api_ver = IWL_UCODE_API(priv->ucode_ver);
1559         build = pieces.build;
1560
1561         /*
1562          * api_ver should match the api version forming part of the
1563          * firmware filename ... but we don't check for that and only rely
1564          * on the API version read from firmware header from here on forward
1565          */
1566         /* no api version check required for experimental uCode */
1567         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1568                 if (api_ver < api_min || api_ver > api_max) {
1569                         IWL_ERR(priv,
1570                                 "Driver unable to support your firmware API. "
1571                                 "Driver supports v%u, firmware is v%u.\n",
1572                                 api_max, api_ver);
1573                         goto try_again;
1574                 }
1575
1576                 if (api_ver != api_max)
1577                         IWL_ERR(priv,
1578                                 "Firmware has old API version. Expected v%u, "
1579                                 "got v%u. New firmware can be obtained "
1580                                 "from http://www.intellinuxwireless.org.\n",
1581                                 api_max, api_ver);
1582         }
1583
1584         if (build)
1585                 sprintf(buildstr, " build %u%s", build,
1586                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1587                                 ? " (EXP)" : "");
1588         else
1589                 buildstr[0] = '\0';
1590
1591         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1592                  IWL_UCODE_MAJOR(priv->ucode_ver),
1593                  IWL_UCODE_MINOR(priv->ucode_ver),
1594                  IWL_UCODE_API(priv->ucode_ver),
1595                  IWL_UCODE_SERIAL(priv->ucode_ver),
1596                  buildstr);
1597
1598         snprintf(priv->hw->wiphy->fw_version,
1599                  sizeof(priv->hw->wiphy->fw_version),
1600                  "%u.%u.%u.%u%s",
1601                  IWL_UCODE_MAJOR(priv->ucode_ver),
1602                  IWL_UCODE_MINOR(priv->ucode_ver),
1603                  IWL_UCODE_API(priv->ucode_ver),
1604                  IWL_UCODE_SERIAL(priv->ucode_ver),
1605                  buildstr);
1606
1607         /*
1608          * For any of the failures below (before allocating pci memory)
1609          * we will try to load a version with a smaller API -- maybe the
1610          * user just got a corrupted version of the latest API.
1611          */
1612
1613         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1614                        priv->ucode_ver);
1615         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1616                        pieces.inst_size);
1617         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1618                        pieces.data_size);
1619         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1620                        pieces.init_size);
1621         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1622                        pieces.init_data_size);
1623
1624         /* Verify that uCode images will fit in card's SRAM */
1625         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1626                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1627                         pieces.inst_size);
1628                 goto try_again;
1629         }
1630
1631         if (pieces.data_size > priv->hw_params.max_data_size) {
1632                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1633                         pieces.data_size);
1634                 goto try_again;
1635         }
1636
1637         if (pieces.init_size > priv->hw_params.max_inst_size) {
1638                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1639                         pieces.init_size);
1640                 goto try_again;
1641         }
1642
1643         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1644                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1645                         pieces.init_data_size);
1646                 goto try_again;
1647         }
1648
1649         /* Allocate ucode buffers for card's bus-master loading ... */
1650
1651         /* Runtime instructions and 2 copies of data:
1652          * 1) unmodified from disk
1653          * 2) backup cache for save/restore during power-downs */
1654         priv->ucode_code.len = pieces.inst_size;
1655         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1656
1657         priv->ucode_data.len = pieces.data_size;
1658         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1659
1660         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr)
1661                 goto err_pci_alloc;
1662
1663         /* Initialization instructions and data */
1664         if (pieces.init_size && pieces.init_data_size) {
1665                 priv->ucode_init.len = pieces.init_size;
1666                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1667
1668                 priv->ucode_init_data.len = pieces.init_data_size;
1669                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1670
1671                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1672                         goto err_pci_alloc;
1673         }
1674
1675         /* Now that we can no longer fail, copy information */
1676
1677         /*
1678          * The (size - 16) / 12 formula is based on the information recorded
1679          * for each event, which is of mode 1 (including timestamp) for all
1680          * new microcodes that include this information.
1681          */
1682         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1683         if (pieces.init_evtlog_size)
1684                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1685         else
1686                 priv->_agn.init_evtlog_size =
1687                         priv->cfg->base_params->max_event_log_size;
1688         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1689         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1690         if (pieces.inst_evtlog_size)
1691                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1692         else
1693                 priv->_agn.inst_evtlog_size =
1694                         priv->cfg->base_params->max_event_log_size;
1695         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1696
1697         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1698                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1699                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1700         } else
1701                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1702
1703         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1704                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1705         else
1706                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1707
1708         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BTSTATS ||
1709             (priv->cfg->bt_params && priv->cfg->bt_params->bt_statistics))
1710                 priv->bt_statistics = true;
1711
1712         /* Copy images into buffers for card's bus-master reads ... */
1713
1714         /* Runtime instructions (first block of data in file) */
1715         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1716                         pieces.inst_size);
1717         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1718
1719         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1720                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1721
1722         /*
1723          * Runtime data
1724          * NOTE:  Copy into backup buffer will be done in iwl_up()
1725          */
1726         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1727                         pieces.data_size);
1728         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1729
1730         /* Initialization instructions */
1731         if (pieces.init_size) {
1732                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1733                                 pieces.init_size);
1734                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1735         }
1736
1737         /* Initialization data */
1738         if (pieces.init_data_size) {
1739                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1740                                pieces.init_data_size);
1741                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1742                        pieces.init_data_size);
1743         }
1744
1745         /*
1746          * figure out the offset of chain noise reset and gain commands
1747          * base on the size of standard phy calibration commands table size
1748          */
1749         if (ucode_capa.standard_phy_calibration_size >
1750             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1751                 ucode_capa.standard_phy_calibration_size =
1752                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1753
1754         priv->_agn.phy_calib_chain_noise_reset_cmd =
1755                 ucode_capa.standard_phy_calibration_size;
1756         priv->_agn.phy_calib_chain_noise_gain_cmd =
1757                 ucode_capa.standard_phy_calibration_size + 1;
1758
1759         /**************************************************
1760          * This is still part of probe() in a sense...
1761          *
1762          * 9. Setup and register with mac80211 and debugfs
1763          **************************************************/
1764         err = iwl_mac_setup_register(priv, &ucode_capa);
1765         if (err)
1766                 goto out_unbind;
1767
1768         err = iwl_dbgfs_register(priv, DRV_NAME);
1769         if (err)
1770                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1771
1772         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1773                                         &iwl_attribute_group);
1774         if (err) {
1775                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1776                 goto out_unbind;
1777         }
1778
1779         /* We have our copies now, allow OS release its copies */
1780         release_firmware(ucode_raw);
1781         complete(&priv->_agn.firmware_loading_complete);
1782         return;
1783
1784  try_again:
1785         /* try next, if any */
1786         if (iwl_request_firmware(priv, false))
1787                 goto out_unbind;
1788         release_firmware(ucode_raw);
1789         return;
1790
1791  err_pci_alloc:
1792         IWL_ERR(priv, "failed to allocate pci memory\n");
1793         iwl_dealloc_ucode_pci(priv);
1794  out_unbind:
1795         complete(&priv->_agn.firmware_loading_complete);
1796         device_release_driver(&priv->pci_dev->dev);
1797         release_firmware(ucode_raw);
1798 }
1799
1800 static const char *desc_lookup_text[] = {
1801         "OK",
1802         "FAIL",
1803         "BAD_PARAM",
1804         "BAD_CHECKSUM",
1805         "NMI_INTERRUPT_WDG",
1806         "SYSASSERT",
1807         "FATAL_ERROR",
1808         "BAD_COMMAND",
1809         "HW_ERROR_TUNE_LOCK",
1810         "HW_ERROR_TEMPERATURE",
1811         "ILLEGAL_CHAN_FREQ",
1812         "VCC_NOT_STABLE",
1813         "FH_ERROR",
1814         "NMI_INTERRUPT_HOST",
1815         "NMI_INTERRUPT_ACTION_PT",
1816         "NMI_INTERRUPT_UNKNOWN",
1817         "UCODE_VERSION_MISMATCH",
1818         "HW_ERROR_ABS_LOCK",
1819         "HW_ERROR_CAL_LOCK_FAIL",
1820         "NMI_INTERRUPT_INST_ACTION_PT",
1821         "NMI_INTERRUPT_DATA_ACTION_PT",
1822         "NMI_TRM_HW_ER",
1823         "NMI_INTERRUPT_TRM",
1824         "NMI_INTERRUPT_BREAK_POINT"
1825         "DEBUG_0",
1826         "DEBUG_1",
1827         "DEBUG_2",
1828         "DEBUG_3",
1829 };
1830
1831 static struct { char *name; u8 num; } advanced_lookup[] = {
1832         { "NMI_INTERRUPT_WDG", 0x34 },
1833         { "SYSASSERT", 0x35 },
1834         { "UCODE_VERSION_MISMATCH", 0x37 },
1835         { "BAD_COMMAND", 0x38 },
1836         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1837         { "FATAL_ERROR", 0x3D },
1838         { "NMI_TRM_HW_ERR", 0x46 },
1839         { "NMI_INTERRUPT_TRM", 0x4C },
1840         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1841         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1842         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1843         { "NMI_INTERRUPT_HOST", 0x66 },
1844         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1845         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1846         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1847         { "ADVANCED_SYSASSERT", 0 },
1848 };
1849
1850 static const char *desc_lookup(u32 num)
1851 {
1852         int i;
1853         int max = ARRAY_SIZE(desc_lookup_text);
1854
1855         if (num < max)
1856                 return desc_lookup_text[num];
1857
1858         max = ARRAY_SIZE(advanced_lookup) - 1;
1859         for (i = 0; i < max; i++) {
1860                 if (advanced_lookup[i].num == num)
1861                         break;;
1862         }
1863         return advanced_lookup[i].name;
1864 }
1865
1866 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1867 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1868
1869 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1870 {
1871         u32 data2, line;
1872         u32 desc, time, count, base, data1;
1873         u32 blink1, blink2, ilink1, ilink2;
1874         u32 pc, hcmd;
1875
1876         base = priv->device_pointers.error_event_table;
1877         if (priv->ucode_type == UCODE_INIT) {
1878                 if (!base)
1879                         base = priv->_agn.init_errlog_ptr;
1880         } else {
1881                 if (!base)
1882                         base = priv->_agn.inst_errlog_ptr;
1883         }
1884
1885         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1886                 IWL_ERR(priv,
1887                         "Not valid error log pointer 0x%08X for %s uCode\n",
1888                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1889                 return;
1890         }
1891
1892         count = iwl_read_targ_mem(priv, base);
1893
1894         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1895                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1896                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1897                         priv->status, count);
1898         }
1899
1900         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1901         priv->isr_stats.err_code = desc;
1902         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
1903         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1904         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1905         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1906         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1907         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1908         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1909         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1910         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1911         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
1912
1913         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1914                                       blink1, blink2, ilink1, ilink2);
1915
1916         IWL_ERR(priv, "Desc                                  Time       "
1917                 "data1      data2      line\n");
1918         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1919                 desc_lookup(desc), desc, time, data1, data2, line);
1920         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1921         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1922                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1923 }
1924
1925 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1926
1927 /**
1928  * iwl_print_event_log - Dump error event log to syslog
1929  *
1930  */
1931 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1932                                u32 num_events, u32 mode,
1933                                int pos, char **buf, size_t bufsz)
1934 {
1935         u32 i;
1936         u32 base;       /* SRAM byte address of event log header */
1937         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1938         u32 ptr;        /* SRAM byte address of log data */
1939         u32 ev, time, data; /* event log data */
1940         unsigned long reg_flags;
1941
1942         if (num_events == 0)
1943                 return pos;
1944
1945         base = priv->device_pointers.log_event_table;
1946         if (priv->ucode_type == UCODE_INIT) {
1947                 if (!base)
1948                         base = priv->_agn.init_evtlog_ptr;
1949         } else {
1950                 if (!base)
1951                         base = priv->_agn.inst_evtlog_ptr;
1952         }
1953
1954         if (mode == 0)
1955                 event_size = 2 * sizeof(u32);
1956         else
1957                 event_size = 3 * sizeof(u32);
1958
1959         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1960
1961         /* Make sure device is powered up for SRAM reads */
1962         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1963         iwl_grab_nic_access(priv);
1964
1965         /* Set starting address; reads will auto-increment */
1966         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1967         rmb();
1968
1969         /* "time" is actually "data" for mode 0 (no timestamp).
1970         * place event id # at far right for easier visual parsing. */
1971         for (i = 0; i < num_events; i++) {
1972                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1973                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1974                 if (mode == 0) {
1975                         /* data, ev */
1976                         if (bufsz) {
1977                                 pos += scnprintf(*buf + pos, bufsz - pos,
1978                                                 "EVT_LOG:0x%08x:%04u\n",
1979                                                 time, ev);
1980                         } else {
1981                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1982                                         time, ev);
1983                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1984                                         time, ev);
1985                         }
1986                 } else {
1987                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1988                         if (bufsz) {
1989                                 pos += scnprintf(*buf + pos, bufsz - pos,
1990                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1991                                                  time, data, ev);
1992                         } else {
1993                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1994                                         time, data, ev);
1995                                 trace_iwlwifi_dev_ucode_event(priv, time,
1996                                         data, ev);
1997                         }
1998                 }
1999         }
2000
2001         /* Allow device to power down */
2002         iwl_release_nic_access(priv);
2003         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2004         return pos;
2005 }
2006
2007 /**
2008  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2009  */
2010 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2011                                     u32 num_wraps, u32 next_entry,
2012                                     u32 size, u32 mode,
2013                                     int pos, char **buf, size_t bufsz)
2014 {
2015         /*
2016          * display the newest DEFAULT_LOG_ENTRIES entries
2017          * i.e the entries just before the next ont that uCode would fill.
2018          */
2019         if (num_wraps) {
2020                 if (next_entry < size) {
2021                         pos = iwl_print_event_log(priv,
2022                                                 capacity - (size - next_entry),
2023                                                 size - next_entry, mode,
2024                                                 pos, buf, bufsz);
2025                         pos = iwl_print_event_log(priv, 0,
2026                                                   next_entry, mode,
2027                                                   pos, buf, bufsz);
2028                 } else
2029                         pos = iwl_print_event_log(priv, next_entry - size,
2030                                                   size, mode, pos, buf, bufsz);
2031         } else {
2032                 if (next_entry < size) {
2033                         pos = iwl_print_event_log(priv, 0, next_entry,
2034                                                   mode, pos, buf, bufsz);
2035                 } else {
2036                         pos = iwl_print_event_log(priv, next_entry - size,
2037                                                   size, mode, pos, buf, bufsz);
2038                 }
2039         }
2040         return pos;
2041 }
2042
2043 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2044
2045 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2046                             char **buf, bool display)
2047 {
2048         u32 base;       /* SRAM byte address of event log header */
2049         u32 capacity;   /* event log capacity in # entries */
2050         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2051         u32 num_wraps;  /* # times uCode wrapped to top of log */
2052         u32 next_entry; /* index of next entry to be written by uCode */
2053         u32 size;       /* # entries that we'll print */
2054         u32 logsize;
2055         int pos = 0;
2056         size_t bufsz = 0;
2057
2058         base = priv->device_pointers.log_event_table;
2059         if (priv->ucode_type == UCODE_INIT) {
2060                 logsize = priv->_agn.init_evtlog_size;
2061                 if (!base)
2062                         base = priv->_agn.init_evtlog_ptr;
2063         } else {
2064                 logsize = priv->_agn.inst_evtlog_size;
2065                 if (!base)
2066                         base = priv->_agn.inst_evtlog_ptr;
2067         }
2068
2069         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2070                 IWL_ERR(priv,
2071                         "Invalid event log pointer 0x%08X for %s uCode\n",
2072                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2073                 return -EINVAL;
2074         }
2075
2076         /* event log header */
2077         capacity = iwl_read_targ_mem(priv, base);
2078         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2079         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2080         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2081
2082         if (capacity > logsize) {
2083                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2084                         capacity, logsize);
2085                 capacity = logsize;
2086         }
2087
2088         if (next_entry > logsize) {
2089                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2090                         next_entry, logsize);
2091                 next_entry = logsize;
2092         }
2093
2094         size = num_wraps ? capacity : next_entry;
2095
2096         /* bail out if nothing in log */
2097         if (size == 0) {
2098                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2099                 return pos;
2100         }
2101
2102         /* enable/disable bt channel inhibition */
2103         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2104
2105 #ifdef CONFIG_IWLWIFI_DEBUG
2106         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2107                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2108                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2109 #else
2110         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2111                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2112 #endif
2113         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2114                 size);
2115
2116 #ifdef CONFIG_IWLWIFI_DEBUG
2117         if (display) {
2118                 if (full_log)
2119                         bufsz = capacity * 48;
2120                 else
2121                         bufsz = size * 48;
2122                 *buf = kmalloc(bufsz, GFP_KERNEL);
2123                 if (!*buf)
2124                         return -ENOMEM;
2125         }
2126         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2127                 /*
2128                  * if uCode has wrapped back to top of log,
2129                  * start at the oldest entry,
2130                  * i.e the next one that uCode would fill.
2131                  */
2132                 if (num_wraps)
2133                         pos = iwl_print_event_log(priv, next_entry,
2134                                                 capacity - next_entry, mode,
2135                                                 pos, buf, bufsz);
2136                 /* (then/else) start at top of log */
2137                 pos = iwl_print_event_log(priv, 0,
2138                                           next_entry, mode, pos, buf, bufsz);
2139         } else
2140                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2141                                                 next_entry, size, mode,
2142                                                 pos, buf, bufsz);
2143 #else
2144         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2145                                         next_entry, size, mode,
2146                                         pos, buf, bufsz);
2147 #endif
2148         return pos;
2149 }
2150
2151 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2152 {
2153         struct iwl_ct_kill_config cmd;
2154         struct iwl_ct_kill_throttling_config adv_cmd;
2155         unsigned long flags;
2156         int ret = 0;
2157
2158         spin_lock_irqsave(&priv->lock, flags);
2159         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2160                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2161         spin_unlock_irqrestore(&priv->lock, flags);
2162         priv->thermal_throttle.ct_kill_toggle = false;
2163
2164         if (priv->cfg->base_params->support_ct_kill_exit) {
2165                 adv_cmd.critical_temperature_enter =
2166                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2167                 adv_cmd.critical_temperature_exit =
2168                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2169
2170                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2171                                        sizeof(adv_cmd), &adv_cmd);
2172                 if (ret)
2173                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2174                 else
2175                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2176                                         "succeeded, "
2177                                         "critical temperature enter is %d,"
2178                                         "exit is %d\n",
2179                                        priv->hw_params.ct_kill_threshold,
2180                                        priv->hw_params.ct_kill_exit_threshold);
2181         } else {
2182                 cmd.critical_temperature_R =
2183                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2184
2185                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2186                                        sizeof(cmd), &cmd);
2187                 if (ret)
2188                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2189                 else
2190                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2191                                         "succeeded, "
2192                                         "critical temperature is %d\n",
2193                                         priv->hw_params.ct_kill_threshold);
2194         }
2195 }
2196
2197 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2198 {
2199         struct iwl_calib_cfg_cmd calib_cfg_cmd;
2200         struct iwl_host_cmd cmd = {
2201                 .id = CALIBRATION_CFG_CMD,
2202                 .len = sizeof(struct iwl_calib_cfg_cmd),
2203                 .data = &calib_cfg_cmd,
2204         };
2205
2206         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
2207         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
2208         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
2209
2210         return iwl_send_cmd(priv, &cmd);
2211 }
2212
2213
2214 /**
2215  * iwl_alive_start - called after REPLY_ALIVE notification received
2216  *                   from protocol/runtime uCode (initialization uCode's
2217  *                   Alive gets handled by iwl_init_alive_start()).
2218  */
2219 static void iwl_alive_start(struct iwl_priv *priv)
2220 {
2221         int ret = 0;
2222         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2223
2224         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2225
2226         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2227          * This is a paranoid check, because we would not have gotten the
2228          * "runtime" alive if code weren't properly loaded.  */
2229         if (iwl_verify_ucode(priv, &priv->ucode_code)) {
2230                 /* Runtime instruction load was bad;
2231                  * take it all the way back down so we can try again */
2232                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2233                 goto restart;
2234         }
2235
2236         ret = iwlagn_alive_notify(priv);
2237         if (ret) {
2238                 IWL_WARN(priv,
2239                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2240                 goto restart;
2241         }
2242
2243
2244         /* After the ALIVE response, we can send host commands to the uCode */
2245         set_bit(STATUS_ALIVE, &priv->status);
2246
2247         /* Enable watchdog to monitor the driver tx queues */
2248         iwl_setup_watchdog(priv);
2249
2250         if (iwl_is_rfkill(priv))
2251                 return;
2252
2253         /* download priority table before any calibration request */
2254         if (priv->cfg->bt_params &&
2255             priv->cfg->bt_params->advanced_bt_coexist) {
2256                 /* Configure Bluetooth device coexistence support */
2257                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2258                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2259                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2260                 priv->cfg->ops->hcmd->send_bt_config(priv);
2261                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2262                 iwlagn_send_prio_tbl(priv);
2263
2264                 /* FIXME: w/a to force change uCode BT state machine */
2265                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2266                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2267                 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2268                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2269         }
2270         if (priv->hw_params.calib_rt_cfg)
2271                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2272
2273         ieee80211_wake_queues(priv->hw);
2274
2275         priv->active_rate = IWL_RATES_MASK;
2276
2277         /* Configure Tx antenna selection based on H/W config */
2278         if (priv->cfg->ops->hcmd->set_tx_ant)
2279                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2280
2281         if (iwl_is_associated_ctx(ctx)) {
2282                 struct iwl_rxon_cmd *active_rxon =
2283                                 (struct iwl_rxon_cmd *)&ctx->active;
2284                 /* apply any changes in staging */
2285                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2286                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2287         } else {
2288                 struct iwl_rxon_context *tmp;
2289                 /* Initialize our rx_config data */
2290                 for_each_context(priv, tmp)
2291                         iwl_connection_init_rx_config(priv, tmp);
2292
2293                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2294                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2295         }
2296
2297         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2298             !priv->cfg->bt_params->advanced_bt_coexist)) {
2299                 /*
2300                  * default is 2-wire BT coexexistence support
2301                  */
2302                 priv->cfg->ops->hcmd->send_bt_config(priv);
2303         }
2304
2305         iwl_reset_run_time_calib(priv);
2306
2307         set_bit(STATUS_READY, &priv->status);
2308
2309         /* Configure the adapter for unassociated operation */
2310         iwlcore_commit_rxon(priv, ctx);
2311
2312         /* At this point, the NIC is initialized and operational */
2313         iwl_rf_kill_ct_config(priv);
2314
2315         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2316         wake_up_interruptible(&priv->wait_command_queue);
2317
2318         iwl_power_update_mode(priv, true);
2319         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2320
2321
2322         return;
2323
2324  restart:
2325         queue_work(priv->workqueue, &priv->restart);
2326 }
2327
2328 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2329
2330 static void __iwl_down(struct iwl_priv *priv)
2331 {
2332         unsigned long flags;
2333         int exit_pending;
2334
2335         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2336
2337         iwl_scan_cancel_timeout(priv, 200);
2338
2339         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2340
2341         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2342          * to prevent rearm timer */
2343         del_timer_sync(&priv->watchdog);
2344
2345         iwl_clear_ucode_stations(priv, NULL);
2346         iwl_dealloc_bcast_stations(priv);
2347         iwl_clear_driver_stations(priv);
2348
2349         /* reset BT coex data */
2350         priv->bt_status = 0;
2351         if (priv->cfg->bt_params)
2352                 priv->bt_traffic_load =
2353                          priv->cfg->bt_params->bt_init_traffic_load;
2354         else
2355                 priv->bt_traffic_load = 0;
2356         priv->bt_full_concurrent = false;
2357         priv->bt_ci_compliance = 0;
2358
2359         /* Wipe out the EXIT_PENDING status bit if we are not actually
2360          * exiting the module */
2361         if (!exit_pending)
2362                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2363
2364         /* stop and reset the on-board processor */
2365         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2366
2367         /* tell the device to stop sending interrupts */
2368         spin_lock_irqsave(&priv->lock, flags);
2369         iwl_disable_interrupts(priv);
2370         spin_unlock_irqrestore(&priv->lock, flags);
2371         iwl_synchronize_irq(priv);
2372
2373         if (priv->mac80211_registered)
2374                 ieee80211_stop_queues(priv->hw);
2375
2376         /* If we have not previously called iwl_init() then
2377          * clear all bits but the RF Kill bit and return */
2378         if (!iwl_is_init(priv)) {
2379                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2380                                         STATUS_RF_KILL_HW |
2381                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2382                                         STATUS_GEO_CONFIGURED |
2383                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2384                                         STATUS_EXIT_PENDING;
2385                 goto exit;
2386         }
2387
2388         /* ...otherwise clear out all the status bits but the RF Kill
2389          * bit and continue taking the NIC down. */
2390         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2391                                 STATUS_RF_KILL_HW |
2392                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2393                                 STATUS_GEO_CONFIGURED |
2394                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2395                                 STATUS_FW_ERROR |
2396                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2397                                 STATUS_EXIT_PENDING;
2398
2399         /* device going down, Stop using ICT table */
2400         if (priv->cfg->ops->lib->isr_ops.disable)
2401                 priv->cfg->ops->lib->isr_ops.disable(priv);
2402
2403         iwlagn_txq_ctx_stop(priv);
2404         iwlagn_rxq_stop(priv);
2405
2406         /* Power-down device's busmaster DMA clocks */
2407         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2408         udelay(5);
2409
2410         /* Make sure (redundant) we've released our request to stay awake */
2411         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2412
2413         /* Stop the device, and put it in low power state */
2414         iwl_apm_stop(priv);
2415
2416  exit:
2417         dev_kfree_skb(priv->beacon_skb);
2418         priv->beacon_skb = NULL;
2419
2420         /* clear out any free frames */
2421         iwl_clear_free_frames(priv);
2422 }
2423
2424 static void iwl_down(struct iwl_priv *priv)
2425 {
2426         mutex_lock(&priv->mutex);
2427         __iwl_down(priv);
2428         mutex_unlock(&priv->mutex);
2429
2430         iwl_cancel_deferred_work(priv);
2431 }
2432
2433 #define HW_READY_TIMEOUT (50)
2434
2435 static int iwl_set_hw_ready(struct iwl_priv *priv)
2436 {
2437         int ret = 0;
2438
2439         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2440                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2441
2442         /* See if we got it */
2443         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2444                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2445                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2446                                 HW_READY_TIMEOUT);
2447         if (ret != -ETIMEDOUT)
2448                 priv->hw_ready = true;
2449         else
2450                 priv->hw_ready = false;
2451
2452         IWL_DEBUG_INFO(priv, "hardware %s\n",
2453                       (priv->hw_ready == 1) ? "ready" : "not ready");
2454         return ret;
2455 }
2456
2457 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2458 {
2459         int ret = 0;
2460
2461         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2462
2463         ret = iwl_set_hw_ready(priv);
2464         if (priv->hw_ready)
2465                 return ret;
2466
2467         /* If HW is not ready, prepare the conditions to check again */
2468         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2469                         CSR_HW_IF_CONFIG_REG_PREPARE);
2470
2471         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2472                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2473                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2474
2475         /* HW should be ready by now, check again. */
2476         if (ret != -ETIMEDOUT)
2477                 iwl_set_hw_ready(priv);
2478
2479         return ret;
2480 }
2481
2482 #define MAX_HW_RESTARTS 5
2483
2484 static int __iwl_up(struct iwl_priv *priv)
2485 {
2486         struct iwl_rxon_context *ctx;
2487         int i;
2488         int ret;
2489
2490         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2491                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2492                 return -EIO;
2493         }
2494
2495         for_each_context(priv, ctx) {
2496                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2497                 if (ret) {
2498                         iwl_dealloc_bcast_stations(priv);
2499                         return ret;
2500                 }
2501         }
2502
2503         iwl_prepare_card_hw(priv);
2504
2505         if (!priv->hw_ready) {
2506                 IWL_WARN(priv, "Exit HW not ready\n");
2507                 return -EIO;
2508         }
2509
2510         /* If platform's RF_KILL switch is NOT set to KILL */
2511         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2512                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2513         else
2514                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2515
2516         if (iwl_is_rfkill(priv)) {
2517                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2518
2519                 iwl_enable_interrupts(priv);
2520                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2521                 return 0;
2522         }
2523
2524         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2525
2526         ret = iwlagn_hw_nic_init(priv);
2527         if (ret) {
2528                 IWL_ERR(priv, "Unable to init nic\n");
2529                 return ret;
2530         }
2531
2532         /* make sure rfkill handshake bits are cleared */
2533         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2534         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2535                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2536
2537         /* clear (again), then enable host interrupts */
2538         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2539         iwl_enable_interrupts(priv);
2540
2541         /* really make sure rfkill handshake bits are cleared */
2542         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2543         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2544
2545         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2546
2547                 /* load bootstrap state machine,
2548                  * load bootstrap program into processor's memory,
2549                  * prepare to load the "initialize" uCode */
2550                 ret = iwlagn_load_ucode(priv);
2551
2552                 if (ret) {
2553                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2554                                 ret);
2555                         continue;
2556                 }
2557
2558                 /* start card; "initialize" will load runtime ucode */
2559                 iwl_nic_start(priv);
2560
2561                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2562
2563                 return 0;
2564         }
2565
2566         set_bit(STATUS_EXIT_PENDING, &priv->status);
2567         __iwl_down(priv);
2568         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2569
2570         /* tried to restart and config the device for as long as our
2571          * patience could withstand */
2572         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2573         return -EIO;
2574 }
2575
2576
2577 /*****************************************************************************
2578  *
2579  * Workqueue callbacks
2580  *
2581  *****************************************************************************/
2582
2583 static void iwl_bg_init_alive_start(struct work_struct *data)
2584 {
2585         struct iwl_priv *priv =
2586             container_of(data, struct iwl_priv, init_alive_start.work);
2587
2588         mutex_lock(&priv->mutex);
2589
2590         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2591                 mutex_unlock(&priv->mutex);
2592                 return;
2593         }
2594
2595         iwlagn_init_alive_start(priv);
2596         mutex_unlock(&priv->mutex);
2597 }
2598
2599 static void iwl_bg_alive_start(struct work_struct *data)
2600 {
2601         struct iwl_priv *priv =
2602             container_of(data, struct iwl_priv, alive_start.work);
2603
2604         mutex_lock(&priv->mutex);
2605         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2606                 goto unlock;
2607
2608         /* enable dram interrupt */
2609         if (priv->cfg->ops->lib->isr_ops.reset)
2610                 priv->cfg->ops->lib->isr_ops.reset(priv);
2611
2612         iwl_alive_start(priv);
2613 unlock:
2614         mutex_unlock(&priv->mutex);
2615 }
2616
2617 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2618 {
2619         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2620                         run_time_calib_work);
2621
2622         mutex_lock(&priv->mutex);
2623
2624         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2625             test_bit(STATUS_SCANNING, &priv->status)) {
2626                 mutex_unlock(&priv->mutex);
2627                 return;
2628         }
2629
2630         if (priv->start_calib) {
2631                 if (iwl_bt_statistics(priv)) {
2632                         iwl_chain_noise_calibration(priv,
2633                                         (void *)&priv->_agn.statistics_bt);
2634                         iwl_sensitivity_calibration(priv,
2635                                         (void *)&priv->_agn.statistics_bt);
2636                 } else {
2637                         iwl_chain_noise_calibration(priv,
2638                                         (void *)&priv->_agn.statistics);
2639                         iwl_sensitivity_calibration(priv,
2640                                         (void *)&priv->_agn.statistics);
2641                 }
2642         }
2643
2644         mutex_unlock(&priv->mutex);
2645 }
2646
2647 static void iwl_bg_restart(struct work_struct *data)
2648 {
2649         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2650
2651         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2652                 return;
2653
2654         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2655                 struct iwl_rxon_context *ctx;
2656                 bool bt_full_concurrent;
2657                 u8 bt_ci_compliance;
2658                 u8 bt_load;
2659                 u8 bt_status;
2660
2661                 mutex_lock(&priv->mutex);
2662                 for_each_context(priv, ctx)
2663                         ctx->vif = NULL;
2664                 priv->is_open = 0;
2665
2666                 /*
2667                  * __iwl_down() will clear the BT status variables,
2668                  * which is correct, but when we restart we really
2669                  * want to keep them so restore them afterwards.
2670                  *
2671                  * The restart process will later pick them up and
2672                  * re-configure the hw when we reconfigure the BT
2673                  * command.
2674                  */
2675                 bt_full_concurrent = priv->bt_full_concurrent;
2676                 bt_ci_compliance = priv->bt_ci_compliance;
2677                 bt_load = priv->bt_traffic_load;
2678                 bt_status = priv->bt_status;
2679
2680                 __iwl_down(priv);
2681
2682                 priv->bt_full_concurrent = bt_full_concurrent;
2683                 priv->bt_ci_compliance = bt_ci_compliance;
2684                 priv->bt_traffic_load = bt_load;
2685                 priv->bt_status = bt_status;
2686
2687                 mutex_unlock(&priv->mutex);
2688                 iwl_cancel_deferred_work(priv);
2689                 ieee80211_restart_hw(priv->hw);
2690         } else {
2691                 iwl_down(priv);
2692
2693                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2694                         return;
2695
2696                 mutex_lock(&priv->mutex);
2697                 __iwl_up(priv);
2698                 mutex_unlock(&priv->mutex);
2699         }
2700 }
2701
2702 static void iwl_bg_rx_replenish(struct work_struct *data)
2703 {
2704         struct iwl_priv *priv =
2705             container_of(data, struct iwl_priv, rx_replenish);
2706
2707         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2708                 return;
2709
2710         mutex_lock(&priv->mutex);
2711         iwlagn_rx_replenish(priv);
2712         mutex_unlock(&priv->mutex);
2713 }
2714
2715 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2716                                  struct ieee80211_channel *chan,
2717                                  enum nl80211_channel_type channel_type,
2718                                  unsigned int wait)
2719 {
2720         struct iwl_priv *priv = hw->priv;
2721         int ret;
2722
2723         /* Not supported if we don't have PAN */
2724         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2725                 ret = -EOPNOTSUPP;
2726                 goto free;
2727         }
2728
2729         /* Not supported on pre-P2P firmware */
2730         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2731                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2732                 ret = -EOPNOTSUPP;
2733                 goto free;
2734         }
2735
2736         mutex_lock(&priv->mutex);
2737
2738         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2739                 /*
2740                  * If the PAN context is free, use the normal
2741                  * way of doing remain-on-channel offload + TX.
2742                  */
2743                 ret = 1;
2744                 goto out;
2745         }
2746
2747         /* TODO: queue up if scanning? */
2748         if (test_bit(STATUS_SCANNING, &priv->status) ||
2749             priv->_agn.offchan_tx_skb) {
2750                 ret = -EBUSY;
2751                 goto out;
2752         }
2753
2754         /*
2755          * max_scan_ie_len doesn't include the blank SSID or the header,
2756          * so need to add that again here.
2757          */
2758         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2759                 ret = -ENOBUFS;
2760                 goto out;
2761         }
2762
2763         priv->_agn.offchan_tx_skb = skb;
2764         priv->_agn.offchan_tx_timeout = wait;
2765         priv->_agn.offchan_tx_chan = chan;
2766
2767         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2768                                 IWL_SCAN_OFFCH_TX, chan->band);
2769         if (ret)
2770                 priv->_agn.offchan_tx_skb = NULL;
2771  out:
2772         mutex_unlock(&priv->mutex);
2773  free:
2774         if (ret < 0)
2775                 kfree_skb(skb);
2776
2777         return ret;
2778 }
2779
2780 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2781 {
2782         struct iwl_priv *priv = hw->priv;
2783         int ret;
2784
2785         mutex_lock(&priv->mutex);
2786
2787         if (!priv->_agn.offchan_tx_skb) {
2788                 ret = -EINVAL;
2789                 goto unlock;
2790         }
2791
2792         priv->_agn.offchan_tx_skb = NULL;
2793
2794         ret = iwl_scan_cancel_timeout(priv, 200);
2795         if (ret)
2796                 ret = -EIO;
2797 unlock:
2798         mutex_unlock(&priv->mutex);
2799
2800         return ret;
2801 }
2802
2803 /*****************************************************************************
2804  *
2805  * mac80211 entry point functions
2806  *
2807  *****************************************************************************/
2808
2809 #define UCODE_READY_TIMEOUT     (4 * HZ)
2810
2811 /*
2812  * Not a mac80211 entry point function, but it fits in with all the
2813  * other mac80211 functions grouped here.
2814  */
2815 static int iwl_mac_setup_register(struct iwl_priv *priv,
2816                                   struct iwlagn_ucode_capabilities *capa)
2817 {
2818         int ret;
2819         struct ieee80211_hw *hw = priv->hw;
2820         struct iwl_rxon_context *ctx;
2821
2822         hw->rate_control_algorithm = "iwl-agn-rs";
2823
2824         /* Tell mac80211 our characteristics */
2825         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2826                     IEEE80211_HW_AMPDU_AGGREGATION |
2827                     IEEE80211_HW_NEED_DTIM_PERIOD |
2828                     IEEE80211_HW_SPECTRUM_MGMT |
2829                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2830
2831         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2832
2833         if (!priv->cfg->base_params->broken_powersave)
2834                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2835                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2836
2837         if (priv->cfg->sku & IWL_SKU_N)
2838                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2839                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2840
2841         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2842                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2843
2844         hw->sta_data_size = sizeof(struct iwl_station_priv);
2845         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2846
2847         for_each_context(priv, ctx) {
2848                 hw->wiphy->interface_modes |= ctx->interface_modes;
2849                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2850         }
2851
2852         hw->wiphy->max_remain_on_channel_duration = 1000;
2853
2854         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2855                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2856                             WIPHY_FLAG_IBSS_RSN;
2857
2858         /*
2859          * For now, disable PS by default because it affects
2860          * RX performance significantly.
2861          */
2862         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2863
2864         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2865         /* we create the 802.11 header and a zero-length SSID element */
2866         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2867
2868         /* Default value; 4 EDCA QOS priorities */
2869         hw->queues = 4;
2870
2871         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2872
2873         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2874                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2875                         &priv->bands[IEEE80211_BAND_2GHZ];
2876         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2877                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2878                         &priv->bands[IEEE80211_BAND_5GHZ];
2879
2880         iwl_leds_init(priv);
2881
2882         ret = ieee80211_register_hw(priv->hw);
2883         if (ret) {
2884                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2885                 return ret;
2886         }
2887         priv->mac80211_registered = 1;
2888
2889         return 0;
2890 }
2891
2892
2893 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2894 {
2895         struct iwl_priv *priv = hw->priv;
2896         int ret;
2897
2898         IWL_DEBUG_MAC80211(priv, "enter\n");
2899
2900         /* we should be verifying the device is ready to be opened */
2901         mutex_lock(&priv->mutex);
2902         ret = __iwl_up(priv);
2903         mutex_unlock(&priv->mutex);
2904
2905         if (ret)
2906                 return ret;
2907
2908         if (iwl_is_rfkill(priv))
2909                 goto out;
2910
2911         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2912
2913         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2914          * mac80211 will not be run successfully. */
2915         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2916                         test_bit(STATUS_READY, &priv->status),
2917                         UCODE_READY_TIMEOUT);
2918         if (!ret) {
2919                 if (!test_bit(STATUS_READY, &priv->status)) {
2920                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2921                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2922                         return -ETIMEDOUT;
2923                 }
2924         }
2925
2926         iwlagn_led_enable(priv);
2927
2928 out:
2929         priv->is_open = 1;
2930         IWL_DEBUG_MAC80211(priv, "leave\n");
2931         return 0;
2932 }
2933
2934 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2935 {
2936         struct iwl_priv *priv = hw->priv;
2937
2938         IWL_DEBUG_MAC80211(priv, "enter\n");
2939
2940         if (!priv->is_open)
2941                 return;
2942
2943         priv->is_open = 0;
2944
2945         iwl_down(priv);
2946
2947         flush_workqueue(priv->workqueue);
2948
2949         /* User space software may expect getting rfkill changes
2950          * even if interface is down */
2951         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2952         iwl_enable_rfkill_int(priv);
2953
2954         IWL_DEBUG_MAC80211(priv, "leave\n");
2955 }
2956
2957 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2958 {
2959         struct iwl_priv *priv = hw->priv;
2960
2961         IWL_DEBUG_MACDUMP(priv, "enter\n");
2962
2963         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2964                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2965
2966         if (iwlagn_tx_skb(priv, skb))
2967                 dev_kfree_skb_any(skb);
2968
2969         IWL_DEBUG_MACDUMP(priv, "leave\n");
2970 }
2971
2972 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2973                                        struct ieee80211_vif *vif,
2974                                        struct ieee80211_key_conf *keyconf,
2975                                        struct ieee80211_sta *sta,
2976                                        u32 iv32, u16 *phase1key)
2977 {
2978         struct iwl_priv *priv = hw->priv;
2979         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2980
2981         IWL_DEBUG_MAC80211(priv, "enter\n");
2982
2983         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2984                             iv32, phase1key);
2985
2986         IWL_DEBUG_MAC80211(priv, "leave\n");
2987 }
2988
2989 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2990                               struct ieee80211_vif *vif,
2991                               struct ieee80211_sta *sta,
2992                               struct ieee80211_key_conf *key)
2993 {
2994         struct iwl_priv *priv = hw->priv;
2995         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2996         struct iwl_rxon_context *ctx = vif_priv->ctx;
2997         int ret;
2998         u8 sta_id;
2999         bool is_default_wep_key = false;
3000
3001         IWL_DEBUG_MAC80211(priv, "enter\n");
3002
3003         if (priv->cfg->mod_params->sw_crypto) {
3004                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3005                 return -EOPNOTSUPP;
3006         }
3007
3008         /*
3009          * To support IBSS RSN, don't program group keys in IBSS, the
3010          * hardware will then not attempt to decrypt the frames.
3011          */
3012         if (vif->type == NL80211_IFTYPE_ADHOC &&
3013             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
3014                 return -EOPNOTSUPP;
3015
3016         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3017         if (sta_id == IWL_INVALID_STATION)
3018                 return -EINVAL;
3019
3020         mutex_lock(&priv->mutex);
3021         iwl_scan_cancel_timeout(priv, 100);
3022
3023         /*
3024          * If we are getting WEP group key and we didn't receive any key mapping
3025          * so far, we are in legacy wep mode (group key only), otherwise we are
3026          * in 1X mode.
3027          * In legacy wep mode, we use another host command to the uCode.
3028          */
3029         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3030              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3031             !sta) {
3032                 if (cmd == SET_KEY)
3033                         is_default_wep_key = !ctx->key_mapping_keys;
3034                 else
3035                         is_default_wep_key =
3036                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3037         }
3038
3039         switch (cmd) {
3040         case SET_KEY:
3041                 if (is_default_wep_key)
3042                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3043                 else
3044                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3045                                                   key, sta_id);
3046
3047                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3048                 break;
3049         case DISABLE_KEY:
3050                 if (is_default_wep_key)
3051                         ret = iwl_remove_default_wep_key(priv, ctx, key);
3052                 else
3053                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3054
3055                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3056                 break;
3057         default:
3058                 ret = -EINVAL;
3059         }
3060
3061         mutex_unlock(&priv->mutex);
3062         IWL_DEBUG_MAC80211(priv, "leave\n");
3063
3064         return ret;
3065 }
3066
3067 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3068                                    struct ieee80211_vif *vif,
3069                                    enum ieee80211_ampdu_mlme_action action,
3070                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
3071                                    u8 buf_size)
3072 {
3073         struct iwl_priv *priv = hw->priv;
3074         int ret = -EINVAL;
3075         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
3076
3077         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3078                      sta->addr, tid);
3079
3080         if (!(priv->cfg->sku & IWL_SKU_N))
3081                 return -EACCES;
3082
3083         mutex_lock(&priv->mutex);
3084
3085         switch (action) {
3086         case IEEE80211_AMPDU_RX_START:
3087                 IWL_DEBUG_HT(priv, "start Rx\n");
3088                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3089                 break;
3090         case IEEE80211_AMPDU_RX_STOP:
3091                 IWL_DEBUG_HT(priv, "stop Rx\n");
3092                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3093                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3094                         ret = 0;
3095                 break;
3096         case IEEE80211_AMPDU_TX_START:
3097                 IWL_DEBUG_HT(priv, "start Tx\n");
3098                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3099                 if (ret == 0) {
3100                         priv->_agn.agg_tids_count++;
3101                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3102                                      priv->_agn.agg_tids_count);
3103                 }
3104                 break;
3105         case IEEE80211_AMPDU_TX_STOP:
3106                 IWL_DEBUG_HT(priv, "stop Tx\n");
3107                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3108                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3109                         priv->_agn.agg_tids_count--;
3110                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3111                                      priv->_agn.agg_tids_count);
3112                 }
3113                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3114                         ret = 0;
3115                 if (priv->cfg->ht_params &&
3116                     priv->cfg->ht_params->use_rts_for_aggregation) {
3117                         struct iwl_station_priv *sta_priv =
3118                                 (void *) sta->drv_priv;
3119                         /*
3120                          * switch off RTS/CTS if it was previously enabled
3121                          */
3122
3123                         sta_priv->lq_sta.lq.general_params.flags &=
3124                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3125                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3126                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3127                 }
3128                 break;
3129         case IEEE80211_AMPDU_TX_OPERATIONAL:
3130                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
3131
3132                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
3133
3134                 /*
3135                  * If the limit is 0, then it wasn't initialised yet,
3136                  * use the default. We can do that since we take the
3137                  * minimum below, and we don't want to go above our
3138                  * default due to hardware restrictions.
3139                  */
3140                 if (sta_priv->max_agg_bufsize == 0)
3141                         sta_priv->max_agg_bufsize =
3142                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
3143
3144                 /*
3145                  * Even though in theory the peer could have different
3146                  * aggregation reorder buffer sizes for different sessions,
3147                  * our ucode doesn't allow for that and has a global limit
3148                  * for each station. Therefore, use the minimum of all the
3149                  * aggregation sessions and our default value.
3150                  */
3151                 sta_priv->max_agg_bufsize =
3152                         min(sta_priv->max_agg_bufsize, buf_size);
3153
3154                 if (priv->cfg->ht_params &&
3155                     priv->cfg->ht_params->use_rts_for_aggregation) {
3156                         /*
3157                          * switch to RTS/CTS if it is the prefer protection
3158                          * method for HT traffic
3159                          */
3160
3161                         sta_priv->lq_sta.lq.general_params.flags |=
3162                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3163                 }
3164
3165                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
3166                         sta_priv->max_agg_bufsize;
3167
3168                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3169                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3170                 ret = 0;
3171                 break;
3172         }
3173         mutex_unlock(&priv->mutex);
3174
3175         return ret;
3176 }
3177
3178 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3179                               struct ieee80211_vif *vif,
3180                               struct ieee80211_sta *sta)
3181 {
3182         struct iwl_priv *priv = hw->priv;
3183         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3184         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3185         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3186         int ret;
3187         u8 sta_id;
3188
3189         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3190                         sta->addr);
3191         mutex_lock(&priv->mutex);
3192         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3193                         sta->addr);
3194         sta_priv->common.sta_id = IWL_INVALID_STATION;
3195
3196         atomic_set(&sta_priv->pending_frames, 0);
3197         if (vif->type == NL80211_IFTYPE_AP)
3198                 sta_priv->client = true;
3199
3200         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3201                                      is_ap, sta, &sta_id);
3202         if (ret) {
3203                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3204                         sta->addr, ret);
3205                 /* Should we return success if return code is EEXIST ? */
3206                 mutex_unlock(&priv->mutex);
3207                 return ret;
3208         }
3209
3210         sta_priv->common.sta_id = sta_id;
3211
3212         /* Initialize rate scaling */
3213         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3214                        sta->addr);
3215         iwl_rs_rate_init(priv, sta, sta_id);
3216         mutex_unlock(&priv->mutex);
3217
3218         return 0;
3219 }
3220
3221 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3222                                 struct ieee80211_channel_switch *ch_switch)
3223 {
3224         struct iwl_priv *priv = hw->priv;
3225         const struct iwl_channel_info *ch_info;
3226         struct ieee80211_conf *conf = &hw->conf;
3227         struct ieee80211_channel *channel = ch_switch->channel;
3228         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3229         /*
3230          * MULTI-FIXME
3231          * When we add support for multiple interfaces, we need to
3232          * revisit this. The channel switch command in the device
3233          * only affects the BSS context, but what does that really
3234          * mean? And what if we get a CSA on the second interface?
3235          * This needs a lot of work.
3236          */
3237         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3238         u16 ch;
3239         unsigned long flags = 0;
3240
3241         IWL_DEBUG_MAC80211(priv, "enter\n");
3242
3243         mutex_lock(&priv->mutex);
3244
3245         if (iwl_is_rfkill(priv))
3246                 goto out;
3247
3248         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3249             test_bit(STATUS_SCANNING, &priv->status))
3250                 goto out;
3251
3252         if (!iwl_is_associated_ctx(ctx))
3253                 goto out;
3254
3255         /* channel switch in progress */
3256         if (priv->switch_rxon.switch_in_progress == true)
3257                 goto out;
3258
3259         if (priv->cfg->ops->lib->set_channel_switch) {
3260
3261                 ch = channel->hw_value;
3262                 if (le16_to_cpu(ctx->active.channel) != ch) {
3263                         ch_info = iwl_get_channel_info(priv,
3264                                                        channel->band,
3265                                                        ch);
3266                         if (!is_channel_valid(ch_info)) {
3267                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3268                                 goto out;
3269                         }
3270                         spin_lock_irqsave(&priv->lock, flags);
3271
3272                         priv->current_ht_config.smps = conf->smps_mode;
3273
3274                         /* Configure HT40 channels */
3275                         ctx->ht.enabled = conf_is_ht(conf);
3276                         if (ctx->ht.enabled) {
3277                                 if (conf_is_ht40_minus(conf)) {
3278                                         ctx->ht.extension_chan_offset =
3279                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3280                                         ctx->ht.is_40mhz = true;
3281                                 } else if (conf_is_ht40_plus(conf)) {
3282                                         ctx->ht.extension_chan_offset =
3283                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3284                                         ctx->ht.is_40mhz = true;
3285                                 } else {
3286                                         ctx->ht.extension_chan_offset =
3287                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3288                                         ctx->ht.is_40mhz = false;
3289                                 }
3290                         } else
3291                                 ctx->ht.is_40mhz = false;
3292
3293                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3294                                 ctx->staging.flags = 0;
3295
3296                         iwl_set_rxon_channel(priv, channel, ctx);
3297                         iwl_set_rxon_ht(priv, ht_conf);
3298                         iwl_set_flags_for_band(priv, ctx, channel->band,
3299                                                ctx->vif);
3300                         spin_unlock_irqrestore(&priv->lock, flags);
3301
3302                         iwl_set_rate(priv);
3303                         /*
3304                          * at this point, staging_rxon has the
3305                          * configuration for channel switch
3306                          */
3307                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3308                                                                     ch_switch))
3309                                 priv->switch_rxon.switch_in_progress = false;
3310                 }
3311         }
3312 out:
3313         mutex_unlock(&priv->mutex);
3314         if (!priv->switch_rxon.switch_in_progress)
3315                 ieee80211_chswitch_done(ctx->vif, false);
3316         IWL_DEBUG_MAC80211(priv, "leave\n");
3317 }
3318
3319 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3320                                     unsigned int changed_flags,
3321                                     unsigned int *total_flags,
3322                                     u64 multicast)
3323 {
3324         struct iwl_priv *priv = hw->priv;
3325         __le32 filter_or = 0, filter_nand = 0;
3326         struct iwl_rxon_context *ctx;
3327
3328 #define CHK(test, flag) do { \
3329         if (*total_flags & (test))              \
3330                 filter_or |= (flag);            \
3331         else                                    \
3332                 filter_nand |= (flag);          \
3333         } while (0)
3334
3335         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3336                         changed_flags, *total_flags);
3337
3338         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3339         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
3340         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
3341         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3342
3343 #undef CHK
3344
3345         mutex_lock(&priv->mutex);
3346
3347         for_each_context(priv, ctx) {
3348                 ctx->staging.filter_flags &= ~filter_nand;
3349                 ctx->staging.filter_flags |= filter_or;
3350
3351                 /*
3352                  * Not committing directly because hardware can perform a scan,
3353                  * but we'll eventually commit the filter flags change anyway.
3354                  */
3355         }
3356
3357         mutex_unlock(&priv->mutex);
3358
3359         /*
3360          * Receiving all multicast frames is always enabled by the
3361          * default flags setup in iwl_connection_init_rx_config()
3362          * since we currently do not support programming multicast
3363          * filters into the device.
3364          */
3365         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3366                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3367 }
3368
3369 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3370 {
3371         struct iwl_priv *priv = hw->priv;
3372
3373         mutex_lock(&priv->mutex);
3374         IWL_DEBUG_MAC80211(priv, "enter\n");
3375
3376         /* do not support "flush" */
3377         if (!priv->cfg->ops->lib->txfifo_flush)
3378                 goto done;
3379
3380         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3381                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3382                 goto done;
3383         }
3384         if (iwl_is_rfkill(priv)) {
3385                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3386                 goto done;
3387         }
3388
3389         /*
3390          * mac80211 will not push any more frames for transmit
3391          * until the flush is completed
3392          */
3393         if (drop) {
3394                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3395                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3396                         IWL_ERR(priv, "flush request fail\n");
3397                         goto done;
3398                 }
3399         }
3400         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3401         iwlagn_wait_tx_queue_empty(priv);
3402 done:
3403         mutex_unlock(&priv->mutex);
3404         IWL_DEBUG_MAC80211(priv, "leave\n");
3405 }
3406
3407 static void iwlagn_disable_roc(struct iwl_priv *priv)
3408 {
3409         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3410         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3411
3412         lockdep_assert_held(&priv->mutex);
3413
3414         if (!ctx->is_active)
3415                 return;
3416
3417         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3418         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3419         iwl_set_rxon_channel(priv, chan, ctx);
3420         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3421
3422         priv->_agn.hw_roc_channel = NULL;
3423
3424         iwlcore_commit_rxon(priv, ctx);
3425
3426         ctx->is_active = false;
3427 }
3428
3429 static void iwlagn_bg_roc_done(struct work_struct *work)
3430 {
3431         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3432                                              _agn.hw_roc_work.work);
3433
3434         mutex_lock(&priv->mutex);
3435         ieee80211_remain_on_channel_expired(priv->hw);
3436         iwlagn_disable_roc(priv);
3437         mutex_unlock(&priv->mutex);
3438 }
3439
3440 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3441                                      struct ieee80211_channel *channel,
3442                                      enum nl80211_channel_type channel_type,
3443                                      int duration)
3444 {
3445         struct iwl_priv *priv = hw->priv;
3446         int err = 0;
3447
3448         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3449                 return -EOPNOTSUPP;
3450
3451         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3452                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3453                 return -EOPNOTSUPP;
3454
3455         mutex_lock(&priv->mutex);
3456
3457         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3458             test_bit(STATUS_SCAN_HW, &priv->status)) {
3459                 err = -EBUSY;
3460                 goto out;
3461         }
3462
3463         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3464         priv->_agn.hw_roc_channel = channel;
3465         priv->_agn.hw_roc_chantype = channel_type;
3466         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3467         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3468         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3469                            msecs_to_jiffies(duration + 20));
3470
3471         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3472         ieee80211_ready_on_channel(priv->hw);
3473
3474  out:
3475         mutex_unlock(&priv->mutex);
3476
3477         return err;
3478 }
3479
3480 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3481 {
3482         struct iwl_priv *priv = hw->priv;
3483
3484         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3485                 return -EOPNOTSUPP;
3486
3487         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3488
3489         mutex_lock(&priv->mutex);
3490         iwlagn_disable_roc(priv);
3491         mutex_unlock(&priv->mutex);
3492
3493         return 0;
3494 }
3495
3496 /*****************************************************************************
3497  *
3498  * driver setup and teardown
3499  *
3500  *****************************************************************************/
3501
3502 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3503 {
3504         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3505
3506         init_waitqueue_head(&priv->wait_command_queue);
3507
3508         INIT_WORK(&priv->restart, iwl_bg_restart);
3509         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3510         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3511         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3512         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3513         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3514         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3515         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3516         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3517         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3518
3519         iwl_setup_scan_deferred_work(priv);
3520
3521         if (priv->cfg->ops->lib->setup_deferred_work)
3522                 priv->cfg->ops->lib->setup_deferred_work(priv);
3523
3524         init_timer(&priv->statistics_periodic);
3525         priv->statistics_periodic.data = (unsigned long)priv;
3526         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3527
3528         init_timer(&priv->ucode_trace);
3529         priv->ucode_trace.data = (unsigned long)priv;
3530         priv->ucode_trace.function = iwl_bg_ucode_trace;
3531
3532         init_timer(&priv->watchdog);
3533         priv->watchdog.data = (unsigned long)priv;
3534         priv->watchdog.function = iwl_bg_watchdog;
3535
3536         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3537                 iwl_irq_tasklet, (unsigned long)priv);
3538 }
3539
3540 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3541 {
3542         if (priv->cfg->ops->lib->cancel_deferred_work)
3543                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3544
3545         cancel_delayed_work_sync(&priv->init_alive_start);
3546         cancel_delayed_work(&priv->alive_start);
3547         cancel_work_sync(&priv->run_time_calib_work);
3548         cancel_work_sync(&priv->beacon_update);
3549
3550         iwl_cancel_scan_deferred_work(priv);
3551
3552         cancel_work_sync(&priv->bt_full_concurrency);
3553         cancel_work_sync(&priv->bt_runtime_config);
3554
3555         del_timer_sync(&priv->statistics_periodic);
3556         del_timer_sync(&priv->ucode_trace);
3557 }
3558
3559 static void iwl_init_hw_rates(struct iwl_priv *priv,
3560                               struct ieee80211_rate *rates)
3561 {
3562         int i;
3563
3564         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3565                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3566                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3567                 rates[i].hw_value_short = i;
3568                 rates[i].flags = 0;
3569                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3570                         /*
3571                          * If CCK != 1M then set short preamble rate flag.
3572                          */
3573                         rates[i].flags |=
3574                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3575                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3576                 }
3577         }
3578 }
3579
3580 static int iwl_init_drv(struct iwl_priv *priv)
3581 {
3582         int ret;
3583
3584         spin_lock_init(&priv->sta_lock);
3585         spin_lock_init(&priv->hcmd_lock);
3586
3587         INIT_LIST_HEAD(&priv->free_frames);
3588
3589         mutex_init(&priv->mutex);
3590
3591         priv->ieee_channels = NULL;
3592         priv->ieee_rates = NULL;
3593         priv->band = IEEE80211_BAND_2GHZ;
3594
3595         priv->iw_mode = NL80211_IFTYPE_STATION;
3596         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3597         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3598         priv->_agn.agg_tids_count = 0;
3599
3600         /* initialize force reset */
3601         priv->force_reset[IWL_RF_RESET].reset_duration =
3602                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3603         priv->force_reset[IWL_FW_RESET].reset_duration =
3604                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3605
3606         priv->rx_statistics_jiffies = jiffies;
3607
3608         /* Choose which receivers/antennas to use */
3609         if (priv->cfg->ops->hcmd->set_rxon_chain)
3610                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3611                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3612
3613         iwl_init_scan_params(priv);
3614
3615         /* init bt coex */
3616         if (priv->cfg->bt_params &&
3617             priv->cfg->bt_params->advanced_bt_coexist) {
3618                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3619                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3620                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3621                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3622                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3623                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3624         }
3625
3626         /* Set the tx_power_user_lmt to the lowest power level
3627          * this value will get overwritten by channel max power avg
3628          * from eeprom */
3629         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3630         priv->tx_power_next = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3631
3632         ret = iwl_init_channel_map(priv);
3633         if (ret) {
3634                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3635                 goto err;
3636         }
3637
3638         ret = iwlcore_init_geos(priv);
3639         if (ret) {
3640                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3641                 goto err_free_channel_map;
3642         }
3643         iwl_init_hw_rates(priv, priv->ieee_rates);
3644
3645         return 0;
3646
3647 err_free_channel_map:
3648         iwl_free_channel_map(priv);
3649 err:
3650         return ret;
3651 }
3652
3653 static void iwl_uninit_drv(struct iwl_priv *priv)
3654 {
3655         iwl_calib_free_results(priv);
3656         iwlcore_free_geos(priv);
3657         iwl_free_channel_map(priv);
3658         kfree(priv->scan_cmd);
3659 }
3660
3661 struct ieee80211_ops iwlagn_hw_ops = {
3662         .tx = iwlagn_mac_tx,
3663         .start = iwlagn_mac_start,
3664         .stop = iwlagn_mac_stop,
3665         .add_interface = iwl_mac_add_interface,
3666         .remove_interface = iwl_mac_remove_interface,
3667         .change_interface = iwl_mac_change_interface,
3668         .config = iwlagn_mac_config,
3669         .configure_filter = iwlagn_configure_filter,
3670         .set_key = iwlagn_mac_set_key,
3671         .update_tkip_key = iwlagn_mac_update_tkip_key,
3672         .conf_tx = iwl_mac_conf_tx,
3673         .bss_info_changed = iwlagn_bss_info_changed,
3674         .ampdu_action = iwlagn_mac_ampdu_action,
3675         .hw_scan = iwl_mac_hw_scan,
3676         .sta_notify = iwlagn_mac_sta_notify,
3677         .sta_add = iwlagn_mac_sta_add,
3678         .sta_remove = iwl_mac_sta_remove,
3679         .channel_switch = iwlagn_mac_channel_switch,
3680         .flush = iwlagn_mac_flush,
3681         .tx_last_beacon = iwl_mac_tx_last_beacon,
3682         .remain_on_channel = iwl_mac_remain_on_channel,
3683         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3684         .offchannel_tx = iwl_mac_offchannel_tx,
3685         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3686 };
3687
3688 static void iwl_hw_detect(struct iwl_priv *priv)
3689 {
3690         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3691         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3692         priv->rev_id = priv->pci_dev->revision;
3693         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3694 }
3695
3696 static int iwl_set_hw_params(struct iwl_priv *priv)
3697 {
3698         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3699         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3700         if (priv->cfg->mod_params->amsdu_size_8K)
3701                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3702         else
3703                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3704
3705         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3706
3707         if (priv->cfg->mod_params->disable_11n)
3708                 priv->cfg->sku &= ~IWL_SKU_N;
3709
3710         /* Device-specific setup */
3711         return priv->cfg->ops->lib->set_hw_params(priv);
3712 }
3713
3714 static const u8 iwlagn_bss_ac_to_fifo[] = {
3715         IWL_TX_FIFO_VO,
3716         IWL_TX_FIFO_VI,
3717         IWL_TX_FIFO_BE,
3718         IWL_TX_FIFO_BK,
3719 };
3720
3721 static const u8 iwlagn_bss_ac_to_queue[] = {
3722         0, 1, 2, 3,
3723 };
3724
3725 static const u8 iwlagn_pan_ac_to_fifo[] = {
3726         IWL_TX_FIFO_VO_IPAN,
3727         IWL_TX_FIFO_VI_IPAN,
3728         IWL_TX_FIFO_BE_IPAN,
3729         IWL_TX_FIFO_BK_IPAN,
3730 };
3731
3732 static const u8 iwlagn_pan_ac_to_queue[] = {
3733         7, 6, 5, 4,
3734 };
3735
3736 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3737 {
3738         int err = 0, i;
3739         struct iwl_priv *priv;
3740         struct ieee80211_hw *hw;
3741         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3742         unsigned long flags;
3743         u16 pci_cmd, num_mac;
3744
3745         /************************
3746          * 1. Allocating HW data
3747          ************************/
3748
3749         hw = iwl_alloc_all(cfg);
3750         if (!hw) {
3751                 err = -ENOMEM;
3752                 goto out;
3753         }
3754         priv = hw->priv;
3755         /* At this point both hw and priv are allocated. */
3756
3757         /*
3758          * The default context is always valid,
3759          * more may be discovered when firmware
3760          * is loaded.
3761          */
3762         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3763
3764         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3765                 priv->contexts[i].ctxid = i;
3766
3767         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3768         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3769         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3770         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3771         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3772         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3773         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3774         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3775         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3776         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3777         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3778                 BIT(NL80211_IFTYPE_ADHOC);
3779         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3780                 BIT(NL80211_IFTYPE_STATION);
3781         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3782         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3783         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3784         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3785
3786         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3787         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3788         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3789         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3790         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3791         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3792         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3793         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3794         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3795         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3796         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3797         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3798                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3799 #ifdef CONFIG_IWL_P2P
3800         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3801                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3802 #endif
3803         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3804         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3805         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3806
3807         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3808
3809         SET_IEEE80211_DEV(hw, &pdev->dev);
3810
3811         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3812         priv->cfg = cfg;
3813         priv->pci_dev = pdev;
3814         priv->inta_mask = CSR_INI_SET_MASK;
3815
3816         /* is antenna coupling more than 35dB ? */
3817         priv->bt_ant_couple_ok =
3818                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3819                 true : false;
3820
3821         /* enable/disable bt channel inhibition */
3822         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3823         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3824                        (priv->bt_ch_announce) ? "On" : "Off");
3825
3826         if (iwl_alloc_traffic_mem(priv))
3827                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3828
3829         /**************************
3830          * 2. Initializing PCI bus
3831          **************************/
3832         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3833                                 PCIE_LINK_STATE_CLKPM);
3834
3835         if (pci_enable_device(pdev)) {
3836                 err = -ENODEV;
3837                 goto out_ieee80211_free_hw;
3838         }
3839
3840         pci_set_master(pdev);
3841
3842         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3843         if (!err)
3844                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3845         if (err) {
3846                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3847                 if (!err)
3848                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3849                 /* both attempts failed: */
3850                 if (err) {
3851                         IWL_WARN(priv, "No suitable DMA available.\n");
3852                         goto out_pci_disable_device;
3853                 }
3854         }
3855
3856         err = pci_request_regions(pdev, DRV_NAME);
3857         if (err)
3858                 goto out_pci_disable_device;
3859
3860         pci_set_drvdata(pdev, priv);
3861
3862
3863         /***********************
3864          * 3. Read REV register
3865          ***********************/
3866         priv->hw_base = pci_iomap(pdev, 0, 0);
3867         if (!priv->hw_base) {
3868                 err = -ENODEV;
3869                 goto out_pci_release_regions;
3870         }
3871
3872         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3873                 (unsigned long long) pci_resource_len(pdev, 0));
3874         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3875
3876         /* these spin locks will be used in apm_ops.init and EEPROM access
3877          * we should init now
3878          */
3879         spin_lock_init(&priv->reg_lock);
3880         spin_lock_init(&priv->lock);
3881
3882         /*
3883          * stop and reset the on-board processor just in case it is in a
3884          * strange state ... like being left stranded by a primary kernel
3885          * and this is now the kdump kernel trying to start up
3886          */
3887         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3888
3889         iwl_hw_detect(priv);
3890         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3891                 priv->cfg->name, priv->hw_rev);
3892
3893         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3894          * PCI Tx retries from interfering with C3 CPU state */
3895         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3896
3897         iwl_prepare_card_hw(priv);
3898         if (!priv->hw_ready) {
3899                 IWL_WARN(priv, "Failed, HW not ready\n");
3900                 goto out_iounmap;
3901         }
3902
3903         /*****************
3904          * 4. Read EEPROM
3905          *****************/
3906         /* Read the EEPROM */
3907         err = iwl_eeprom_init(priv);
3908         if (err) {
3909                 IWL_ERR(priv, "Unable to init EEPROM\n");
3910                 goto out_iounmap;
3911         }
3912         err = iwl_eeprom_check_version(priv);
3913         if (err)
3914                 goto out_free_eeprom;
3915
3916         err = iwl_eeprom_check_sku(priv);
3917         if (err)
3918                 goto out_free_eeprom;
3919
3920         /* extract MAC Address */
3921         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3922         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3923         priv->hw->wiphy->addresses = priv->addresses;
3924         priv->hw->wiphy->n_addresses = 1;
3925         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3926         if (num_mac > 1) {
3927                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3928                        ETH_ALEN);
3929                 priv->addresses[1].addr[5]++;
3930                 priv->hw->wiphy->n_addresses++;
3931         }
3932
3933         /************************
3934          * 5. Setup HW constants
3935          ************************/
3936         if (iwl_set_hw_params(priv)) {
3937                 IWL_ERR(priv, "failed to set hw parameters\n");
3938                 goto out_free_eeprom;
3939         }
3940
3941         /*******************
3942          * 6. Setup priv
3943          *******************/
3944
3945         err = iwl_init_drv(priv);
3946         if (err)
3947                 goto out_free_eeprom;
3948         /* At this point both hw and priv are initialized. */
3949
3950         /********************
3951          * 7. Setup services
3952          ********************/
3953         spin_lock_irqsave(&priv->lock, flags);
3954         iwl_disable_interrupts(priv);
3955         spin_unlock_irqrestore(&priv->lock, flags);
3956
3957         pci_enable_msi(priv->pci_dev);
3958
3959         if (priv->cfg->ops->lib->isr_ops.alloc)
3960                 priv->cfg->ops->lib->isr_ops.alloc(priv);
3961
3962         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr_ops.isr,
3963                           IRQF_SHARED, DRV_NAME, priv);
3964         if (err) {
3965                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3966                 goto out_disable_msi;
3967         }
3968
3969         iwl_setup_deferred_work(priv);
3970         iwl_setup_rx_handlers(priv);
3971
3972         /*********************************************
3973          * 8. Enable interrupts and read RFKILL state
3974          *********************************************/
3975
3976         /* enable rfkill interrupt: hw bug w/a */
3977         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3978         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3979                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3980                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3981         }
3982
3983         iwl_enable_rfkill_int(priv);
3984
3985         /* If platform's RF_KILL switch is NOT set to KILL */
3986         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3987                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3988         else
3989                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3990
3991         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3992                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3993
3994         iwl_power_initialize(priv);
3995         iwl_tt_initialize(priv);
3996
3997         init_completion(&priv->_agn.firmware_loading_complete);
3998
3999         err = iwl_request_firmware(priv, true);
4000         if (err)
4001                 goto out_destroy_workqueue;
4002
4003         return 0;
4004
4005  out_destroy_workqueue:
4006         destroy_workqueue(priv->workqueue);
4007         priv->workqueue = NULL;
4008         free_irq(priv->pci_dev->irq, priv);
4009         if (priv->cfg->ops->lib->isr_ops.free)
4010                 priv->cfg->ops->lib->isr_ops.free(priv);
4011  out_disable_msi:
4012         pci_disable_msi(priv->pci_dev);
4013         iwl_uninit_drv(priv);
4014  out_free_eeprom:
4015         iwl_eeprom_free(priv);
4016  out_iounmap:
4017         pci_iounmap(pdev, priv->hw_base);
4018  out_pci_release_regions:
4019         pci_set_drvdata(pdev, NULL);
4020         pci_release_regions(pdev);
4021  out_pci_disable_device:
4022         pci_disable_device(pdev);
4023  out_ieee80211_free_hw:
4024         iwl_free_traffic_mem(priv);
4025         ieee80211_free_hw(priv->hw);
4026  out:
4027         return err;
4028 }
4029
4030 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4031 {
4032         struct iwl_priv *priv = pci_get_drvdata(pdev);
4033         unsigned long flags;
4034
4035         if (!priv)
4036                 return;
4037
4038         wait_for_completion(&priv->_agn.firmware_loading_complete);
4039
4040         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4041
4042         iwl_dbgfs_unregister(priv);
4043         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4044
4045         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4046          * to be called and iwl_down since we are removing the device
4047          * we need to set STATUS_EXIT_PENDING bit.
4048          */
4049         set_bit(STATUS_EXIT_PENDING, &priv->status);
4050
4051         iwl_leds_exit(priv);
4052
4053         if (priv->mac80211_registered) {
4054                 ieee80211_unregister_hw(priv->hw);
4055                 priv->mac80211_registered = 0;
4056         } else {
4057                 iwl_down(priv);
4058         }
4059
4060         /*
4061          * Make sure device is reset to low power before unloading driver.
4062          * This may be redundant with iwl_down(), but there are paths to
4063          * run iwl_down() without calling apm_ops.stop(), and there are
4064          * paths to avoid running iwl_down() at all before leaving driver.
4065          * This (inexpensive) call *makes sure* device is reset.
4066          */
4067         iwl_apm_stop(priv);
4068
4069         iwl_tt_exit(priv);
4070
4071         /* make sure we flush any pending irq or
4072          * tasklet for the driver
4073          */
4074         spin_lock_irqsave(&priv->lock, flags);
4075         iwl_disable_interrupts(priv);
4076         spin_unlock_irqrestore(&priv->lock, flags);
4077
4078         iwl_synchronize_irq(priv);
4079
4080         iwl_dealloc_ucode_pci(priv);
4081
4082         if (priv->rxq.bd)
4083                 iwlagn_rx_queue_free(priv, &priv->rxq);
4084         iwlagn_hw_txq_ctx_free(priv);
4085
4086         iwl_eeprom_free(priv);
4087
4088
4089         /*netif_stop_queue(dev); */
4090         flush_workqueue(priv->workqueue);
4091
4092         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4093          * priv->workqueue... so we can't take down the workqueue
4094          * until now... */
4095         destroy_workqueue(priv->workqueue);
4096         priv->workqueue = NULL;
4097         iwl_free_traffic_mem(priv);
4098
4099         free_irq(priv->pci_dev->irq, priv);
4100         pci_disable_msi(priv->pci_dev);
4101         pci_iounmap(pdev, priv->hw_base);
4102         pci_release_regions(pdev);
4103         pci_disable_device(pdev);
4104         pci_set_drvdata(pdev, NULL);
4105
4106         iwl_uninit_drv(priv);
4107
4108         if (priv->cfg->ops->lib->isr_ops.free)
4109                 priv->cfg->ops->lib->isr_ops.free(priv);
4110
4111         dev_kfree_skb(priv->beacon_skb);
4112
4113         ieee80211_free_hw(priv->hw);
4114 }
4115
4116
4117 /*****************************************************************************
4118  *
4119  * driver and module entry point
4120  *
4121  *****************************************************************************/
4122
4123 /* Hardware specific file defines the PCI IDs table for that hardware module */
4124 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4125         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4126         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4127         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4128         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4129         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4130         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4131         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4132         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4133         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4134         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4135         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4136         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4137         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4138         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4139         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4140         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4141         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4142         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4143         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4144         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4145         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4146         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4147         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4148         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4149
4150 /* 5300 Series WiFi */
4151         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4152         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4153         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4154         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4155         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4156         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4157         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4158         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4159         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4160         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4161         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4162         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4163
4164 /* 5350 Series WiFi/WiMax */
4165         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4166         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4167         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4168
4169 /* 5150 Series Wifi/WiMax */
4170         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4171         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4172         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4173         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4174         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4175         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4176
4177         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4178         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4179         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4180         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4181
4182 /* 6x00 Series */
4183         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4184         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4185         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4186         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4187         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4188         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4189         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4190         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4191         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4192         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4193
4194 /* 6x05 Series */
4195         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
4196         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
4197         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
4198         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
4199         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
4200         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
4201         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
4202
4203 /* 6x30 Series */
4204         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
4205         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
4206         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
4207         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
4208         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
4209         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
4210         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
4211         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
4212         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
4213         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
4214         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
4215         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
4216         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
4217         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
4218         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
4219         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
4220
4221 /* 6x50 WiFi/WiMax Series */
4222         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4223         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4224         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4225         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4226         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4227         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4228
4229 /* 6150 WiFi/WiMax Series */
4230         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
4231         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg)},
4232         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
4233         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg)},
4234         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
4235         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg)},
4236
4237 /* 1000 Series WiFi */
4238         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4239         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4240         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4241         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4242         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4243         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4244         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4245         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4246         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4247         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4248         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4249         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4250
4251 /* 100 Series WiFi */
4252         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
4253         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
4254         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
4255         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
4256         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
4257         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
4258
4259 /* 130 Series WiFi */
4260         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
4261         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
4262         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
4263         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
4264         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
4265         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
4266
4267 /* 2x00 Series */
4268         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
4269         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
4270         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
4271         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
4272         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
4273         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
4274
4275 /* 2x30 Series */
4276         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
4277         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
4278         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
4279         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
4280         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
4281         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
4282
4283 /* 6x35 Series */
4284         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
4285         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
4286         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
4287         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
4288         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
4289         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
4290         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
4291         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
4292         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
4293
4294 /* 200 Series */
4295         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl200_bgn_cfg)},
4296         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl200_bgn_cfg)},
4297         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl200_bgn_cfg)},
4298         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl200_bg_cfg)},
4299         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl200_bg_cfg)},
4300         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl200_bg_cfg)},
4301
4302 /* 230 Series */
4303         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl230_bgn_cfg)},
4304         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl230_bgn_cfg)},
4305         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl230_bgn_cfg)},
4306         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl230_bg_cfg)},
4307         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl230_bg_cfg)},
4308         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl230_bg_cfg)},
4309
4310         {0}
4311 };
4312 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4313
4314 static struct pci_driver iwl_driver = {
4315         .name = DRV_NAME,
4316         .id_table = iwl_hw_card_ids,
4317         .probe = iwl_pci_probe,
4318         .remove = __devexit_p(iwl_pci_remove),
4319         .driver.pm = IWL_PM_OPS,
4320 };
4321
4322 static int __init iwl_init(void)
4323 {
4324
4325         int ret;
4326         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4327         pr_info(DRV_COPYRIGHT "\n");
4328
4329         ret = iwlagn_rate_control_register();
4330         if (ret) {
4331                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4332                 return ret;
4333         }
4334
4335         ret = pci_register_driver(&iwl_driver);
4336         if (ret) {
4337                 pr_err("Unable to initialize PCI module\n");
4338                 goto error_register;
4339         }
4340
4341         return ret;
4342
4343 error_register:
4344         iwlagn_rate_control_unregister();
4345         return ret;
4346 }
4347
4348 static void __exit iwl_exit(void)
4349 {
4350         pci_unregister_driver(&iwl_driver);
4351         iwlagn_rate_control_unregister();
4352 }
4353
4354 module_exit(iwl_exit);
4355 module_init(iwl_init);
4356
4357 #ifdef CONFIG_IWLWIFI_DEBUG
4358 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4359 MODULE_PARM_DESC(debug, "debug output mask");
4360 #endif
4361
4362 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4363 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4364 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4365 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4366 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4367 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4368 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4369                    int, S_IRUGO);
4370 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4371 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4372 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4373
4374 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4375                    S_IRUGO);
4376 MODULE_PARM_DESC(ucode_alternative,
4377                  "specify ucode alternative to use from ucode file");
4378
4379 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4380 MODULE_PARM_DESC(antenna_coupling,
4381                  "specify antenna coupling in dB (defualt: 0 dB)");
4382
4383 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
4384 MODULE_PARM_DESC(bt_ch_inhibition,
4385                  "Disable BT channel inhibition (default: enable)");
4386
4387 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
4388 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
4389
4390 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
4391 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");