iwlwifi: prepare for PAN queue/fifo assignment
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-calib.h"
61 #include "iwl-agn.h"
62
63
64 /******************************************************************************
65  *
66  * module boiler plate
67  *
68  ******************************************************************************/
69
70 /*
71  * module name, copyright, version, etc.
72  */
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
74
75 #ifdef CONFIG_IWLWIFI_DEBUG
76 #define VD "d"
77 #else
78 #define VD
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 static int iwlagn_ant_coupling;
91 static bool iwlagn_bt_ch_announce = 1;
92
93 /**
94  * iwl_commit_rxon - commit staging_rxon to hardware
95  *
96  * The RXON command in staging_rxon is committed to the hardware and
97  * the active_rxon structure is updated with the new data.  This
98  * function correctly transitions out of the RXON_ASSOC_MSK state if
99  * a HW tune is required based on the RXON structure changes.
100  */
101 int iwl_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
102 {
103         /* cast away the const for active_rxon in this function */
104         struct iwl_rxon_cmd *active_rxon = (void *)&ctx->active;
105         int ret;
106         bool new_assoc =
107                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
108
109         if (!iwl_is_alive(priv))
110                 return -EBUSY;
111
112         /* always get timestamp with Rx frame */
113         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
114
115         ret = iwl_check_rxon_cmd(priv, ctx);
116         if (ret) {
117                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
118                 return -EINVAL;
119         }
120
121         /*
122          * receive commit_rxon request
123          * abort any previous channel switch if still in process
124          */
125         if (priv->switch_rxon.switch_in_progress &&
126             (priv->switch_rxon.channel != ctx->staging.channel)) {
127                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
128                       le16_to_cpu(priv->switch_rxon.channel));
129                 iwl_chswitch_done(priv, false);
130         }
131
132         /* If we don't need to send a full RXON, we can use
133          * iwl_rxon_assoc_cmd which is used to reconfigure filter
134          * and other flags for the current radio configuration. */
135         if (!iwl_full_rxon_required(priv, ctx)) {
136                 ret = iwl_send_rxon_assoc(priv, ctx);
137                 if (ret) {
138                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
139                         return ret;
140                 }
141
142                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
143                 iwl_print_rx_config_cmd(priv, ctx);
144                 return 0;
145         }
146
147         /* If we are currently associated and the new config requires
148          * an RXON_ASSOC and the new config wants the associated mask enabled,
149          * we must clear the associated from the active configuration
150          * before we apply the new config */
151         if (iwl_is_associated_ctx(ctx) && new_assoc) {
152                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
153                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
154
155                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
156                                        sizeof(struct iwl_rxon_cmd),
157                                        active_rxon);
158
159                 /* If the mask clearing failed then we set
160                  * active_rxon back to what it was previously */
161                 if (ret) {
162                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
163                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
164                         return ret;
165                 }
166                 iwl_clear_ucode_stations(priv);
167                 iwl_restore_stations(priv);
168                 ret = iwl_restore_default_wep_keys(priv);
169                 if (ret) {
170                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
171                         return ret;
172                 }
173         }
174
175         IWL_DEBUG_INFO(priv, "Sending RXON\n"
176                        "* with%s RXON_FILTER_ASSOC_MSK\n"
177                        "* channel = %d\n"
178                        "* bssid = %pM\n",
179                        (new_assoc ? "" : "out"),
180                        le16_to_cpu(ctx->staging.channel),
181                        ctx->staging.bssid_addr);
182
183         iwl_set_rxon_hwcrypto(priv, ctx, !priv->cfg->mod_params->sw_crypto);
184
185         /* Apply the new configuration
186          * RXON unassoc clears the station table in uCode so restoration of
187          * stations is needed after it (the RXON command) completes
188          */
189         if (!new_assoc) {
190                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
191                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
192                 if (ret) {
193                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
194                         return ret;
195                 }
196                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
197                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
198                 iwl_clear_ucode_stations(priv);
199                 iwl_restore_stations(priv);
200                 ret = iwl_restore_default_wep_keys(priv);
201                 if (ret) {
202                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
203                         return ret;
204                 }
205         }
206
207         priv->start_calib = 0;
208         if (new_assoc) {
209                 /* Apply the new configuration
210                  * RXON assoc doesn't clear the station table in uCode,
211                  */
212                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
213                               sizeof(struct iwl_rxon_cmd), &ctx->staging);
214                 if (ret) {
215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
216                         return ret;
217                 }
218                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
219         }
220         iwl_print_rx_config_cmd(priv, ctx);
221
222         iwl_init_sensitivity(priv);
223
224         /* If we issue a new RXON command which required a tune then we must
225          * send a new TXPOWER command or we won't be able to Tx any frames */
226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
227         if (ret) {
228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
229                 return ret;
230         }
231
232         return 0;
233 }
234
235 void iwl_update_chain_flags(struct iwl_priv *priv)
236 {
237         struct iwl_rxon_context *ctx;
238
239         if (priv->cfg->ops->hcmd->set_rxon_chain) {
240                 for_each_context(priv, ctx) {
241                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
242                         iwlcore_commit_rxon(priv, ctx);
243                 }
244         }
245 }
246
247 static void iwl_clear_free_frames(struct iwl_priv *priv)
248 {
249         struct list_head *element;
250
251         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
252                        priv->frames_count);
253
254         while (!list_empty(&priv->free_frames)) {
255                 element = priv->free_frames.next;
256                 list_del(element);
257                 kfree(list_entry(element, struct iwl_frame, list));
258                 priv->frames_count--;
259         }
260
261         if (priv->frames_count) {
262                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
263                             priv->frames_count);
264                 priv->frames_count = 0;
265         }
266 }
267
268 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
269 {
270         struct iwl_frame *frame;
271         struct list_head *element;
272         if (list_empty(&priv->free_frames)) {
273                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
274                 if (!frame) {
275                         IWL_ERR(priv, "Could not allocate frame!\n");
276                         return NULL;
277                 }
278
279                 priv->frames_count++;
280                 return frame;
281         }
282
283         element = priv->free_frames.next;
284         list_del(element);
285         return list_entry(element, struct iwl_frame, list);
286 }
287
288 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
289 {
290         memset(frame, 0, sizeof(*frame));
291         list_add(&frame->list, &priv->free_frames);
292 }
293
294 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
295                                           struct ieee80211_hdr *hdr,
296                                           int left)
297 {
298         if (!priv->ibss_beacon)
299                 return 0;
300
301         if (priv->ibss_beacon->len > left)
302                 return 0;
303
304         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
305
306         return priv->ibss_beacon->len;
307 }
308
309 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
310 static void iwl_set_beacon_tim(struct iwl_priv *priv,
311                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
312                 u8 *beacon, u32 frame_size)
313 {
314         u16 tim_idx;
315         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
316
317         /*
318          * The index is relative to frame start but we start looking at the
319          * variable-length part of the beacon.
320          */
321         tim_idx = mgmt->u.beacon.variable - beacon;
322
323         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
324         while ((tim_idx < (frame_size - 2)) &&
325                         (beacon[tim_idx] != WLAN_EID_TIM))
326                 tim_idx += beacon[tim_idx+1] + 2;
327
328         /* If TIM field was found, set variables */
329         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
330                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
331                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
332         } else
333                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
334 }
335
336 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
337                                        struct iwl_frame *frame)
338 {
339         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
340         u32 frame_size;
341         u32 rate_flags;
342         u32 rate;
343         /*
344          * We have to set up the TX command, the TX Beacon command, and the
345          * beacon contents.
346          */
347
348         /* Initialize memory */
349         tx_beacon_cmd = &frame->u.beacon;
350         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
351
352         /* Set up TX beacon contents */
353         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
354                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
355         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
356                 return 0;
357
358         /* Set up TX command fields */
359         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
360         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
361         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
362         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
363                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
364
365         /* Set up TX beacon command fields */
366         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
367                         frame_size);
368
369         /* Set up packet rate and flags */
370         rate = iwl_rate_get_lowest_plcp(priv);
371         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
372                                               priv->hw_params.valid_tx_ant);
373         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
374         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
375                 rate_flags |= RATE_MCS_CCK_MSK;
376         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
377                         rate_flags);
378
379         return sizeof(*tx_beacon_cmd) + frame_size;
380 }
381 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
382 {
383         struct iwl_frame *frame;
384         unsigned int frame_size;
385         int rc;
386
387         frame = iwl_get_free_frame(priv);
388         if (!frame) {
389                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
390                           "command.\n");
391                 return -ENOMEM;
392         }
393
394         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
395         if (!frame_size) {
396                 IWL_ERR(priv, "Error configuring the beacon command\n");
397                 iwl_free_frame(priv, frame);
398                 return -EINVAL;
399         }
400
401         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
402                               &frame->u.cmd[0]);
403
404         iwl_free_frame(priv, frame);
405
406         return rc;
407 }
408
409 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
410 {
411         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
412
413         dma_addr_t addr = get_unaligned_le32(&tb->lo);
414         if (sizeof(dma_addr_t) > sizeof(u32))
415                 addr |=
416                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
417
418         return addr;
419 }
420
421 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
422 {
423         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
424
425         return le16_to_cpu(tb->hi_n_len) >> 4;
426 }
427
428 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
429                                   dma_addr_t addr, u16 len)
430 {
431         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
432         u16 hi_n_len = len << 4;
433
434         put_unaligned_le32(addr, &tb->lo);
435         if (sizeof(dma_addr_t) > sizeof(u32))
436                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
437
438         tb->hi_n_len = cpu_to_le16(hi_n_len);
439
440         tfd->num_tbs = idx + 1;
441 }
442
443 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
444 {
445         return tfd->num_tbs & 0x1f;
446 }
447
448 /**
449  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
450  * @priv - driver private data
451  * @txq - tx queue
452  *
453  * Does NOT advance any TFD circular buffer read/write indexes
454  * Does NOT free the TFD itself (which is within circular buffer)
455  */
456 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
457 {
458         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
459         struct iwl_tfd *tfd;
460         struct pci_dev *dev = priv->pci_dev;
461         int index = txq->q.read_ptr;
462         int i;
463         int num_tbs;
464
465         tfd = &tfd_tmp[index];
466
467         /* Sanity check on number of chunks */
468         num_tbs = iwl_tfd_get_num_tbs(tfd);
469
470         if (num_tbs >= IWL_NUM_OF_TBS) {
471                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
472                 /* @todo issue fatal error, it is quite serious situation */
473                 return;
474         }
475
476         /* Unmap tx_cmd */
477         if (num_tbs)
478                 pci_unmap_single(dev,
479                                 dma_unmap_addr(&txq->meta[index], mapping),
480                                 dma_unmap_len(&txq->meta[index], len),
481                                 PCI_DMA_BIDIRECTIONAL);
482
483         /* Unmap chunks, if any. */
484         for (i = 1; i < num_tbs; i++)
485                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
486                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
487
488         /* free SKB */
489         if (txq->txb) {
490                 struct sk_buff *skb;
491
492                 skb = txq->txb[txq->q.read_ptr].skb;
493
494                 /* can be called from irqs-disabled context */
495                 if (skb) {
496                         dev_kfree_skb_any(skb);
497                         txq->txb[txq->q.read_ptr].skb = NULL;
498                 }
499         }
500 }
501
502 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
503                                  struct iwl_tx_queue *txq,
504                                  dma_addr_t addr, u16 len,
505                                  u8 reset, u8 pad)
506 {
507         struct iwl_queue *q;
508         struct iwl_tfd *tfd, *tfd_tmp;
509         u32 num_tbs;
510
511         q = &txq->q;
512         tfd_tmp = (struct iwl_tfd *)txq->tfds;
513         tfd = &tfd_tmp[q->write_ptr];
514
515         if (reset)
516                 memset(tfd, 0, sizeof(*tfd));
517
518         num_tbs = iwl_tfd_get_num_tbs(tfd);
519
520         /* Each TFD can point to a maximum 20 Tx buffers */
521         if (num_tbs >= IWL_NUM_OF_TBS) {
522                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
523                           IWL_NUM_OF_TBS);
524                 return -EINVAL;
525         }
526
527         BUG_ON(addr & ~DMA_BIT_MASK(36));
528         if (unlikely(addr & ~IWL_TX_DMA_MASK))
529                 IWL_ERR(priv, "Unaligned address = %llx\n",
530                           (unsigned long long)addr);
531
532         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
533
534         return 0;
535 }
536
537 /*
538  * Tell nic where to find circular buffer of Tx Frame Descriptors for
539  * given Tx queue, and enable the DMA channel used for that queue.
540  *
541  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
542  * channels supported in hardware.
543  */
544 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
545                          struct iwl_tx_queue *txq)
546 {
547         int txq_id = txq->q.id;
548
549         /* Circular buffer (TFD queue in DRAM) physical base address */
550         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
551                              txq->q.dma_addr >> 8);
552
553         return 0;
554 }
555
556 /******************************************************************************
557  *
558  * Generic RX handler implementations
559  *
560  ******************************************************************************/
561 static void iwl_rx_reply_alive(struct iwl_priv *priv,
562                                 struct iwl_rx_mem_buffer *rxb)
563 {
564         struct iwl_rx_packet *pkt = rxb_addr(rxb);
565         struct iwl_alive_resp *palive;
566         struct delayed_work *pwork;
567
568         palive = &pkt->u.alive_frame;
569
570         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
571                        "0x%01X 0x%01X\n",
572                        palive->is_valid, palive->ver_type,
573                        palive->ver_subtype);
574
575         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
576                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
577                 memcpy(&priv->card_alive_init,
578                        &pkt->u.alive_frame,
579                        sizeof(struct iwl_init_alive_resp));
580                 pwork = &priv->init_alive_start;
581         } else {
582                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
583                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
584                        sizeof(struct iwl_alive_resp));
585                 pwork = &priv->alive_start;
586         }
587
588         /* We delay the ALIVE response by 5ms to
589          * give the HW RF Kill time to activate... */
590         if (palive->is_valid == UCODE_VALID_OK)
591                 queue_delayed_work(priv->workqueue, pwork,
592                                    msecs_to_jiffies(5));
593         else
594                 IWL_WARN(priv, "uCode did not respond OK.\n");
595 }
596
597 static void iwl_bg_beacon_update(struct work_struct *work)
598 {
599         struct iwl_priv *priv =
600                 container_of(work, struct iwl_priv, beacon_update);
601         struct sk_buff *beacon;
602
603         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
604         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
605
606         if (!beacon) {
607                 IWL_ERR(priv, "update beacon failed\n");
608                 return;
609         }
610
611         mutex_lock(&priv->mutex);
612         /* new beacon skb is allocated every time; dispose previous.*/
613         if (priv->ibss_beacon)
614                 dev_kfree_skb(priv->ibss_beacon);
615
616         priv->ibss_beacon = beacon;
617         mutex_unlock(&priv->mutex);
618
619         iwl_send_beacon_cmd(priv);
620 }
621
622 static void iwl_bg_bt_runtime_config(struct work_struct *work)
623 {
624         struct iwl_priv *priv =
625                 container_of(work, struct iwl_priv, bt_runtime_config);
626
627         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
628                 return;
629
630         /* dont send host command if rf-kill is on */
631         if (!iwl_is_ready_rf(priv))
632                 return;
633         priv->cfg->ops->hcmd->send_bt_config(priv);
634 }
635
636 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
637 {
638         struct iwl_priv *priv =
639                 container_of(work, struct iwl_priv, bt_full_concurrency);
640         struct iwl_rxon_context *ctx;
641
642         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
643                 return;
644
645         /* dont send host command if rf-kill is on */
646         if (!iwl_is_ready_rf(priv))
647                 return;
648
649         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
650                        priv->bt_full_concurrent ?
651                        "full concurrency" : "3-wire");
652
653         /*
654          * LQ & RXON updated cmds must be sent before BT Config cmd
655          * to avoid 3-wire collisions
656          */
657         mutex_lock(&priv->mutex);
658         for_each_context(priv, ctx) {
659                 if (priv->cfg->ops->hcmd->set_rxon_chain)
660                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
661                 iwlcore_commit_rxon(priv, ctx);
662         }
663         mutex_unlock(&priv->mutex);
664
665         priv->cfg->ops->hcmd->send_bt_config(priv);
666 }
667
668 /**
669  * iwl_bg_statistics_periodic - Timer callback to queue statistics
670  *
671  * This callback is provided in order to send a statistics request.
672  *
673  * This timer function is continually reset to execute within
674  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
675  * was received.  We need to ensure we receive the statistics in order
676  * to update the temperature used for calibrating the TXPOWER.
677  */
678 static void iwl_bg_statistics_periodic(unsigned long data)
679 {
680         struct iwl_priv *priv = (struct iwl_priv *)data;
681
682         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
683                 return;
684
685         /* dont send host command if rf-kill is on */
686         if (!iwl_is_ready_rf(priv))
687                 return;
688
689         iwl_send_statistics_request(priv, CMD_ASYNC, false);
690 }
691
692
693 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
694                                         u32 start_idx, u32 num_events,
695                                         u32 mode)
696 {
697         u32 i;
698         u32 ptr;        /* SRAM byte address of log data */
699         u32 ev, time, data; /* event log data */
700         unsigned long reg_flags;
701
702         if (mode == 0)
703                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
704         else
705                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
706
707         /* Make sure device is powered up for SRAM reads */
708         spin_lock_irqsave(&priv->reg_lock, reg_flags);
709         if (iwl_grab_nic_access(priv)) {
710                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
711                 return;
712         }
713
714         /* Set starting address; reads will auto-increment */
715         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
716         rmb();
717
718         /*
719          * "time" is actually "data" for mode 0 (no timestamp).
720          * place event id # at far right for easier visual parsing.
721          */
722         for (i = 0; i < num_events; i++) {
723                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
724                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
725                 if (mode == 0) {
726                         trace_iwlwifi_dev_ucode_cont_event(priv,
727                                                         0, time, ev);
728                 } else {
729                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
730                         trace_iwlwifi_dev_ucode_cont_event(priv,
731                                                 time, data, ev);
732                 }
733         }
734         /* Allow device to power down */
735         iwl_release_nic_access(priv);
736         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
737 }
738
739 static void iwl_continuous_event_trace(struct iwl_priv *priv)
740 {
741         u32 capacity;   /* event log capacity in # entries */
742         u32 base;       /* SRAM byte address of event log header */
743         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
744         u32 num_wraps;  /* # times uCode wrapped to top of log */
745         u32 next_entry; /* index of next entry to be written by uCode */
746
747         if (priv->ucode_type == UCODE_INIT)
748                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
749         else
750                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
751         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
752                 capacity = iwl_read_targ_mem(priv, base);
753                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
754                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
755                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
756         } else
757                 return;
758
759         if (num_wraps == priv->event_log.num_wraps) {
760                 iwl_print_cont_event_trace(priv,
761                                        base, priv->event_log.next_entry,
762                                        next_entry - priv->event_log.next_entry,
763                                        mode);
764                 priv->event_log.non_wraps_count++;
765         } else {
766                 if ((num_wraps - priv->event_log.num_wraps) > 1)
767                         priv->event_log.wraps_more_count++;
768                 else
769                         priv->event_log.wraps_once_count++;
770                 trace_iwlwifi_dev_ucode_wrap_event(priv,
771                                 num_wraps - priv->event_log.num_wraps,
772                                 next_entry, priv->event_log.next_entry);
773                 if (next_entry < priv->event_log.next_entry) {
774                         iwl_print_cont_event_trace(priv, base,
775                                priv->event_log.next_entry,
776                                capacity - priv->event_log.next_entry,
777                                mode);
778
779                         iwl_print_cont_event_trace(priv, base, 0,
780                                 next_entry, mode);
781                 } else {
782                         iwl_print_cont_event_trace(priv, base,
783                                next_entry, capacity - next_entry,
784                                mode);
785
786                         iwl_print_cont_event_trace(priv, base, 0,
787                                 next_entry, mode);
788                 }
789         }
790         priv->event_log.num_wraps = num_wraps;
791         priv->event_log.next_entry = next_entry;
792 }
793
794 /**
795  * iwl_bg_ucode_trace - Timer callback to log ucode event
796  *
797  * The timer is continually set to execute every
798  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
799  * this function is to perform continuous uCode event logging operation
800  * if enabled
801  */
802 static void iwl_bg_ucode_trace(unsigned long data)
803 {
804         struct iwl_priv *priv = (struct iwl_priv *)data;
805
806         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
807                 return;
808
809         if (priv->event_log.ucode_trace) {
810                 iwl_continuous_event_trace(priv);
811                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
812                 mod_timer(&priv->ucode_trace,
813                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
814         }
815 }
816
817 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
818                                 struct iwl_rx_mem_buffer *rxb)
819 {
820         struct iwl_rx_packet *pkt = rxb_addr(rxb);
821         struct iwl4965_beacon_notif *beacon =
822                 (struct iwl4965_beacon_notif *)pkt->u.raw;
823 #ifdef CONFIG_IWLWIFI_DEBUG
824         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
825
826         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
827                 "tsf %d %d rate %d\n",
828                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
829                 beacon->beacon_notify_hdr.failure_frame,
830                 le32_to_cpu(beacon->ibss_mgr_status),
831                 le32_to_cpu(beacon->high_tsf),
832                 le32_to_cpu(beacon->low_tsf), rate);
833 #endif
834
835         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
836
837         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
838             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
839                 queue_work(priv->workqueue, &priv->beacon_update);
840 }
841
842 /* Handle notification from uCode that card's power state is changing
843  * due to software, hardware, or critical temperature RFKILL */
844 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
845                                     struct iwl_rx_mem_buffer *rxb)
846 {
847         struct iwl_rx_packet *pkt = rxb_addr(rxb);
848         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
849         unsigned long status = priv->status;
850
851         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
852                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
853                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
854                           (flags & CT_CARD_DISABLED) ?
855                           "Reached" : "Not reached");
856
857         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
858                      CT_CARD_DISABLED)) {
859
860                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
861                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
862
863                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
864                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
865
866                 if (!(flags & RXON_CARD_DISABLED)) {
867                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
868                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
869                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
870                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
871                 }
872                 if (flags & CT_CARD_DISABLED)
873                         iwl_tt_enter_ct_kill(priv);
874         }
875         if (!(flags & CT_CARD_DISABLED))
876                 iwl_tt_exit_ct_kill(priv);
877
878         if (flags & HW_CARD_DISABLED)
879                 set_bit(STATUS_RF_KILL_HW, &priv->status);
880         else
881                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
882
883
884         if (!(flags & RXON_CARD_DISABLED))
885                 iwl_scan_cancel(priv);
886
887         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
888              test_bit(STATUS_RF_KILL_HW, &priv->status)))
889                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
890                         test_bit(STATUS_RF_KILL_HW, &priv->status));
891         else
892                 wake_up_interruptible(&priv->wait_command_queue);
893 }
894
895 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
896 {
897         if (src == IWL_PWR_SRC_VAUX) {
898                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
899                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
900                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
901                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
902         } else {
903                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
904                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
905                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
906         }
907
908         return 0;
909 }
910
911 static void iwl_bg_tx_flush(struct work_struct *work)
912 {
913         struct iwl_priv *priv =
914                 container_of(work, struct iwl_priv, tx_flush);
915
916         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
917                 return;
918
919         /* do nothing if rf-kill is on */
920         if (!iwl_is_ready_rf(priv))
921                 return;
922
923         if (priv->cfg->ops->lib->txfifo_flush) {
924                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
925                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
926         }
927 }
928
929 /**
930  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
931  *
932  * Setup the RX handlers for each of the reply types sent from the uCode
933  * to the host.
934  *
935  * This function chains into the hardware specific files for them to setup
936  * any hardware specific handlers as well.
937  */
938 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
939 {
940         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
941         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
942         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
943         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
944                         iwl_rx_spectrum_measure_notif;
945         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
946         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
947             iwl_rx_pm_debug_statistics_notif;
948         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
949
950         /*
951          * The same handler is used for both the REPLY to a discrete
952          * statistics request from the host as well as for the periodic
953          * statistics notifications (after received beacons) from the uCode.
954          */
955         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
956         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
957
958         iwl_setup_rx_scan_handlers(priv);
959
960         /* status change handler */
961         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
962
963         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
964             iwl_rx_missed_beacon_notif;
965         /* Rx handlers */
966         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
967         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
968         /* block ack */
969         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
970         /* Set up hardware specific Rx handlers */
971         priv->cfg->ops->lib->rx_handler_setup(priv);
972 }
973
974 /**
975  * iwl_rx_handle - Main entry function for receiving responses from uCode
976  *
977  * Uses the priv->rx_handlers callback function array to invoke
978  * the appropriate handlers, including command responses,
979  * frame-received notifications, and other notifications.
980  */
981 void iwl_rx_handle(struct iwl_priv *priv)
982 {
983         struct iwl_rx_mem_buffer *rxb;
984         struct iwl_rx_packet *pkt;
985         struct iwl_rx_queue *rxq = &priv->rxq;
986         u32 r, i;
987         int reclaim;
988         unsigned long flags;
989         u8 fill_rx = 0;
990         u32 count = 8;
991         int total_empty;
992
993         /* uCode's read index (stored in shared DRAM) indicates the last Rx
994          * buffer that the driver may process (last buffer filled by ucode). */
995         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
996         i = rxq->read;
997
998         /* Rx interrupt, but nothing sent from uCode */
999         if (i == r)
1000                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1001
1002         /* calculate total frames need to be restock after handling RX */
1003         total_empty = r - rxq->write_actual;
1004         if (total_empty < 0)
1005                 total_empty += RX_QUEUE_SIZE;
1006
1007         if (total_empty > (RX_QUEUE_SIZE / 2))
1008                 fill_rx = 1;
1009
1010         while (i != r) {
1011                 int len;
1012
1013                 rxb = rxq->queue[i];
1014
1015                 /* If an RXB doesn't have a Rx queue slot associated with it,
1016                  * then a bug has been introduced in the queue refilling
1017                  * routines -- catch it here */
1018                 BUG_ON(rxb == NULL);
1019
1020                 rxq->queue[i] = NULL;
1021
1022                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1023                                PAGE_SIZE << priv->hw_params.rx_page_order,
1024                                PCI_DMA_FROMDEVICE);
1025                 pkt = rxb_addr(rxb);
1026
1027                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1028                 len += sizeof(u32); /* account for status word */
1029                 trace_iwlwifi_dev_rx(priv, pkt, len);
1030
1031                 /* Reclaim a command buffer only if this packet is a response
1032                  *   to a (driver-originated) command.
1033                  * If the packet (e.g. Rx frame) originated from uCode,
1034                  *   there is no command buffer to reclaim.
1035                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1036                  *   but apparently a few don't get set; catch them here. */
1037                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1038                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1039                         (pkt->hdr.cmd != REPLY_RX) &&
1040                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1041                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1042                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1043                         (pkt->hdr.cmd != REPLY_TX);
1044
1045                 /* Based on type of command response or notification,
1046                  *   handle those that need handling via function in
1047                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1048                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1049                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1050                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1051                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1052                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1053                 } else {
1054                         /* No handling needed */
1055                         IWL_DEBUG_RX(priv,
1056                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1057                                 r, i, get_cmd_string(pkt->hdr.cmd),
1058                                 pkt->hdr.cmd);
1059                 }
1060
1061                 /*
1062                  * XXX: After here, we should always check rxb->page
1063                  * against NULL before touching it or its virtual
1064                  * memory (pkt). Because some rx_handler might have
1065                  * already taken or freed the pages.
1066                  */
1067
1068                 if (reclaim) {
1069                         /* Invoke any callbacks, transfer the buffer to caller,
1070                          * and fire off the (possibly) blocking iwl_send_cmd()
1071                          * as we reclaim the driver command queue */
1072                         if (rxb->page)
1073                                 iwl_tx_cmd_complete(priv, rxb);
1074                         else
1075                                 IWL_WARN(priv, "Claim null rxb?\n");
1076                 }
1077
1078                 /* Reuse the page if possible. For notification packets and
1079                  * SKBs that fail to Rx correctly, add them back into the
1080                  * rx_free list for reuse later. */
1081                 spin_lock_irqsave(&rxq->lock, flags);
1082                 if (rxb->page != NULL) {
1083                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1084                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1085                                 PCI_DMA_FROMDEVICE);
1086                         list_add_tail(&rxb->list, &rxq->rx_free);
1087                         rxq->free_count++;
1088                 } else
1089                         list_add_tail(&rxb->list, &rxq->rx_used);
1090
1091                 spin_unlock_irqrestore(&rxq->lock, flags);
1092
1093                 i = (i + 1) & RX_QUEUE_MASK;
1094                 /* If there are a lot of unused frames,
1095                  * restock the Rx queue so ucode wont assert. */
1096                 if (fill_rx) {
1097                         count++;
1098                         if (count >= 8) {
1099                                 rxq->read = i;
1100                                 iwlagn_rx_replenish_now(priv);
1101                                 count = 0;
1102                         }
1103                 }
1104         }
1105
1106         /* Backtrack one entry */
1107         rxq->read = i;
1108         if (fill_rx)
1109                 iwlagn_rx_replenish_now(priv);
1110         else
1111                 iwlagn_rx_queue_restock(priv);
1112 }
1113
1114 /* call this function to flush any scheduled tasklet */
1115 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1116 {
1117         /* wait to make sure we flush pending tasklet*/
1118         synchronize_irq(priv->pci_dev->irq);
1119         tasklet_kill(&priv->irq_tasklet);
1120 }
1121
1122 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1123 {
1124         u32 inta, handled = 0;
1125         u32 inta_fh;
1126         unsigned long flags;
1127         u32 i;
1128 #ifdef CONFIG_IWLWIFI_DEBUG
1129         u32 inta_mask;
1130 #endif
1131
1132         spin_lock_irqsave(&priv->lock, flags);
1133
1134         /* Ack/clear/reset pending uCode interrupts.
1135          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1136          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1137         inta = iwl_read32(priv, CSR_INT);
1138         iwl_write32(priv, CSR_INT, inta);
1139
1140         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1141          * Any new interrupts that happen after this, either while we're
1142          * in this tasklet, or later, will show up in next ISR/tasklet. */
1143         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1144         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1145
1146 #ifdef CONFIG_IWLWIFI_DEBUG
1147         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1148                 /* just for debug */
1149                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1150                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1151                               inta, inta_mask, inta_fh);
1152         }
1153 #endif
1154
1155         spin_unlock_irqrestore(&priv->lock, flags);
1156
1157         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1158          * atomic, make sure that inta covers all the interrupts that
1159          * we've discovered, even if FH interrupt came in just after
1160          * reading CSR_INT. */
1161         if (inta_fh & CSR49_FH_INT_RX_MASK)
1162                 inta |= CSR_INT_BIT_FH_RX;
1163         if (inta_fh & CSR49_FH_INT_TX_MASK)
1164                 inta |= CSR_INT_BIT_FH_TX;
1165
1166         /* Now service all interrupt bits discovered above. */
1167         if (inta & CSR_INT_BIT_HW_ERR) {
1168                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1169
1170                 /* Tell the device to stop sending interrupts */
1171                 iwl_disable_interrupts(priv);
1172
1173                 priv->isr_stats.hw++;
1174                 iwl_irq_handle_error(priv);
1175
1176                 handled |= CSR_INT_BIT_HW_ERR;
1177
1178                 return;
1179         }
1180
1181 #ifdef CONFIG_IWLWIFI_DEBUG
1182         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1183                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1184                 if (inta & CSR_INT_BIT_SCD) {
1185                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1186                                       "the frame/frames.\n");
1187                         priv->isr_stats.sch++;
1188                 }
1189
1190                 /* Alive notification via Rx interrupt will do the real work */
1191                 if (inta & CSR_INT_BIT_ALIVE) {
1192                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1193                         priv->isr_stats.alive++;
1194                 }
1195         }
1196 #endif
1197         /* Safely ignore these bits for debug checks below */
1198         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1199
1200         /* HW RF KILL switch toggled */
1201         if (inta & CSR_INT_BIT_RF_KILL) {
1202                 int hw_rf_kill = 0;
1203                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1204                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1205                         hw_rf_kill = 1;
1206
1207                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1208                                 hw_rf_kill ? "disable radio" : "enable radio");
1209
1210                 priv->isr_stats.rfkill++;
1211
1212                 /* driver only loads ucode once setting the interface up.
1213                  * the driver allows loading the ucode even if the radio
1214                  * is killed. Hence update the killswitch state here. The
1215                  * rfkill handler will care about restarting if needed.
1216                  */
1217                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1218                         if (hw_rf_kill)
1219                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1220                         else
1221                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1222                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1223                 }
1224
1225                 handled |= CSR_INT_BIT_RF_KILL;
1226         }
1227
1228         /* Chip got too hot and stopped itself */
1229         if (inta & CSR_INT_BIT_CT_KILL) {
1230                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1231                 priv->isr_stats.ctkill++;
1232                 handled |= CSR_INT_BIT_CT_KILL;
1233         }
1234
1235         /* Error detected by uCode */
1236         if (inta & CSR_INT_BIT_SW_ERR) {
1237                 IWL_ERR(priv, "Microcode SW error detected. "
1238                         " Restarting 0x%X.\n", inta);
1239                 priv->isr_stats.sw++;
1240                 priv->isr_stats.sw_err = inta;
1241                 iwl_irq_handle_error(priv);
1242                 handled |= CSR_INT_BIT_SW_ERR;
1243         }
1244
1245         /*
1246          * uCode wakes up after power-down sleep.
1247          * Tell device about any new tx or host commands enqueued,
1248          * and about any Rx buffers made available while asleep.
1249          */
1250         if (inta & CSR_INT_BIT_WAKEUP) {
1251                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1252                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1253                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1254                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1255                 priv->isr_stats.wakeup++;
1256                 handled |= CSR_INT_BIT_WAKEUP;
1257         }
1258
1259         /* All uCode command responses, including Tx command responses,
1260          * Rx "responses" (frame-received notification), and other
1261          * notifications from uCode come through here*/
1262         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1263                 iwl_rx_handle(priv);
1264                 priv->isr_stats.rx++;
1265                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1266         }
1267
1268         /* This "Tx" DMA channel is used only for loading uCode */
1269         if (inta & CSR_INT_BIT_FH_TX) {
1270                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1271                 priv->isr_stats.tx++;
1272                 handled |= CSR_INT_BIT_FH_TX;
1273                 /* Wake up uCode load routine, now that load is complete */
1274                 priv->ucode_write_complete = 1;
1275                 wake_up_interruptible(&priv->wait_command_queue);
1276         }
1277
1278         if (inta & ~handled) {
1279                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1280                 priv->isr_stats.unhandled++;
1281         }
1282
1283         if (inta & ~(priv->inta_mask)) {
1284                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1285                          inta & ~priv->inta_mask);
1286                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1287         }
1288
1289         /* Re-enable all interrupts */
1290         /* only Re-enable if diabled by irq */
1291         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1292                 iwl_enable_interrupts(priv);
1293
1294 #ifdef CONFIG_IWLWIFI_DEBUG
1295         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1296                 inta = iwl_read32(priv, CSR_INT);
1297                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1298                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1299                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1300                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1301         }
1302 #endif
1303 }
1304
1305 /* tasklet for iwlagn interrupt */
1306 static void iwl_irq_tasklet(struct iwl_priv *priv)
1307 {
1308         u32 inta = 0;
1309         u32 handled = 0;
1310         unsigned long flags;
1311         u32 i;
1312 #ifdef CONFIG_IWLWIFI_DEBUG
1313         u32 inta_mask;
1314 #endif
1315
1316         spin_lock_irqsave(&priv->lock, flags);
1317
1318         /* Ack/clear/reset pending uCode interrupts.
1319          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1320          */
1321         /* There is a hardware bug in the interrupt mask function that some
1322          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1323          * they are disabled in the CSR_INT_MASK register. Furthermore the
1324          * ICT interrupt handling mechanism has another bug that might cause
1325          * these unmasked interrupts fail to be detected. We workaround the
1326          * hardware bugs here by ACKing all the possible interrupts so that
1327          * interrupt coalescing can still be achieved.
1328          */
1329         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1330
1331         inta = priv->_agn.inta;
1332
1333 #ifdef CONFIG_IWLWIFI_DEBUG
1334         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1335                 /* just for debug */
1336                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1337                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1338                                 inta, inta_mask);
1339         }
1340 #endif
1341
1342         spin_unlock_irqrestore(&priv->lock, flags);
1343
1344         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1345         priv->_agn.inta = 0;
1346
1347         /* Now service all interrupt bits discovered above. */
1348         if (inta & CSR_INT_BIT_HW_ERR) {
1349                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1350
1351                 /* Tell the device to stop sending interrupts */
1352                 iwl_disable_interrupts(priv);
1353
1354                 priv->isr_stats.hw++;
1355                 iwl_irq_handle_error(priv);
1356
1357                 handled |= CSR_INT_BIT_HW_ERR;
1358
1359                 return;
1360         }
1361
1362 #ifdef CONFIG_IWLWIFI_DEBUG
1363         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1364                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1365                 if (inta & CSR_INT_BIT_SCD) {
1366                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1367                                       "the frame/frames.\n");
1368                         priv->isr_stats.sch++;
1369                 }
1370
1371                 /* Alive notification via Rx interrupt will do the real work */
1372                 if (inta & CSR_INT_BIT_ALIVE) {
1373                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1374                         priv->isr_stats.alive++;
1375                 }
1376         }
1377 #endif
1378         /* Safely ignore these bits for debug checks below */
1379         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1380
1381         /* HW RF KILL switch toggled */
1382         if (inta & CSR_INT_BIT_RF_KILL) {
1383                 int hw_rf_kill = 0;
1384                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1385                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1386                         hw_rf_kill = 1;
1387
1388                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1389                                 hw_rf_kill ? "disable radio" : "enable radio");
1390
1391                 priv->isr_stats.rfkill++;
1392
1393                 /* driver only loads ucode once setting the interface up.
1394                  * the driver allows loading the ucode even if the radio
1395                  * is killed. Hence update the killswitch state here. The
1396                  * rfkill handler will care about restarting if needed.
1397                  */
1398                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1399                         if (hw_rf_kill)
1400                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1401                         else
1402                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1403                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1404                 }
1405
1406                 handled |= CSR_INT_BIT_RF_KILL;
1407         }
1408
1409         /* Chip got too hot and stopped itself */
1410         if (inta & CSR_INT_BIT_CT_KILL) {
1411                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1412                 priv->isr_stats.ctkill++;
1413                 handled |= CSR_INT_BIT_CT_KILL;
1414         }
1415
1416         /* Error detected by uCode */
1417         if (inta & CSR_INT_BIT_SW_ERR) {
1418                 IWL_ERR(priv, "Microcode SW error detected. "
1419                         " Restarting 0x%X.\n", inta);
1420                 priv->isr_stats.sw++;
1421                 priv->isr_stats.sw_err = inta;
1422                 iwl_irq_handle_error(priv);
1423                 handled |= CSR_INT_BIT_SW_ERR;
1424         }
1425
1426         /* uCode wakes up after power-down sleep */
1427         if (inta & CSR_INT_BIT_WAKEUP) {
1428                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1429                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1430                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1431                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1432
1433                 priv->isr_stats.wakeup++;
1434
1435                 handled |= CSR_INT_BIT_WAKEUP;
1436         }
1437
1438         /* All uCode command responses, including Tx command responses,
1439          * Rx "responses" (frame-received notification), and other
1440          * notifications from uCode come through here*/
1441         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1442                         CSR_INT_BIT_RX_PERIODIC)) {
1443                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1444                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1445                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1446                         iwl_write32(priv, CSR_FH_INT_STATUS,
1447                                         CSR49_FH_INT_RX_MASK);
1448                 }
1449                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1450                         handled |= CSR_INT_BIT_RX_PERIODIC;
1451                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1452                 }
1453                 /* Sending RX interrupt require many steps to be done in the
1454                  * the device:
1455                  * 1- write interrupt to current index in ICT table.
1456                  * 2- dma RX frame.
1457                  * 3- update RX shared data to indicate last write index.
1458                  * 4- send interrupt.
1459                  * This could lead to RX race, driver could receive RX interrupt
1460                  * but the shared data changes does not reflect this;
1461                  * periodic interrupt will detect any dangling Rx activity.
1462                  */
1463
1464                 /* Disable periodic interrupt; we use it as just a one-shot. */
1465                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1466                             CSR_INT_PERIODIC_DIS);
1467                 iwl_rx_handle(priv);
1468
1469                 /*
1470                  * Enable periodic interrupt in 8 msec only if we received
1471                  * real RX interrupt (instead of just periodic int), to catch
1472                  * any dangling Rx interrupt.  If it was just the periodic
1473                  * interrupt, there was no dangling Rx activity, and no need
1474                  * to extend the periodic interrupt; one-shot is enough.
1475                  */
1476                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1477                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1478                                     CSR_INT_PERIODIC_ENA);
1479
1480                 priv->isr_stats.rx++;
1481         }
1482
1483         /* This "Tx" DMA channel is used only for loading uCode */
1484         if (inta & CSR_INT_BIT_FH_TX) {
1485                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1486                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1487                 priv->isr_stats.tx++;
1488                 handled |= CSR_INT_BIT_FH_TX;
1489                 /* Wake up uCode load routine, now that load is complete */
1490                 priv->ucode_write_complete = 1;
1491                 wake_up_interruptible(&priv->wait_command_queue);
1492         }
1493
1494         if (inta & ~handled) {
1495                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1496                 priv->isr_stats.unhandled++;
1497         }
1498
1499         if (inta & ~(priv->inta_mask)) {
1500                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1501                          inta & ~priv->inta_mask);
1502         }
1503
1504         /* Re-enable all interrupts */
1505         /* only Re-enable if diabled by irq */
1506         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1507                 iwl_enable_interrupts(priv);
1508 }
1509
1510 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1511 #define ACK_CNT_RATIO (50)
1512 #define BA_TIMEOUT_CNT (5)
1513 #define BA_TIMEOUT_MAX (16)
1514
1515 /**
1516  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1517  *
1518  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1519  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1520  * operation state.
1521  */
1522 bool iwl_good_ack_health(struct iwl_priv *priv,
1523                                 struct iwl_rx_packet *pkt)
1524 {
1525         bool rc = true;
1526         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1527         int ba_timeout_delta;
1528
1529         actual_ack_cnt_delta =
1530                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1531                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1532         expected_ack_cnt_delta =
1533                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1534                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1535         ba_timeout_delta =
1536                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1537                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1538         if ((priv->_agn.agg_tids_count > 0) &&
1539             (expected_ack_cnt_delta > 0) &&
1540             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1541                 < ACK_CNT_RATIO) &&
1542             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1543                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1544                                 " expected_ack_cnt = %d\n",
1545                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1546
1547 #ifdef CONFIG_IWLWIFI_DEBUGFS
1548                 /*
1549                  * This is ifdef'ed on DEBUGFS because otherwise the
1550                  * statistics aren't available. If DEBUGFS is set but
1551                  * DEBUG is not, these will just compile out.
1552                  */
1553                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1554                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1555                 IWL_DEBUG_RADIO(priv,
1556                                 "ack_or_ba_timeout_collision delta = %d\n",
1557                                 priv->_agn.delta_statistics.tx.
1558                                 ack_or_ba_timeout_collision);
1559 #endif
1560                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1561                                 ba_timeout_delta);
1562                 if (!actual_ack_cnt_delta &&
1563                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1564                         rc = false;
1565         }
1566         return rc;
1567 }
1568
1569
1570 /*****************************************************************************
1571  *
1572  * sysfs attributes
1573  *
1574  *****************************************************************************/
1575
1576 #ifdef CONFIG_IWLWIFI_DEBUG
1577
1578 /*
1579  * The following adds a new attribute to the sysfs representation
1580  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1581  * used for controlling the debug level.
1582  *
1583  * See the level definitions in iwl for details.
1584  *
1585  * The debug_level being managed using sysfs below is a per device debug
1586  * level that is used instead of the global debug level if it (the per
1587  * device debug level) is set.
1588  */
1589 static ssize_t show_debug_level(struct device *d,
1590                                 struct device_attribute *attr, char *buf)
1591 {
1592         struct iwl_priv *priv = dev_get_drvdata(d);
1593         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1594 }
1595 static ssize_t store_debug_level(struct device *d,
1596                                 struct device_attribute *attr,
1597                                  const char *buf, size_t count)
1598 {
1599         struct iwl_priv *priv = dev_get_drvdata(d);
1600         unsigned long val;
1601         int ret;
1602
1603         ret = strict_strtoul(buf, 0, &val);
1604         if (ret)
1605                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1606         else {
1607                 priv->debug_level = val;
1608                 if (iwl_alloc_traffic_mem(priv))
1609                         IWL_ERR(priv,
1610                                 "Not enough memory to generate traffic log\n");
1611         }
1612         return strnlen(buf, count);
1613 }
1614
1615 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1616                         show_debug_level, store_debug_level);
1617
1618
1619 #endif /* CONFIG_IWLWIFI_DEBUG */
1620
1621
1622 static ssize_t show_temperature(struct device *d,
1623                                 struct device_attribute *attr, char *buf)
1624 {
1625         struct iwl_priv *priv = dev_get_drvdata(d);
1626
1627         if (!iwl_is_alive(priv))
1628                 return -EAGAIN;
1629
1630         return sprintf(buf, "%d\n", priv->temperature);
1631 }
1632
1633 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1634
1635 static ssize_t show_tx_power(struct device *d,
1636                              struct device_attribute *attr, char *buf)
1637 {
1638         struct iwl_priv *priv = dev_get_drvdata(d);
1639
1640         if (!iwl_is_ready_rf(priv))
1641                 return sprintf(buf, "off\n");
1642         else
1643                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1644 }
1645
1646 static ssize_t store_tx_power(struct device *d,
1647                               struct device_attribute *attr,
1648                               const char *buf, size_t count)
1649 {
1650         struct iwl_priv *priv = dev_get_drvdata(d);
1651         unsigned long val;
1652         int ret;
1653
1654         ret = strict_strtoul(buf, 10, &val);
1655         if (ret)
1656                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1657         else {
1658                 ret = iwl_set_tx_power(priv, val, false);
1659                 if (ret)
1660                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1661                                 ret);
1662                 else
1663                         ret = count;
1664         }
1665         return ret;
1666 }
1667
1668 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1669
1670 static struct attribute *iwl_sysfs_entries[] = {
1671         &dev_attr_temperature.attr,
1672         &dev_attr_tx_power.attr,
1673 #ifdef CONFIG_IWLWIFI_DEBUG
1674         &dev_attr_debug_level.attr,
1675 #endif
1676         NULL
1677 };
1678
1679 static struct attribute_group iwl_attribute_group = {
1680         .name = NULL,           /* put in device directory */
1681         .attrs = iwl_sysfs_entries,
1682 };
1683
1684 /******************************************************************************
1685  *
1686  * uCode download functions
1687  *
1688  ******************************************************************************/
1689
1690 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1691 {
1692         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1693         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1694         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1695         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1696         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1697         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1698 }
1699
1700 static void iwl_nic_start(struct iwl_priv *priv)
1701 {
1702         /* Remove all resets to allow NIC to operate */
1703         iwl_write32(priv, CSR_RESET, 0);
1704 }
1705
1706 struct iwlagn_ucode_capabilities {
1707         u32 max_probe_length;
1708         u32 standard_phy_calibration_size;
1709 };
1710
1711 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1712 static int iwl_mac_setup_register(struct iwl_priv *priv,
1713                                   struct iwlagn_ucode_capabilities *capa);
1714
1715 #define UCODE_EXPERIMENTAL_INDEX        100
1716 #define UCODE_EXPERIMENTAL_TAG          "exp"
1717
1718 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1719 {
1720         const char *name_pre = priv->cfg->fw_name_pre;
1721         char tag[8];
1722
1723         if (first) {
1724 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1725                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1726                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1727         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1728 #endif
1729                 priv->fw_index = priv->cfg->ucode_api_max;
1730                 sprintf(tag, "%d", priv->fw_index);
1731         } else {
1732                 priv->fw_index--;
1733                 sprintf(tag, "%d", priv->fw_index);
1734         }
1735
1736         if (priv->fw_index < priv->cfg->ucode_api_min) {
1737                 IWL_ERR(priv, "no suitable firmware found!\n");
1738                 return -ENOENT;
1739         }
1740
1741         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1742
1743         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1744                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1745                                 ? "EXPERIMENTAL " : "",
1746                        priv->firmware_name);
1747
1748         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1749                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1750                                        iwl_ucode_callback);
1751 }
1752
1753 struct iwlagn_firmware_pieces {
1754         const void *inst, *data, *init, *init_data, *boot;
1755         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1756
1757         u32 build;
1758
1759         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1760         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1761 };
1762
1763 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1764                                        const struct firmware *ucode_raw,
1765                                        struct iwlagn_firmware_pieces *pieces)
1766 {
1767         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1768         u32 api_ver, hdr_size;
1769         const u8 *src;
1770
1771         priv->ucode_ver = le32_to_cpu(ucode->ver);
1772         api_ver = IWL_UCODE_API(priv->ucode_ver);
1773
1774         switch (api_ver) {
1775         default:
1776                 /*
1777                  * 4965 doesn't revision the firmware file format
1778                  * along with the API version, it always uses v1
1779                  * file format.
1780                  */
1781                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1782                                 CSR_HW_REV_TYPE_4965) {
1783                         hdr_size = 28;
1784                         if (ucode_raw->size < hdr_size) {
1785                                 IWL_ERR(priv, "File size too small!\n");
1786                                 return -EINVAL;
1787                         }
1788                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1789                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1790                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1791                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1792                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1793                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1794                         src = ucode->u.v2.data;
1795                         break;
1796                 }
1797                 /* fall through for 4965 */
1798         case 0:
1799         case 1:
1800         case 2:
1801                 hdr_size = 24;
1802                 if (ucode_raw->size < hdr_size) {
1803                         IWL_ERR(priv, "File size too small!\n");
1804                         return -EINVAL;
1805                 }
1806                 pieces->build = 0;
1807                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1808                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1809                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1810                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1811                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1812                 src = ucode->u.v1.data;
1813                 break;
1814         }
1815
1816         /* Verify size of file vs. image size info in file's header */
1817         if (ucode_raw->size != hdr_size + pieces->inst_size +
1818                                 pieces->data_size + pieces->init_size +
1819                                 pieces->init_data_size + pieces->boot_size) {
1820
1821                 IWL_ERR(priv,
1822                         "uCode file size %d does not match expected size\n",
1823                         (int)ucode_raw->size);
1824                 return -EINVAL;
1825         }
1826
1827         pieces->inst = src;
1828         src += pieces->inst_size;
1829         pieces->data = src;
1830         src += pieces->data_size;
1831         pieces->init = src;
1832         src += pieces->init_size;
1833         pieces->init_data = src;
1834         src += pieces->init_data_size;
1835         pieces->boot = src;
1836         src += pieces->boot_size;
1837
1838         return 0;
1839 }
1840
1841 static int iwlagn_wanted_ucode_alternative = 1;
1842
1843 static int iwlagn_load_firmware(struct iwl_priv *priv,
1844                                 const struct firmware *ucode_raw,
1845                                 struct iwlagn_firmware_pieces *pieces,
1846                                 struct iwlagn_ucode_capabilities *capa)
1847 {
1848         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1849         struct iwl_ucode_tlv *tlv;
1850         size_t len = ucode_raw->size;
1851         const u8 *data;
1852         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1853         u64 alternatives;
1854         u32 tlv_len;
1855         enum iwl_ucode_tlv_type tlv_type;
1856         const u8 *tlv_data;
1857
1858         if (len < sizeof(*ucode)) {
1859                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1860                 return -EINVAL;
1861         }
1862
1863         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1864                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1865                         le32_to_cpu(ucode->magic));
1866                 return -EINVAL;
1867         }
1868
1869         /*
1870          * Check which alternatives are present, and "downgrade"
1871          * when the chosen alternative is not present, warning
1872          * the user when that happens. Some files may not have
1873          * any alternatives, so don't warn in that case.
1874          */
1875         alternatives = le64_to_cpu(ucode->alternatives);
1876         tmp = wanted_alternative;
1877         if (wanted_alternative > 63)
1878                 wanted_alternative = 63;
1879         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1880                 wanted_alternative--;
1881         if (wanted_alternative && wanted_alternative != tmp)
1882                 IWL_WARN(priv,
1883                          "uCode alternative %d not available, choosing %d\n",
1884                          tmp, wanted_alternative);
1885
1886         priv->ucode_ver = le32_to_cpu(ucode->ver);
1887         pieces->build = le32_to_cpu(ucode->build);
1888         data = ucode->data;
1889
1890         len -= sizeof(*ucode);
1891
1892         while (len >= sizeof(*tlv)) {
1893                 u16 tlv_alt;
1894
1895                 len -= sizeof(*tlv);
1896                 tlv = (void *)data;
1897
1898                 tlv_len = le32_to_cpu(tlv->length);
1899                 tlv_type = le16_to_cpu(tlv->type);
1900                 tlv_alt = le16_to_cpu(tlv->alternative);
1901                 tlv_data = tlv->data;
1902
1903                 if (len < tlv_len) {
1904                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1905                                 len, tlv_len);
1906                         return -EINVAL;
1907                 }
1908                 len -= ALIGN(tlv_len, 4);
1909                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1910
1911                 /*
1912                  * Alternative 0 is always valid.
1913                  *
1914                  * Skip alternative TLVs that are not selected.
1915                  */
1916                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1917                         continue;
1918
1919                 switch (tlv_type) {
1920                 case IWL_UCODE_TLV_INST:
1921                         pieces->inst = tlv_data;
1922                         pieces->inst_size = tlv_len;
1923                         break;
1924                 case IWL_UCODE_TLV_DATA:
1925                         pieces->data = tlv_data;
1926                         pieces->data_size = tlv_len;
1927                         break;
1928                 case IWL_UCODE_TLV_INIT:
1929                         pieces->init = tlv_data;
1930                         pieces->init_size = tlv_len;
1931                         break;
1932                 case IWL_UCODE_TLV_INIT_DATA:
1933                         pieces->init_data = tlv_data;
1934                         pieces->init_data_size = tlv_len;
1935                         break;
1936                 case IWL_UCODE_TLV_BOOT:
1937                         pieces->boot = tlv_data;
1938                         pieces->boot_size = tlv_len;
1939                         break;
1940                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1941                         if (tlv_len != sizeof(u32))
1942                                 goto invalid_tlv_len;
1943                         capa->max_probe_length =
1944                                         le32_to_cpup((__le32 *)tlv_data);
1945                         break;
1946                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1947                         if (tlv_len != sizeof(u32))
1948                                 goto invalid_tlv_len;
1949                         pieces->init_evtlog_ptr =
1950                                         le32_to_cpup((__le32 *)tlv_data);
1951                         break;
1952                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1953                         if (tlv_len != sizeof(u32))
1954                                 goto invalid_tlv_len;
1955                         pieces->init_evtlog_size =
1956                                         le32_to_cpup((__le32 *)tlv_data);
1957                         break;
1958                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1959                         if (tlv_len != sizeof(u32))
1960                                 goto invalid_tlv_len;
1961                         pieces->init_errlog_ptr =
1962                                         le32_to_cpup((__le32 *)tlv_data);
1963                         break;
1964                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1965                         if (tlv_len != sizeof(u32))
1966                                 goto invalid_tlv_len;
1967                         pieces->inst_evtlog_ptr =
1968                                         le32_to_cpup((__le32 *)tlv_data);
1969                         break;
1970                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1971                         if (tlv_len != sizeof(u32))
1972                                 goto invalid_tlv_len;
1973                         pieces->inst_evtlog_size =
1974                                         le32_to_cpup((__le32 *)tlv_data);
1975                         break;
1976                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1977                         if (tlv_len != sizeof(u32))
1978                                 goto invalid_tlv_len;
1979                         pieces->inst_errlog_ptr =
1980                                         le32_to_cpup((__le32 *)tlv_data);
1981                         break;
1982                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1983                         if (tlv_len)
1984                                 goto invalid_tlv_len;
1985                         priv->enhance_sensitivity_table = true;
1986                         break;
1987                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1988                         if (tlv_len != sizeof(u32))
1989                                 goto invalid_tlv_len;
1990                         capa->standard_phy_calibration_size =
1991                                         le32_to_cpup((__le32 *)tlv_data);
1992                         break;
1993                 default:
1994                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1995                         break;
1996                 }
1997         }
1998
1999         if (len) {
2000                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
2001                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
2002                 return -EINVAL;
2003         }
2004
2005         return 0;
2006
2007  invalid_tlv_len:
2008         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
2009         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2010
2011         return -EINVAL;
2012 }
2013
2014 /**
2015  * iwl_ucode_callback - callback when firmware was loaded
2016  *
2017  * If loaded successfully, copies the firmware into buffers
2018  * for the card to fetch (via DMA).
2019  */
2020 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2021 {
2022         struct iwl_priv *priv = context;
2023         struct iwl_ucode_header *ucode;
2024         int err;
2025         struct iwlagn_firmware_pieces pieces;
2026         const unsigned int api_max = priv->cfg->ucode_api_max;
2027         const unsigned int api_min = priv->cfg->ucode_api_min;
2028         u32 api_ver;
2029         char buildstr[25];
2030         u32 build;
2031         struct iwlagn_ucode_capabilities ucode_capa = {
2032                 .max_probe_length = 200,
2033                 .standard_phy_calibration_size =
2034                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2035         };
2036
2037         memset(&pieces, 0, sizeof(pieces));
2038
2039         if (!ucode_raw) {
2040                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2041                         IWL_ERR(priv,
2042                                 "request for firmware file '%s' failed.\n",
2043                                 priv->firmware_name);
2044                 goto try_again;
2045         }
2046
2047         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2048                        priv->firmware_name, ucode_raw->size);
2049
2050         /* Make sure that we got at least the API version number */
2051         if (ucode_raw->size < 4) {
2052                 IWL_ERR(priv, "File size way too small!\n");
2053                 goto try_again;
2054         }
2055
2056         /* Data from ucode file:  header followed by uCode images */
2057         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2058
2059         if (ucode->ver)
2060                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2061         else
2062                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2063                                            &ucode_capa);
2064
2065         if (err)
2066                 goto try_again;
2067
2068         api_ver = IWL_UCODE_API(priv->ucode_ver);
2069         build = pieces.build;
2070
2071         /*
2072          * api_ver should match the api version forming part of the
2073          * firmware filename ... but we don't check for that and only rely
2074          * on the API version read from firmware header from here on forward
2075          */
2076         if (api_ver < api_min || api_ver > api_max) {
2077                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2078                           "Driver supports v%u, firmware is v%u.\n",
2079                           api_max, api_ver);
2080                 goto try_again;
2081         }
2082
2083         if (api_ver != api_max)
2084                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2085                           "got v%u. New firmware can be obtained "
2086                           "from http://www.intellinuxwireless.org.\n",
2087                           api_max, api_ver);
2088
2089         if (build)
2090                 sprintf(buildstr, " build %u%s", build,
2091                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2092                                 ? " (EXP)" : "");
2093         else
2094                 buildstr[0] = '\0';
2095
2096         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2097                  IWL_UCODE_MAJOR(priv->ucode_ver),
2098                  IWL_UCODE_MINOR(priv->ucode_ver),
2099                  IWL_UCODE_API(priv->ucode_ver),
2100                  IWL_UCODE_SERIAL(priv->ucode_ver),
2101                  buildstr);
2102
2103         snprintf(priv->hw->wiphy->fw_version,
2104                  sizeof(priv->hw->wiphy->fw_version),
2105                  "%u.%u.%u.%u%s",
2106                  IWL_UCODE_MAJOR(priv->ucode_ver),
2107                  IWL_UCODE_MINOR(priv->ucode_ver),
2108                  IWL_UCODE_API(priv->ucode_ver),
2109                  IWL_UCODE_SERIAL(priv->ucode_ver),
2110                  buildstr);
2111
2112         /*
2113          * For any of the failures below (before allocating pci memory)
2114          * we will try to load a version with a smaller API -- maybe the
2115          * user just got a corrupted version of the latest API.
2116          */
2117
2118         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2119                        priv->ucode_ver);
2120         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2121                        pieces.inst_size);
2122         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2123                        pieces.data_size);
2124         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2125                        pieces.init_size);
2126         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2127                        pieces.init_data_size);
2128         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2129                        pieces.boot_size);
2130
2131         /* Verify that uCode images will fit in card's SRAM */
2132         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2133                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2134                         pieces.inst_size);
2135                 goto try_again;
2136         }
2137
2138         if (pieces.data_size > priv->hw_params.max_data_size) {
2139                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2140                         pieces.data_size);
2141                 goto try_again;
2142         }
2143
2144         if (pieces.init_size > priv->hw_params.max_inst_size) {
2145                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2146                         pieces.init_size);
2147                 goto try_again;
2148         }
2149
2150         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2151                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2152                         pieces.init_data_size);
2153                 goto try_again;
2154         }
2155
2156         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2157                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2158                         pieces.boot_size);
2159                 goto try_again;
2160         }
2161
2162         /* Allocate ucode buffers for card's bus-master loading ... */
2163
2164         /* Runtime instructions and 2 copies of data:
2165          * 1) unmodified from disk
2166          * 2) backup cache for save/restore during power-downs */
2167         priv->ucode_code.len = pieces.inst_size;
2168         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2169
2170         priv->ucode_data.len = pieces.data_size;
2171         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2172
2173         priv->ucode_data_backup.len = pieces.data_size;
2174         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2175
2176         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2177             !priv->ucode_data_backup.v_addr)
2178                 goto err_pci_alloc;
2179
2180         /* Initialization instructions and data */
2181         if (pieces.init_size && pieces.init_data_size) {
2182                 priv->ucode_init.len = pieces.init_size;
2183                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2184
2185                 priv->ucode_init_data.len = pieces.init_data_size;
2186                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2187
2188                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2189                         goto err_pci_alloc;
2190         }
2191
2192         /* Bootstrap (instructions only, no data) */
2193         if (pieces.boot_size) {
2194                 priv->ucode_boot.len = pieces.boot_size;
2195                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2196
2197                 if (!priv->ucode_boot.v_addr)
2198                         goto err_pci_alloc;
2199         }
2200
2201         /* Now that we can no longer fail, copy information */
2202
2203         /*
2204          * The (size - 16) / 12 formula is based on the information recorded
2205          * for each event, which is of mode 1 (including timestamp) for all
2206          * new microcodes that include this information.
2207          */
2208         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2209         if (pieces.init_evtlog_size)
2210                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2211         else
2212                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2213         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2214         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2215         if (pieces.inst_evtlog_size)
2216                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2217         else
2218                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2219         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2220
2221         /* Copy images into buffers for card's bus-master reads ... */
2222
2223         /* Runtime instructions (first block of data in file) */
2224         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2225                         pieces.inst_size);
2226         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2227
2228         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2229                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2230
2231         /*
2232          * Runtime data
2233          * NOTE:  Copy into backup buffer will be done in iwl_up()
2234          */
2235         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2236                         pieces.data_size);
2237         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2238         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2239
2240         /* Initialization instructions */
2241         if (pieces.init_size) {
2242                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2243                                 pieces.init_size);
2244                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2245         }
2246
2247         /* Initialization data */
2248         if (pieces.init_data_size) {
2249                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2250                                pieces.init_data_size);
2251                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2252                        pieces.init_data_size);
2253         }
2254
2255         /* Bootstrap instructions */
2256         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2257                         pieces.boot_size);
2258         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2259
2260         /*
2261          * figure out the offset of chain noise reset and gain commands
2262          * base on the size of standard phy calibration commands table size
2263          */
2264         if (ucode_capa.standard_phy_calibration_size >
2265             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2266                 ucode_capa.standard_phy_calibration_size =
2267                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2268
2269         priv->_agn.phy_calib_chain_noise_reset_cmd =
2270                 ucode_capa.standard_phy_calibration_size;
2271         priv->_agn.phy_calib_chain_noise_gain_cmd =
2272                 ucode_capa.standard_phy_calibration_size + 1;
2273
2274         /**************************************************
2275          * This is still part of probe() in a sense...
2276          *
2277          * 9. Setup and register with mac80211 and debugfs
2278          **************************************************/
2279         err = iwl_mac_setup_register(priv, &ucode_capa);
2280         if (err)
2281                 goto out_unbind;
2282
2283         err = iwl_dbgfs_register(priv, DRV_NAME);
2284         if (err)
2285                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2286
2287         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2288                                         &iwl_attribute_group);
2289         if (err) {
2290                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2291                 goto out_unbind;
2292         }
2293
2294         /* We have our copies now, allow OS release its copies */
2295         release_firmware(ucode_raw);
2296         complete(&priv->_agn.firmware_loading_complete);
2297         return;
2298
2299  try_again:
2300         /* try next, if any */
2301         if (iwl_request_firmware(priv, false))
2302                 goto out_unbind;
2303         release_firmware(ucode_raw);
2304         return;
2305
2306  err_pci_alloc:
2307         IWL_ERR(priv, "failed to allocate pci memory\n");
2308         iwl_dealloc_ucode_pci(priv);
2309  out_unbind:
2310         complete(&priv->_agn.firmware_loading_complete);
2311         device_release_driver(&priv->pci_dev->dev);
2312         release_firmware(ucode_raw);
2313 }
2314
2315 static const char *desc_lookup_text[] = {
2316         "OK",
2317         "FAIL",
2318         "BAD_PARAM",
2319         "BAD_CHECKSUM",
2320         "NMI_INTERRUPT_WDG",
2321         "SYSASSERT",
2322         "FATAL_ERROR",
2323         "BAD_COMMAND",
2324         "HW_ERROR_TUNE_LOCK",
2325         "HW_ERROR_TEMPERATURE",
2326         "ILLEGAL_CHAN_FREQ",
2327         "VCC_NOT_STABLE",
2328         "FH_ERROR",
2329         "NMI_INTERRUPT_HOST",
2330         "NMI_INTERRUPT_ACTION_PT",
2331         "NMI_INTERRUPT_UNKNOWN",
2332         "UCODE_VERSION_MISMATCH",
2333         "HW_ERROR_ABS_LOCK",
2334         "HW_ERROR_CAL_LOCK_FAIL",
2335         "NMI_INTERRUPT_INST_ACTION_PT",
2336         "NMI_INTERRUPT_DATA_ACTION_PT",
2337         "NMI_TRM_HW_ER",
2338         "NMI_INTERRUPT_TRM",
2339         "NMI_INTERRUPT_BREAK_POINT"
2340         "DEBUG_0",
2341         "DEBUG_1",
2342         "DEBUG_2",
2343         "DEBUG_3",
2344 };
2345
2346 static struct { char *name; u8 num; } advanced_lookup[] = {
2347         { "NMI_INTERRUPT_WDG", 0x34 },
2348         { "SYSASSERT", 0x35 },
2349         { "UCODE_VERSION_MISMATCH", 0x37 },
2350         { "BAD_COMMAND", 0x38 },
2351         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2352         { "FATAL_ERROR", 0x3D },
2353         { "NMI_TRM_HW_ERR", 0x46 },
2354         { "NMI_INTERRUPT_TRM", 0x4C },
2355         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2356         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2357         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2358         { "NMI_INTERRUPT_HOST", 0x66 },
2359         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2360         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2361         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2362         { "ADVANCED_SYSASSERT", 0 },
2363 };
2364
2365 static const char *desc_lookup(u32 num)
2366 {
2367         int i;
2368         int max = ARRAY_SIZE(desc_lookup_text);
2369
2370         if (num < max)
2371                 return desc_lookup_text[num];
2372
2373         max = ARRAY_SIZE(advanced_lookup) - 1;
2374         for (i = 0; i < max; i++) {
2375                 if (advanced_lookup[i].num == num)
2376                         break;;
2377         }
2378         return advanced_lookup[i].name;
2379 }
2380
2381 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2382 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2383
2384 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2385 {
2386         u32 data2, line;
2387         u32 desc, time, count, base, data1;
2388         u32 blink1, blink2, ilink1, ilink2;
2389         u32 pc, hcmd;
2390
2391         if (priv->ucode_type == UCODE_INIT) {
2392                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2393                 if (!base)
2394                         base = priv->_agn.init_errlog_ptr;
2395         } else {
2396                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2397                 if (!base)
2398                         base = priv->_agn.inst_errlog_ptr;
2399         }
2400
2401         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2402                 IWL_ERR(priv,
2403                         "Not valid error log pointer 0x%08X for %s uCode\n",
2404                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2405                 return;
2406         }
2407
2408         count = iwl_read_targ_mem(priv, base);
2409
2410         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2411                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2412                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2413                         priv->status, count);
2414         }
2415
2416         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2417         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2418         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2419         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2420         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2421         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2422         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2423         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2424         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2425         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2426         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2427
2428         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2429                                       blink1, blink2, ilink1, ilink2);
2430
2431         IWL_ERR(priv, "Desc                                  Time       "
2432                 "data1      data2      line\n");
2433         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2434                 desc_lookup(desc), desc, time, data1, data2, line);
2435         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2436         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2437                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2438 }
2439
2440 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2441
2442 /**
2443  * iwl_print_event_log - Dump error event log to syslog
2444  *
2445  */
2446 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2447                                u32 num_events, u32 mode,
2448                                int pos, char **buf, size_t bufsz)
2449 {
2450         u32 i;
2451         u32 base;       /* SRAM byte address of event log header */
2452         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2453         u32 ptr;        /* SRAM byte address of log data */
2454         u32 ev, time, data; /* event log data */
2455         unsigned long reg_flags;
2456
2457         if (num_events == 0)
2458                 return pos;
2459
2460         if (priv->ucode_type == UCODE_INIT) {
2461                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2462                 if (!base)
2463                         base = priv->_agn.init_evtlog_ptr;
2464         } else {
2465                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2466                 if (!base)
2467                         base = priv->_agn.inst_evtlog_ptr;
2468         }
2469
2470         if (mode == 0)
2471                 event_size = 2 * sizeof(u32);
2472         else
2473                 event_size = 3 * sizeof(u32);
2474
2475         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2476
2477         /* Make sure device is powered up for SRAM reads */
2478         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2479         iwl_grab_nic_access(priv);
2480
2481         /* Set starting address; reads will auto-increment */
2482         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2483         rmb();
2484
2485         /* "time" is actually "data" for mode 0 (no timestamp).
2486         * place event id # at far right for easier visual parsing. */
2487         for (i = 0; i < num_events; i++) {
2488                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2489                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2490                 if (mode == 0) {
2491                         /* data, ev */
2492                         if (bufsz) {
2493                                 pos += scnprintf(*buf + pos, bufsz - pos,
2494                                                 "EVT_LOG:0x%08x:%04u\n",
2495                                                 time, ev);
2496                         } else {
2497                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2498                                         time, ev);
2499                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2500                                         time, ev);
2501                         }
2502                 } else {
2503                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2504                         if (bufsz) {
2505                                 pos += scnprintf(*buf + pos, bufsz - pos,
2506                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2507                                                  time, data, ev);
2508                         } else {
2509                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2510                                         time, data, ev);
2511                                 trace_iwlwifi_dev_ucode_event(priv, time,
2512                                         data, ev);
2513                         }
2514                 }
2515         }
2516
2517         /* Allow device to power down */
2518         iwl_release_nic_access(priv);
2519         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2520         return pos;
2521 }
2522
2523 /**
2524  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2525  */
2526 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2527                                     u32 num_wraps, u32 next_entry,
2528                                     u32 size, u32 mode,
2529                                     int pos, char **buf, size_t bufsz)
2530 {
2531         /*
2532          * display the newest DEFAULT_LOG_ENTRIES entries
2533          * i.e the entries just before the next ont that uCode would fill.
2534          */
2535         if (num_wraps) {
2536                 if (next_entry < size) {
2537                         pos = iwl_print_event_log(priv,
2538                                                 capacity - (size - next_entry),
2539                                                 size - next_entry, mode,
2540                                                 pos, buf, bufsz);
2541                         pos = iwl_print_event_log(priv, 0,
2542                                                   next_entry, mode,
2543                                                   pos, buf, bufsz);
2544                 } else
2545                         pos = iwl_print_event_log(priv, next_entry - size,
2546                                                   size, mode, pos, buf, bufsz);
2547         } else {
2548                 if (next_entry < size) {
2549                         pos = iwl_print_event_log(priv, 0, next_entry,
2550                                                   mode, pos, buf, bufsz);
2551                 } else {
2552                         pos = iwl_print_event_log(priv, next_entry - size,
2553                                                   size, mode, pos, buf, bufsz);
2554                 }
2555         }
2556         return pos;
2557 }
2558
2559 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2560
2561 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2562                             char **buf, bool display)
2563 {
2564         u32 base;       /* SRAM byte address of event log header */
2565         u32 capacity;   /* event log capacity in # entries */
2566         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2567         u32 num_wraps;  /* # times uCode wrapped to top of log */
2568         u32 next_entry; /* index of next entry to be written by uCode */
2569         u32 size;       /* # entries that we'll print */
2570         u32 logsize;
2571         int pos = 0;
2572         size_t bufsz = 0;
2573
2574         if (priv->ucode_type == UCODE_INIT) {
2575                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2576                 logsize = priv->_agn.init_evtlog_size;
2577                 if (!base)
2578                         base = priv->_agn.init_evtlog_ptr;
2579         } else {
2580                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2581                 logsize = priv->_agn.inst_evtlog_size;
2582                 if (!base)
2583                         base = priv->_agn.inst_evtlog_ptr;
2584         }
2585
2586         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2587                 IWL_ERR(priv,
2588                         "Invalid event log pointer 0x%08X for %s uCode\n",
2589                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2590                 return -EINVAL;
2591         }
2592
2593         /* event log header */
2594         capacity = iwl_read_targ_mem(priv, base);
2595         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2596         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2597         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2598
2599         if (capacity > logsize) {
2600                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2601                         capacity, logsize);
2602                 capacity = logsize;
2603         }
2604
2605         if (next_entry > logsize) {
2606                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2607                         next_entry, logsize);
2608                 next_entry = logsize;
2609         }
2610
2611         size = num_wraps ? capacity : next_entry;
2612
2613         /* bail out if nothing in log */
2614         if (size == 0) {
2615                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2616                 return pos;
2617         }
2618
2619         /* enable/disable bt channel announcement */
2620         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2621
2622 #ifdef CONFIG_IWLWIFI_DEBUG
2623         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2624                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2625                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2626 #else
2627         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2628                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2629 #endif
2630         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2631                 size);
2632
2633 #ifdef CONFIG_IWLWIFI_DEBUG
2634         if (display) {
2635                 if (full_log)
2636                         bufsz = capacity * 48;
2637                 else
2638                         bufsz = size * 48;
2639                 *buf = kmalloc(bufsz, GFP_KERNEL);
2640                 if (!*buf)
2641                         return -ENOMEM;
2642         }
2643         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2644                 /*
2645                  * if uCode has wrapped back to top of log,
2646                  * start at the oldest entry,
2647                  * i.e the next one that uCode would fill.
2648                  */
2649                 if (num_wraps)
2650                         pos = iwl_print_event_log(priv, next_entry,
2651                                                 capacity - next_entry, mode,
2652                                                 pos, buf, bufsz);
2653                 /* (then/else) start at top of log */
2654                 pos = iwl_print_event_log(priv, 0,
2655                                           next_entry, mode, pos, buf, bufsz);
2656         } else
2657                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2658                                                 next_entry, size, mode,
2659                                                 pos, buf, bufsz);
2660 #else
2661         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2662                                         next_entry, size, mode,
2663                                         pos, buf, bufsz);
2664 #endif
2665         return pos;
2666 }
2667
2668 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2669 {
2670         struct iwl_ct_kill_config cmd;
2671         struct iwl_ct_kill_throttling_config adv_cmd;
2672         unsigned long flags;
2673         int ret = 0;
2674
2675         spin_lock_irqsave(&priv->lock, flags);
2676         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2677                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2678         spin_unlock_irqrestore(&priv->lock, flags);
2679         priv->thermal_throttle.ct_kill_toggle = false;
2680
2681         if (priv->cfg->support_ct_kill_exit) {
2682                 adv_cmd.critical_temperature_enter =
2683                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2684                 adv_cmd.critical_temperature_exit =
2685                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2686
2687                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2688                                        sizeof(adv_cmd), &adv_cmd);
2689                 if (ret)
2690                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2691                 else
2692                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2693                                         "succeeded, "
2694                                         "critical temperature enter is %d,"
2695                                         "exit is %d\n",
2696                                        priv->hw_params.ct_kill_threshold,
2697                                        priv->hw_params.ct_kill_exit_threshold);
2698         } else {
2699                 cmd.critical_temperature_R =
2700                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2701
2702                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2703                                        sizeof(cmd), &cmd);
2704                 if (ret)
2705                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2706                 else
2707                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2708                                         "succeeded, "
2709                                         "critical temperature is %d\n",
2710                                         priv->hw_params.ct_kill_threshold);
2711         }
2712 }
2713
2714 /**
2715  * iwl_alive_start - called after REPLY_ALIVE notification received
2716  *                   from protocol/runtime uCode (initialization uCode's
2717  *                   Alive gets handled by iwl_init_alive_start()).
2718  */
2719 static void iwl_alive_start(struct iwl_priv *priv)
2720 {
2721         int ret = 0;
2722         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2723
2724         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2725
2726         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2727                 /* We had an error bringing up the hardware, so take it
2728                  * all the way back down so we can try again */
2729                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2730                 goto restart;
2731         }
2732
2733         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2734          * This is a paranoid check, because we would not have gotten the
2735          * "runtime" alive if code weren't properly loaded.  */
2736         if (iwl_verify_ucode(priv)) {
2737                 /* Runtime instruction load was bad;
2738                  * take it all the way back down so we can try again */
2739                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2740                 goto restart;
2741         }
2742
2743         ret = priv->cfg->ops->lib->alive_notify(priv);
2744         if (ret) {
2745                 IWL_WARN(priv,
2746                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2747                 goto restart;
2748         }
2749
2750         /* After the ALIVE response, we can send host commands to the uCode */
2751         set_bit(STATUS_ALIVE, &priv->status);
2752
2753         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2754                 /* Enable timer to monitor the driver queues */
2755                 mod_timer(&priv->monitor_recover,
2756                         jiffies +
2757                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2758         }
2759
2760         if (iwl_is_rfkill(priv))
2761                 return;
2762
2763         ieee80211_wake_queues(priv->hw);
2764
2765         priv->active_rate = IWL_RATES_MASK;
2766
2767         /* Configure Tx antenna selection based on H/W config */
2768         if (priv->cfg->ops->hcmd->set_tx_ant)
2769                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2770
2771         if (iwl_is_associated_ctx(ctx)) {
2772                 struct iwl_rxon_cmd *active_rxon =
2773                                 (struct iwl_rxon_cmd *)&ctx->active;
2774                 /* apply any changes in staging */
2775                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2776                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2777         } else {
2778                 /* Initialize our rx_config data */
2779                 iwl_connection_init_rx_config(priv, NULL);
2780
2781                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2782                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2783         }
2784
2785         if (!priv->cfg->advanced_bt_coexist) {
2786                 /* Configure Bluetooth device coexistence support */
2787                 priv->cfg->ops->hcmd->send_bt_config(priv);
2788         }
2789
2790         iwl_reset_run_time_calib(priv);
2791
2792         /* Configure the adapter for unassociated operation */
2793         iwlcore_commit_rxon(priv, ctx);
2794
2795         /* At this point, the NIC is initialized and operational */
2796         iwl_rf_kill_ct_config(priv);
2797
2798         iwl_leds_init(priv);
2799
2800         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2801         set_bit(STATUS_READY, &priv->status);
2802         wake_up_interruptible(&priv->wait_command_queue);
2803
2804         iwl_power_update_mode(priv, true);
2805         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2806
2807
2808         return;
2809
2810  restart:
2811         queue_work(priv->workqueue, &priv->restart);
2812 }
2813
2814 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2815
2816 static void __iwl_down(struct iwl_priv *priv)
2817 {
2818         unsigned long flags;
2819         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2820
2821         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2822
2823         if (!exit_pending)
2824                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2825
2826         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2827          * to prevent rearm timer */
2828         if (priv->cfg->ops->lib->recover_from_tx_stall)
2829                 del_timer_sync(&priv->monitor_recover);
2830
2831         iwl_clear_ucode_stations(priv);
2832         iwl_dealloc_bcast_station(priv);
2833         iwl_clear_driver_stations(priv);
2834
2835         /* reset BT coex data */
2836         priv->bt_status = 0;
2837         priv->bt_traffic_load = priv->cfg->bt_init_traffic_load;
2838         priv->bt_sco_active = false;
2839         priv->bt_full_concurrent = false;
2840         priv->bt_ci_compliance = 0;
2841
2842         /* Unblock any waiting calls */
2843         wake_up_interruptible_all(&priv->wait_command_queue);
2844
2845         /* Wipe out the EXIT_PENDING status bit if we are not actually
2846          * exiting the module */
2847         if (!exit_pending)
2848                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2849
2850         /* stop and reset the on-board processor */
2851         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2852
2853         /* tell the device to stop sending interrupts */
2854         spin_lock_irqsave(&priv->lock, flags);
2855         iwl_disable_interrupts(priv);
2856         spin_unlock_irqrestore(&priv->lock, flags);
2857         iwl_synchronize_irq(priv);
2858
2859         if (priv->mac80211_registered)
2860                 ieee80211_stop_queues(priv->hw);
2861
2862         /* If we have not previously called iwl_init() then
2863          * clear all bits but the RF Kill bit and return */
2864         if (!iwl_is_init(priv)) {
2865                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2866                                         STATUS_RF_KILL_HW |
2867                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2868                                         STATUS_GEO_CONFIGURED |
2869                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2870                                         STATUS_EXIT_PENDING;
2871                 goto exit;
2872         }
2873
2874         /* ...otherwise clear out all the status bits but the RF Kill
2875          * bit and continue taking the NIC down. */
2876         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2877                                 STATUS_RF_KILL_HW |
2878                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2879                                 STATUS_GEO_CONFIGURED |
2880                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2881                                 STATUS_FW_ERROR |
2882                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2883                                 STATUS_EXIT_PENDING;
2884
2885         /* device going down, Stop using ICT table */
2886         iwl_disable_ict(priv);
2887
2888         iwlagn_txq_ctx_stop(priv);
2889         iwlagn_rxq_stop(priv);
2890
2891         /* Power-down device's busmaster DMA clocks */
2892         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2893         udelay(5);
2894
2895         /* Make sure (redundant) we've released our request to stay awake */
2896         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2897
2898         /* Stop the device, and put it in low power state */
2899         priv->cfg->ops->lib->apm_ops.stop(priv);
2900
2901  exit:
2902         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2903
2904         if (priv->ibss_beacon)
2905                 dev_kfree_skb(priv->ibss_beacon);
2906         priv->ibss_beacon = NULL;
2907
2908         /* clear out any free frames */
2909         iwl_clear_free_frames(priv);
2910 }
2911
2912 static void iwl_down(struct iwl_priv *priv)
2913 {
2914         mutex_lock(&priv->mutex);
2915         __iwl_down(priv);
2916         mutex_unlock(&priv->mutex);
2917
2918         iwl_cancel_deferred_work(priv);
2919 }
2920
2921 #define HW_READY_TIMEOUT (50)
2922
2923 static int iwl_set_hw_ready(struct iwl_priv *priv)
2924 {
2925         int ret = 0;
2926
2927         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2928                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2929
2930         /* See if we got it */
2931         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2932                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2933                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2934                                 HW_READY_TIMEOUT);
2935         if (ret != -ETIMEDOUT)
2936                 priv->hw_ready = true;
2937         else
2938                 priv->hw_ready = false;
2939
2940         IWL_DEBUG_INFO(priv, "hardware %s\n",
2941                       (priv->hw_ready == 1) ? "ready" : "not ready");
2942         return ret;
2943 }
2944
2945 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2946 {
2947         int ret = 0;
2948
2949         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2950
2951         ret = iwl_set_hw_ready(priv);
2952         if (priv->hw_ready)
2953                 return ret;
2954
2955         /* If HW is not ready, prepare the conditions to check again */
2956         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2957                         CSR_HW_IF_CONFIG_REG_PREPARE);
2958
2959         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2960                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2961                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2962
2963         /* HW should be ready by now, check again. */
2964         if (ret != -ETIMEDOUT)
2965                 iwl_set_hw_ready(priv);
2966
2967         return ret;
2968 }
2969
2970 #define MAX_HW_RESTARTS 5
2971
2972 static int __iwl_up(struct iwl_priv *priv)
2973 {
2974         int i;
2975         int ret;
2976
2977         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2978                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2979                 return -EIO;
2980         }
2981
2982         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2983                 IWL_ERR(priv, "ucode not available for device bringup\n");
2984                 return -EIO;
2985         }
2986
2987         ret = iwl_alloc_bcast_station(priv, true);
2988         if (ret)
2989                 return ret;
2990
2991         iwl_prepare_card_hw(priv);
2992
2993         if (!priv->hw_ready) {
2994                 IWL_WARN(priv, "Exit HW not ready\n");
2995                 return -EIO;
2996         }
2997
2998         /* If platform's RF_KILL switch is NOT set to KILL */
2999         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3000                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3001         else
3002                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3003
3004         if (iwl_is_rfkill(priv)) {
3005                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
3006
3007                 iwl_enable_interrupts(priv);
3008                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
3009                 return 0;
3010         }
3011
3012         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3013
3014         /* must be initialised before iwl_hw_nic_init */
3015         priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
3016
3017         ret = iwlagn_hw_nic_init(priv);
3018         if (ret) {
3019                 IWL_ERR(priv, "Unable to init nic\n");
3020                 return ret;
3021         }
3022
3023         /* make sure rfkill handshake bits are cleared */
3024         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3025         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3026                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3027
3028         /* clear (again), then enable host interrupts */
3029         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3030         iwl_enable_interrupts(priv);
3031
3032         /* really make sure rfkill handshake bits are cleared */
3033         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3034         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3035
3036         /* Copy original ucode data image from disk into backup cache.
3037          * This will be used to initialize the on-board processor's
3038          * data SRAM for a clean start when the runtime program first loads. */
3039         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3040                priv->ucode_data.len);
3041
3042         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3043
3044                 /* load bootstrap state machine,
3045                  * load bootstrap program into processor's memory,
3046                  * prepare to load the "initialize" uCode */
3047                 ret = priv->cfg->ops->lib->load_ucode(priv);
3048
3049                 if (ret) {
3050                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3051                                 ret);
3052                         continue;
3053                 }
3054
3055                 /* start card; "initialize" will load runtime ucode */
3056                 iwl_nic_start(priv);
3057
3058                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3059
3060                 return 0;
3061         }
3062
3063         set_bit(STATUS_EXIT_PENDING, &priv->status);
3064         __iwl_down(priv);
3065         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3066
3067         /* tried to restart and config the device for as long as our
3068          * patience could withstand */
3069         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3070         return -EIO;
3071 }
3072
3073
3074 /*****************************************************************************
3075  *
3076  * Workqueue callbacks
3077  *
3078  *****************************************************************************/
3079
3080 static void iwl_bg_init_alive_start(struct work_struct *data)
3081 {
3082         struct iwl_priv *priv =
3083             container_of(data, struct iwl_priv, init_alive_start.work);
3084
3085         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3086                 return;
3087
3088         mutex_lock(&priv->mutex);
3089         priv->cfg->ops->lib->init_alive_start(priv);
3090         mutex_unlock(&priv->mutex);
3091 }
3092
3093 static void iwl_bg_alive_start(struct work_struct *data)
3094 {
3095         struct iwl_priv *priv =
3096             container_of(data, struct iwl_priv, alive_start.work);
3097
3098         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3099                 return;
3100
3101         /* enable dram interrupt */
3102         iwl_reset_ict(priv);
3103
3104         mutex_lock(&priv->mutex);
3105         iwl_alive_start(priv);
3106         mutex_unlock(&priv->mutex);
3107 }
3108
3109 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3110 {
3111         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3112                         run_time_calib_work);
3113
3114         mutex_lock(&priv->mutex);
3115
3116         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3117             test_bit(STATUS_SCANNING, &priv->status)) {
3118                 mutex_unlock(&priv->mutex);
3119                 return;
3120         }
3121
3122         if (priv->start_calib) {
3123                 if (priv->cfg->bt_statistics) {
3124                         iwl_chain_noise_calibration(priv,
3125                                         (void *)&priv->_agn.statistics_bt);
3126                         iwl_sensitivity_calibration(priv,
3127                                         (void *)&priv->_agn.statistics_bt);
3128                 } else {
3129                         iwl_chain_noise_calibration(priv,
3130                                         (void *)&priv->_agn.statistics);
3131                         iwl_sensitivity_calibration(priv,
3132                                         (void *)&priv->_agn.statistics);
3133                 }
3134         }
3135
3136         mutex_unlock(&priv->mutex);
3137 }
3138
3139 static void iwl_bg_restart(struct work_struct *data)
3140 {
3141         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3142
3143         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3144                 return;
3145
3146         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3147                 bool bt_sco, bt_full_concurrent;
3148                 u8 bt_ci_compliance;
3149                 u8 bt_load;
3150                 u8 bt_status;
3151
3152                 mutex_lock(&priv->mutex);
3153                 priv->vif = NULL;
3154                 priv->is_open = 0;
3155
3156                 /*
3157                  * __iwl_down() will clear the BT status variables,
3158                  * which is correct, but when we restart we really
3159                  * want to keep them so restore them afterwards.
3160                  *
3161                  * The restart process will later pick them up and
3162                  * re-configure the hw when we reconfigure the BT
3163                  * command.
3164                  */
3165                 bt_sco = priv->bt_sco_active;
3166                 bt_full_concurrent = priv->bt_full_concurrent;
3167                 bt_ci_compliance = priv->bt_ci_compliance;
3168                 bt_load = priv->bt_traffic_load;
3169                 bt_status = priv->bt_status;
3170
3171                 __iwl_down(priv);
3172
3173                 priv->bt_sco_active = bt_sco;
3174                 priv->bt_full_concurrent = bt_full_concurrent;
3175                 priv->bt_ci_compliance = bt_ci_compliance;
3176                 priv->bt_traffic_load = bt_load;
3177                 priv->bt_status = bt_status;
3178
3179                 mutex_unlock(&priv->mutex);
3180                 iwl_cancel_deferred_work(priv);
3181                 ieee80211_restart_hw(priv->hw);
3182         } else {
3183                 iwl_down(priv);
3184
3185                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3186                         return;
3187
3188                 mutex_lock(&priv->mutex);
3189                 __iwl_up(priv);
3190                 mutex_unlock(&priv->mutex);
3191         }
3192 }
3193
3194 static void iwl_bg_rx_replenish(struct work_struct *data)
3195 {
3196         struct iwl_priv *priv =
3197             container_of(data, struct iwl_priv, rx_replenish);
3198
3199         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3200                 return;
3201
3202         mutex_lock(&priv->mutex);
3203         iwlagn_rx_replenish(priv);
3204         mutex_unlock(&priv->mutex);
3205 }
3206
3207 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3208
3209 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3210 {
3211         struct iwl_rxon_context *ctx;
3212         struct ieee80211_conf *conf = NULL;
3213         int ret = 0;
3214
3215         if (!vif || !priv->is_open)
3216                 return;
3217
3218         ctx = iwl_rxon_ctx_from_vif(vif);
3219
3220         if (vif->type == NL80211_IFTYPE_AP) {
3221                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3222                 return;
3223         }
3224
3225         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3226                 return;
3227
3228         iwl_scan_cancel_timeout(priv, 200);
3229
3230         conf = ieee80211_get_hw_conf(priv->hw);
3231
3232         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3233         iwlcore_commit_rxon(priv, ctx);
3234
3235         ret = iwl_send_rxon_timing(priv, vif);
3236         if (ret)
3237                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3238                             "Attempting to continue.\n");
3239
3240         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3241
3242         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3243
3244         if (priv->cfg->ops->hcmd->set_rxon_chain)
3245                 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3246
3247         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3248
3249         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3250                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3251
3252         if (vif->bss_conf.use_short_preamble)
3253                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3254         else
3255                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3256
3257         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3258                 if (vif->bss_conf.use_short_slot)
3259                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3260                 else
3261                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3262         }
3263
3264         iwlcore_commit_rxon(priv, ctx);
3265
3266         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3267                         vif->bss_conf.aid, ctx->active.bssid_addr);
3268
3269         switch (vif->type) {
3270         case NL80211_IFTYPE_STATION:
3271                 break;
3272         case NL80211_IFTYPE_ADHOC:
3273                 iwl_send_beacon_cmd(priv);
3274                 break;
3275         default:
3276                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3277                           __func__, vif->type);
3278                 break;
3279         }
3280
3281         /* the chain noise calibration will enabled PM upon completion
3282          * If chain noise has already been run, then we need to enable
3283          * power management here */
3284         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3285                 iwl_power_update_mode(priv, false);
3286
3287         /* Enable Rx differential gain and sensitivity calibrations */
3288         iwl_chain_noise_reset(priv);
3289         priv->start_calib = 1;
3290
3291 }
3292
3293 /*****************************************************************************
3294  *
3295  * mac80211 entry point functions
3296  *
3297  *****************************************************************************/
3298
3299 #define UCODE_READY_TIMEOUT     (4 * HZ)
3300
3301 /*
3302  * Not a mac80211 entry point function, but it fits in with all the
3303  * other mac80211 functions grouped here.
3304  */
3305 static int iwl_mac_setup_register(struct iwl_priv *priv,
3306                                   struct iwlagn_ucode_capabilities *capa)
3307 {
3308         int ret;
3309         struct ieee80211_hw *hw = priv->hw;
3310         hw->rate_control_algorithm = "iwl-agn-rs";
3311
3312         /* Tell mac80211 our characteristics */
3313         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3314                     IEEE80211_HW_AMPDU_AGGREGATION |
3315                     IEEE80211_HW_SPECTRUM_MGMT;
3316
3317         if (!priv->cfg->broken_powersave)
3318                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3319                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3320
3321         if (priv->cfg->sku & IWL_SKU_N)
3322                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3323                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3324
3325         hw->sta_data_size = sizeof(struct iwl_station_priv);
3326         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3327
3328         hw->wiphy->interface_modes =
3329                 BIT(NL80211_IFTYPE_STATION) |
3330                 BIT(NL80211_IFTYPE_ADHOC);
3331
3332         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3333                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3334
3335         /*
3336          * For now, disable PS by default because it affects
3337          * RX performance significantly.
3338          */
3339         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3340
3341         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3342         /* we create the 802.11 header and a zero-length SSID element */
3343         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3344
3345         /* Default value; 4 EDCA QOS priorities */
3346         hw->queues = 4;
3347
3348         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3349
3350         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3351                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3352                         &priv->bands[IEEE80211_BAND_2GHZ];
3353         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3354                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3355                         &priv->bands[IEEE80211_BAND_5GHZ];
3356
3357         ret = ieee80211_register_hw(priv->hw);
3358         if (ret) {
3359                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3360                 return ret;
3361         }
3362         priv->mac80211_registered = 1;
3363
3364         return 0;
3365 }
3366
3367
3368 static int iwl_mac_start(struct ieee80211_hw *hw)
3369 {
3370         struct iwl_priv *priv = hw->priv;
3371         int ret;
3372
3373         IWL_DEBUG_MAC80211(priv, "enter\n");
3374
3375         /* we should be verifying the device is ready to be opened */
3376         mutex_lock(&priv->mutex);
3377         ret = __iwl_up(priv);
3378         mutex_unlock(&priv->mutex);
3379
3380         if (ret)
3381                 return ret;
3382
3383         if (iwl_is_rfkill(priv))
3384                 goto out;
3385
3386         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3387
3388         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3389          * mac80211 will not be run successfully. */
3390         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3391                         test_bit(STATUS_READY, &priv->status),
3392                         UCODE_READY_TIMEOUT);
3393         if (!ret) {
3394                 if (!test_bit(STATUS_READY, &priv->status)) {
3395                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3396                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3397                         return -ETIMEDOUT;
3398                 }
3399         }
3400
3401         iwl_led_start(priv);
3402
3403 out:
3404         priv->is_open = 1;
3405         IWL_DEBUG_MAC80211(priv, "leave\n");
3406         return 0;
3407 }
3408
3409 static void iwl_mac_stop(struct ieee80211_hw *hw)
3410 {
3411         struct iwl_priv *priv = hw->priv;
3412
3413         IWL_DEBUG_MAC80211(priv, "enter\n");
3414
3415         if (!priv->is_open)
3416                 return;
3417
3418         priv->is_open = 0;
3419
3420         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3421                 /* stop mac, cancel any scan request and clear
3422                  * RXON_FILTER_ASSOC_MSK BIT
3423                  */
3424                 mutex_lock(&priv->mutex);
3425                 iwl_scan_cancel_timeout(priv, 100);
3426                 mutex_unlock(&priv->mutex);
3427         }
3428
3429         iwl_down(priv);
3430
3431         flush_workqueue(priv->workqueue);
3432
3433         /* enable interrupts again in order to receive rfkill changes */
3434         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3435         iwl_enable_interrupts(priv);
3436
3437         IWL_DEBUG_MAC80211(priv, "leave\n");
3438 }
3439
3440 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3441 {
3442         struct iwl_priv *priv = hw->priv;
3443
3444         IWL_DEBUG_MACDUMP(priv, "enter\n");
3445
3446         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3447                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3448
3449         if (iwlagn_tx_skb(priv, skb))
3450                 dev_kfree_skb_any(skb);
3451
3452         IWL_DEBUG_MACDUMP(priv, "leave\n");
3453         return NETDEV_TX_OK;
3454 }
3455
3456 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3457 {
3458         struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3459         int ret = 0;
3460
3461         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3462                 return;
3463
3464         /* The following should be done only at AP bring up */
3465         if (!iwl_is_associated_ctx(ctx)) {
3466
3467                 /* RXON - unassoc (to set timing command) */
3468                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3469                 iwlcore_commit_rxon(priv, ctx);
3470
3471                 /* RXON Timing */
3472                 ret = iwl_send_rxon_timing(priv, vif);
3473                 if (ret)
3474                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3475                                         "Attempting to continue.\n");
3476
3477                 /* AP has all antennas */
3478                 priv->chain_noise_data.active_chains =
3479                         priv->hw_params.valid_rx_ant;
3480                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3481                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3482                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3483
3484                 ctx->staging.assoc_id = 0;
3485
3486                 if (vif->bss_conf.use_short_preamble)
3487                         ctx->staging.flags |=
3488                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3489                 else
3490                         ctx->staging.flags &=
3491                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3492
3493                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3494                         if (vif->bss_conf.use_short_slot)
3495                                 ctx->staging.flags |=
3496                                         RXON_FLG_SHORT_SLOT_MSK;
3497                         else
3498                                 ctx->staging.flags &=
3499                                         ~RXON_FLG_SHORT_SLOT_MSK;
3500                 }
3501                 /* restore RXON assoc */
3502                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3503                 iwlcore_commit_rxon(priv, ctx);
3504         }
3505         iwl_send_beacon_cmd(priv);
3506
3507         /* FIXME - we need to add code here to detect a totally new
3508          * configuration, reset the AP, unassoc, rxon timing, assoc,
3509          * clear sta table, add BCAST sta... */
3510 }
3511
3512 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3513                                     struct ieee80211_vif *vif,
3514                                     struct ieee80211_key_conf *keyconf,
3515                                     struct ieee80211_sta *sta,
3516                                     u32 iv32, u16 *phase1key)
3517 {
3518
3519         struct iwl_priv *priv = hw->priv;
3520         IWL_DEBUG_MAC80211(priv, "enter\n");
3521
3522         iwl_update_tkip_key(priv, keyconf, sta,
3523                             iv32, phase1key);
3524
3525         IWL_DEBUG_MAC80211(priv, "leave\n");
3526 }
3527
3528 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3529                            struct ieee80211_vif *vif,
3530                            struct ieee80211_sta *sta,
3531                            struct ieee80211_key_conf *key)
3532 {
3533         struct iwl_priv *priv = hw->priv;
3534         int ret;
3535         u8 sta_id;
3536         bool is_default_wep_key = false;
3537
3538         IWL_DEBUG_MAC80211(priv, "enter\n");
3539
3540         if (priv->cfg->mod_params->sw_crypto) {
3541                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3542                 return -EOPNOTSUPP;
3543         }
3544
3545         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3546         if (sta_id == IWL_INVALID_STATION)
3547                 return -EINVAL;
3548
3549         mutex_lock(&priv->mutex);
3550         iwl_scan_cancel_timeout(priv, 100);
3551
3552         /*
3553          * If we are getting WEP group key and we didn't receive any key mapping
3554          * so far, we are in legacy wep mode (group key only), otherwise we are
3555          * in 1X mode.
3556          * In legacy wep mode, we use another host command to the uCode.
3557          */
3558         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3559              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3560             !sta) {
3561                 if (cmd == SET_KEY)
3562                         is_default_wep_key = !priv->key_mapping_key;
3563                 else
3564                         is_default_wep_key =
3565                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3566         }
3567
3568         switch (cmd) {
3569         case SET_KEY:
3570                 if (is_default_wep_key)
3571                         ret = iwl_set_default_wep_key(priv, key);
3572                 else
3573                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3574
3575                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3576                 break;
3577         case DISABLE_KEY:
3578                 if (is_default_wep_key)
3579                         ret = iwl_remove_default_wep_key(priv, key);
3580                 else
3581                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3582
3583                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3584                 break;
3585         default:
3586                 ret = -EINVAL;
3587         }
3588
3589         mutex_unlock(&priv->mutex);
3590         IWL_DEBUG_MAC80211(priv, "leave\n");
3591
3592         return ret;
3593 }
3594
3595 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3596                                 struct ieee80211_vif *vif,
3597                                 enum ieee80211_ampdu_mlme_action action,
3598                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3599 {
3600         struct iwl_priv *priv = hw->priv;
3601         int ret = -EINVAL;
3602
3603         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3604                      sta->addr, tid);
3605
3606         if (!(priv->cfg->sku & IWL_SKU_N))
3607                 return -EACCES;
3608
3609         mutex_lock(&priv->mutex);
3610
3611         switch (action) {
3612         case IEEE80211_AMPDU_RX_START:
3613                 IWL_DEBUG_HT(priv, "start Rx\n");
3614                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3615                 break;
3616         case IEEE80211_AMPDU_RX_STOP:
3617                 IWL_DEBUG_HT(priv, "stop Rx\n");
3618                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3619                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3620                         ret = 0;
3621                 break;
3622         case IEEE80211_AMPDU_TX_START:
3623                 IWL_DEBUG_HT(priv, "start Tx\n");
3624                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3625                 if (ret == 0) {
3626                         priv->_agn.agg_tids_count++;
3627                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3628                                      priv->_agn.agg_tids_count);
3629                 }
3630                 break;
3631         case IEEE80211_AMPDU_TX_STOP:
3632                 IWL_DEBUG_HT(priv, "stop Tx\n");
3633                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3634                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3635                         priv->_agn.agg_tids_count--;
3636                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3637                                      priv->_agn.agg_tids_count);
3638                 }
3639                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3640                         ret = 0;
3641                 if (priv->cfg->use_rts_for_aggregation) {
3642                         struct iwl_station_priv *sta_priv =
3643                                 (void *) sta->drv_priv;
3644                         /*
3645                          * switch off RTS/CTS if it was previously enabled
3646                          */
3647
3648                         sta_priv->lq_sta.lq.general_params.flags &=
3649                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3650                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3651                                 CMD_ASYNC, false);
3652                 }
3653                 break;
3654         case IEEE80211_AMPDU_TX_OPERATIONAL:
3655                 if (priv->cfg->use_rts_for_aggregation) {
3656                         struct iwl_station_priv *sta_priv =
3657                                 (void *) sta->drv_priv;
3658
3659                         /*
3660                          * switch to RTS/CTS if it is the prefer protection
3661                          * method for HT traffic
3662                          */
3663
3664                         sta_priv->lq_sta.lq.general_params.flags |=
3665                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3666                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3667                                 CMD_ASYNC, false);
3668                 }
3669                 ret = 0;
3670                 break;
3671         }
3672         mutex_unlock(&priv->mutex);
3673
3674         return ret;
3675 }
3676
3677 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3678                                struct ieee80211_vif *vif,
3679                                enum sta_notify_cmd cmd,
3680                                struct ieee80211_sta *sta)
3681 {
3682         struct iwl_priv *priv = hw->priv;
3683         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3684         int sta_id;
3685
3686         switch (cmd) {
3687         case STA_NOTIFY_SLEEP:
3688                 WARN_ON(!sta_priv->client);
3689                 sta_priv->asleep = true;
3690                 if (atomic_read(&sta_priv->pending_frames) > 0)
3691                         ieee80211_sta_block_awake(hw, sta, true);
3692                 break;
3693         case STA_NOTIFY_AWAKE:
3694                 WARN_ON(!sta_priv->client);
3695                 if (!sta_priv->asleep)
3696                         break;
3697                 sta_priv->asleep = false;
3698                 sta_id = iwl_sta_id(sta);
3699                 if (sta_id != IWL_INVALID_STATION)
3700                         iwl_sta_modify_ps_wake(priv, sta_id);
3701                 break;
3702         default:
3703                 break;
3704         }
3705 }
3706
3707 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3708                               struct ieee80211_vif *vif,
3709                               struct ieee80211_sta *sta)
3710 {
3711         struct iwl_priv *priv = hw->priv;
3712         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3713         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3714         int ret;
3715         u8 sta_id;
3716
3717         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3718                         sta->addr);
3719         mutex_lock(&priv->mutex);
3720         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3721                         sta->addr);
3722         sta_priv->common.sta_id = IWL_INVALID_STATION;
3723
3724         atomic_set(&sta_priv->pending_frames, 0);
3725         if (vif->type == NL80211_IFTYPE_AP)
3726                 sta_priv->client = true;
3727
3728         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3729                                      &sta_id);
3730         if (ret) {
3731                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3732                         sta->addr, ret);
3733                 /* Should we return success if return code is EEXIST ? */
3734                 mutex_unlock(&priv->mutex);
3735                 return ret;
3736         }
3737
3738         sta_priv->common.sta_id = sta_id;
3739
3740         /* Initialize rate scaling */
3741         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3742                        sta->addr);
3743         iwl_rs_rate_init(priv, sta, sta_id);
3744         mutex_unlock(&priv->mutex);
3745
3746         return 0;
3747 }
3748
3749 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3750                                    struct ieee80211_channel_switch *ch_switch)
3751 {
3752         struct iwl_priv *priv = hw->priv;
3753         const struct iwl_channel_info *ch_info;
3754         struct ieee80211_conf *conf = &hw->conf;
3755         struct ieee80211_channel *channel = ch_switch->channel;
3756         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3757         /*
3758          * MULTI-FIXME
3759          * When we add support for multiple interfaces, we need to
3760          * revisit this. The channel switch command in the device
3761          * only affects the BSS context, but what does that really
3762          * mean? And what if we get a CSA on the second interface?
3763          * This needs a lot of work.
3764          */
3765         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3766         u16 ch;
3767         unsigned long flags = 0;
3768
3769         IWL_DEBUG_MAC80211(priv, "enter\n");
3770
3771         if (iwl_is_rfkill(priv))
3772                 goto out_exit;
3773
3774         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3775             test_bit(STATUS_SCANNING, &priv->status))
3776                 goto out_exit;
3777
3778         if (!iwl_is_associated_ctx(ctx))
3779                 goto out_exit;
3780
3781         /* channel switch in progress */
3782         if (priv->switch_rxon.switch_in_progress == true)
3783                 goto out_exit;
3784
3785         mutex_lock(&priv->mutex);
3786         if (priv->cfg->ops->lib->set_channel_switch) {
3787
3788                 ch = channel->hw_value;
3789                 if (le16_to_cpu(ctx->active.channel) != ch) {
3790                         ch_info = iwl_get_channel_info(priv,
3791                                                        channel->band,
3792                                                        ch);
3793                         if (!is_channel_valid(ch_info)) {
3794                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3795                                 goto out;
3796                         }
3797                         spin_lock_irqsave(&priv->lock, flags);
3798
3799                         priv->current_ht_config.smps = conf->smps_mode;
3800
3801                         /* Configure HT40 channels */
3802                         ht_conf->is_ht = conf_is_ht(conf);
3803                         if (ht_conf->is_ht) {
3804                                 if (conf_is_ht40_minus(conf)) {
3805                                         ht_conf->extension_chan_offset =
3806                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3807                                         ht_conf->is_40mhz = true;
3808                                 } else if (conf_is_ht40_plus(conf)) {
3809                                         ht_conf->extension_chan_offset =
3810                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3811                                         ht_conf->is_40mhz = true;
3812                                 } else {
3813                                         ht_conf->extension_chan_offset =
3814                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3815                                         ht_conf->is_40mhz = false;
3816                                 }
3817                         } else
3818                                 ht_conf->is_40mhz = false;
3819
3820                         if ((le16_to_cpu(ctx->staging.channel) != ch))
3821                                 ctx->staging.flags = 0;
3822
3823                         iwl_set_rxon_channel(priv, channel, ctx);
3824                         iwl_set_rxon_ht(priv, ht_conf);
3825                         iwl_set_flags_for_band(priv, ctx, channel->band,
3826                                                priv->vif);
3827                         spin_unlock_irqrestore(&priv->lock, flags);
3828
3829                         iwl_set_rate(priv);
3830                         /*
3831                          * at this point, staging_rxon has the
3832                          * configuration for channel switch
3833                          */
3834                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3835                                                                     ch_switch))
3836                                 priv->switch_rxon.switch_in_progress = false;
3837                 }
3838         }
3839 out:
3840         mutex_unlock(&priv->mutex);
3841 out_exit:
3842         if (!priv->switch_rxon.switch_in_progress)
3843                 ieee80211_chswitch_done(priv->vif, false);
3844         IWL_DEBUG_MAC80211(priv, "leave\n");
3845 }
3846
3847 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3848                                     unsigned int changed_flags,
3849                                     unsigned int *total_flags,
3850                                     u64 multicast)
3851 {
3852         struct iwl_priv *priv = hw->priv;
3853         __le32 filter_or = 0, filter_nand = 0;
3854         struct iwl_rxon_context *ctx;
3855
3856 #define CHK(test, flag) do { \
3857         if (*total_flags & (test))              \
3858                 filter_or |= (flag);            \
3859         else                                    \
3860                 filter_nand |= (flag);          \
3861         } while (0)
3862
3863         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3864                         changed_flags, *total_flags);
3865
3866         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3867         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3868         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3869
3870 #undef CHK
3871
3872         mutex_lock(&priv->mutex);
3873
3874         for_each_context(priv, ctx) {
3875                 ctx->staging.filter_flags &= ~filter_nand;
3876                 ctx->staging.filter_flags |= filter_or;
3877                 iwlcore_commit_rxon(priv, ctx);
3878         }
3879
3880         mutex_unlock(&priv->mutex);
3881
3882         /*
3883          * Receiving all multicast frames is always enabled by the
3884          * default flags setup in iwl_connection_init_rx_config()
3885          * since we currently do not support programming multicast
3886          * filters into the device.
3887          */
3888         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3889                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3890 }
3891
3892 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3893 {
3894         struct iwl_priv *priv = hw->priv;
3895
3896         mutex_lock(&priv->mutex);
3897         IWL_DEBUG_MAC80211(priv, "enter\n");
3898
3899         /* do not support "flush" */
3900         if (!priv->cfg->ops->lib->txfifo_flush)
3901                 goto done;
3902
3903         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3904                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3905                 goto done;
3906         }
3907         if (iwl_is_rfkill(priv)) {
3908                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3909                 goto done;
3910         }
3911
3912         /*
3913          * mac80211 will not push any more frames for transmit
3914          * until the flush is completed
3915          */
3916         if (drop) {
3917                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3918                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3919                         IWL_ERR(priv, "flush request fail\n");
3920                         goto done;
3921                 }
3922         }
3923         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3924         iwlagn_wait_tx_queue_empty(priv);
3925 done:
3926         mutex_unlock(&priv->mutex);
3927         IWL_DEBUG_MAC80211(priv, "leave\n");
3928 }
3929
3930 /*****************************************************************************
3931  *
3932  * driver setup and teardown
3933  *
3934  *****************************************************************************/
3935
3936 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3937 {
3938         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3939
3940         init_waitqueue_head(&priv->wait_command_queue);
3941
3942         INIT_WORK(&priv->restart, iwl_bg_restart);
3943         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3944         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3945         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3946         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3947         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3948         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3949         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3950         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3951
3952         iwl_setup_scan_deferred_work(priv);
3953
3954         if (priv->cfg->ops->lib->setup_deferred_work)
3955                 priv->cfg->ops->lib->setup_deferred_work(priv);
3956
3957         init_timer(&priv->statistics_periodic);
3958         priv->statistics_periodic.data = (unsigned long)priv;
3959         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3960
3961         init_timer(&priv->ucode_trace);
3962         priv->ucode_trace.data = (unsigned long)priv;
3963         priv->ucode_trace.function = iwl_bg_ucode_trace;
3964
3965         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3966                 init_timer(&priv->monitor_recover);
3967                 priv->monitor_recover.data = (unsigned long)priv;
3968                 priv->monitor_recover.function =
3969                         priv->cfg->ops->lib->recover_from_tx_stall;
3970         }
3971
3972         if (!priv->cfg->use_isr_legacy)
3973                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3974                         iwl_irq_tasklet, (unsigned long)priv);
3975         else
3976                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3977                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3978 }
3979
3980 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3981 {
3982         if (priv->cfg->ops->lib->cancel_deferred_work)
3983                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3984
3985         cancel_delayed_work_sync(&priv->init_alive_start);
3986         cancel_delayed_work(&priv->scan_check);
3987         cancel_work_sync(&priv->start_internal_scan);
3988         cancel_delayed_work(&priv->alive_start);
3989         cancel_work_sync(&priv->run_time_calib_work);
3990         cancel_work_sync(&priv->beacon_update);
3991         cancel_work_sync(&priv->bt_full_concurrency);
3992         cancel_work_sync(&priv->bt_runtime_config);
3993         del_timer_sync(&priv->statistics_periodic);
3994         del_timer_sync(&priv->ucode_trace);
3995 }
3996
3997 static void iwl_init_hw_rates(struct iwl_priv *priv,
3998                               struct ieee80211_rate *rates)
3999 {
4000         int i;
4001
4002         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
4003                 rates[i].bitrate = iwl_rates[i].ieee * 5;
4004                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4005                 rates[i].hw_value_short = i;
4006                 rates[i].flags = 0;
4007                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
4008                         /*
4009                          * If CCK != 1M then set short preamble rate flag.
4010                          */
4011                         rates[i].flags |=
4012                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4013                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
4014                 }
4015         }
4016 }
4017
4018 static int iwl_init_drv(struct iwl_priv *priv)
4019 {
4020         int ret;
4021
4022         priv->ibss_beacon = NULL;
4023
4024         spin_lock_init(&priv->sta_lock);
4025         spin_lock_init(&priv->hcmd_lock);
4026
4027         INIT_LIST_HEAD(&priv->free_frames);
4028
4029         mutex_init(&priv->mutex);
4030         mutex_init(&priv->sync_cmd_mutex);
4031
4032         priv->ieee_channels = NULL;
4033         priv->ieee_rates = NULL;
4034         priv->band = IEEE80211_BAND_2GHZ;
4035
4036         priv->iw_mode = NL80211_IFTYPE_STATION;
4037         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4038         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4039         priv->_agn.agg_tids_count = 0;
4040
4041         /* initialize force reset */
4042         priv->force_reset[IWL_RF_RESET].reset_duration =
4043                 IWL_DELAY_NEXT_FORCE_RF_RESET;
4044         priv->force_reset[IWL_FW_RESET].reset_duration =
4045                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4046
4047         /* Choose which receivers/antennas to use */
4048         if (priv->cfg->ops->hcmd->set_rxon_chain)
4049                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
4050                                         &priv->contexts[IWL_RXON_CTX_BSS]);
4051
4052         iwl_init_scan_params(priv);
4053
4054         /* init bt coex */
4055         if (priv->cfg->advanced_bt_coexist) {
4056                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
4057                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
4058                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
4059                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4060                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4061                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4062                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4063         }
4064
4065         /* Set the tx_power_user_lmt to the lowest power level
4066          * this value will get overwritten by channel max power avg
4067          * from eeprom */
4068         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4069
4070         ret = iwl_init_channel_map(priv);
4071         if (ret) {
4072                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4073                 goto err;
4074         }
4075
4076         ret = iwlcore_init_geos(priv);
4077         if (ret) {
4078                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4079                 goto err_free_channel_map;
4080         }
4081         iwl_init_hw_rates(priv, priv->ieee_rates);
4082
4083         return 0;
4084
4085 err_free_channel_map:
4086         iwl_free_channel_map(priv);
4087 err:
4088         return ret;
4089 }
4090
4091 static void iwl_uninit_drv(struct iwl_priv *priv)
4092 {
4093         iwl_calib_free_results(priv);
4094         iwlcore_free_geos(priv);
4095         iwl_free_channel_map(priv);
4096         kfree(priv->scan_cmd);
4097 }
4098
4099 static struct ieee80211_ops iwl_hw_ops = {
4100         .tx = iwl_mac_tx,
4101         .start = iwl_mac_start,
4102         .stop = iwl_mac_stop,
4103         .add_interface = iwl_mac_add_interface,
4104         .remove_interface = iwl_mac_remove_interface,
4105         .config = iwl_mac_config,
4106         .configure_filter = iwlagn_configure_filter,
4107         .set_key = iwl_mac_set_key,
4108         .update_tkip_key = iwl_mac_update_tkip_key,
4109         .conf_tx = iwl_mac_conf_tx,
4110         .reset_tsf = iwl_mac_reset_tsf,
4111         .bss_info_changed = iwl_bss_info_changed,
4112         .ampdu_action = iwl_mac_ampdu_action,
4113         .hw_scan = iwl_mac_hw_scan,
4114         .sta_notify = iwl_mac_sta_notify,
4115         .sta_add = iwlagn_mac_sta_add,
4116         .sta_remove = iwl_mac_sta_remove,
4117         .channel_switch = iwl_mac_channel_switch,
4118         .flush = iwl_mac_flush,
4119         .tx_last_beacon = iwl_mac_tx_last_beacon,
4120 };
4121
4122 static void iwl_hw_detect(struct iwl_priv *priv)
4123 {
4124         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4125         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4126         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4127         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4128 }
4129
4130 static int iwl_set_hw_params(struct iwl_priv *priv)
4131 {
4132         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4133         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4134         if (priv->cfg->mod_params->amsdu_size_8K)
4135                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4136         else
4137                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4138
4139         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4140
4141         if (priv->cfg->mod_params->disable_11n)
4142                 priv->cfg->sku &= ~IWL_SKU_N;
4143
4144         /* Device-specific setup */
4145         return priv->cfg->ops->lib->set_hw_params(priv);
4146 }
4147
4148 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4149 {
4150         int err = 0, i;
4151         struct iwl_priv *priv;
4152         struct ieee80211_hw *hw;
4153         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4154         unsigned long flags;
4155         u16 pci_cmd, num_mac;
4156
4157         /************************
4158          * 1. Allocating HW data
4159          ************************/
4160
4161         /* Disabling hardware scan means that mac80211 will perform scans
4162          * "the hard way", rather than using device's scan. */
4163         if (cfg->mod_params->disable_hw_scan) {
4164                 if (iwl_debug_level & IWL_DL_INFO)
4165                         dev_printk(KERN_DEBUG, &(pdev->dev),
4166                                    "Disabling hw_scan\n");
4167                 iwl_hw_ops.hw_scan = NULL;
4168         }
4169
4170         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4171         if (!hw) {
4172                 err = -ENOMEM;
4173                 goto out;
4174         }
4175         priv = hw->priv;
4176         /* At this point both hw and priv are allocated. */
4177
4178         /*
4179          * The default context is always valid,
4180          * more may be discovered when firmware
4181          * is loaded.
4182          */
4183         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4184
4185         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4186                 priv->contexts[i].ctxid = i;
4187
4188         SET_IEEE80211_DEV(hw, &pdev->dev);
4189
4190         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4191         priv->cfg = cfg;
4192         priv->pci_dev = pdev;
4193         priv->inta_mask = CSR_INI_SET_MASK;
4194
4195         /* is antenna coupling more than 35dB ? */
4196         priv->bt_ant_couple_ok =
4197                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4198                 true : false;
4199
4200         /* enable/disable bt channel announcement */
4201         priv->bt_ch_announce = iwlagn_bt_ch_announce;
4202
4203         if (iwl_alloc_traffic_mem(priv))
4204                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4205
4206         /**************************
4207          * 2. Initializing PCI bus
4208          **************************/
4209         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4210                                 PCIE_LINK_STATE_CLKPM);
4211
4212         if (pci_enable_device(pdev)) {
4213                 err = -ENODEV;
4214                 goto out_ieee80211_free_hw;
4215         }
4216
4217         pci_set_master(pdev);
4218
4219         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4220         if (!err)
4221                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4222         if (err) {
4223                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4224                 if (!err)
4225                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4226                 /* both attempts failed: */
4227                 if (err) {
4228                         IWL_WARN(priv, "No suitable DMA available.\n");
4229                         goto out_pci_disable_device;
4230                 }
4231         }
4232
4233         err = pci_request_regions(pdev, DRV_NAME);
4234         if (err)
4235                 goto out_pci_disable_device;
4236
4237         pci_set_drvdata(pdev, priv);
4238
4239
4240         /***********************
4241          * 3. Read REV register
4242          ***********************/
4243         priv->hw_base = pci_iomap(pdev, 0, 0);
4244         if (!priv->hw_base) {
4245                 err = -ENODEV;
4246                 goto out_pci_release_regions;
4247         }
4248
4249         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4250                 (unsigned long long) pci_resource_len(pdev, 0));
4251         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4252
4253         /* these spin locks will be used in apm_ops.init and EEPROM access
4254          * we should init now
4255          */
4256         spin_lock_init(&priv->reg_lock);
4257         spin_lock_init(&priv->lock);
4258
4259         /*
4260          * stop and reset the on-board processor just in case it is in a
4261          * strange state ... like being left stranded by a primary kernel
4262          * and this is now the kdump kernel trying to start up
4263          */
4264         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4265
4266         iwl_hw_detect(priv);
4267         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4268                 priv->cfg->name, priv->hw_rev);
4269
4270         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4271          * PCI Tx retries from interfering with C3 CPU state */
4272         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4273
4274         iwl_prepare_card_hw(priv);
4275         if (!priv->hw_ready) {
4276                 IWL_WARN(priv, "Failed, HW not ready\n");
4277                 goto out_iounmap;
4278         }
4279
4280         /*****************
4281          * 4. Read EEPROM
4282          *****************/
4283         /* Read the EEPROM */
4284         err = iwl_eeprom_init(priv);
4285         if (err) {
4286                 IWL_ERR(priv, "Unable to init EEPROM\n");
4287                 goto out_iounmap;
4288         }
4289         err = iwl_eeprom_check_version(priv);
4290         if (err)
4291                 goto out_free_eeprom;
4292
4293         /* extract MAC Address */
4294         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4295         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4296         priv->hw->wiphy->addresses = priv->addresses;
4297         priv->hw->wiphy->n_addresses = 1;
4298         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4299         if (num_mac > 1) {
4300                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4301                        ETH_ALEN);
4302                 priv->addresses[1].addr[5]++;
4303                 priv->hw->wiphy->n_addresses++;
4304         }
4305
4306         /************************
4307          * 5. Setup HW constants
4308          ************************/
4309         if (iwl_set_hw_params(priv)) {
4310                 IWL_ERR(priv, "failed to set hw parameters\n");
4311                 goto out_free_eeprom;
4312         }
4313
4314         /*******************
4315          * 6. Setup priv
4316          *******************/
4317
4318         err = iwl_init_drv(priv);
4319         if (err)
4320                 goto out_free_eeprom;
4321         /* At this point both hw and priv are initialized. */
4322
4323         /********************
4324          * 7. Setup services
4325          ********************/
4326         spin_lock_irqsave(&priv->lock, flags);
4327         iwl_disable_interrupts(priv);
4328         spin_unlock_irqrestore(&priv->lock, flags);
4329
4330         pci_enable_msi(priv->pci_dev);
4331
4332         iwl_alloc_isr_ict(priv);
4333         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4334                           IRQF_SHARED, DRV_NAME, priv);
4335         if (err) {
4336                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4337                 goto out_disable_msi;
4338         }
4339
4340         iwl_setup_deferred_work(priv);
4341         iwl_setup_rx_handlers(priv);
4342
4343         /*********************************************
4344          * 8. Enable interrupts and read RFKILL state
4345          *********************************************/
4346
4347         /* enable interrupts if needed: hw bug w/a */
4348         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4349         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4350                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4351                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4352         }
4353
4354         iwl_enable_interrupts(priv);
4355
4356         /* If platform's RF_KILL switch is NOT set to KILL */
4357         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4358                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4359         else
4360                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4361
4362         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4363                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4364
4365         iwl_power_initialize(priv);
4366         iwl_tt_initialize(priv);
4367
4368         init_completion(&priv->_agn.firmware_loading_complete);
4369
4370         err = iwl_request_firmware(priv, true);
4371         if (err)
4372                 goto out_destroy_workqueue;
4373
4374         return 0;
4375
4376  out_destroy_workqueue:
4377         destroy_workqueue(priv->workqueue);
4378         priv->workqueue = NULL;
4379         free_irq(priv->pci_dev->irq, priv);
4380         iwl_free_isr_ict(priv);
4381  out_disable_msi:
4382         pci_disable_msi(priv->pci_dev);
4383         iwl_uninit_drv(priv);
4384  out_free_eeprom:
4385         iwl_eeprom_free(priv);
4386  out_iounmap:
4387         pci_iounmap(pdev, priv->hw_base);
4388  out_pci_release_regions:
4389         pci_set_drvdata(pdev, NULL);
4390         pci_release_regions(pdev);
4391  out_pci_disable_device:
4392         pci_disable_device(pdev);
4393  out_ieee80211_free_hw:
4394         iwl_free_traffic_mem(priv);
4395         ieee80211_free_hw(priv->hw);
4396  out:
4397         return err;
4398 }
4399
4400 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4401 {
4402         struct iwl_priv *priv = pci_get_drvdata(pdev);
4403         unsigned long flags;
4404
4405         if (!priv)
4406                 return;
4407
4408         wait_for_completion(&priv->_agn.firmware_loading_complete);
4409
4410         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4411
4412         iwl_dbgfs_unregister(priv);
4413         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4414
4415         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4416          * to be called and iwl_down since we are removing the device
4417          * we need to set STATUS_EXIT_PENDING bit.
4418          */
4419         set_bit(STATUS_EXIT_PENDING, &priv->status);
4420         if (priv->mac80211_registered) {
4421                 ieee80211_unregister_hw(priv->hw);
4422                 priv->mac80211_registered = 0;
4423         } else {
4424                 iwl_down(priv);
4425         }
4426
4427         /*
4428          * Make sure device is reset to low power before unloading driver.
4429          * This may be redundant with iwl_down(), but there are paths to
4430          * run iwl_down() without calling apm_ops.stop(), and there are
4431          * paths to avoid running iwl_down() at all before leaving driver.
4432          * This (inexpensive) call *makes sure* device is reset.
4433          */
4434         priv->cfg->ops->lib->apm_ops.stop(priv);
4435
4436         iwl_tt_exit(priv);
4437
4438         /* make sure we flush any pending irq or
4439          * tasklet for the driver
4440          */
4441         spin_lock_irqsave(&priv->lock, flags);
4442         iwl_disable_interrupts(priv);
4443         spin_unlock_irqrestore(&priv->lock, flags);
4444
4445         iwl_synchronize_irq(priv);
4446
4447         iwl_dealloc_ucode_pci(priv);
4448
4449         if (priv->rxq.bd)
4450                 iwlagn_rx_queue_free(priv, &priv->rxq);
4451         iwlagn_hw_txq_ctx_free(priv);
4452
4453         iwl_eeprom_free(priv);
4454
4455
4456         /*netif_stop_queue(dev); */
4457         flush_workqueue(priv->workqueue);
4458
4459         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4460          * priv->workqueue... so we can't take down the workqueue
4461          * until now... */
4462         destroy_workqueue(priv->workqueue);
4463         priv->workqueue = NULL;
4464         iwl_free_traffic_mem(priv);
4465
4466         free_irq(priv->pci_dev->irq, priv);
4467         pci_disable_msi(priv->pci_dev);
4468         pci_iounmap(pdev, priv->hw_base);
4469         pci_release_regions(pdev);
4470         pci_disable_device(pdev);
4471         pci_set_drvdata(pdev, NULL);
4472
4473         iwl_uninit_drv(priv);
4474
4475         iwl_free_isr_ict(priv);
4476
4477         if (priv->ibss_beacon)
4478                 dev_kfree_skb(priv->ibss_beacon);
4479
4480         ieee80211_free_hw(priv->hw);
4481 }
4482
4483
4484 /*****************************************************************************
4485  *
4486  * driver and module entry point
4487  *
4488  *****************************************************************************/
4489
4490 /* Hardware specific file defines the PCI IDs table for that hardware module */
4491 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4492 #ifdef CONFIG_IWL4965
4493         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4494         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4495 #endif /* CONFIG_IWL4965 */
4496 #ifdef CONFIG_IWL5000
4497 /* 5100 Series WiFi */
4498         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4499         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4500         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4501         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4502         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4503         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4504         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4505         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4506         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4507         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4508         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4509         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4510         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4511         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4512         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4513         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4514         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4515         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4516         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4517         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4518         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4519         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4520         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4521         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4522
4523 /* 5300 Series WiFi */
4524         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4525         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4526         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4527         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4528         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4529         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4530         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4531         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4532         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4533         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4534         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4535         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4536
4537 /* 5350 Series WiFi/WiMax */
4538         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4539         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4540         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4541
4542 /* 5150 Series Wifi/WiMax */
4543         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4544         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4545         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4546         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4547         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4548         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4549
4550         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4551         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4552         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4553         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4554
4555 /* 6x00 Series */
4556         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4557         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4558         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4559         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4560         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4561         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4562         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4563         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4564         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4565         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4566
4567 /* 6x00 Series Gen2a */
4568         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4569         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4570         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4571         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4572         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4573         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4574         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4575         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4576         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4577         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4578         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4579         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4580         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4581         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4582
4583 /* 6x00 Series Gen2b */
4584         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4585         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4586         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4587         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4588         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4589         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4590         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4591         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4592         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4593         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4594         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4595         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4596         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4597         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4598         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4599         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4600         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4601         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4602         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4603         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4604         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4605         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4606         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4607         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4608         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4609         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4610         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4611         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4612
4613 /* 6x50 WiFi/WiMax Series */
4614         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4615         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4616         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4617         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4618         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4619         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4620
4621 /* 6x50 WiFi/WiMax Series Gen2 */
4622         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4623         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4624         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4625         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4626         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4627         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4628
4629 /* 1000 Series WiFi */
4630         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4631         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4632         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4633         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4634         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4635         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4636         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4637         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4638         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4639         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4640         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4641         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4642 #endif /* CONFIG_IWL5000 */
4643
4644         {0}
4645 };
4646 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4647
4648 static struct pci_driver iwl_driver = {
4649         .name = DRV_NAME,
4650         .id_table = iwl_hw_card_ids,
4651         .probe = iwl_pci_probe,
4652         .remove = __devexit_p(iwl_pci_remove),
4653 #ifdef CONFIG_PM
4654         .suspend = iwl_pci_suspend,
4655         .resume = iwl_pci_resume,
4656 #endif
4657 };
4658
4659 static int __init iwl_init(void)
4660 {
4661
4662         int ret;
4663         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4664         pr_info(DRV_COPYRIGHT "\n");
4665
4666         ret = iwlagn_rate_control_register();
4667         if (ret) {
4668                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4669                 return ret;
4670         }
4671
4672         ret = pci_register_driver(&iwl_driver);
4673         if (ret) {
4674                 pr_err("Unable to initialize PCI module\n");
4675                 goto error_register;
4676         }
4677
4678         return ret;
4679
4680 error_register:
4681         iwlagn_rate_control_unregister();
4682         return ret;
4683 }
4684
4685 static void __exit iwl_exit(void)
4686 {
4687         pci_unregister_driver(&iwl_driver);
4688         iwlagn_rate_control_unregister();
4689 }
4690
4691 module_exit(iwl_exit);
4692 module_init(iwl_init);
4693
4694 #ifdef CONFIG_IWLWIFI_DEBUG
4695 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4696 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4697 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4698 MODULE_PARM_DESC(debug, "debug output mask");
4699 #endif
4700
4701 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4702 MODULE_PARM_DESC(swcrypto50,
4703                  "using crypto in software (default 0 [hardware]) (deprecated)");
4704 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4705 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4706 module_param_named(queues_num50,
4707                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4708 MODULE_PARM_DESC(queues_num50,
4709                  "number of hw queues in 50xx series (deprecated)");
4710 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4711 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4712 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4713 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4714 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4715 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4716 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4717                    int, S_IRUGO);
4718 MODULE_PARM_DESC(amsdu_size_8K50,
4719                  "enable 8K amsdu size in 50XX series (deprecated)");
4720 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4721                    int, S_IRUGO);
4722 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4723 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4724 MODULE_PARM_DESC(fw_restart50,
4725                  "restart firmware in case of error (deprecated)");
4726 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4727 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4728 module_param_named(
4729         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4730 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4731
4732 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4733                    S_IRUGO);
4734 MODULE_PARM_DESC(ucode_alternative,
4735                  "specify ucode alternative to use from ucode file");
4736
4737 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4738 MODULE_PARM_DESC(antenna_coupling,
4739                  "specify antenna coupling in dB (defualt: 0 dB)");
4740
4741 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4742 MODULE_PARM_DESC(bt_ch_announce,
4743                  "Enable BT channel announcement mode (default: enable)");