iwlwifi: enable experimental ucode support
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-calib.h"
61 #include "iwl-agn.h"
62
63
64 /******************************************************************************
65  *
66  * module boiler plate
67  *
68  ******************************************************************************/
69
70 /*
71  * module name, copyright, version, etc.
72  */
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
74
75 #ifdef CONFIG_IWLWIFI_DEBUG
76 #define VD "d"
77 #else
78 #define VD
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /**
91  * iwl_commit_rxon - commit staging_rxon to hardware
92  *
93  * The RXON command in staging_rxon is committed to the hardware and
94  * the active_rxon structure is updated with the new data.  This
95  * function correctly transitions out of the RXON_ASSOC_MSK state if
96  * a HW tune is required based on the RXON structure changes.
97  */
98 int iwl_commit_rxon(struct iwl_priv *priv)
99 {
100         /* cast away the const for active_rxon in this function */
101         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
102         int ret;
103         bool new_assoc =
104                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
105
106         if (!iwl_is_alive(priv))
107                 return -EBUSY;
108
109         /* always get timestamp with Rx frame */
110         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
111
112         ret = iwl_check_rxon_cmd(priv);
113         if (ret) {
114                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
115                 return -EINVAL;
116         }
117
118         /*
119          * receive commit_rxon request
120          * abort any previous channel switch if still in process
121          */
122         if (priv->switch_rxon.switch_in_progress &&
123             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
124                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
125                       le16_to_cpu(priv->switch_rxon.channel));
126                 iwl_chswitch_done(priv, false);
127         }
128
129         /* If we don't need to send a full RXON, we can use
130          * iwl_rxon_assoc_cmd which is used to reconfigure filter
131          * and other flags for the current radio configuration. */
132         if (!iwl_full_rxon_required(priv)) {
133                 ret = iwl_send_rxon_assoc(priv);
134                 if (ret) {
135                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
136                         return ret;
137                 }
138
139                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
140                 iwl_print_rx_config_cmd(priv);
141                 return 0;
142         }
143
144         /* If we are currently associated and the new config requires
145          * an RXON_ASSOC and the new config wants the associated mask enabled,
146          * we must clear the associated from the active configuration
147          * before we apply the new config */
148         if (iwl_is_associated(priv) && new_assoc) {
149                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
150                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
151
152                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
153                                       sizeof(struct iwl_rxon_cmd),
154                                       &priv->active_rxon);
155
156                 /* If the mask clearing failed then we set
157                  * active_rxon back to what it was previously */
158                 if (ret) {
159                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
160                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
161                         return ret;
162                 }
163                 iwl_clear_ucode_stations(priv);
164                 iwl_restore_stations(priv);
165                 ret = iwl_restore_default_wep_keys(priv);
166                 if (ret) {
167                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
168                         return ret;
169                 }
170         }
171
172         IWL_DEBUG_INFO(priv, "Sending RXON\n"
173                        "* with%s RXON_FILTER_ASSOC_MSK\n"
174                        "* channel = %d\n"
175                        "* bssid = %pM\n",
176                        (new_assoc ? "" : "out"),
177                        le16_to_cpu(priv->staging_rxon.channel),
178                        priv->staging_rxon.bssid_addr);
179
180         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
181
182         /* Apply the new configuration
183          * RXON unassoc clears the station table in uCode so restoration of
184          * stations is needed after it (the RXON command) completes
185          */
186         if (!new_assoc) {
187                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
188                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
189                 if (ret) {
190                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
191                         return ret;
192                 }
193                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
194                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
195                 iwl_clear_ucode_stations(priv);
196                 iwl_restore_stations(priv);
197                 ret = iwl_restore_default_wep_keys(priv);
198                 if (ret) {
199                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
200                         return ret;
201                 }
202         }
203
204         priv->start_calib = 0;
205         if (new_assoc) {
206                 /* Apply the new configuration
207                  * RXON assoc doesn't clear the station table in uCode,
208                  */
209                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
210                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
211                 if (ret) {
212                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
213                         return ret;
214                 }
215                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
216         }
217         iwl_print_rx_config_cmd(priv);
218
219         iwl_init_sensitivity(priv);
220
221         /* If we issue a new RXON command which required a tune then we must
222          * send a new TXPOWER command or we won't be able to Tx any frames */
223         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
224         if (ret) {
225                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
226                 return ret;
227         }
228
229         return 0;
230 }
231
232 void iwl_update_chain_flags(struct iwl_priv *priv)
233 {
234
235         if (priv->cfg->ops->hcmd->set_rxon_chain)
236                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
237         iwlcore_commit_rxon(priv);
238 }
239
240 static void iwl_clear_free_frames(struct iwl_priv *priv)
241 {
242         struct list_head *element;
243
244         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
245                        priv->frames_count);
246
247         while (!list_empty(&priv->free_frames)) {
248                 element = priv->free_frames.next;
249                 list_del(element);
250                 kfree(list_entry(element, struct iwl_frame, list));
251                 priv->frames_count--;
252         }
253
254         if (priv->frames_count) {
255                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
256                             priv->frames_count);
257                 priv->frames_count = 0;
258         }
259 }
260
261 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
262 {
263         struct iwl_frame *frame;
264         struct list_head *element;
265         if (list_empty(&priv->free_frames)) {
266                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
267                 if (!frame) {
268                         IWL_ERR(priv, "Could not allocate frame!\n");
269                         return NULL;
270                 }
271
272                 priv->frames_count++;
273                 return frame;
274         }
275
276         element = priv->free_frames.next;
277         list_del(element);
278         return list_entry(element, struct iwl_frame, list);
279 }
280
281 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
282 {
283         memset(frame, 0, sizeof(*frame));
284         list_add(&frame->list, &priv->free_frames);
285 }
286
287 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
288                                           struct ieee80211_hdr *hdr,
289                                           int left)
290 {
291         if (!priv->ibss_beacon)
292                 return 0;
293
294         if (priv->ibss_beacon->len > left)
295                 return 0;
296
297         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
298
299         return priv->ibss_beacon->len;
300 }
301
302 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
303 static void iwl_set_beacon_tim(struct iwl_priv *priv,
304                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
305                 u8 *beacon, u32 frame_size)
306 {
307         u16 tim_idx;
308         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
309
310         /*
311          * The index is relative to frame start but we start looking at the
312          * variable-length part of the beacon.
313          */
314         tim_idx = mgmt->u.beacon.variable - beacon;
315
316         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
317         while ((tim_idx < (frame_size - 2)) &&
318                         (beacon[tim_idx] != WLAN_EID_TIM))
319                 tim_idx += beacon[tim_idx+1] + 2;
320
321         /* If TIM field was found, set variables */
322         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
323                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
324                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
325         } else
326                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
327 }
328
329 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
330                                        struct iwl_frame *frame)
331 {
332         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
333         u32 frame_size;
334         u32 rate_flags;
335         u32 rate;
336         /*
337          * We have to set up the TX command, the TX Beacon command, and the
338          * beacon contents.
339          */
340
341         /* Initialize memory */
342         tx_beacon_cmd = &frame->u.beacon;
343         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
344
345         /* Set up TX beacon contents */
346         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
347                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
348         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
349                 return 0;
350
351         /* Set up TX command fields */
352         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
353         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
354         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
355         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
356                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
357
358         /* Set up TX beacon command fields */
359         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
360                         frame_size);
361
362         /* Set up packet rate and flags */
363         rate = iwl_rate_get_lowest_plcp(priv);
364         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
365                                               priv->hw_params.valid_tx_ant);
366         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
367         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
368                 rate_flags |= RATE_MCS_CCK_MSK;
369         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
370                         rate_flags);
371
372         return sizeof(*tx_beacon_cmd) + frame_size;
373 }
374 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
375 {
376         struct iwl_frame *frame;
377         unsigned int frame_size;
378         int rc;
379
380         frame = iwl_get_free_frame(priv);
381         if (!frame) {
382                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
383                           "command.\n");
384                 return -ENOMEM;
385         }
386
387         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
388         if (!frame_size) {
389                 IWL_ERR(priv, "Error configuring the beacon command\n");
390                 iwl_free_frame(priv, frame);
391                 return -EINVAL;
392         }
393
394         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
395                               &frame->u.cmd[0]);
396
397         iwl_free_frame(priv, frame);
398
399         return rc;
400 }
401
402 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
403 {
404         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
405
406         dma_addr_t addr = get_unaligned_le32(&tb->lo);
407         if (sizeof(dma_addr_t) > sizeof(u32))
408                 addr |=
409                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
410
411         return addr;
412 }
413
414 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
415 {
416         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
417
418         return le16_to_cpu(tb->hi_n_len) >> 4;
419 }
420
421 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
422                                   dma_addr_t addr, u16 len)
423 {
424         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
425         u16 hi_n_len = len << 4;
426
427         put_unaligned_le32(addr, &tb->lo);
428         if (sizeof(dma_addr_t) > sizeof(u32))
429                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
430
431         tb->hi_n_len = cpu_to_le16(hi_n_len);
432
433         tfd->num_tbs = idx + 1;
434 }
435
436 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
437 {
438         return tfd->num_tbs & 0x1f;
439 }
440
441 /**
442  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
443  * @priv - driver private data
444  * @txq - tx queue
445  *
446  * Does NOT advance any TFD circular buffer read/write indexes
447  * Does NOT free the TFD itself (which is within circular buffer)
448  */
449 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
450 {
451         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
452         struct iwl_tfd *tfd;
453         struct pci_dev *dev = priv->pci_dev;
454         int index = txq->q.read_ptr;
455         int i;
456         int num_tbs;
457
458         tfd = &tfd_tmp[index];
459
460         /* Sanity check on number of chunks */
461         num_tbs = iwl_tfd_get_num_tbs(tfd);
462
463         if (num_tbs >= IWL_NUM_OF_TBS) {
464                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
465                 /* @todo issue fatal error, it is quite serious situation */
466                 return;
467         }
468
469         /* Unmap tx_cmd */
470         if (num_tbs)
471                 pci_unmap_single(dev,
472                                 dma_unmap_addr(&txq->meta[index], mapping),
473                                 dma_unmap_len(&txq->meta[index], len),
474                                 PCI_DMA_BIDIRECTIONAL);
475
476         /* Unmap chunks, if any. */
477         for (i = 1; i < num_tbs; i++)
478                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
479                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
480
481         /* free SKB */
482         if (txq->txb) {
483                 struct sk_buff *skb;
484
485                 skb = txq->txb[txq->q.read_ptr].skb;
486
487                 /* can be called from irqs-disabled context */
488                 if (skb) {
489                         dev_kfree_skb_any(skb);
490                         txq->txb[txq->q.read_ptr].skb = NULL;
491                 }
492         }
493 }
494
495 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
496                                  struct iwl_tx_queue *txq,
497                                  dma_addr_t addr, u16 len,
498                                  u8 reset, u8 pad)
499 {
500         struct iwl_queue *q;
501         struct iwl_tfd *tfd, *tfd_tmp;
502         u32 num_tbs;
503
504         q = &txq->q;
505         tfd_tmp = (struct iwl_tfd *)txq->tfds;
506         tfd = &tfd_tmp[q->write_ptr];
507
508         if (reset)
509                 memset(tfd, 0, sizeof(*tfd));
510
511         num_tbs = iwl_tfd_get_num_tbs(tfd);
512
513         /* Each TFD can point to a maximum 20 Tx buffers */
514         if (num_tbs >= IWL_NUM_OF_TBS) {
515                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
516                           IWL_NUM_OF_TBS);
517                 return -EINVAL;
518         }
519
520         BUG_ON(addr & ~DMA_BIT_MASK(36));
521         if (unlikely(addr & ~IWL_TX_DMA_MASK))
522                 IWL_ERR(priv, "Unaligned address = %llx\n",
523                           (unsigned long long)addr);
524
525         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
526
527         return 0;
528 }
529
530 /*
531  * Tell nic where to find circular buffer of Tx Frame Descriptors for
532  * given Tx queue, and enable the DMA channel used for that queue.
533  *
534  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
535  * channels supported in hardware.
536  */
537 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
538                          struct iwl_tx_queue *txq)
539 {
540         int txq_id = txq->q.id;
541
542         /* Circular buffer (TFD queue in DRAM) physical base address */
543         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
544                              txq->q.dma_addr >> 8);
545
546         return 0;
547 }
548
549 /******************************************************************************
550  *
551  * Generic RX handler implementations
552  *
553  ******************************************************************************/
554 static void iwl_rx_reply_alive(struct iwl_priv *priv,
555                                 struct iwl_rx_mem_buffer *rxb)
556 {
557         struct iwl_rx_packet *pkt = rxb_addr(rxb);
558         struct iwl_alive_resp *palive;
559         struct delayed_work *pwork;
560
561         palive = &pkt->u.alive_frame;
562
563         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
564                        "0x%01X 0x%01X\n",
565                        palive->is_valid, palive->ver_type,
566                        palive->ver_subtype);
567
568         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
569                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
570                 memcpy(&priv->card_alive_init,
571                        &pkt->u.alive_frame,
572                        sizeof(struct iwl_init_alive_resp));
573                 pwork = &priv->init_alive_start;
574         } else {
575                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
576                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
577                        sizeof(struct iwl_alive_resp));
578                 pwork = &priv->alive_start;
579         }
580
581         /* We delay the ALIVE response by 5ms to
582          * give the HW RF Kill time to activate... */
583         if (palive->is_valid == UCODE_VALID_OK)
584                 queue_delayed_work(priv->workqueue, pwork,
585                                    msecs_to_jiffies(5));
586         else
587                 IWL_WARN(priv, "uCode did not respond OK.\n");
588 }
589
590 static void iwl_bg_beacon_update(struct work_struct *work)
591 {
592         struct iwl_priv *priv =
593                 container_of(work, struct iwl_priv, beacon_update);
594         struct sk_buff *beacon;
595
596         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
597         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
598
599         if (!beacon) {
600                 IWL_ERR(priv, "update beacon failed\n");
601                 return;
602         }
603
604         mutex_lock(&priv->mutex);
605         /* new beacon skb is allocated every time; dispose previous.*/
606         if (priv->ibss_beacon)
607                 dev_kfree_skb(priv->ibss_beacon);
608
609         priv->ibss_beacon = beacon;
610         mutex_unlock(&priv->mutex);
611
612         iwl_send_beacon_cmd(priv);
613 }
614
615 /**
616  * iwl_bg_statistics_periodic - Timer callback to queue statistics
617  *
618  * This callback is provided in order to send a statistics request.
619  *
620  * This timer function is continually reset to execute within
621  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
622  * was received.  We need to ensure we receive the statistics in order
623  * to update the temperature used for calibrating the TXPOWER.
624  */
625 static void iwl_bg_statistics_periodic(unsigned long data)
626 {
627         struct iwl_priv *priv = (struct iwl_priv *)data;
628
629         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
630                 return;
631
632         /* dont send host command if rf-kill is on */
633         if (!iwl_is_ready_rf(priv))
634                 return;
635
636         iwl_send_statistics_request(priv, CMD_ASYNC, false);
637 }
638
639
640 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
641                                         u32 start_idx, u32 num_events,
642                                         u32 mode)
643 {
644         u32 i;
645         u32 ptr;        /* SRAM byte address of log data */
646         u32 ev, time, data; /* event log data */
647         unsigned long reg_flags;
648
649         if (mode == 0)
650                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
651         else
652                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
653
654         /* Make sure device is powered up for SRAM reads */
655         spin_lock_irqsave(&priv->reg_lock, reg_flags);
656         if (iwl_grab_nic_access(priv)) {
657                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
658                 return;
659         }
660
661         /* Set starting address; reads will auto-increment */
662         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
663         rmb();
664
665         /*
666          * "time" is actually "data" for mode 0 (no timestamp).
667          * place event id # at far right for easier visual parsing.
668          */
669         for (i = 0; i < num_events; i++) {
670                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
671                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
672                 if (mode == 0) {
673                         trace_iwlwifi_dev_ucode_cont_event(priv,
674                                                         0, time, ev);
675                 } else {
676                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
677                         trace_iwlwifi_dev_ucode_cont_event(priv,
678                                                 time, data, ev);
679                 }
680         }
681         /* Allow device to power down */
682         iwl_release_nic_access(priv);
683         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
684 }
685
686 static void iwl_continuous_event_trace(struct iwl_priv *priv)
687 {
688         u32 capacity;   /* event log capacity in # entries */
689         u32 base;       /* SRAM byte address of event log header */
690         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
691         u32 num_wraps;  /* # times uCode wrapped to top of log */
692         u32 next_entry; /* index of next entry to be written by uCode */
693
694         if (priv->ucode_type == UCODE_INIT)
695                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
696         else
697                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
698         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
699                 capacity = iwl_read_targ_mem(priv, base);
700                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
701                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
702                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
703         } else
704                 return;
705
706         if (num_wraps == priv->event_log.num_wraps) {
707                 iwl_print_cont_event_trace(priv,
708                                        base, priv->event_log.next_entry,
709                                        next_entry - priv->event_log.next_entry,
710                                        mode);
711                 priv->event_log.non_wraps_count++;
712         } else {
713                 if ((num_wraps - priv->event_log.num_wraps) > 1)
714                         priv->event_log.wraps_more_count++;
715                 else
716                         priv->event_log.wraps_once_count++;
717                 trace_iwlwifi_dev_ucode_wrap_event(priv,
718                                 num_wraps - priv->event_log.num_wraps,
719                                 next_entry, priv->event_log.next_entry);
720                 if (next_entry < priv->event_log.next_entry) {
721                         iwl_print_cont_event_trace(priv, base,
722                                priv->event_log.next_entry,
723                                capacity - priv->event_log.next_entry,
724                                mode);
725
726                         iwl_print_cont_event_trace(priv, base, 0,
727                                 next_entry, mode);
728                 } else {
729                         iwl_print_cont_event_trace(priv, base,
730                                next_entry, capacity - next_entry,
731                                mode);
732
733                         iwl_print_cont_event_trace(priv, base, 0,
734                                 next_entry, mode);
735                 }
736         }
737         priv->event_log.num_wraps = num_wraps;
738         priv->event_log.next_entry = next_entry;
739 }
740
741 /**
742  * iwl_bg_ucode_trace - Timer callback to log ucode event
743  *
744  * The timer is continually set to execute every
745  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
746  * this function is to perform continuous uCode event logging operation
747  * if enabled
748  */
749 static void iwl_bg_ucode_trace(unsigned long data)
750 {
751         struct iwl_priv *priv = (struct iwl_priv *)data;
752
753         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
754                 return;
755
756         if (priv->event_log.ucode_trace) {
757                 iwl_continuous_event_trace(priv);
758                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
759                 mod_timer(&priv->ucode_trace,
760                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
761         }
762 }
763
764 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
765                                 struct iwl_rx_mem_buffer *rxb)
766 {
767         struct iwl_rx_packet *pkt = rxb_addr(rxb);
768         struct iwl4965_beacon_notif *beacon =
769                 (struct iwl4965_beacon_notif *)pkt->u.raw;
770 #ifdef CONFIG_IWLWIFI_DEBUG
771         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
772
773         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
774                 "tsf %d %d rate %d\n",
775                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
776                 beacon->beacon_notify_hdr.failure_frame,
777                 le32_to_cpu(beacon->ibss_mgr_status),
778                 le32_to_cpu(beacon->high_tsf),
779                 le32_to_cpu(beacon->low_tsf), rate);
780 #endif
781
782         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
783
784         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
785             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
786                 queue_work(priv->workqueue, &priv->beacon_update);
787 }
788
789 /* Handle notification from uCode that card's power state is changing
790  * due to software, hardware, or critical temperature RFKILL */
791 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
792                                     struct iwl_rx_mem_buffer *rxb)
793 {
794         struct iwl_rx_packet *pkt = rxb_addr(rxb);
795         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
796         unsigned long status = priv->status;
797
798         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
799                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
800                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
801                           (flags & CT_CARD_DISABLED) ?
802                           "Reached" : "Not reached");
803
804         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
805                      CT_CARD_DISABLED)) {
806
807                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
808                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
809
810                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
811                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
812
813                 if (!(flags & RXON_CARD_DISABLED)) {
814                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
815                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
816                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
817                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
818                 }
819                 if (flags & CT_CARD_DISABLED)
820                         iwl_tt_enter_ct_kill(priv);
821         }
822         if (!(flags & CT_CARD_DISABLED))
823                 iwl_tt_exit_ct_kill(priv);
824
825         if (flags & HW_CARD_DISABLED)
826                 set_bit(STATUS_RF_KILL_HW, &priv->status);
827         else
828                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
829
830
831         if (!(flags & RXON_CARD_DISABLED))
832                 iwl_scan_cancel(priv);
833
834         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
835              test_bit(STATUS_RF_KILL_HW, &priv->status)))
836                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
837                         test_bit(STATUS_RF_KILL_HW, &priv->status));
838         else
839                 wake_up_interruptible(&priv->wait_command_queue);
840 }
841
842 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
843 {
844         if (src == IWL_PWR_SRC_VAUX) {
845                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
846                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
847                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
848                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
849         } else {
850                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
851                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
852                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
853         }
854
855         return 0;
856 }
857
858 static void iwl_bg_tx_flush(struct work_struct *work)
859 {
860         struct iwl_priv *priv =
861                 container_of(work, struct iwl_priv, tx_flush);
862
863         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
864                 return;
865
866         /* do nothing if rf-kill is on */
867         if (!iwl_is_ready_rf(priv))
868                 return;
869
870         if (priv->cfg->ops->lib->txfifo_flush) {
871                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
872                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
873         }
874 }
875
876 /**
877  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
878  *
879  * Setup the RX handlers for each of the reply types sent from the uCode
880  * to the host.
881  *
882  * This function chains into the hardware specific files for them to setup
883  * any hardware specific handlers as well.
884  */
885 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
886 {
887         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
888         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
889         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
890         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
891                         iwl_rx_spectrum_measure_notif;
892         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
893         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
894             iwl_rx_pm_debug_statistics_notif;
895         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
896
897         /*
898          * The same handler is used for both the REPLY to a discrete
899          * statistics request from the host as well as for the periodic
900          * statistics notifications (after received beacons) from the uCode.
901          */
902         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
903         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
904
905         iwl_setup_rx_scan_handlers(priv);
906
907         /* status change handler */
908         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
909
910         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
911             iwl_rx_missed_beacon_notif;
912         /* Rx handlers */
913         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
914         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
915         /* block ack */
916         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
917         /* Set up hardware specific Rx handlers */
918         priv->cfg->ops->lib->rx_handler_setup(priv);
919 }
920
921 /**
922  * iwl_rx_handle - Main entry function for receiving responses from uCode
923  *
924  * Uses the priv->rx_handlers callback function array to invoke
925  * the appropriate handlers, including command responses,
926  * frame-received notifications, and other notifications.
927  */
928 void iwl_rx_handle(struct iwl_priv *priv)
929 {
930         struct iwl_rx_mem_buffer *rxb;
931         struct iwl_rx_packet *pkt;
932         struct iwl_rx_queue *rxq = &priv->rxq;
933         u32 r, i;
934         int reclaim;
935         unsigned long flags;
936         u8 fill_rx = 0;
937         u32 count = 8;
938         int total_empty;
939
940         /* uCode's read index (stored in shared DRAM) indicates the last Rx
941          * buffer that the driver may process (last buffer filled by ucode). */
942         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
943         i = rxq->read;
944
945         /* Rx interrupt, but nothing sent from uCode */
946         if (i == r)
947                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
948
949         /* calculate total frames need to be restock after handling RX */
950         total_empty = r - rxq->write_actual;
951         if (total_empty < 0)
952                 total_empty += RX_QUEUE_SIZE;
953
954         if (total_empty > (RX_QUEUE_SIZE / 2))
955                 fill_rx = 1;
956
957         while (i != r) {
958                 int len;
959
960                 rxb = rxq->queue[i];
961
962                 /* If an RXB doesn't have a Rx queue slot associated with it,
963                  * then a bug has been introduced in the queue refilling
964                  * routines -- catch it here */
965                 BUG_ON(rxb == NULL);
966
967                 rxq->queue[i] = NULL;
968
969                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
970                                PAGE_SIZE << priv->hw_params.rx_page_order,
971                                PCI_DMA_FROMDEVICE);
972                 pkt = rxb_addr(rxb);
973
974                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
975                 len += sizeof(u32); /* account for status word */
976                 trace_iwlwifi_dev_rx(priv, pkt, len);
977
978                 /* Reclaim a command buffer only if this packet is a response
979                  *   to a (driver-originated) command.
980                  * If the packet (e.g. Rx frame) originated from uCode,
981                  *   there is no command buffer to reclaim.
982                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
983                  *   but apparently a few don't get set; catch them here. */
984                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
985                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
986                         (pkt->hdr.cmd != REPLY_RX) &&
987                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
988                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
989                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
990                         (pkt->hdr.cmd != REPLY_TX);
991
992                 /* Based on type of command response or notification,
993                  *   handle those that need handling via function in
994                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
995                 if (priv->rx_handlers[pkt->hdr.cmd]) {
996                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
997                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
998                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
999                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1000                 } else {
1001                         /* No handling needed */
1002                         IWL_DEBUG_RX(priv,
1003                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1004                                 r, i, get_cmd_string(pkt->hdr.cmd),
1005                                 pkt->hdr.cmd);
1006                 }
1007
1008                 /*
1009                  * XXX: After here, we should always check rxb->page
1010                  * against NULL before touching it or its virtual
1011                  * memory (pkt). Because some rx_handler might have
1012                  * already taken or freed the pages.
1013                  */
1014
1015                 if (reclaim) {
1016                         /* Invoke any callbacks, transfer the buffer to caller,
1017                          * and fire off the (possibly) blocking iwl_send_cmd()
1018                          * as we reclaim the driver command queue */
1019                         if (rxb->page)
1020                                 iwl_tx_cmd_complete(priv, rxb);
1021                         else
1022                                 IWL_WARN(priv, "Claim null rxb?\n");
1023                 }
1024
1025                 /* Reuse the page if possible. For notification packets and
1026                  * SKBs that fail to Rx correctly, add them back into the
1027                  * rx_free list for reuse later. */
1028                 spin_lock_irqsave(&rxq->lock, flags);
1029                 if (rxb->page != NULL) {
1030                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1031                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1032                                 PCI_DMA_FROMDEVICE);
1033                         list_add_tail(&rxb->list, &rxq->rx_free);
1034                         rxq->free_count++;
1035                 } else
1036                         list_add_tail(&rxb->list, &rxq->rx_used);
1037
1038                 spin_unlock_irqrestore(&rxq->lock, flags);
1039
1040                 i = (i + 1) & RX_QUEUE_MASK;
1041                 /* If there are a lot of unused frames,
1042                  * restock the Rx queue so ucode wont assert. */
1043                 if (fill_rx) {
1044                         count++;
1045                         if (count >= 8) {
1046                                 rxq->read = i;
1047                                 iwlagn_rx_replenish_now(priv);
1048                                 count = 0;
1049                         }
1050                 }
1051         }
1052
1053         /* Backtrack one entry */
1054         rxq->read = i;
1055         if (fill_rx)
1056                 iwlagn_rx_replenish_now(priv);
1057         else
1058                 iwlagn_rx_queue_restock(priv);
1059 }
1060
1061 /* call this function to flush any scheduled tasklet */
1062 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1063 {
1064         /* wait to make sure we flush pending tasklet*/
1065         synchronize_irq(priv->pci_dev->irq);
1066         tasklet_kill(&priv->irq_tasklet);
1067 }
1068
1069 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1070 {
1071         u32 inta, handled = 0;
1072         u32 inta_fh;
1073         unsigned long flags;
1074         u32 i;
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1076         u32 inta_mask;
1077 #endif
1078
1079         spin_lock_irqsave(&priv->lock, flags);
1080
1081         /* Ack/clear/reset pending uCode interrupts.
1082          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1083          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1084         inta = iwl_read32(priv, CSR_INT);
1085         iwl_write32(priv, CSR_INT, inta);
1086
1087         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1088          * Any new interrupts that happen after this, either while we're
1089          * in this tasklet, or later, will show up in next ISR/tasklet. */
1090         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1091         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1092
1093 #ifdef CONFIG_IWLWIFI_DEBUG
1094         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1095                 /* just for debug */
1096                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1097                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1098                               inta, inta_mask, inta_fh);
1099         }
1100 #endif
1101
1102         spin_unlock_irqrestore(&priv->lock, flags);
1103
1104         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1105          * atomic, make sure that inta covers all the interrupts that
1106          * we've discovered, even if FH interrupt came in just after
1107          * reading CSR_INT. */
1108         if (inta_fh & CSR49_FH_INT_RX_MASK)
1109                 inta |= CSR_INT_BIT_FH_RX;
1110         if (inta_fh & CSR49_FH_INT_TX_MASK)
1111                 inta |= CSR_INT_BIT_FH_TX;
1112
1113         /* Now service all interrupt bits discovered above. */
1114         if (inta & CSR_INT_BIT_HW_ERR) {
1115                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1116
1117                 /* Tell the device to stop sending interrupts */
1118                 iwl_disable_interrupts(priv);
1119
1120                 priv->isr_stats.hw++;
1121                 iwl_irq_handle_error(priv);
1122
1123                 handled |= CSR_INT_BIT_HW_ERR;
1124
1125                 return;
1126         }
1127
1128 #ifdef CONFIG_IWLWIFI_DEBUG
1129         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1130                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1131                 if (inta & CSR_INT_BIT_SCD) {
1132                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1133                                       "the frame/frames.\n");
1134                         priv->isr_stats.sch++;
1135                 }
1136
1137                 /* Alive notification via Rx interrupt will do the real work */
1138                 if (inta & CSR_INT_BIT_ALIVE) {
1139                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1140                         priv->isr_stats.alive++;
1141                 }
1142         }
1143 #endif
1144         /* Safely ignore these bits for debug checks below */
1145         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1146
1147         /* HW RF KILL switch toggled */
1148         if (inta & CSR_INT_BIT_RF_KILL) {
1149                 int hw_rf_kill = 0;
1150                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1151                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1152                         hw_rf_kill = 1;
1153
1154                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1155                                 hw_rf_kill ? "disable radio" : "enable radio");
1156
1157                 priv->isr_stats.rfkill++;
1158
1159                 /* driver only loads ucode once setting the interface up.
1160                  * the driver allows loading the ucode even if the radio
1161                  * is killed. Hence update the killswitch state here. The
1162                  * rfkill handler will care about restarting if needed.
1163                  */
1164                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1165                         if (hw_rf_kill)
1166                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1167                         else
1168                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1169                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1170                 }
1171
1172                 handled |= CSR_INT_BIT_RF_KILL;
1173         }
1174
1175         /* Chip got too hot and stopped itself */
1176         if (inta & CSR_INT_BIT_CT_KILL) {
1177                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1178                 priv->isr_stats.ctkill++;
1179                 handled |= CSR_INT_BIT_CT_KILL;
1180         }
1181
1182         /* Error detected by uCode */
1183         if (inta & CSR_INT_BIT_SW_ERR) {
1184                 IWL_ERR(priv, "Microcode SW error detected. "
1185                         " Restarting 0x%X.\n", inta);
1186                 priv->isr_stats.sw++;
1187                 priv->isr_stats.sw_err = inta;
1188                 iwl_irq_handle_error(priv);
1189                 handled |= CSR_INT_BIT_SW_ERR;
1190         }
1191
1192         /*
1193          * uCode wakes up after power-down sleep.
1194          * Tell device about any new tx or host commands enqueued,
1195          * and about any Rx buffers made available while asleep.
1196          */
1197         if (inta & CSR_INT_BIT_WAKEUP) {
1198                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1199                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1200                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1201                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1202                 priv->isr_stats.wakeup++;
1203                 handled |= CSR_INT_BIT_WAKEUP;
1204         }
1205
1206         /* All uCode command responses, including Tx command responses,
1207          * Rx "responses" (frame-received notification), and other
1208          * notifications from uCode come through here*/
1209         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1210                 iwl_rx_handle(priv);
1211                 priv->isr_stats.rx++;
1212                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1213         }
1214
1215         /* This "Tx" DMA channel is used only for loading uCode */
1216         if (inta & CSR_INT_BIT_FH_TX) {
1217                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1218                 priv->isr_stats.tx++;
1219                 handled |= CSR_INT_BIT_FH_TX;
1220                 /* Wake up uCode load routine, now that load is complete */
1221                 priv->ucode_write_complete = 1;
1222                 wake_up_interruptible(&priv->wait_command_queue);
1223         }
1224
1225         if (inta & ~handled) {
1226                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1227                 priv->isr_stats.unhandled++;
1228         }
1229
1230         if (inta & ~(priv->inta_mask)) {
1231                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1232                          inta & ~priv->inta_mask);
1233                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1234         }
1235
1236         /* Re-enable all interrupts */
1237         /* only Re-enable if diabled by irq */
1238         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1239                 iwl_enable_interrupts(priv);
1240
1241 #ifdef CONFIG_IWLWIFI_DEBUG
1242         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1243                 inta = iwl_read32(priv, CSR_INT);
1244                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1245                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1246                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1247                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1248         }
1249 #endif
1250 }
1251
1252 /* tasklet for iwlagn interrupt */
1253 static void iwl_irq_tasklet(struct iwl_priv *priv)
1254 {
1255         u32 inta = 0;
1256         u32 handled = 0;
1257         unsigned long flags;
1258         u32 i;
1259 #ifdef CONFIG_IWLWIFI_DEBUG
1260         u32 inta_mask;
1261 #endif
1262
1263         spin_lock_irqsave(&priv->lock, flags);
1264
1265         /* Ack/clear/reset pending uCode interrupts.
1266          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1267          */
1268         /* There is a hardware bug in the interrupt mask function that some
1269          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1270          * they are disabled in the CSR_INT_MASK register. Furthermore the
1271          * ICT interrupt handling mechanism has another bug that might cause
1272          * these unmasked interrupts fail to be detected. We workaround the
1273          * hardware bugs here by ACKing all the possible interrupts so that
1274          * interrupt coalescing can still be achieved.
1275          */
1276         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1277
1278         inta = priv->_agn.inta;
1279
1280 #ifdef CONFIG_IWLWIFI_DEBUG
1281         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1282                 /* just for debug */
1283                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1284                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1285                                 inta, inta_mask);
1286         }
1287 #endif
1288
1289         spin_unlock_irqrestore(&priv->lock, flags);
1290
1291         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1292         priv->_agn.inta = 0;
1293
1294         /* Now service all interrupt bits discovered above. */
1295         if (inta & CSR_INT_BIT_HW_ERR) {
1296                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1297
1298                 /* Tell the device to stop sending interrupts */
1299                 iwl_disable_interrupts(priv);
1300
1301                 priv->isr_stats.hw++;
1302                 iwl_irq_handle_error(priv);
1303
1304                 handled |= CSR_INT_BIT_HW_ERR;
1305
1306                 return;
1307         }
1308
1309 #ifdef CONFIG_IWLWIFI_DEBUG
1310         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1311                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1312                 if (inta & CSR_INT_BIT_SCD) {
1313                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1314                                       "the frame/frames.\n");
1315                         priv->isr_stats.sch++;
1316                 }
1317
1318                 /* Alive notification via Rx interrupt will do the real work */
1319                 if (inta & CSR_INT_BIT_ALIVE) {
1320                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1321                         priv->isr_stats.alive++;
1322                 }
1323         }
1324 #endif
1325         /* Safely ignore these bits for debug checks below */
1326         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1327
1328         /* HW RF KILL switch toggled */
1329         if (inta & CSR_INT_BIT_RF_KILL) {
1330                 int hw_rf_kill = 0;
1331                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1332                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1333                         hw_rf_kill = 1;
1334
1335                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1336                                 hw_rf_kill ? "disable radio" : "enable radio");
1337
1338                 priv->isr_stats.rfkill++;
1339
1340                 /* driver only loads ucode once setting the interface up.
1341                  * the driver allows loading the ucode even if the radio
1342                  * is killed. Hence update the killswitch state here. The
1343                  * rfkill handler will care about restarting if needed.
1344                  */
1345                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1346                         if (hw_rf_kill)
1347                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1348                         else
1349                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1350                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1351                 }
1352
1353                 handled |= CSR_INT_BIT_RF_KILL;
1354         }
1355
1356         /* Chip got too hot and stopped itself */
1357         if (inta & CSR_INT_BIT_CT_KILL) {
1358                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1359                 priv->isr_stats.ctkill++;
1360                 handled |= CSR_INT_BIT_CT_KILL;
1361         }
1362
1363         /* Error detected by uCode */
1364         if (inta & CSR_INT_BIT_SW_ERR) {
1365                 IWL_ERR(priv, "Microcode SW error detected. "
1366                         " Restarting 0x%X.\n", inta);
1367                 priv->isr_stats.sw++;
1368                 priv->isr_stats.sw_err = inta;
1369                 iwl_irq_handle_error(priv);
1370                 handled |= CSR_INT_BIT_SW_ERR;
1371         }
1372
1373         /* uCode wakes up after power-down sleep */
1374         if (inta & CSR_INT_BIT_WAKEUP) {
1375                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1376                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1377                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1378                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1379
1380                 priv->isr_stats.wakeup++;
1381
1382                 handled |= CSR_INT_BIT_WAKEUP;
1383         }
1384
1385         /* All uCode command responses, including Tx command responses,
1386          * Rx "responses" (frame-received notification), and other
1387          * notifications from uCode come through here*/
1388         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1389                         CSR_INT_BIT_RX_PERIODIC)) {
1390                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1391                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1392                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1393                         iwl_write32(priv, CSR_FH_INT_STATUS,
1394                                         CSR49_FH_INT_RX_MASK);
1395                 }
1396                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1397                         handled |= CSR_INT_BIT_RX_PERIODIC;
1398                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1399                 }
1400                 /* Sending RX interrupt require many steps to be done in the
1401                  * the device:
1402                  * 1- write interrupt to current index in ICT table.
1403                  * 2- dma RX frame.
1404                  * 3- update RX shared data to indicate last write index.
1405                  * 4- send interrupt.
1406                  * This could lead to RX race, driver could receive RX interrupt
1407                  * but the shared data changes does not reflect this;
1408                  * periodic interrupt will detect any dangling Rx activity.
1409                  */
1410
1411                 /* Disable periodic interrupt; we use it as just a one-shot. */
1412                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1413                             CSR_INT_PERIODIC_DIS);
1414                 iwl_rx_handle(priv);
1415
1416                 /*
1417                  * Enable periodic interrupt in 8 msec only if we received
1418                  * real RX interrupt (instead of just periodic int), to catch
1419                  * any dangling Rx interrupt.  If it was just the periodic
1420                  * interrupt, there was no dangling Rx activity, and no need
1421                  * to extend the periodic interrupt; one-shot is enough.
1422                  */
1423                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1424                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1425                                     CSR_INT_PERIODIC_ENA);
1426
1427                 priv->isr_stats.rx++;
1428         }
1429
1430         /* This "Tx" DMA channel is used only for loading uCode */
1431         if (inta & CSR_INT_BIT_FH_TX) {
1432                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1433                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1434                 priv->isr_stats.tx++;
1435                 handled |= CSR_INT_BIT_FH_TX;
1436                 /* Wake up uCode load routine, now that load is complete */
1437                 priv->ucode_write_complete = 1;
1438                 wake_up_interruptible(&priv->wait_command_queue);
1439         }
1440
1441         if (inta & ~handled) {
1442                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1443                 priv->isr_stats.unhandled++;
1444         }
1445
1446         if (inta & ~(priv->inta_mask)) {
1447                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1448                          inta & ~priv->inta_mask);
1449         }
1450
1451         /* Re-enable all interrupts */
1452         /* only Re-enable if diabled by irq */
1453         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1454                 iwl_enable_interrupts(priv);
1455 }
1456
1457 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1458 #define ACK_CNT_RATIO (50)
1459 #define BA_TIMEOUT_CNT (5)
1460 #define BA_TIMEOUT_MAX (16)
1461
1462 /**
1463  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1464  *
1465  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1466  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1467  * operation state.
1468  */
1469 bool iwl_good_ack_health(struct iwl_priv *priv,
1470                                 struct iwl_rx_packet *pkt)
1471 {
1472         bool rc = true;
1473         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1474         int ba_timeout_delta;
1475
1476         actual_ack_cnt_delta =
1477                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1478                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1479         expected_ack_cnt_delta =
1480                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1481                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1482         ba_timeout_delta =
1483                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1484                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1485         if ((priv->_agn.agg_tids_count > 0) &&
1486             (expected_ack_cnt_delta > 0) &&
1487             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1488                 < ACK_CNT_RATIO) &&
1489             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1490                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1491                                 " expected_ack_cnt = %d\n",
1492                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1493
1494 #ifdef CONFIG_IWLWIFI_DEBUGFS
1495                 /*
1496                  * This is ifdef'ed on DEBUGFS because otherwise the
1497                  * statistics aren't available. If DEBUGFS is set but
1498                  * DEBUG is not, these will just compile out.
1499                  */
1500                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1501                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1502                 IWL_DEBUG_RADIO(priv,
1503                                 "ack_or_ba_timeout_collision delta = %d\n",
1504                                 priv->_agn.delta_statistics.tx.
1505                                 ack_or_ba_timeout_collision);
1506 #endif
1507                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1508                                 ba_timeout_delta);
1509                 if (!actual_ack_cnt_delta &&
1510                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1511                         rc = false;
1512         }
1513         return rc;
1514 }
1515
1516
1517 /*****************************************************************************
1518  *
1519  * sysfs attributes
1520  *
1521  *****************************************************************************/
1522
1523 #ifdef CONFIG_IWLWIFI_DEBUG
1524
1525 /*
1526  * The following adds a new attribute to the sysfs representation
1527  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1528  * used for controlling the debug level.
1529  *
1530  * See the level definitions in iwl for details.
1531  *
1532  * The debug_level being managed using sysfs below is a per device debug
1533  * level that is used instead of the global debug level if it (the per
1534  * device debug level) is set.
1535  */
1536 static ssize_t show_debug_level(struct device *d,
1537                                 struct device_attribute *attr, char *buf)
1538 {
1539         struct iwl_priv *priv = dev_get_drvdata(d);
1540         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1541 }
1542 static ssize_t store_debug_level(struct device *d,
1543                                 struct device_attribute *attr,
1544                                  const char *buf, size_t count)
1545 {
1546         struct iwl_priv *priv = dev_get_drvdata(d);
1547         unsigned long val;
1548         int ret;
1549
1550         ret = strict_strtoul(buf, 0, &val);
1551         if (ret)
1552                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1553         else {
1554                 priv->debug_level = val;
1555                 if (iwl_alloc_traffic_mem(priv))
1556                         IWL_ERR(priv,
1557                                 "Not enough memory to generate traffic log\n");
1558         }
1559         return strnlen(buf, count);
1560 }
1561
1562 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1563                         show_debug_level, store_debug_level);
1564
1565
1566 #endif /* CONFIG_IWLWIFI_DEBUG */
1567
1568
1569 static ssize_t show_temperature(struct device *d,
1570                                 struct device_attribute *attr, char *buf)
1571 {
1572         struct iwl_priv *priv = dev_get_drvdata(d);
1573
1574         if (!iwl_is_alive(priv))
1575                 return -EAGAIN;
1576
1577         return sprintf(buf, "%d\n", priv->temperature);
1578 }
1579
1580 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1581
1582 static ssize_t show_tx_power(struct device *d,
1583                              struct device_attribute *attr, char *buf)
1584 {
1585         struct iwl_priv *priv = dev_get_drvdata(d);
1586
1587         if (!iwl_is_ready_rf(priv))
1588                 return sprintf(buf, "off\n");
1589         else
1590                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1591 }
1592
1593 static ssize_t store_tx_power(struct device *d,
1594                               struct device_attribute *attr,
1595                               const char *buf, size_t count)
1596 {
1597         struct iwl_priv *priv = dev_get_drvdata(d);
1598         unsigned long val;
1599         int ret;
1600
1601         ret = strict_strtoul(buf, 10, &val);
1602         if (ret)
1603                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1604         else {
1605                 ret = iwl_set_tx_power(priv, val, false);
1606                 if (ret)
1607                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1608                                 ret);
1609                 else
1610                         ret = count;
1611         }
1612         return ret;
1613 }
1614
1615 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1616
1617 static struct attribute *iwl_sysfs_entries[] = {
1618         &dev_attr_temperature.attr,
1619         &dev_attr_tx_power.attr,
1620 #ifdef CONFIG_IWLWIFI_DEBUG
1621         &dev_attr_debug_level.attr,
1622 #endif
1623         NULL
1624 };
1625
1626 static struct attribute_group iwl_attribute_group = {
1627         .name = NULL,           /* put in device directory */
1628         .attrs = iwl_sysfs_entries,
1629 };
1630
1631 /******************************************************************************
1632  *
1633  * uCode download functions
1634  *
1635  ******************************************************************************/
1636
1637 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1638 {
1639         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1640         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1641         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1642         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1643         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1644         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1645 }
1646
1647 static void iwl_nic_start(struct iwl_priv *priv)
1648 {
1649         /* Remove all resets to allow NIC to operate */
1650         iwl_write32(priv, CSR_RESET, 0);
1651 }
1652
1653 struct iwlagn_ucode_capabilities {
1654         u32 max_probe_length;
1655         u32 standard_phy_calibration_size;
1656 };
1657
1658 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1659 static int iwl_mac_setup_register(struct iwl_priv *priv,
1660                                   struct iwlagn_ucode_capabilities *capa);
1661
1662 #define UCODE_EXPERIMENTAL_INDEX        100
1663 #define UCODE_EXPERIMENTAL_TAG          "exp"
1664
1665 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1666 {
1667         const char *name_pre = priv->cfg->fw_name_pre;
1668         char tag[8];
1669
1670         if (first) {
1671 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1672                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1673                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1674         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1675 #endif
1676                 priv->fw_index = priv->cfg->ucode_api_max;
1677                 sprintf(tag, "%d", priv->fw_index);
1678         } else {
1679                 priv->fw_index--;
1680                 sprintf(tag, "%d", priv->fw_index);
1681         }
1682
1683         if (priv->fw_index < priv->cfg->ucode_api_min) {
1684                 IWL_ERR(priv, "no suitable firmware found!\n");
1685                 return -ENOENT;
1686         }
1687
1688         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1689
1690         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1691                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1692                                 ? "EXPERIMENTAL " : "",
1693                        priv->firmware_name);
1694
1695         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1696                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1697                                        iwl_ucode_callback);
1698 }
1699
1700 struct iwlagn_firmware_pieces {
1701         const void *inst, *data, *init, *init_data, *boot;
1702         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1703
1704         u32 build;
1705
1706         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1707         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1708 };
1709
1710 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1711                                        const struct firmware *ucode_raw,
1712                                        struct iwlagn_firmware_pieces *pieces)
1713 {
1714         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1715         u32 api_ver, hdr_size;
1716         const u8 *src;
1717
1718         priv->ucode_ver = le32_to_cpu(ucode->ver);
1719         api_ver = IWL_UCODE_API(priv->ucode_ver);
1720
1721         switch (api_ver) {
1722         default:
1723                 /*
1724                  * 4965 doesn't revision the firmware file format
1725                  * along with the API version, it always uses v1
1726                  * file format.
1727                  */
1728                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1729                                 CSR_HW_REV_TYPE_4965) {
1730                         hdr_size = 28;
1731                         if (ucode_raw->size < hdr_size) {
1732                                 IWL_ERR(priv, "File size too small!\n");
1733                                 return -EINVAL;
1734                         }
1735                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1736                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1737                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1738                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1739                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1740                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1741                         src = ucode->u.v2.data;
1742                         break;
1743                 }
1744                 /* fall through for 4965 */
1745         case 0:
1746         case 1:
1747         case 2:
1748                 hdr_size = 24;
1749                 if (ucode_raw->size < hdr_size) {
1750                         IWL_ERR(priv, "File size too small!\n");
1751                         return -EINVAL;
1752                 }
1753                 pieces->build = 0;
1754                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1755                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1756                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1757                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1758                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1759                 src = ucode->u.v1.data;
1760                 break;
1761         }
1762
1763         /* Verify size of file vs. image size info in file's header */
1764         if (ucode_raw->size != hdr_size + pieces->inst_size +
1765                                 pieces->data_size + pieces->init_size +
1766                                 pieces->init_data_size + pieces->boot_size) {
1767
1768                 IWL_ERR(priv,
1769                         "uCode file size %d does not match expected size\n",
1770                         (int)ucode_raw->size);
1771                 return -EINVAL;
1772         }
1773
1774         pieces->inst = src;
1775         src += pieces->inst_size;
1776         pieces->data = src;
1777         src += pieces->data_size;
1778         pieces->init = src;
1779         src += pieces->init_size;
1780         pieces->init_data = src;
1781         src += pieces->init_data_size;
1782         pieces->boot = src;
1783         src += pieces->boot_size;
1784
1785         return 0;
1786 }
1787
1788 static int iwlagn_wanted_ucode_alternative = 1;
1789
1790 static int iwlagn_load_firmware(struct iwl_priv *priv,
1791                                 const struct firmware *ucode_raw,
1792                                 struct iwlagn_firmware_pieces *pieces,
1793                                 struct iwlagn_ucode_capabilities *capa)
1794 {
1795         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1796         struct iwl_ucode_tlv *tlv;
1797         size_t len = ucode_raw->size;
1798         const u8 *data;
1799         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1800         u64 alternatives;
1801         u32 tlv_len;
1802         enum iwl_ucode_tlv_type tlv_type;
1803         const u8 *tlv_data;
1804
1805         if (len < sizeof(*ucode)) {
1806                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1807                 return -EINVAL;
1808         }
1809
1810         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1811                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1812                         le32_to_cpu(ucode->magic));
1813                 return -EINVAL;
1814         }
1815
1816         /*
1817          * Check which alternatives are present, and "downgrade"
1818          * when the chosen alternative is not present, warning
1819          * the user when that happens. Some files may not have
1820          * any alternatives, so don't warn in that case.
1821          */
1822         alternatives = le64_to_cpu(ucode->alternatives);
1823         tmp = wanted_alternative;
1824         if (wanted_alternative > 63)
1825                 wanted_alternative = 63;
1826         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1827                 wanted_alternative--;
1828         if (wanted_alternative && wanted_alternative != tmp)
1829                 IWL_WARN(priv,
1830                          "uCode alternative %d not available, choosing %d\n",
1831                          tmp, wanted_alternative);
1832
1833         priv->ucode_ver = le32_to_cpu(ucode->ver);
1834         pieces->build = le32_to_cpu(ucode->build);
1835         data = ucode->data;
1836
1837         len -= sizeof(*ucode);
1838
1839         while (len >= sizeof(*tlv)) {
1840                 u16 tlv_alt;
1841
1842                 len -= sizeof(*tlv);
1843                 tlv = (void *)data;
1844
1845                 tlv_len = le32_to_cpu(tlv->length);
1846                 tlv_type = le16_to_cpu(tlv->type);
1847                 tlv_alt = le16_to_cpu(tlv->alternative);
1848                 tlv_data = tlv->data;
1849
1850                 if (len < tlv_len) {
1851                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1852                                 len, tlv_len);
1853                         return -EINVAL;
1854                 }
1855                 len -= ALIGN(tlv_len, 4);
1856                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1857
1858                 /*
1859                  * Alternative 0 is always valid.
1860                  *
1861                  * Skip alternative TLVs that are not selected.
1862                  */
1863                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1864                         continue;
1865
1866                 switch (tlv_type) {
1867                 case IWL_UCODE_TLV_INST:
1868                         pieces->inst = tlv_data;
1869                         pieces->inst_size = tlv_len;
1870                         break;
1871                 case IWL_UCODE_TLV_DATA:
1872                         pieces->data = tlv_data;
1873                         pieces->data_size = tlv_len;
1874                         break;
1875                 case IWL_UCODE_TLV_INIT:
1876                         pieces->init = tlv_data;
1877                         pieces->init_size = tlv_len;
1878                         break;
1879                 case IWL_UCODE_TLV_INIT_DATA:
1880                         pieces->init_data = tlv_data;
1881                         pieces->init_data_size = tlv_len;
1882                         break;
1883                 case IWL_UCODE_TLV_BOOT:
1884                         pieces->boot = tlv_data;
1885                         pieces->boot_size = tlv_len;
1886                         break;
1887                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1888                         if (tlv_len != sizeof(u32))
1889                                 goto invalid_tlv_len;
1890                         capa->max_probe_length =
1891                                         le32_to_cpup((__le32 *)tlv_data);
1892                         break;
1893                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1894                         if (tlv_len != sizeof(u32))
1895                                 goto invalid_tlv_len;
1896                         pieces->init_evtlog_ptr =
1897                                         le32_to_cpup((__le32 *)tlv_data);
1898                         break;
1899                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1900                         if (tlv_len != sizeof(u32))
1901                                 goto invalid_tlv_len;
1902                         pieces->init_evtlog_size =
1903                                         le32_to_cpup((__le32 *)tlv_data);
1904                         break;
1905                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1906                         if (tlv_len != sizeof(u32))
1907                                 goto invalid_tlv_len;
1908                         pieces->init_errlog_ptr =
1909                                         le32_to_cpup((__le32 *)tlv_data);
1910                         break;
1911                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1912                         if (tlv_len != sizeof(u32))
1913                                 goto invalid_tlv_len;
1914                         pieces->inst_evtlog_ptr =
1915                                         le32_to_cpup((__le32 *)tlv_data);
1916                         break;
1917                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1918                         if (tlv_len != sizeof(u32))
1919                                 goto invalid_tlv_len;
1920                         pieces->inst_evtlog_size =
1921                                         le32_to_cpup((__le32 *)tlv_data);
1922                         break;
1923                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1924                         if (tlv_len != sizeof(u32))
1925                                 goto invalid_tlv_len;
1926                         pieces->inst_errlog_ptr =
1927                                         le32_to_cpup((__le32 *)tlv_data);
1928                         break;
1929                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1930                         if (tlv_len)
1931                                 goto invalid_tlv_len;
1932                         priv->enhance_sensitivity_table = true;
1933                         break;
1934                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1935                         if (tlv_len != sizeof(u32))
1936                                 goto invalid_tlv_len;
1937                         capa->standard_phy_calibration_size =
1938                                         le32_to_cpup((__le32 *)tlv_data);
1939                         break;
1940                 default:
1941                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1942                         break;
1943                 }
1944         }
1945
1946         if (len) {
1947                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1948                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1949                 return -EINVAL;
1950         }
1951
1952         return 0;
1953
1954  invalid_tlv_len:
1955         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1956         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1957
1958         return -EINVAL;
1959 }
1960
1961 /**
1962  * iwl_ucode_callback - callback when firmware was loaded
1963  *
1964  * If loaded successfully, copies the firmware into buffers
1965  * for the card to fetch (via DMA).
1966  */
1967 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1968 {
1969         struct iwl_priv *priv = context;
1970         struct iwl_ucode_header *ucode;
1971         int err;
1972         struct iwlagn_firmware_pieces pieces;
1973         const unsigned int api_max = priv->cfg->ucode_api_max;
1974         const unsigned int api_min = priv->cfg->ucode_api_min;
1975         u32 api_ver;
1976         char buildstr[25];
1977         u32 build;
1978         struct iwlagn_ucode_capabilities ucode_capa = {
1979                 .max_probe_length = 200,
1980                 .standard_phy_calibration_size =
1981                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1982         };
1983
1984         memset(&pieces, 0, sizeof(pieces));
1985
1986         if (!ucode_raw) {
1987                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1988                         IWL_ERR(priv,
1989                                 "request for firmware file '%s' failed.\n",
1990                                 priv->firmware_name);
1991                 goto try_again;
1992         }
1993
1994         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1995                        priv->firmware_name, ucode_raw->size);
1996
1997         /* Make sure that we got at least the API version number */
1998         if (ucode_raw->size < 4) {
1999                 IWL_ERR(priv, "File size way too small!\n");
2000                 goto try_again;
2001         }
2002
2003         /* Data from ucode file:  header followed by uCode images */
2004         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2005
2006         if (ucode->ver)
2007                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2008         else
2009                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2010                                            &ucode_capa);
2011
2012         if (err)
2013                 goto try_again;
2014
2015         api_ver = IWL_UCODE_API(priv->ucode_ver);
2016         build = pieces.build;
2017
2018         /*
2019          * api_ver should match the api version forming part of the
2020          * firmware filename ... but we don't check for that and only rely
2021          * on the API version read from firmware header from here on forward
2022          */
2023         if (api_ver < api_min || api_ver > api_max) {
2024                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2025                           "Driver supports v%u, firmware is v%u.\n",
2026                           api_max, api_ver);
2027                 goto try_again;
2028         }
2029
2030         if (api_ver != api_max)
2031                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2032                           "got v%u. New firmware can be obtained "
2033                           "from http://www.intellinuxwireless.org.\n",
2034                           api_max, api_ver);
2035
2036         if (build)
2037                 sprintf(buildstr, " build %u%s", build,
2038                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2039                                 ? " (EXP)" : "");
2040         else
2041                 buildstr[0] = '\0';
2042
2043         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2044                  IWL_UCODE_MAJOR(priv->ucode_ver),
2045                  IWL_UCODE_MINOR(priv->ucode_ver),
2046                  IWL_UCODE_API(priv->ucode_ver),
2047                  IWL_UCODE_SERIAL(priv->ucode_ver),
2048                  buildstr);
2049
2050         snprintf(priv->hw->wiphy->fw_version,
2051                  sizeof(priv->hw->wiphy->fw_version),
2052                  "%u.%u.%u.%u%s",
2053                  IWL_UCODE_MAJOR(priv->ucode_ver),
2054                  IWL_UCODE_MINOR(priv->ucode_ver),
2055                  IWL_UCODE_API(priv->ucode_ver),
2056                  IWL_UCODE_SERIAL(priv->ucode_ver),
2057                  buildstr);
2058
2059         /*
2060          * For any of the failures below (before allocating pci memory)
2061          * we will try to load a version with a smaller API -- maybe the
2062          * user just got a corrupted version of the latest API.
2063          */
2064
2065         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2066                        priv->ucode_ver);
2067         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2068                        pieces.inst_size);
2069         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2070                        pieces.data_size);
2071         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2072                        pieces.init_size);
2073         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2074                        pieces.init_data_size);
2075         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2076                        pieces.boot_size);
2077
2078         /* Verify that uCode images will fit in card's SRAM */
2079         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2080                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2081                         pieces.inst_size);
2082                 goto try_again;
2083         }
2084
2085         if (pieces.data_size > priv->hw_params.max_data_size) {
2086                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2087                         pieces.data_size);
2088                 goto try_again;
2089         }
2090
2091         if (pieces.init_size > priv->hw_params.max_inst_size) {
2092                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2093                         pieces.init_size);
2094                 goto try_again;
2095         }
2096
2097         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2098                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2099                         pieces.init_data_size);
2100                 goto try_again;
2101         }
2102
2103         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2104                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2105                         pieces.boot_size);
2106                 goto try_again;
2107         }
2108
2109         /* Allocate ucode buffers for card's bus-master loading ... */
2110
2111         /* Runtime instructions and 2 copies of data:
2112          * 1) unmodified from disk
2113          * 2) backup cache for save/restore during power-downs */
2114         priv->ucode_code.len = pieces.inst_size;
2115         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2116
2117         priv->ucode_data.len = pieces.data_size;
2118         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2119
2120         priv->ucode_data_backup.len = pieces.data_size;
2121         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2122
2123         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2124             !priv->ucode_data_backup.v_addr)
2125                 goto err_pci_alloc;
2126
2127         /* Initialization instructions and data */
2128         if (pieces.init_size && pieces.init_data_size) {
2129                 priv->ucode_init.len = pieces.init_size;
2130                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2131
2132                 priv->ucode_init_data.len = pieces.init_data_size;
2133                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2134
2135                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2136                         goto err_pci_alloc;
2137         }
2138
2139         /* Bootstrap (instructions only, no data) */
2140         if (pieces.boot_size) {
2141                 priv->ucode_boot.len = pieces.boot_size;
2142                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2143
2144                 if (!priv->ucode_boot.v_addr)
2145                         goto err_pci_alloc;
2146         }
2147
2148         /* Now that we can no longer fail, copy information */
2149
2150         /*
2151          * The (size - 16) / 12 formula is based on the information recorded
2152          * for each event, which is of mode 1 (including timestamp) for all
2153          * new microcodes that include this information.
2154          */
2155         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2156         if (pieces.init_evtlog_size)
2157                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2158         else
2159                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2160         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2161         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2162         if (pieces.inst_evtlog_size)
2163                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2164         else
2165                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2166         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2167
2168         /* Copy images into buffers for card's bus-master reads ... */
2169
2170         /* Runtime instructions (first block of data in file) */
2171         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2172                         pieces.inst_size);
2173         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2174
2175         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2176                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2177
2178         /*
2179          * Runtime data
2180          * NOTE:  Copy into backup buffer will be done in iwl_up()
2181          */
2182         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2183                         pieces.data_size);
2184         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2185         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2186
2187         /* Initialization instructions */
2188         if (pieces.init_size) {
2189                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2190                                 pieces.init_size);
2191                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2192         }
2193
2194         /* Initialization data */
2195         if (pieces.init_data_size) {
2196                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2197                                pieces.init_data_size);
2198                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2199                        pieces.init_data_size);
2200         }
2201
2202         /* Bootstrap instructions */
2203         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2204                         pieces.boot_size);
2205         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2206
2207         /*
2208          * figure out the offset of chain noise reset and gain commands
2209          * base on the size of standard phy calibration commands table size
2210          */
2211         if (ucode_capa.standard_phy_calibration_size >
2212             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2213                 ucode_capa.standard_phy_calibration_size =
2214                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2215
2216         priv->_agn.phy_calib_chain_noise_reset_cmd =
2217                 ucode_capa.standard_phy_calibration_size;
2218         priv->_agn.phy_calib_chain_noise_gain_cmd =
2219                 ucode_capa.standard_phy_calibration_size + 1;
2220
2221         /**************************************************
2222          * This is still part of probe() in a sense...
2223          *
2224          * 9. Setup and register with mac80211 and debugfs
2225          **************************************************/
2226         err = iwl_mac_setup_register(priv, &ucode_capa);
2227         if (err)
2228                 goto out_unbind;
2229
2230         err = iwl_dbgfs_register(priv, DRV_NAME);
2231         if (err)
2232                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2233
2234         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2235                                         &iwl_attribute_group);
2236         if (err) {
2237                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2238                 goto out_unbind;
2239         }
2240
2241         /* We have our copies now, allow OS release its copies */
2242         release_firmware(ucode_raw);
2243         complete(&priv->_agn.firmware_loading_complete);
2244         return;
2245
2246  try_again:
2247         /* try next, if any */
2248         if (iwl_request_firmware(priv, false))
2249                 goto out_unbind;
2250         release_firmware(ucode_raw);
2251         return;
2252
2253  err_pci_alloc:
2254         IWL_ERR(priv, "failed to allocate pci memory\n");
2255         iwl_dealloc_ucode_pci(priv);
2256  out_unbind:
2257         complete(&priv->_agn.firmware_loading_complete);
2258         device_release_driver(&priv->pci_dev->dev);
2259         release_firmware(ucode_raw);
2260 }
2261
2262 static const char *desc_lookup_text[] = {
2263         "OK",
2264         "FAIL",
2265         "BAD_PARAM",
2266         "BAD_CHECKSUM",
2267         "NMI_INTERRUPT_WDG",
2268         "SYSASSERT",
2269         "FATAL_ERROR",
2270         "BAD_COMMAND",
2271         "HW_ERROR_TUNE_LOCK",
2272         "HW_ERROR_TEMPERATURE",
2273         "ILLEGAL_CHAN_FREQ",
2274         "VCC_NOT_STABLE",
2275         "FH_ERROR",
2276         "NMI_INTERRUPT_HOST",
2277         "NMI_INTERRUPT_ACTION_PT",
2278         "NMI_INTERRUPT_UNKNOWN",
2279         "UCODE_VERSION_MISMATCH",
2280         "HW_ERROR_ABS_LOCK",
2281         "HW_ERROR_CAL_LOCK_FAIL",
2282         "NMI_INTERRUPT_INST_ACTION_PT",
2283         "NMI_INTERRUPT_DATA_ACTION_PT",
2284         "NMI_TRM_HW_ER",
2285         "NMI_INTERRUPT_TRM",
2286         "NMI_INTERRUPT_BREAK_POINT"
2287         "DEBUG_0",
2288         "DEBUG_1",
2289         "DEBUG_2",
2290         "DEBUG_3",
2291 };
2292
2293 static struct { char *name; u8 num; } advanced_lookup[] = {
2294         { "NMI_INTERRUPT_WDG", 0x34 },
2295         { "SYSASSERT", 0x35 },
2296         { "UCODE_VERSION_MISMATCH", 0x37 },
2297         { "BAD_COMMAND", 0x38 },
2298         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2299         { "FATAL_ERROR", 0x3D },
2300         { "NMI_TRM_HW_ERR", 0x46 },
2301         { "NMI_INTERRUPT_TRM", 0x4C },
2302         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2303         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2304         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2305         { "NMI_INTERRUPT_HOST", 0x66 },
2306         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2307         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2308         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2309         { "ADVANCED_SYSASSERT", 0 },
2310 };
2311
2312 static const char *desc_lookup(u32 num)
2313 {
2314         int i;
2315         int max = ARRAY_SIZE(desc_lookup_text);
2316
2317         if (num < max)
2318                 return desc_lookup_text[num];
2319
2320         max = ARRAY_SIZE(advanced_lookup) - 1;
2321         for (i = 0; i < max; i++) {
2322                 if (advanced_lookup[i].num == num)
2323                         break;;
2324         }
2325         return advanced_lookup[i].name;
2326 }
2327
2328 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2329 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2330
2331 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2332 {
2333         u32 data2, line;
2334         u32 desc, time, count, base, data1;
2335         u32 blink1, blink2, ilink1, ilink2;
2336         u32 pc, hcmd;
2337
2338         if (priv->ucode_type == UCODE_INIT) {
2339                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2340                 if (!base)
2341                         base = priv->_agn.init_errlog_ptr;
2342         } else {
2343                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2344                 if (!base)
2345                         base = priv->_agn.inst_errlog_ptr;
2346         }
2347
2348         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2349                 IWL_ERR(priv,
2350                         "Not valid error log pointer 0x%08X for %s uCode\n",
2351                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2352                 return;
2353         }
2354
2355         count = iwl_read_targ_mem(priv, base);
2356
2357         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2358                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2359                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2360                         priv->status, count);
2361         }
2362
2363         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2364         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2365         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2366         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2367         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2368         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2369         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2370         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2371         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2372         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2373         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2374
2375         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2376                                       blink1, blink2, ilink1, ilink2);
2377
2378         IWL_ERR(priv, "Desc                                  Time       "
2379                 "data1      data2      line\n");
2380         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2381                 desc_lookup(desc), desc, time, data1, data2, line);
2382         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2383         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2384                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2385 }
2386
2387 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2388
2389 /**
2390  * iwl_print_event_log - Dump error event log to syslog
2391  *
2392  */
2393 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2394                                u32 num_events, u32 mode,
2395                                int pos, char **buf, size_t bufsz)
2396 {
2397         u32 i;
2398         u32 base;       /* SRAM byte address of event log header */
2399         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2400         u32 ptr;        /* SRAM byte address of log data */
2401         u32 ev, time, data; /* event log data */
2402         unsigned long reg_flags;
2403
2404         if (num_events == 0)
2405                 return pos;
2406
2407         if (priv->ucode_type == UCODE_INIT) {
2408                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2409                 if (!base)
2410                         base = priv->_agn.init_evtlog_ptr;
2411         } else {
2412                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2413                 if (!base)
2414                         base = priv->_agn.inst_evtlog_ptr;
2415         }
2416
2417         if (mode == 0)
2418                 event_size = 2 * sizeof(u32);
2419         else
2420                 event_size = 3 * sizeof(u32);
2421
2422         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2423
2424         /* Make sure device is powered up for SRAM reads */
2425         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2426         iwl_grab_nic_access(priv);
2427
2428         /* Set starting address; reads will auto-increment */
2429         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2430         rmb();
2431
2432         /* "time" is actually "data" for mode 0 (no timestamp).
2433         * place event id # at far right for easier visual parsing. */
2434         for (i = 0; i < num_events; i++) {
2435                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2436                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2437                 if (mode == 0) {
2438                         /* data, ev */
2439                         if (bufsz) {
2440                                 pos += scnprintf(*buf + pos, bufsz - pos,
2441                                                 "EVT_LOG:0x%08x:%04u\n",
2442                                                 time, ev);
2443                         } else {
2444                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2445                                         time, ev);
2446                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2447                                         time, ev);
2448                         }
2449                 } else {
2450                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2451                         if (bufsz) {
2452                                 pos += scnprintf(*buf + pos, bufsz - pos,
2453                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2454                                                  time, data, ev);
2455                         } else {
2456                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2457                                         time, data, ev);
2458                                 trace_iwlwifi_dev_ucode_event(priv, time,
2459                                         data, ev);
2460                         }
2461                 }
2462         }
2463
2464         /* Allow device to power down */
2465         iwl_release_nic_access(priv);
2466         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2467         return pos;
2468 }
2469
2470 /**
2471  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2472  */
2473 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2474                                     u32 num_wraps, u32 next_entry,
2475                                     u32 size, u32 mode,
2476                                     int pos, char **buf, size_t bufsz)
2477 {
2478         /*
2479          * display the newest DEFAULT_LOG_ENTRIES entries
2480          * i.e the entries just before the next ont that uCode would fill.
2481          */
2482         if (num_wraps) {
2483                 if (next_entry < size) {
2484                         pos = iwl_print_event_log(priv,
2485                                                 capacity - (size - next_entry),
2486                                                 size - next_entry, mode,
2487                                                 pos, buf, bufsz);
2488                         pos = iwl_print_event_log(priv, 0,
2489                                                   next_entry, mode,
2490                                                   pos, buf, bufsz);
2491                 } else
2492                         pos = iwl_print_event_log(priv, next_entry - size,
2493                                                   size, mode, pos, buf, bufsz);
2494         } else {
2495                 if (next_entry < size) {
2496                         pos = iwl_print_event_log(priv, 0, next_entry,
2497                                                   mode, pos, buf, bufsz);
2498                 } else {
2499                         pos = iwl_print_event_log(priv, next_entry - size,
2500                                                   size, mode, pos, buf, bufsz);
2501                 }
2502         }
2503         return pos;
2504 }
2505
2506 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2507
2508 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2509                             char **buf, bool display)
2510 {
2511         u32 base;       /* SRAM byte address of event log header */
2512         u32 capacity;   /* event log capacity in # entries */
2513         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2514         u32 num_wraps;  /* # times uCode wrapped to top of log */
2515         u32 next_entry; /* index of next entry to be written by uCode */
2516         u32 size;       /* # entries that we'll print */
2517         u32 logsize;
2518         int pos = 0;
2519         size_t bufsz = 0;
2520
2521         if (priv->ucode_type == UCODE_INIT) {
2522                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2523                 logsize = priv->_agn.init_evtlog_size;
2524                 if (!base)
2525                         base = priv->_agn.init_evtlog_ptr;
2526         } else {
2527                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2528                 logsize = priv->_agn.inst_evtlog_size;
2529                 if (!base)
2530                         base = priv->_agn.inst_evtlog_ptr;
2531         }
2532
2533         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2534                 IWL_ERR(priv,
2535                         "Invalid event log pointer 0x%08X for %s uCode\n",
2536                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2537                 return -EINVAL;
2538         }
2539
2540         /* event log header */
2541         capacity = iwl_read_targ_mem(priv, base);
2542         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2543         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2544         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2545
2546         if (capacity > logsize) {
2547                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2548                         capacity, logsize);
2549                 capacity = logsize;
2550         }
2551
2552         if (next_entry > logsize) {
2553                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2554                         next_entry, logsize);
2555                 next_entry = logsize;
2556         }
2557
2558         size = num_wraps ? capacity : next_entry;
2559
2560         /* bail out if nothing in log */
2561         if (size == 0) {
2562                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2563                 return pos;
2564         }
2565
2566 #ifdef CONFIG_IWLWIFI_DEBUG
2567         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2568                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2569                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2570 #else
2571         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2572                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2573 #endif
2574         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2575                 size);
2576
2577 #ifdef CONFIG_IWLWIFI_DEBUG
2578         if (display) {
2579                 if (full_log)
2580                         bufsz = capacity * 48;
2581                 else
2582                         bufsz = size * 48;
2583                 *buf = kmalloc(bufsz, GFP_KERNEL);
2584                 if (!*buf)
2585                         return -ENOMEM;
2586         }
2587         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2588                 /*
2589                  * if uCode has wrapped back to top of log,
2590                  * start at the oldest entry,
2591                  * i.e the next one that uCode would fill.
2592                  */
2593                 if (num_wraps)
2594                         pos = iwl_print_event_log(priv, next_entry,
2595                                                 capacity - next_entry, mode,
2596                                                 pos, buf, bufsz);
2597                 /* (then/else) start at top of log */
2598                 pos = iwl_print_event_log(priv, 0,
2599                                           next_entry, mode, pos, buf, bufsz);
2600         } else
2601                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2602                                                 next_entry, size, mode,
2603                                                 pos, buf, bufsz);
2604 #else
2605         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2606                                         next_entry, size, mode,
2607                                         pos, buf, bufsz);
2608 #endif
2609         return pos;
2610 }
2611
2612 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2613 {
2614         struct iwl_ct_kill_config cmd;
2615         struct iwl_ct_kill_throttling_config adv_cmd;
2616         unsigned long flags;
2617         int ret = 0;
2618
2619         spin_lock_irqsave(&priv->lock, flags);
2620         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2621                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2622         spin_unlock_irqrestore(&priv->lock, flags);
2623         priv->thermal_throttle.ct_kill_toggle = false;
2624
2625         if (priv->cfg->support_ct_kill_exit) {
2626                 adv_cmd.critical_temperature_enter =
2627                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2628                 adv_cmd.critical_temperature_exit =
2629                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2630
2631                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2632                                        sizeof(adv_cmd), &adv_cmd);
2633                 if (ret)
2634                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2635                 else
2636                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2637                                         "succeeded, "
2638                                         "critical temperature enter is %d,"
2639                                         "exit is %d\n",
2640                                        priv->hw_params.ct_kill_threshold,
2641                                        priv->hw_params.ct_kill_exit_threshold);
2642         } else {
2643                 cmd.critical_temperature_R =
2644                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2645
2646                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2647                                        sizeof(cmd), &cmd);
2648                 if (ret)
2649                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2650                 else
2651                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2652                                         "succeeded, "
2653                                         "critical temperature is %d\n",
2654                                         priv->hw_params.ct_kill_threshold);
2655         }
2656 }
2657
2658 /**
2659  * iwl_alive_start - called after REPLY_ALIVE notification received
2660  *                   from protocol/runtime uCode (initialization uCode's
2661  *                   Alive gets handled by iwl_init_alive_start()).
2662  */
2663 static void iwl_alive_start(struct iwl_priv *priv)
2664 {
2665         int ret = 0;
2666
2667         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2668
2669         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2670                 /* We had an error bringing up the hardware, so take it
2671                  * all the way back down so we can try again */
2672                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2673                 goto restart;
2674         }
2675
2676         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2677          * This is a paranoid check, because we would not have gotten the
2678          * "runtime" alive if code weren't properly loaded.  */
2679         if (iwl_verify_ucode(priv)) {
2680                 /* Runtime instruction load was bad;
2681                  * take it all the way back down so we can try again */
2682                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2683                 goto restart;
2684         }
2685
2686         ret = priv->cfg->ops->lib->alive_notify(priv);
2687         if (ret) {
2688                 IWL_WARN(priv,
2689                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2690                 goto restart;
2691         }
2692
2693         /* After the ALIVE response, we can send host commands to the uCode */
2694         set_bit(STATUS_ALIVE, &priv->status);
2695
2696         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2697                 /* Enable timer to monitor the driver queues */
2698                 mod_timer(&priv->monitor_recover,
2699                         jiffies +
2700                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2701         }
2702
2703         if (iwl_is_rfkill(priv))
2704                 return;
2705
2706         ieee80211_wake_queues(priv->hw);
2707
2708         priv->active_rate = IWL_RATES_MASK;
2709
2710         /* Configure Tx antenna selection based on H/W config */
2711         if (priv->cfg->ops->hcmd->set_tx_ant)
2712                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2713
2714         if (iwl_is_associated(priv)) {
2715                 struct iwl_rxon_cmd *active_rxon =
2716                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2717                 /* apply any changes in staging */
2718                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2719                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2720         } else {
2721                 /* Initialize our rx_config data */
2722                 iwl_connection_init_rx_config(priv, NULL);
2723
2724                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2725                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2726         }
2727
2728         /* Configure Bluetooth device coexistence support */
2729         priv->cfg->ops->hcmd->send_bt_config(priv);
2730
2731         iwl_reset_run_time_calib(priv);
2732
2733         /* Configure the adapter for unassociated operation */
2734         iwlcore_commit_rxon(priv);
2735
2736         /* At this point, the NIC is initialized and operational */
2737         iwl_rf_kill_ct_config(priv);
2738
2739         iwl_leds_init(priv);
2740
2741         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2742         set_bit(STATUS_READY, &priv->status);
2743         wake_up_interruptible(&priv->wait_command_queue);
2744
2745         iwl_power_update_mode(priv, true);
2746         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2747
2748
2749         return;
2750
2751  restart:
2752         queue_work(priv->workqueue, &priv->restart);
2753 }
2754
2755 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2756
2757 static void __iwl_down(struct iwl_priv *priv)
2758 {
2759         unsigned long flags;
2760         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2761
2762         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2763
2764         if (!exit_pending)
2765                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2766
2767         iwl_clear_ucode_stations(priv);
2768         iwl_dealloc_bcast_station(priv);
2769         iwl_clear_driver_stations(priv);
2770
2771         /* Unblock any waiting calls */
2772         wake_up_interruptible_all(&priv->wait_command_queue);
2773
2774         /* Wipe out the EXIT_PENDING status bit if we are not actually
2775          * exiting the module */
2776         if (!exit_pending)
2777                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2778
2779         /* stop and reset the on-board processor */
2780         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2781
2782         /* tell the device to stop sending interrupts */
2783         spin_lock_irqsave(&priv->lock, flags);
2784         iwl_disable_interrupts(priv);
2785         spin_unlock_irqrestore(&priv->lock, flags);
2786         iwl_synchronize_irq(priv);
2787
2788         if (priv->mac80211_registered)
2789                 ieee80211_stop_queues(priv->hw);
2790
2791         /* If we have not previously called iwl_init() then
2792          * clear all bits but the RF Kill bit and return */
2793         if (!iwl_is_init(priv)) {
2794                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2795                                         STATUS_RF_KILL_HW |
2796                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2797                                         STATUS_GEO_CONFIGURED |
2798                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2799                                         STATUS_EXIT_PENDING;
2800                 goto exit;
2801         }
2802
2803         /* ...otherwise clear out all the status bits but the RF Kill
2804          * bit and continue taking the NIC down. */
2805         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2806                                 STATUS_RF_KILL_HW |
2807                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2808                                 STATUS_GEO_CONFIGURED |
2809                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2810                                 STATUS_FW_ERROR |
2811                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2812                                 STATUS_EXIT_PENDING;
2813
2814         /* device going down, Stop using ICT table */
2815         iwl_disable_ict(priv);
2816
2817         iwlagn_txq_ctx_stop(priv);
2818         iwlagn_rxq_stop(priv);
2819
2820         /* Power-down device's busmaster DMA clocks */
2821         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2822         udelay(5);
2823
2824         /* Make sure (redundant) we've released our request to stay awake */
2825         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2826
2827         /* Stop the device, and put it in low power state */
2828         priv->cfg->ops->lib->apm_ops.stop(priv);
2829
2830  exit:
2831         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2832
2833         if (priv->ibss_beacon)
2834                 dev_kfree_skb(priv->ibss_beacon);
2835         priv->ibss_beacon = NULL;
2836
2837         /* clear out any free frames */
2838         iwl_clear_free_frames(priv);
2839 }
2840
2841 static void iwl_down(struct iwl_priv *priv)
2842 {
2843         mutex_lock(&priv->mutex);
2844         __iwl_down(priv);
2845         mutex_unlock(&priv->mutex);
2846
2847         iwl_cancel_deferred_work(priv);
2848 }
2849
2850 #define HW_READY_TIMEOUT (50)
2851
2852 static int iwl_set_hw_ready(struct iwl_priv *priv)
2853 {
2854         int ret = 0;
2855
2856         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2857                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2858
2859         /* See if we got it */
2860         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2861                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2862                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2863                                 HW_READY_TIMEOUT);
2864         if (ret != -ETIMEDOUT)
2865                 priv->hw_ready = true;
2866         else
2867                 priv->hw_ready = false;
2868
2869         IWL_DEBUG_INFO(priv, "hardware %s\n",
2870                       (priv->hw_ready == 1) ? "ready" : "not ready");
2871         return ret;
2872 }
2873
2874 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2875 {
2876         int ret = 0;
2877
2878         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2879
2880         ret = iwl_set_hw_ready(priv);
2881         if (priv->hw_ready)
2882                 return ret;
2883
2884         /* If HW is not ready, prepare the conditions to check again */
2885         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2886                         CSR_HW_IF_CONFIG_REG_PREPARE);
2887
2888         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2889                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2890                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2891
2892         /* HW should be ready by now, check again. */
2893         if (ret != -ETIMEDOUT)
2894                 iwl_set_hw_ready(priv);
2895
2896         return ret;
2897 }
2898
2899 #define MAX_HW_RESTARTS 5
2900
2901 static int __iwl_up(struct iwl_priv *priv)
2902 {
2903         int i;
2904         int ret;
2905
2906         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2907                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2908                 return -EIO;
2909         }
2910
2911         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2912                 IWL_ERR(priv, "ucode not available for device bringup\n");
2913                 return -EIO;
2914         }
2915
2916         ret = iwl_alloc_bcast_station(priv, true);
2917         if (ret)
2918                 return ret;
2919
2920         iwl_prepare_card_hw(priv);
2921
2922         if (!priv->hw_ready) {
2923                 IWL_WARN(priv, "Exit HW not ready\n");
2924                 return -EIO;
2925         }
2926
2927         /* If platform's RF_KILL switch is NOT set to KILL */
2928         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2929                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2930         else
2931                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2932
2933         if (iwl_is_rfkill(priv)) {
2934                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2935
2936                 iwl_enable_interrupts(priv);
2937                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2938                 return 0;
2939         }
2940
2941         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2942
2943         ret = iwlagn_hw_nic_init(priv);
2944         if (ret) {
2945                 IWL_ERR(priv, "Unable to init nic\n");
2946                 return ret;
2947         }
2948
2949         /* make sure rfkill handshake bits are cleared */
2950         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2951         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2952                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2953
2954         /* clear (again), then enable host interrupts */
2955         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2956         iwl_enable_interrupts(priv);
2957
2958         /* really make sure rfkill handshake bits are cleared */
2959         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2960         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2961
2962         /* Copy original ucode data image from disk into backup cache.
2963          * This will be used to initialize the on-board processor's
2964          * data SRAM for a clean start when the runtime program first loads. */
2965         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2966                priv->ucode_data.len);
2967
2968         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2969
2970                 /* load bootstrap state machine,
2971                  * load bootstrap program into processor's memory,
2972                  * prepare to load the "initialize" uCode */
2973                 ret = priv->cfg->ops->lib->load_ucode(priv);
2974
2975                 if (ret) {
2976                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2977                                 ret);
2978                         continue;
2979                 }
2980
2981                 /* start card; "initialize" will load runtime ucode */
2982                 iwl_nic_start(priv);
2983
2984                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2985
2986                 return 0;
2987         }
2988
2989         set_bit(STATUS_EXIT_PENDING, &priv->status);
2990         __iwl_down(priv);
2991         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2992
2993         /* tried to restart and config the device for as long as our
2994          * patience could withstand */
2995         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2996         return -EIO;
2997 }
2998
2999
3000 /*****************************************************************************
3001  *
3002  * Workqueue callbacks
3003  *
3004  *****************************************************************************/
3005
3006 static void iwl_bg_init_alive_start(struct work_struct *data)
3007 {
3008         struct iwl_priv *priv =
3009             container_of(data, struct iwl_priv, init_alive_start.work);
3010
3011         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3012                 return;
3013
3014         mutex_lock(&priv->mutex);
3015         priv->cfg->ops->lib->init_alive_start(priv);
3016         mutex_unlock(&priv->mutex);
3017 }
3018
3019 static void iwl_bg_alive_start(struct work_struct *data)
3020 {
3021         struct iwl_priv *priv =
3022             container_of(data, struct iwl_priv, alive_start.work);
3023
3024         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3025                 return;
3026
3027         /* enable dram interrupt */
3028         iwl_reset_ict(priv);
3029
3030         mutex_lock(&priv->mutex);
3031         iwl_alive_start(priv);
3032         mutex_unlock(&priv->mutex);
3033 }
3034
3035 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3036 {
3037         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3038                         run_time_calib_work);
3039
3040         mutex_lock(&priv->mutex);
3041
3042         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3043             test_bit(STATUS_SCANNING, &priv->status)) {
3044                 mutex_unlock(&priv->mutex);
3045                 return;
3046         }
3047
3048         if (priv->start_calib) {
3049                 if (priv->cfg->bt_statistics) {
3050                         iwl_chain_noise_calibration(priv,
3051                                         (void *)&priv->_agn.statistics_bt);
3052                         iwl_sensitivity_calibration(priv,
3053                                         (void *)&priv->_agn.statistics_bt);
3054                 } else {
3055                         iwl_chain_noise_calibration(priv,
3056                                         (void *)&priv->_agn.statistics);
3057                         iwl_sensitivity_calibration(priv,
3058                                         (void *)&priv->_agn.statistics);
3059                 }
3060         }
3061
3062         mutex_unlock(&priv->mutex);
3063 }
3064
3065 static void iwl_bg_restart(struct work_struct *data)
3066 {
3067         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3068
3069         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3070                 return;
3071
3072         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3073                 mutex_lock(&priv->mutex);
3074                 priv->vif = NULL;
3075                 priv->is_open = 0;
3076                 mutex_unlock(&priv->mutex);
3077                 iwl_down(priv);
3078                 ieee80211_restart_hw(priv->hw);
3079         } else {
3080                 iwl_down(priv);
3081
3082                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3083                         return;
3084
3085                 mutex_lock(&priv->mutex);
3086                 __iwl_up(priv);
3087                 mutex_unlock(&priv->mutex);
3088         }
3089 }
3090
3091 static void iwl_bg_rx_replenish(struct work_struct *data)
3092 {
3093         struct iwl_priv *priv =
3094             container_of(data, struct iwl_priv, rx_replenish);
3095
3096         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3097                 return;
3098
3099         mutex_lock(&priv->mutex);
3100         iwlagn_rx_replenish(priv);
3101         mutex_unlock(&priv->mutex);
3102 }
3103
3104 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3105
3106 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3107 {
3108         struct ieee80211_conf *conf = NULL;
3109         int ret = 0;
3110
3111         if (!vif || !priv->is_open)
3112                 return;
3113
3114         if (vif->type == NL80211_IFTYPE_AP) {
3115                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3116                 return;
3117         }
3118
3119         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3120                 return;
3121
3122         iwl_scan_cancel_timeout(priv, 200);
3123
3124         conf = ieee80211_get_hw_conf(priv->hw);
3125
3126         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3127         iwlcore_commit_rxon(priv);
3128
3129         ret = iwl_send_rxon_timing(priv, vif);
3130         if (ret)
3131                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3132                             "Attempting to continue.\n");
3133
3134         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3135
3136         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3137
3138         if (priv->cfg->ops->hcmd->set_rxon_chain)
3139                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3140
3141         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3142
3143         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3144                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3145
3146         if (vif->bss_conf.use_short_preamble)
3147                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3148         else
3149                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3150
3151         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3152                 if (vif->bss_conf.use_short_slot)
3153                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3154                 else
3155                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3156         }
3157
3158         iwlcore_commit_rxon(priv);
3159
3160         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3161                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3162
3163         switch (vif->type) {
3164         case NL80211_IFTYPE_STATION:
3165                 break;
3166         case NL80211_IFTYPE_ADHOC:
3167                 iwl_send_beacon_cmd(priv);
3168                 break;
3169         default:
3170                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3171                           __func__, vif->type);
3172                 break;
3173         }
3174
3175         /* the chain noise calibration will enabled PM upon completion
3176          * If chain noise has already been run, then we need to enable
3177          * power management here */
3178         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3179                 iwl_power_update_mode(priv, false);
3180
3181         /* Enable Rx differential gain and sensitivity calibrations */
3182         iwl_chain_noise_reset(priv);
3183         priv->start_calib = 1;
3184
3185 }
3186
3187 /*****************************************************************************
3188  *
3189  * mac80211 entry point functions
3190  *
3191  *****************************************************************************/
3192
3193 #define UCODE_READY_TIMEOUT     (4 * HZ)
3194
3195 /*
3196  * Not a mac80211 entry point function, but it fits in with all the
3197  * other mac80211 functions grouped here.
3198  */
3199 static int iwl_mac_setup_register(struct iwl_priv *priv,
3200                                   struct iwlagn_ucode_capabilities *capa)
3201 {
3202         int ret;
3203         struct ieee80211_hw *hw = priv->hw;
3204         hw->rate_control_algorithm = "iwl-agn-rs";
3205
3206         /* Tell mac80211 our characteristics */
3207         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3208                     IEEE80211_HW_AMPDU_AGGREGATION |
3209                     IEEE80211_HW_SPECTRUM_MGMT;
3210
3211         if (!priv->cfg->broken_powersave)
3212                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3213                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3214
3215         if (priv->cfg->sku & IWL_SKU_N)
3216                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3217                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3218
3219         hw->sta_data_size = sizeof(struct iwl_station_priv);
3220         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3221
3222         hw->wiphy->interface_modes =
3223                 BIT(NL80211_IFTYPE_STATION) |
3224                 BIT(NL80211_IFTYPE_ADHOC);
3225
3226         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3227                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3228
3229         /*
3230          * For now, disable PS by default because it affects
3231          * RX performance significantly.
3232          */
3233         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3234
3235         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3236         /* we create the 802.11 header and a zero-length SSID element */
3237         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3238
3239         /* Default value; 4 EDCA QOS priorities */
3240         hw->queues = 4;
3241
3242         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3243
3244         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3245                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3246                         &priv->bands[IEEE80211_BAND_2GHZ];
3247         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3248                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3249                         &priv->bands[IEEE80211_BAND_5GHZ];
3250
3251         ret = ieee80211_register_hw(priv->hw);
3252         if (ret) {
3253                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3254                 return ret;
3255         }
3256         priv->mac80211_registered = 1;
3257
3258         return 0;
3259 }
3260
3261
3262 static int iwl_mac_start(struct ieee80211_hw *hw)
3263 {
3264         struct iwl_priv *priv = hw->priv;
3265         int ret;
3266
3267         IWL_DEBUG_MAC80211(priv, "enter\n");
3268
3269         /* we should be verifying the device is ready to be opened */
3270         mutex_lock(&priv->mutex);
3271         ret = __iwl_up(priv);
3272         mutex_unlock(&priv->mutex);
3273
3274         if (ret)
3275                 return ret;
3276
3277         if (iwl_is_rfkill(priv))
3278                 goto out;
3279
3280         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3281
3282         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3283          * mac80211 will not be run successfully. */
3284         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3285                         test_bit(STATUS_READY, &priv->status),
3286                         UCODE_READY_TIMEOUT);
3287         if (!ret) {
3288                 if (!test_bit(STATUS_READY, &priv->status)) {
3289                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3290                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3291                         return -ETIMEDOUT;
3292                 }
3293         }
3294
3295         iwl_led_start(priv);
3296
3297 out:
3298         priv->is_open = 1;
3299         IWL_DEBUG_MAC80211(priv, "leave\n");
3300         return 0;
3301 }
3302
3303 static void iwl_mac_stop(struct ieee80211_hw *hw)
3304 {
3305         struct iwl_priv *priv = hw->priv;
3306
3307         IWL_DEBUG_MAC80211(priv, "enter\n");
3308
3309         if (!priv->is_open)
3310                 return;
3311
3312         priv->is_open = 0;
3313
3314         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3315                 /* stop mac, cancel any scan request and clear
3316                  * RXON_FILTER_ASSOC_MSK BIT
3317                  */
3318                 mutex_lock(&priv->mutex);
3319                 iwl_scan_cancel_timeout(priv, 100);
3320                 mutex_unlock(&priv->mutex);
3321         }
3322
3323         iwl_down(priv);
3324
3325         flush_workqueue(priv->workqueue);
3326
3327         /* enable interrupts again in order to receive rfkill changes */
3328         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3329         iwl_enable_interrupts(priv);
3330
3331         IWL_DEBUG_MAC80211(priv, "leave\n");
3332 }
3333
3334 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3335 {
3336         struct iwl_priv *priv = hw->priv;
3337
3338         IWL_DEBUG_MACDUMP(priv, "enter\n");
3339
3340         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3341                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3342
3343         if (iwlagn_tx_skb(priv, skb))
3344                 dev_kfree_skb_any(skb);
3345
3346         IWL_DEBUG_MACDUMP(priv, "leave\n");
3347         return NETDEV_TX_OK;
3348 }
3349
3350 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3351 {
3352         int ret = 0;
3353
3354         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3355                 return;
3356
3357         /* The following should be done only at AP bring up */
3358         if (!iwl_is_associated(priv)) {
3359
3360                 /* RXON - unassoc (to set timing command) */
3361                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3362                 iwlcore_commit_rxon(priv);
3363
3364                 /* RXON Timing */
3365                 ret = iwl_send_rxon_timing(priv, vif);
3366                 if (ret)
3367                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3368                                         "Attempting to continue.\n");
3369
3370                 /* AP has all antennas */
3371                 priv->chain_noise_data.active_chains =
3372                         priv->hw_params.valid_rx_ant;
3373                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3374                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3375                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3376
3377                 priv->staging_rxon.assoc_id = 0;
3378
3379                 if (vif->bss_conf.use_short_preamble)
3380                         priv->staging_rxon.flags |=
3381                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3382                 else
3383                         priv->staging_rxon.flags &=
3384                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3385
3386                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3387                         if (vif->bss_conf.use_short_slot)
3388                                 priv->staging_rxon.flags |=
3389                                         RXON_FLG_SHORT_SLOT_MSK;
3390                         else
3391                                 priv->staging_rxon.flags &=
3392                                         ~RXON_FLG_SHORT_SLOT_MSK;
3393                 }
3394                 /* restore RXON assoc */
3395                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3396                 iwlcore_commit_rxon(priv);
3397         }
3398         iwl_send_beacon_cmd(priv);
3399
3400         /* FIXME - we need to add code here to detect a totally new
3401          * configuration, reset the AP, unassoc, rxon timing, assoc,
3402          * clear sta table, add BCAST sta... */
3403 }
3404
3405 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3406                                     struct ieee80211_vif *vif,
3407                                     struct ieee80211_key_conf *keyconf,
3408                                     struct ieee80211_sta *sta,
3409                                     u32 iv32, u16 *phase1key)
3410 {
3411
3412         struct iwl_priv *priv = hw->priv;
3413         IWL_DEBUG_MAC80211(priv, "enter\n");
3414
3415         iwl_update_tkip_key(priv, keyconf, sta,
3416                             iv32, phase1key);
3417
3418         IWL_DEBUG_MAC80211(priv, "leave\n");
3419 }
3420
3421 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3422                            struct ieee80211_vif *vif,
3423                            struct ieee80211_sta *sta,
3424                            struct ieee80211_key_conf *key)
3425 {
3426         struct iwl_priv *priv = hw->priv;
3427         int ret;
3428         u8 sta_id;
3429         bool is_default_wep_key = false;
3430
3431         IWL_DEBUG_MAC80211(priv, "enter\n");
3432
3433         if (priv->cfg->mod_params->sw_crypto) {
3434                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3435                 return -EOPNOTSUPP;
3436         }
3437
3438         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3439         if (sta_id == IWL_INVALID_STATION)
3440                 return -EINVAL;
3441
3442         mutex_lock(&priv->mutex);
3443         iwl_scan_cancel_timeout(priv, 100);
3444
3445         /*
3446          * If we are getting WEP group key and we didn't receive any key mapping
3447          * so far, we are in legacy wep mode (group key only), otherwise we are
3448          * in 1X mode.
3449          * In legacy wep mode, we use another host command to the uCode.
3450          */
3451         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3452              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3453             !sta && vif->type != NL80211_IFTYPE_AP) {
3454                 if (cmd == SET_KEY)
3455                         is_default_wep_key = !priv->key_mapping_key;
3456                 else
3457                         is_default_wep_key =
3458                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3459         }
3460
3461         switch (cmd) {
3462         case SET_KEY:
3463                 if (is_default_wep_key)
3464                         ret = iwl_set_default_wep_key(priv, key);
3465                 else
3466                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3467
3468                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3469                 break;
3470         case DISABLE_KEY:
3471                 if (is_default_wep_key)
3472                         ret = iwl_remove_default_wep_key(priv, key);
3473                 else
3474                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3475
3476                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3477                 break;
3478         default:
3479                 ret = -EINVAL;
3480         }
3481
3482         mutex_unlock(&priv->mutex);
3483         IWL_DEBUG_MAC80211(priv, "leave\n");
3484
3485         return ret;
3486 }
3487
3488 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3489                                 struct ieee80211_vif *vif,
3490                                 enum ieee80211_ampdu_mlme_action action,
3491                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3492 {
3493         struct iwl_priv *priv = hw->priv;
3494         int ret = -EINVAL;
3495
3496         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3497                      sta->addr, tid);
3498
3499         if (!(priv->cfg->sku & IWL_SKU_N))
3500                 return -EACCES;
3501
3502         mutex_lock(&priv->mutex);
3503
3504         switch (action) {
3505         case IEEE80211_AMPDU_RX_START:
3506                 IWL_DEBUG_HT(priv, "start Rx\n");
3507                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3508                 break;
3509         case IEEE80211_AMPDU_RX_STOP:
3510                 IWL_DEBUG_HT(priv, "stop Rx\n");
3511                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3512                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3513                         ret = 0;
3514                 break;
3515         case IEEE80211_AMPDU_TX_START:
3516                 IWL_DEBUG_HT(priv, "start Tx\n");
3517                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3518                 if (ret == 0) {
3519                         priv->_agn.agg_tids_count++;
3520                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3521                                      priv->_agn.agg_tids_count);
3522                 }
3523                 break;
3524         case IEEE80211_AMPDU_TX_STOP:
3525                 IWL_DEBUG_HT(priv, "stop Tx\n");
3526                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3527                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3528                         priv->_agn.agg_tids_count--;
3529                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3530                                      priv->_agn.agg_tids_count);
3531                 }
3532                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3533                         ret = 0;
3534                 if (priv->cfg->use_rts_for_aggregation) {
3535                         struct iwl_station_priv *sta_priv =
3536                                 (void *) sta->drv_priv;
3537                         /*
3538                          * switch off RTS/CTS if it was previously enabled
3539                          */
3540
3541                         sta_priv->lq_sta.lq.general_params.flags &=
3542                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3543                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3544                                 CMD_ASYNC, false);
3545                 }
3546                 break;
3547         case IEEE80211_AMPDU_TX_OPERATIONAL:
3548                 if (priv->cfg->use_rts_for_aggregation) {
3549                         struct iwl_station_priv *sta_priv =
3550                                 (void *) sta->drv_priv;
3551
3552                         /*
3553                          * switch to RTS/CTS if it is the prefer protection
3554                          * method for HT traffic
3555                          */
3556
3557                         sta_priv->lq_sta.lq.general_params.flags |=
3558                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3559                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3560                                 CMD_ASYNC, false);
3561                 }
3562                 ret = 0;
3563                 break;
3564         }
3565         mutex_unlock(&priv->mutex);
3566
3567         return ret;
3568 }
3569
3570 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3571                                struct ieee80211_vif *vif,
3572                                enum sta_notify_cmd cmd,
3573                                struct ieee80211_sta *sta)
3574 {
3575         struct iwl_priv *priv = hw->priv;
3576         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3577         int sta_id;
3578
3579         switch (cmd) {
3580         case STA_NOTIFY_SLEEP:
3581                 WARN_ON(!sta_priv->client);
3582                 sta_priv->asleep = true;
3583                 if (atomic_read(&sta_priv->pending_frames) > 0)
3584                         ieee80211_sta_block_awake(hw, sta, true);
3585                 break;
3586         case STA_NOTIFY_AWAKE:
3587                 WARN_ON(!sta_priv->client);
3588                 if (!sta_priv->asleep)
3589                         break;
3590                 sta_priv->asleep = false;
3591                 sta_id = iwl_sta_id(sta);
3592                 if (sta_id != IWL_INVALID_STATION)
3593                         iwl_sta_modify_ps_wake(priv, sta_id);
3594                 break;
3595         default:
3596                 break;
3597         }
3598 }
3599
3600 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3601                               struct ieee80211_vif *vif,
3602                               struct ieee80211_sta *sta)
3603 {
3604         struct iwl_priv *priv = hw->priv;
3605         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3606         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3607         int ret;
3608         u8 sta_id;
3609
3610         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3611                         sta->addr);
3612         mutex_lock(&priv->mutex);
3613         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3614                         sta->addr);
3615         sta_priv->common.sta_id = IWL_INVALID_STATION;
3616
3617         atomic_set(&sta_priv->pending_frames, 0);
3618         if (vif->type == NL80211_IFTYPE_AP)
3619                 sta_priv->client = true;
3620
3621         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3622                                      &sta_id);
3623         if (ret) {
3624                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3625                         sta->addr, ret);
3626                 /* Should we return success if return code is EEXIST ? */
3627                 mutex_unlock(&priv->mutex);
3628                 return ret;
3629         }
3630
3631         sta_priv->common.sta_id = sta_id;
3632
3633         /* Initialize rate scaling */
3634         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3635                        sta->addr);
3636         iwl_rs_rate_init(priv, sta, sta_id);
3637         mutex_unlock(&priv->mutex);
3638
3639         return 0;
3640 }
3641
3642 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3643                                    struct ieee80211_channel_switch *ch_switch)
3644 {
3645         struct iwl_priv *priv = hw->priv;
3646         const struct iwl_channel_info *ch_info;
3647         struct ieee80211_conf *conf = &hw->conf;
3648         struct ieee80211_channel *channel = ch_switch->channel;
3649         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3650         u16 ch;
3651         unsigned long flags = 0;
3652
3653         IWL_DEBUG_MAC80211(priv, "enter\n");
3654
3655         if (iwl_is_rfkill(priv))
3656                 goto out_exit;
3657
3658         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3659             test_bit(STATUS_SCANNING, &priv->status))
3660                 goto out_exit;
3661
3662         if (!iwl_is_associated(priv))
3663                 goto out_exit;
3664
3665         /* channel switch in progress */
3666         if (priv->switch_rxon.switch_in_progress == true)
3667                 goto out_exit;
3668
3669         mutex_lock(&priv->mutex);
3670         if (priv->cfg->ops->lib->set_channel_switch) {
3671
3672                 ch = channel->hw_value;
3673                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3674                         ch_info = iwl_get_channel_info(priv,
3675                                                        channel->band,
3676                                                        ch);
3677                         if (!is_channel_valid(ch_info)) {
3678                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3679                                 goto out;
3680                         }
3681                         spin_lock_irqsave(&priv->lock, flags);
3682
3683                         priv->current_ht_config.smps = conf->smps_mode;
3684
3685                         /* Configure HT40 channels */
3686                         ht_conf->is_ht = conf_is_ht(conf);
3687                         if (ht_conf->is_ht) {
3688                                 if (conf_is_ht40_minus(conf)) {
3689                                         ht_conf->extension_chan_offset =
3690                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3691                                         ht_conf->is_40mhz = true;
3692                                 } else if (conf_is_ht40_plus(conf)) {
3693                                         ht_conf->extension_chan_offset =
3694                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3695                                         ht_conf->is_40mhz = true;
3696                                 } else {
3697                                         ht_conf->extension_chan_offset =
3698                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3699                                         ht_conf->is_40mhz = false;
3700                                 }
3701                         } else
3702                                 ht_conf->is_40mhz = false;
3703
3704                         if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3705                                 priv->staging_rxon.flags = 0;
3706
3707                         iwl_set_rxon_channel(priv, channel);
3708                         iwl_set_rxon_ht(priv, ht_conf);
3709                         iwl_set_flags_for_band(priv, channel->band,
3710                                                priv->vif);
3711                         spin_unlock_irqrestore(&priv->lock, flags);
3712
3713                         iwl_set_rate(priv);
3714                         /*
3715                          * at this point, staging_rxon has the
3716                          * configuration for channel switch
3717                          */
3718                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3719                                                                     ch_switch))
3720                                 priv->switch_rxon.switch_in_progress = false;
3721                 }
3722         }
3723 out:
3724         mutex_unlock(&priv->mutex);
3725 out_exit:
3726         if (!priv->switch_rxon.switch_in_progress)
3727                 ieee80211_chswitch_done(priv->vif, false);
3728         IWL_DEBUG_MAC80211(priv, "leave\n");
3729 }
3730
3731 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3732 {
3733         struct iwl_priv *priv = hw->priv;
3734
3735         mutex_lock(&priv->mutex);
3736         IWL_DEBUG_MAC80211(priv, "enter\n");
3737
3738         /* do not support "flush" */
3739         if (!priv->cfg->ops->lib->txfifo_flush)
3740                 goto done;
3741
3742         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3743                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3744                 goto done;
3745         }
3746         if (iwl_is_rfkill(priv)) {
3747                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3748                 goto done;
3749         }
3750
3751         /*
3752          * mac80211 will not push any more frames for transmit
3753          * until the flush is completed
3754          */
3755         if (drop) {
3756                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3757                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3758                         IWL_ERR(priv, "flush request fail\n");
3759                         goto done;
3760                 }
3761         }
3762         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3763         iwlagn_wait_tx_queue_empty(priv);
3764 done:
3765         mutex_unlock(&priv->mutex);
3766         IWL_DEBUG_MAC80211(priv, "leave\n");
3767 }
3768
3769 /*****************************************************************************
3770  *
3771  * driver setup and teardown
3772  *
3773  *****************************************************************************/
3774
3775 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3776 {
3777         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3778
3779         init_waitqueue_head(&priv->wait_command_queue);
3780
3781         INIT_WORK(&priv->restart, iwl_bg_restart);
3782         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3783         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3784         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3785         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3786         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3787         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3788
3789         iwl_setup_scan_deferred_work(priv);
3790
3791         if (priv->cfg->ops->lib->setup_deferred_work)
3792                 priv->cfg->ops->lib->setup_deferred_work(priv);
3793
3794         init_timer(&priv->statistics_periodic);
3795         priv->statistics_periodic.data = (unsigned long)priv;
3796         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3797
3798         init_timer(&priv->ucode_trace);
3799         priv->ucode_trace.data = (unsigned long)priv;
3800         priv->ucode_trace.function = iwl_bg_ucode_trace;
3801
3802         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3803                 init_timer(&priv->monitor_recover);
3804                 priv->monitor_recover.data = (unsigned long)priv;
3805                 priv->monitor_recover.function =
3806                         priv->cfg->ops->lib->recover_from_tx_stall;
3807         }
3808
3809         if (!priv->cfg->use_isr_legacy)
3810                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3811                         iwl_irq_tasklet, (unsigned long)priv);
3812         else
3813                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3814                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3815 }
3816
3817 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3818 {
3819         if (priv->cfg->ops->lib->cancel_deferred_work)
3820                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3821
3822         cancel_delayed_work_sync(&priv->init_alive_start);
3823         cancel_delayed_work(&priv->scan_check);
3824         cancel_work_sync(&priv->start_internal_scan);
3825         cancel_delayed_work(&priv->alive_start);
3826         cancel_work_sync(&priv->run_time_calib_work);
3827         cancel_work_sync(&priv->beacon_update);
3828         del_timer_sync(&priv->statistics_periodic);
3829         del_timer_sync(&priv->ucode_trace);
3830         if (priv->cfg->ops->lib->recover_from_tx_stall)
3831                 del_timer_sync(&priv->monitor_recover);
3832 }
3833
3834 static void iwl_init_hw_rates(struct iwl_priv *priv,
3835                               struct ieee80211_rate *rates)
3836 {
3837         int i;
3838
3839         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3840                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3841                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3842                 rates[i].hw_value_short = i;
3843                 rates[i].flags = 0;
3844                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3845                         /*
3846                          * If CCK != 1M then set short preamble rate flag.
3847                          */
3848                         rates[i].flags |=
3849                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3850                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3851                 }
3852         }
3853 }
3854
3855 static int iwl_init_drv(struct iwl_priv *priv)
3856 {
3857         int ret;
3858
3859         priv->ibss_beacon = NULL;
3860
3861         spin_lock_init(&priv->sta_lock);
3862         spin_lock_init(&priv->hcmd_lock);
3863
3864         INIT_LIST_HEAD(&priv->free_frames);
3865
3866         mutex_init(&priv->mutex);
3867         mutex_init(&priv->sync_cmd_mutex);
3868
3869         priv->ieee_channels = NULL;
3870         priv->ieee_rates = NULL;
3871         priv->band = IEEE80211_BAND_2GHZ;
3872
3873         priv->iw_mode = NL80211_IFTYPE_STATION;
3874         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3875         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3876         priv->_agn.agg_tids_count = 0;
3877
3878         /* initialize force reset */
3879         priv->force_reset[IWL_RF_RESET].reset_duration =
3880                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3881         priv->force_reset[IWL_FW_RESET].reset_duration =
3882                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3883
3884         /* Choose which receivers/antennas to use */
3885         if (priv->cfg->ops->hcmd->set_rxon_chain)
3886                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3887
3888         iwl_init_scan_params(priv);
3889
3890         /* Set the tx_power_user_lmt to the lowest power level
3891          * this value will get overwritten by channel max power avg
3892          * from eeprom */
3893         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3894
3895         ret = iwl_init_channel_map(priv);
3896         if (ret) {
3897                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3898                 goto err;
3899         }
3900
3901         ret = iwlcore_init_geos(priv);
3902         if (ret) {
3903                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3904                 goto err_free_channel_map;
3905         }
3906         iwl_init_hw_rates(priv, priv->ieee_rates);
3907
3908         return 0;
3909
3910 err_free_channel_map:
3911         iwl_free_channel_map(priv);
3912 err:
3913         return ret;
3914 }
3915
3916 static void iwl_uninit_drv(struct iwl_priv *priv)
3917 {
3918         iwl_calib_free_results(priv);
3919         iwlcore_free_geos(priv);
3920         iwl_free_channel_map(priv);
3921         kfree(priv->scan_cmd);
3922 }
3923
3924 static struct ieee80211_ops iwl_hw_ops = {
3925         .tx = iwl_mac_tx,
3926         .start = iwl_mac_start,
3927         .stop = iwl_mac_stop,
3928         .add_interface = iwl_mac_add_interface,
3929         .remove_interface = iwl_mac_remove_interface,
3930         .config = iwl_mac_config,
3931         .configure_filter = iwl_configure_filter,
3932         .set_key = iwl_mac_set_key,
3933         .update_tkip_key = iwl_mac_update_tkip_key,
3934         .conf_tx = iwl_mac_conf_tx,
3935         .reset_tsf = iwl_mac_reset_tsf,
3936         .bss_info_changed = iwl_bss_info_changed,
3937         .ampdu_action = iwl_mac_ampdu_action,
3938         .hw_scan = iwl_mac_hw_scan,
3939         .sta_notify = iwl_mac_sta_notify,
3940         .sta_add = iwlagn_mac_sta_add,
3941         .sta_remove = iwl_mac_sta_remove,
3942         .channel_switch = iwl_mac_channel_switch,
3943         .flush = iwl_mac_flush,
3944         .tx_last_beacon = iwl_mac_tx_last_beacon,
3945 };
3946
3947 static void iwl_hw_detect(struct iwl_priv *priv)
3948 {
3949         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3950         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3951         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
3952         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3953 }
3954
3955 static int iwl_set_hw_params(struct iwl_priv *priv)
3956 {
3957         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3958         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3959         if (priv->cfg->mod_params->amsdu_size_8K)
3960                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3961         else
3962                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3963
3964         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3965
3966         if (priv->cfg->mod_params->disable_11n)
3967                 priv->cfg->sku &= ~IWL_SKU_N;
3968
3969         /* Device-specific setup */
3970         return priv->cfg->ops->lib->set_hw_params(priv);
3971 }
3972
3973 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3974 {
3975         int err = 0;
3976         struct iwl_priv *priv;
3977         struct ieee80211_hw *hw;
3978         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3979         unsigned long flags;
3980         u16 pci_cmd, num_mac;
3981
3982         /************************
3983          * 1. Allocating HW data
3984          ************************/
3985
3986         /* Disabling hardware scan means that mac80211 will perform scans
3987          * "the hard way", rather than using device's scan. */
3988         if (cfg->mod_params->disable_hw_scan) {
3989                 if (iwl_debug_level & IWL_DL_INFO)
3990                         dev_printk(KERN_DEBUG, &(pdev->dev),
3991                                    "Disabling hw_scan\n");
3992                 iwl_hw_ops.hw_scan = NULL;
3993         }
3994
3995         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3996         if (!hw) {
3997                 err = -ENOMEM;
3998                 goto out;
3999         }
4000         priv = hw->priv;
4001         /* At this point both hw and priv are allocated. */
4002
4003         SET_IEEE80211_DEV(hw, &pdev->dev);
4004
4005         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4006         priv->cfg = cfg;
4007         priv->pci_dev = pdev;
4008         priv->inta_mask = CSR_INI_SET_MASK;
4009
4010         if (iwl_alloc_traffic_mem(priv))
4011                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4012
4013         /**************************
4014          * 2. Initializing PCI bus
4015          **************************/
4016         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4017                                 PCIE_LINK_STATE_CLKPM);
4018
4019         if (pci_enable_device(pdev)) {
4020                 err = -ENODEV;
4021                 goto out_ieee80211_free_hw;
4022         }
4023
4024         pci_set_master(pdev);
4025
4026         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4027         if (!err)
4028                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4029         if (err) {
4030                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4031                 if (!err)
4032                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4033                 /* both attempts failed: */
4034                 if (err) {
4035                         IWL_WARN(priv, "No suitable DMA available.\n");
4036                         goto out_pci_disable_device;
4037                 }
4038         }
4039
4040         err = pci_request_regions(pdev, DRV_NAME);
4041         if (err)
4042                 goto out_pci_disable_device;
4043
4044         pci_set_drvdata(pdev, priv);
4045
4046
4047         /***********************
4048          * 3. Read REV register
4049          ***********************/
4050         priv->hw_base = pci_iomap(pdev, 0, 0);
4051         if (!priv->hw_base) {
4052                 err = -ENODEV;
4053                 goto out_pci_release_regions;
4054         }
4055
4056         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4057                 (unsigned long long) pci_resource_len(pdev, 0));
4058         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4059
4060         /* these spin locks will be used in apm_ops.init and EEPROM access
4061          * we should init now
4062          */
4063         spin_lock_init(&priv->reg_lock);
4064         spin_lock_init(&priv->lock);
4065
4066         /*
4067          * stop and reset the on-board processor just in case it is in a
4068          * strange state ... like being left stranded by a primary kernel
4069          * and this is now the kdump kernel trying to start up
4070          */
4071         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4072
4073         iwl_hw_detect(priv);
4074         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4075                 priv->cfg->name, priv->hw_rev);
4076
4077         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4078          * PCI Tx retries from interfering with C3 CPU state */
4079         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4080
4081         iwl_prepare_card_hw(priv);
4082         if (!priv->hw_ready) {
4083                 IWL_WARN(priv, "Failed, HW not ready\n");
4084                 goto out_iounmap;
4085         }
4086
4087         /*****************
4088          * 4. Read EEPROM
4089          *****************/
4090         /* Read the EEPROM */
4091         err = iwl_eeprom_init(priv);
4092         if (err) {
4093                 IWL_ERR(priv, "Unable to init EEPROM\n");
4094                 goto out_iounmap;
4095         }
4096         err = iwl_eeprom_check_version(priv);
4097         if (err)
4098                 goto out_free_eeprom;
4099
4100         /* extract MAC Address */
4101         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4102         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4103         priv->hw->wiphy->addresses = priv->addresses;
4104         priv->hw->wiphy->n_addresses = 1;
4105         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4106         if (num_mac > 1) {
4107                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4108                        ETH_ALEN);
4109                 priv->addresses[1].addr[5]++;
4110                 priv->hw->wiphy->n_addresses++;
4111         }
4112
4113         /************************
4114          * 5. Setup HW constants
4115          ************************/
4116         if (iwl_set_hw_params(priv)) {
4117                 IWL_ERR(priv, "failed to set hw parameters\n");
4118                 goto out_free_eeprom;
4119         }
4120
4121         /*******************
4122          * 6. Setup priv
4123          *******************/
4124
4125         err = iwl_init_drv(priv);
4126         if (err)
4127                 goto out_free_eeprom;
4128         /* At this point both hw and priv are initialized. */
4129
4130         /********************
4131          * 7. Setup services
4132          ********************/
4133         spin_lock_irqsave(&priv->lock, flags);
4134         iwl_disable_interrupts(priv);
4135         spin_unlock_irqrestore(&priv->lock, flags);
4136
4137         pci_enable_msi(priv->pci_dev);
4138
4139         iwl_alloc_isr_ict(priv);
4140         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4141                           IRQF_SHARED, DRV_NAME, priv);
4142         if (err) {
4143                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4144                 goto out_disable_msi;
4145         }
4146
4147         iwl_setup_deferred_work(priv);
4148         iwl_setup_rx_handlers(priv);
4149
4150         /*********************************************
4151          * 8. Enable interrupts and read RFKILL state
4152          *********************************************/
4153
4154         /* enable interrupts if needed: hw bug w/a */
4155         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4156         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4157                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4158                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4159         }
4160
4161         iwl_enable_interrupts(priv);
4162
4163         /* If platform's RF_KILL switch is NOT set to KILL */
4164         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4165                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4166         else
4167                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4168
4169         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4170                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4171
4172         iwl_power_initialize(priv);
4173         iwl_tt_initialize(priv);
4174
4175         init_completion(&priv->_agn.firmware_loading_complete);
4176
4177         err = iwl_request_firmware(priv, true);
4178         if (err)
4179                 goto out_destroy_workqueue;
4180
4181         return 0;
4182
4183  out_destroy_workqueue:
4184         destroy_workqueue(priv->workqueue);
4185         priv->workqueue = NULL;
4186         free_irq(priv->pci_dev->irq, priv);
4187         iwl_free_isr_ict(priv);
4188  out_disable_msi:
4189         pci_disable_msi(priv->pci_dev);
4190         iwl_uninit_drv(priv);
4191  out_free_eeprom:
4192         iwl_eeprom_free(priv);
4193  out_iounmap:
4194         pci_iounmap(pdev, priv->hw_base);
4195  out_pci_release_regions:
4196         pci_set_drvdata(pdev, NULL);
4197         pci_release_regions(pdev);
4198  out_pci_disable_device:
4199         pci_disable_device(pdev);
4200  out_ieee80211_free_hw:
4201         iwl_free_traffic_mem(priv);
4202         ieee80211_free_hw(priv->hw);
4203  out:
4204         return err;
4205 }
4206
4207 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4208 {
4209         struct iwl_priv *priv = pci_get_drvdata(pdev);
4210         unsigned long flags;
4211
4212         if (!priv)
4213                 return;
4214
4215         wait_for_completion(&priv->_agn.firmware_loading_complete);
4216
4217         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4218
4219         iwl_dbgfs_unregister(priv);
4220         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4221
4222         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4223          * to be called and iwl_down since we are removing the device
4224          * we need to set STATUS_EXIT_PENDING bit.
4225          */
4226         set_bit(STATUS_EXIT_PENDING, &priv->status);
4227         if (priv->mac80211_registered) {
4228                 ieee80211_unregister_hw(priv->hw);
4229                 priv->mac80211_registered = 0;
4230         } else {
4231                 iwl_down(priv);
4232         }
4233
4234         /*
4235          * Make sure device is reset to low power before unloading driver.
4236          * This may be redundant with iwl_down(), but there are paths to
4237          * run iwl_down() without calling apm_ops.stop(), and there are
4238          * paths to avoid running iwl_down() at all before leaving driver.
4239          * This (inexpensive) call *makes sure* device is reset.
4240          */
4241         priv->cfg->ops->lib->apm_ops.stop(priv);
4242
4243         iwl_tt_exit(priv);
4244
4245         /* make sure we flush any pending irq or
4246          * tasklet for the driver
4247          */
4248         spin_lock_irqsave(&priv->lock, flags);
4249         iwl_disable_interrupts(priv);
4250         spin_unlock_irqrestore(&priv->lock, flags);
4251
4252         iwl_synchronize_irq(priv);
4253
4254         iwl_dealloc_ucode_pci(priv);
4255
4256         if (priv->rxq.bd)
4257                 iwlagn_rx_queue_free(priv, &priv->rxq);
4258         iwlagn_hw_txq_ctx_free(priv);
4259
4260         iwl_eeprom_free(priv);
4261
4262
4263         /*netif_stop_queue(dev); */
4264         flush_workqueue(priv->workqueue);
4265
4266         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4267          * priv->workqueue... so we can't take down the workqueue
4268          * until now... */
4269         destroy_workqueue(priv->workqueue);
4270         priv->workqueue = NULL;
4271         iwl_free_traffic_mem(priv);
4272
4273         free_irq(priv->pci_dev->irq, priv);
4274         pci_disable_msi(priv->pci_dev);
4275         pci_iounmap(pdev, priv->hw_base);
4276         pci_release_regions(pdev);
4277         pci_disable_device(pdev);
4278         pci_set_drvdata(pdev, NULL);
4279
4280         iwl_uninit_drv(priv);
4281
4282         iwl_free_isr_ict(priv);
4283
4284         if (priv->ibss_beacon)
4285                 dev_kfree_skb(priv->ibss_beacon);
4286
4287         ieee80211_free_hw(priv->hw);
4288 }
4289
4290
4291 /*****************************************************************************
4292  *
4293  * driver and module entry point
4294  *
4295  *****************************************************************************/
4296
4297 /* Hardware specific file defines the PCI IDs table for that hardware module */
4298 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4299 #ifdef CONFIG_IWL4965
4300         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4301         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4302 #endif /* CONFIG_IWL4965 */
4303 #ifdef CONFIG_IWL5000
4304 /* 5100 Series WiFi */
4305         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4306         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4307         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4308         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4309         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4310         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4311         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4312         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4313         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4314         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4315         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4316         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4317         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4318         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4319         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4320         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4321         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4322         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4323         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4324         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4325         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4326         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4327         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4328         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4329
4330 /* 5300 Series WiFi */
4331         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4332         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4333         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4334         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4335         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4336         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4337         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4338         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4339         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4340         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4341         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4342         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4343
4344 /* 5350 Series WiFi/WiMax */
4345         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4346         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4347         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4348
4349 /* 5150 Series Wifi/WiMax */
4350         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4351         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4352         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4353         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4354         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4355         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4356
4357         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4358         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4359         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4360         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4361
4362 /* 6x00 Series */
4363         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4364         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4365         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4366         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4367         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4368         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4369         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4370         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4371         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4372         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4373
4374 /* 6x00 Series Gen2a */
4375         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4376         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4377         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4378         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4379         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4380         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4381         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4382         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4383         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4384         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4385         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4386         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4387         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4388         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4389
4390 /* 6x00 Series Gen2b */
4391         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4392         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4393         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4394         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4395         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4396         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4397         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4398         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4399         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4400         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4401         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4402         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4403         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4404         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4405         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4406         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4407         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4408         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4409         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4410         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4411         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4412         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4413         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4414         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4415         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4416         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4417         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4418         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4419
4420 /* 6x50 WiFi/WiMax Series */
4421         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4422         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4423         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4424         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4425         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4426         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4427
4428 /* 6x50 WiFi/WiMax Series Gen2 */
4429         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4430         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4431         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4432         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4433         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4434         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4435
4436 /* 1000 Series WiFi */
4437         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4438         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4439         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4440         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4441         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4442         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4443         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4444         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4445         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4446         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4447         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4448         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4449 #endif /* CONFIG_IWL5000 */
4450
4451         {0}
4452 };
4453 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4454
4455 static struct pci_driver iwl_driver = {
4456         .name = DRV_NAME,
4457         .id_table = iwl_hw_card_ids,
4458         .probe = iwl_pci_probe,
4459         .remove = __devexit_p(iwl_pci_remove),
4460 #ifdef CONFIG_PM
4461         .suspend = iwl_pci_suspend,
4462         .resume = iwl_pci_resume,
4463 #endif
4464 };
4465
4466 static int __init iwl_init(void)
4467 {
4468
4469         int ret;
4470         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4471         pr_info(DRV_COPYRIGHT "\n");
4472
4473         ret = iwlagn_rate_control_register();
4474         if (ret) {
4475                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4476                 return ret;
4477         }
4478
4479         ret = pci_register_driver(&iwl_driver);
4480         if (ret) {
4481                 pr_err("Unable to initialize PCI module\n");
4482                 goto error_register;
4483         }
4484
4485         return ret;
4486
4487 error_register:
4488         iwlagn_rate_control_unregister();
4489         return ret;
4490 }
4491
4492 static void __exit iwl_exit(void)
4493 {
4494         pci_unregister_driver(&iwl_driver);
4495         iwlagn_rate_control_unregister();
4496 }
4497
4498 module_exit(iwl_exit);
4499 module_init(iwl_init);
4500
4501 #ifdef CONFIG_IWLWIFI_DEBUG
4502 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4503 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4504 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4505 MODULE_PARM_DESC(debug, "debug output mask");
4506 #endif
4507
4508 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4509 MODULE_PARM_DESC(swcrypto50,
4510                  "using crypto in software (default 0 [hardware]) (deprecated)");
4511 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4512 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4513 module_param_named(queues_num50,
4514                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4515 MODULE_PARM_DESC(queues_num50,
4516                  "number of hw queues in 50xx series (deprecated)");
4517 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4518 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4519 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4520 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4521 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4522 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4523 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4524                    int, S_IRUGO);
4525 MODULE_PARM_DESC(amsdu_size_8K50,
4526                  "enable 8K amsdu size in 50XX series (deprecated)");
4527 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4528                    int, S_IRUGO);
4529 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4530 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4531 MODULE_PARM_DESC(fw_restart50,
4532                  "restart firmware in case of error (deprecated)");
4533 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4534 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4535 module_param_named(
4536         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4537 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4538
4539 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4540                    S_IRUGO);
4541 MODULE_PARM_DESC(ucode_alternative,
4542                  "specify ucode alternative to use from ucode file");