iwlagn: clean up TXQ indirection
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/mac80211.h>
49
50 #include <asm/div64.h>
51
52 #define DRV_NAME        "iwlagn"
53
54 #include "iwl-eeprom.h"
55 #include "iwl-dev.h"
56 #include "iwl-core.h"
57 #include "iwl-io.h"
58 #include "iwl-helpers.h"
59 #include "iwl-sta.h"
60 #include "iwl-agn-calib.h"
61 #include "iwl-agn.h"
62
63
64 /******************************************************************************
65  *
66  * module boiler plate
67  *
68  ******************************************************************************/
69
70 /*
71  * module name, copyright, version, etc.
72  */
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
74
75 #ifdef CONFIG_IWLWIFI_DEBUG
76 #define VD "d"
77 #else
78 #define VD
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89 static int iwlagn_ant_coupling;
90 static bool iwlagn_bt_ch_announce = 1;
91
92 void iwl_update_chain_flags(struct iwl_priv *priv)
93 {
94         struct iwl_rxon_context *ctx;
95
96         if (priv->cfg->ops->hcmd->set_rxon_chain) {
97                 for_each_context(priv, ctx) {
98                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
99                         if (ctx->active.rx_chain != ctx->staging.rx_chain)
100                                 iwlcore_commit_rxon(priv, ctx);
101                 }
102         }
103 }
104
105 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
106 static void iwl_set_beacon_tim(struct iwl_priv *priv,
107                                struct iwl_tx_beacon_cmd *tx_beacon_cmd,
108                                u8 *beacon, u32 frame_size)
109 {
110         u16 tim_idx;
111         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
112
113         /*
114          * The index is relative to frame start but we start looking at the
115          * variable-length part of the beacon.
116          */
117         tim_idx = mgmt->u.beacon.variable - beacon;
118
119         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
120         while ((tim_idx < (frame_size - 2)) &&
121                         (beacon[tim_idx] != WLAN_EID_TIM))
122                 tim_idx += beacon[tim_idx+1] + 2;
123
124         /* If TIM field was found, set variables */
125         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
126                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
127                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
128         } else
129                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
130 }
131
132 int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
133 {
134         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
135         struct iwl_host_cmd cmd = {
136                 .id = REPLY_TX_BEACON,
137                 .flags = CMD_SIZE_HUGE,
138         };
139         u32 frame_size;
140         u32 rate_flags;
141         u32 rate;
142         int err;
143
144         /*
145          * We have to set up the TX command, the TX Beacon command, and the
146          * beacon contents.
147          */
148
149         lockdep_assert_held(&priv->mutex);
150
151         if (!priv->beacon_ctx) {
152                 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
153                 return 0;
154         }
155
156         if (WARN_ON(!priv->beacon_skb))
157                 return -EINVAL;
158
159         /* Allocate beacon memory */
160         tx_beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd) + priv->beacon_skb->len,
161                                 GFP_KERNEL);
162         if (!tx_beacon_cmd)
163                 return -ENOMEM;
164
165         frame_size = priv->beacon_skb->len;
166
167         /* Set up TX beacon contents */
168         memcpy(tx_beacon_cmd->frame, priv->beacon_skb->data, frame_size);
169
170         /* Set up TX command fields */
171         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
172         tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
173         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
174         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
175                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
176
177         /* Set up TX beacon command fields */
178         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
179                            frame_size);
180
181         /* Set up packet rate and flags */
182         rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
183         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
184                                               priv->hw_params.valid_tx_ant);
185         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
186         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
187                 rate_flags |= RATE_MCS_CCK_MSK;
188         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
189                         rate_flags);
190
191         /* Submit command */
192         cmd.len[0] = sizeof(*tx_beacon_cmd) + frame_size;
193         cmd.data[0] = tx_beacon_cmd;
194
195         err = iwl_send_cmd_sync(priv, &cmd);
196
197         /* Free temporary storage */
198         kfree(tx_beacon_cmd);
199
200         return err;
201 }
202
203 static void iwl_bg_beacon_update(struct work_struct *work)
204 {
205         struct iwl_priv *priv =
206                 container_of(work, struct iwl_priv, beacon_update);
207         struct sk_buff *beacon;
208
209         mutex_lock(&priv->mutex);
210         if (!priv->beacon_ctx) {
211                 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
212                 goto out;
213         }
214
215         if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
216                 /*
217                  * The ucode will send beacon notifications even in
218                  * IBSS mode, but we don't want to process them. But
219                  * we need to defer the type check to here due to
220                  * requiring locking around the beacon_ctx access.
221                  */
222                 goto out;
223         }
224
225         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
226         beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
227         if (!beacon) {
228                 IWL_ERR(priv, "update beacon failed -- keeping old\n");
229                 goto out;
230         }
231
232         /* new beacon skb is allocated every time; dispose previous.*/
233         dev_kfree_skb(priv->beacon_skb);
234
235         priv->beacon_skb = beacon;
236
237         iwlagn_send_beacon_cmd(priv);
238  out:
239         mutex_unlock(&priv->mutex);
240 }
241
242 static void iwl_bg_bt_runtime_config(struct work_struct *work)
243 {
244         struct iwl_priv *priv =
245                 container_of(work, struct iwl_priv, bt_runtime_config);
246
247         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
248                 return;
249
250         /* dont send host command if rf-kill is on */
251         if (!iwl_is_ready_rf(priv))
252                 return;
253         priv->cfg->ops->hcmd->send_bt_config(priv);
254 }
255
256 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
257 {
258         struct iwl_priv *priv =
259                 container_of(work, struct iwl_priv, bt_full_concurrency);
260         struct iwl_rxon_context *ctx;
261
262         mutex_lock(&priv->mutex);
263
264         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
265                 goto out;
266
267         /* dont send host command if rf-kill is on */
268         if (!iwl_is_ready_rf(priv))
269                 goto out;
270
271         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
272                        priv->bt_full_concurrent ?
273                        "full concurrency" : "3-wire");
274
275         /*
276          * LQ & RXON updated cmds must be sent before BT Config cmd
277          * to avoid 3-wire collisions
278          */
279         for_each_context(priv, ctx) {
280                 if (priv->cfg->ops->hcmd->set_rxon_chain)
281                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
282                 iwlcore_commit_rxon(priv, ctx);
283         }
284
285         priv->cfg->ops->hcmd->send_bt_config(priv);
286 out:
287         mutex_unlock(&priv->mutex);
288 }
289
290 /**
291  * iwl_bg_statistics_periodic - Timer callback to queue statistics
292  *
293  * This callback is provided in order to send a statistics request.
294  *
295  * This timer function is continually reset to execute within
296  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
297  * was received.  We need to ensure we receive the statistics in order
298  * to update the temperature used for calibrating the TXPOWER.
299  */
300 static void iwl_bg_statistics_periodic(unsigned long data)
301 {
302         struct iwl_priv *priv = (struct iwl_priv *)data;
303
304         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
305                 return;
306
307         /* dont send host command if rf-kill is on */
308         if (!iwl_is_ready_rf(priv))
309                 return;
310
311         iwl_send_statistics_request(priv, CMD_ASYNC, false);
312 }
313
314
315 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
316                                         u32 start_idx, u32 num_events,
317                                         u32 mode)
318 {
319         u32 i;
320         u32 ptr;        /* SRAM byte address of log data */
321         u32 ev, time, data; /* event log data */
322         unsigned long reg_flags;
323
324         if (mode == 0)
325                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
326         else
327                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
328
329         /* Make sure device is powered up for SRAM reads */
330         spin_lock_irqsave(&priv->reg_lock, reg_flags);
331         if (iwl_grab_nic_access(priv)) {
332                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
333                 return;
334         }
335
336         /* Set starting address; reads will auto-increment */
337         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
338         rmb();
339
340         /*
341          * "time" is actually "data" for mode 0 (no timestamp).
342          * place event id # at far right for easier visual parsing.
343          */
344         for (i = 0; i < num_events; i++) {
345                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
346                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
347                 if (mode == 0) {
348                         trace_iwlwifi_dev_ucode_cont_event(priv,
349                                                         0, time, ev);
350                 } else {
351                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
352                         trace_iwlwifi_dev_ucode_cont_event(priv,
353                                                 time, data, ev);
354                 }
355         }
356         /* Allow device to power down */
357         iwl_release_nic_access(priv);
358         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
359 }
360
361 static void iwl_continuous_event_trace(struct iwl_priv *priv)
362 {
363         u32 capacity;   /* event log capacity in # entries */
364         u32 base;       /* SRAM byte address of event log header */
365         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
366         u32 num_wraps;  /* # times uCode wrapped to top of log */
367         u32 next_entry; /* index of next entry to be written by uCode */
368
369         base = priv->device_pointers.error_event_table;
370         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
371                 capacity = iwl_read_targ_mem(priv, base);
372                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
373                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
374                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
375         } else
376                 return;
377
378         if (num_wraps == priv->event_log.num_wraps) {
379                 iwl_print_cont_event_trace(priv,
380                                        base, priv->event_log.next_entry,
381                                        next_entry - priv->event_log.next_entry,
382                                        mode);
383                 priv->event_log.non_wraps_count++;
384         } else {
385                 if ((num_wraps - priv->event_log.num_wraps) > 1)
386                         priv->event_log.wraps_more_count++;
387                 else
388                         priv->event_log.wraps_once_count++;
389                 trace_iwlwifi_dev_ucode_wrap_event(priv,
390                                 num_wraps - priv->event_log.num_wraps,
391                                 next_entry, priv->event_log.next_entry);
392                 if (next_entry < priv->event_log.next_entry) {
393                         iwl_print_cont_event_trace(priv, base,
394                                priv->event_log.next_entry,
395                                capacity - priv->event_log.next_entry,
396                                mode);
397
398                         iwl_print_cont_event_trace(priv, base, 0,
399                                 next_entry, mode);
400                 } else {
401                         iwl_print_cont_event_trace(priv, base,
402                                next_entry, capacity - next_entry,
403                                mode);
404
405                         iwl_print_cont_event_trace(priv, base, 0,
406                                 next_entry, mode);
407                 }
408         }
409         priv->event_log.num_wraps = num_wraps;
410         priv->event_log.next_entry = next_entry;
411 }
412
413 /**
414  * iwl_bg_ucode_trace - Timer callback to log ucode event
415  *
416  * The timer is continually set to execute every
417  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
418  * this function is to perform continuous uCode event logging operation
419  * if enabled
420  */
421 static void iwl_bg_ucode_trace(unsigned long data)
422 {
423         struct iwl_priv *priv = (struct iwl_priv *)data;
424
425         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
426                 return;
427
428         if (priv->event_log.ucode_trace) {
429                 iwl_continuous_event_trace(priv);
430                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
431                 mod_timer(&priv->ucode_trace,
432                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
433         }
434 }
435
436 static void iwl_bg_tx_flush(struct work_struct *work)
437 {
438         struct iwl_priv *priv =
439                 container_of(work, struct iwl_priv, tx_flush);
440
441         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
442                 return;
443
444         /* do nothing if rf-kill is on */
445         if (!iwl_is_ready_rf(priv))
446                 return;
447
448         if (priv->cfg->ops->lib->txfifo_flush) {
449                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
450                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
451         }
452 }
453
454 /**
455  * iwl_rx_handle - Main entry function for receiving responses from uCode
456  *
457  * Uses the priv->rx_handlers callback function array to invoke
458  * the appropriate handlers, including command responses,
459  * frame-received notifications, and other notifications.
460  */
461 static void iwl_rx_handle(struct iwl_priv *priv)
462 {
463         struct iwl_rx_mem_buffer *rxb;
464         struct iwl_rx_packet *pkt;
465         struct iwl_rx_queue *rxq = &priv->rxq;
466         u32 r, i;
467         int reclaim;
468         unsigned long flags;
469         u8 fill_rx = 0;
470         u32 count = 8;
471         int total_empty;
472
473         /* uCode's read index (stored in shared DRAM) indicates the last Rx
474          * buffer that the driver may process (last buffer filled by ucode). */
475         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
476         i = rxq->read;
477
478         /* Rx interrupt, but nothing sent from uCode */
479         if (i == r)
480                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
481
482         /* calculate total frames need to be restock after handling RX */
483         total_empty = r - rxq->write_actual;
484         if (total_empty < 0)
485                 total_empty += RX_QUEUE_SIZE;
486
487         if (total_empty > (RX_QUEUE_SIZE / 2))
488                 fill_rx = 1;
489
490         while (i != r) {
491                 int len;
492
493                 rxb = rxq->queue[i];
494
495                 /* If an RXB doesn't have a Rx queue slot associated with it,
496                  * then a bug has been introduced in the queue refilling
497                  * routines -- catch it here */
498                 if (WARN_ON(rxb == NULL)) {
499                         i = (i + 1) & RX_QUEUE_MASK;
500                         continue;
501                 }
502
503                 rxq->queue[i] = NULL;
504
505                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
506                                PAGE_SIZE << priv->hw_params.rx_page_order,
507                                PCI_DMA_FROMDEVICE);
508                 pkt = rxb_addr(rxb);
509
510                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
511                 len += sizeof(u32); /* account for status word */
512                 trace_iwlwifi_dev_rx(priv, pkt, len);
513
514                 /* Reclaim a command buffer only if this packet is a response
515                  *   to a (driver-originated) command.
516                  * If the packet (e.g. Rx frame) originated from uCode,
517                  *   there is no command buffer to reclaim.
518                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
519                  *   but apparently a few don't get set; catch them here. */
520                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
521                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
522                         (pkt->hdr.cmd != REPLY_RX) &&
523                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
524                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
525                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
526                         (pkt->hdr.cmd != REPLY_TX);
527
528                 /*
529                  * Do the notification wait before RX handlers so
530                  * even if the RX handler consumes the RXB we have
531                  * access to it in the notification wait entry.
532                  */
533                 if (!list_empty(&priv->_agn.notif_waits)) {
534                         struct iwl_notification_wait *w;
535
536                         spin_lock(&priv->_agn.notif_wait_lock);
537                         list_for_each_entry(w, &priv->_agn.notif_waits, list) {
538                                 if (w->cmd == pkt->hdr.cmd) {
539                                         w->triggered = true;
540                                         if (w->fn)
541                                                 w->fn(priv, pkt, w->fn_data);
542                                 }
543                         }
544                         spin_unlock(&priv->_agn.notif_wait_lock);
545
546                         wake_up_all(&priv->_agn.notif_waitq);
547                 }
548                 if (priv->pre_rx_handler)
549                         priv->pre_rx_handler(priv, rxb);
550
551                 /* Based on type of command response or notification,
552                  *   handle those that need handling via function in
553                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
554                 if (priv->rx_handlers[pkt->hdr.cmd]) {
555                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
556                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
557                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
558                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
559                 } else {
560                         /* No handling needed */
561                         IWL_DEBUG_RX(priv,
562                                 "r %d i %d No handler needed for %s, 0x%02x\n",
563                                 r, i, get_cmd_string(pkt->hdr.cmd),
564                                 pkt->hdr.cmd);
565                 }
566
567                 /*
568                  * XXX: After here, we should always check rxb->page
569                  * against NULL before touching it or its virtual
570                  * memory (pkt). Because some rx_handler might have
571                  * already taken or freed the pages.
572                  */
573
574                 if (reclaim) {
575                         /* Invoke any callbacks, transfer the buffer to caller,
576                          * and fire off the (possibly) blocking iwl_send_cmd()
577                          * as we reclaim the driver command queue */
578                         if (rxb->page)
579                                 iwl_tx_cmd_complete(priv, rxb);
580                         else
581                                 IWL_WARN(priv, "Claim null rxb?\n");
582                 }
583
584                 /* Reuse the page if possible. For notification packets and
585                  * SKBs that fail to Rx correctly, add them back into the
586                  * rx_free list for reuse later. */
587                 spin_lock_irqsave(&rxq->lock, flags);
588                 if (rxb->page != NULL) {
589                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
590                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
591                                 PCI_DMA_FROMDEVICE);
592                         list_add_tail(&rxb->list, &rxq->rx_free);
593                         rxq->free_count++;
594                 } else
595                         list_add_tail(&rxb->list, &rxq->rx_used);
596
597                 spin_unlock_irqrestore(&rxq->lock, flags);
598
599                 i = (i + 1) & RX_QUEUE_MASK;
600                 /* If there are a lot of unused frames,
601                  * restock the Rx queue so ucode wont assert. */
602                 if (fill_rx) {
603                         count++;
604                         if (count >= 8) {
605                                 rxq->read = i;
606                                 iwlagn_rx_replenish_now(priv);
607                                 count = 0;
608                         }
609                 }
610         }
611
612         /* Backtrack one entry */
613         rxq->read = i;
614         if (fill_rx)
615                 iwlagn_rx_replenish_now(priv);
616         else
617                 iwlagn_rx_queue_restock(priv);
618 }
619
620 /* tasklet for iwlagn interrupt */
621 static void iwl_irq_tasklet(struct iwl_priv *priv)
622 {
623         u32 inta = 0;
624         u32 handled = 0;
625         unsigned long flags;
626         u32 i;
627 #ifdef CONFIG_IWLWIFI_DEBUG
628         u32 inta_mask;
629 #endif
630
631         spin_lock_irqsave(&priv->lock, flags);
632
633         /* Ack/clear/reset pending uCode interrupts.
634          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
635          */
636         /* There is a hardware bug in the interrupt mask function that some
637          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
638          * they are disabled in the CSR_INT_MASK register. Furthermore the
639          * ICT interrupt handling mechanism has another bug that might cause
640          * these unmasked interrupts fail to be detected. We workaround the
641          * hardware bugs here by ACKing all the possible interrupts so that
642          * interrupt coalescing can still be achieved.
643          */
644         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
645
646         inta = priv->_agn.inta;
647
648 #ifdef CONFIG_IWLWIFI_DEBUG
649         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
650                 /* just for debug */
651                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
652                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
653                                 inta, inta_mask);
654         }
655 #endif
656
657         spin_unlock_irqrestore(&priv->lock, flags);
658
659         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
660         priv->_agn.inta = 0;
661
662         /* Now service all interrupt bits discovered above. */
663         if (inta & CSR_INT_BIT_HW_ERR) {
664                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
665
666                 /* Tell the device to stop sending interrupts */
667                 iwl_disable_interrupts(priv);
668
669                 priv->isr_stats.hw++;
670                 iwl_irq_handle_error(priv);
671
672                 handled |= CSR_INT_BIT_HW_ERR;
673
674                 return;
675         }
676
677 #ifdef CONFIG_IWLWIFI_DEBUG
678         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
679                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
680                 if (inta & CSR_INT_BIT_SCD) {
681                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
682                                       "the frame/frames.\n");
683                         priv->isr_stats.sch++;
684                 }
685
686                 /* Alive notification via Rx interrupt will do the real work */
687                 if (inta & CSR_INT_BIT_ALIVE) {
688                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
689                         priv->isr_stats.alive++;
690                 }
691         }
692 #endif
693         /* Safely ignore these bits for debug checks below */
694         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
695
696         /* HW RF KILL switch toggled */
697         if (inta & CSR_INT_BIT_RF_KILL) {
698                 int hw_rf_kill = 0;
699                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
700                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
701                         hw_rf_kill = 1;
702
703                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
704                                 hw_rf_kill ? "disable radio" : "enable radio");
705
706                 priv->isr_stats.rfkill++;
707
708                 /* driver only loads ucode once setting the interface up.
709                  * the driver allows loading the ucode even if the radio
710                  * is killed. Hence update the killswitch state here. The
711                  * rfkill handler will care about restarting if needed.
712                  */
713                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
714                         if (hw_rf_kill)
715                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
716                         else
717                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
718                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
719                 }
720
721                 handled |= CSR_INT_BIT_RF_KILL;
722         }
723
724         /* Chip got too hot and stopped itself */
725         if (inta & CSR_INT_BIT_CT_KILL) {
726                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
727                 priv->isr_stats.ctkill++;
728                 handled |= CSR_INT_BIT_CT_KILL;
729         }
730
731         /* Error detected by uCode */
732         if (inta & CSR_INT_BIT_SW_ERR) {
733                 IWL_ERR(priv, "Microcode SW error detected. "
734                         " Restarting 0x%X.\n", inta);
735                 priv->isr_stats.sw++;
736                 iwl_irq_handle_error(priv);
737                 handled |= CSR_INT_BIT_SW_ERR;
738         }
739
740         /* uCode wakes up after power-down sleep */
741         if (inta & CSR_INT_BIT_WAKEUP) {
742                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
743                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
744                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
745                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
746
747                 priv->isr_stats.wakeup++;
748
749                 handled |= CSR_INT_BIT_WAKEUP;
750         }
751
752         /* All uCode command responses, including Tx command responses,
753          * Rx "responses" (frame-received notification), and other
754          * notifications from uCode come through here*/
755         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
756                         CSR_INT_BIT_RX_PERIODIC)) {
757                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
758                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
759                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
760                         iwl_write32(priv, CSR_FH_INT_STATUS,
761                                         CSR_FH_INT_RX_MASK);
762                 }
763                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
764                         handled |= CSR_INT_BIT_RX_PERIODIC;
765                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
766                 }
767                 /* Sending RX interrupt require many steps to be done in the
768                  * the device:
769                  * 1- write interrupt to current index in ICT table.
770                  * 2- dma RX frame.
771                  * 3- update RX shared data to indicate last write index.
772                  * 4- send interrupt.
773                  * This could lead to RX race, driver could receive RX interrupt
774                  * but the shared data changes does not reflect this;
775                  * periodic interrupt will detect any dangling Rx activity.
776                  */
777
778                 /* Disable periodic interrupt; we use it as just a one-shot. */
779                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
780                             CSR_INT_PERIODIC_DIS);
781                 iwl_rx_handle(priv);
782
783                 /*
784                  * Enable periodic interrupt in 8 msec only if we received
785                  * real RX interrupt (instead of just periodic int), to catch
786                  * any dangling Rx interrupt.  If it was just the periodic
787                  * interrupt, there was no dangling Rx activity, and no need
788                  * to extend the periodic interrupt; one-shot is enough.
789                  */
790                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
791                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
792                                     CSR_INT_PERIODIC_ENA);
793
794                 priv->isr_stats.rx++;
795         }
796
797         /* This "Tx" DMA channel is used only for loading uCode */
798         if (inta & CSR_INT_BIT_FH_TX) {
799                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
800                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
801                 priv->isr_stats.tx++;
802                 handled |= CSR_INT_BIT_FH_TX;
803                 /* Wake up uCode load routine, now that load is complete */
804                 priv->ucode_write_complete = 1;
805                 wake_up_interruptible(&priv->wait_command_queue);
806         }
807
808         if (inta & ~handled) {
809                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
810                 priv->isr_stats.unhandled++;
811         }
812
813         if (inta & ~(priv->inta_mask)) {
814                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
815                          inta & ~priv->inta_mask);
816         }
817
818         /* Re-enable all interrupts */
819         /* only Re-enable if disabled by irq */
820         if (test_bit(STATUS_INT_ENABLED, &priv->status))
821                 iwl_enable_interrupts(priv);
822         /* Re-enable RF_KILL if it occurred */
823         else if (handled & CSR_INT_BIT_RF_KILL)
824                 iwl_enable_rfkill_int(priv);
825 }
826
827 /*****************************************************************************
828  *
829  * sysfs attributes
830  *
831  *****************************************************************************/
832
833 #ifdef CONFIG_IWLWIFI_DEBUG
834
835 /*
836  * The following adds a new attribute to the sysfs representation
837  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
838  * used for controlling the debug level.
839  *
840  * See the level definitions in iwl for details.
841  *
842  * The debug_level being managed using sysfs below is a per device debug
843  * level that is used instead of the global debug level if it (the per
844  * device debug level) is set.
845  */
846 static ssize_t show_debug_level(struct device *d,
847                                 struct device_attribute *attr, char *buf)
848 {
849         struct iwl_priv *priv = dev_get_drvdata(d);
850         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
851 }
852 static ssize_t store_debug_level(struct device *d,
853                                 struct device_attribute *attr,
854                                  const char *buf, size_t count)
855 {
856         struct iwl_priv *priv = dev_get_drvdata(d);
857         unsigned long val;
858         int ret;
859
860         ret = strict_strtoul(buf, 0, &val);
861         if (ret)
862                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
863         else {
864                 priv->debug_level = val;
865                 if (iwl_alloc_traffic_mem(priv))
866                         IWL_ERR(priv,
867                                 "Not enough memory to generate traffic log\n");
868         }
869         return strnlen(buf, count);
870 }
871
872 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
873                         show_debug_level, store_debug_level);
874
875
876 #endif /* CONFIG_IWLWIFI_DEBUG */
877
878
879 static ssize_t show_temperature(struct device *d,
880                                 struct device_attribute *attr, char *buf)
881 {
882         struct iwl_priv *priv = dev_get_drvdata(d);
883
884         if (!iwl_is_alive(priv))
885                 return -EAGAIN;
886
887         return sprintf(buf, "%d\n", priv->temperature);
888 }
889
890 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
891
892 static ssize_t show_tx_power(struct device *d,
893                              struct device_attribute *attr, char *buf)
894 {
895         struct iwl_priv *priv = dev_get_drvdata(d);
896
897         if (!iwl_is_ready_rf(priv))
898                 return sprintf(buf, "off\n");
899         else
900                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
901 }
902
903 static ssize_t store_tx_power(struct device *d,
904                               struct device_attribute *attr,
905                               const char *buf, size_t count)
906 {
907         struct iwl_priv *priv = dev_get_drvdata(d);
908         unsigned long val;
909         int ret;
910
911         ret = strict_strtoul(buf, 10, &val);
912         if (ret)
913                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
914         else {
915                 ret = iwl_set_tx_power(priv, val, false);
916                 if (ret)
917                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
918                                 ret);
919                 else
920                         ret = count;
921         }
922         return ret;
923 }
924
925 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
926
927 static struct attribute *iwl_sysfs_entries[] = {
928         &dev_attr_temperature.attr,
929         &dev_attr_tx_power.attr,
930 #ifdef CONFIG_IWLWIFI_DEBUG
931         &dev_attr_debug_level.attr,
932 #endif
933         NULL
934 };
935
936 static struct attribute_group iwl_attribute_group = {
937         .name = NULL,           /* put in device directory */
938         .attrs = iwl_sysfs_entries,
939 };
940
941 /******************************************************************************
942  *
943  * uCode download functions
944  *
945  ******************************************************************************/
946
947 static void iwl_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
948 {
949         if (desc->v_addr)
950                 dma_free_coherent(&pci_dev->dev, desc->len,
951                                   desc->v_addr, desc->p_addr);
952         desc->v_addr = NULL;
953         desc->len = 0;
954 }
955
956 static void iwl_free_fw_img(struct pci_dev *pci_dev, struct fw_img *img)
957 {
958         iwl_free_fw_desc(pci_dev, &img->code);
959         iwl_free_fw_desc(pci_dev, &img->data);
960 }
961
962 static int iwl_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc,
963                              const void *data, size_t len)
964 {
965         if (!len) {
966                 desc->v_addr = NULL;
967                 return -EINVAL;
968         }
969
970         desc->v_addr = dma_alloc_coherent(&pci_dev->dev, len,
971                                           &desc->p_addr, GFP_KERNEL);
972         if (!desc->v_addr)
973                 return -ENOMEM;
974         desc->len = len;
975         memcpy(desc->v_addr, data, len);
976         return 0;
977 }
978
979 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
980 {
981         iwl_free_fw_img(priv->pci_dev, &priv->ucode_rt);
982         iwl_free_fw_img(priv->pci_dev, &priv->ucode_init);
983 }
984
985 struct iwlagn_ucode_capabilities {
986         u32 max_probe_length;
987         u32 standard_phy_calibration_size;
988         u32 flags;
989 };
990
991 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
992 static int iwl_mac_setup_register(struct iwl_priv *priv,
993                                   struct iwlagn_ucode_capabilities *capa);
994
995 #define UCODE_EXPERIMENTAL_INDEX        100
996 #define UCODE_EXPERIMENTAL_TAG          "exp"
997
998 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
999 {
1000         const char *name_pre = priv->cfg->fw_name_pre;
1001         char tag[8];
1002
1003         if (first) {
1004 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1005                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1006                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1007         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1008 #endif
1009                 priv->fw_index = priv->cfg->ucode_api_max;
1010                 sprintf(tag, "%d", priv->fw_index);
1011         } else {
1012                 priv->fw_index--;
1013                 sprintf(tag, "%d", priv->fw_index);
1014         }
1015
1016         if (priv->fw_index < priv->cfg->ucode_api_min) {
1017                 IWL_ERR(priv, "no suitable firmware found!\n");
1018                 return -ENOENT;
1019         }
1020
1021         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1022
1023         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1024                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1025                                 ? "EXPERIMENTAL " : "",
1026                        priv->firmware_name);
1027
1028         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1029                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1030                                        iwl_ucode_callback);
1031 }
1032
1033 struct iwlagn_firmware_pieces {
1034         const void *inst, *data, *init, *init_data;
1035         size_t inst_size, data_size, init_size, init_data_size;
1036
1037         u32 build;
1038
1039         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1040         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1041 };
1042
1043 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1044                                        const struct firmware *ucode_raw,
1045                                        struct iwlagn_firmware_pieces *pieces)
1046 {
1047         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1048         u32 api_ver, hdr_size;
1049         const u8 *src;
1050
1051         priv->ucode_ver = le32_to_cpu(ucode->ver);
1052         api_ver = IWL_UCODE_API(priv->ucode_ver);
1053
1054         switch (api_ver) {
1055         default:
1056                 hdr_size = 28;
1057                 if (ucode_raw->size < hdr_size) {
1058                         IWL_ERR(priv, "File size too small!\n");
1059                         return -EINVAL;
1060                 }
1061                 pieces->build = le32_to_cpu(ucode->u.v2.build);
1062                 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1063                 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1064                 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1065                 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1066                 src = ucode->u.v2.data;
1067                 break;
1068         case 0:
1069         case 1:
1070         case 2:
1071                 hdr_size = 24;
1072                 if (ucode_raw->size < hdr_size) {
1073                         IWL_ERR(priv, "File size too small!\n");
1074                         return -EINVAL;
1075                 }
1076                 pieces->build = 0;
1077                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1078                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1079                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1080                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1081                 src = ucode->u.v1.data;
1082                 break;
1083         }
1084
1085         /* Verify size of file vs. image size info in file's header */
1086         if (ucode_raw->size != hdr_size + pieces->inst_size +
1087                                 pieces->data_size + pieces->init_size +
1088                                 pieces->init_data_size) {
1089
1090                 IWL_ERR(priv,
1091                         "uCode file size %d does not match expected size\n",
1092                         (int)ucode_raw->size);
1093                 return -EINVAL;
1094         }
1095
1096         pieces->inst = src;
1097         src += pieces->inst_size;
1098         pieces->data = src;
1099         src += pieces->data_size;
1100         pieces->init = src;
1101         src += pieces->init_size;
1102         pieces->init_data = src;
1103         src += pieces->init_data_size;
1104
1105         return 0;
1106 }
1107
1108 static int iwlagn_wanted_ucode_alternative = 1;
1109
1110 static int iwlagn_load_firmware(struct iwl_priv *priv,
1111                                 const struct firmware *ucode_raw,
1112                                 struct iwlagn_firmware_pieces *pieces,
1113                                 struct iwlagn_ucode_capabilities *capa)
1114 {
1115         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1116         struct iwl_ucode_tlv *tlv;
1117         size_t len = ucode_raw->size;
1118         const u8 *data;
1119         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1120         u64 alternatives;
1121         u32 tlv_len;
1122         enum iwl_ucode_tlv_type tlv_type;
1123         const u8 *tlv_data;
1124
1125         if (len < sizeof(*ucode)) {
1126                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1127                 return -EINVAL;
1128         }
1129
1130         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1131                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1132                         le32_to_cpu(ucode->magic));
1133                 return -EINVAL;
1134         }
1135
1136         /*
1137          * Check which alternatives are present, and "downgrade"
1138          * when the chosen alternative is not present, warning
1139          * the user when that happens. Some files may not have
1140          * any alternatives, so don't warn in that case.
1141          */
1142         alternatives = le64_to_cpu(ucode->alternatives);
1143         tmp = wanted_alternative;
1144         if (wanted_alternative > 63)
1145                 wanted_alternative = 63;
1146         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1147                 wanted_alternative--;
1148         if (wanted_alternative && wanted_alternative != tmp)
1149                 IWL_WARN(priv,
1150                          "uCode alternative %d not available, choosing %d\n",
1151                          tmp, wanted_alternative);
1152
1153         priv->ucode_ver = le32_to_cpu(ucode->ver);
1154         pieces->build = le32_to_cpu(ucode->build);
1155         data = ucode->data;
1156
1157         len -= sizeof(*ucode);
1158
1159         while (len >= sizeof(*tlv)) {
1160                 u16 tlv_alt;
1161
1162                 len -= sizeof(*tlv);
1163                 tlv = (void *)data;
1164
1165                 tlv_len = le32_to_cpu(tlv->length);
1166                 tlv_type = le16_to_cpu(tlv->type);
1167                 tlv_alt = le16_to_cpu(tlv->alternative);
1168                 tlv_data = tlv->data;
1169
1170                 if (len < tlv_len) {
1171                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1172                                 len, tlv_len);
1173                         return -EINVAL;
1174                 }
1175                 len -= ALIGN(tlv_len, 4);
1176                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1177
1178                 /*
1179                  * Alternative 0 is always valid.
1180                  *
1181                  * Skip alternative TLVs that are not selected.
1182                  */
1183                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1184                         continue;
1185
1186                 switch (tlv_type) {
1187                 case IWL_UCODE_TLV_INST:
1188                         pieces->inst = tlv_data;
1189                         pieces->inst_size = tlv_len;
1190                         break;
1191                 case IWL_UCODE_TLV_DATA:
1192                         pieces->data = tlv_data;
1193                         pieces->data_size = tlv_len;
1194                         break;
1195                 case IWL_UCODE_TLV_INIT:
1196                         pieces->init = tlv_data;
1197                         pieces->init_size = tlv_len;
1198                         break;
1199                 case IWL_UCODE_TLV_INIT_DATA:
1200                         pieces->init_data = tlv_data;
1201                         pieces->init_data_size = tlv_len;
1202                         break;
1203                 case IWL_UCODE_TLV_BOOT:
1204                         IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1205                         break;
1206                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1207                         if (tlv_len != sizeof(u32))
1208                                 goto invalid_tlv_len;
1209                         capa->max_probe_length =
1210                                         le32_to_cpup((__le32 *)tlv_data);
1211                         break;
1212                 case IWL_UCODE_TLV_PAN:
1213                         if (tlv_len)
1214                                 goto invalid_tlv_len;
1215                         capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1216                         break;
1217                 case IWL_UCODE_TLV_FLAGS:
1218                         /* must be at least one u32 */
1219                         if (tlv_len < sizeof(u32))
1220                                 goto invalid_tlv_len;
1221                         /* and a proper number of u32s */
1222                         if (tlv_len % sizeof(u32))
1223                                 goto invalid_tlv_len;
1224                         /*
1225                          * This driver only reads the first u32 as
1226                          * right now no more features are defined,
1227                          * if that changes then either the driver
1228                          * will not work with the new firmware, or
1229                          * it'll not take advantage of new features.
1230                          */
1231                         capa->flags = le32_to_cpup((__le32 *)tlv_data);
1232                         break;
1233                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1234                         if (tlv_len != sizeof(u32))
1235                                 goto invalid_tlv_len;
1236                         pieces->init_evtlog_ptr =
1237                                         le32_to_cpup((__le32 *)tlv_data);
1238                         break;
1239                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1240                         if (tlv_len != sizeof(u32))
1241                                 goto invalid_tlv_len;
1242                         pieces->init_evtlog_size =
1243                                         le32_to_cpup((__le32 *)tlv_data);
1244                         break;
1245                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1246                         if (tlv_len != sizeof(u32))
1247                                 goto invalid_tlv_len;
1248                         pieces->init_errlog_ptr =
1249                                         le32_to_cpup((__le32 *)tlv_data);
1250                         break;
1251                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1252                         if (tlv_len != sizeof(u32))
1253                                 goto invalid_tlv_len;
1254                         pieces->inst_evtlog_ptr =
1255                                         le32_to_cpup((__le32 *)tlv_data);
1256                         break;
1257                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1258                         if (tlv_len != sizeof(u32))
1259                                 goto invalid_tlv_len;
1260                         pieces->inst_evtlog_size =
1261                                         le32_to_cpup((__le32 *)tlv_data);
1262                         break;
1263                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1264                         if (tlv_len != sizeof(u32))
1265                                 goto invalid_tlv_len;
1266                         pieces->inst_errlog_ptr =
1267                                         le32_to_cpup((__le32 *)tlv_data);
1268                         break;
1269                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1270                         if (tlv_len)
1271                                 goto invalid_tlv_len;
1272                         priv->enhance_sensitivity_table = true;
1273                         break;
1274                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1275                         if (tlv_len != sizeof(u32))
1276                                 goto invalid_tlv_len;
1277                         capa->standard_phy_calibration_size =
1278                                         le32_to_cpup((__le32 *)tlv_data);
1279                         break;
1280                 default:
1281                         IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1282                         break;
1283                 }
1284         }
1285
1286         if (len) {
1287                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1288                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1289                 return -EINVAL;
1290         }
1291
1292         return 0;
1293
1294  invalid_tlv_len:
1295         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1296         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1297
1298         return -EINVAL;
1299 }
1300
1301 /**
1302  * iwl_ucode_callback - callback when firmware was loaded
1303  *
1304  * If loaded successfully, copies the firmware into buffers
1305  * for the card to fetch (via DMA).
1306  */
1307 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1308 {
1309         struct iwl_priv *priv = context;
1310         struct iwl_ucode_header *ucode;
1311         int err;
1312         struct iwlagn_firmware_pieces pieces;
1313         const unsigned int api_max = priv->cfg->ucode_api_max;
1314         const unsigned int api_min = priv->cfg->ucode_api_min;
1315         u32 api_ver;
1316         char buildstr[25];
1317         u32 build;
1318         struct iwlagn_ucode_capabilities ucode_capa = {
1319                 .max_probe_length = 200,
1320                 .standard_phy_calibration_size =
1321                         IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1322         };
1323
1324         memset(&pieces, 0, sizeof(pieces));
1325
1326         if (!ucode_raw) {
1327                 if (priv->fw_index <= priv->cfg->ucode_api_max)
1328                         IWL_ERR(priv,
1329                                 "request for firmware file '%s' failed.\n",
1330                                 priv->firmware_name);
1331                 goto try_again;
1332         }
1333
1334         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1335                        priv->firmware_name, ucode_raw->size);
1336
1337         /* Make sure that we got at least the API version number */
1338         if (ucode_raw->size < 4) {
1339                 IWL_ERR(priv, "File size way too small!\n");
1340                 goto try_again;
1341         }
1342
1343         /* Data from ucode file:  header followed by uCode images */
1344         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1345
1346         if (ucode->ver)
1347                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1348         else
1349                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1350                                            &ucode_capa);
1351
1352         if (err)
1353                 goto try_again;
1354
1355         api_ver = IWL_UCODE_API(priv->ucode_ver);
1356         build = pieces.build;
1357
1358         /*
1359          * api_ver should match the api version forming part of the
1360          * firmware filename ... but we don't check for that and only rely
1361          * on the API version read from firmware header from here on forward
1362          */
1363         /* no api version check required for experimental uCode */
1364         if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
1365                 if (api_ver < api_min || api_ver > api_max) {
1366                         IWL_ERR(priv,
1367                                 "Driver unable to support your firmware API. "
1368                                 "Driver supports v%u, firmware is v%u.\n",
1369                                 api_max, api_ver);
1370                         goto try_again;
1371                 }
1372
1373                 if (api_ver != api_max)
1374                         IWL_ERR(priv,
1375                                 "Firmware has old API version. Expected v%u, "
1376                                 "got v%u. New firmware can be obtained "
1377                                 "from http://www.intellinuxwireless.org.\n",
1378                                 api_max, api_ver);
1379         }
1380
1381         if (build)
1382                 sprintf(buildstr, " build %u%s", build,
1383                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1384                                 ? " (EXP)" : "");
1385         else
1386                 buildstr[0] = '\0';
1387
1388         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1389                  IWL_UCODE_MAJOR(priv->ucode_ver),
1390                  IWL_UCODE_MINOR(priv->ucode_ver),
1391                  IWL_UCODE_API(priv->ucode_ver),
1392                  IWL_UCODE_SERIAL(priv->ucode_ver),
1393                  buildstr);
1394
1395         snprintf(priv->hw->wiphy->fw_version,
1396                  sizeof(priv->hw->wiphy->fw_version),
1397                  "%u.%u.%u.%u%s",
1398                  IWL_UCODE_MAJOR(priv->ucode_ver),
1399                  IWL_UCODE_MINOR(priv->ucode_ver),
1400                  IWL_UCODE_API(priv->ucode_ver),
1401                  IWL_UCODE_SERIAL(priv->ucode_ver),
1402                  buildstr);
1403
1404         /*
1405          * For any of the failures below (before allocating pci memory)
1406          * we will try to load a version with a smaller API -- maybe the
1407          * user just got a corrupted version of the latest API.
1408          */
1409
1410         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1411                        priv->ucode_ver);
1412         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1413                        pieces.inst_size);
1414         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1415                        pieces.data_size);
1416         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1417                        pieces.init_size);
1418         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1419                        pieces.init_data_size);
1420
1421         /* Verify that uCode images will fit in card's SRAM */
1422         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1423                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1424                         pieces.inst_size);
1425                 goto try_again;
1426         }
1427
1428         if (pieces.data_size > priv->hw_params.max_data_size) {
1429                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1430                         pieces.data_size);
1431                 goto try_again;
1432         }
1433
1434         if (pieces.init_size > priv->hw_params.max_inst_size) {
1435                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1436                         pieces.init_size);
1437                 goto try_again;
1438         }
1439
1440         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1441                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1442                         pieces.init_data_size);
1443                 goto try_again;
1444         }
1445
1446         /* Allocate ucode buffers for card's bus-master loading ... */
1447
1448         /* Runtime instructions and 2 copies of data:
1449          * 1) unmodified from disk
1450          * 2) backup cache for save/restore during power-downs */
1451         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.code,
1452                               pieces.inst, pieces.inst_size))
1453                 goto err_pci_alloc;
1454         if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.data,
1455                               pieces.data, pieces.data_size))
1456                 goto err_pci_alloc;
1457
1458         /* Initialization instructions and data */
1459         if (pieces.init_size && pieces.init_data_size) {
1460                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.code,
1461                                       pieces.init, pieces.init_size))
1462                         goto err_pci_alloc;
1463                 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.data,
1464                                       pieces.init_data, pieces.init_data_size))
1465                         goto err_pci_alloc;
1466         }
1467
1468         /* Now that we can no longer fail, copy information */
1469
1470         /*
1471          * The (size - 16) / 12 formula is based on the information recorded
1472          * for each event, which is of mode 1 (including timestamp) for all
1473          * new microcodes that include this information.
1474          */
1475         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1476         if (pieces.init_evtlog_size)
1477                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1478         else
1479                 priv->_agn.init_evtlog_size =
1480                         priv->cfg->base_params->max_event_log_size;
1481         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1482         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1483         if (pieces.inst_evtlog_size)
1484                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1485         else
1486                 priv->_agn.inst_evtlog_size =
1487                         priv->cfg->base_params->max_event_log_size;
1488         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1489
1490         priv->new_scan_threshold_behaviour =
1491                 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
1492
1493         if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1494                 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1495                 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1496         } else
1497                 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1498
1499         if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1500                 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1501         else
1502                 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1503
1504         /*
1505          * figure out the offset of chain noise reset and gain commands
1506          * base on the size of standard phy calibration commands table size
1507          */
1508         if (ucode_capa.standard_phy_calibration_size >
1509             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
1510                 ucode_capa.standard_phy_calibration_size =
1511                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
1512
1513         priv->_agn.phy_calib_chain_noise_reset_cmd =
1514                 ucode_capa.standard_phy_calibration_size;
1515         priv->_agn.phy_calib_chain_noise_gain_cmd =
1516                 ucode_capa.standard_phy_calibration_size + 1;
1517
1518         /**************************************************
1519          * This is still part of probe() in a sense...
1520          *
1521          * 9. Setup and register with mac80211 and debugfs
1522          **************************************************/
1523         err = iwl_mac_setup_register(priv, &ucode_capa);
1524         if (err)
1525                 goto out_unbind;
1526
1527         err = iwl_dbgfs_register(priv, DRV_NAME);
1528         if (err)
1529                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1530
1531         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
1532                                         &iwl_attribute_group);
1533         if (err) {
1534                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1535                 goto out_unbind;
1536         }
1537
1538         /* We have our copies now, allow OS release its copies */
1539         release_firmware(ucode_raw);
1540         complete(&priv->_agn.firmware_loading_complete);
1541         return;
1542
1543  try_again:
1544         /* try next, if any */
1545         if (iwl_request_firmware(priv, false))
1546                 goto out_unbind;
1547         release_firmware(ucode_raw);
1548         return;
1549
1550  err_pci_alloc:
1551         IWL_ERR(priv, "failed to allocate pci memory\n");
1552         iwl_dealloc_ucode_pci(priv);
1553  out_unbind:
1554         complete(&priv->_agn.firmware_loading_complete);
1555         device_release_driver(&priv->pci_dev->dev);
1556         release_firmware(ucode_raw);
1557 }
1558
1559 static const char *desc_lookup_text[] = {
1560         "OK",
1561         "FAIL",
1562         "BAD_PARAM",
1563         "BAD_CHECKSUM",
1564         "NMI_INTERRUPT_WDG",
1565         "SYSASSERT",
1566         "FATAL_ERROR",
1567         "BAD_COMMAND",
1568         "HW_ERROR_TUNE_LOCK",
1569         "HW_ERROR_TEMPERATURE",
1570         "ILLEGAL_CHAN_FREQ",
1571         "VCC_NOT_STABLE",
1572         "FH_ERROR",
1573         "NMI_INTERRUPT_HOST",
1574         "NMI_INTERRUPT_ACTION_PT",
1575         "NMI_INTERRUPT_UNKNOWN",
1576         "UCODE_VERSION_MISMATCH",
1577         "HW_ERROR_ABS_LOCK",
1578         "HW_ERROR_CAL_LOCK_FAIL",
1579         "NMI_INTERRUPT_INST_ACTION_PT",
1580         "NMI_INTERRUPT_DATA_ACTION_PT",
1581         "NMI_TRM_HW_ER",
1582         "NMI_INTERRUPT_TRM",
1583         "NMI_INTERRUPT_BREAK_POINT"
1584         "DEBUG_0",
1585         "DEBUG_1",
1586         "DEBUG_2",
1587         "DEBUG_3",
1588 };
1589
1590 static struct { char *name; u8 num; } advanced_lookup[] = {
1591         { "NMI_INTERRUPT_WDG", 0x34 },
1592         { "SYSASSERT", 0x35 },
1593         { "UCODE_VERSION_MISMATCH", 0x37 },
1594         { "BAD_COMMAND", 0x38 },
1595         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
1596         { "FATAL_ERROR", 0x3D },
1597         { "NMI_TRM_HW_ERR", 0x46 },
1598         { "NMI_INTERRUPT_TRM", 0x4C },
1599         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
1600         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
1601         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
1602         { "NMI_INTERRUPT_HOST", 0x66 },
1603         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
1604         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
1605         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
1606         { "ADVANCED_SYSASSERT", 0 },
1607 };
1608
1609 static const char *desc_lookup(u32 num)
1610 {
1611         int i;
1612         int max = ARRAY_SIZE(desc_lookup_text);
1613
1614         if (num < max)
1615                 return desc_lookup_text[num];
1616
1617         max = ARRAY_SIZE(advanced_lookup) - 1;
1618         for (i = 0; i < max; i++) {
1619                 if (advanced_lookup[i].num == num)
1620                         break;;
1621         }
1622         return advanced_lookup[i].name;
1623 }
1624
1625 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1626 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1627
1628 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1629 {
1630         u32 data2, line;
1631         u32 desc, time, count, base, data1;
1632         u32 blink1, blink2, ilink1, ilink2;
1633         u32 pc, hcmd;
1634         struct iwl_error_event_table table;
1635
1636         base = priv->device_pointers.error_event_table;
1637         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1638                 if (!base)
1639                         base = priv->_agn.init_errlog_ptr;
1640         } else {
1641                 if (!base)
1642                         base = priv->_agn.inst_errlog_ptr;
1643         }
1644
1645         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1646                 IWL_ERR(priv,
1647                         "Not valid error log pointer 0x%08X for %s uCode\n",
1648                         base,
1649                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
1650                                         ? "Init" : "RT");
1651                 return;
1652         }
1653
1654         iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
1655
1656         count = table.valid;
1657
1658         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1659                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1660                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1661                         priv->status, count);
1662         }
1663
1664         desc = table.error_id;
1665         priv->isr_stats.err_code = desc;
1666         pc = table.pc;
1667         blink1 = table.blink1;
1668         blink2 = table.blink2;
1669         ilink1 = table.ilink1;
1670         ilink2 = table.ilink2;
1671         data1 = table.data1;
1672         data2 = table.data2;
1673         line = table.line;
1674         time = table.tsf_low;
1675         hcmd = table.hcmd;
1676
1677         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1678                                       blink1, blink2, ilink1, ilink2);
1679
1680         IWL_ERR(priv, "Desc                                  Time       "
1681                 "data1      data2      line\n");
1682         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1683                 desc_lookup(desc), desc, time, data1, data2, line);
1684         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1685         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1686                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1687 }
1688
1689 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1690
1691 /**
1692  * iwl_print_event_log - Dump error event log to syslog
1693  *
1694  */
1695 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1696                                u32 num_events, u32 mode,
1697                                int pos, char **buf, size_t bufsz)
1698 {
1699         u32 i;
1700         u32 base;       /* SRAM byte address of event log header */
1701         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1702         u32 ptr;        /* SRAM byte address of log data */
1703         u32 ev, time, data; /* event log data */
1704         unsigned long reg_flags;
1705
1706         if (num_events == 0)
1707                 return pos;
1708
1709         base = priv->device_pointers.log_event_table;
1710         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1711                 if (!base)
1712                         base = priv->_agn.init_evtlog_ptr;
1713         } else {
1714                 if (!base)
1715                         base = priv->_agn.inst_evtlog_ptr;
1716         }
1717
1718         if (mode == 0)
1719                 event_size = 2 * sizeof(u32);
1720         else
1721                 event_size = 3 * sizeof(u32);
1722
1723         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1724
1725         /* Make sure device is powered up for SRAM reads */
1726         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1727         iwl_grab_nic_access(priv);
1728
1729         /* Set starting address; reads will auto-increment */
1730         iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
1731         rmb();
1732
1733         /* "time" is actually "data" for mode 0 (no timestamp).
1734         * place event id # at far right for easier visual parsing. */
1735         for (i = 0; i < num_events; i++) {
1736                 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1737                 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1738                 if (mode == 0) {
1739                         /* data, ev */
1740                         if (bufsz) {
1741                                 pos += scnprintf(*buf + pos, bufsz - pos,
1742                                                 "EVT_LOG:0x%08x:%04u\n",
1743                                                 time, ev);
1744                         } else {
1745                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1746                                         time, ev);
1747                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1748                                         time, ev);
1749                         }
1750                 } else {
1751                         data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
1752                         if (bufsz) {
1753                                 pos += scnprintf(*buf + pos, bufsz - pos,
1754                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1755                                                  time, data, ev);
1756                         } else {
1757                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1758                                         time, data, ev);
1759                                 trace_iwlwifi_dev_ucode_event(priv, time,
1760                                         data, ev);
1761                         }
1762                 }
1763         }
1764
1765         /* Allow device to power down */
1766         iwl_release_nic_access(priv);
1767         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1768         return pos;
1769 }
1770
1771 /**
1772  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1773  */
1774 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1775                                     u32 num_wraps, u32 next_entry,
1776                                     u32 size, u32 mode,
1777                                     int pos, char **buf, size_t bufsz)
1778 {
1779         /*
1780          * display the newest DEFAULT_LOG_ENTRIES entries
1781          * i.e the entries just before the next ont that uCode would fill.
1782          */
1783         if (num_wraps) {
1784                 if (next_entry < size) {
1785                         pos = iwl_print_event_log(priv,
1786                                                 capacity - (size - next_entry),
1787                                                 size - next_entry, mode,
1788                                                 pos, buf, bufsz);
1789                         pos = iwl_print_event_log(priv, 0,
1790                                                   next_entry, mode,
1791                                                   pos, buf, bufsz);
1792                 } else
1793                         pos = iwl_print_event_log(priv, next_entry - size,
1794                                                   size, mode, pos, buf, bufsz);
1795         } else {
1796                 if (next_entry < size) {
1797                         pos = iwl_print_event_log(priv, 0, next_entry,
1798                                                   mode, pos, buf, bufsz);
1799                 } else {
1800                         pos = iwl_print_event_log(priv, next_entry - size,
1801                                                   size, mode, pos, buf, bufsz);
1802                 }
1803         }
1804         return pos;
1805 }
1806
1807 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1808
1809 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1810                             char **buf, bool display)
1811 {
1812         u32 base;       /* SRAM byte address of event log header */
1813         u32 capacity;   /* event log capacity in # entries */
1814         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1815         u32 num_wraps;  /* # times uCode wrapped to top of log */
1816         u32 next_entry; /* index of next entry to be written by uCode */
1817         u32 size;       /* # entries that we'll print */
1818         u32 logsize;
1819         int pos = 0;
1820         size_t bufsz = 0;
1821
1822         base = priv->device_pointers.log_event_table;
1823         if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
1824                 logsize = priv->_agn.init_evtlog_size;
1825                 if (!base)
1826                         base = priv->_agn.init_evtlog_ptr;
1827         } else {
1828                 logsize = priv->_agn.inst_evtlog_size;
1829                 if (!base)
1830                         base = priv->_agn.inst_evtlog_ptr;
1831         }
1832
1833         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1834                 IWL_ERR(priv,
1835                         "Invalid event log pointer 0x%08X for %s uCode\n",
1836                         base,
1837                         (priv->ucode_type == UCODE_SUBTYPE_INIT)
1838                                         ? "Init" : "RT");
1839                 return -EINVAL;
1840         }
1841
1842         /* event log header */
1843         capacity = iwl_read_targ_mem(priv, base);
1844         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1845         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1846         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1847
1848         if (capacity > logsize) {
1849                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1850                         capacity, logsize);
1851                 capacity = logsize;
1852         }
1853
1854         if (next_entry > logsize) {
1855                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1856                         next_entry, logsize);
1857                 next_entry = logsize;
1858         }
1859
1860         size = num_wraps ? capacity : next_entry;
1861
1862         /* bail out if nothing in log */
1863         if (size == 0) {
1864                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1865                 return pos;
1866         }
1867
1868         /* enable/disable bt channel inhibition */
1869         priv->bt_ch_announce = iwlagn_bt_ch_announce;
1870
1871 #ifdef CONFIG_IWLWIFI_DEBUG
1872         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1873                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1874                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1875 #else
1876         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1877                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1878 #endif
1879         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1880                 size);
1881
1882 #ifdef CONFIG_IWLWIFI_DEBUG
1883         if (display) {
1884                 if (full_log)
1885                         bufsz = capacity * 48;
1886                 else
1887                         bufsz = size * 48;
1888                 *buf = kmalloc(bufsz, GFP_KERNEL);
1889                 if (!*buf)
1890                         return -ENOMEM;
1891         }
1892         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1893                 /*
1894                  * if uCode has wrapped back to top of log,
1895                  * start at the oldest entry,
1896                  * i.e the next one that uCode would fill.
1897                  */
1898                 if (num_wraps)
1899                         pos = iwl_print_event_log(priv, next_entry,
1900                                                 capacity - next_entry, mode,
1901                                                 pos, buf, bufsz);
1902                 /* (then/else) start at top of log */
1903                 pos = iwl_print_event_log(priv, 0,
1904                                           next_entry, mode, pos, buf, bufsz);
1905         } else
1906                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1907                                                 next_entry, size, mode,
1908                                                 pos, buf, bufsz);
1909 #else
1910         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
1911                                         next_entry, size, mode,
1912                                         pos, buf, bufsz);
1913 #endif
1914         return pos;
1915 }
1916
1917 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1918 {
1919         struct iwl_ct_kill_config cmd;
1920         struct iwl_ct_kill_throttling_config adv_cmd;
1921         unsigned long flags;
1922         int ret = 0;
1923
1924         spin_lock_irqsave(&priv->lock, flags);
1925         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1926                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1927         spin_unlock_irqrestore(&priv->lock, flags);
1928         priv->thermal_throttle.ct_kill_toggle = false;
1929
1930         if (priv->cfg->base_params->support_ct_kill_exit) {
1931                 adv_cmd.critical_temperature_enter =
1932                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
1933                 adv_cmd.critical_temperature_exit =
1934                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1935
1936                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1937                                        sizeof(adv_cmd), &adv_cmd);
1938                 if (ret)
1939                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1940                 else
1941                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1942                                         "succeeded, "
1943                                         "critical temperature enter is %d,"
1944                                         "exit is %d\n",
1945                                        priv->hw_params.ct_kill_threshold,
1946                                        priv->hw_params.ct_kill_exit_threshold);
1947         } else {
1948                 cmd.critical_temperature_R =
1949                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
1950
1951                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1952                                        sizeof(cmd), &cmd);
1953                 if (ret)
1954                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1955                 else
1956                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1957                                         "succeeded, "
1958                                         "critical temperature is %d\n",
1959                                         priv->hw_params.ct_kill_threshold);
1960         }
1961 }
1962
1963 static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
1964 {
1965         struct iwl_calib_cfg_cmd calib_cfg_cmd;
1966         struct iwl_host_cmd cmd = {
1967                 .id = CALIBRATION_CFG_CMD,
1968                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
1969                 .data = { &calib_cfg_cmd, },
1970         };
1971
1972         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
1973         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
1974         calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
1975
1976         return iwl_send_cmd(priv, &cmd);
1977 }
1978
1979
1980 /**
1981  * iwl_alive_start - called after REPLY_ALIVE notification received
1982  *                   from protocol/runtime uCode (initialization uCode's
1983  *                   Alive gets handled by iwl_init_alive_start()).
1984  */
1985 int iwl_alive_start(struct iwl_priv *priv)
1986 {
1987         int ret = 0;
1988         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1989
1990         iwl_reset_ict(priv);
1991
1992         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1993
1994         /* After the ALIVE response, we can send host commands to the uCode */
1995         set_bit(STATUS_ALIVE, &priv->status);
1996
1997         /* Enable watchdog to monitor the driver tx queues */
1998         iwl_setup_watchdog(priv);
1999
2000         if (iwl_is_rfkill(priv))
2001                 return -ERFKILL;
2002
2003         /* download priority table before any calibration request */
2004         if (priv->cfg->bt_params &&
2005             priv->cfg->bt_params->advanced_bt_coexist) {
2006                 /* Configure Bluetooth device coexistence support */
2007                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2008                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2009                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2010                 priv->cfg->ops->hcmd->send_bt_config(priv);
2011                 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2012                 iwlagn_send_prio_tbl(priv);
2013
2014                 /* FIXME: w/a to force change uCode BT state machine */
2015                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2016                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2017                 if (ret)
2018                         return ret;
2019                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2020                                          BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2021                 if (ret)
2022                         return ret;
2023         }
2024         if (priv->hw_params.calib_rt_cfg)
2025                 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2026
2027         ieee80211_wake_queues(priv->hw);
2028
2029         priv->active_rate = IWL_RATES_MASK;
2030
2031         /* Configure Tx antenna selection based on H/W config */
2032         if (priv->cfg->ops->hcmd->set_tx_ant)
2033                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2034
2035         if (iwl_is_associated_ctx(ctx)) {
2036                 struct iwl_rxon_cmd *active_rxon =
2037                                 (struct iwl_rxon_cmd *)&ctx->active;
2038                 /* apply any changes in staging */
2039                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2040                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2041         } else {
2042                 struct iwl_rxon_context *tmp;
2043                 /* Initialize our rx_config data */
2044                 for_each_context(priv, tmp)
2045                         iwl_connection_init_rx_config(priv, tmp);
2046
2047                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2048                         priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2049         }
2050
2051         if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2052             !priv->cfg->bt_params->advanced_bt_coexist)) {
2053                 /*
2054                  * default is 2-wire BT coexexistence support
2055                  */
2056                 priv->cfg->ops->hcmd->send_bt_config(priv);
2057         }
2058
2059         iwl_reset_run_time_calib(priv);
2060
2061         set_bit(STATUS_READY, &priv->status);
2062
2063         /* Configure the adapter for unassociated operation */
2064         ret = iwlcore_commit_rxon(priv, ctx);
2065         if (ret)
2066                 return ret;
2067
2068         /* At this point, the NIC is initialized and operational */
2069         iwl_rf_kill_ct_config(priv);
2070
2071         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2072
2073         return iwl_power_update_mode(priv, true);
2074 }
2075
2076 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2077
2078 static void __iwl_down(struct iwl_priv *priv)
2079 {
2080         int exit_pending;
2081
2082         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2083
2084         iwl_scan_cancel_timeout(priv, 200);
2085
2086         exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2087
2088         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2089          * to prevent rearm timer */
2090         del_timer_sync(&priv->watchdog);
2091
2092         iwl_clear_ucode_stations(priv, NULL);
2093         iwl_dealloc_bcast_stations(priv);
2094         iwl_clear_driver_stations(priv);
2095
2096         /* reset BT coex data */
2097         priv->bt_status = 0;
2098         if (priv->cfg->bt_params)
2099                 priv->bt_traffic_load =
2100                          priv->cfg->bt_params->bt_init_traffic_load;
2101         else
2102                 priv->bt_traffic_load = 0;
2103         priv->bt_full_concurrent = false;
2104         priv->bt_ci_compliance = 0;
2105
2106         /* Wipe out the EXIT_PENDING status bit if we are not actually
2107          * exiting the module */
2108         if (!exit_pending)
2109                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2110
2111         if (priv->mac80211_registered)
2112                 ieee80211_stop_queues(priv->hw);
2113
2114         /* Clear out all status bits but a few that are stable across reset */
2115         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2116                                 STATUS_RF_KILL_HW |
2117                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2118                                 STATUS_GEO_CONFIGURED |
2119                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2120                                 STATUS_FW_ERROR |
2121                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2122                                 STATUS_EXIT_PENDING;
2123
2124         iwlagn_stop_device(priv);
2125
2126         dev_kfree_skb(priv->beacon_skb);
2127         priv->beacon_skb = NULL;
2128 }
2129
2130 static void iwl_down(struct iwl_priv *priv)
2131 {
2132         mutex_lock(&priv->mutex);
2133         __iwl_down(priv);
2134         mutex_unlock(&priv->mutex);
2135
2136         iwl_cancel_deferred_work(priv);
2137 }
2138
2139 #define HW_READY_TIMEOUT (50)
2140
2141 /* Note: returns poll_bit return value, which is >= 0 if success */
2142 static int iwl_set_hw_ready(struct iwl_priv *priv)
2143 {
2144         int ret;
2145
2146         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2147                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2148
2149         /* See if we got it */
2150         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2151                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2152                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2153                                 HW_READY_TIMEOUT);
2154
2155         IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2156         return ret;
2157 }
2158
2159 /* Note: returns standard 0/-ERROR code */
2160 int iwl_prepare_card_hw(struct iwl_priv *priv)
2161 {
2162         int ret;
2163
2164         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2165
2166         ret = iwl_set_hw_ready(priv);
2167         if (ret >= 0)
2168                 return 0;
2169
2170         /* If HW is not ready, prepare the conditions to check again */
2171         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2172                         CSR_HW_IF_CONFIG_REG_PREPARE);
2173
2174         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2175                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2176                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2177
2178         if (ret < 0)
2179                 return ret;
2180
2181         /* HW should be ready by now, check again. */
2182         ret = iwl_set_hw_ready(priv);
2183         if (ret >= 0)
2184                 return 0;
2185         return ret;
2186 }
2187
2188 #define MAX_HW_RESTARTS 5
2189
2190 static int __iwl_up(struct iwl_priv *priv)
2191 {
2192         struct iwl_rxon_context *ctx;
2193         int ret;
2194
2195         lockdep_assert_held(&priv->mutex);
2196
2197         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2198                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2199                 return -EIO;
2200         }
2201
2202         for_each_context(priv, ctx) {
2203                 ret = iwlagn_alloc_bcast_station(priv, ctx);
2204                 if (ret) {
2205                         iwl_dealloc_bcast_stations(priv);
2206                         return ret;
2207                 }
2208         }
2209
2210         ret = iwlagn_run_init_ucode(priv);
2211         if (ret) {
2212                 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
2213                 goto error;
2214         }
2215
2216         ret = iwlagn_load_ucode_wait_alive(priv,
2217                                            &priv->ucode_rt,
2218                                            UCODE_SUBTYPE_REGULAR,
2219                                            UCODE_SUBTYPE_REGULAR_NEW);
2220         if (ret) {
2221                 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
2222                 goto error;
2223         }
2224
2225         ret = iwl_alive_start(priv);
2226         if (ret)
2227                 goto error;
2228         return 0;
2229
2230  error:
2231         set_bit(STATUS_EXIT_PENDING, &priv->status);
2232         __iwl_down(priv);
2233         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2234
2235         IWL_ERR(priv, "Unable to initialize device.\n");
2236         return ret;
2237 }
2238
2239
2240 /*****************************************************************************
2241  *
2242  * Workqueue callbacks
2243  *
2244  *****************************************************************************/
2245
2246 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2247 {
2248         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2249                         run_time_calib_work);
2250
2251         mutex_lock(&priv->mutex);
2252
2253         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2254             test_bit(STATUS_SCANNING, &priv->status)) {
2255                 mutex_unlock(&priv->mutex);
2256                 return;
2257         }
2258
2259         if (priv->start_calib) {
2260                 iwl_chain_noise_calibration(priv);
2261                 iwl_sensitivity_calibration(priv);
2262         }
2263
2264         mutex_unlock(&priv->mutex);
2265 }
2266
2267 static void iwlagn_prepare_restart(struct iwl_priv *priv)
2268 {
2269         struct iwl_rxon_context *ctx;
2270         bool bt_full_concurrent;
2271         u8 bt_ci_compliance;
2272         u8 bt_load;
2273         u8 bt_status;
2274
2275         lockdep_assert_held(&priv->mutex);
2276
2277         for_each_context(priv, ctx)
2278                 ctx->vif = NULL;
2279         priv->is_open = 0;
2280
2281         /*
2282          * __iwl_down() will clear the BT status variables,
2283          * which is correct, but when we restart we really
2284          * want to keep them so restore them afterwards.
2285          *
2286          * The restart process will later pick them up and
2287          * re-configure the hw when we reconfigure the BT
2288          * command.
2289          */
2290         bt_full_concurrent = priv->bt_full_concurrent;
2291         bt_ci_compliance = priv->bt_ci_compliance;
2292         bt_load = priv->bt_traffic_load;
2293         bt_status = priv->bt_status;
2294
2295         __iwl_down(priv);
2296
2297         priv->bt_full_concurrent = bt_full_concurrent;
2298         priv->bt_ci_compliance = bt_ci_compliance;
2299         priv->bt_traffic_load = bt_load;
2300         priv->bt_status = bt_status;
2301 }
2302
2303 static void iwl_bg_restart(struct work_struct *data)
2304 {
2305         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2306
2307         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2308                 return;
2309
2310         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2311                 mutex_lock(&priv->mutex);
2312                 iwlagn_prepare_restart(priv);
2313                 mutex_unlock(&priv->mutex);
2314                 iwl_cancel_deferred_work(priv);
2315                 ieee80211_restart_hw(priv->hw);
2316         } else {
2317                 WARN_ON(1);
2318         }
2319 }
2320
2321 static void iwl_bg_rx_replenish(struct work_struct *data)
2322 {
2323         struct iwl_priv *priv =
2324             container_of(data, struct iwl_priv, rx_replenish);
2325
2326         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2327                 return;
2328
2329         mutex_lock(&priv->mutex);
2330         iwlagn_rx_replenish(priv);
2331         mutex_unlock(&priv->mutex);
2332 }
2333
2334 static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
2335                                  struct ieee80211_channel *chan,
2336                                  enum nl80211_channel_type channel_type,
2337                                  unsigned int wait)
2338 {
2339         struct iwl_priv *priv = hw->priv;
2340         int ret;
2341
2342         /* Not supported if we don't have PAN */
2343         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
2344                 ret = -EOPNOTSUPP;
2345                 goto free;
2346         }
2347
2348         /* Not supported on pre-P2P firmware */
2349         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
2350                                         BIT(NL80211_IFTYPE_P2P_CLIENT))) {
2351                 ret = -EOPNOTSUPP;
2352                 goto free;
2353         }
2354
2355         mutex_lock(&priv->mutex);
2356
2357         if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2358                 /*
2359                  * If the PAN context is free, use the normal
2360                  * way of doing remain-on-channel offload + TX.
2361                  */
2362                 ret = 1;
2363                 goto out;
2364         }
2365
2366         /* TODO: queue up if scanning? */
2367         if (test_bit(STATUS_SCANNING, &priv->status) ||
2368             priv->_agn.offchan_tx_skb) {
2369                 ret = -EBUSY;
2370                 goto out;
2371         }
2372
2373         /*
2374          * max_scan_ie_len doesn't include the blank SSID or the header,
2375          * so need to add that again here.
2376          */
2377         if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2378                 ret = -ENOBUFS;
2379                 goto out;
2380         }
2381
2382         priv->_agn.offchan_tx_skb = skb;
2383         priv->_agn.offchan_tx_timeout = wait;
2384         priv->_agn.offchan_tx_chan = chan;
2385
2386         ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
2387                                 IWL_SCAN_OFFCH_TX, chan->band);
2388         if (ret)
2389                 priv->_agn.offchan_tx_skb = NULL;
2390  out:
2391         mutex_unlock(&priv->mutex);
2392  free:
2393         if (ret < 0)
2394                 kfree_skb(skb);
2395
2396         return ret;
2397 }
2398
2399 static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2400 {
2401         struct iwl_priv *priv = hw->priv;
2402         int ret;
2403
2404         mutex_lock(&priv->mutex);
2405
2406         if (!priv->_agn.offchan_tx_skb) {
2407                 ret = -EINVAL;
2408                 goto unlock;
2409         }
2410
2411         priv->_agn.offchan_tx_skb = NULL;
2412
2413         ret = iwl_scan_cancel_timeout(priv, 200);
2414         if (ret)
2415                 ret = -EIO;
2416 unlock:
2417         mutex_unlock(&priv->mutex);
2418
2419         return ret;
2420 }
2421
2422 /*****************************************************************************
2423  *
2424  * mac80211 entry point functions
2425  *
2426  *****************************************************************************/
2427
2428 /*
2429  * Not a mac80211 entry point function, but it fits in with all the
2430  * other mac80211 functions grouped here.
2431  */
2432 static int iwl_mac_setup_register(struct iwl_priv *priv,
2433                                   struct iwlagn_ucode_capabilities *capa)
2434 {
2435         int ret;
2436         struct ieee80211_hw *hw = priv->hw;
2437         struct iwl_rxon_context *ctx;
2438
2439         hw->rate_control_algorithm = "iwl-agn-rs";
2440
2441         /* Tell mac80211 our characteristics */
2442         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2443                     IEEE80211_HW_AMPDU_AGGREGATION |
2444                     IEEE80211_HW_NEED_DTIM_PERIOD |
2445                     IEEE80211_HW_SPECTRUM_MGMT |
2446                     IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2447
2448         hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2449
2450         hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2451                      IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2452
2453         if (priv->cfg->sku & IWL_SKU_N)
2454                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2455                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2456
2457         if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2458                 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2459
2460         hw->sta_data_size = sizeof(struct iwl_station_priv);
2461         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2462
2463         for_each_context(priv, ctx) {
2464                 hw->wiphy->interface_modes |= ctx->interface_modes;
2465                 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2466         }
2467
2468         hw->wiphy->max_remain_on_channel_duration = 1000;
2469
2470         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2471                             WIPHY_FLAG_DISABLE_BEACON_HINTS |
2472                             WIPHY_FLAG_IBSS_RSN;
2473
2474         /*
2475          * For now, disable PS by default because it affects
2476          * RX performance significantly.
2477          */
2478         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2479
2480         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2481         /* we create the 802.11 header and a zero-length SSID element */
2482         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2483
2484         /* Default value; 4 EDCA QOS priorities */
2485         hw->queues = 4;
2486
2487         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2488
2489         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2490                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2491                         &priv->bands[IEEE80211_BAND_2GHZ];
2492         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2493                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2494                         &priv->bands[IEEE80211_BAND_5GHZ];
2495
2496         iwl_leds_init(priv);
2497
2498         ret = ieee80211_register_hw(priv->hw);
2499         if (ret) {
2500                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2501                 return ret;
2502         }
2503         priv->mac80211_registered = 1;
2504
2505         return 0;
2506 }
2507
2508
2509 static int iwlagn_mac_start(struct ieee80211_hw *hw)
2510 {
2511         struct iwl_priv *priv = hw->priv;
2512         int ret;
2513
2514         IWL_DEBUG_MAC80211(priv, "enter\n");
2515
2516         /* we should be verifying the device is ready to be opened */
2517         mutex_lock(&priv->mutex);
2518         ret = __iwl_up(priv);
2519         mutex_unlock(&priv->mutex);
2520         if (ret)
2521                 return ret;
2522
2523         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2524
2525         /* Now we should be done, and the READY bit should be set. */
2526         if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
2527                 ret = -EIO;
2528
2529         iwlagn_led_enable(priv);
2530
2531         priv->is_open = 1;
2532         IWL_DEBUG_MAC80211(priv, "leave\n");
2533         return 0;
2534 }
2535
2536 static void iwlagn_mac_stop(struct ieee80211_hw *hw)
2537 {
2538         struct iwl_priv *priv = hw->priv;
2539
2540         IWL_DEBUG_MAC80211(priv, "enter\n");
2541
2542         if (!priv->is_open)
2543                 return;
2544
2545         priv->is_open = 0;
2546
2547         iwl_down(priv);
2548
2549         flush_workqueue(priv->workqueue);
2550
2551         /* User space software may expect getting rfkill changes
2552          * even if interface is down */
2553         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2554         iwl_enable_rfkill_int(priv);
2555
2556         IWL_DEBUG_MAC80211(priv, "leave\n");
2557 }
2558
2559 static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2560 {
2561         struct iwl_priv *priv = hw->priv;
2562
2563         IWL_DEBUG_MACDUMP(priv, "enter\n");
2564
2565         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2566                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2567
2568         if (iwlagn_tx_skb(priv, skb))
2569                 dev_kfree_skb_any(skb);
2570
2571         IWL_DEBUG_MACDUMP(priv, "leave\n");
2572 }
2573
2574 static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
2575                                        struct ieee80211_vif *vif,
2576                                        struct ieee80211_key_conf *keyconf,
2577                                        struct ieee80211_sta *sta,
2578                                        u32 iv32, u16 *phase1key)
2579 {
2580         struct iwl_priv *priv = hw->priv;
2581         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2582
2583         IWL_DEBUG_MAC80211(priv, "enter\n");
2584
2585         iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
2586                             iv32, phase1key);
2587
2588         IWL_DEBUG_MAC80211(priv, "leave\n");
2589 }
2590
2591 static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2592                               struct ieee80211_vif *vif,
2593                               struct ieee80211_sta *sta,
2594                               struct ieee80211_key_conf *key)
2595 {
2596         struct iwl_priv *priv = hw->priv;
2597         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2598         struct iwl_rxon_context *ctx = vif_priv->ctx;
2599         int ret;
2600         u8 sta_id;
2601         bool is_default_wep_key = false;
2602
2603         IWL_DEBUG_MAC80211(priv, "enter\n");
2604
2605         if (iwlagn_mod_params.sw_crypto) {
2606                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2607                 return -EOPNOTSUPP;
2608         }
2609
2610         /*
2611          * To support IBSS RSN, don't program group keys in IBSS, the
2612          * hardware will then not attempt to decrypt the frames.
2613          */
2614         if (vif->type == NL80211_IFTYPE_ADHOC &&
2615             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2616                 return -EOPNOTSUPP;
2617
2618         sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
2619         if (sta_id == IWL_INVALID_STATION)
2620                 return -EINVAL;
2621
2622         mutex_lock(&priv->mutex);
2623         iwl_scan_cancel_timeout(priv, 100);
2624
2625         /*
2626          * If we are getting WEP group key and we didn't receive any key mapping
2627          * so far, we are in legacy wep mode (group key only), otherwise we are
2628          * in 1X mode.
2629          * In legacy wep mode, we use another host command to the uCode.
2630          */
2631         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2632              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2633             !sta) {
2634                 if (cmd == SET_KEY)
2635                         is_default_wep_key = !ctx->key_mapping_keys;
2636                 else
2637                         is_default_wep_key =
2638                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2639         }
2640
2641         switch (cmd) {
2642         case SET_KEY:
2643                 if (is_default_wep_key)
2644                         ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
2645                 else
2646                         ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
2647                                                   key, sta_id);
2648
2649                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2650                 break;
2651         case DISABLE_KEY:
2652                 if (is_default_wep_key)
2653                         ret = iwl_remove_default_wep_key(priv, ctx, key);
2654                 else
2655                         ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
2656
2657                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2658                 break;
2659         default:
2660                 ret = -EINVAL;
2661         }
2662
2663         mutex_unlock(&priv->mutex);
2664         IWL_DEBUG_MAC80211(priv, "leave\n");
2665
2666         return ret;
2667 }
2668
2669 static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
2670                                    struct ieee80211_vif *vif,
2671                                    enum ieee80211_ampdu_mlme_action action,
2672                                    struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2673                                    u8 buf_size)
2674 {
2675         struct iwl_priv *priv = hw->priv;
2676         int ret = -EINVAL;
2677         struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
2678
2679         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2680                      sta->addr, tid);
2681
2682         if (!(priv->cfg->sku & IWL_SKU_N))
2683                 return -EACCES;
2684
2685         mutex_lock(&priv->mutex);
2686
2687         switch (action) {
2688         case IEEE80211_AMPDU_RX_START:
2689                 IWL_DEBUG_HT(priv, "start Rx\n");
2690                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
2691                 break;
2692         case IEEE80211_AMPDU_RX_STOP:
2693                 IWL_DEBUG_HT(priv, "stop Rx\n");
2694                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
2695                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2696                         ret = 0;
2697                 break;
2698         case IEEE80211_AMPDU_TX_START:
2699                 IWL_DEBUG_HT(priv, "start Tx\n");
2700                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
2701                 if (ret == 0) {
2702                         priv->_agn.agg_tids_count++;
2703                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2704                                      priv->_agn.agg_tids_count);
2705                 }
2706                 break;
2707         case IEEE80211_AMPDU_TX_STOP:
2708                 IWL_DEBUG_HT(priv, "stop Tx\n");
2709                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
2710                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2711                         priv->_agn.agg_tids_count--;
2712                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2713                                      priv->_agn.agg_tids_count);
2714                 }
2715                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2716                         ret = 0;
2717                 if (priv->cfg->ht_params &&
2718                     priv->cfg->ht_params->use_rts_for_aggregation) {
2719                         struct iwl_station_priv *sta_priv =
2720                                 (void *) sta->drv_priv;
2721                         /*
2722                          * switch off RTS/CTS if it was previously enabled
2723                          */
2724
2725                         sta_priv->lq_sta.lq.general_params.flags &=
2726                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2727                         iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2728                                         &sta_priv->lq_sta.lq, CMD_ASYNC, false);
2729                 }
2730                 break;
2731         case IEEE80211_AMPDU_TX_OPERATIONAL:
2732                 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2733
2734                 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2735
2736                 /*
2737                  * If the limit is 0, then it wasn't initialised yet,
2738                  * use the default. We can do that since we take the
2739                  * minimum below, and we don't want to go above our
2740                  * default due to hardware restrictions.
2741                  */
2742                 if (sta_priv->max_agg_bufsize == 0)
2743                         sta_priv->max_agg_bufsize =
2744                                 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2745
2746                 /*
2747                  * Even though in theory the peer could have different
2748                  * aggregation reorder buffer sizes for different sessions,
2749                  * our ucode doesn't allow for that and has a global limit
2750                  * for each station. Therefore, use the minimum of all the
2751                  * aggregation sessions and our default value.
2752                  */
2753                 sta_priv->max_agg_bufsize =
2754                         min(sta_priv->max_agg_bufsize, buf_size);
2755
2756                 if (priv->cfg->ht_params &&
2757                     priv->cfg->ht_params->use_rts_for_aggregation) {
2758                         /*
2759                          * switch to RTS/CTS if it is the prefer protection
2760                          * method for HT traffic
2761                          */
2762
2763                         sta_priv->lq_sta.lq.general_params.flags |=
2764                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
2765                 }
2766
2767                 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
2768                         sta_priv->max_agg_bufsize;
2769
2770                 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2771                                 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
2772                 ret = 0;
2773                 break;
2774         }
2775         mutex_unlock(&priv->mutex);
2776
2777         return ret;
2778 }
2779
2780 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
2781                               struct ieee80211_vif *vif,
2782                               struct ieee80211_sta *sta)
2783 {
2784         struct iwl_priv *priv = hw->priv;
2785         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2786         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2787         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2788         int ret;
2789         u8 sta_id;
2790
2791         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
2792                         sta->addr);
2793         mutex_lock(&priv->mutex);
2794         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2795                         sta->addr);
2796         sta_priv->common.sta_id = IWL_INVALID_STATION;
2797
2798         atomic_set(&sta_priv->pending_frames, 0);
2799         if (vif->type == NL80211_IFTYPE_AP)
2800                 sta_priv->client = true;
2801
2802         ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
2803                                      is_ap, sta, &sta_id);
2804         if (ret) {
2805                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
2806                         sta->addr, ret);
2807                 /* Should we return success if return code is EEXIST ? */
2808                 mutex_unlock(&priv->mutex);
2809                 return ret;
2810         }
2811
2812         sta_priv->common.sta_id = sta_id;
2813
2814         /* Initialize rate scaling */
2815         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
2816                        sta->addr);
2817         iwl_rs_rate_init(priv, sta, sta_id);
2818         mutex_unlock(&priv->mutex);
2819
2820         return 0;
2821 }
2822
2823 static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
2824                                 struct ieee80211_channel_switch *ch_switch)
2825 {
2826         struct iwl_priv *priv = hw->priv;
2827         const struct iwl_channel_info *ch_info;
2828         struct ieee80211_conf *conf = &hw->conf;
2829         struct ieee80211_channel *channel = ch_switch->channel;
2830         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2831         /*
2832          * MULTI-FIXME
2833          * When we add support for multiple interfaces, we need to
2834          * revisit this. The channel switch command in the device
2835          * only affects the BSS context, but what does that really
2836          * mean? And what if we get a CSA on the second interface?
2837          * This needs a lot of work.
2838          */
2839         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2840         u16 ch;
2841         unsigned long flags = 0;
2842
2843         IWL_DEBUG_MAC80211(priv, "enter\n");
2844
2845         mutex_lock(&priv->mutex);
2846
2847         if (iwl_is_rfkill(priv))
2848                 goto out;
2849
2850         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2851             test_bit(STATUS_SCANNING, &priv->status))
2852                 goto out;
2853
2854         if (!iwl_is_associated_ctx(ctx))
2855                 goto out;
2856
2857         /* channel switch in progress */
2858         if (priv->switch_rxon.switch_in_progress == true)
2859                 goto out;
2860
2861         if (priv->cfg->ops->lib->set_channel_switch) {
2862
2863                 ch = channel->hw_value;
2864                 if (le16_to_cpu(ctx->active.channel) != ch) {
2865                         ch_info = iwl_get_channel_info(priv,
2866                                                        channel->band,
2867                                                        ch);
2868                         if (!is_channel_valid(ch_info)) {
2869                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
2870                                 goto out;
2871                         }
2872                         spin_lock_irqsave(&priv->lock, flags);
2873
2874                         priv->current_ht_config.smps = conf->smps_mode;
2875
2876                         /* Configure HT40 channels */
2877                         ctx->ht.enabled = conf_is_ht(conf);
2878                         if (ctx->ht.enabled) {
2879                                 if (conf_is_ht40_minus(conf)) {
2880                                         ctx->ht.extension_chan_offset =
2881                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2882                                         ctx->ht.is_40mhz = true;
2883                                 } else if (conf_is_ht40_plus(conf)) {
2884                                         ctx->ht.extension_chan_offset =
2885                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2886                                         ctx->ht.is_40mhz = true;
2887                                 } else {
2888                                         ctx->ht.extension_chan_offset =
2889                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2890                                         ctx->ht.is_40mhz = false;
2891                                 }
2892                         } else
2893                                 ctx->ht.is_40mhz = false;
2894
2895                         if ((le16_to_cpu(ctx->staging.channel) != ch))
2896                                 ctx->staging.flags = 0;
2897
2898                         iwl_set_rxon_channel(priv, channel, ctx);
2899                         iwl_set_rxon_ht(priv, ht_conf);
2900                         iwl_set_flags_for_band(priv, ctx, channel->band,
2901                                                ctx->vif);
2902                         spin_unlock_irqrestore(&priv->lock, flags);
2903
2904                         iwl_set_rate(priv);
2905                         /*
2906                          * at this point, staging_rxon has the
2907                          * configuration for channel switch
2908                          */
2909                         if (priv->cfg->ops->lib->set_channel_switch(priv,
2910                                                                     ch_switch))
2911                                 priv->switch_rxon.switch_in_progress = false;
2912                 }
2913         }
2914 out:
2915         mutex_unlock(&priv->mutex);
2916         if (!priv->switch_rxon.switch_in_progress)
2917                 ieee80211_chswitch_done(ctx->vif, false);
2918         IWL_DEBUG_MAC80211(priv, "leave\n");
2919 }
2920
2921 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
2922                                     unsigned int changed_flags,
2923                                     unsigned int *total_flags,
2924                                     u64 multicast)
2925 {
2926         struct iwl_priv *priv = hw->priv;
2927         __le32 filter_or = 0, filter_nand = 0;
2928         struct iwl_rxon_context *ctx;
2929
2930 #define CHK(test, flag) do { \
2931         if (*total_flags & (test))              \
2932                 filter_or |= (flag);            \
2933         else                                    \
2934                 filter_nand |= (flag);          \
2935         } while (0)
2936
2937         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
2938                         changed_flags, *total_flags);
2939
2940         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
2941         /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2942         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
2943         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
2944
2945 #undef CHK
2946
2947         mutex_lock(&priv->mutex);
2948
2949         for_each_context(priv, ctx) {
2950                 ctx->staging.filter_flags &= ~filter_nand;
2951                 ctx->staging.filter_flags |= filter_or;
2952
2953                 /*
2954                  * Not committing directly because hardware can perform a scan,
2955                  * but we'll eventually commit the filter flags change anyway.
2956                  */
2957         }
2958
2959         mutex_unlock(&priv->mutex);
2960
2961         /*
2962          * Receiving all multicast frames is always enabled by the
2963          * default flags setup in iwl_connection_init_rx_config()
2964          * since we currently do not support programming multicast
2965          * filters into the device.
2966          */
2967         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
2968                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
2969 }
2970
2971 static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
2972 {
2973         struct iwl_priv *priv = hw->priv;
2974
2975         mutex_lock(&priv->mutex);
2976         IWL_DEBUG_MAC80211(priv, "enter\n");
2977
2978         /* do not support "flush" */
2979         if (!priv->cfg->ops->lib->txfifo_flush)
2980                 goto done;
2981
2982         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2983                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
2984                 goto done;
2985         }
2986         if (iwl_is_rfkill(priv)) {
2987                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
2988                 goto done;
2989         }
2990
2991         /*
2992          * mac80211 will not push any more frames for transmit
2993          * until the flush is completed
2994          */
2995         if (drop) {
2996                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
2997                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
2998                         IWL_ERR(priv, "flush request fail\n");
2999                         goto done;
3000                 }
3001         }
3002         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3003         iwlagn_wait_tx_queue_empty(priv);
3004 done:
3005         mutex_unlock(&priv->mutex);
3006         IWL_DEBUG_MAC80211(priv, "leave\n");
3007 }
3008
3009 static void iwlagn_disable_roc(struct iwl_priv *priv)
3010 {
3011         struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3012         struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3013
3014         lockdep_assert_held(&priv->mutex);
3015
3016         if (!ctx->is_active)
3017                 return;
3018
3019         ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3020         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3021         iwl_set_rxon_channel(priv, chan, ctx);
3022         iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3023
3024         priv->_agn.hw_roc_channel = NULL;
3025
3026         iwlcore_commit_rxon(priv, ctx);
3027
3028         ctx->is_active = false;
3029 }
3030
3031 static void iwlagn_bg_roc_done(struct work_struct *work)
3032 {
3033         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3034                                              _agn.hw_roc_work.work);
3035
3036         mutex_lock(&priv->mutex);
3037         ieee80211_remain_on_channel_expired(priv->hw);
3038         iwlagn_disable_roc(priv);
3039         mutex_unlock(&priv->mutex);
3040 }
3041
3042 static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3043                                      struct ieee80211_channel *channel,
3044                                      enum nl80211_channel_type channel_type,
3045                                      int duration)
3046 {
3047         struct iwl_priv *priv = hw->priv;
3048         int err = 0;
3049
3050         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3051                 return -EOPNOTSUPP;
3052
3053         if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3054                                         BIT(NL80211_IFTYPE_P2P_CLIENT)))
3055                 return -EOPNOTSUPP;
3056
3057         mutex_lock(&priv->mutex);
3058
3059         if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3060             test_bit(STATUS_SCAN_HW, &priv->status)) {
3061                 err = -EBUSY;
3062                 goto out;
3063         }
3064
3065         priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3066         priv->_agn.hw_roc_channel = channel;
3067         priv->_agn.hw_roc_chantype = channel_type;
3068         priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3069         iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3070         queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3071                            msecs_to_jiffies(duration + 20));
3072
3073         msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3074         ieee80211_ready_on_channel(priv->hw);
3075
3076  out:
3077         mutex_unlock(&priv->mutex);
3078
3079         return err;
3080 }
3081
3082 static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3083 {
3084         struct iwl_priv *priv = hw->priv;
3085
3086         if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3087                 return -EOPNOTSUPP;
3088
3089         cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3090
3091         mutex_lock(&priv->mutex);
3092         iwlagn_disable_roc(priv);
3093         mutex_unlock(&priv->mutex);
3094
3095         return 0;
3096 }
3097
3098 /*****************************************************************************
3099  *
3100  * driver setup and teardown
3101  *
3102  *****************************************************************************/
3103
3104 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3105 {
3106         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3107
3108         init_waitqueue_head(&priv->wait_command_queue);
3109
3110         INIT_WORK(&priv->restart, iwl_bg_restart);
3111         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3112         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3113         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3114         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3115         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3116         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3117         INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3118
3119         iwl_setup_scan_deferred_work(priv);
3120
3121         if (priv->cfg->ops->lib->setup_deferred_work)
3122                 priv->cfg->ops->lib->setup_deferred_work(priv);
3123
3124         init_timer(&priv->statistics_periodic);
3125         priv->statistics_periodic.data = (unsigned long)priv;
3126         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3127
3128         init_timer(&priv->ucode_trace);
3129         priv->ucode_trace.data = (unsigned long)priv;
3130         priv->ucode_trace.function = iwl_bg_ucode_trace;
3131
3132         init_timer(&priv->watchdog);
3133         priv->watchdog.data = (unsigned long)priv;
3134         priv->watchdog.function = iwl_bg_watchdog;
3135
3136         tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3137                 iwl_irq_tasklet, (unsigned long)priv);
3138 }
3139
3140 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3141 {
3142         if (priv->cfg->ops->lib->cancel_deferred_work)
3143                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3144
3145         cancel_work_sync(&priv->run_time_calib_work);
3146         cancel_work_sync(&priv->beacon_update);
3147
3148         iwl_cancel_scan_deferred_work(priv);
3149
3150         cancel_work_sync(&priv->bt_full_concurrency);
3151         cancel_work_sync(&priv->bt_runtime_config);
3152
3153         del_timer_sync(&priv->statistics_periodic);
3154         del_timer_sync(&priv->ucode_trace);
3155 }
3156
3157 static void iwl_init_hw_rates(struct iwl_priv *priv,
3158                               struct ieee80211_rate *rates)
3159 {
3160         int i;
3161
3162         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3163                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3164                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3165                 rates[i].hw_value_short = i;
3166                 rates[i].flags = 0;
3167                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3168                         /*
3169                          * If CCK != 1M then set short preamble rate flag.
3170                          */
3171                         rates[i].flags |=
3172                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3173                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3174                 }
3175         }
3176 }
3177
3178 static int iwl_init_drv(struct iwl_priv *priv)
3179 {
3180         int ret;
3181
3182         spin_lock_init(&priv->sta_lock);
3183         spin_lock_init(&priv->hcmd_lock);
3184
3185         mutex_init(&priv->mutex);
3186
3187         priv->ieee_channels = NULL;
3188         priv->ieee_rates = NULL;
3189         priv->band = IEEE80211_BAND_2GHZ;
3190
3191         priv->iw_mode = NL80211_IFTYPE_STATION;
3192         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3193         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3194         priv->_agn.agg_tids_count = 0;
3195
3196         /* initialize force reset */
3197         priv->force_reset[IWL_RF_RESET].reset_duration =
3198                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3199         priv->force_reset[IWL_FW_RESET].reset_duration =
3200                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3201
3202         priv->rx_statistics_jiffies = jiffies;
3203
3204         /* Choose which receivers/antennas to use */
3205         if (priv->cfg->ops->hcmd->set_rxon_chain)
3206                 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3207                                         &priv->contexts[IWL_RXON_CTX_BSS]);
3208
3209         iwl_init_scan_params(priv);
3210
3211         /* init bt coex */
3212         if (priv->cfg->bt_params &&
3213             priv->cfg->bt_params->advanced_bt_coexist) {
3214                 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3215                 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3216                 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3217                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3218                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3219                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3220         }
3221
3222         ret = iwl_init_channel_map(priv);
3223         if (ret) {
3224                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3225                 goto err;
3226         }
3227
3228         ret = iwlcore_init_geos(priv);
3229         if (ret) {
3230                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3231                 goto err_free_channel_map;
3232         }
3233         iwl_init_hw_rates(priv, priv->ieee_rates);
3234
3235         return 0;
3236
3237 err_free_channel_map:
3238         iwl_free_channel_map(priv);
3239 err:
3240         return ret;
3241 }
3242
3243 static void iwl_uninit_drv(struct iwl_priv *priv)
3244 {
3245         iwl_calib_free_results(priv);
3246         iwlcore_free_geos(priv);
3247         iwl_free_channel_map(priv);
3248         kfree(priv->scan_cmd);
3249 }
3250
3251 struct ieee80211_ops iwlagn_hw_ops = {
3252         .tx = iwlagn_mac_tx,
3253         .start = iwlagn_mac_start,
3254         .stop = iwlagn_mac_stop,
3255         .add_interface = iwl_mac_add_interface,
3256         .remove_interface = iwl_mac_remove_interface,
3257         .change_interface = iwl_mac_change_interface,
3258         .config = iwlagn_mac_config,
3259         .configure_filter = iwlagn_configure_filter,
3260         .set_key = iwlagn_mac_set_key,
3261         .update_tkip_key = iwlagn_mac_update_tkip_key,
3262         .conf_tx = iwl_mac_conf_tx,
3263         .bss_info_changed = iwlagn_bss_info_changed,
3264         .ampdu_action = iwlagn_mac_ampdu_action,
3265         .hw_scan = iwl_mac_hw_scan,
3266         .sta_notify = iwlagn_mac_sta_notify,
3267         .sta_add = iwlagn_mac_sta_add,
3268         .sta_remove = iwl_mac_sta_remove,
3269         .channel_switch = iwlagn_mac_channel_switch,
3270         .flush = iwlagn_mac_flush,
3271         .tx_last_beacon = iwl_mac_tx_last_beacon,
3272         .remain_on_channel = iwl_mac_remain_on_channel,
3273         .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3274         .offchannel_tx = iwl_mac_offchannel_tx,
3275         .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3276         CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
3277 };
3278
3279 static u32 iwl_hw_detect(struct iwl_priv *priv)
3280 {
3281         u8 rev_id;
3282
3283         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3284         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3285         return iwl_read32(priv, CSR_HW_REV);
3286 }
3287
3288 static int iwl_set_hw_params(struct iwl_priv *priv)
3289 {
3290         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3291         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3292         if (iwlagn_mod_params.amsdu_size_8K)
3293                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3294         else
3295                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3296
3297         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3298
3299         if (iwlagn_mod_params.disable_11n)
3300                 priv->cfg->sku &= ~IWL_SKU_N;
3301
3302         /* Device-specific setup */
3303         return priv->cfg->ops->lib->set_hw_params(priv);
3304 }
3305
3306 static const u8 iwlagn_bss_ac_to_fifo[] = {
3307         IWL_TX_FIFO_VO,
3308         IWL_TX_FIFO_VI,
3309         IWL_TX_FIFO_BE,
3310         IWL_TX_FIFO_BK,
3311 };
3312
3313 static const u8 iwlagn_bss_ac_to_queue[] = {
3314         0, 1, 2, 3,
3315 };
3316
3317 static const u8 iwlagn_pan_ac_to_fifo[] = {
3318         IWL_TX_FIFO_VO_IPAN,
3319         IWL_TX_FIFO_VI_IPAN,
3320         IWL_TX_FIFO_BE_IPAN,
3321         IWL_TX_FIFO_BK_IPAN,
3322 };
3323
3324 static const u8 iwlagn_pan_ac_to_queue[] = {
3325         7, 6, 5, 4,
3326 };
3327
3328 /* This function both allocates and initializes hw and priv. */
3329 static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3330 {
3331         struct iwl_priv *priv;
3332         /* mac80211 allocates memory for this device instance, including
3333          *   space for this driver's private structure */
3334         struct ieee80211_hw *hw;
3335
3336         hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3337         if (hw == NULL) {
3338                 pr_err("%s: Can not allocate network device\n",
3339                        cfg->name);
3340                 goto out;
3341         }
3342
3343         priv = hw->priv;
3344         priv->hw = hw;
3345
3346 out:
3347         return hw;
3348 }
3349
3350 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3351 {
3352         int err = 0, i;
3353         struct iwl_priv *priv;
3354         struct ieee80211_hw *hw;
3355         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3356         unsigned long flags;
3357         u16 pci_cmd, num_mac;
3358         u32 hw_rev;
3359
3360         /************************
3361          * 1. Allocating HW data
3362          ************************/
3363
3364         hw = iwl_alloc_all(cfg);
3365         if (!hw) {
3366                 err = -ENOMEM;
3367                 goto out;
3368         }
3369         priv = hw->priv;
3370         /* At this point both hw and priv are allocated. */
3371
3372         priv->ucode_type = UCODE_SUBTYPE_NONE_LOADED;
3373
3374         /*
3375          * The default context is always valid,
3376          * more may be discovered when firmware
3377          * is loaded.
3378          */
3379         priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3380
3381         for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3382                 priv->contexts[i].ctxid = i;
3383
3384         priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3385         priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3386         priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3387         priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3388         priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3389         priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3390         priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3391         priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3392         priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3393         priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3394         priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3395                 BIT(NL80211_IFTYPE_ADHOC);
3396         priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3397                 BIT(NL80211_IFTYPE_STATION);
3398         priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3399         priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3400         priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3401         priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3402
3403         priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3404         priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3405         priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3406         priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3407         priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3408         priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3409         priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3410         priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3411         priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3412         priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3413         priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3414         priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3415                 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3416 #ifdef CONFIG_IWL_P2P
3417         priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3418                 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3419 #endif
3420         priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3421         priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3422         priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3423
3424         BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3425
3426         SET_IEEE80211_DEV(hw, &pdev->dev);
3427
3428         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3429         priv->cfg = cfg;
3430         priv->pci_dev = pdev;
3431         priv->inta_mask = CSR_INI_SET_MASK;
3432
3433         /* is antenna coupling more than 35dB ? */
3434         priv->bt_ant_couple_ok =
3435                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3436                 true : false;
3437
3438         /* enable/disable bt channel inhibition */
3439         priv->bt_ch_announce = iwlagn_bt_ch_announce;
3440         IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3441                        (priv->bt_ch_announce) ? "On" : "Off");
3442
3443         if (iwl_alloc_traffic_mem(priv))
3444                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3445
3446         /**************************
3447          * 2. Initializing PCI bus
3448          **************************/
3449         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3450                                 PCIE_LINK_STATE_CLKPM);
3451
3452         if (pci_enable_device(pdev)) {
3453                 err = -ENODEV;
3454                 goto out_ieee80211_free_hw;
3455         }
3456
3457         pci_set_master(pdev);
3458
3459         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3460         if (!err)
3461                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3462         if (err) {
3463                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3464                 if (!err)
3465                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3466                 /* both attempts failed: */
3467                 if (err) {
3468                         IWL_WARN(priv, "No suitable DMA available.\n");
3469                         goto out_pci_disable_device;
3470                 }
3471         }
3472
3473         err = pci_request_regions(pdev, DRV_NAME);
3474         if (err)
3475                 goto out_pci_disable_device;
3476
3477         pci_set_drvdata(pdev, priv);
3478
3479
3480         /***********************
3481          * 3. Read REV register
3482          ***********************/
3483         priv->hw_base = pci_iomap(pdev, 0, 0);
3484         if (!priv->hw_base) {
3485                 err = -ENODEV;
3486                 goto out_pci_release_regions;
3487         }
3488
3489         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3490                 (unsigned long long) pci_resource_len(pdev, 0));
3491         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3492
3493         /* these spin locks will be used in apm_ops.init and EEPROM access
3494          * we should init now
3495          */
3496         spin_lock_init(&priv->reg_lock);
3497         spin_lock_init(&priv->lock);
3498
3499         /*
3500          * stop and reset the on-board processor just in case it is in a
3501          * strange state ... like being left stranded by a primary kernel
3502          * and this is now the kdump kernel trying to start up
3503          */
3504         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3505
3506         hw_rev = iwl_hw_detect(priv);
3507         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3508                 priv->cfg->name, hw_rev);
3509
3510         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3511          * PCI Tx retries from interfering with C3 CPU state */
3512         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3513
3514         if (iwl_prepare_card_hw(priv)) {
3515                 IWL_WARN(priv, "Failed, HW not ready\n");
3516                 goto out_iounmap;
3517         }
3518
3519         /*****************
3520          * 4. Read EEPROM
3521          *****************/
3522         /* Read the EEPROM */
3523         err = iwl_eeprom_init(priv, hw_rev);
3524         if (err) {
3525                 IWL_ERR(priv, "Unable to init EEPROM\n");
3526                 goto out_iounmap;
3527         }
3528         err = iwl_eeprom_check_version(priv);
3529         if (err)
3530                 goto out_free_eeprom;
3531
3532         err = iwl_eeprom_check_sku(priv);
3533         if (err)
3534                 goto out_free_eeprom;
3535
3536         /* extract MAC Address */
3537         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
3538         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
3539         priv->hw->wiphy->addresses = priv->addresses;
3540         priv->hw->wiphy->n_addresses = 1;
3541         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
3542         if (num_mac > 1) {
3543                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
3544                        ETH_ALEN);
3545                 priv->addresses[1].addr[5]++;
3546                 priv->hw->wiphy->n_addresses++;
3547         }
3548
3549         /************************
3550          * 5. Setup HW constants
3551          ************************/
3552         if (iwl_set_hw_params(priv)) {
3553                 IWL_ERR(priv, "failed to set hw parameters\n");
3554                 goto out_free_eeprom;
3555         }
3556
3557         /*******************
3558          * 6. Setup priv
3559          *******************/
3560
3561         err = iwl_init_drv(priv);
3562         if (err)
3563                 goto out_free_eeprom;
3564         /* At this point both hw and priv are initialized. */
3565
3566         /********************
3567          * 7. Setup services
3568          ********************/
3569         spin_lock_irqsave(&priv->lock, flags);
3570         iwl_disable_interrupts(priv);
3571         spin_unlock_irqrestore(&priv->lock, flags);
3572
3573         pci_enable_msi(priv->pci_dev);
3574
3575         iwl_alloc_isr_ict(priv);
3576
3577         err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
3578                           IRQF_SHARED, DRV_NAME, priv);
3579         if (err) {
3580                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3581                 goto out_disable_msi;
3582         }
3583
3584         iwl_setup_deferred_work(priv);
3585         iwl_setup_rx_handlers(priv);
3586         iwl_testmode_init(priv);
3587
3588         /*********************************************
3589          * 8. Enable interrupts and read RFKILL state
3590          *********************************************/
3591
3592         /* enable rfkill interrupt: hw bug w/a */
3593         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3594         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3595                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3596                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3597         }
3598
3599         iwl_enable_rfkill_int(priv);
3600
3601         /* If platform's RF_KILL switch is NOT set to KILL */
3602         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3603                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3604         else
3605                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3606
3607         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3608                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3609
3610         iwl_power_initialize(priv);
3611         iwl_tt_initialize(priv);
3612
3613         init_completion(&priv->_agn.firmware_loading_complete);
3614
3615         err = iwl_request_firmware(priv, true);
3616         if (err)
3617                 goto out_destroy_workqueue;
3618
3619         return 0;
3620
3621  out_destroy_workqueue:
3622         destroy_workqueue(priv->workqueue);
3623         priv->workqueue = NULL;
3624         free_irq(priv->pci_dev->irq, priv);
3625         iwl_free_isr_ict(priv);
3626  out_disable_msi:
3627         pci_disable_msi(priv->pci_dev);
3628         iwl_uninit_drv(priv);
3629  out_free_eeprom:
3630         iwl_eeprom_free(priv);
3631  out_iounmap:
3632         pci_iounmap(pdev, priv->hw_base);
3633  out_pci_release_regions:
3634         pci_set_drvdata(pdev, NULL);
3635         pci_release_regions(pdev);
3636  out_pci_disable_device:
3637         pci_disable_device(pdev);
3638  out_ieee80211_free_hw:
3639         iwl_free_traffic_mem(priv);
3640         ieee80211_free_hw(priv->hw);
3641  out:
3642         return err;
3643 }
3644
3645 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3646 {
3647         struct iwl_priv *priv = pci_get_drvdata(pdev);
3648         unsigned long flags;
3649
3650         if (!priv)
3651                 return;
3652
3653         wait_for_completion(&priv->_agn.firmware_loading_complete);
3654
3655         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3656
3657         iwl_dbgfs_unregister(priv);
3658         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3659
3660         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3661          * to be called and iwl_down since we are removing the device
3662          * we need to set STATUS_EXIT_PENDING bit.
3663          */
3664         set_bit(STATUS_EXIT_PENDING, &priv->status);
3665
3666         iwl_leds_exit(priv);
3667
3668         if (priv->mac80211_registered) {
3669                 ieee80211_unregister_hw(priv->hw);
3670                 priv->mac80211_registered = 0;
3671         }
3672
3673         /* Reset to low power before unloading driver. */
3674         iwl_apm_stop(priv);
3675
3676         iwl_tt_exit(priv);
3677
3678         /* make sure we flush any pending irq or
3679          * tasklet for the driver
3680          */
3681         spin_lock_irqsave(&priv->lock, flags);
3682         iwl_disable_interrupts(priv);
3683         spin_unlock_irqrestore(&priv->lock, flags);
3684
3685         iwl_synchronize_irq(priv);
3686
3687         iwl_dealloc_ucode_pci(priv);
3688
3689         if (priv->rxq.bd)
3690                 iwlagn_rx_queue_free(priv, &priv->rxq);
3691         iwlagn_hw_txq_ctx_free(priv);
3692
3693         iwl_eeprom_free(priv);
3694
3695
3696         /*netif_stop_queue(dev); */
3697         flush_workqueue(priv->workqueue);
3698
3699         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3700          * priv->workqueue... so we can't take down the workqueue
3701          * until now... */
3702         destroy_workqueue(priv->workqueue);
3703         priv->workqueue = NULL;
3704         iwl_free_traffic_mem(priv);
3705
3706         free_irq(priv->pci_dev->irq, priv);
3707         pci_disable_msi(priv->pci_dev);
3708         pci_iounmap(pdev, priv->hw_base);
3709         pci_release_regions(pdev);
3710         pci_disable_device(pdev);
3711         pci_set_drvdata(pdev, NULL);
3712
3713         iwl_uninit_drv(priv);
3714
3715         iwl_free_isr_ict(priv);
3716
3717         dev_kfree_skb(priv->beacon_skb);
3718
3719         ieee80211_free_hw(priv->hw);
3720 }
3721
3722
3723 /*****************************************************************************
3724  *
3725  * driver and module entry point
3726  *
3727  *****************************************************************************/
3728
3729 /* Hardware specific file defines the PCI IDs table for that hardware module */
3730 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3731         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3732         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3733         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3734         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3735         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3736         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3737         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3738         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3739         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3740         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3741         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3742         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3743         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3744         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3745         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3746         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3747         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3748         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3749         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3750         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3751         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3752         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3753         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3754         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3755
3756 /* 5300 Series WiFi */
3757         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3758         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3759         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3760         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3761         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3762         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3763         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3764         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3765         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3766         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3767         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3768         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3769
3770 /* 5350 Series WiFi/WiMax */
3771         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3772         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3773         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3774
3775 /* 5150 Series Wifi/WiMax */
3776         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3777         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3778         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3779         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3780         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3781         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3782
3783         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3784         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3785         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3786         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3787
3788 /* 6x00 Series */
3789         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3790         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3791         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3792         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3793         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3794         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3795         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3796         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3797         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3798         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3799
3800 /* 6x05 Series */
3801         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
3802         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
3803         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
3804         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
3805         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
3806         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
3807         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
3808
3809 /* 6x30 Series */
3810         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
3811         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
3812         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
3813         {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
3814         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
3815         {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
3816         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
3817         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
3818         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
3819         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
3820         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
3821         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
3822         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
3823         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
3824         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
3825         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
3826
3827 /* 6x50 WiFi/WiMax Series */
3828         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3829         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3830         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3831         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3832         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3833         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3834
3835 /* 6150 WiFi/WiMax Series */
3836         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
3837         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6150_bgn_cfg)},
3838         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
3839         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6150_bgn_cfg)},
3840         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
3841         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6150_bgn_cfg)},
3842
3843 /* 1000 Series WiFi */
3844         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3845         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3846         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3847         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3848         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3849         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3850         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3851         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3852         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3853         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3854         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3855         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3856
3857 /* 100 Series WiFi */
3858         {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
3859         {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
3860         {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
3861         {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
3862         {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
3863         {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
3864
3865 /* 130 Series WiFi */
3866         {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
3867         {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
3868         {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
3869         {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
3870         {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
3871         {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
3872
3873 /* 2x00 Series */
3874         {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
3875         {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
3876         {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
3877         {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
3878         {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
3879         {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
3880
3881 /* 2x30 Series */
3882         {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
3883         {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
3884         {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
3885         {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
3886         {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
3887         {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
3888
3889 /* 6x35 Series */
3890         {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
3891         {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
3892         {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
3893         {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
3894         {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
3895         {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
3896         {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
3897         {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
3898         {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
3899
3900 /* 105 Series */
3901         {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
3902         {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
3903         {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
3904         {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
3905         {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
3906         {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
3907
3908 /* 135 Series */
3909         {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
3910         {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
3911         {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
3912         {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
3913         {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
3914         {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
3915
3916         {0}
3917 };
3918 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3919
3920 static struct pci_driver iwl_driver = {
3921         .name = DRV_NAME,
3922         .id_table = iwl_hw_card_ids,
3923         .probe = iwl_pci_probe,
3924         .remove = __devexit_p(iwl_pci_remove),
3925         .driver.pm = IWL_PM_OPS,
3926 };
3927
3928 static int __init iwl_init(void)
3929 {
3930
3931         int ret;
3932         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3933         pr_info(DRV_COPYRIGHT "\n");
3934
3935         ret = iwlagn_rate_control_register();
3936         if (ret) {
3937                 pr_err("Unable to register rate control algorithm: %d\n", ret);
3938                 return ret;
3939         }
3940
3941         ret = pci_register_driver(&iwl_driver);
3942         if (ret) {
3943                 pr_err("Unable to initialize PCI module\n");
3944                 goto error_register;
3945         }
3946
3947         return ret;
3948
3949 error_register:
3950         iwlagn_rate_control_unregister();
3951         return ret;
3952 }
3953
3954 static void __exit iwl_exit(void)
3955 {
3956         pci_unregister_driver(&iwl_driver);
3957         iwlagn_rate_control_unregister();
3958 }
3959
3960 module_exit(iwl_exit);
3961 module_init(iwl_init);
3962
3963 #ifdef CONFIG_IWLWIFI_DEBUG
3964 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3965 MODULE_PARM_DESC(debug, "debug output mask");
3966 #endif
3967
3968 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3969 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3970 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3971 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3972 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3973 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3974 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3975                    int, S_IRUGO);
3976 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3977 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3978 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3979
3980 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
3981                    S_IRUGO);
3982 MODULE_PARM_DESC(ucode_alternative,
3983                  "specify ucode alternative to use from ucode file");
3984
3985 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
3986 MODULE_PARM_DESC(antenna_coupling,
3987                  "specify antenna coupling in dB (defualt: 0 dB)");
3988
3989 module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
3990 MODULE_PARM_DESC(bt_ch_inhibition,
3991                  "Disable BT channel inhibition (default: enable)");
3992
3993 module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
3994 MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
3995
3996 module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
3997 MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");