1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/mac80211.h>
45 #include <asm/div64.h>
47 #define DRV_NAME "iwlagn"
49 #include "iwl-eeprom.h"
53 #include "iwl-helpers.h"
55 #include "iwl-calib.h"
58 /******************************************************************************
62 ******************************************************************************/
65 * module name, copyright, version, etc.
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69 #ifdef CONFIG_IWLWIFI_DEBUG
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
95 /**************************************************************/
98 * iwl_commit_rxon - commit staging_rxon to hardware
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
105 int iwl_commit_rxon(struct iwl_priv *priv)
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113 if (!iwl_is_alive(priv))
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119 ret = iwl_check_rxon_cmd(priv);
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 /* station table will be cleared */
140 priv->assoc_station_added = 0;
142 /* If we are currently associated and the new config requires
143 * an RXON_ASSOC and the new config wants the associated mask enabled,
144 * we must clear the associated from the active configuration
145 * before we apply the new config */
146 if (iwl_is_associated(priv) && new_assoc) {
147 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
150 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151 sizeof(struct iwl_rxon_cmd),
154 /* If the mask clearing failed then we set
155 * active_rxon back to what it was previously */
157 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
171 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode, send it before
175 * we add the bcast station. If assoc bit is set, we will send RXON
176 * after having added the bcast and bssid station.
179 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
182 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
188 iwl_clear_stations_table(priv);
190 priv->start_calib = 0;
192 /* Add the broadcast address so we can send broadcast frames */
193 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194 IWL_INVALID_STATION) {
195 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
199 /* If we have set the ASSOC_MSK and we are in BSS mode then
200 * add the IWL_AP_ID to the station rate table */
202 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203 ret = iwl_rxon_add_station(priv,
204 priv->active_rxon.bssid_addr, 1);
205 if (ret == IWL_INVALID_STATION) {
207 "Error adding AP address for TX.\n");
210 priv->assoc_station_added = 1;
211 if (priv->default_wep_key &&
212 iwl_send_static_wepkey_cmd(priv, 0))
214 "Could not send WEP static key.\n");
218 * allow CTS-to-self if possible for new association.
219 * this is relevant only for 5000 series and up,
220 * but will not damage 4965
222 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
224 /* Apply the new configuration
225 * RXON assoc doesn't clear the station table in uCode,
227 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
230 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
233 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
236 iwl_init_sensitivity(priv);
238 /* If we issue a new RXON command which required a tune then we must
239 * send a new TXPOWER command or we won't be able to Tx any frames */
240 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
242 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
249 void iwl_update_chain_flags(struct iwl_priv *priv)
252 if (priv->cfg->ops->hcmd->set_rxon_chain)
253 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254 iwlcore_commit_rxon(priv);
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
259 struct list_head *element;
261 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
264 while (!list_empty(&priv->free_frames)) {
265 element = priv->free_frames.next;
267 kfree(list_entry(element, struct iwl_frame, list));
268 priv->frames_count--;
271 if (priv->frames_count) {
272 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
274 priv->frames_count = 0;
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
280 struct iwl_frame *frame;
281 struct list_head *element;
282 if (list_empty(&priv->free_frames)) {
283 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
285 IWL_ERR(priv, "Could not allocate frame!\n");
289 priv->frames_count++;
293 element = priv->free_frames.next;
295 return list_entry(element, struct iwl_frame, list);
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
300 memset(frame, 0, sizeof(*frame));
301 list_add(&frame->list, &priv->free_frames);
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305 struct ieee80211_hdr *hdr,
308 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310 (priv->iw_mode != NL80211_IFTYPE_AP)))
313 if (priv->ibss_beacon->len > left)
316 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
318 return priv->ibss_beacon->len;
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322 struct iwl_frame *frame, u8 rate)
324 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325 unsigned int frame_size;
327 tx_beacon_cmd = &frame->u.beacon;
328 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
330 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
333 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
336 BUG_ON(frame_size > MAX_MPDU_SIZE);
337 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
339 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340 tx_beacon_cmd->tx.rate_n_flags =
341 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
343 tx_beacon_cmd->tx.rate_n_flags =
344 iwl_hw_set_rate_n_flags(rate, 0);
346 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
348 TX_CMD_FLG_STA_RATE_MSK;
350 return sizeof(*tx_beacon_cmd) + frame_size;
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
354 struct iwl_frame *frame;
355 unsigned int frame_size;
359 frame = iwl_get_free_frame(priv);
362 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
367 rate = iwl_rate_get_lowest_plcp(priv);
369 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
371 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
374 iwl_free_frame(priv, frame);
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
381 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
383 dma_addr_t addr = get_unaligned_le32(&tb->lo);
384 if (sizeof(dma_addr_t) > sizeof(u32))
386 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
393 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
395 return le16_to_cpu(tb->hi_n_len) >> 4;
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399 dma_addr_t addr, u16 len)
401 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402 u16 hi_n_len = len << 4;
404 put_unaligned_le32(addr, &tb->lo);
405 if (sizeof(dma_addr_t) > sizeof(u32))
406 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
408 tb->hi_n_len = cpu_to_le16(hi_n_len);
410 tfd->num_tbs = idx + 1;
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
415 return tfd->num_tbs & 0x1f;
419 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420 * @priv - driver private data
423 * Does NOT advance any TFD circular buffer read/write indexes
424 * Does NOT free the TFD itself (which is within circular buffer)
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
428 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
430 struct pci_dev *dev = priv->pci_dev;
431 int index = txq->q.read_ptr;
435 tfd = &tfd_tmp[index];
437 /* Sanity check on number of chunks */
438 num_tbs = iwl_tfd_get_num_tbs(tfd);
440 if (num_tbs >= IWL_NUM_OF_TBS) {
441 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442 /* @todo issue fatal error, it is quite serious situation */
448 pci_unmap_single(dev,
449 pci_unmap_addr(&txq->meta[index], mapping),
450 pci_unmap_len(&txq->meta[index], len),
451 PCI_DMA_BIDIRECTIONAL);
453 /* Unmap chunks, if any. */
454 for (i = 1; i < num_tbs; i++) {
455 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
459 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466 struct iwl_tx_queue *txq,
467 dma_addr_t addr, u16 len,
471 struct iwl_tfd *tfd, *tfd_tmp;
475 tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 tfd = &tfd_tmp[q->write_ptr];
479 memset(tfd, 0, sizeof(*tfd));
481 num_tbs = iwl_tfd_get_num_tbs(tfd);
483 /* Each TFD can point to a maximum 20 Tx buffers */
484 if (num_tbs >= IWL_NUM_OF_TBS) {
485 IWL_ERR(priv, "Error can not send more than %d chunks\n",
490 BUG_ON(addr & ~DMA_BIT_MASK(36));
491 if (unlikely(addr & ~IWL_TX_DMA_MASK))
492 IWL_ERR(priv, "Unaligned address = %llx\n",
493 (unsigned long long)addr);
495 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
501 * Tell nic where to find circular buffer of Tx Frame Descriptors for
502 * given Tx queue, and enable the DMA channel used for that queue.
504 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505 * channels supported in hardware.
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508 struct iwl_tx_queue *txq)
510 int txq_id = txq->q.id;
512 /* Circular buffer (TFD queue in DRAM) physical base address */
513 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514 txq->q.dma_addr >> 8);
519 /******************************************************************************
521 * Generic RX handler implementations
523 ******************************************************************************/
524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
525 struct iwl_rx_mem_buffer *rxb)
527 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
528 struct iwl_alive_resp *palive;
529 struct delayed_work *pwork;
531 palive = &pkt->u.alive_frame;
533 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
535 palive->is_valid, palive->ver_type,
536 palive->ver_subtype);
538 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
539 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
540 memcpy(&priv->card_alive_init,
542 sizeof(struct iwl_init_alive_resp));
543 pwork = &priv->init_alive_start;
545 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
546 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547 sizeof(struct iwl_alive_resp));
548 pwork = &priv->alive_start;
551 /* We delay the ALIVE response by 5ms to
552 * give the HW RF Kill time to activate... */
553 if (palive->is_valid == UCODE_VALID_OK)
554 queue_delayed_work(priv->workqueue, pwork,
555 msecs_to_jiffies(5));
557 IWL_WARN(priv, "uCode did not respond OK.\n");
560 static void iwl_bg_beacon_update(struct work_struct *work)
562 struct iwl_priv *priv =
563 container_of(work, struct iwl_priv, beacon_update);
564 struct sk_buff *beacon;
566 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
570 IWL_ERR(priv, "update beacon failed\n");
574 mutex_lock(&priv->mutex);
575 /* new beacon skb is allocated every time; dispose previous.*/
576 if (priv->ibss_beacon)
577 dev_kfree_skb(priv->ibss_beacon);
579 priv->ibss_beacon = beacon;
580 mutex_unlock(&priv->mutex);
582 iwl_send_beacon_cmd(priv);
586 * iwl_bg_statistics_periodic - Timer callback to queue statistics
588 * This callback is provided in order to send a statistics request.
590 * This timer function is continually reset to execute within
591 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592 * was received. We need to ensure we receive the statistics in order
593 * to update the temperature used for calibrating the TXPOWER.
595 static void iwl_bg_statistics_periodic(unsigned long data)
597 struct iwl_priv *priv = (struct iwl_priv *)data;
599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
602 /* dont send host command if rf-kill is on */
603 if (!iwl_is_ready_rf(priv))
606 iwl_send_statistics_request(priv, CMD_ASYNC);
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610 struct iwl_rx_mem_buffer *rxb)
612 #ifdef CONFIG_IWLWIFI_DEBUG
613 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
614 struct iwl4965_beacon_notif *beacon =
615 (struct iwl4965_beacon_notif *)pkt->u.raw;
616 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
618 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619 "tsf %d %d rate %d\n",
620 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621 beacon->beacon_notify_hdr.failure_frame,
622 le32_to_cpu(beacon->ibss_mgr_status),
623 le32_to_cpu(beacon->high_tsf),
624 le32_to_cpu(beacon->low_tsf), rate);
627 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629 queue_work(priv->workqueue, &priv->beacon_update);
632 /* Handle notification from uCode that card's power state is changing
633 * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635 struct iwl_rx_mem_buffer *rxb)
637 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
638 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639 unsigned long status = priv->status;
641 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
645 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
648 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
651 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
654 if (!(flags & RXON_CARD_DISABLED)) {
655 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
660 if (flags & RF_CARD_DISABLED)
661 iwl_tt_enter_ct_kill(priv);
663 if (!(flags & RF_CARD_DISABLED))
664 iwl_tt_exit_ct_kill(priv);
666 if (flags & HW_CARD_DISABLED)
667 set_bit(STATUS_RF_KILL_HW, &priv->status);
669 clear_bit(STATUS_RF_KILL_HW, &priv->status);
672 if (!(flags & RXON_CARD_DISABLED))
673 iwl_scan_cancel(priv);
675 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676 test_bit(STATUS_RF_KILL_HW, &priv->status)))
677 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678 test_bit(STATUS_RF_KILL_HW, &priv->status));
680 wake_up_interruptible(&priv->wait_command_queue);
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
685 if (src == IWL_PWR_SRC_VAUX) {
686 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689 ~APMG_PS_CTRL_MSK_PWR_SRC);
691 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693 ~APMG_PS_CTRL_MSK_PWR_SRC);
700 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
702 * Setup the RX handlers for each of the reply types sent from the uCode
705 * This function chains into the hardware specific files for them to setup
706 * any hardware specific handlers as well.
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
710 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715 iwl_rx_pm_debug_statistics_notif;
716 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
719 * The same handler is used for both the REPLY to a discrete
720 * statistics request from the host as well as for the periodic
721 * statistics notifications (after received beacons) from the uCode.
723 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
726 iwl_setup_spectrum_handlers(priv);
727 iwl_setup_rx_scan_handlers(priv);
729 /* status change handler */
730 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
732 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733 iwl_rx_missed_beacon_notif;
735 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
738 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739 /* Set up hardware specific Rx handlers */
740 priv->cfg->ops->lib->rx_handler_setup(priv);
744 * iwl_rx_handle - Main entry function for receiving responses from uCode
746 * Uses the priv->rx_handlers callback function array to invoke
747 * the appropriate handlers, including command responses,
748 * frame-received notifications, and other notifications.
750 void iwl_rx_handle(struct iwl_priv *priv)
752 struct iwl_rx_mem_buffer *rxb;
753 struct iwl_rx_packet *pkt;
754 struct iwl_rx_queue *rxq = &priv->rxq;
762 /* uCode's read index (stored in shared DRAM) indicates the last Rx
763 * buffer that the driver may process (last buffer filled by ucode). */
764 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
767 /* Rx interrupt, but nothing sent from uCode */
769 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
771 /* calculate total frames need to be restock after handling RX */
772 total_empty = r - priv->rxq.write_actual;
774 total_empty += RX_QUEUE_SIZE;
776 if (total_empty > (RX_QUEUE_SIZE / 2))
782 /* If an RXB doesn't have a Rx queue slot associated with it,
783 * then a bug has been introduced in the queue refilling
784 * routines -- catch it here */
787 rxq->queue[i] = NULL;
789 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
790 priv->hw_params.rx_buf_size + 256,
792 pkt = (struct iwl_rx_packet *)rxb->skb->data;
794 /* Reclaim a command buffer only if this packet is a response
795 * to a (driver-originated) command.
796 * If the packet (e.g. Rx frame) originated from uCode,
797 * there is no command buffer to reclaim.
798 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
799 * but apparently a few don't get set; catch them here. */
800 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
801 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
802 (pkt->hdr.cmd != REPLY_RX) &&
803 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
804 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
805 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
806 (pkt->hdr.cmd != REPLY_TX);
808 /* Based on type of command response or notification,
809 * handle those that need handling via function in
810 * rx_handlers table. See iwl_setup_rx_handlers() */
811 if (priv->rx_handlers[pkt->hdr.cmd]) {
812 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
813 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
814 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
815 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
817 /* No handling needed */
819 "r %d i %d No handler needed for %s, 0x%02x\n",
820 r, i, get_cmd_string(pkt->hdr.cmd),
825 /* Invoke any callbacks, transfer the skb to caller, and
826 * fire off the (possibly) blocking iwl_send_cmd()
827 * as we reclaim the driver command queue */
829 iwl_tx_cmd_complete(priv, rxb);
831 IWL_WARN(priv, "Claim null rxb?\n");
834 /* For now we just don't re-use anything. We can tweak this
835 * later to try and re-use notification packets and SKBs that
836 * fail to Rx correctly */
837 if (rxb->skb != NULL) {
838 priv->alloc_rxb_skb--;
839 dev_kfree_skb_any(rxb->skb);
843 spin_lock_irqsave(&rxq->lock, flags);
844 list_add_tail(&rxb->list, &priv->rxq.rx_used);
845 spin_unlock_irqrestore(&rxq->lock, flags);
846 i = (i + 1) & RX_QUEUE_MASK;
847 /* If there are a lot of unused frames,
848 * restock the Rx queue so ucode wont assert. */
853 iwl_rx_replenish_now(priv);
859 /* Backtrack one entry */
862 iwl_rx_replenish_now(priv);
864 iwl_rx_queue_restock(priv);
867 /* call this function to flush any scheduled tasklet */
868 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
870 /* wait to make sure we flush pending tasklet*/
871 synchronize_irq(priv->pci_dev->irq);
872 tasklet_kill(&priv->irq_tasklet);
875 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
877 u32 inta, handled = 0;
880 #ifdef CONFIG_IWLWIFI_DEBUG
884 spin_lock_irqsave(&priv->lock, flags);
886 /* Ack/clear/reset pending uCode interrupts.
887 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
888 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
889 inta = iwl_read32(priv, CSR_INT);
890 iwl_write32(priv, CSR_INT, inta);
892 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
893 * Any new interrupts that happen after this, either while we're
894 * in this tasklet, or later, will show up in next ISR/tasklet. */
895 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
896 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
898 #ifdef CONFIG_IWLWIFI_DEBUG
899 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
901 inta_mask = iwl_read32(priv, CSR_INT_MASK);
902 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
903 inta, inta_mask, inta_fh);
907 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
908 * atomic, make sure that inta covers all the interrupts that
909 * we've discovered, even if FH interrupt came in just after
910 * reading CSR_INT. */
911 if (inta_fh & CSR49_FH_INT_RX_MASK)
912 inta |= CSR_INT_BIT_FH_RX;
913 if (inta_fh & CSR49_FH_INT_TX_MASK)
914 inta |= CSR_INT_BIT_FH_TX;
916 /* Now service all interrupt bits discovered above. */
917 if (inta & CSR_INT_BIT_HW_ERR) {
918 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
920 /* Tell the device to stop sending interrupts */
921 iwl_disable_interrupts(priv);
923 priv->isr_stats.hw++;
924 iwl_irq_handle_error(priv);
926 handled |= CSR_INT_BIT_HW_ERR;
928 spin_unlock_irqrestore(&priv->lock, flags);
933 #ifdef CONFIG_IWLWIFI_DEBUG
934 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
935 /* NIC fires this, but we don't use it, redundant with WAKEUP */
936 if (inta & CSR_INT_BIT_SCD) {
937 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
938 "the frame/frames.\n");
939 priv->isr_stats.sch++;
942 /* Alive notification via Rx interrupt will do the real work */
943 if (inta & CSR_INT_BIT_ALIVE) {
944 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
945 priv->isr_stats.alive++;
949 /* Safely ignore these bits for debug checks below */
950 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
952 /* HW RF KILL switch toggled */
953 if (inta & CSR_INT_BIT_RF_KILL) {
955 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
956 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
959 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
960 hw_rf_kill ? "disable radio" : "enable radio");
962 priv->isr_stats.rfkill++;
964 /* driver only loads ucode once setting the interface up.
965 * the driver allows loading the ucode even if the radio
966 * is killed. Hence update the killswitch state here. The
967 * rfkill handler will care about restarting if needed.
969 if (!test_bit(STATUS_ALIVE, &priv->status)) {
971 set_bit(STATUS_RF_KILL_HW, &priv->status);
973 clear_bit(STATUS_RF_KILL_HW, &priv->status);
974 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
977 handled |= CSR_INT_BIT_RF_KILL;
980 /* Chip got too hot and stopped itself */
981 if (inta & CSR_INT_BIT_CT_KILL) {
982 IWL_ERR(priv, "Microcode CT kill error detected.\n");
983 priv->isr_stats.ctkill++;
984 handled |= CSR_INT_BIT_CT_KILL;
987 /* Error detected by uCode */
988 if (inta & CSR_INT_BIT_SW_ERR) {
989 IWL_ERR(priv, "Microcode SW error detected. "
990 " Restarting 0x%X.\n", inta);
991 priv->isr_stats.sw++;
992 priv->isr_stats.sw_err = inta;
993 iwl_irq_handle_error(priv);
994 handled |= CSR_INT_BIT_SW_ERR;
997 /* uCode wakes up after power-down sleep */
998 if (inta & CSR_INT_BIT_WAKEUP) {
999 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1000 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1001 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1002 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1003 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1004 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1005 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1006 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1008 priv->isr_stats.wakeup++;
1010 handled |= CSR_INT_BIT_WAKEUP;
1013 /* All uCode command responses, including Tx command responses,
1014 * Rx "responses" (frame-received notification), and other
1015 * notifications from uCode come through here*/
1016 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1017 iwl_rx_handle(priv);
1018 priv->isr_stats.rx++;
1019 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1022 if (inta & CSR_INT_BIT_FH_TX) {
1023 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1024 priv->isr_stats.tx++;
1025 handled |= CSR_INT_BIT_FH_TX;
1026 /* FH finished to write, send event */
1027 priv->ucode_write_complete = 1;
1028 wake_up_interruptible(&priv->wait_command_queue);
1031 if (inta & ~handled) {
1032 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1033 priv->isr_stats.unhandled++;
1036 if (inta & ~(priv->inta_mask)) {
1037 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1038 inta & ~priv->inta_mask);
1039 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1042 /* Re-enable all interrupts */
1043 /* only Re-enable if diabled by irq */
1044 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1045 iwl_enable_interrupts(priv);
1047 #ifdef CONFIG_IWLWIFI_DEBUG
1048 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1049 inta = iwl_read32(priv, CSR_INT);
1050 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1051 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1052 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1053 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1056 spin_unlock_irqrestore(&priv->lock, flags);
1059 /* tasklet for iwlagn interrupt */
1060 static void iwl_irq_tasklet(struct iwl_priv *priv)
1064 unsigned long flags;
1065 #ifdef CONFIG_IWLWIFI_DEBUG
1069 spin_lock_irqsave(&priv->lock, flags);
1071 /* Ack/clear/reset pending uCode interrupts.
1072 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1074 iwl_write32(priv, CSR_INT, priv->inta);
1078 #ifdef CONFIG_IWLWIFI_DEBUG
1079 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1080 /* just for debug */
1081 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1082 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1086 /* saved interrupt in inta variable now we can reset priv->inta */
1089 /* Now service all interrupt bits discovered above. */
1090 if (inta & CSR_INT_BIT_HW_ERR) {
1091 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1093 /* Tell the device to stop sending interrupts */
1094 iwl_disable_interrupts(priv);
1096 priv->isr_stats.hw++;
1097 iwl_irq_handle_error(priv);
1099 handled |= CSR_INT_BIT_HW_ERR;
1101 spin_unlock_irqrestore(&priv->lock, flags);
1106 #ifdef CONFIG_IWLWIFI_DEBUG
1107 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1108 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1109 if (inta & CSR_INT_BIT_SCD) {
1110 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1111 "the frame/frames.\n");
1112 priv->isr_stats.sch++;
1115 /* Alive notification via Rx interrupt will do the real work */
1116 if (inta & CSR_INT_BIT_ALIVE) {
1117 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1118 priv->isr_stats.alive++;
1122 /* Safely ignore these bits for debug checks below */
1123 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1125 /* HW RF KILL switch toggled */
1126 if (inta & CSR_INT_BIT_RF_KILL) {
1128 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1129 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1132 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1133 hw_rf_kill ? "disable radio" : "enable radio");
1135 priv->isr_stats.rfkill++;
1137 /* driver only loads ucode once setting the interface up.
1138 * the driver allows loading the ucode even if the radio
1139 * is killed. Hence update the killswitch state here. The
1140 * rfkill handler will care about restarting if needed.
1142 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1144 set_bit(STATUS_RF_KILL_HW, &priv->status);
1146 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1147 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1150 handled |= CSR_INT_BIT_RF_KILL;
1153 /* Chip got too hot and stopped itself */
1154 if (inta & CSR_INT_BIT_CT_KILL) {
1155 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1156 priv->isr_stats.ctkill++;
1157 handled |= CSR_INT_BIT_CT_KILL;
1160 /* Error detected by uCode */
1161 if (inta & CSR_INT_BIT_SW_ERR) {
1162 IWL_ERR(priv, "Microcode SW error detected. "
1163 " Restarting 0x%X.\n", inta);
1164 priv->isr_stats.sw++;
1165 priv->isr_stats.sw_err = inta;
1166 iwl_irq_handle_error(priv);
1167 handled |= CSR_INT_BIT_SW_ERR;
1170 /* uCode wakes up after power-down sleep */
1171 if (inta & CSR_INT_BIT_WAKEUP) {
1172 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1175 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1176 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1177 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1178 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1179 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1181 priv->isr_stats.wakeup++;
1183 handled |= CSR_INT_BIT_WAKEUP;
1186 /* All uCode command responses, including Tx command responses,
1187 * Rx "responses" (frame-received notification), and other
1188 * notifications from uCode come through here*/
1189 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1190 CSR_INT_BIT_RX_PERIODIC)) {
1191 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1192 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1193 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1194 iwl_write32(priv, CSR_FH_INT_STATUS,
1195 CSR49_FH_INT_RX_MASK);
1197 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1198 handled |= CSR_INT_BIT_RX_PERIODIC;
1199 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1201 /* Sending RX interrupt require many steps to be done in the
1203 * 1- write interrupt to current index in ICT table.
1205 * 3- update RX shared data to indicate last write index.
1206 * 4- send interrupt.
1207 * This could lead to RX race, driver could receive RX interrupt
1208 * but the shared data changes does not reflect this.
1209 * this could lead to RX race, RX periodic will solve this race
1211 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1212 CSR_INT_PERIODIC_DIS);
1213 iwl_rx_handle(priv);
1214 /* Only set RX periodic if real RX is received. */
1215 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1216 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1217 CSR_INT_PERIODIC_ENA);
1219 priv->isr_stats.rx++;
1222 if (inta & CSR_INT_BIT_FH_TX) {
1223 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1224 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1225 priv->isr_stats.tx++;
1226 handled |= CSR_INT_BIT_FH_TX;
1227 /* FH finished to write, send event */
1228 priv->ucode_write_complete = 1;
1229 wake_up_interruptible(&priv->wait_command_queue);
1232 if (inta & ~handled) {
1233 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1234 priv->isr_stats.unhandled++;
1237 if (inta & ~(priv->inta_mask)) {
1238 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1239 inta & ~priv->inta_mask);
1243 /* Re-enable all interrupts */
1244 /* only Re-enable if diabled by irq */
1245 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1246 iwl_enable_interrupts(priv);
1248 spin_unlock_irqrestore(&priv->lock, flags);
1253 /******************************************************************************
1255 * uCode download functions
1257 ******************************************************************************/
1259 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1261 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1262 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1263 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1264 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1265 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1266 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1269 static void iwl_nic_start(struct iwl_priv *priv)
1271 /* Remove all resets to allow NIC to operate */
1272 iwl_write32(priv, CSR_RESET, 0);
1277 * iwl_read_ucode - Read uCode images from disk file.
1279 * Copy into buffers for card to fetch via bus-mastering
1281 static int iwl_read_ucode(struct iwl_priv *priv)
1283 struct iwl_ucode_header *ucode;
1284 int ret = -EINVAL, index;
1285 const struct firmware *ucode_raw;
1286 const char *name_pre = priv->cfg->fw_name_pre;
1287 const unsigned int api_max = priv->cfg->ucode_api_max;
1288 const unsigned int api_min = priv->cfg->ucode_api_min;
1293 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1296 /* Ask kernel firmware_class module to get the boot firmware off disk.
1297 * request_firmware() is synchronous, file is in memory on return. */
1298 for (index = api_max; index >= api_min; index--) {
1299 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1300 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1302 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1309 if (index < api_max)
1310 IWL_ERR(priv, "Loaded firmware %s, "
1311 "which is deprecated. "
1312 "Please use API v%u instead.\n",
1315 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1316 buf, ucode_raw->size);
1324 /* Make sure that we got at least the v1 header! */
1325 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1326 IWL_ERR(priv, "File size way too small!\n");
1331 /* Data from ucode file: header followed by uCode images */
1332 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1334 priv->ucode_ver = le32_to_cpu(ucode->ver);
1335 api_ver = IWL_UCODE_API(priv->ucode_ver);
1336 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1337 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1338 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1339 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1341 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1342 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1343 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1345 /* api_ver should match the api version forming part of the
1346 * firmware filename ... but we don't check for that and only rely
1347 * on the API version read from firmware header from here on forward */
1349 if (api_ver < api_min || api_ver > api_max) {
1350 IWL_ERR(priv, "Driver unable to support your firmware API. "
1351 "Driver supports v%u, firmware is v%u.\n",
1353 priv->ucode_ver = 0;
1357 if (api_ver != api_max)
1358 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1359 "got v%u. New firmware can be obtained "
1360 "from http://www.intellinuxwireless.org.\n",
1363 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1364 IWL_UCODE_MAJOR(priv->ucode_ver),
1365 IWL_UCODE_MINOR(priv->ucode_ver),
1366 IWL_UCODE_API(priv->ucode_ver),
1367 IWL_UCODE_SERIAL(priv->ucode_ver));
1370 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1372 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1373 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1374 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1375 ? "OTP" : "EEPROM", eeprom_ver);
1377 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1379 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1381 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1383 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1385 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1387 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1390 /* Verify size of file vs. image size info in file's header */
1391 if (ucode_raw->size !=
1392 priv->cfg->ops->ucode->get_header_size(api_ver) +
1393 inst_size + data_size + init_size +
1394 init_data_size + boot_size) {
1396 IWL_DEBUG_INFO(priv,
1397 "uCode file size %d does not match expected size\n",
1398 (int)ucode_raw->size);
1403 /* Verify that uCode images will fit in card's SRAM */
1404 if (inst_size > priv->hw_params.max_inst_size) {
1405 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1411 if (data_size > priv->hw_params.max_data_size) {
1412 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1417 if (init_size > priv->hw_params.max_inst_size) {
1418 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1423 if (init_data_size > priv->hw_params.max_data_size) {
1424 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1429 if (boot_size > priv->hw_params.max_bsm_size) {
1430 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1436 /* Allocate ucode buffers for card's bus-master loading ... */
1438 /* Runtime instructions and 2 copies of data:
1439 * 1) unmodified from disk
1440 * 2) backup cache for save/restore during power-downs */
1441 priv->ucode_code.len = inst_size;
1442 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1444 priv->ucode_data.len = data_size;
1445 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1447 priv->ucode_data_backup.len = data_size;
1448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1450 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1451 !priv->ucode_data_backup.v_addr)
1454 /* Initialization instructions and data */
1455 if (init_size && init_data_size) {
1456 priv->ucode_init.len = init_size;
1457 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1459 priv->ucode_init_data.len = init_data_size;
1460 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1462 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1466 /* Bootstrap (instructions only, no data) */
1468 priv->ucode_boot.len = boot_size;
1469 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1471 if (!priv->ucode_boot.v_addr)
1475 /* Copy images into buffers for card's bus-master reads ... */
1477 /* Runtime instructions (first block of data in file) */
1479 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1480 memcpy(priv->ucode_code.v_addr, src, len);
1483 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1484 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1486 /* Runtime data (2nd block)
1487 * NOTE: Copy into backup buffer will be done in iwl_up() */
1489 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1490 memcpy(priv->ucode_data.v_addr, src, len);
1491 memcpy(priv->ucode_data_backup.v_addr, src, len);
1494 /* Initialization instructions (3rd block) */
1497 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1499 memcpy(priv->ucode_init.v_addr, src, len);
1503 /* Initialization data (4th block) */
1504 if (init_data_size) {
1505 len = init_data_size;
1506 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1508 memcpy(priv->ucode_init_data.v_addr, src, len);
1512 /* Bootstrap instructions (5th block) */
1514 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1515 memcpy(priv->ucode_boot.v_addr, src, len);
1517 /* We have our copies now, allow OS release its copies */
1518 release_firmware(ucode_raw);
1522 IWL_ERR(priv, "failed to allocate pci memory\n");
1524 iwl_dealloc_ucode_pci(priv);
1527 release_firmware(ucode_raw);
1533 #ifdef CONFIG_IWLWIFI_DEBUG
1534 static const char *desc_lookup_text[] = {
1539 "NMI_INTERRUPT_WDG",
1543 "HW_ERROR_TUNE_LOCK",
1544 "HW_ERROR_TEMPERATURE",
1545 "ILLEGAL_CHAN_FREQ",
1548 "NMI_INTERRUPT_HOST",
1549 "NMI_INTERRUPT_ACTION_PT",
1550 "NMI_INTERRUPT_UNKNOWN",
1551 "UCODE_VERSION_MISMATCH",
1552 "HW_ERROR_ABS_LOCK",
1553 "HW_ERROR_CAL_LOCK_FAIL",
1554 "NMI_INTERRUPT_INST_ACTION_PT",
1555 "NMI_INTERRUPT_DATA_ACTION_PT",
1557 "NMI_INTERRUPT_TRM",
1558 "NMI_INTERRUPT_BREAK_POINT"
1566 static const char *desc_lookup(int i)
1568 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1570 if (i < 0 || i > max)
1573 return desc_lookup_text[i];
1576 #define ERROR_START_OFFSET (1 * sizeof(u32))
1577 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1579 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1582 u32 desc, time, count, base, data1;
1583 u32 blink1, blink2, ilink1, ilink2;
1585 if (priv->ucode_type == UCODE_INIT)
1586 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1588 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1590 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1591 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1595 count = iwl_read_targ_mem(priv, base);
1597 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1598 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1599 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1600 priv->status, count);
1603 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1604 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1605 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1606 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1607 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1608 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1609 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1610 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1611 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1613 IWL_ERR(priv, "Desc Time "
1614 "data1 data2 line\n");
1615 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1616 desc_lookup(desc), desc, time, data1, data2, line);
1617 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1618 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1623 #define EVENT_START_OFFSET (4 * sizeof(u32))
1626 * iwl_print_event_log - Dump error event log to syslog
1629 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1630 u32 num_events, u32 mode)
1633 u32 base; /* SRAM byte address of event log header */
1634 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1635 u32 ptr; /* SRAM byte address of log data */
1636 u32 ev, time, data; /* event log data */
1638 if (num_events == 0)
1640 if (priv->ucode_type == UCODE_INIT)
1641 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1643 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1646 event_size = 2 * sizeof(u32);
1648 event_size = 3 * sizeof(u32);
1650 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1652 /* "time" is actually "data" for mode 0 (no timestamp).
1653 * place event id # at far right for easier visual parsing. */
1654 for (i = 0; i < num_events; i++) {
1655 ev = iwl_read_targ_mem(priv, ptr);
1657 time = iwl_read_targ_mem(priv, ptr);
1661 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1663 data = iwl_read_targ_mem(priv, ptr);
1665 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1671 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1673 u32 base; /* SRAM byte address of event log header */
1674 u32 capacity; /* event log capacity in # entries */
1675 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1676 u32 num_wraps; /* # times uCode wrapped to top of log */
1677 u32 next_entry; /* index of next entry to be written by uCode */
1678 u32 size; /* # entries that we'll print */
1680 if (priv->ucode_type == UCODE_INIT)
1681 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1683 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1685 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1686 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1690 /* event log header */
1691 capacity = iwl_read_targ_mem(priv, base);
1692 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1693 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1694 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1696 size = num_wraps ? capacity : next_entry;
1698 /* bail out if nothing in log */
1700 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1704 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1707 /* if uCode has wrapped back to top of log, start at the oldest entry,
1708 * i.e the next one that uCode would fill. */
1710 iwl_print_event_log(priv, next_entry,
1711 capacity - next_entry, mode);
1712 /* (then/else) start at top of log */
1713 iwl_print_event_log(priv, 0, next_entry, mode);
1719 * iwl_alive_start - called after REPLY_ALIVE notification received
1720 * from protocol/runtime uCode (initialization uCode's
1721 * Alive gets handled by iwl_init_alive_start()).
1723 static void iwl_alive_start(struct iwl_priv *priv)
1727 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1729 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1730 /* We had an error bringing up the hardware, so take it
1731 * all the way back down so we can try again */
1732 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1736 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1737 * This is a paranoid check, because we would not have gotten the
1738 * "runtime" alive if code weren't properly loaded. */
1739 if (iwl_verify_ucode(priv)) {
1740 /* Runtime instruction load was bad;
1741 * take it all the way back down so we can try again */
1742 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1746 iwl_clear_stations_table(priv);
1747 ret = priv->cfg->ops->lib->alive_notify(priv);
1750 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1754 /* After the ALIVE response, we can send host commands to the uCode */
1755 set_bit(STATUS_ALIVE, &priv->status);
1757 if (iwl_is_rfkill(priv))
1760 ieee80211_wake_queues(priv->hw);
1762 priv->active_rate = priv->rates_mask;
1763 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1765 /* Configure Tx antenna selection based on H/W config */
1766 if (priv->cfg->ops->hcmd->set_tx_ant)
1767 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1769 if (iwl_is_associated(priv)) {
1770 struct iwl_rxon_cmd *active_rxon =
1771 (struct iwl_rxon_cmd *)&priv->active_rxon;
1772 /* apply any changes in staging */
1773 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1774 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1776 /* Initialize our rx_config data */
1777 iwl_connection_init_rx_config(priv, priv->iw_mode);
1779 if (priv->cfg->ops->hcmd->set_rxon_chain)
1780 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1782 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1785 /* Configure Bluetooth device coexistence support */
1786 iwl_send_bt_config(priv);
1788 iwl_reset_run_time_calib(priv);
1790 /* Configure the adapter for unassociated operation */
1791 iwlcore_commit_rxon(priv);
1793 /* At this point, the NIC is initialized and operational */
1794 iwl_rf_kill_ct_config(priv);
1796 iwl_leds_register(priv);
1798 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1799 set_bit(STATUS_READY, &priv->status);
1800 wake_up_interruptible(&priv->wait_command_queue);
1802 iwl_power_update_mode(priv, true);
1804 /* reassociate for ADHOC mode */
1805 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1806 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1809 iwl_mac_beacon_update(priv->hw, beacon);
1813 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1814 iwl_set_mode(priv, priv->iw_mode);
1819 queue_work(priv->workqueue, &priv->restart);
1822 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1824 static void __iwl_down(struct iwl_priv *priv)
1826 unsigned long flags;
1827 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1829 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1832 set_bit(STATUS_EXIT_PENDING, &priv->status);
1834 iwl_leds_unregister(priv);
1836 iwl_clear_stations_table(priv);
1838 /* Unblock any waiting calls */
1839 wake_up_interruptible_all(&priv->wait_command_queue);
1841 /* Wipe out the EXIT_PENDING status bit if we are not actually
1842 * exiting the module */
1844 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1846 /* stop and reset the on-board processor */
1847 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1849 /* tell the device to stop sending interrupts */
1850 spin_lock_irqsave(&priv->lock, flags);
1851 iwl_disable_interrupts(priv);
1852 spin_unlock_irqrestore(&priv->lock, flags);
1853 iwl_synchronize_irq(priv);
1855 if (priv->mac80211_registered)
1856 ieee80211_stop_queues(priv->hw);
1858 /* If we have not previously called iwl_init() then
1859 * clear all bits but the RF Kill bit and return */
1860 if (!iwl_is_init(priv)) {
1861 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1863 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1864 STATUS_GEO_CONFIGURED |
1865 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1866 STATUS_EXIT_PENDING;
1870 /* ...otherwise clear out all the status bits but the RF Kill
1871 * bit and continue taking the NIC down. */
1872 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1874 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1875 STATUS_GEO_CONFIGURED |
1876 test_bit(STATUS_FW_ERROR, &priv->status) <<
1878 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1879 STATUS_EXIT_PENDING;
1881 /* device going down, Stop using ICT table */
1882 iwl_disable_ict(priv);
1883 spin_lock_irqsave(&priv->lock, flags);
1884 iwl_clear_bit(priv, CSR_GP_CNTRL,
1885 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1886 spin_unlock_irqrestore(&priv->lock, flags);
1888 iwl_txq_ctx_stop(priv);
1891 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1892 APMG_CLK_VAL_DMA_CLK_RQT);
1896 /* FIXME: apm_ops.suspend(priv) */
1898 priv->cfg->ops->lib->apm_ops.stop(priv);
1900 priv->cfg->ops->lib->apm_ops.reset(priv);
1902 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1904 if (priv->ibss_beacon)
1905 dev_kfree_skb(priv->ibss_beacon);
1906 priv->ibss_beacon = NULL;
1908 /* clear out any free frames */
1909 iwl_clear_free_frames(priv);
1912 static void iwl_down(struct iwl_priv *priv)
1914 mutex_lock(&priv->mutex);
1916 mutex_unlock(&priv->mutex);
1918 iwl_cancel_deferred_work(priv);
1921 #define HW_READY_TIMEOUT (50)
1923 static int iwl_set_hw_ready(struct iwl_priv *priv)
1927 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1928 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1930 /* See if we got it */
1931 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1932 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1933 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1935 if (ret != -ETIMEDOUT)
1936 priv->hw_ready = true;
1938 priv->hw_ready = false;
1940 IWL_DEBUG_INFO(priv, "hardware %s\n",
1941 (priv->hw_ready == 1) ? "ready" : "not ready");
1945 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1949 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1951 ret = iwl_set_hw_ready(priv);
1955 /* If HW is not ready, prepare the conditions to check again */
1956 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1957 CSR_HW_IF_CONFIG_REG_PREPARE);
1959 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1960 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1961 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1963 /* HW should be ready by now, check again. */
1964 if (ret != -ETIMEDOUT)
1965 iwl_set_hw_ready(priv);
1970 #define MAX_HW_RESTARTS 5
1972 static int __iwl_up(struct iwl_priv *priv)
1977 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1978 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1982 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1983 IWL_ERR(priv, "ucode not available for device bringup\n");
1987 iwl_prepare_card_hw(priv);
1989 if (!priv->hw_ready) {
1990 IWL_WARN(priv, "Exit HW not ready\n");
1994 /* If platform's RF_KILL switch is NOT set to KILL */
1995 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1996 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1998 set_bit(STATUS_RF_KILL_HW, &priv->status);
2000 if (iwl_is_rfkill(priv)) {
2001 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2003 iwl_enable_interrupts(priv);
2004 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2008 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2010 ret = iwl_hw_nic_init(priv);
2012 IWL_ERR(priv, "Unable to init nic\n");
2016 /* make sure rfkill handshake bits are cleared */
2017 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2018 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2019 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2021 /* clear (again), then enable host interrupts */
2022 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2023 iwl_enable_interrupts(priv);
2025 /* really make sure rfkill handshake bits are cleared */
2026 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2027 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2029 /* Copy original ucode data image from disk into backup cache.
2030 * This will be used to initialize the on-board processor's
2031 * data SRAM for a clean start when the runtime program first loads. */
2032 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2033 priv->ucode_data.len);
2035 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2037 iwl_clear_stations_table(priv);
2039 /* load bootstrap state machine,
2040 * load bootstrap program into processor's memory,
2041 * prepare to load the "initialize" uCode */
2042 ret = priv->cfg->ops->lib->load_ucode(priv);
2045 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2050 /* start card; "initialize" will load runtime ucode */
2051 iwl_nic_start(priv);
2053 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2058 set_bit(STATUS_EXIT_PENDING, &priv->status);
2060 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2062 /* tried to restart and config the device for as long as our
2063 * patience could withstand */
2064 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2069 /*****************************************************************************
2071 * Workqueue callbacks
2073 *****************************************************************************/
2075 static void iwl_bg_init_alive_start(struct work_struct *data)
2077 struct iwl_priv *priv =
2078 container_of(data, struct iwl_priv, init_alive_start.work);
2080 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2083 mutex_lock(&priv->mutex);
2084 priv->cfg->ops->lib->init_alive_start(priv);
2085 mutex_unlock(&priv->mutex);
2088 static void iwl_bg_alive_start(struct work_struct *data)
2090 struct iwl_priv *priv =
2091 container_of(data, struct iwl_priv, alive_start.work);
2093 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2096 /* enable dram interrupt */
2097 iwl_reset_ict(priv);
2099 mutex_lock(&priv->mutex);
2100 iwl_alive_start(priv);
2101 mutex_unlock(&priv->mutex);
2104 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2106 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2107 run_time_calib_work);
2109 mutex_lock(&priv->mutex);
2111 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2112 test_bit(STATUS_SCANNING, &priv->status)) {
2113 mutex_unlock(&priv->mutex);
2117 if (priv->start_calib) {
2118 iwl_chain_noise_calibration(priv, &priv->statistics);
2120 iwl_sensitivity_calibration(priv, &priv->statistics);
2123 mutex_unlock(&priv->mutex);
2127 static void iwl_bg_up(struct work_struct *data)
2129 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2131 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2134 mutex_lock(&priv->mutex);
2136 mutex_unlock(&priv->mutex);
2139 static void iwl_bg_restart(struct work_struct *data)
2141 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2143 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2146 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2147 mutex_lock(&priv->mutex);
2150 mutex_unlock(&priv->mutex);
2152 ieee80211_restart_hw(priv->hw);
2155 queue_work(priv->workqueue, &priv->up);
2159 static void iwl_bg_rx_replenish(struct work_struct *data)
2161 struct iwl_priv *priv =
2162 container_of(data, struct iwl_priv, rx_replenish);
2164 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2167 mutex_lock(&priv->mutex);
2168 iwl_rx_replenish(priv);
2169 mutex_unlock(&priv->mutex);
2172 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2174 void iwl_post_associate(struct iwl_priv *priv)
2176 struct ieee80211_conf *conf = NULL;
2178 unsigned long flags;
2180 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2181 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2185 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2186 priv->assoc_id, priv->active_rxon.bssid_addr);
2189 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2193 if (!priv->vif || !priv->is_open)
2196 iwl_scan_cancel_timeout(priv, 200);
2198 conf = ieee80211_get_hw_conf(priv->hw);
2200 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2201 iwlcore_commit_rxon(priv);
2203 iwl_setup_rxon_timing(priv);
2204 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2205 sizeof(priv->rxon_timing), &priv->rxon_timing);
2207 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2208 "Attempting to continue.\n");
2210 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2212 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2214 if (priv->cfg->ops->hcmd->set_rxon_chain)
2215 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2217 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2219 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2220 priv->assoc_id, priv->beacon_int);
2222 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2223 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2225 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2227 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2228 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2229 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2231 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2233 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2234 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2238 iwlcore_commit_rxon(priv);
2240 switch (priv->iw_mode) {
2241 case NL80211_IFTYPE_STATION:
2244 case NL80211_IFTYPE_ADHOC:
2246 /* assume default assoc id */
2249 iwl_rxon_add_station(priv, priv->bssid, 0);
2250 iwl_send_beacon_cmd(priv);
2255 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2256 __func__, priv->iw_mode);
2260 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2261 priv->assoc_station_added = 1;
2263 spin_lock_irqsave(&priv->lock, flags);
2264 iwl_activate_qos(priv, 0);
2265 spin_unlock_irqrestore(&priv->lock, flags);
2267 /* the chain noise calibration will enabled PM upon completion
2268 * If chain noise has already been run, then we need to enable
2269 * power management here */
2270 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2271 iwl_power_update_mode(priv, false);
2273 /* Enable Rx differential gain and sensitivity calibrations */
2274 iwl_chain_noise_reset(priv);
2275 priv->start_calib = 1;
2279 /*****************************************************************************
2281 * mac80211 entry point functions
2283 *****************************************************************************/
2285 #define UCODE_READY_TIMEOUT (4 * HZ)
2287 static int iwl_mac_start(struct ieee80211_hw *hw)
2289 struct iwl_priv *priv = hw->priv;
2292 IWL_DEBUG_MAC80211(priv, "enter\n");
2294 /* we should be verifying the device is ready to be opened */
2295 mutex_lock(&priv->mutex);
2297 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2298 * ucode filename and max sizes are card-specific. */
2300 if (!priv->ucode_code.len) {
2301 ret = iwl_read_ucode(priv);
2303 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2304 mutex_unlock(&priv->mutex);
2309 ret = __iwl_up(priv);
2311 mutex_unlock(&priv->mutex);
2316 if (iwl_is_rfkill(priv))
2319 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2321 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2322 * mac80211 will not be run successfully. */
2323 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2324 test_bit(STATUS_READY, &priv->status),
2325 UCODE_READY_TIMEOUT);
2327 if (!test_bit(STATUS_READY, &priv->status)) {
2328 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2329 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2336 IWL_DEBUG_MAC80211(priv, "leave\n");
2340 static void iwl_mac_stop(struct ieee80211_hw *hw)
2342 struct iwl_priv *priv = hw->priv;
2344 IWL_DEBUG_MAC80211(priv, "enter\n");
2351 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2352 /* stop mac, cancel any scan request and clear
2353 * RXON_FILTER_ASSOC_MSK BIT
2355 mutex_lock(&priv->mutex);
2356 iwl_scan_cancel_timeout(priv, 100);
2357 mutex_unlock(&priv->mutex);
2362 flush_workqueue(priv->workqueue);
2364 /* enable interrupts again in order to receive rfkill changes */
2365 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2366 iwl_enable_interrupts(priv);
2368 IWL_DEBUG_MAC80211(priv, "leave\n");
2371 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2373 struct iwl_priv *priv = hw->priv;
2375 IWL_DEBUG_MACDUMP(priv, "enter\n");
2377 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2378 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2380 if (iwl_tx_skb(priv, skb))
2381 dev_kfree_skb_any(skb);
2383 IWL_DEBUG_MACDUMP(priv, "leave\n");
2384 return NETDEV_TX_OK;
2387 void iwl_config_ap(struct iwl_priv *priv)
2390 unsigned long flags;
2392 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2395 /* The following should be done only at AP bring up */
2396 if (!iwl_is_associated(priv)) {
2398 /* RXON - unassoc (to set timing command) */
2399 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2400 iwlcore_commit_rxon(priv);
2403 iwl_setup_rxon_timing(priv);
2404 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2405 sizeof(priv->rxon_timing), &priv->rxon_timing);
2407 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2408 "Attempting to continue.\n");
2410 if (priv->cfg->ops->hcmd->set_rxon_chain)
2411 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2413 /* FIXME: what should be the assoc_id for AP? */
2414 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2415 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2416 priv->staging_rxon.flags |=
2417 RXON_FLG_SHORT_PREAMBLE_MSK;
2419 priv->staging_rxon.flags &=
2420 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2422 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2423 if (priv->assoc_capability &
2424 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2425 priv->staging_rxon.flags |=
2426 RXON_FLG_SHORT_SLOT_MSK;
2428 priv->staging_rxon.flags &=
2429 ~RXON_FLG_SHORT_SLOT_MSK;
2431 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2432 priv->staging_rxon.flags &=
2433 ~RXON_FLG_SHORT_SLOT_MSK;
2435 /* restore RXON assoc */
2436 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2437 iwlcore_commit_rxon(priv);
2438 spin_lock_irqsave(&priv->lock, flags);
2439 iwl_activate_qos(priv, 1);
2440 spin_unlock_irqrestore(&priv->lock, flags);
2441 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2443 iwl_send_beacon_cmd(priv);
2445 /* FIXME - we need to add code here to detect a totally new
2446 * configuration, reset the AP, unassoc, rxon timing, assoc,
2447 * clear sta table, add BCAST sta... */
2450 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2451 struct ieee80211_key_conf *keyconf, const u8 *addr,
2452 u32 iv32, u16 *phase1key)
2455 struct iwl_priv *priv = hw->priv;
2456 IWL_DEBUG_MAC80211(priv, "enter\n");
2458 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2460 IWL_DEBUG_MAC80211(priv, "leave\n");
2463 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2464 struct ieee80211_vif *vif,
2465 struct ieee80211_sta *sta,
2466 struct ieee80211_key_conf *key)
2468 struct iwl_priv *priv = hw->priv;
2472 bool is_default_wep_key = false;
2474 IWL_DEBUG_MAC80211(priv, "enter\n");
2476 if (priv->cfg->mod_params->sw_crypto) {
2477 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2480 addr = sta ? sta->addr : iwl_bcast_addr;
2481 sta_id = iwl_find_station(priv, addr);
2482 if (sta_id == IWL_INVALID_STATION) {
2483 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2489 mutex_lock(&priv->mutex);
2490 iwl_scan_cancel_timeout(priv, 100);
2491 mutex_unlock(&priv->mutex);
2493 /* If we are getting WEP group key and we didn't receive any key mapping
2494 * so far, we are in legacy wep mode (group key only), otherwise we are
2496 * In legacy wep mode, we use another host command to the uCode */
2497 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2498 priv->iw_mode != NL80211_IFTYPE_AP) {
2500 is_default_wep_key = !priv->key_mapping_key;
2502 is_default_wep_key =
2503 (key->hw_key_idx == HW_KEY_DEFAULT);
2508 if (is_default_wep_key)
2509 ret = iwl_set_default_wep_key(priv, key);
2511 ret = iwl_set_dynamic_key(priv, key, sta_id);
2513 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2516 if (is_default_wep_key)
2517 ret = iwl_remove_default_wep_key(priv, key);
2519 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2521 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2527 IWL_DEBUG_MAC80211(priv, "leave\n");
2532 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2533 enum ieee80211_ampdu_mlme_action action,
2534 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2536 struct iwl_priv *priv = hw->priv;
2539 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2542 if (!(priv->cfg->sku & IWL_SKU_N))
2546 case IEEE80211_AMPDU_RX_START:
2547 IWL_DEBUG_HT(priv, "start Rx\n");
2548 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2549 case IEEE80211_AMPDU_RX_STOP:
2550 IWL_DEBUG_HT(priv, "stop Rx\n");
2551 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2552 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2556 case IEEE80211_AMPDU_TX_START:
2557 IWL_DEBUG_HT(priv, "start Tx\n");
2558 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2559 case IEEE80211_AMPDU_TX_STOP:
2560 IWL_DEBUG_HT(priv, "stop Tx\n");
2561 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2562 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2567 IWL_DEBUG_HT(priv, "unknown\n");
2574 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2575 struct ieee80211_low_level_stats *stats)
2577 struct iwl_priv *priv = hw->priv;
2580 IWL_DEBUG_MAC80211(priv, "enter\n");
2581 IWL_DEBUG_MAC80211(priv, "leave\n");
2586 /*****************************************************************************
2590 *****************************************************************************/
2592 #ifdef CONFIG_IWLWIFI_DEBUG
2595 * The following adds a new attribute to the sysfs representation
2596 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2597 * used for controlling the debug level.
2599 * See the level definitions in iwl for details.
2601 * The debug_level being managed using sysfs below is a per device debug
2602 * level that is used instead of the global debug level if it (the per
2603 * device debug level) is set.
2605 static ssize_t show_debug_level(struct device *d,
2606 struct device_attribute *attr, char *buf)
2608 struct iwl_priv *priv = dev_get_drvdata(d);
2609 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2611 static ssize_t store_debug_level(struct device *d,
2612 struct device_attribute *attr,
2613 const char *buf, size_t count)
2615 struct iwl_priv *priv = dev_get_drvdata(d);
2619 ret = strict_strtoul(buf, 0, &val);
2621 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2623 priv->debug_level = val;
2624 if (iwl_alloc_traffic_mem(priv))
2626 "Not enough memory to generate traffic log\n");
2628 return strnlen(buf, count);
2631 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2632 show_debug_level, store_debug_level);
2635 #endif /* CONFIG_IWLWIFI_DEBUG */
2638 static ssize_t show_temperature(struct device *d,
2639 struct device_attribute *attr, char *buf)
2641 struct iwl_priv *priv = dev_get_drvdata(d);
2643 if (!iwl_is_alive(priv))
2646 return sprintf(buf, "%d\n", priv->temperature);
2649 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2651 static ssize_t show_tx_power(struct device *d,
2652 struct device_attribute *attr, char *buf)
2654 struct iwl_priv *priv = dev_get_drvdata(d);
2656 if (!iwl_is_ready_rf(priv))
2657 return sprintf(buf, "off\n");
2659 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2662 static ssize_t store_tx_power(struct device *d,
2663 struct device_attribute *attr,
2664 const char *buf, size_t count)
2666 struct iwl_priv *priv = dev_get_drvdata(d);
2670 ret = strict_strtoul(buf, 10, &val);
2672 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2674 ret = iwl_set_tx_power(priv, val, false);
2676 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2684 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2686 static ssize_t show_flags(struct device *d,
2687 struct device_attribute *attr, char *buf)
2689 struct iwl_priv *priv = dev_get_drvdata(d);
2691 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2694 static ssize_t store_flags(struct device *d,
2695 struct device_attribute *attr,
2696 const char *buf, size_t count)
2698 struct iwl_priv *priv = dev_get_drvdata(d);
2701 int ret = strict_strtoul(buf, 0, &val);
2706 mutex_lock(&priv->mutex);
2707 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2708 /* Cancel any currently running scans... */
2709 if (iwl_scan_cancel_timeout(priv, 100))
2710 IWL_WARN(priv, "Could not cancel scan.\n");
2712 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2713 priv->staging_rxon.flags = cpu_to_le32(flags);
2714 iwlcore_commit_rxon(priv);
2717 mutex_unlock(&priv->mutex);
2722 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2724 static ssize_t show_filter_flags(struct device *d,
2725 struct device_attribute *attr, char *buf)
2727 struct iwl_priv *priv = dev_get_drvdata(d);
2729 return sprintf(buf, "0x%04X\n",
2730 le32_to_cpu(priv->active_rxon.filter_flags));
2733 static ssize_t store_filter_flags(struct device *d,
2734 struct device_attribute *attr,
2735 const char *buf, size_t count)
2737 struct iwl_priv *priv = dev_get_drvdata(d);
2740 int ret = strict_strtoul(buf, 0, &val);
2743 filter_flags = (u32)val;
2745 mutex_lock(&priv->mutex);
2746 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2747 /* Cancel any currently running scans... */
2748 if (iwl_scan_cancel_timeout(priv, 100))
2749 IWL_WARN(priv, "Could not cancel scan.\n");
2751 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2752 "0x%04X\n", filter_flags);
2753 priv->staging_rxon.filter_flags =
2754 cpu_to_le32(filter_flags);
2755 iwlcore_commit_rxon(priv);
2758 mutex_unlock(&priv->mutex);
2763 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2764 store_filter_flags);
2767 static ssize_t show_statistics(struct device *d,
2768 struct device_attribute *attr, char *buf)
2770 struct iwl_priv *priv = dev_get_drvdata(d);
2771 u32 size = sizeof(struct iwl_notif_statistics);
2772 u32 len = 0, ofs = 0;
2773 u8 *data = (u8 *)&priv->statistics;
2776 if (!iwl_is_alive(priv))
2779 mutex_lock(&priv->mutex);
2780 rc = iwl_send_statistics_request(priv, 0);
2781 mutex_unlock(&priv->mutex);
2785 "Error sending statistics request: 0x%08X\n", rc);
2789 while (size && (PAGE_SIZE - len)) {
2790 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2791 PAGE_SIZE - len, 1);
2793 if (PAGE_SIZE - len)
2797 size -= min(size, 16U);
2803 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2805 static ssize_t show_rts_ht_protection(struct device *d,
2806 struct device_attribute *attr, char *buf)
2808 struct iwl_priv *priv = dev_get_drvdata(d);
2810 return sprintf(buf, "%s\n",
2811 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2814 static ssize_t store_rts_ht_protection(struct device *d,
2815 struct device_attribute *attr,
2816 const char *buf, size_t count)
2818 struct iwl_priv *priv = dev_get_drvdata(d);
2822 ret = strict_strtoul(buf, 10, &val);
2824 IWL_INFO(priv, "Input is not in decimal form.\n");
2826 if (!iwl_is_associated(priv))
2827 priv->cfg->use_rts_for_ht = val ? true : false;
2829 IWL_ERR(priv, "Sta associated with AP - "
2830 "Change protection mechanism is not allowed\n");
2836 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2837 show_rts_ht_protection, store_rts_ht_protection);
2840 /*****************************************************************************
2842 * driver setup and teardown
2844 *****************************************************************************/
2846 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2848 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2850 init_waitqueue_head(&priv->wait_command_queue);
2852 INIT_WORK(&priv->up, iwl_bg_up);
2853 INIT_WORK(&priv->restart, iwl_bg_restart);
2854 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2855 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2856 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2857 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2858 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2860 iwl_setup_scan_deferred_work(priv);
2862 if (priv->cfg->ops->lib->setup_deferred_work)
2863 priv->cfg->ops->lib->setup_deferred_work(priv);
2865 init_timer(&priv->statistics_periodic);
2866 priv->statistics_periodic.data = (unsigned long)priv;
2867 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2869 if (!priv->cfg->use_isr_legacy)
2870 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2871 iwl_irq_tasklet, (unsigned long)priv);
2873 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2874 iwl_irq_tasklet_legacy, (unsigned long)priv);
2877 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2879 if (priv->cfg->ops->lib->cancel_deferred_work)
2880 priv->cfg->ops->lib->cancel_deferred_work(priv);
2882 cancel_delayed_work_sync(&priv->init_alive_start);
2883 cancel_delayed_work(&priv->scan_check);
2884 cancel_delayed_work(&priv->alive_start);
2885 cancel_work_sync(&priv->beacon_update);
2886 del_timer_sync(&priv->statistics_periodic);
2889 static struct attribute *iwl_sysfs_entries[] = {
2890 &dev_attr_flags.attr,
2891 &dev_attr_filter_flags.attr,
2892 &dev_attr_statistics.attr,
2893 &dev_attr_temperature.attr,
2894 &dev_attr_tx_power.attr,
2895 &dev_attr_rts_ht_protection.attr,
2896 #ifdef CONFIG_IWLWIFI_DEBUG
2897 &dev_attr_debug_level.attr,
2902 static struct attribute_group iwl_attribute_group = {
2903 .name = NULL, /* put in device directory */
2904 .attrs = iwl_sysfs_entries,
2907 static struct ieee80211_ops iwl_hw_ops = {
2909 .start = iwl_mac_start,
2910 .stop = iwl_mac_stop,
2911 .add_interface = iwl_mac_add_interface,
2912 .remove_interface = iwl_mac_remove_interface,
2913 .config = iwl_mac_config,
2914 .configure_filter = iwl_configure_filter,
2915 .set_key = iwl_mac_set_key,
2916 .update_tkip_key = iwl_mac_update_tkip_key,
2917 .get_stats = iwl_mac_get_stats,
2918 .get_tx_stats = iwl_mac_get_tx_stats,
2919 .conf_tx = iwl_mac_conf_tx,
2920 .reset_tsf = iwl_mac_reset_tsf,
2921 .bss_info_changed = iwl_bss_info_changed,
2922 .ampdu_action = iwl_mac_ampdu_action,
2923 .hw_scan = iwl_mac_hw_scan
2926 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2929 struct iwl_priv *priv;
2930 struct ieee80211_hw *hw;
2931 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2932 unsigned long flags;
2935 /************************
2936 * 1. Allocating HW data
2937 ************************/
2939 /* Disabling hardware scan means that mac80211 will perform scans
2940 * "the hard way", rather than using device's scan. */
2941 if (cfg->mod_params->disable_hw_scan) {
2942 if (iwl_debug_level & IWL_DL_INFO)
2943 dev_printk(KERN_DEBUG, &(pdev->dev),
2944 "Disabling hw_scan\n");
2945 iwl_hw_ops.hw_scan = NULL;
2948 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2954 /* At this point both hw and priv are allocated. */
2956 SET_IEEE80211_DEV(hw, &pdev->dev);
2958 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2960 priv->pci_dev = pdev;
2961 priv->inta_mask = CSR_INI_SET_MASK;
2963 #ifdef CONFIG_IWLWIFI_DEBUG
2964 atomic_set(&priv->restrict_refcnt, 0);
2966 if (iwl_alloc_traffic_mem(priv))
2967 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2969 /**************************
2970 * 2. Initializing PCI bus
2971 **************************/
2972 if (pci_enable_device(pdev)) {
2974 goto out_ieee80211_free_hw;
2977 pci_set_master(pdev);
2979 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2981 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2983 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2985 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2986 /* both attempts failed: */
2988 IWL_WARN(priv, "No suitable DMA available.\n");
2989 goto out_pci_disable_device;
2993 err = pci_request_regions(pdev, DRV_NAME);
2995 goto out_pci_disable_device;
2997 pci_set_drvdata(pdev, priv);
3000 /***********************
3001 * 3. Read REV register
3002 ***********************/
3003 priv->hw_base = pci_iomap(pdev, 0, 0);
3004 if (!priv->hw_base) {
3006 goto out_pci_release_regions;
3009 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3010 (unsigned long long) pci_resource_len(pdev, 0));
3011 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3013 /* this spin lock will be used in apm_ops.init and EEPROM access
3014 * we should init now
3016 spin_lock_init(&priv->reg_lock);
3017 iwl_hw_detect(priv);
3018 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3019 priv->cfg->name, priv->hw_rev);
3021 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3022 * PCI Tx retries from interfering with C3 CPU state */
3023 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3025 iwl_prepare_card_hw(priv);
3026 if (!priv->hw_ready) {
3027 IWL_WARN(priv, "Failed, HW not ready\n");
3032 err = priv->cfg->ops->lib->apm_ops.init(priv);
3034 IWL_ERR(priv, "Failed to init APMG\n");
3040 /* Read the EEPROM */
3041 err = iwl_eeprom_init(priv);
3043 IWL_ERR(priv, "Unable to init EEPROM\n");
3046 err = iwl_eeprom_check_version(priv);
3048 goto out_free_eeprom;
3050 /* extract MAC Address */
3051 iwl_eeprom_get_mac(priv, priv->mac_addr);
3052 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3053 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3055 /************************
3056 * 5. Setup HW constants
3057 ************************/
3058 if (iwl_set_hw_params(priv)) {
3059 IWL_ERR(priv, "failed to set hw parameters\n");
3060 goto out_free_eeprom;
3063 /*******************
3065 *******************/
3067 err = iwl_init_drv(priv);
3069 goto out_free_eeprom;
3070 /* At this point both hw and priv are initialized. */
3072 /********************
3074 ********************/
3075 spin_lock_irqsave(&priv->lock, flags);
3076 iwl_disable_interrupts(priv);
3077 spin_unlock_irqrestore(&priv->lock, flags);
3079 pci_enable_msi(priv->pci_dev);
3081 iwl_alloc_isr_ict(priv);
3082 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3083 IRQF_SHARED, DRV_NAME, priv);
3085 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3086 goto out_disable_msi;
3088 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3090 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3094 iwl_setup_deferred_work(priv);
3095 iwl_setup_rx_handlers(priv);
3097 /**********************************
3098 * 8. Setup and register mac80211
3099 **********************************/
3101 /* enable interrupts if needed: hw bug w/a */
3102 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3103 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3104 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3105 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3108 iwl_enable_interrupts(priv);
3110 err = iwl_setup_mac(priv);
3112 goto out_remove_sysfs;
3114 err = iwl_dbgfs_register(priv, DRV_NAME);
3116 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3118 /* If platform's RF_KILL switch is NOT set to KILL */
3119 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3120 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3122 set_bit(STATUS_RF_KILL_HW, &priv->status);
3124 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3125 test_bit(STATUS_RF_KILL_HW, &priv->status));
3127 iwl_power_initialize(priv);
3128 iwl_tt_initialize(priv);
3132 destroy_workqueue(priv->workqueue);
3133 priv->workqueue = NULL;
3134 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3136 free_irq(priv->pci_dev->irq, priv);
3137 iwl_free_isr_ict(priv);
3139 pci_disable_msi(priv->pci_dev);
3140 iwl_uninit_drv(priv);
3142 iwl_eeprom_free(priv);
3144 pci_iounmap(pdev, priv->hw_base);
3145 out_pci_release_regions:
3146 pci_set_drvdata(pdev, NULL);
3147 pci_release_regions(pdev);
3148 out_pci_disable_device:
3149 pci_disable_device(pdev);
3150 out_ieee80211_free_hw:
3151 ieee80211_free_hw(priv->hw);
3152 iwl_free_traffic_mem(priv);
3157 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3159 struct iwl_priv *priv = pci_get_drvdata(pdev);
3160 unsigned long flags;
3165 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3167 iwl_dbgfs_unregister(priv);
3168 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3170 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3171 * to be called and iwl_down since we are removing the device
3172 * we need to set STATUS_EXIT_PENDING bit.
3174 set_bit(STATUS_EXIT_PENDING, &priv->status);
3175 if (priv->mac80211_registered) {
3176 ieee80211_unregister_hw(priv->hw);
3177 priv->mac80211_registered = 0;
3184 /* make sure we flush any pending irq or
3185 * tasklet for the driver
3187 spin_lock_irqsave(&priv->lock, flags);
3188 iwl_disable_interrupts(priv);
3189 spin_unlock_irqrestore(&priv->lock, flags);
3191 iwl_synchronize_irq(priv);
3193 iwl_dealloc_ucode_pci(priv);
3196 iwl_rx_queue_free(priv, &priv->rxq);
3197 iwl_hw_txq_ctx_free(priv);
3199 iwl_clear_stations_table(priv);
3200 iwl_eeprom_free(priv);
3203 /*netif_stop_queue(dev); */
3204 flush_workqueue(priv->workqueue);
3206 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3207 * priv->workqueue... so we can't take down the workqueue
3209 destroy_workqueue(priv->workqueue);
3210 priv->workqueue = NULL;
3211 iwl_free_traffic_mem(priv);
3213 free_irq(priv->pci_dev->irq, priv);
3214 pci_disable_msi(priv->pci_dev);
3215 pci_iounmap(pdev, priv->hw_base);
3216 pci_release_regions(pdev);
3217 pci_disable_device(pdev);
3218 pci_set_drvdata(pdev, NULL);
3220 iwl_uninit_drv(priv);
3222 iwl_free_isr_ict(priv);
3224 if (priv->ibss_beacon)
3225 dev_kfree_skb(priv->ibss_beacon);
3227 ieee80211_free_hw(priv->hw);
3231 /*****************************************************************************
3233 * driver and module entry point
3235 *****************************************************************************/
3237 /* Hardware specific file defines the PCI IDs table for that hardware module */
3238 static struct pci_device_id iwl_hw_card_ids[] = {
3239 #ifdef CONFIG_IWL4965
3240 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3241 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3242 #endif /* CONFIG_IWL4965 */
3243 #ifdef CONFIG_IWL5000
3244 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3245 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3246 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3247 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3248 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3249 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3250 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3251 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3252 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3253 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3254 /* 5350 WiFi/WiMax */
3255 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3256 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3257 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3258 /* 5150 Wifi/WiMax */
3259 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3260 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3263 {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3264 {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3265 {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3266 {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3267 {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3268 {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3269 {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3271 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3272 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3273 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3274 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3275 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3276 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3277 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3278 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3279 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3280 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3282 /* 6x50 WiFi/WiMax Series */
3283 {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3284 {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3285 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3286 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3287 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3288 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3289 {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3290 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3291 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3293 /* 1000 Series WiFi */
3294 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3295 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3296 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3297 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3298 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3299 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3300 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3301 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3302 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3303 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3304 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3305 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3306 #endif /* CONFIG_IWL5000 */
3310 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3312 static struct pci_driver iwl_driver = {
3314 .id_table = iwl_hw_card_ids,
3315 .probe = iwl_pci_probe,
3316 .remove = __devexit_p(iwl_pci_remove),
3318 .suspend = iwl_pci_suspend,
3319 .resume = iwl_pci_resume,
3323 static int __init iwl_init(void)
3327 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3328 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3330 ret = iwlagn_rate_control_register();
3332 printk(KERN_ERR DRV_NAME
3333 "Unable to register rate control algorithm: %d\n", ret);
3337 ret = pci_register_driver(&iwl_driver);
3339 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3340 goto error_register;
3346 iwlagn_rate_control_unregister();
3350 static void __exit iwl_exit(void)
3352 pci_unregister_driver(&iwl_driver);
3353 iwlagn_rate_control_unregister();
3356 module_exit(iwl_exit);
3357 module_init(iwl_init);
3359 #ifdef CONFIG_IWLWIFI_DEBUG
3360 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3361 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3362 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3363 MODULE_PARM_DESC(debug, "debug output mask");