0878b34ee5861fb4acafb3bd494a89fbb6c291d3
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME        "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59  *
60  * module boiler plate
61  *
62  ******************************************************************************/
63
64 /*
65  * module name, copyright, version, etc.
66  */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91  * mac80211 should be examined to determine if sta_info is duplicating
92  * the functionality provided here
93  */
94
95 /**************************************************************/
96
97 /**
98  * iwl_commit_rxon - commit staging_rxon to hardware
99  *
100  * The RXON command in staging_rxon is committed to the hardware and
101  * the active_rxon structure is updated with the new data.  This
102  * function correctly transitions out of the RXON_ASSOC_MSK state if
103  * a HW tune is required based on the RXON structure changes.
104  */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107         /* cast away the const for active_rxon in this function */
108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109         int ret;
110         bool new_assoc =
111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113         if (!iwl_is_alive(priv))
114                 return -EBUSY;
115
116         /* always get timestamp with Rx frame */
117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119         ret = iwl_check_rxon_cmd(priv);
120         if (ret) {
121                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
122                 return -EINVAL;
123         }
124
125         /* If we don't need to send a full RXON, we can use
126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
127          * and other flags for the current radio configuration. */
128         if (!iwl_full_rxon_required(priv)) {
129                 ret = iwl_send_rxon_assoc(priv);
130                 if (ret) {
131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132                         return ret;
133                 }
134
135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136                 return 0;
137         }
138
139         /* station table will be cleared */
140         priv->assoc_station_added = 0;
141
142         /* If we are currently associated and the new config requires
143          * an RXON_ASSOC and the new config wants the associated mask enabled,
144          * we must clear the associated from the active configuration
145          * before we apply the new config */
146         if (iwl_is_associated(priv) && new_assoc) {
147                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
149
150                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151                                       sizeof(struct iwl_rxon_cmd),
152                                       &priv->active_rxon);
153
154                 /* If the mask clearing failed then we set
155                  * active_rxon back to what it was previously */
156                 if (ret) {
157                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
159                         return ret;
160                 }
161         }
162
163         IWL_DEBUG_INFO(priv, "Sending RXON\n"
164                        "* with%s RXON_FILTER_ASSOC_MSK\n"
165                        "* channel = %d\n"
166                        "* bssid = %pM\n",
167                        (new_assoc ? "" : "out"),
168                        le16_to_cpu(priv->staging_rxon.channel),
169                        priv->staging_rxon.bssid_addr);
170
171         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173         /* Apply the new configuration
174          * RXON unassoc clears the station table in uCode, send it before
175          * we add the bcast station. If assoc bit is set, we will send RXON
176          * after having added the bcast and bssid station.
177          */
178         if (!new_assoc) {
179                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
181                 if (ret) {
182                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
183                         return ret;
184                 }
185                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186         }
187
188         iwl_clear_stations_table(priv);
189
190         priv->start_calib = 0;
191
192         /* Add the broadcast address so we can send broadcast frames */
193         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194                                                 IWL_INVALID_STATION) {
195                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
196                 return -EIO;
197         }
198
199         /* If we have set the ASSOC_MSK and we are in BSS mode then
200          * add the IWL_AP_ID to the station rate table */
201         if (new_assoc) {
202                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203                         ret = iwl_rxon_add_station(priv,
204                                            priv->active_rxon.bssid_addr, 1);
205                         if (ret == IWL_INVALID_STATION) {
206                                 IWL_ERR(priv,
207                                         "Error adding AP address for TX.\n");
208                                 return -EIO;
209                         }
210                         priv->assoc_station_added = 1;
211                         if (priv->default_wep_key &&
212                             iwl_send_static_wepkey_cmd(priv, 0))
213                                 IWL_ERR(priv,
214                                         "Could not send WEP static key.\n");
215                 }
216
217                 /*
218                  * allow CTS-to-self if possible for new association.
219                  * this is relevant only for 5000 series and up,
220                  * but will not damage 4965
221                  */
222                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
223
224                 /* Apply the new configuration
225                  * RXON assoc doesn't clear the station table in uCode,
226                  */
227                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
229                 if (ret) {
230                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
231                         return ret;
232                 }
233                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
234         }
235
236         iwl_init_sensitivity(priv);
237
238         /* If we issue a new RXON command which required a tune then we must
239          * send a new TXPOWER command or we won't be able to Tx any frames */
240         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
241         if (ret) {
242                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
243                 return ret;
244         }
245
246         return 0;
247 }
248
249 void iwl_update_chain_flags(struct iwl_priv *priv)
250 {
251
252         if (priv->cfg->ops->hcmd->set_rxon_chain)
253                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254         iwlcore_commit_rxon(priv);
255 }
256
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
258 {
259         struct list_head *element;
260
261         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
262                        priv->frames_count);
263
264         while (!list_empty(&priv->free_frames)) {
265                 element = priv->free_frames.next;
266                 list_del(element);
267                 kfree(list_entry(element, struct iwl_frame, list));
268                 priv->frames_count--;
269         }
270
271         if (priv->frames_count) {
272                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
273                             priv->frames_count);
274                 priv->frames_count = 0;
275         }
276 }
277
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
279 {
280         struct iwl_frame *frame;
281         struct list_head *element;
282         if (list_empty(&priv->free_frames)) {
283                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
284                 if (!frame) {
285                         IWL_ERR(priv, "Could not allocate frame!\n");
286                         return NULL;
287                 }
288
289                 priv->frames_count++;
290                 return frame;
291         }
292
293         element = priv->free_frames.next;
294         list_del(element);
295         return list_entry(element, struct iwl_frame, list);
296 }
297
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
299 {
300         memset(frame, 0, sizeof(*frame));
301         list_add(&frame->list, &priv->free_frames);
302 }
303
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305                                           struct ieee80211_hdr *hdr,
306                                           int left)
307 {
308         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310              (priv->iw_mode != NL80211_IFTYPE_AP)))
311                 return 0;
312
313         if (priv->ibss_beacon->len > left)
314                 return 0;
315
316         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
317
318         return priv->ibss_beacon->len;
319 }
320
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322                                        struct iwl_frame *frame, u8 rate)
323 {
324         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325         unsigned int frame_size;
326
327         tx_beacon_cmd = &frame->u.beacon;
328         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
329
330         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
332
333         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
335
336         BUG_ON(frame_size > MAX_MPDU_SIZE);
337         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
338
339         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340                 tx_beacon_cmd->tx.rate_n_flags =
341                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
342         else
343                 tx_beacon_cmd->tx.rate_n_flags =
344                         iwl_hw_set_rate_n_flags(rate, 0);
345
346         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
347                                      TX_CMD_FLG_TSF_MSK |
348                                      TX_CMD_FLG_STA_RATE_MSK;
349
350         return sizeof(*tx_beacon_cmd) + frame_size;
351 }
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
353 {
354         struct iwl_frame *frame;
355         unsigned int frame_size;
356         int rc;
357         u8 rate;
358
359         frame = iwl_get_free_frame(priv);
360
361         if (!frame) {
362                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363                           "command.\n");
364                 return -ENOMEM;
365         }
366
367         rate = iwl_rate_get_lowest_plcp(priv);
368
369         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
370
371         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
372                               &frame->u.cmd[0]);
373
374         iwl_free_frame(priv, frame);
375
376         return rc;
377 }
378
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
380 {
381         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
382
383         dma_addr_t addr = get_unaligned_le32(&tb->lo);
384         if (sizeof(dma_addr_t) > sizeof(u32))
385                 addr |=
386                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387
388         return addr;
389 }
390
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
392 {
393         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
394
395         return le16_to_cpu(tb->hi_n_len) >> 4;
396 }
397
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399                                   dma_addr_t addr, u16 len)
400 {
401         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402         u16 hi_n_len = len << 4;
403
404         put_unaligned_le32(addr, &tb->lo);
405         if (sizeof(dma_addr_t) > sizeof(u32))
406                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
407
408         tb->hi_n_len = cpu_to_le16(hi_n_len);
409
410         tfd->num_tbs = idx + 1;
411 }
412
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
414 {
415         return tfd->num_tbs & 0x1f;
416 }
417
418 /**
419  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420  * @priv - driver private data
421  * @txq - tx queue
422  *
423  * Does NOT advance any TFD circular buffer read/write indexes
424  * Does NOT free the TFD itself (which is within circular buffer)
425  */
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
427 {
428         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
429         struct iwl_tfd *tfd;
430         struct pci_dev *dev = priv->pci_dev;
431         int index = txq->q.read_ptr;
432         int i;
433         int num_tbs;
434
435         tfd = &tfd_tmp[index];
436
437         /* Sanity check on number of chunks */
438         num_tbs = iwl_tfd_get_num_tbs(tfd);
439
440         if (num_tbs >= IWL_NUM_OF_TBS) {
441                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442                 /* @todo issue fatal error, it is quite serious situation */
443                 return;
444         }
445
446         /* Unmap tx_cmd */
447         if (num_tbs)
448                 pci_unmap_single(dev,
449                                 pci_unmap_addr(&txq->meta[index], mapping),
450                                 pci_unmap_len(&txq->meta[index], len),
451                                 PCI_DMA_BIDIRECTIONAL);
452
453         /* Unmap chunks, if any. */
454         for (i = 1; i < num_tbs; i++) {
455                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
457
458                 if (txq->txb) {
459                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461                 }
462         }
463 }
464
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466                                  struct iwl_tx_queue *txq,
467                                  dma_addr_t addr, u16 len,
468                                  u8 reset, u8 pad)
469 {
470         struct iwl_queue *q;
471         struct iwl_tfd *tfd, *tfd_tmp;
472         u32 num_tbs;
473
474         q = &txq->q;
475         tfd_tmp = (struct iwl_tfd *)txq->tfds;
476         tfd = &tfd_tmp[q->write_ptr];
477
478         if (reset)
479                 memset(tfd, 0, sizeof(*tfd));
480
481         num_tbs = iwl_tfd_get_num_tbs(tfd);
482
483         /* Each TFD can point to a maximum 20 Tx buffers */
484         if (num_tbs >= IWL_NUM_OF_TBS) {
485                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486                           IWL_NUM_OF_TBS);
487                 return -EINVAL;
488         }
489
490         BUG_ON(addr & ~DMA_BIT_MASK(36));
491         if (unlikely(addr & ~IWL_TX_DMA_MASK))
492                 IWL_ERR(priv, "Unaligned address = %llx\n",
493                           (unsigned long long)addr);
494
495         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
496
497         return 0;
498 }
499
500 /*
501  * Tell nic where to find circular buffer of Tx Frame Descriptors for
502  * given Tx queue, and enable the DMA channel used for that queue.
503  *
504  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505  * channels supported in hardware.
506  */
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508                          struct iwl_tx_queue *txq)
509 {
510         int txq_id = txq->q.id;
511
512         /* Circular buffer (TFD queue in DRAM) physical base address */
513         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514                              txq->q.dma_addr >> 8);
515
516         return 0;
517 }
518
519 /******************************************************************************
520  *
521  * Generic RX handler implementations
522  *
523  ******************************************************************************/
524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
525                                 struct iwl_rx_mem_buffer *rxb)
526 {
527         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
528         struct iwl_alive_resp *palive;
529         struct delayed_work *pwork;
530
531         palive = &pkt->u.alive_frame;
532
533         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
534                        "0x%01X 0x%01X\n",
535                        palive->is_valid, palive->ver_type,
536                        palive->ver_subtype);
537
538         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
539                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
540                 memcpy(&priv->card_alive_init,
541                        &pkt->u.alive_frame,
542                        sizeof(struct iwl_init_alive_resp));
543                 pwork = &priv->init_alive_start;
544         } else {
545                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
546                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547                        sizeof(struct iwl_alive_resp));
548                 pwork = &priv->alive_start;
549         }
550
551         /* We delay the ALIVE response by 5ms to
552          * give the HW RF Kill time to activate... */
553         if (palive->is_valid == UCODE_VALID_OK)
554                 queue_delayed_work(priv->workqueue, pwork,
555                                    msecs_to_jiffies(5));
556         else
557                 IWL_WARN(priv, "uCode did not respond OK.\n");
558 }
559
560 static void iwl_bg_beacon_update(struct work_struct *work)
561 {
562         struct iwl_priv *priv =
563                 container_of(work, struct iwl_priv, beacon_update);
564         struct sk_buff *beacon;
565
566         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
568
569         if (!beacon) {
570                 IWL_ERR(priv, "update beacon failed\n");
571                 return;
572         }
573
574         mutex_lock(&priv->mutex);
575         /* new beacon skb is allocated every time; dispose previous.*/
576         if (priv->ibss_beacon)
577                 dev_kfree_skb(priv->ibss_beacon);
578
579         priv->ibss_beacon = beacon;
580         mutex_unlock(&priv->mutex);
581
582         iwl_send_beacon_cmd(priv);
583 }
584
585 /**
586  * iwl_bg_statistics_periodic - Timer callback to queue statistics
587  *
588  * This callback is provided in order to send a statistics request.
589  *
590  * This timer function is continually reset to execute within
591  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592  * was received.  We need to ensure we receive the statistics in order
593  * to update the temperature used for calibrating the TXPOWER.
594  */
595 static void iwl_bg_statistics_periodic(unsigned long data)
596 {
597         struct iwl_priv *priv = (struct iwl_priv *)data;
598
599         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
600                 return;
601
602         /* dont send host command if rf-kill is on */
603         if (!iwl_is_ready_rf(priv))
604                 return;
605
606         iwl_send_statistics_request(priv, CMD_ASYNC);
607 }
608
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610                                 struct iwl_rx_mem_buffer *rxb)
611 {
612 #ifdef CONFIG_IWLWIFI_DEBUG
613         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
614         struct iwl4965_beacon_notif *beacon =
615                 (struct iwl4965_beacon_notif *)pkt->u.raw;
616         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
617
618         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619                 "tsf %d %d rate %d\n",
620                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621                 beacon->beacon_notify_hdr.failure_frame,
622                 le32_to_cpu(beacon->ibss_mgr_status),
623                 le32_to_cpu(beacon->high_tsf),
624                 le32_to_cpu(beacon->low_tsf), rate);
625 #endif
626
627         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629                 queue_work(priv->workqueue, &priv->beacon_update);
630 }
631
632 /* Handle notification from uCode that card's power state is changing
633  * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635                                     struct iwl_rx_mem_buffer *rxb)
636 {
637         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
638         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639         unsigned long status = priv->status;
640
641         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
644
645         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
646                      RF_CARD_DISABLED)) {
647
648                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
650
651                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
653
654                 if (!(flags & RXON_CARD_DISABLED)) {
655                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
659                 }
660                 if (flags & RF_CARD_DISABLED)
661                         iwl_tt_enter_ct_kill(priv);
662         }
663         if (!(flags & RF_CARD_DISABLED))
664                 iwl_tt_exit_ct_kill(priv);
665
666         if (flags & HW_CARD_DISABLED)
667                 set_bit(STATUS_RF_KILL_HW, &priv->status);
668         else
669                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
670
671
672         if (!(flags & RXON_CARD_DISABLED))
673                 iwl_scan_cancel(priv);
674
675         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676              test_bit(STATUS_RF_KILL_HW, &priv->status)))
677                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678                         test_bit(STATUS_RF_KILL_HW, &priv->status));
679         else
680                 wake_up_interruptible(&priv->wait_command_queue);
681 }
682
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
684 {
685         if (src == IWL_PWR_SRC_VAUX) {
686                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
690         } else {
691                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
694         }
695
696         return 0;
697 }
698
699 /**
700  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
701  *
702  * Setup the RX handlers for each of the reply types sent from the uCode
703  * to the host.
704  *
705  * This function chains into the hardware specific files for them to setup
706  * any hardware specific handlers as well.
707  */
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
709 {
710         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715             iwl_rx_pm_debug_statistics_notif;
716         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
717
718         /*
719          * The same handler is used for both the REPLY to a discrete
720          * statistics request from the host as well as for the periodic
721          * statistics notifications (after received beacons) from the uCode.
722          */
723         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
725
726         iwl_setup_spectrum_handlers(priv);
727         iwl_setup_rx_scan_handlers(priv);
728
729         /* status change handler */
730         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
731
732         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733             iwl_rx_missed_beacon_notif;
734         /* Rx handlers */
735         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
737         /* block ack */
738         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739         /* Set up hardware specific Rx handlers */
740         priv->cfg->ops->lib->rx_handler_setup(priv);
741 }
742
743 /**
744  * iwl_rx_handle - Main entry function for receiving responses from uCode
745  *
746  * Uses the priv->rx_handlers callback function array to invoke
747  * the appropriate handlers, including command responses,
748  * frame-received notifications, and other notifications.
749  */
750 void iwl_rx_handle(struct iwl_priv *priv)
751 {
752         struct iwl_rx_mem_buffer *rxb;
753         struct iwl_rx_packet *pkt;
754         struct iwl_rx_queue *rxq = &priv->rxq;
755         u32 r, i;
756         int reclaim;
757         unsigned long flags;
758         u8 fill_rx = 0;
759         u32 count = 8;
760         int total_empty;
761
762         /* uCode's read index (stored in shared DRAM) indicates the last Rx
763          * buffer that the driver may process (last buffer filled by ucode). */
764         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
765         i = rxq->read;
766
767         /* Rx interrupt, but nothing sent from uCode */
768         if (i == r)
769                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
770
771         /* calculate total frames need to be restock after handling RX */
772         total_empty = r - priv->rxq.write_actual;
773         if (total_empty < 0)
774                 total_empty += RX_QUEUE_SIZE;
775
776         if (total_empty > (RX_QUEUE_SIZE / 2))
777                 fill_rx = 1;
778
779         while (i != r) {
780                 rxb = rxq->queue[i];
781
782                 /* If an RXB doesn't have a Rx queue slot associated with it,
783                  * then a bug has been introduced in the queue refilling
784                  * routines -- catch it here */
785                 BUG_ON(rxb == NULL);
786
787                 rxq->queue[i] = NULL;
788
789                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
790                                  priv->hw_params.rx_buf_size + 256,
791                                  PCI_DMA_FROMDEVICE);
792                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
793
794                 trace_iwlwifi_dev_rx(priv, pkt,
795                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
796
797                 /* Reclaim a command buffer only if this packet is a response
798                  *   to a (driver-originated) command.
799                  * If the packet (e.g. Rx frame) originated from uCode,
800                  *   there is no command buffer to reclaim.
801                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
802                  *   but apparently a few don't get set; catch them here. */
803                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
804                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
805                         (pkt->hdr.cmd != REPLY_RX) &&
806                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
807                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
808                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
809                         (pkt->hdr.cmd != REPLY_TX);
810
811                 /* Based on type of command response or notification,
812                  *   handle those that need handling via function in
813                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
814                 if (priv->rx_handlers[pkt->hdr.cmd]) {
815                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
816                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
817                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
818                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
819                 } else {
820                         /* No handling needed */
821                         IWL_DEBUG_RX(priv,
822                                 "r %d i %d No handler needed for %s, 0x%02x\n",
823                                 r, i, get_cmd_string(pkt->hdr.cmd),
824                                 pkt->hdr.cmd);
825                 }
826
827                 if (reclaim) {
828                         /* Invoke any callbacks, transfer the skb to caller, and
829                          * fire off the (possibly) blocking iwl_send_cmd()
830                          * as we reclaim the driver command queue */
831                         if (rxb && rxb->skb)
832                                 iwl_tx_cmd_complete(priv, rxb);
833                         else
834                                 IWL_WARN(priv, "Claim null rxb?\n");
835                 }
836
837                 /* For now we just don't re-use anything.  We can tweak this
838                  * later to try and re-use notification packets and SKBs that
839                  * fail to Rx correctly */
840                 if (rxb->skb != NULL) {
841                         priv->alloc_rxb_skb--;
842                         dev_kfree_skb_any(rxb->skb);
843                         rxb->skb = NULL;
844                 }
845
846                 spin_lock_irqsave(&rxq->lock, flags);
847                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
848                 spin_unlock_irqrestore(&rxq->lock, flags);
849                 i = (i + 1) & RX_QUEUE_MASK;
850                 /* If there are a lot of unused frames,
851                  * restock the Rx queue so ucode wont assert. */
852                 if (fill_rx) {
853                         count++;
854                         if (count >= 8) {
855                                 priv->rxq.read = i;
856                                 iwl_rx_replenish_now(priv);
857                                 count = 0;
858                         }
859                 }
860         }
861
862         /* Backtrack one entry */
863         priv->rxq.read = i;
864         if (fill_rx)
865                 iwl_rx_replenish_now(priv);
866         else
867                 iwl_rx_queue_restock(priv);
868 }
869
870 /* call this function to flush any scheduled tasklet */
871 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
872 {
873         /* wait to make sure we flush pending tasklet*/
874         synchronize_irq(priv->pci_dev->irq);
875         tasklet_kill(&priv->irq_tasklet);
876 }
877
878 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
879 {
880         u32 inta, handled = 0;
881         u32 inta_fh;
882         unsigned long flags;
883 #ifdef CONFIG_IWLWIFI_DEBUG
884         u32 inta_mask;
885 #endif
886
887         spin_lock_irqsave(&priv->lock, flags);
888
889         /* Ack/clear/reset pending uCode interrupts.
890          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
891          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
892         inta = iwl_read32(priv, CSR_INT);
893         iwl_write32(priv, CSR_INT, inta);
894
895         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
896          * Any new interrupts that happen after this, either while we're
897          * in this tasklet, or later, will show up in next ISR/tasklet. */
898         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
899         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
900
901 #ifdef CONFIG_IWLWIFI_DEBUG
902         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
903                 /* just for debug */
904                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
905                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
906                               inta, inta_mask, inta_fh);
907         }
908 #endif
909
910         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
911          * atomic, make sure that inta covers all the interrupts that
912          * we've discovered, even if FH interrupt came in just after
913          * reading CSR_INT. */
914         if (inta_fh & CSR49_FH_INT_RX_MASK)
915                 inta |= CSR_INT_BIT_FH_RX;
916         if (inta_fh & CSR49_FH_INT_TX_MASK)
917                 inta |= CSR_INT_BIT_FH_TX;
918
919         /* Now service all interrupt bits discovered above. */
920         if (inta & CSR_INT_BIT_HW_ERR) {
921                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
922
923                 /* Tell the device to stop sending interrupts */
924                 iwl_disable_interrupts(priv);
925
926                 priv->isr_stats.hw++;
927                 iwl_irq_handle_error(priv);
928
929                 handled |= CSR_INT_BIT_HW_ERR;
930
931                 spin_unlock_irqrestore(&priv->lock, flags);
932
933                 return;
934         }
935
936 #ifdef CONFIG_IWLWIFI_DEBUG
937         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
938                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
939                 if (inta & CSR_INT_BIT_SCD) {
940                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
941                                       "the frame/frames.\n");
942                         priv->isr_stats.sch++;
943                 }
944
945                 /* Alive notification via Rx interrupt will do the real work */
946                 if (inta & CSR_INT_BIT_ALIVE) {
947                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
948                         priv->isr_stats.alive++;
949                 }
950         }
951 #endif
952         /* Safely ignore these bits for debug checks below */
953         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
954
955         /* HW RF KILL switch toggled */
956         if (inta & CSR_INT_BIT_RF_KILL) {
957                 int hw_rf_kill = 0;
958                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
959                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
960                         hw_rf_kill = 1;
961
962                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
963                                 hw_rf_kill ? "disable radio" : "enable radio");
964
965                 priv->isr_stats.rfkill++;
966
967                 /* driver only loads ucode once setting the interface up.
968                  * the driver allows loading the ucode even if the radio
969                  * is killed. Hence update the killswitch state here. The
970                  * rfkill handler will care about restarting if needed.
971                  */
972                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
973                         if (hw_rf_kill)
974                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
975                         else
976                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
977                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
978                 }
979
980                 handled |= CSR_INT_BIT_RF_KILL;
981         }
982
983         /* Chip got too hot and stopped itself */
984         if (inta & CSR_INT_BIT_CT_KILL) {
985                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
986                 priv->isr_stats.ctkill++;
987                 handled |= CSR_INT_BIT_CT_KILL;
988         }
989
990         /* Error detected by uCode */
991         if (inta & CSR_INT_BIT_SW_ERR) {
992                 IWL_ERR(priv, "Microcode SW error detected. "
993                         " Restarting 0x%X.\n", inta);
994                 priv->isr_stats.sw++;
995                 priv->isr_stats.sw_err = inta;
996                 iwl_irq_handle_error(priv);
997                 handled |= CSR_INT_BIT_SW_ERR;
998         }
999
1000         /* uCode wakes up after power-down sleep */
1001         if (inta & CSR_INT_BIT_WAKEUP) {
1002                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1003                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1004                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1005                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1006                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1007                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1008                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1009                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1010
1011                 priv->isr_stats.wakeup++;
1012
1013                 handled |= CSR_INT_BIT_WAKEUP;
1014         }
1015
1016         /* All uCode command responses, including Tx command responses,
1017          * Rx "responses" (frame-received notification), and other
1018          * notifications from uCode come through here*/
1019         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1020                 iwl_rx_handle(priv);
1021                 priv->isr_stats.rx++;
1022                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1023         }
1024
1025         if (inta & CSR_INT_BIT_FH_TX) {
1026                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1027                 priv->isr_stats.tx++;
1028                 handled |= CSR_INT_BIT_FH_TX;
1029                 /* FH finished to write, send event */
1030                 priv->ucode_write_complete = 1;
1031                 wake_up_interruptible(&priv->wait_command_queue);
1032         }
1033
1034         if (inta & ~handled) {
1035                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1036                 priv->isr_stats.unhandled++;
1037         }
1038
1039         if (inta & ~(priv->inta_mask)) {
1040                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1041                          inta & ~priv->inta_mask);
1042                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1043         }
1044
1045         /* Re-enable all interrupts */
1046         /* only Re-enable if diabled by irq */
1047         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1048                 iwl_enable_interrupts(priv);
1049
1050 #ifdef CONFIG_IWLWIFI_DEBUG
1051         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1052                 inta = iwl_read32(priv, CSR_INT);
1053                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1054                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1055                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1056                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1057         }
1058 #endif
1059         spin_unlock_irqrestore(&priv->lock, flags);
1060 }
1061
1062 /* tasklet for iwlagn interrupt */
1063 static void iwl_irq_tasklet(struct iwl_priv *priv)
1064 {
1065         u32 inta = 0;
1066         u32 handled = 0;
1067         unsigned long flags;
1068 #ifdef CONFIG_IWLWIFI_DEBUG
1069         u32 inta_mask;
1070 #endif
1071
1072         spin_lock_irqsave(&priv->lock, flags);
1073
1074         /* Ack/clear/reset pending uCode interrupts.
1075          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1076          */
1077         iwl_write32(priv, CSR_INT, priv->inta);
1078
1079         inta = priv->inta;
1080
1081 #ifdef CONFIG_IWLWIFI_DEBUG
1082         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1083                 /* just for debug */
1084                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1085                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1086                                 inta, inta_mask);
1087         }
1088 #endif
1089         /* saved interrupt in inta variable now we can reset priv->inta */
1090         priv->inta = 0;
1091
1092         /* Now service all interrupt bits discovered above. */
1093         if (inta & CSR_INT_BIT_HW_ERR) {
1094                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1095
1096                 /* Tell the device to stop sending interrupts */
1097                 iwl_disable_interrupts(priv);
1098
1099                 priv->isr_stats.hw++;
1100                 iwl_irq_handle_error(priv);
1101
1102                 handled |= CSR_INT_BIT_HW_ERR;
1103
1104                 spin_unlock_irqrestore(&priv->lock, flags);
1105
1106                 return;
1107         }
1108
1109 #ifdef CONFIG_IWLWIFI_DEBUG
1110         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1111                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1112                 if (inta & CSR_INT_BIT_SCD) {
1113                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1114                                       "the frame/frames.\n");
1115                         priv->isr_stats.sch++;
1116                 }
1117
1118                 /* Alive notification via Rx interrupt will do the real work */
1119                 if (inta & CSR_INT_BIT_ALIVE) {
1120                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1121                         priv->isr_stats.alive++;
1122                 }
1123         }
1124 #endif
1125         /* Safely ignore these bits for debug checks below */
1126         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1127
1128         /* HW RF KILL switch toggled */
1129         if (inta & CSR_INT_BIT_RF_KILL) {
1130                 int hw_rf_kill = 0;
1131                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1132                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1133                         hw_rf_kill = 1;
1134
1135                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1136                                 hw_rf_kill ? "disable radio" : "enable radio");
1137
1138                 priv->isr_stats.rfkill++;
1139
1140                 /* driver only loads ucode once setting the interface up.
1141                  * the driver allows loading the ucode even if the radio
1142                  * is killed. Hence update the killswitch state here. The
1143                  * rfkill handler will care about restarting if needed.
1144                  */
1145                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1146                         if (hw_rf_kill)
1147                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1148                         else
1149                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1150                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1151                 }
1152
1153                 handled |= CSR_INT_BIT_RF_KILL;
1154         }
1155
1156         /* Chip got too hot and stopped itself */
1157         if (inta & CSR_INT_BIT_CT_KILL) {
1158                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1159                 priv->isr_stats.ctkill++;
1160                 handled |= CSR_INT_BIT_CT_KILL;
1161         }
1162
1163         /* Error detected by uCode */
1164         if (inta & CSR_INT_BIT_SW_ERR) {
1165                 IWL_ERR(priv, "Microcode SW error detected. "
1166                         " Restarting 0x%X.\n", inta);
1167                 priv->isr_stats.sw++;
1168                 priv->isr_stats.sw_err = inta;
1169                 iwl_irq_handle_error(priv);
1170                 handled |= CSR_INT_BIT_SW_ERR;
1171         }
1172
1173         /* uCode wakes up after power-down sleep */
1174         if (inta & CSR_INT_BIT_WAKEUP) {
1175                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1176                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1177                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1178                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1179                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1180                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1181                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1182                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1183
1184                 priv->isr_stats.wakeup++;
1185
1186                 handled |= CSR_INT_BIT_WAKEUP;
1187         }
1188
1189         /* All uCode command responses, including Tx command responses,
1190          * Rx "responses" (frame-received notification), and other
1191          * notifications from uCode come through here*/
1192         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1193                         CSR_INT_BIT_RX_PERIODIC)) {
1194                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1195                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1196                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1197                         iwl_write32(priv, CSR_FH_INT_STATUS,
1198                                         CSR49_FH_INT_RX_MASK);
1199                 }
1200                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1201                         handled |= CSR_INT_BIT_RX_PERIODIC;
1202                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1203                 }
1204                 /* Sending RX interrupt require many steps to be done in the
1205                  * the device:
1206                  * 1- write interrupt to current index in ICT table.
1207                  * 2- dma RX frame.
1208                  * 3- update RX shared data to indicate last write index.
1209                  * 4- send interrupt.
1210                  * This could lead to RX race, driver could receive RX interrupt
1211                  * but the shared data changes does not reflect this.
1212                  * this could lead to RX race, RX periodic will solve this race
1213                  */
1214                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1215                             CSR_INT_PERIODIC_DIS);
1216                 iwl_rx_handle(priv);
1217                 /* Only set RX periodic if real RX is received. */
1218                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1219                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1220                                     CSR_INT_PERIODIC_ENA);
1221
1222                 priv->isr_stats.rx++;
1223         }
1224
1225         if (inta & CSR_INT_BIT_FH_TX) {
1226                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1227                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1228                 priv->isr_stats.tx++;
1229                 handled |= CSR_INT_BIT_FH_TX;
1230                 /* FH finished to write, send event */
1231                 priv->ucode_write_complete = 1;
1232                 wake_up_interruptible(&priv->wait_command_queue);
1233         }
1234
1235         if (inta & ~handled) {
1236                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1237                 priv->isr_stats.unhandled++;
1238         }
1239
1240         if (inta & ~(priv->inta_mask)) {
1241                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1242                          inta & ~priv->inta_mask);
1243         }
1244
1245
1246         /* Re-enable all interrupts */
1247         /* only Re-enable if diabled by irq */
1248         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1249                 iwl_enable_interrupts(priv);
1250
1251         spin_unlock_irqrestore(&priv->lock, flags);
1252
1253 }
1254
1255
1256 /******************************************************************************
1257  *
1258  * uCode download functions
1259  *
1260  ******************************************************************************/
1261
1262 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1263 {
1264         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1265         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1266         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1267         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1268         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1269         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1270 }
1271
1272 static void iwl_nic_start(struct iwl_priv *priv)
1273 {
1274         /* Remove all resets to allow NIC to operate */
1275         iwl_write32(priv, CSR_RESET, 0);
1276 }
1277
1278
1279 /**
1280  * iwl_read_ucode - Read uCode images from disk file.
1281  *
1282  * Copy into buffers for card to fetch via bus-mastering
1283  */
1284 static int iwl_read_ucode(struct iwl_priv *priv)
1285 {
1286         struct iwl_ucode_header *ucode;
1287         int ret = -EINVAL, index;
1288         const struct firmware *ucode_raw;
1289         const char *name_pre = priv->cfg->fw_name_pre;
1290         const unsigned int api_max = priv->cfg->ucode_api_max;
1291         const unsigned int api_min = priv->cfg->ucode_api_min;
1292         char buf[25];
1293         u8 *src;
1294         size_t len;
1295         u32 api_ver, build;
1296         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1297         u16 eeprom_ver;
1298
1299         /* Ask kernel firmware_class module to get the boot firmware off disk.
1300          * request_firmware() is synchronous, file is in memory on return. */
1301         for (index = api_max; index >= api_min; index--) {
1302                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1303                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1304                 if (ret < 0) {
1305                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1306                                   buf, ret);
1307                         if (ret == -ENOENT)
1308                                 continue;
1309                         else
1310                                 goto error;
1311                 } else {
1312                         if (index < api_max)
1313                                 IWL_ERR(priv, "Loaded firmware %s, "
1314                                         "which is deprecated. "
1315                                         "Please use API v%u instead.\n",
1316                                           buf, api_max);
1317
1318                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1319                                        buf, ucode_raw->size);
1320                         break;
1321                 }
1322         }
1323
1324         if (ret < 0)
1325                 goto error;
1326
1327         /* Make sure that we got at least the v1 header! */
1328         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1329                 IWL_ERR(priv, "File size way too small!\n");
1330                 ret = -EINVAL;
1331                 goto err_release;
1332         }
1333
1334         /* Data from ucode file:  header followed by uCode images */
1335         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1336
1337         priv->ucode_ver = le32_to_cpu(ucode->ver);
1338         api_ver = IWL_UCODE_API(priv->ucode_ver);
1339         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1340         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1341         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1342         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1343         init_data_size =
1344                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1345         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1346         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1347
1348         /* api_ver should match the api version forming part of the
1349          * firmware filename ... but we don't check for that and only rely
1350          * on the API version read from firmware header from here on forward */
1351
1352         if (api_ver < api_min || api_ver > api_max) {
1353                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1354                           "Driver supports v%u, firmware is v%u.\n",
1355                           api_max, api_ver);
1356                 priv->ucode_ver = 0;
1357                 ret = -EINVAL;
1358                 goto err_release;
1359         }
1360         if (api_ver != api_max)
1361                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1362                           "got v%u. New firmware can be obtained "
1363                           "from http://www.intellinuxwireless.org.\n",
1364                           api_max, api_ver);
1365
1366         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1367                IWL_UCODE_MAJOR(priv->ucode_ver),
1368                IWL_UCODE_MINOR(priv->ucode_ver),
1369                IWL_UCODE_API(priv->ucode_ver),
1370                IWL_UCODE_SERIAL(priv->ucode_ver));
1371
1372         if (build)
1373                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1374
1375         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1376         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1377                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1378                        ? "OTP" : "EEPROM", eeprom_ver);
1379
1380         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1381                        priv->ucode_ver);
1382         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1383                        inst_size);
1384         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1385                        data_size);
1386         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1387                        init_size);
1388         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1389                        init_data_size);
1390         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1391                        boot_size);
1392
1393         /* Verify size of file vs. image size info in file's header */
1394         if (ucode_raw->size !=
1395                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1396                 inst_size + data_size + init_size +
1397                 init_data_size + boot_size) {
1398
1399                 IWL_DEBUG_INFO(priv,
1400                         "uCode file size %d does not match expected size\n",
1401                         (int)ucode_raw->size);
1402                 ret = -EINVAL;
1403                 goto err_release;
1404         }
1405
1406         /* Verify that uCode images will fit in card's SRAM */
1407         if (inst_size > priv->hw_params.max_inst_size) {
1408                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1409                                inst_size);
1410                 ret = -EINVAL;
1411                 goto err_release;
1412         }
1413
1414         if (data_size > priv->hw_params.max_data_size) {
1415                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1416                                 data_size);
1417                 ret = -EINVAL;
1418                 goto err_release;
1419         }
1420         if (init_size > priv->hw_params.max_inst_size) {
1421                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1422                         init_size);
1423                 ret = -EINVAL;
1424                 goto err_release;
1425         }
1426         if (init_data_size > priv->hw_params.max_data_size) {
1427                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1428                       init_data_size);
1429                 ret = -EINVAL;
1430                 goto err_release;
1431         }
1432         if (boot_size > priv->hw_params.max_bsm_size) {
1433                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1434                         boot_size);
1435                 ret = -EINVAL;
1436                 goto err_release;
1437         }
1438
1439         /* Allocate ucode buffers for card's bus-master loading ... */
1440
1441         /* Runtime instructions and 2 copies of data:
1442          * 1) unmodified from disk
1443          * 2) backup cache for save/restore during power-downs */
1444         priv->ucode_code.len = inst_size;
1445         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1446
1447         priv->ucode_data.len = data_size;
1448         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1449
1450         priv->ucode_data_backup.len = data_size;
1451         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1452
1453         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1454             !priv->ucode_data_backup.v_addr)
1455                 goto err_pci_alloc;
1456
1457         /* Initialization instructions and data */
1458         if (init_size && init_data_size) {
1459                 priv->ucode_init.len = init_size;
1460                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1461
1462                 priv->ucode_init_data.len = init_data_size;
1463                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1464
1465                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1466                         goto err_pci_alloc;
1467         }
1468
1469         /* Bootstrap (instructions only, no data) */
1470         if (boot_size) {
1471                 priv->ucode_boot.len = boot_size;
1472                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1473
1474                 if (!priv->ucode_boot.v_addr)
1475                         goto err_pci_alloc;
1476         }
1477
1478         /* Copy images into buffers for card's bus-master reads ... */
1479
1480         /* Runtime instructions (first block of data in file) */
1481         len = inst_size;
1482         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1483         memcpy(priv->ucode_code.v_addr, src, len);
1484         src += len;
1485
1486         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1487                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1488
1489         /* Runtime data (2nd block)
1490          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1491         len = data_size;
1492         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1493         memcpy(priv->ucode_data.v_addr, src, len);
1494         memcpy(priv->ucode_data_backup.v_addr, src, len);
1495         src += len;
1496
1497         /* Initialization instructions (3rd block) */
1498         if (init_size) {
1499                 len = init_size;
1500                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1501                                 len);
1502                 memcpy(priv->ucode_init.v_addr, src, len);
1503                 src += len;
1504         }
1505
1506         /* Initialization data (4th block) */
1507         if (init_data_size) {
1508                 len = init_data_size;
1509                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1510                                len);
1511                 memcpy(priv->ucode_init_data.v_addr, src, len);
1512                 src += len;
1513         }
1514
1515         /* Bootstrap instructions (5th block) */
1516         len = boot_size;
1517         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1518         memcpy(priv->ucode_boot.v_addr, src, len);
1519
1520         /* We have our copies now, allow OS release its copies */
1521         release_firmware(ucode_raw);
1522         return 0;
1523
1524  err_pci_alloc:
1525         IWL_ERR(priv, "failed to allocate pci memory\n");
1526         ret = -ENOMEM;
1527         iwl_dealloc_ucode_pci(priv);
1528
1529  err_release:
1530         release_firmware(ucode_raw);
1531
1532  error:
1533         return ret;
1534 }
1535
1536 #ifdef CONFIG_IWLWIFI_DEBUG
1537 static const char *desc_lookup_text[] = {
1538         "OK",
1539         "FAIL",
1540         "BAD_PARAM",
1541         "BAD_CHECKSUM",
1542         "NMI_INTERRUPT_WDG",
1543         "SYSASSERT",
1544         "FATAL_ERROR",
1545         "BAD_COMMAND",
1546         "HW_ERROR_TUNE_LOCK",
1547         "HW_ERROR_TEMPERATURE",
1548         "ILLEGAL_CHAN_FREQ",
1549         "VCC_NOT_STABLE",
1550         "FH_ERROR",
1551         "NMI_INTERRUPT_HOST",
1552         "NMI_INTERRUPT_ACTION_PT",
1553         "NMI_INTERRUPT_UNKNOWN",
1554         "UCODE_VERSION_MISMATCH",
1555         "HW_ERROR_ABS_LOCK",
1556         "HW_ERROR_CAL_LOCK_FAIL",
1557         "NMI_INTERRUPT_INST_ACTION_PT",
1558         "NMI_INTERRUPT_DATA_ACTION_PT",
1559         "NMI_TRM_HW_ER",
1560         "NMI_INTERRUPT_TRM",
1561         "NMI_INTERRUPT_BREAK_POINT"
1562         "DEBUG_0",
1563         "DEBUG_1",
1564         "DEBUG_2",
1565         "DEBUG_3",
1566         "UNKNOWN"
1567 };
1568
1569 static const char *desc_lookup(int i)
1570 {
1571         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1572
1573         if (i < 0 || i > max)
1574                 i = max;
1575
1576         return desc_lookup_text[i];
1577 }
1578
1579 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1580 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1581
1582 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1583 {
1584         u32 data2, line;
1585         u32 desc, time, count, base, data1;
1586         u32 blink1, blink2, ilink1, ilink2;
1587
1588         if (priv->ucode_type == UCODE_INIT)
1589                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1590         else
1591                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1592
1593         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1594                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1595                 return;
1596         }
1597
1598         count = iwl_read_targ_mem(priv, base);
1599
1600         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1601                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1602                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1603                         priv->status, count);
1604         }
1605
1606         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1607         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1608         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1609         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1610         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1611         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1612         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1613         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1614         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1615
1616         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1617                                       blink1, blink2, ilink1, ilink2);
1618
1619         IWL_ERR(priv, "Desc                               Time       "
1620                 "data1      data2      line\n");
1621         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1622                 desc_lookup(desc), desc, time, data1, data2, line);
1623         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1624         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1625                 ilink1, ilink2);
1626
1627 }
1628
1629 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1630
1631 /**
1632  * iwl_print_event_log - Dump error event log to syslog
1633  *
1634  */
1635 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1636                                 u32 num_events, u32 mode)
1637 {
1638         u32 i;
1639         u32 base;       /* SRAM byte address of event log header */
1640         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1641         u32 ptr;        /* SRAM byte address of log data */
1642         u32 ev, time, data; /* event log data */
1643
1644         if (num_events == 0)
1645                 return;
1646         if (priv->ucode_type == UCODE_INIT)
1647                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1648         else
1649                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1650
1651         if (mode == 0)
1652                 event_size = 2 * sizeof(u32);
1653         else
1654                 event_size = 3 * sizeof(u32);
1655
1656         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1657
1658         /* "time" is actually "data" for mode 0 (no timestamp).
1659         * place event id # at far right for easier visual parsing. */
1660         for (i = 0; i < num_events; i++) {
1661                 ev = iwl_read_targ_mem(priv, ptr);
1662                 ptr += sizeof(u32);
1663                 time = iwl_read_targ_mem(priv, ptr);
1664                 ptr += sizeof(u32);
1665                 if (mode == 0) {
1666                         /* data, ev */
1667                         trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1668                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1669                 } else {
1670                         data = iwl_read_targ_mem(priv, ptr);
1671                         ptr += sizeof(u32);
1672                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1673                                         time, data, ev);
1674                         trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1675                 }
1676         }
1677 }
1678
1679 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1680 {
1681         u32 base;       /* SRAM byte address of event log header */
1682         u32 capacity;   /* event log capacity in # entries */
1683         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1684         u32 num_wraps;  /* # times uCode wrapped to top of log */
1685         u32 next_entry; /* index of next entry to be written by uCode */
1686         u32 size;       /* # entries that we'll print */
1687
1688         if (priv->ucode_type == UCODE_INIT)
1689                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1690         else
1691                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1692
1693         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1694                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1695                 return;
1696         }
1697
1698         /* event log header */
1699         capacity = iwl_read_targ_mem(priv, base);
1700         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1701         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1702         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1703
1704         size = num_wraps ? capacity : next_entry;
1705
1706         /* bail out if nothing in log */
1707         if (size == 0) {
1708                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1709                 return;
1710         }
1711
1712         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1713                         size, num_wraps);
1714
1715         /* if uCode has wrapped back to top of log, start at the oldest entry,
1716          * i.e the next one that uCode would fill. */
1717         if (num_wraps)
1718                 iwl_print_event_log(priv, next_entry,
1719                                         capacity - next_entry, mode);
1720         /* (then/else) start at top of log */
1721         iwl_print_event_log(priv, 0, next_entry, mode);
1722
1723 }
1724 #endif
1725
1726 /**
1727  * iwl_alive_start - called after REPLY_ALIVE notification received
1728  *                   from protocol/runtime uCode (initialization uCode's
1729  *                   Alive gets handled by iwl_init_alive_start()).
1730  */
1731 static void iwl_alive_start(struct iwl_priv *priv)
1732 {
1733         int ret = 0;
1734
1735         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1736
1737         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1738                 /* We had an error bringing up the hardware, so take it
1739                  * all the way back down so we can try again */
1740                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1741                 goto restart;
1742         }
1743
1744         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1745          * This is a paranoid check, because we would not have gotten the
1746          * "runtime" alive if code weren't properly loaded.  */
1747         if (iwl_verify_ucode(priv)) {
1748                 /* Runtime instruction load was bad;
1749                  * take it all the way back down so we can try again */
1750                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1751                 goto restart;
1752         }
1753
1754         iwl_clear_stations_table(priv);
1755         ret = priv->cfg->ops->lib->alive_notify(priv);
1756         if (ret) {
1757                 IWL_WARN(priv,
1758                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1759                 goto restart;
1760         }
1761
1762         /* After the ALIVE response, we can send host commands to the uCode */
1763         set_bit(STATUS_ALIVE, &priv->status);
1764
1765         if (iwl_is_rfkill(priv))
1766                 return;
1767
1768         ieee80211_wake_queues(priv->hw);
1769
1770         priv->active_rate = priv->rates_mask;
1771         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1772
1773         /* Configure Tx antenna selection based on H/W config */
1774         if (priv->cfg->ops->hcmd->set_tx_ant)
1775                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1776
1777         if (iwl_is_associated(priv)) {
1778                 struct iwl_rxon_cmd *active_rxon =
1779                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1780                 /* apply any changes in staging */
1781                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1782                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1783         } else {
1784                 /* Initialize our rx_config data */
1785                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1786
1787                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1788                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1789
1790                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1791         }
1792
1793         /* Configure Bluetooth device coexistence support */
1794         iwl_send_bt_config(priv);
1795
1796         iwl_reset_run_time_calib(priv);
1797
1798         /* Configure the adapter for unassociated operation */
1799         iwlcore_commit_rxon(priv);
1800
1801         /* At this point, the NIC is initialized and operational */
1802         iwl_rf_kill_ct_config(priv);
1803
1804         iwl_leds_init(priv);
1805
1806         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1807         set_bit(STATUS_READY, &priv->status);
1808         wake_up_interruptible(&priv->wait_command_queue);
1809
1810         iwl_power_update_mode(priv, true);
1811
1812         /* reassociate for ADHOC mode */
1813         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1814                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1815                                                                 priv->vif);
1816                 if (beacon)
1817                         iwl_mac_beacon_update(priv->hw, beacon);
1818         }
1819
1820
1821         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1822                 iwl_set_mode(priv, priv->iw_mode);
1823
1824         return;
1825
1826  restart:
1827         queue_work(priv->workqueue, &priv->restart);
1828 }
1829
1830 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1831
1832 static void __iwl_down(struct iwl_priv *priv)
1833 {
1834         unsigned long flags;
1835         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1836
1837         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1838
1839         if (!exit_pending)
1840                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1841
1842         iwl_clear_stations_table(priv);
1843
1844         /* Unblock any waiting calls */
1845         wake_up_interruptible_all(&priv->wait_command_queue);
1846
1847         /* Wipe out the EXIT_PENDING status bit if we are not actually
1848          * exiting the module */
1849         if (!exit_pending)
1850                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1851
1852         /* stop and reset the on-board processor */
1853         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1854
1855         /* tell the device to stop sending interrupts */
1856         spin_lock_irqsave(&priv->lock, flags);
1857         iwl_disable_interrupts(priv);
1858         spin_unlock_irqrestore(&priv->lock, flags);
1859         iwl_synchronize_irq(priv);
1860
1861         if (priv->mac80211_registered)
1862                 ieee80211_stop_queues(priv->hw);
1863
1864         /* If we have not previously called iwl_init() then
1865          * clear all bits but the RF Kill bit and return */
1866         if (!iwl_is_init(priv)) {
1867                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1868                                         STATUS_RF_KILL_HW |
1869                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1870                                         STATUS_GEO_CONFIGURED |
1871                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1872                                         STATUS_EXIT_PENDING;
1873                 goto exit;
1874         }
1875
1876         /* ...otherwise clear out all the status bits but the RF Kill
1877          * bit and continue taking the NIC down. */
1878         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1879                                 STATUS_RF_KILL_HW |
1880                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1881                                 STATUS_GEO_CONFIGURED |
1882                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1883                                 STATUS_FW_ERROR |
1884                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1885                                 STATUS_EXIT_PENDING;
1886
1887         /* device going down, Stop using ICT table */
1888         iwl_disable_ict(priv);
1889         spin_lock_irqsave(&priv->lock, flags);
1890         iwl_clear_bit(priv, CSR_GP_CNTRL,
1891                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1892         spin_unlock_irqrestore(&priv->lock, flags);
1893
1894         iwl_txq_ctx_stop(priv);
1895         iwl_rxq_stop(priv);
1896
1897         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1898                                 APMG_CLK_VAL_DMA_CLK_RQT);
1899
1900         udelay(5);
1901
1902         /* Stop the device, and put it in low power state */
1903         priv->cfg->ops->lib->apm_ops.stop(priv);
1904
1905  exit:
1906         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1907
1908         if (priv->ibss_beacon)
1909                 dev_kfree_skb(priv->ibss_beacon);
1910         priv->ibss_beacon = NULL;
1911
1912         /* clear out any free frames */
1913         iwl_clear_free_frames(priv);
1914 }
1915
1916 static void iwl_down(struct iwl_priv *priv)
1917 {
1918         mutex_lock(&priv->mutex);
1919         __iwl_down(priv);
1920         mutex_unlock(&priv->mutex);
1921
1922         iwl_cancel_deferred_work(priv);
1923 }
1924
1925 #define HW_READY_TIMEOUT (50)
1926
1927 static int iwl_set_hw_ready(struct iwl_priv *priv)
1928 {
1929         int ret = 0;
1930
1931         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1932                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1933
1934         /* See if we got it */
1935         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1936                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1937                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1938                                 HW_READY_TIMEOUT);
1939         if (ret != -ETIMEDOUT)
1940                 priv->hw_ready = true;
1941         else
1942                 priv->hw_ready = false;
1943
1944         IWL_DEBUG_INFO(priv, "hardware %s\n",
1945                       (priv->hw_ready == 1) ? "ready" : "not ready");
1946         return ret;
1947 }
1948
1949 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1950 {
1951         int ret = 0;
1952
1953         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1954
1955         ret = iwl_set_hw_ready(priv);
1956         if (priv->hw_ready)
1957                 return ret;
1958
1959         /* If HW is not ready, prepare the conditions to check again */
1960         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1961                         CSR_HW_IF_CONFIG_REG_PREPARE);
1962
1963         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1964                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1965                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1966
1967         /* HW should be ready by now, check again. */
1968         if (ret != -ETIMEDOUT)
1969                 iwl_set_hw_ready(priv);
1970
1971         return ret;
1972 }
1973
1974 #define MAX_HW_RESTARTS 5
1975
1976 static int __iwl_up(struct iwl_priv *priv)
1977 {
1978         int i;
1979         int ret;
1980
1981         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1982                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1983                 return -EIO;
1984         }
1985
1986         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1987                 IWL_ERR(priv, "ucode not available for device bringup\n");
1988                 return -EIO;
1989         }
1990
1991         iwl_prepare_card_hw(priv);
1992
1993         if (!priv->hw_ready) {
1994                 IWL_WARN(priv, "Exit HW not ready\n");
1995                 return -EIO;
1996         }
1997
1998         /* If platform's RF_KILL switch is NOT set to KILL */
1999         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2000                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2001         else
2002                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2003
2004         if (iwl_is_rfkill(priv)) {
2005                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2006
2007                 iwl_enable_interrupts(priv);
2008                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2009                 return 0;
2010         }
2011
2012         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2013
2014         ret = iwl_hw_nic_init(priv);
2015         if (ret) {
2016                 IWL_ERR(priv, "Unable to init nic\n");
2017                 return ret;
2018         }
2019
2020         /* make sure rfkill handshake bits are cleared */
2021         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2022         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2023                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2024
2025         /* clear (again), then enable host interrupts */
2026         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2027         iwl_enable_interrupts(priv);
2028
2029         /* really make sure rfkill handshake bits are cleared */
2030         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2031         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2032
2033         /* Copy original ucode data image from disk into backup cache.
2034          * This will be used to initialize the on-board processor's
2035          * data SRAM for a clean start when the runtime program first loads. */
2036         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2037                priv->ucode_data.len);
2038
2039         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2040
2041                 iwl_clear_stations_table(priv);
2042
2043                 /* load bootstrap state machine,
2044                  * load bootstrap program into processor's memory,
2045                  * prepare to load the "initialize" uCode */
2046                 ret = priv->cfg->ops->lib->load_ucode(priv);
2047
2048                 if (ret) {
2049                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2050                                 ret);
2051                         continue;
2052                 }
2053
2054                 /* start card; "initialize" will load runtime ucode */
2055                 iwl_nic_start(priv);
2056
2057                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2058
2059                 return 0;
2060         }
2061
2062         set_bit(STATUS_EXIT_PENDING, &priv->status);
2063         __iwl_down(priv);
2064         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2065
2066         /* tried to restart and config the device for as long as our
2067          * patience could withstand */
2068         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2069         return -EIO;
2070 }
2071
2072
2073 /*****************************************************************************
2074  *
2075  * Workqueue callbacks
2076  *
2077  *****************************************************************************/
2078
2079 static void iwl_bg_init_alive_start(struct work_struct *data)
2080 {
2081         struct iwl_priv *priv =
2082             container_of(data, struct iwl_priv, init_alive_start.work);
2083
2084         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2085                 return;
2086
2087         mutex_lock(&priv->mutex);
2088         priv->cfg->ops->lib->init_alive_start(priv);
2089         mutex_unlock(&priv->mutex);
2090 }
2091
2092 static void iwl_bg_alive_start(struct work_struct *data)
2093 {
2094         struct iwl_priv *priv =
2095             container_of(data, struct iwl_priv, alive_start.work);
2096
2097         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2098                 return;
2099
2100         /* enable dram interrupt */
2101         iwl_reset_ict(priv);
2102
2103         mutex_lock(&priv->mutex);
2104         iwl_alive_start(priv);
2105         mutex_unlock(&priv->mutex);
2106 }
2107
2108 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2109 {
2110         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2111                         run_time_calib_work);
2112
2113         mutex_lock(&priv->mutex);
2114
2115         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2116             test_bit(STATUS_SCANNING, &priv->status)) {
2117                 mutex_unlock(&priv->mutex);
2118                 return;
2119         }
2120
2121         if (priv->start_calib) {
2122                 iwl_chain_noise_calibration(priv, &priv->statistics);
2123
2124                 iwl_sensitivity_calibration(priv, &priv->statistics);
2125         }
2126
2127         mutex_unlock(&priv->mutex);
2128         return;
2129 }
2130
2131 static void iwl_bg_up(struct work_struct *data)
2132 {
2133         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2134
2135         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2136                 return;
2137
2138         mutex_lock(&priv->mutex);
2139         __iwl_up(priv);
2140         mutex_unlock(&priv->mutex);
2141 }
2142
2143 static void iwl_bg_restart(struct work_struct *data)
2144 {
2145         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2146
2147         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2148                 return;
2149
2150         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2151                 mutex_lock(&priv->mutex);
2152                 priv->vif = NULL;
2153                 priv->is_open = 0;
2154                 mutex_unlock(&priv->mutex);
2155                 iwl_down(priv);
2156                 ieee80211_restart_hw(priv->hw);
2157         } else {
2158                 iwl_down(priv);
2159                 queue_work(priv->workqueue, &priv->up);
2160         }
2161 }
2162
2163 static void iwl_bg_rx_replenish(struct work_struct *data)
2164 {
2165         struct iwl_priv *priv =
2166             container_of(data, struct iwl_priv, rx_replenish);
2167
2168         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2169                 return;
2170
2171         mutex_lock(&priv->mutex);
2172         iwl_rx_replenish(priv);
2173         mutex_unlock(&priv->mutex);
2174 }
2175
2176 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2177
2178 void iwl_post_associate(struct iwl_priv *priv)
2179 {
2180         struct ieee80211_conf *conf = NULL;
2181         int ret = 0;
2182         unsigned long flags;
2183
2184         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2185                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2186                 return;
2187         }
2188
2189         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2190                         priv->assoc_id, priv->active_rxon.bssid_addr);
2191
2192
2193         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2194                 return;
2195
2196
2197         if (!priv->vif || !priv->is_open)
2198                 return;
2199
2200         iwl_scan_cancel_timeout(priv, 200);
2201
2202         conf = ieee80211_get_hw_conf(priv->hw);
2203
2204         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2205         iwlcore_commit_rxon(priv);
2206
2207         iwl_setup_rxon_timing(priv);
2208         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2209                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2210         if (ret)
2211                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2212                             "Attempting to continue.\n");
2213
2214         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2215
2216         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2217
2218         if (priv->cfg->ops->hcmd->set_rxon_chain)
2219                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2220
2221         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2222
2223         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2224                         priv->assoc_id, priv->beacon_int);
2225
2226         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2227                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2228         else
2229                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2230
2231         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2232                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2233                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2234                 else
2235                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2236
2237                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2238                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2239
2240         }
2241
2242         iwlcore_commit_rxon(priv);
2243
2244         switch (priv->iw_mode) {
2245         case NL80211_IFTYPE_STATION:
2246                 break;
2247
2248         case NL80211_IFTYPE_ADHOC:
2249
2250                 /* assume default assoc id */
2251                 priv->assoc_id = 1;
2252
2253                 iwl_rxon_add_station(priv, priv->bssid, 0);
2254                 iwl_send_beacon_cmd(priv);
2255
2256                 break;
2257
2258         default:
2259                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2260                           __func__, priv->iw_mode);
2261                 break;
2262         }
2263
2264         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2265                 priv->assoc_station_added = 1;
2266
2267         spin_lock_irqsave(&priv->lock, flags);
2268         iwl_activate_qos(priv, 0);
2269         spin_unlock_irqrestore(&priv->lock, flags);
2270
2271         /* the chain noise calibration will enabled PM upon completion
2272          * If chain noise has already been run, then we need to enable
2273          * power management here */
2274         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2275                 iwl_power_update_mode(priv, false);
2276
2277         /* Enable Rx differential gain and sensitivity calibrations */
2278         iwl_chain_noise_reset(priv);
2279         priv->start_calib = 1;
2280
2281 }
2282
2283 /*****************************************************************************
2284  *
2285  * mac80211 entry point functions
2286  *
2287  *****************************************************************************/
2288
2289 #define UCODE_READY_TIMEOUT     (4 * HZ)
2290
2291 static int iwl_mac_start(struct ieee80211_hw *hw)
2292 {
2293         struct iwl_priv *priv = hw->priv;
2294         int ret;
2295
2296         IWL_DEBUG_MAC80211(priv, "enter\n");
2297
2298         /* we should be verifying the device is ready to be opened */
2299         mutex_lock(&priv->mutex);
2300
2301         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2302          * ucode filename and max sizes are card-specific. */
2303
2304         if (!priv->ucode_code.len) {
2305                 ret = iwl_read_ucode(priv);
2306                 if (ret) {
2307                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2308                         mutex_unlock(&priv->mutex);
2309                         return ret;
2310                 }
2311         }
2312
2313         ret = __iwl_up(priv);
2314
2315         mutex_unlock(&priv->mutex);
2316
2317         if (ret)
2318                 return ret;
2319
2320         if (iwl_is_rfkill(priv))
2321                 goto out;
2322
2323         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2324
2325         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2326          * mac80211 will not be run successfully. */
2327         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2328                         test_bit(STATUS_READY, &priv->status),
2329                         UCODE_READY_TIMEOUT);
2330         if (!ret) {
2331                 if (!test_bit(STATUS_READY, &priv->status)) {
2332                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2333                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2334                         return -ETIMEDOUT;
2335                 }
2336         }
2337
2338         iwl_led_start(priv);
2339
2340 out:
2341         priv->is_open = 1;
2342         IWL_DEBUG_MAC80211(priv, "leave\n");
2343         return 0;
2344 }
2345
2346 static void iwl_mac_stop(struct ieee80211_hw *hw)
2347 {
2348         struct iwl_priv *priv = hw->priv;
2349
2350         IWL_DEBUG_MAC80211(priv, "enter\n");
2351
2352         if (!priv->is_open)
2353                 return;
2354
2355         priv->is_open = 0;
2356
2357         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2358                 /* stop mac, cancel any scan request and clear
2359                  * RXON_FILTER_ASSOC_MSK BIT
2360                  */
2361                 mutex_lock(&priv->mutex);
2362                 iwl_scan_cancel_timeout(priv, 100);
2363                 mutex_unlock(&priv->mutex);
2364         }
2365
2366         iwl_down(priv);
2367
2368         flush_workqueue(priv->workqueue);
2369
2370         /* enable interrupts again in order to receive rfkill changes */
2371         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2372         iwl_enable_interrupts(priv);
2373
2374         IWL_DEBUG_MAC80211(priv, "leave\n");
2375 }
2376
2377 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2378 {
2379         struct iwl_priv *priv = hw->priv;
2380
2381         IWL_DEBUG_MACDUMP(priv, "enter\n");
2382
2383         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2384                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2385
2386         if (iwl_tx_skb(priv, skb))
2387                 dev_kfree_skb_any(skb);
2388
2389         IWL_DEBUG_MACDUMP(priv, "leave\n");
2390         return NETDEV_TX_OK;
2391 }
2392
2393 void iwl_config_ap(struct iwl_priv *priv)
2394 {
2395         int ret = 0;
2396         unsigned long flags;
2397
2398         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2399                 return;
2400
2401         /* The following should be done only at AP bring up */
2402         if (!iwl_is_associated(priv)) {
2403
2404                 /* RXON - unassoc (to set timing command) */
2405                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2406                 iwlcore_commit_rxon(priv);
2407
2408                 /* RXON Timing */
2409                 iwl_setup_rxon_timing(priv);
2410                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2411                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2412                 if (ret)
2413                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2414                                         "Attempting to continue.\n");
2415
2416                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2417                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2418
2419                 /* FIXME: what should be the assoc_id for AP? */
2420                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2421                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2422                         priv->staging_rxon.flags |=
2423                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2424                 else
2425                         priv->staging_rxon.flags &=
2426                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2427
2428                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2429                         if (priv->assoc_capability &
2430                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2431                                 priv->staging_rxon.flags |=
2432                                         RXON_FLG_SHORT_SLOT_MSK;
2433                         else
2434                                 priv->staging_rxon.flags &=
2435                                         ~RXON_FLG_SHORT_SLOT_MSK;
2436
2437                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2438                                 priv->staging_rxon.flags &=
2439                                         ~RXON_FLG_SHORT_SLOT_MSK;
2440                 }
2441                 /* restore RXON assoc */
2442                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2443                 iwlcore_commit_rxon(priv);
2444                 spin_lock_irqsave(&priv->lock, flags);
2445                 iwl_activate_qos(priv, 1);
2446                 spin_unlock_irqrestore(&priv->lock, flags);
2447                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2448         }
2449         iwl_send_beacon_cmd(priv);
2450
2451         /* FIXME - we need to add code here to detect a totally new
2452          * configuration, reset the AP, unassoc, rxon timing, assoc,
2453          * clear sta table, add BCAST sta... */
2454 }
2455
2456 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2457                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2458                         u32 iv32, u16 *phase1key)
2459 {
2460
2461         struct iwl_priv *priv = hw->priv;
2462         IWL_DEBUG_MAC80211(priv, "enter\n");
2463
2464         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2465
2466         IWL_DEBUG_MAC80211(priv, "leave\n");
2467 }
2468
2469 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2470                            struct ieee80211_vif *vif,
2471                            struct ieee80211_sta *sta,
2472                            struct ieee80211_key_conf *key)
2473 {
2474         struct iwl_priv *priv = hw->priv;
2475         const u8 *addr;
2476         int ret;
2477         u8 sta_id;
2478         bool is_default_wep_key = false;
2479
2480         IWL_DEBUG_MAC80211(priv, "enter\n");
2481
2482         if (priv->cfg->mod_params->sw_crypto) {
2483                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2484                 return -EOPNOTSUPP;
2485         }
2486         addr = sta ? sta->addr : iwl_bcast_addr;
2487         sta_id = iwl_find_station(priv, addr);
2488         if (sta_id == IWL_INVALID_STATION) {
2489                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2490                                    addr);
2491                 return -EINVAL;
2492
2493         }
2494
2495         mutex_lock(&priv->mutex);
2496         iwl_scan_cancel_timeout(priv, 100);
2497         mutex_unlock(&priv->mutex);
2498
2499         /* If we are getting WEP group key and we didn't receive any key mapping
2500          * so far, we are in legacy wep mode (group key only), otherwise we are
2501          * in 1X mode.
2502          * In legacy wep mode, we use another host command to the uCode */
2503         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2504                 priv->iw_mode != NL80211_IFTYPE_AP) {
2505                 if (cmd == SET_KEY)
2506                         is_default_wep_key = !priv->key_mapping_key;
2507                 else
2508                         is_default_wep_key =
2509                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2510         }
2511
2512         switch (cmd) {
2513         case SET_KEY:
2514                 if (is_default_wep_key)
2515                         ret = iwl_set_default_wep_key(priv, key);
2516                 else
2517                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2518
2519                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2520                 break;
2521         case DISABLE_KEY:
2522                 if (is_default_wep_key)
2523                         ret = iwl_remove_default_wep_key(priv, key);
2524                 else
2525                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2526
2527                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2528                 break;
2529         default:
2530                 ret = -EINVAL;
2531         }
2532
2533         IWL_DEBUG_MAC80211(priv, "leave\n");
2534
2535         return ret;
2536 }
2537
2538 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2539                              enum ieee80211_ampdu_mlme_action action,
2540                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2541 {
2542         struct iwl_priv *priv = hw->priv;
2543         int ret;
2544
2545         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2546                      sta->addr, tid);
2547
2548         if (!(priv->cfg->sku & IWL_SKU_N))
2549                 return -EACCES;
2550
2551         switch (action) {
2552         case IEEE80211_AMPDU_RX_START:
2553                 IWL_DEBUG_HT(priv, "start Rx\n");
2554                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2555         case IEEE80211_AMPDU_RX_STOP:
2556                 IWL_DEBUG_HT(priv, "stop Rx\n");
2557                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2558                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2559                         return 0;
2560                 else
2561                         return ret;
2562         case IEEE80211_AMPDU_TX_START:
2563                 IWL_DEBUG_HT(priv, "start Tx\n");
2564                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2565         case IEEE80211_AMPDU_TX_STOP:
2566                 IWL_DEBUG_HT(priv, "stop Tx\n");
2567                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2568                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2569                         return 0;
2570                 else
2571                         return ret;
2572         default:
2573                 IWL_DEBUG_HT(priv, "unknown\n");
2574                 return -EINVAL;
2575                 break;
2576         }
2577         return 0;
2578 }
2579
2580 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2581                              struct ieee80211_low_level_stats *stats)
2582 {
2583         struct iwl_priv *priv = hw->priv;
2584
2585         priv = hw->priv;
2586         IWL_DEBUG_MAC80211(priv, "enter\n");
2587         IWL_DEBUG_MAC80211(priv, "leave\n");
2588
2589         return 0;
2590 }
2591
2592 /*****************************************************************************
2593  *
2594  * sysfs attributes
2595  *
2596  *****************************************************************************/
2597
2598 #ifdef CONFIG_IWLWIFI_DEBUG
2599
2600 /*
2601  * The following adds a new attribute to the sysfs representation
2602  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2603  * used for controlling the debug level.
2604  *
2605  * See the level definitions in iwl for details.
2606  *
2607  * The debug_level being managed using sysfs below is a per device debug
2608  * level that is used instead of the global debug level if it (the per
2609  * device debug level) is set.
2610  */
2611 static ssize_t show_debug_level(struct device *d,
2612                                 struct device_attribute *attr, char *buf)
2613 {
2614         struct iwl_priv *priv = dev_get_drvdata(d);
2615         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2616 }
2617 static ssize_t store_debug_level(struct device *d,
2618                                 struct device_attribute *attr,
2619                                  const char *buf, size_t count)
2620 {
2621         struct iwl_priv *priv = dev_get_drvdata(d);
2622         unsigned long val;
2623         int ret;
2624
2625         ret = strict_strtoul(buf, 0, &val);
2626         if (ret)
2627                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2628         else {
2629                 priv->debug_level = val;
2630                 if (iwl_alloc_traffic_mem(priv))
2631                         IWL_ERR(priv,
2632                                 "Not enough memory to generate traffic log\n");
2633         }
2634         return strnlen(buf, count);
2635 }
2636
2637 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2638                         show_debug_level, store_debug_level);
2639
2640
2641 #endif /* CONFIG_IWLWIFI_DEBUG */
2642
2643
2644 static ssize_t show_temperature(struct device *d,
2645                                 struct device_attribute *attr, char *buf)
2646 {
2647         struct iwl_priv *priv = dev_get_drvdata(d);
2648
2649         if (!iwl_is_alive(priv))
2650                 return -EAGAIN;
2651
2652         return sprintf(buf, "%d\n", priv->temperature);
2653 }
2654
2655 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2656
2657 static ssize_t show_tx_power(struct device *d,
2658                              struct device_attribute *attr, char *buf)
2659 {
2660         struct iwl_priv *priv = dev_get_drvdata(d);
2661
2662         if (!iwl_is_ready_rf(priv))
2663                 return sprintf(buf, "off\n");
2664         else
2665                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2666 }
2667
2668 static ssize_t store_tx_power(struct device *d,
2669                               struct device_attribute *attr,
2670                               const char *buf, size_t count)
2671 {
2672         struct iwl_priv *priv = dev_get_drvdata(d);
2673         unsigned long val;
2674         int ret;
2675
2676         ret = strict_strtoul(buf, 10, &val);
2677         if (ret)
2678                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2679         else {
2680                 ret = iwl_set_tx_power(priv, val, false);
2681                 if (ret)
2682                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2683                                 ret);
2684                 else
2685                         ret = count;
2686         }
2687         return ret;
2688 }
2689
2690 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2691
2692 static ssize_t show_flags(struct device *d,
2693                           struct device_attribute *attr, char *buf)
2694 {
2695         struct iwl_priv *priv = dev_get_drvdata(d);
2696
2697         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2698 }
2699
2700 static ssize_t store_flags(struct device *d,
2701                            struct device_attribute *attr,
2702                            const char *buf, size_t count)
2703 {
2704         struct iwl_priv *priv = dev_get_drvdata(d);
2705         unsigned long val;
2706         u32 flags;
2707         int ret = strict_strtoul(buf, 0, &val);
2708         if (ret)
2709                 return ret;
2710         flags = (u32)val;
2711
2712         mutex_lock(&priv->mutex);
2713         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2714                 /* Cancel any currently running scans... */
2715                 if (iwl_scan_cancel_timeout(priv, 100))
2716                         IWL_WARN(priv, "Could not cancel scan.\n");
2717                 else {
2718                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2719                         priv->staging_rxon.flags = cpu_to_le32(flags);
2720                         iwlcore_commit_rxon(priv);
2721                 }
2722         }
2723         mutex_unlock(&priv->mutex);
2724
2725         return count;
2726 }
2727
2728 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2729
2730 static ssize_t show_filter_flags(struct device *d,
2731                                  struct device_attribute *attr, char *buf)
2732 {
2733         struct iwl_priv *priv = dev_get_drvdata(d);
2734
2735         return sprintf(buf, "0x%04X\n",
2736                 le32_to_cpu(priv->active_rxon.filter_flags));
2737 }
2738
2739 static ssize_t store_filter_flags(struct device *d,
2740                                   struct device_attribute *attr,
2741                                   const char *buf, size_t count)
2742 {
2743         struct iwl_priv *priv = dev_get_drvdata(d);
2744         unsigned long val;
2745         u32 filter_flags;
2746         int ret = strict_strtoul(buf, 0, &val);
2747         if (ret)
2748                 return ret;
2749         filter_flags = (u32)val;
2750
2751         mutex_lock(&priv->mutex);
2752         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2753                 /* Cancel any currently running scans... */
2754                 if (iwl_scan_cancel_timeout(priv, 100))
2755                         IWL_WARN(priv, "Could not cancel scan.\n");
2756                 else {
2757                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2758                                        "0x%04X\n", filter_flags);
2759                         priv->staging_rxon.filter_flags =
2760                                 cpu_to_le32(filter_flags);
2761                         iwlcore_commit_rxon(priv);
2762                 }
2763         }
2764         mutex_unlock(&priv->mutex);
2765
2766         return count;
2767 }
2768
2769 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2770                    store_filter_flags);
2771
2772
2773 static ssize_t show_statistics(struct device *d,
2774                                struct device_attribute *attr, char *buf)
2775 {
2776         struct iwl_priv *priv = dev_get_drvdata(d);
2777         u32 size = sizeof(struct iwl_notif_statistics);
2778         u32 len = 0, ofs = 0;
2779         u8 *data = (u8 *)&priv->statistics;
2780         int rc = 0;
2781
2782         if (!iwl_is_alive(priv))
2783                 return -EAGAIN;
2784
2785         mutex_lock(&priv->mutex);
2786         rc = iwl_send_statistics_request(priv, 0);
2787         mutex_unlock(&priv->mutex);
2788
2789         if (rc) {
2790                 len = sprintf(buf,
2791                               "Error sending statistics request: 0x%08X\n", rc);
2792                 return len;
2793         }
2794
2795         while (size && (PAGE_SIZE - len)) {
2796                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2797                                    PAGE_SIZE - len, 1);
2798                 len = strlen(buf);
2799                 if (PAGE_SIZE - len)
2800                         buf[len++] = '\n';
2801
2802                 ofs += 16;
2803                 size -= min(size, 16U);
2804         }
2805
2806         return len;
2807 }
2808
2809 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2810
2811 static ssize_t show_rts_ht_protection(struct device *d,
2812                              struct device_attribute *attr, char *buf)
2813 {
2814         struct iwl_priv *priv = dev_get_drvdata(d);
2815
2816         return sprintf(buf, "%s\n",
2817                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2818 }
2819
2820 static ssize_t store_rts_ht_protection(struct device *d,
2821                               struct device_attribute *attr,
2822                               const char *buf, size_t count)
2823 {
2824         struct iwl_priv *priv = dev_get_drvdata(d);
2825         unsigned long val;
2826         int ret;
2827
2828         ret = strict_strtoul(buf, 10, &val);
2829         if (ret)
2830                 IWL_INFO(priv, "Input is not in decimal form.\n");
2831         else {
2832                 if (!iwl_is_associated(priv))
2833                         priv->cfg->use_rts_for_ht = val ? true : false;
2834                 else
2835                         IWL_ERR(priv, "Sta associated with AP - "
2836                                 "Change protection mechanism is not allowed\n");
2837                 ret = count;
2838         }
2839         return ret;
2840 }
2841
2842 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2843                         show_rts_ht_protection, store_rts_ht_protection);
2844
2845
2846 /*****************************************************************************
2847  *
2848  * driver setup and teardown
2849  *
2850  *****************************************************************************/
2851
2852 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2853 {
2854         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2855
2856         init_waitqueue_head(&priv->wait_command_queue);
2857
2858         INIT_WORK(&priv->up, iwl_bg_up);
2859         INIT_WORK(&priv->restart, iwl_bg_restart);
2860         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2861         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2862         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2863         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2864         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2865
2866         iwl_setup_scan_deferred_work(priv);
2867
2868         if (priv->cfg->ops->lib->setup_deferred_work)
2869                 priv->cfg->ops->lib->setup_deferred_work(priv);
2870
2871         init_timer(&priv->statistics_periodic);
2872         priv->statistics_periodic.data = (unsigned long)priv;
2873         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2874
2875         if (!priv->cfg->use_isr_legacy)
2876                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2877                         iwl_irq_tasklet, (unsigned long)priv);
2878         else
2879                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2880                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2881 }
2882
2883 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2884 {
2885         if (priv->cfg->ops->lib->cancel_deferred_work)
2886                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2887
2888         cancel_delayed_work_sync(&priv->init_alive_start);
2889         cancel_delayed_work(&priv->scan_check);
2890         cancel_delayed_work(&priv->alive_start);
2891         cancel_work_sync(&priv->beacon_update);
2892         del_timer_sync(&priv->statistics_periodic);
2893 }
2894
2895 static struct attribute *iwl_sysfs_entries[] = {
2896         &dev_attr_flags.attr,
2897         &dev_attr_filter_flags.attr,
2898         &dev_attr_statistics.attr,
2899         &dev_attr_temperature.attr,
2900         &dev_attr_tx_power.attr,
2901         &dev_attr_rts_ht_protection.attr,
2902 #ifdef CONFIG_IWLWIFI_DEBUG
2903         &dev_attr_debug_level.attr,
2904 #endif
2905         NULL
2906 };
2907
2908 static struct attribute_group iwl_attribute_group = {
2909         .name = NULL,           /* put in device directory */
2910         .attrs = iwl_sysfs_entries,
2911 };
2912
2913 static struct ieee80211_ops iwl_hw_ops = {
2914         .tx = iwl_mac_tx,
2915         .start = iwl_mac_start,
2916         .stop = iwl_mac_stop,
2917         .add_interface = iwl_mac_add_interface,
2918         .remove_interface = iwl_mac_remove_interface,
2919         .config = iwl_mac_config,
2920         .configure_filter = iwl_configure_filter,
2921         .set_key = iwl_mac_set_key,
2922         .update_tkip_key = iwl_mac_update_tkip_key,
2923         .get_stats = iwl_mac_get_stats,
2924         .get_tx_stats = iwl_mac_get_tx_stats,
2925         .conf_tx = iwl_mac_conf_tx,
2926         .reset_tsf = iwl_mac_reset_tsf,
2927         .bss_info_changed = iwl_bss_info_changed,
2928         .ampdu_action = iwl_mac_ampdu_action,
2929         .hw_scan = iwl_mac_hw_scan
2930 };
2931
2932 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2933 {
2934         int err = 0;
2935         struct iwl_priv *priv;
2936         struct ieee80211_hw *hw;
2937         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2938         unsigned long flags;
2939         u16 pci_cmd;
2940
2941         /************************
2942          * 1. Allocating HW data
2943          ************************/
2944
2945         /* Disabling hardware scan means that mac80211 will perform scans
2946          * "the hard way", rather than using device's scan. */
2947         if (cfg->mod_params->disable_hw_scan) {
2948                 if (iwl_debug_level & IWL_DL_INFO)
2949                         dev_printk(KERN_DEBUG, &(pdev->dev),
2950                                    "Disabling hw_scan\n");
2951                 iwl_hw_ops.hw_scan = NULL;
2952         }
2953
2954         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2955         if (!hw) {
2956                 err = -ENOMEM;
2957                 goto out;
2958         }
2959         priv = hw->priv;
2960         /* At this point both hw and priv are allocated. */
2961
2962         SET_IEEE80211_DEV(hw, &pdev->dev);
2963
2964         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2965         priv->cfg = cfg;
2966         priv->pci_dev = pdev;
2967         priv->inta_mask = CSR_INI_SET_MASK;
2968
2969 #ifdef CONFIG_IWLWIFI_DEBUG
2970         atomic_set(&priv->restrict_refcnt, 0);
2971 #endif
2972         if (iwl_alloc_traffic_mem(priv))
2973                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2974
2975         /**************************
2976          * 2. Initializing PCI bus
2977          **************************/
2978         if (pci_enable_device(pdev)) {
2979                 err = -ENODEV;
2980                 goto out_ieee80211_free_hw;
2981         }
2982
2983         pci_set_master(pdev);
2984
2985         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2986         if (!err)
2987                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2988         if (err) {
2989                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2990                 if (!err)
2991                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2992                 /* both attempts failed: */
2993                 if (err) {
2994                         IWL_WARN(priv, "No suitable DMA available.\n");
2995                         goto out_pci_disable_device;
2996                 }
2997         }
2998
2999         err = pci_request_regions(pdev, DRV_NAME);
3000         if (err)
3001                 goto out_pci_disable_device;
3002
3003         pci_set_drvdata(pdev, priv);
3004
3005
3006         /***********************
3007          * 3. Read REV register
3008          ***********************/
3009         priv->hw_base = pci_iomap(pdev, 0, 0);
3010         if (!priv->hw_base) {
3011                 err = -ENODEV;
3012                 goto out_pci_release_regions;
3013         }
3014
3015         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3016                 (unsigned long long) pci_resource_len(pdev, 0));
3017         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3018
3019         /* this spin lock will be used in apm_ops.init and EEPROM access
3020          * we should init now
3021          */
3022         spin_lock_init(&priv->reg_lock);
3023         iwl_hw_detect(priv);
3024         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3025                 priv->cfg->name, priv->hw_rev);
3026
3027         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3028          * PCI Tx retries from interfering with C3 CPU state */
3029         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3030
3031         iwl_prepare_card_hw(priv);
3032         if (!priv->hw_ready) {
3033                 IWL_WARN(priv, "Failed, HW not ready\n");
3034                 goto out_iounmap;
3035         }
3036
3037         /* amp init */
3038         err = priv->cfg->ops->lib->apm_ops.init(priv);
3039         if (err < 0) {
3040                 IWL_ERR(priv, "Failed to init APMG\n");
3041                 goto out_iounmap;
3042         }
3043         /*****************
3044          * 4. Read EEPROM
3045          *****************/
3046         /* Read the EEPROM */
3047         err = iwl_eeprom_init(priv);
3048         if (err) {
3049                 IWL_ERR(priv, "Unable to init EEPROM\n");
3050                 goto out_iounmap;
3051         }
3052         err = iwl_eeprom_check_version(priv);
3053         if (err)
3054                 goto out_free_eeprom;
3055
3056         /* extract MAC Address */
3057         iwl_eeprom_get_mac(priv, priv->mac_addr);
3058         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3059         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3060
3061         /************************
3062          * 5. Setup HW constants
3063          ************************/
3064         if (iwl_set_hw_params(priv)) {
3065                 IWL_ERR(priv, "failed to set hw parameters\n");
3066                 goto out_free_eeprom;
3067         }
3068
3069         /*******************
3070          * 6. Setup priv
3071          *******************/
3072
3073         err = iwl_init_drv(priv);
3074         if (err)
3075                 goto out_free_eeprom;
3076         /* At this point both hw and priv are initialized. */
3077
3078         /********************
3079          * 7. Setup services
3080          ********************/
3081         spin_lock_irqsave(&priv->lock, flags);
3082         iwl_disable_interrupts(priv);
3083         spin_unlock_irqrestore(&priv->lock, flags);
3084
3085         pci_enable_msi(priv->pci_dev);
3086
3087         iwl_alloc_isr_ict(priv);
3088         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3089                           IRQF_SHARED, DRV_NAME, priv);
3090         if (err) {
3091                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3092                 goto out_disable_msi;
3093         }
3094         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3095         if (err) {
3096                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3097                 goto out_free_irq;
3098         }
3099
3100         iwl_setup_deferred_work(priv);
3101         iwl_setup_rx_handlers(priv);
3102
3103         /**********************************
3104          * 8. Setup and register mac80211
3105          **********************************/
3106
3107         /* enable interrupts if needed: hw bug w/a */
3108         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3109         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3110                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3111                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3112         }
3113
3114         iwl_enable_interrupts(priv);
3115
3116         err = iwl_setup_mac(priv);
3117         if (err)
3118                 goto out_remove_sysfs;
3119
3120         err = iwl_dbgfs_register(priv, DRV_NAME);
3121         if (err)
3122                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3123
3124         /* If platform's RF_KILL switch is NOT set to KILL */
3125         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3126                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3127         else
3128                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3129
3130         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3131                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3132
3133         iwl_power_initialize(priv);
3134         iwl_tt_initialize(priv);
3135         return 0;
3136
3137  out_remove_sysfs:
3138         destroy_workqueue(priv->workqueue);
3139         priv->workqueue = NULL;
3140         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3141  out_free_irq:
3142         free_irq(priv->pci_dev->irq, priv);
3143         iwl_free_isr_ict(priv);
3144  out_disable_msi:
3145         pci_disable_msi(priv->pci_dev);
3146         iwl_uninit_drv(priv);
3147  out_free_eeprom:
3148         iwl_eeprom_free(priv);
3149  out_iounmap:
3150         pci_iounmap(pdev, priv->hw_base);
3151  out_pci_release_regions:
3152         pci_set_drvdata(pdev, NULL);
3153         pci_release_regions(pdev);
3154  out_pci_disable_device:
3155         pci_disable_device(pdev);
3156  out_ieee80211_free_hw:
3157         iwl_free_traffic_mem(priv);
3158         ieee80211_free_hw(priv->hw);
3159  out:
3160         return err;
3161 }
3162
3163 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3164 {
3165         struct iwl_priv *priv = pci_get_drvdata(pdev);
3166         unsigned long flags;
3167
3168         if (!priv)
3169                 return;
3170
3171         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3172
3173         iwl_dbgfs_unregister(priv);
3174         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3175
3176         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3177          * to be called and iwl_down since we are removing the device
3178          * we need to set STATUS_EXIT_PENDING bit.
3179          */
3180         set_bit(STATUS_EXIT_PENDING, &priv->status);
3181         if (priv->mac80211_registered) {
3182                 ieee80211_unregister_hw(priv->hw);
3183                 priv->mac80211_registered = 0;
3184         } else {
3185                 iwl_down(priv);
3186         }
3187
3188         iwl_tt_exit(priv);
3189
3190         /* make sure we flush any pending irq or
3191          * tasklet for the driver
3192          */
3193         spin_lock_irqsave(&priv->lock, flags);
3194         iwl_disable_interrupts(priv);
3195         spin_unlock_irqrestore(&priv->lock, flags);
3196
3197         iwl_synchronize_irq(priv);
3198
3199         iwl_dealloc_ucode_pci(priv);
3200
3201         if (priv->rxq.bd)
3202                 iwl_rx_queue_free(priv, &priv->rxq);
3203         iwl_hw_txq_ctx_free(priv);
3204
3205         iwl_clear_stations_table(priv);
3206         iwl_eeprom_free(priv);
3207
3208
3209         /*netif_stop_queue(dev); */
3210         flush_workqueue(priv->workqueue);
3211
3212         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3213          * priv->workqueue... so we can't take down the workqueue
3214          * until now... */
3215         destroy_workqueue(priv->workqueue);
3216         priv->workqueue = NULL;
3217         iwl_free_traffic_mem(priv);
3218
3219         free_irq(priv->pci_dev->irq, priv);
3220         pci_disable_msi(priv->pci_dev);
3221         pci_iounmap(pdev, priv->hw_base);
3222         pci_release_regions(pdev);
3223         pci_disable_device(pdev);
3224         pci_set_drvdata(pdev, NULL);
3225
3226         iwl_uninit_drv(priv);
3227
3228         iwl_free_isr_ict(priv);
3229
3230         if (priv->ibss_beacon)
3231                 dev_kfree_skb(priv->ibss_beacon);
3232
3233         ieee80211_free_hw(priv->hw);
3234 }
3235
3236
3237 /*****************************************************************************
3238  *
3239  * driver and module entry point
3240  *
3241  *****************************************************************************/
3242
3243 /* Hardware specific file defines the PCI IDs table for that hardware module */
3244 static struct pci_device_id iwl_hw_card_ids[] = {
3245 #ifdef CONFIG_IWL4965
3246         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3247         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3248 #endif /* CONFIG_IWL4965 */
3249 #ifdef CONFIG_IWL5000
3250         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3251         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3252         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3253         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3254         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3255         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3256         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3257         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3258         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3259         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3260 /* 5350 WiFi/WiMax */
3261         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3262         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3263         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3264 /* 5150 Wifi/WiMax */
3265         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3266         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3267
3268 /* 6x00 Series */
3269         {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3270         {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3271         {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3272         {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3273         {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3274         {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3275         {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3276
3277         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3278         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3279         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3280         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3281         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3282         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3283         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3284         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3285         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3286         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3287
3288 /* 6x50 WiFi/WiMax Series */
3289         {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3290         {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3291         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3292         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3293         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3294         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3295         {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3296         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3297         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3298
3299 /* 1000 Series WiFi */
3300         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3301         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3302         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3303         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3304         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3305         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3306         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3307         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3308         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3309         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3310         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3311         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3312 #endif /* CONFIG_IWL5000 */
3313
3314         {0}
3315 };
3316 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3317
3318 static struct pci_driver iwl_driver = {
3319         .name = DRV_NAME,
3320         .id_table = iwl_hw_card_ids,
3321         .probe = iwl_pci_probe,
3322         .remove = __devexit_p(iwl_pci_remove),
3323 #ifdef CONFIG_PM
3324         .suspend = iwl_pci_suspend,
3325         .resume = iwl_pci_resume,
3326 #endif
3327 };
3328
3329 static int __init iwl_init(void)
3330 {
3331
3332         int ret;
3333         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3334         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3335
3336         ret = iwlagn_rate_control_register();
3337         if (ret) {
3338                 printk(KERN_ERR DRV_NAME
3339                        "Unable to register rate control algorithm: %d\n", ret);
3340                 return ret;
3341         }
3342
3343         ret = pci_register_driver(&iwl_driver);
3344         if (ret) {
3345                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3346                 goto error_register;
3347         }
3348
3349         return ret;
3350
3351 error_register:
3352         iwlagn_rate_control_unregister();
3353         return ret;
3354 }
3355
3356 static void __exit iwl_exit(void)
3357 {
3358         pci_unregister_driver(&iwl_driver);
3359         iwlagn_rate_control_unregister();
3360 }
3361
3362 module_exit(iwl_exit);
3363 module_init(iwl_init);
3364
3365 #ifdef CONFIG_IWLWIFI_DEBUG
3366 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3367 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3368 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3369 MODULE_PARM_DESC(debug, "debug output mask");
3370 #endif
3371