iwlwifi: LED cleanup
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  *  Intel Linux Wireless <ilw@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39
40 #include "iwl-eeprom.h"
41 #include "iwl-dev.h"
42 #include "iwl-core.h"
43 #include "iwl-io.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
46 #include "iwl-sta.h"
47 #include "iwl-agn-led.h"
48
49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
51
52 /* Highest firmware API version supported */
53 #define IWL4965_UCODE_API_MAX 2
54
55 /* Lowest firmware API version supported */
56 #define IWL4965_UCODE_API_MIN 2
57
58 #define IWL4965_FW_PRE "iwlwifi-4965-"
59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
61
62
63 /* module parameters */
64 static struct iwl_mod_params iwl4965_mod_params = {
65         .num_of_queues = IWL49_NUM_QUEUES,
66         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
67         .amsdu_size_8K = 1,
68         .restart_fw = 1,
69         /* the rest are 0 by default */
70 };
71
72 /* check contents of special bootstrap uCode SRAM */
73 static int iwl4965_verify_bsm(struct iwl_priv *priv)
74 {
75         __le32 *image = priv->ucode_boot.v_addr;
76         u32 len = priv->ucode_boot.len;
77         u32 reg;
78         u32 val;
79
80         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
81
82         /* verify BSM SRAM contents */
83         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
84         for (reg = BSM_SRAM_LOWER_BOUND;
85              reg < BSM_SRAM_LOWER_BOUND + len;
86              reg += sizeof(u32), image++) {
87                 val = iwl_read_prph(priv, reg);
88                 if (val != le32_to_cpu(*image)) {
89                         IWL_ERR(priv, "BSM uCode verification failed at "
90                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91                                   BSM_SRAM_LOWER_BOUND,
92                                   reg - BSM_SRAM_LOWER_BOUND, len,
93                                   val, le32_to_cpu(*image));
94                         return -EIO;
95                 }
96         }
97
98         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
99
100         return 0;
101 }
102
103 /**
104  * iwl4965_load_bsm - Load bootstrap instructions
105  *
106  * BSM operation:
107  *
108  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
109  * in special SRAM that does not power down during RFKILL.  When powering back
110  * up after power-saving sleeps (or during initial uCode load), the BSM loads
111  * the bootstrap program into the on-board processor, and starts it.
112  *
113  * The bootstrap program loads (via DMA) instructions and data for a new
114  * program from host DRAM locations indicated by the host driver in the
115  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
116  * automatically.
117  *
118  * When initializing the NIC, the host driver points the BSM to the
119  * "initialize" uCode image.  This uCode sets up some internal data, then
120  * notifies host via "initialize alive" that it is complete.
121  *
122  * The host then replaces the BSM_DRAM_* pointer values to point to the
123  * normal runtime uCode instructions and a backup uCode data cache buffer
124  * (filled initially with starting data values for the on-board processor),
125  * then triggers the "initialize" uCode to load and launch the runtime uCode,
126  * which begins normal operation.
127  *
128  * When doing a power-save shutdown, runtime uCode saves data SRAM into
129  * the backup data cache in DRAM before SRAM is powered down.
130  *
131  * When powering back up, the BSM loads the bootstrap program.  This reloads
132  * the runtime uCode instructions and the backup data cache into SRAM,
133  * and re-launches the runtime uCode from where it left off.
134  */
135 static int iwl4965_load_bsm(struct iwl_priv *priv)
136 {
137         __le32 *image = priv->ucode_boot.v_addr;
138         u32 len = priv->ucode_boot.len;
139         dma_addr_t pinst;
140         dma_addr_t pdata;
141         u32 inst_len;
142         u32 data_len;
143         int i;
144         u32 done;
145         u32 reg_offset;
146         int ret;
147
148         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
149
150         priv->ucode_type = UCODE_RT;
151
152         /* make sure bootstrap program is no larger than BSM's SRAM size */
153         if (len > IWL49_MAX_BSM_SIZE)
154                 return -EINVAL;
155
156         /* Tell bootstrap uCode where to find the "Initialize" uCode
157          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
158          * NOTE:  iwl_init_alive_start() will replace these values,
159          *        after the "initialize" uCode has run, to point to
160          *        runtime/protocol instructions and backup data cache.
161          */
162         pinst = priv->ucode_init.p_addr >> 4;
163         pdata = priv->ucode_init_data.p_addr >> 4;
164         inst_len = priv->ucode_init.len;
165         data_len = priv->ucode_init_data.len;
166
167         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
168         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
169         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
170         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
171
172         /* Fill BSM memory with bootstrap instructions */
173         for (reg_offset = BSM_SRAM_LOWER_BOUND;
174              reg_offset < BSM_SRAM_LOWER_BOUND + len;
175              reg_offset += sizeof(u32), image++)
176                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
177
178         ret = iwl4965_verify_bsm(priv);
179         if (ret)
180                 return ret;
181
182         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
183         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
184         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
185         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
186
187         /* Load bootstrap code into instruction SRAM now,
188          *   to prepare to load "initialize" uCode */
189         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
190
191         /* Wait for load of bootstrap uCode to finish */
192         for (i = 0; i < 100; i++) {
193                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
194                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
195                         break;
196                 udelay(10);
197         }
198         if (i < 100)
199                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
200         else {
201                 IWL_ERR(priv, "BSM write did not complete!\n");
202                 return -EIO;
203         }
204
205         /* Enable future boot loads whenever power management unit triggers it
206          *   (e.g. when powering back up after power-save shutdown) */
207         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
208
209
210         return 0;
211 }
212
213 /**
214  * iwl4965_set_ucode_ptrs - Set uCode address location
215  *
216  * Tell initialization uCode where to find runtime uCode.
217  *
218  * BSM registers initially contain pointers to initialization uCode.
219  * We need to replace them to load runtime uCode inst and data,
220  * and to save runtime data when powering down.
221  */
222 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
223 {
224         dma_addr_t pinst;
225         dma_addr_t pdata;
226         int ret = 0;
227
228         /* bits 35:4 for 4965 */
229         pinst = priv->ucode_code.p_addr >> 4;
230         pdata = priv->ucode_data_backup.p_addr >> 4;
231
232         /* Tell bootstrap uCode where to find image to load */
233         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
234         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
235         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
236                                  priv->ucode_data.len);
237
238         /* Inst byte count must be last to set up, bit 31 signals uCode
239          *   that all new ptr/size info is in place */
240         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
241                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
242         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
243
244         return ret;
245 }
246
247 /**
248  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
249  *
250  * Called after REPLY_ALIVE notification received from "initialize" uCode.
251  *
252  * The 4965 "initialize" ALIVE reply contains calibration data for:
253  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
254  *   (3945 does not contain this data).
255  *
256  * Tell "initialize" uCode to go ahead and load the runtime uCode.
257 */
258 static void iwl4965_init_alive_start(struct iwl_priv *priv)
259 {
260         /* Check alive response for "valid" sign from uCode */
261         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
262                 /* We had an error bringing up the hardware, so take it
263                  * all the way back down so we can try again */
264                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
265                 goto restart;
266         }
267
268         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
269          * This is a paranoid check, because we would not have gotten the
270          * "initialize" alive if code weren't properly loaded.  */
271         if (iwl_verify_ucode(priv)) {
272                 /* Runtime instruction load was bad;
273                  * take it all the way back down so we can try again */
274                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
275                 goto restart;
276         }
277
278         /* Calculate temperature */
279         priv->temperature = iwl4965_hw_get_temperature(priv);
280
281         /* Send pointers to protocol/runtime uCode image ... init code will
282          * load and launch runtime uCode, which will send us another "Alive"
283          * notification. */
284         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
285         if (iwl4965_set_ucode_ptrs(priv)) {
286                 /* Runtime instruction load won't happen;
287                  * take it all the way back down so we can try again */
288                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
289                 goto restart;
290         }
291         return;
292
293 restart:
294         queue_work(priv->workqueue, &priv->restart);
295 }
296
297 static bool is_ht40_channel(__le32 rxon_flags)
298 {
299         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
300                                     >> RXON_FLG_CHANNEL_MODE_POS;
301         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
302                   (chan_mod == CHANNEL_MODE_MIXED));
303 }
304
305 /*
306  * EEPROM handlers
307  */
308 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
309 {
310         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
311 }
312
313 /*
314  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
315  * must be called under priv->lock and mac access
316  */
317 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
318 {
319         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
320 }
321
322 static int iwl4965_apm_init(struct iwl_priv *priv)
323 {
324         int ret = 0;
325
326         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
327                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
328
329         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
330         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
331                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
332
333         /* set "initialization complete" bit to move adapter
334          * D0U* --> D0A* state */
335         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
336
337         /* wait for clock stabilization */
338         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
339                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
340         if (ret < 0) {
341                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
342                 goto out;
343         }
344
345         /* enable DMA */
346         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
347                                                 APMG_CLK_VAL_BSM_CLK_RQT);
348
349         udelay(20);
350
351         /* disable L1-Active */
352         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
353                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
354
355 out:
356         return ret;
357 }
358
359
360 static void iwl4965_nic_config(struct iwl_priv *priv)
361 {
362         unsigned long flags;
363         u16 radio_cfg;
364         u16 lctl;
365
366         spin_lock_irqsave(&priv->lock, flags);
367
368         lctl = iwl_pcie_link_ctl(priv);
369
370         /* HW bug W/A - negligible power consumption */
371         /* L1-ASPM is enabled by BIOS */
372         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
373                 /* L1-ASPM enabled: disable L0S  */
374                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
375         else
376                 /* L1-ASPM disabled: enable L0S */
377                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
378
379         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
380
381         /* write radio config values to register */
382         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
383                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
384                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
385                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
386                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
387
388         /* set CSR_HW_CONFIG_REG for uCode use */
389         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
390                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
391                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
392
393         priv->calib_info = (struct iwl_eeprom_calib_info *)
394                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
395
396         spin_unlock_irqrestore(&priv->lock, flags);
397 }
398
399 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
400 {
401         unsigned long flags;
402
403         spin_lock_irqsave(&priv->lock, flags);
404
405         /* set stop master bit */
406         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
407
408         iwl_poll_direct_bit(priv, CSR_RESET,
409                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
410
411         spin_unlock_irqrestore(&priv->lock, flags);
412         IWL_DEBUG_INFO(priv, "stop master\n");
413
414         return 0;
415 }
416
417 static void iwl4965_apm_stop(struct iwl_priv *priv)
418 {
419         unsigned long flags;
420
421         iwl4965_apm_stop_master(priv);
422
423         spin_lock_irqsave(&priv->lock, flags);
424
425         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
426
427         udelay(10);
428         /* clear "init complete"  move adapter D0A* --> D0U state */
429         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
430         spin_unlock_irqrestore(&priv->lock, flags);
431 }
432
433 static int iwl4965_apm_reset(struct iwl_priv *priv)
434 {
435         int ret = 0;
436
437         iwl4965_apm_stop_master(priv);
438
439
440         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
441
442         udelay(10);
443
444         /* FIXME: put here L1A -L0S w/a */
445
446         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
447
448         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
449                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
450         if (ret < 0)
451                 goto out;
452
453         udelay(10);
454
455         /* Enable DMA and BSM Clock */
456         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
457                                               APMG_CLK_VAL_BSM_CLK_RQT);
458
459         udelay(10);
460
461         /* disable L1A */
462         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
463                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
464
465         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
466         wake_up_interruptible(&priv->wait_command_queue);
467
468 out:
469         return ret;
470 }
471
472 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
473  * Called after every association, but this runs only once!
474  *  ... once chain noise is calibrated the first time, it's good forever.  */
475 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
476 {
477         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
478
479         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
480                 struct iwl_calib_diff_gain_cmd cmd;
481
482                 memset(&cmd, 0, sizeof(cmd));
483                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
484                 cmd.diff_gain_a = 0;
485                 cmd.diff_gain_b = 0;
486                 cmd.diff_gain_c = 0;
487                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
488                                  sizeof(cmd), &cmd))
489                         IWL_ERR(priv,
490                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
491                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
492                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
493         }
494 }
495
496 static void iwl4965_gain_computation(struct iwl_priv *priv,
497                 u32 *average_noise,
498                 u16 min_average_noise_antenna_i,
499                 u32 min_average_noise,
500                 u8 default_chain)
501 {
502         int i, ret;
503         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
504
505         data->delta_gain_code[min_average_noise_antenna_i] = 0;
506
507         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
508                 s32 delta_g = 0;
509
510                 if (!(data->disconn_array[i]) &&
511                     (data->delta_gain_code[i] ==
512                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
513                         delta_g = average_noise[i] - min_average_noise;
514                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
515                         data->delta_gain_code[i] =
516                                 min(data->delta_gain_code[i],
517                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
518
519                         data->delta_gain_code[i] =
520                                 (data->delta_gain_code[i] | (1 << 2));
521                 } else {
522                         data->delta_gain_code[i] = 0;
523                 }
524         }
525         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
526                      data->delta_gain_code[0],
527                      data->delta_gain_code[1],
528                      data->delta_gain_code[2]);
529
530         /* Differential gain gets sent to uCode only once */
531         if (!data->radio_write) {
532                 struct iwl_calib_diff_gain_cmd cmd;
533                 data->radio_write = 1;
534
535                 memset(&cmd, 0, sizeof(cmd));
536                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
537                 cmd.diff_gain_a = data->delta_gain_code[0];
538                 cmd.diff_gain_b = data->delta_gain_code[1];
539                 cmd.diff_gain_c = data->delta_gain_code[2];
540                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
541                                       sizeof(cmd), &cmd);
542                 if (ret)
543                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
544                                      "REPLY_PHY_CALIBRATION_CMD \n");
545
546                 /* TODO we might want recalculate
547                  * rx_chain in rxon cmd */
548
549                 /* Mark so we run this algo only once! */
550                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
551         }
552         data->chain_noise_a = 0;
553         data->chain_noise_b = 0;
554         data->chain_noise_c = 0;
555         data->chain_signal_a = 0;
556         data->chain_signal_b = 0;
557         data->chain_signal_c = 0;
558         data->beacon_count = 0;
559 }
560
561 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
562                         __le32 *tx_flags)
563 {
564         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
565                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
566                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
567         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
568                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
569                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
570         }
571 }
572
573 static void iwl4965_bg_txpower_work(struct work_struct *work)
574 {
575         struct iwl_priv *priv = container_of(work, struct iwl_priv,
576                         txpower_work);
577
578         /* If a scan happened to start before we got here
579          * then just return; the statistics notification will
580          * kick off another scheduled work to compensate for
581          * any temperature delta we missed here. */
582         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
583             test_bit(STATUS_SCANNING, &priv->status))
584                 return;
585
586         mutex_lock(&priv->mutex);
587
588         /* Regardless of if we are associated, we must reconfigure the
589          * TX power since frames can be sent on non-radar channels while
590          * not associated */
591         iwl4965_send_tx_power(priv);
592
593         /* Update last_temperature to keep is_calib_needed from running
594          * when it isn't needed... */
595         priv->last_temperature = priv->temperature;
596
597         mutex_unlock(&priv->mutex);
598 }
599
600 /*
601  * Acquire priv->lock before calling this function !
602  */
603 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
604 {
605         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
606                              (index & 0xff) | (txq_id << 8));
607         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
608 }
609
610 /**
611  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
612  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
613  * @scd_retry: (1) Indicates queue will be used in aggregation mode
614  *
615  * NOTE:  Acquire priv->lock before calling this function !
616  */
617 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
618                                         struct iwl_tx_queue *txq,
619                                         int tx_fifo_id, int scd_retry)
620 {
621         int txq_id = txq->q.id;
622
623         /* Find out whether to activate Tx queue */
624         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
625
626         /* Set up and activate */
627         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
628                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
629                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
630                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
631                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
632                          IWL49_SCD_QUEUE_STTS_REG_MSK);
633
634         txq->sched_retry = scd_retry;
635
636         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
637                        active ? "Activate" : "Deactivate",
638                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
639 }
640
641 static const u16 default_queue_to_tx_fifo[] = {
642         IWL_TX_FIFO_AC3,
643         IWL_TX_FIFO_AC2,
644         IWL_TX_FIFO_AC1,
645         IWL_TX_FIFO_AC0,
646         IWL49_CMD_FIFO_NUM,
647         IWL_TX_FIFO_HCCA_1,
648         IWL_TX_FIFO_HCCA_2
649 };
650
651 static int iwl4965_alive_notify(struct iwl_priv *priv)
652 {
653         u32 a;
654         unsigned long flags;
655         int i, chan;
656         u32 reg_val;
657
658         spin_lock_irqsave(&priv->lock, flags);
659
660         /* Clear 4965's internal Tx Scheduler data base */
661         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
662         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
663         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
664                 iwl_write_targ_mem(priv, a, 0);
665         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
666                 iwl_write_targ_mem(priv, a, 0);
667         for (; a < priv->scd_base_addr +
668                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
669                 iwl_write_targ_mem(priv, a, 0);
670
671         /* Tel 4965 where to find Tx byte count tables */
672         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
673                         priv->scd_bc_tbls.dma >> 10);
674
675         /* Enable DMA channel */
676         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
677                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
678                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
679                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
680
681         /* Update FH chicken bits */
682         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
683         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
684                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
685
686         /* Disable chain mode for all queues */
687         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
688
689         /* Initialize each Tx queue (including the command queue) */
690         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
691
692                 /* TFD circular buffer read/write indexes */
693                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
694                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
695
696                 /* Max Tx Window size for Scheduler-ACK mode */
697                 iwl_write_targ_mem(priv, priv->scd_base_addr +
698                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
699                                 (SCD_WIN_SIZE <<
700                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
701                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
702
703                 /* Frame limit */
704                 iwl_write_targ_mem(priv, priv->scd_base_addr +
705                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
706                                 sizeof(u32),
707                                 (SCD_FRAME_LIMIT <<
708                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
709                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
710
711         }
712         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
713                                  (1 << priv->hw_params.max_txq_num) - 1);
714
715         /* Activate all Tx DMA/FIFO channels */
716         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
717
718         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
719
720         /* Map each Tx/cmd queue to its corresponding fifo */
721         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
722                 int ac = default_queue_to_tx_fifo[i];
723                 iwl_txq_ctx_activate(priv, i);
724                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
725         }
726
727         spin_unlock_irqrestore(&priv->lock, flags);
728
729         return 0;
730 }
731
732 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
733         .min_nrg_cck = 97,
734         .max_nrg_cck = 0, /* not used, set to 0 */
735
736         .auto_corr_min_ofdm = 85,
737         .auto_corr_min_ofdm_mrc = 170,
738         .auto_corr_min_ofdm_x1 = 105,
739         .auto_corr_min_ofdm_mrc_x1 = 220,
740
741         .auto_corr_max_ofdm = 120,
742         .auto_corr_max_ofdm_mrc = 210,
743         .auto_corr_max_ofdm_x1 = 140,
744         .auto_corr_max_ofdm_mrc_x1 = 270,
745
746         .auto_corr_min_cck = 125,
747         .auto_corr_max_cck = 200,
748         .auto_corr_min_cck_mrc = 200,
749         .auto_corr_max_cck_mrc = 400,
750
751         .nrg_th_cck = 100,
752         .nrg_th_ofdm = 100,
753 };
754
755 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
756 {
757         /* want Kelvin */
758         priv->hw_params.ct_kill_threshold =
759                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
760 }
761
762 /**
763  * iwl4965_hw_set_hw_params
764  *
765  * Called when initializing driver
766  */
767 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
768 {
769
770         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
771             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
772                 IWL_ERR(priv,
773                         "invalid queues_num, should be between %d and %d\n",
774                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
775                 return -EINVAL;
776         }
777
778         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
779         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
780         priv->hw_params.scd_bc_tbls_size =
781                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
782         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
783         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
784         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
785         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
786         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
787         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
788         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
789
790         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
791
792         priv->hw_params.tx_chains_num = 2;
793         priv->hw_params.rx_chains_num = 2;
794         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
795         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
796         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
797                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
798
799         priv->hw_params.sens = &iwl4965_sensitivity;
800
801         return 0;
802 }
803
804 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
805 {
806         s32 sign = 1;
807
808         if (num < 0) {
809                 sign = -sign;
810                 num = -num;
811         }
812         if (denom < 0) {
813                 sign = -sign;
814                 denom = -denom;
815         }
816         *res = 1;
817         *res = ((num * 2 + denom) / (denom * 2)) * sign;
818
819         return 1;
820 }
821
822 /**
823  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
824  *
825  * Determines power supply voltage compensation for txpower calculations.
826  * Returns number of 1/2-dB steps to subtract from gain table index,
827  * to compensate for difference between power supply voltage during
828  * factory measurements, vs. current power supply voltage.
829  *
830  * Voltage indication is higher for lower voltage.
831  * Lower voltage requires more gain (lower gain table index).
832  */
833 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
834                                             s32 current_voltage)
835 {
836         s32 comp = 0;
837
838         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
839             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
840                 return 0;
841
842         iwl4965_math_div_round(current_voltage - eeprom_voltage,
843                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
844
845         if (current_voltage > eeprom_voltage)
846                 comp *= 2;
847         if ((comp < -2) || (comp > 2))
848                 comp = 0;
849
850         return comp;
851 }
852
853 static s32 iwl4965_get_tx_atten_grp(u16 channel)
854 {
855         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
856             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
857                 return CALIB_CH_GROUP_5;
858
859         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
860             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
861                 return CALIB_CH_GROUP_1;
862
863         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
864             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
865                 return CALIB_CH_GROUP_2;
866
867         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
868             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
869                 return CALIB_CH_GROUP_3;
870
871         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
872             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
873                 return CALIB_CH_GROUP_4;
874
875         return -1;
876 }
877
878 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
879 {
880         s32 b = -1;
881
882         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
883                 if (priv->calib_info->band_info[b].ch_from == 0)
884                         continue;
885
886                 if ((channel >= priv->calib_info->band_info[b].ch_from)
887                     && (channel <= priv->calib_info->band_info[b].ch_to))
888                         break;
889         }
890
891         return b;
892 }
893
894 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
895 {
896         s32 val;
897
898         if (x2 == x1)
899                 return y1;
900         else {
901                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
902                 return val + y2;
903         }
904 }
905
906 /**
907  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
908  *
909  * Interpolates factory measurements from the two sample channels within a
910  * sub-band, to apply to channel of interest.  Interpolation is proportional to
911  * differences in channel frequencies, which is proportional to differences
912  * in channel number.
913  */
914 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
915                                     struct iwl_eeprom_calib_ch_info *chan_info)
916 {
917         s32 s = -1;
918         u32 c;
919         u32 m;
920         const struct iwl_eeprom_calib_measure *m1;
921         const struct iwl_eeprom_calib_measure *m2;
922         struct iwl_eeprom_calib_measure *omeas;
923         u32 ch_i1;
924         u32 ch_i2;
925
926         s = iwl4965_get_sub_band(priv, channel);
927         if (s >= EEPROM_TX_POWER_BANDS) {
928                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
929                 return -1;
930         }
931
932         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
933         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
934         chan_info->ch_num = (u8) channel;
935
936         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
937                           channel, s, ch_i1, ch_i2);
938
939         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
940                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
941                         m1 = &(priv->calib_info->band_info[s].ch1.
942                                measurements[c][m]);
943                         m2 = &(priv->calib_info->band_info[s].ch2.
944                                measurements[c][m]);
945                         omeas = &(chan_info->measurements[c][m]);
946
947                         omeas->actual_pow =
948                             (u8) iwl4965_interpolate_value(channel, ch_i1,
949                                                            m1->actual_pow,
950                                                            ch_i2,
951                                                            m2->actual_pow);
952                         omeas->gain_idx =
953                             (u8) iwl4965_interpolate_value(channel, ch_i1,
954                                                            m1->gain_idx, ch_i2,
955                                                            m2->gain_idx);
956                         omeas->temperature =
957                             (u8) iwl4965_interpolate_value(channel, ch_i1,
958                                                            m1->temperature,
959                                                            ch_i2,
960                                                            m2->temperature);
961                         omeas->pa_det =
962                             (s8) iwl4965_interpolate_value(channel, ch_i1,
963                                                            m1->pa_det, ch_i2,
964                                                            m2->pa_det);
965
966                         IWL_DEBUG_TXPOWER(priv,
967                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
968                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
969                         IWL_DEBUG_TXPOWER(priv,
970                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
971                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
972                         IWL_DEBUG_TXPOWER(priv,
973                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
974                                 m1->pa_det, m2->pa_det, omeas->pa_det);
975                         IWL_DEBUG_TXPOWER(priv,
976                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
977                                 m1->temperature, m2->temperature,
978                                 omeas->temperature);
979                 }
980         }
981
982         return 0;
983 }
984
985 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
986  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
987 static s32 back_off_table[] = {
988         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
989         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
990         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
991         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
992         10                      /* CCK */
993 };
994
995 /* Thermal compensation values for txpower for various frequency ranges ...
996  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
997 static struct iwl4965_txpower_comp_entry {
998         s32 degrees_per_05db_a;
999         s32 degrees_per_05db_a_denom;
1000 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1001         {9, 2},                 /* group 0 5.2, ch  34-43 */
1002         {4, 1},                 /* group 1 5.2, ch  44-70 */
1003         {4, 1},                 /* group 2 5.2, ch  71-124 */
1004         {4, 1},                 /* group 3 5.2, ch 125-200 */
1005         {3, 1}                  /* group 4 2.4, ch   all */
1006 };
1007
1008 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1009 {
1010         if (!band) {
1011                 if ((rate_power_index & 7) <= 4)
1012                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1013         }
1014         return MIN_TX_GAIN_INDEX;
1015 }
1016
1017 struct gain_entry {
1018         u8 dsp;
1019         u8 radio;
1020 };
1021
1022 static const struct gain_entry gain_table[2][108] = {
1023         /* 5.2GHz power gain index table */
1024         {
1025          {123, 0x3F},           /* highest txpower */
1026          {117, 0x3F},
1027          {110, 0x3F},
1028          {104, 0x3F},
1029          {98, 0x3F},
1030          {110, 0x3E},
1031          {104, 0x3E},
1032          {98, 0x3E},
1033          {110, 0x3D},
1034          {104, 0x3D},
1035          {98, 0x3D},
1036          {110, 0x3C},
1037          {104, 0x3C},
1038          {98, 0x3C},
1039          {110, 0x3B},
1040          {104, 0x3B},
1041          {98, 0x3B},
1042          {110, 0x3A},
1043          {104, 0x3A},
1044          {98, 0x3A},
1045          {110, 0x39},
1046          {104, 0x39},
1047          {98, 0x39},
1048          {110, 0x38},
1049          {104, 0x38},
1050          {98, 0x38},
1051          {110, 0x37},
1052          {104, 0x37},
1053          {98, 0x37},
1054          {110, 0x36},
1055          {104, 0x36},
1056          {98, 0x36},
1057          {110, 0x35},
1058          {104, 0x35},
1059          {98, 0x35},
1060          {110, 0x34},
1061          {104, 0x34},
1062          {98, 0x34},
1063          {110, 0x33},
1064          {104, 0x33},
1065          {98, 0x33},
1066          {110, 0x32},
1067          {104, 0x32},
1068          {98, 0x32},
1069          {110, 0x31},
1070          {104, 0x31},
1071          {98, 0x31},
1072          {110, 0x30},
1073          {104, 0x30},
1074          {98, 0x30},
1075          {110, 0x25},
1076          {104, 0x25},
1077          {98, 0x25},
1078          {110, 0x24},
1079          {104, 0x24},
1080          {98, 0x24},
1081          {110, 0x23},
1082          {104, 0x23},
1083          {98, 0x23},
1084          {110, 0x22},
1085          {104, 0x18},
1086          {98, 0x18},
1087          {110, 0x17},
1088          {104, 0x17},
1089          {98, 0x17},
1090          {110, 0x16},
1091          {104, 0x16},
1092          {98, 0x16},
1093          {110, 0x15},
1094          {104, 0x15},
1095          {98, 0x15},
1096          {110, 0x14},
1097          {104, 0x14},
1098          {98, 0x14},
1099          {110, 0x13},
1100          {104, 0x13},
1101          {98, 0x13},
1102          {110, 0x12},
1103          {104, 0x08},
1104          {98, 0x08},
1105          {110, 0x07},
1106          {104, 0x07},
1107          {98, 0x07},
1108          {110, 0x06},
1109          {104, 0x06},
1110          {98, 0x06},
1111          {110, 0x05},
1112          {104, 0x05},
1113          {98, 0x05},
1114          {110, 0x04},
1115          {104, 0x04},
1116          {98, 0x04},
1117          {110, 0x03},
1118          {104, 0x03},
1119          {98, 0x03},
1120          {110, 0x02},
1121          {104, 0x02},
1122          {98, 0x02},
1123          {110, 0x01},
1124          {104, 0x01},
1125          {98, 0x01},
1126          {110, 0x00},
1127          {104, 0x00},
1128          {98, 0x00},
1129          {93, 0x00},
1130          {88, 0x00},
1131          {83, 0x00},
1132          {78, 0x00},
1133          },
1134         /* 2.4GHz power gain index table */
1135         {
1136          {110, 0x3f},           /* highest txpower */
1137          {104, 0x3f},
1138          {98, 0x3f},
1139          {110, 0x3e},
1140          {104, 0x3e},
1141          {98, 0x3e},
1142          {110, 0x3d},
1143          {104, 0x3d},
1144          {98, 0x3d},
1145          {110, 0x3c},
1146          {104, 0x3c},
1147          {98, 0x3c},
1148          {110, 0x3b},
1149          {104, 0x3b},
1150          {98, 0x3b},
1151          {110, 0x3a},
1152          {104, 0x3a},
1153          {98, 0x3a},
1154          {110, 0x39},
1155          {104, 0x39},
1156          {98, 0x39},
1157          {110, 0x38},
1158          {104, 0x38},
1159          {98, 0x38},
1160          {110, 0x37},
1161          {104, 0x37},
1162          {98, 0x37},
1163          {110, 0x36},
1164          {104, 0x36},
1165          {98, 0x36},
1166          {110, 0x35},
1167          {104, 0x35},
1168          {98, 0x35},
1169          {110, 0x34},
1170          {104, 0x34},
1171          {98, 0x34},
1172          {110, 0x33},
1173          {104, 0x33},
1174          {98, 0x33},
1175          {110, 0x32},
1176          {104, 0x32},
1177          {98, 0x32},
1178          {110, 0x31},
1179          {104, 0x31},
1180          {98, 0x31},
1181          {110, 0x30},
1182          {104, 0x30},
1183          {98, 0x30},
1184          {110, 0x6},
1185          {104, 0x6},
1186          {98, 0x6},
1187          {110, 0x5},
1188          {104, 0x5},
1189          {98, 0x5},
1190          {110, 0x4},
1191          {104, 0x4},
1192          {98, 0x4},
1193          {110, 0x3},
1194          {104, 0x3},
1195          {98, 0x3},
1196          {110, 0x2},
1197          {104, 0x2},
1198          {98, 0x2},
1199          {110, 0x1},
1200          {104, 0x1},
1201          {98, 0x1},
1202          {110, 0x0},
1203          {104, 0x0},
1204          {98, 0x0},
1205          {97, 0},
1206          {96, 0},
1207          {95, 0},
1208          {94, 0},
1209          {93, 0},
1210          {92, 0},
1211          {91, 0},
1212          {90, 0},
1213          {89, 0},
1214          {88, 0},
1215          {87, 0},
1216          {86, 0},
1217          {85, 0},
1218          {84, 0},
1219          {83, 0},
1220          {82, 0},
1221          {81, 0},
1222          {80, 0},
1223          {79, 0},
1224          {78, 0},
1225          {77, 0},
1226          {76, 0},
1227          {75, 0},
1228          {74, 0},
1229          {73, 0},
1230          {72, 0},
1231          {71, 0},
1232          {70, 0},
1233          {69, 0},
1234          {68, 0},
1235          {67, 0},
1236          {66, 0},
1237          {65, 0},
1238          {64, 0},
1239          {63, 0},
1240          {62, 0},
1241          {61, 0},
1242          {60, 0},
1243          {59, 0},
1244          }
1245 };
1246
1247 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1248                                     u8 is_ht40, u8 ctrl_chan_high,
1249                                     struct iwl4965_tx_power_db *tx_power_tbl)
1250 {
1251         u8 saturation_power;
1252         s32 target_power;
1253         s32 user_target_power;
1254         s32 power_limit;
1255         s32 current_temp;
1256         s32 reg_limit;
1257         s32 current_regulatory;
1258         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1259         int i;
1260         int c;
1261         const struct iwl_channel_info *ch_info = NULL;
1262         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1263         const struct iwl_eeprom_calib_measure *measurement;
1264         s16 voltage;
1265         s32 init_voltage;
1266         s32 voltage_compensation;
1267         s32 degrees_per_05db_num;
1268         s32 degrees_per_05db_denom;
1269         s32 factory_temp;
1270         s32 temperature_comp[2];
1271         s32 factory_gain_index[2];
1272         s32 factory_actual_pwr[2];
1273         s32 power_index;
1274
1275         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1276          *   are used for indexing into txpower table) */
1277         user_target_power = 2 * priv->tx_power_user_lmt;
1278
1279         /* Get current (RXON) channel, band, width */
1280         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1281                           is_ht40);
1282
1283         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1284
1285         if (!is_channel_valid(ch_info))
1286                 return -EINVAL;
1287
1288         /* get txatten group, used to select 1) thermal txpower adjustment
1289          *   and 2) mimo txpower balance between Tx chains. */
1290         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1291         if (txatten_grp < 0) {
1292                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1293                           channel);
1294                 return -EINVAL;
1295         }
1296
1297         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1298                           channel, txatten_grp);
1299
1300         if (is_ht40) {
1301                 if (ctrl_chan_high)
1302                         channel -= 2;
1303                 else
1304                         channel += 2;
1305         }
1306
1307         /* hardware txpower limits ...
1308          * saturation (clipping distortion) txpowers are in half-dBm */
1309         if (band)
1310                 saturation_power = priv->calib_info->saturation_power24;
1311         else
1312                 saturation_power = priv->calib_info->saturation_power52;
1313
1314         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1315             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1316                 if (band)
1317                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1318                 else
1319                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1320         }
1321
1322         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1323          *   max_power_avg values are in dBm, convert * 2 */
1324         if (is_ht40)
1325                 reg_limit = ch_info->ht40_max_power_avg * 2;
1326         else
1327                 reg_limit = ch_info->max_power_avg * 2;
1328
1329         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1330             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1331                 if (band)
1332                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1333                 else
1334                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1335         }
1336
1337         /* Interpolate txpower calibration values for this channel,
1338          *   based on factory calibration tests on spaced channels. */
1339         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1340
1341         /* calculate tx gain adjustment based on power supply voltage */
1342         voltage = priv->calib_info->voltage;
1343         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1344         voltage_compensation =
1345             iwl4965_get_voltage_compensation(voltage, init_voltage);
1346
1347         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1348                           init_voltage,
1349                           voltage, voltage_compensation);
1350
1351         /* get current temperature (Celsius) */
1352         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1353         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1354         current_temp = KELVIN_TO_CELSIUS(current_temp);
1355
1356         /* select thermal txpower adjustment params, based on channel group
1357          *   (same frequency group used for mimo txatten adjustment) */
1358         degrees_per_05db_num =
1359             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1360         degrees_per_05db_denom =
1361             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1362
1363         /* get per-chain txpower values from factory measurements */
1364         for (c = 0; c < 2; c++) {
1365                 measurement = &ch_eeprom_info.measurements[c][1];
1366
1367                 /* txgain adjustment (in half-dB steps) based on difference
1368                  *   between factory and current temperature */
1369                 factory_temp = measurement->temperature;
1370                 iwl4965_math_div_round((current_temp - factory_temp) *
1371                                        degrees_per_05db_denom,
1372                                        degrees_per_05db_num,
1373                                        &temperature_comp[c]);
1374
1375                 factory_gain_index[c] = measurement->gain_idx;
1376                 factory_actual_pwr[c] = measurement->actual_pow;
1377
1378                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1379                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1380                                   "curr tmp %d, comp %d steps\n",
1381                                   factory_temp, current_temp,
1382                                   temperature_comp[c]);
1383
1384                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1385                                   factory_gain_index[c],
1386                                   factory_actual_pwr[c]);
1387         }
1388
1389         /* for each of 33 bit-rates (including 1 for CCK) */
1390         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1391                 u8 is_mimo_rate;
1392                 union iwl4965_tx_power_dual_stream tx_power;
1393
1394                 /* for mimo, reduce each chain's txpower by half
1395                  * (3dB, 6 steps), so total output power is regulatory
1396                  * compliant. */
1397                 if (i & 0x8) {
1398                         current_regulatory = reg_limit -
1399                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1400                         is_mimo_rate = 1;
1401                 } else {
1402                         current_regulatory = reg_limit;
1403                         is_mimo_rate = 0;
1404                 }
1405
1406                 /* find txpower limit, either hardware or regulatory */
1407                 power_limit = saturation_power - back_off_table[i];
1408                 if (power_limit > current_regulatory)
1409                         power_limit = current_regulatory;
1410
1411                 /* reduce user's txpower request if necessary
1412                  * for this rate on this channel */
1413                 target_power = user_target_power;
1414                 if (target_power > power_limit)
1415                         target_power = power_limit;
1416
1417                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1418                                   i, saturation_power - back_off_table[i],
1419                                   current_regulatory, user_target_power,
1420                                   target_power);
1421
1422                 /* for each of 2 Tx chains (radio transmitters) */
1423                 for (c = 0; c < 2; c++) {
1424                         s32 atten_value;
1425
1426                         if (is_mimo_rate)
1427                                 atten_value =
1428                                     (s32)le32_to_cpu(priv->card_alive_init.
1429                                     tx_atten[txatten_grp][c]);
1430                         else
1431                                 atten_value = 0;
1432
1433                         /* calculate index; higher index means lower txpower */
1434                         power_index = (u8) (factory_gain_index[c] -
1435                                             (target_power -
1436                                              factory_actual_pwr[c]) -
1437                                             temperature_comp[c] -
1438                                             voltage_compensation +
1439                                             atten_value);
1440
1441 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1442                                                 power_index); */
1443
1444                         if (power_index < get_min_power_index(i, band))
1445                                 power_index = get_min_power_index(i, band);
1446
1447                         /* adjust 5 GHz index to support negative indexes */
1448                         if (!band)
1449                                 power_index += 9;
1450
1451                         /* CCK, rate 32, reduce txpower for CCK */
1452                         if (i == POWER_TABLE_CCK_ENTRY)
1453                                 power_index +=
1454                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1455
1456                         /* stay within the table! */
1457                         if (power_index > 107) {
1458                                 IWL_WARN(priv, "txpower index %d > 107\n",
1459                                             power_index);
1460                                 power_index = 107;
1461                         }
1462                         if (power_index < 0) {
1463                                 IWL_WARN(priv, "txpower index %d < 0\n",
1464                                             power_index);
1465                                 power_index = 0;
1466                         }
1467
1468                         /* fill txpower command for this rate/chain */
1469                         tx_power.s.radio_tx_gain[c] =
1470                                 gain_table[band][power_index].radio;
1471                         tx_power.s.dsp_predis_atten[c] =
1472                                 gain_table[band][power_index].dsp;
1473
1474                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1475                                           "gain 0x%02x dsp %d\n",
1476                                           c, atten_value, power_index,
1477                                         tx_power.s.radio_tx_gain[c],
1478                                         tx_power.s.dsp_predis_atten[c]);
1479                 } /* for each chain */
1480
1481                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1482
1483         } /* for each rate */
1484
1485         return 0;
1486 }
1487
1488 /**
1489  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1490  *
1491  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1492  * The power limit is taken from priv->tx_power_user_lmt.
1493  */
1494 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1495 {
1496         struct iwl4965_txpowertable_cmd cmd = { 0 };
1497         int ret;
1498         u8 band = 0;
1499         bool is_ht40 = false;
1500         u8 ctrl_chan_high = 0;
1501
1502         if (test_bit(STATUS_SCANNING, &priv->status)) {
1503                 /* If this gets hit a lot, switch it to a BUG() and catch
1504                  * the stack trace to find out who is calling this during
1505                  * a scan. */
1506                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1507                 return -EAGAIN;
1508         }
1509
1510         band = priv->band == IEEE80211_BAND_2GHZ;
1511
1512         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1513
1514         if (is_ht40 &&
1515             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1516                 ctrl_chan_high = 1;
1517
1518         cmd.band = band;
1519         cmd.channel = priv->active_rxon.channel;
1520
1521         ret = iwl4965_fill_txpower_tbl(priv, band,
1522                                 le16_to_cpu(priv->active_rxon.channel),
1523                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1524         if (ret)
1525                 goto out;
1526
1527         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1528
1529 out:
1530         return ret;
1531 }
1532
1533 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1534 {
1535         int ret = 0;
1536         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1537         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1538         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1539
1540         if ((rxon1->flags == rxon2->flags) &&
1541             (rxon1->filter_flags == rxon2->filter_flags) &&
1542             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1543             (rxon1->ofdm_ht_single_stream_basic_rates ==
1544              rxon2->ofdm_ht_single_stream_basic_rates) &&
1545             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1546              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1547             (rxon1->rx_chain == rxon2->rx_chain) &&
1548             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1549                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1550                 return 0;
1551         }
1552
1553         rxon_assoc.flags = priv->staging_rxon.flags;
1554         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1555         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1556         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1557         rxon_assoc.reserved = 0;
1558         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1559             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1560         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1561             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1562         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1563
1564         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1565                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1566         if (ret)
1567                 return ret;
1568
1569         return ret;
1570 }
1571
1572 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1573 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1574 {
1575         int rc;
1576         u8 band = 0;
1577         bool is_ht40 = false;
1578         u8 ctrl_chan_high = 0;
1579         struct iwl4965_channel_switch_cmd cmd = { 0 };
1580         const struct iwl_channel_info *ch_info;
1581
1582         band = priv->band == IEEE80211_BAND_2GHZ;
1583
1584         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1585
1586         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1587
1588         if (is_ht40 &&
1589             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1590                 ctrl_chan_high = 1;
1591
1592         cmd.band = band;
1593         cmd.expect_beacon = 0;
1594         cmd.channel = cpu_to_le16(channel);
1595         cmd.rxon_flags = priv->active_rxon.flags;
1596         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1597         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1598         if (ch_info)
1599                 cmd.expect_beacon = is_channel_radar(ch_info);
1600         else
1601                 cmd.expect_beacon = 1;
1602
1603         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1604                                       ctrl_chan_high, &cmd.tx_power);
1605         if (rc) {
1606                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1607                 return rc;
1608         }
1609
1610         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1611         return rc;
1612 }
1613 #endif
1614
1615 /**
1616  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1617  */
1618 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1619                                             struct iwl_tx_queue *txq,
1620                                             u16 byte_cnt)
1621 {
1622         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1623         int txq_id = txq->q.id;
1624         int write_ptr = txq->q.write_ptr;
1625         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1626         __le16 bc_ent;
1627
1628         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1629
1630         bc_ent = cpu_to_le16(len & 0xFFF);
1631         /* Set up byte count within first 256 entries */
1632         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1633
1634         /* If within first 64 entries, duplicate at end */
1635         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1636                 scd_bc_tbl[txq_id].
1637                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1638 }
1639
1640 /**
1641  * sign_extend - Sign extend a value using specified bit as sign-bit
1642  *
1643  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1644  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1645  *
1646  * @param oper value to sign extend
1647  * @param index 0 based bit index (0<=index<32) to sign bit
1648  */
1649 static s32 sign_extend(u32 oper, int index)
1650 {
1651         u8 shift = 31 - index;
1652
1653         return (s32)(oper << shift) >> shift;
1654 }
1655
1656 /**
1657  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1658  * @statistics: Provides the temperature reading from the uCode
1659  *
1660  * A return of <0 indicates bogus data in the statistics
1661  */
1662 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1663 {
1664         s32 temperature;
1665         s32 vt;
1666         s32 R1, R2, R3;
1667         u32 R4;
1668
1669         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1670                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1671                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1672                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1673                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1674                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1675                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1676         } else {
1677                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1678                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1679                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1680                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1681                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1682         }
1683
1684         /*
1685          * Temperature is only 23 bits, so sign extend out to 32.
1686          *
1687          * NOTE If we haven't received a statistics notification yet
1688          * with an updated temperature, use R4 provided to us in the
1689          * "initialize" ALIVE response.
1690          */
1691         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1692                 vt = sign_extend(R4, 23);
1693         else
1694                 vt = sign_extend(
1695                         le32_to_cpu(priv->statistics.general.temperature), 23);
1696
1697         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1698
1699         if (R3 == R1) {
1700                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1701                 return -1;
1702         }
1703
1704         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1705          * Add offset to center the adjustment around 0 degrees Centigrade. */
1706         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1707         temperature /= (R3 - R1);
1708         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1709
1710         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1711                         temperature, KELVIN_TO_CELSIUS(temperature));
1712
1713         return temperature;
1714 }
1715
1716 /* Adjust Txpower only if temperature variance is greater than threshold. */
1717 #define IWL_TEMPERATURE_THRESHOLD   3
1718
1719 /**
1720  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1721  *
1722  * If the temperature changed has changed sufficiently, then a recalibration
1723  * is needed.
1724  *
1725  * Assumes caller will replace priv->last_temperature once calibration
1726  * executed.
1727  */
1728 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1729 {
1730         int temp_diff;
1731
1732         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1733                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1734                 return 0;
1735         }
1736
1737         temp_diff = priv->temperature - priv->last_temperature;
1738
1739         /* get absolute value */
1740         if (temp_diff < 0) {
1741                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1742                 temp_diff = -temp_diff;
1743         } else if (temp_diff == 0)
1744                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1745         else
1746                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1747
1748         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1749                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1750                 return 0;
1751         }
1752
1753         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1754
1755         return 1;
1756 }
1757
1758 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1759 {
1760         s32 temp;
1761
1762         temp = iwl4965_hw_get_temperature(priv);
1763         if (temp < 0)
1764                 return;
1765
1766         if (priv->temperature != temp) {
1767                 if (priv->temperature)
1768                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1769                                        "from %dC to %dC\n",
1770                                        KELVIN_TO_CELSIUS(priv->temperature),
1771                                        KELVIN_TO_CELSIUS(temp));
1772                 else
1773                         IWL_DEBUG_TEMP(priv, "Temperature "
1774                                        "initialized to %dC\n",
1775                                        KELVIN_TO_CELSIUS(temp));
1776         }
1777
1778         priv->temperature = temp;
1779         iwl_tt_handler(priv);
1780         set_bit(STATUS_TEMPERATURE, &priv->status);
1781
1782         if (!priv->disable_tx_power_cal &&
1783              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1784              iwl4965_is_temp_calib_needed(priv))
1785                 queue_work(priv->workqueue, &priv->txpower_work);
1786 }
1787
1788 /**
1789  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1790  */
1791 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1792                                             u16 txq_id)
1793 {
1794         /* Simply stop the queue, but don't change any configuration;
1795          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1796         iwl_write_prph(priv,
1797                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1798                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1799                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1800 }
1801
1802 /**
1803  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1804  * priv->lock must be held by the caller
1805  */
1806 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1807                                    u16 ssn_idx, u8 tx_fifo)
1808 {
1809         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1810             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1811                 IWL_WARN(priv,
1812                         "queue number out of range: %d, must be %d to %d\n",
1813                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1814                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1815                 return -EINVAL;
1816         }
1817
1818         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1819
1820         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1821
1822         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1823         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1824         /* supposes that ssn_idx is valid (!= 0xFFF) */
1825         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1826
1827         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1828         iwl_txq_ctx_deactivate(priv, txq_id);
1829         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1830
1831         return 0;
1832 }
1833
1834 /**
1835  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1836  */
1837 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1838                                         u16 txq_id)
1839 {
1840         u32 tbl_dw_addr;
1841         u32 tbl_dw;
1842         u16 scd_q2ratid;
1843
1844         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1845
1846         tbl_dw_addr = priv->scd_base_addr +
1847                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1848
1849         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1850
1851         if (txq_id & 0x1)
1852                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1853         else
1854                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1855
1856         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1857
1858         return 0;
1859 }
1860
1861
1862 /**
1863  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1864  *
1865  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1866  *        i.e. it must be one of the higher queues used for aggregation
1867  */
1868 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1869                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1870 {
1871         unsigned long flags;
1872         u16 ra_tid;
1873
1874         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1875             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1876                 IWL_WARN(priv,
1877                         "queue number out of range: %d, must be %d to %d\n",
1878                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1879                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1880                 return -EINVAL;
1881         }
1882
1883         ra_tid = BUILD_RAxTID(sta_id, tid);
1884
1885         /* Modify device's station table to Tx this TID */
1886         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1887
1888         spin_lock_irqsave(&priv->lock, flags);
1889
1890         /* Stop this Tx queue before configuring it */
1891         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1892
1893         /* Map receiver-address / traffic-ID to this queue */
1894         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1895
1896         /* Set this queue as a chain-building queue */
1897         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1898
1899         /* Place first TFD at index corresponding to start sequence number.
1900          * Assumes that ssn_idx is valid (!= 0xFFF) */
1901         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1902         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1903         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1904
1905         /* Set up Tx window size and frame limit for this queue */
1906         iwl_write_targ_mem(priv,
1907                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1908                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1909                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1910
1911         iwl_write_targ_mem(priv, priv->scd_base_addr +
1912                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1913                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1914                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1915
1916         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1917
1918         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1919         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1920
1921         spin_unlock_irqrestore(&priv->lock, flags);
1922
1923         return 0;
1924 }
1925
1926
1927 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1928 {
1929         switch (cmd_id) {
1930         case REPLY_RXON:
1931                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1932         default:
1933                 return len;
1934         }
1935 }
1936
1937 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1938 {
1939         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1940         addsta->mode = cmd->mode;
1941         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1942         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1943         addsta->station_flags = cmd->station_flags;
1944         addsta->station_flags_msk = cmd->station_flags_msk;
1945         addsta->tid_disable_tx = cmd->tid_disable_tx;
1946         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1947         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1948         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1949         addsta->reserved1 = cpu_to_le16(0);
1950         addsta->reserved2 = cpu_to_le32(0);
1951
1952         return (u16)sizeof(struct iwl4965_addsta_cmd);
1953 }
1954
1955 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1956 {
1957         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1958 }
1959
1960 /**
1961  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1962  */
1963 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1964                                       struct iwl_ht_agg *agg,
1965                                       struct iwl4965_tx_resp *tx_resp,
1966                                       int txq_id, u16 start_idx)
1967 {
1968         u16 status;
1969         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1970         struct ieee80211_tx_info *info = NULL;
1971         struct ieee80211_hdr *hdr = NULL;
1972         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1973         int i, sh, idx;
1974         u16 seq;
1975         if (agg->wait_for_ba)
1976                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1977
1978         agg->frame_count = tx_resp->frame_count;
1979         agg->start_idx = start_idx;
1980         agg->rate_n_flags = rate_n_flags;
1981         agg->bitmap = 0;
1982
1983         /* num frames attempted by Tx command */
1984         if (agg->frame_count == 1) {
1985                 /* Only one frame was attempted; no block-ack will arrive */
1986                 status = le16_to_cpu(frame_status[0].status);
1987                 idx = start_idx;
1988
1989                 /* FIXME: code repetition */
1990                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1991                                    agg->frame_count, agg->start_idx, idx);
1992
1993                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1994                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1995                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1996                 info->flags |= iwl_is_tx_success(status) ?
1997                         IEEE80211_TX_STAT_ACK : 0;
1998                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1999                 /* FIXME: code repetition end */
2000
2001                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
2002                                     status & 0xff, tx_resp->failure_frame);
2003                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
2004
2005                 agg->wait_for_ba = 0;
2006         } else {
2007                 /* Two or more frames were attempted; expect block-ack */
2008                 u64 bitmap = 0;
2009                 int start = agg->start_idx;
2010
2011                 /* Construct bit-map of pending frames within Tx window */
2012                 for (i = 0; i < agg->frame_count; i++) {
2013                         u16 sc;
2014                         status = le16_to_cpu(frame_status[i].status);
2015                         seq  = le16_to_cpu(frame_status[i].sequence);
2016                         idx = SEQ_TO_INDEX(seq);
2017                         txq_id = SEQ_TO_QUEUE(seq);
2018
2019                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2020                                       AGG_TX_STATE_ABORT_MSK))
2021                                 continue;
2022
2023                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2024                                            agg->frame_count, txq_id, idx);
2025
2026                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2027                         if (!hdr) {
2028                                 IWL_ERR(priv,
2029                                         "BUG_ON idx doesn't point to valid skb"
2030                                         " idx=%d, txq_id=%d\n", idx, txq_id);
2031                                 return -1;
2032                         }
2033
2034                         sc = le16_to_cpu(hdr->seq_ctrl);
2035                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2036                                 IWL_ERR(priv,
2037                                         "BUG_ON idx doesn't match seq control"
2038                                         " idx=%d, seq_idx=%d, seq=%d\n",
2039                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2040                                 return -1;
2041                         }
2042
2043                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2044                                            i, idx, SEQ_TO_SN(sc));
2045
2046                         sh = idx - start;
2047                         if (sh > 64) {
2048                                 sh = (start - idx) + 0xff;
2049                                 bitmap = bitmap << sh;
2050                                 sh = 0;
2051                                 start = idx;
2052                         } else if (sh < -64)
2053                                 sh  = 0xff - (start - idx);
2054                         else if (sh < 0) {
2055                                 sh = start - idx;
2056                                 start = idx;
2057                                 bitmap = bitmap << sh;
2058                                 sh = 0;
2059                         }
2060                         bitmap |= 1ULL << sh;
2061                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2062                                            start, (unsigned long long)bitmap);
2063                 }
2064
2065                 agg->bitmap = bitmap;
2066                 agg->start_idx = start;
2067                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2068                                    agg->frame_count, agg->start_idx,
2069                                    (unsigned long long)agg->bitmap);
2070
2071                 if (bitmap)
2072                         agg->wait_for_ba = 1;
2073         }
2074         return 0;
2075 }
2076
2077 /**
2078  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2079  */
2080 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2081                                 struct iwl_rx_mem_buffer *rxb)
2082 {
2083         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2084         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2085         int txq_id = SEQ_TO_QUEUE(sequence);
2086         int index = SEQ_TO_INDEX(sequence);
2087         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2088         struct ieee80211_hdr *hdr;
2089         struct ieee80211_tx_info *info;
2090         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2091         u32  status = le32_to_cpu(tx_resp->u.status);
2092         int tid = MAX_TID_COUNT;
2093         int sta_id;
2094         int freed;
2095         u8 *qc = NULL;
2096
2097         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2098                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2099                           "is out of range [0-%d] %d %d\n", txq_id,
2100                           index, txq->q.n_bd, txq->q.write_ptr,
2101                           txq->q.read_ptr);
2102                 return;
2103         }
2104
2105         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2106         memset(&info->status, 0, sizeof(info->status));
2107
2108         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2109         if (ieee80211_is_data_qos(hdr->frame_control)) {
2110                 qc = ieee80211_get_qos_ctl(hdr);
2111                 tid = qc[0] & 0xf;
2112         }
2113
2114         sta_id = iwl_get_ra_sta_id(priv, hdr);
2115         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2116                 IWL_ERR(priv, "Station not known\n");
2117                 return;
2118         }
2119
2120         if (txq->sched_retry) {
2121                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2122                 struct iwl_ht_agg *agg = NULL;
2123
2124                 WARN_ON(!qc);
2125
2126                 agg = &priv->stations[sta_id].tid[tid].agg;
2127
2128                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2129
2130                 /* check if BAR is needed */
2131                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2132                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2133
2134                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2135                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2136                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2137                                            "%d index %d\n", scd_ssn , index);
2138                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2139                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2140
2141                         if (priv->mac80211_registered &&
2142                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2143                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2144                                 if (agg->state == IWL_AGG_OFF)
2145                                         iwl_wake_queue(priv, txq_id);
2146                                 else
2147                                         iwl_wake_queue(priv, txq->swq_id);
2148                         }
2149                 }
2150         } else {
2151                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2152                 info->flags |= iwl_is_tx_success(status) ?
2153                                         IEEE80211_TX_STAT_ACK : 0;
2154                 iwl_hwrate_to_tx_control(priv,
2155                                         le32_to_cpu(tx_resp->rate_n_flags),
2156                                         info);
2157
2158                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2159                                    "rate_n_flags 0x%x retries %d\n",
2160                                    txq_id,
2161                                    iwl_get_tx_fail_reason(status), status,
2162                                    le32_to_cpu(tx_resp->rate_n_flags),
2163                                    tx_resp->failure_frame);
2164
2165                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2166                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2167                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2168
2169                 if (priv->mac80211_registered &&
2170                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2171                         iwl_wake_queue(priv, txq_id);
2172         }
2173
2174         if (qc && likely(sta_id != IWL_INVALID_STATION))
2175                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2176
2177         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2178                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2179 }
2180
2181 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2182                              struct iwl_rx_phy_res *rx_resp)
2183 {
2184         /* data from PHY/DSP regarding signal strength, etc.,
2185          *   contents are always there, not configurable by host.  */
2186         struct iwl4965_rx_non_cfg_phy *ncphy =
2187             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2188         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2189                         >> IWL49_AGC_DB_POS;
2190
2191         u32 valid_antennae =
2192             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2193                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2194         u8 max_rssi = 0;
2195         u32 i;
2196
2197         /* Find max rssi among 3 possible receivers.
2198          * These values are measured by the digital signal processor (DSP).
2199          * They should stay fairly constant even as the signal strength varies,
2200          *   if the radio's automatic gain control (AGC) is working right.
2201          * AGC value (see below) will provide the "interesting" info. */
2202         for (i = 0; i < 3; i++)
2203                 if (valid_antennae & (1 << i))
2204                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2205
2206         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2207                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2208                 max_rssi, agc);
2209
2210         /* dBm = max_rssi dB - agc dB - constant.
2211          * Higher AGC (higher radio gain) means lower signal. */
2212         return max_rssi - agc - IWL49_RSSI_OFFSET;
2213 }
2214
2215
2216 /* Set up 4965-specific Rx frame reply handlers */
2217 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2218 {
2219         /* Legacy Rx frames */
2220         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2221         /* Tx response */
2222         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2223 }
2224
2225 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2226 {
2227         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2228 }
2229
2230 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2231 {
2232         cancel_work_sync(&priv->txpower_work);
2233 }
2234
2235 #define IWL4965_UCODE_GET(item)                                         \
2236 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2237                                     u32 api_ver)                        \
2238 {                                                                       \
2239         return le32_to_cpu(ucode->u.v1.item);                           \
2240 }
2241
2242 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2243 {
2244         return UCODE_HEADER_SIZE(1);
2245 }
2246 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2247                                    u32 api_ver)
2248 {
2249         return 0;
2250 }
2251 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2252                                   u32 api_ver)
2253 {
2254         return (u8 *) ucode->u.v1.data;
2255 }
2256
2257 IWL4965_UCODE_GET(inst_size);
2258 IWL4965_UCODE_GET(data_size);
2259 IWL4965_UCODE_GET(init_size);
2260 IWL4965_UCODE_GET(init_data_size);
2261 IWL4965_UCODE_GET(boot_size);
2262
2263 static struct iwl_hcmd_ops iwl4965_hcmd = {
2264         .rxon_assoc = iwl4965_send_rxon_assoc,
2265         .commit_rxon = iwl_commit_rxon,
2266         .set_rxon_chain = iwl_set_rxon_chain,
2267 };
2268
2269 static struct iwl_ucode_ops iwl4965_ucode = {
2270         .get_header_size = iwl4965_ucode_get_header_size,
2271         .get_build = iwl4965_ucode_get_build,
2272         .get_inst_size = iwl4965_ucode_get_inst_size,
2273         .get_data_size = iwl4965_ucode_get_data_size,
2274         .get_init_size = iwl4965_ucode_get_init_size,
2275         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2276         .get_boot_size = iwl4965_ucode_get_boot_size,
2277         .get_data = iwl4965_ucode_get_data,
2278 };
2279 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2280         .get_hcmd_size = iwl4965_get_hcmd_size,
2281         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2282         .chain_noise_reset = iwl4965_chain_noise_reset,
2283         .gain_computation = iwl4965_gain_computation,
2284         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2285         .calc_rssi = iwl4965_calc_rssi,
2286 };
2287
2288 static struct iwl_lib_ops iwl4965_lib = {
2289         .set_hw_params = iwl4965_hw_set_hw_params,
2290         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2291         .txq_set_sched = iwl4965_txq_set_sched,
2292         .txq_agg_enable = iwl4965_txq_agg_enable,
2293         .txq_agg_disable = iwl4965_txq_agg_disable,
2294         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2295         .txq_free_tfd = iwl_hw_txq_free_tfd,
2296         .txq_init = iwl_hw_tx_queue_init,
2297         .rx_handler_setup = iwl4965_rx_handler_setup,
2298         .setup_deferred_work = iwl4965_setup_deferred_work,
2299         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2300         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2301         .alive_notify = iwl4965_alive_notify,
2302         .init_alive_start = iwl4965_init_alive_start,
2303         .load_ucode = iwl4965_load_bsm,
2304         .dump_nic_event_log = iwl_dump_nic_event_log,
2305         .dump_nic_error_log = iwl_dump_nic_error_log,
2306         .apm_ops = {
2307                 .init = iwl4965_apm_init,
2308                 .reset = iwl4965_apm_reset,
2309                 .stop = iwl4965_apm_stop,
2310                 .config = iwl4965_nic_config,
2311                 .set_pwr_src = iwl_set_pwr_src,
2312         },
2313         .eeprom_ops = {
2314                 .regulatory_bands = {
2315                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2316                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2317                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2318                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2319                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2320                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2321                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2322                 },
2323                 .verify_signature  = iwlcore_eeprom_verify_signature,
2324                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2325                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2326                 .calib_version = iwl4965_eeprom_calib_version,
2327                 .query_addr = iwlcore_eeprom_query_addr,
2328         },
2329         .send_tx_power  = iwl4965_send_tx_power,
2330         .update_chain_flags = iwl_update_chain_flags,
2331         .post_associate = iwl_post_associate,
2332         .config_ap = iwl_config_ap,
2333         .isr = iwl_isr_legacy,
2334         .temp_ops = {
2335                 .temperature = iwl4965_temperature_calib,
2336                 .set_ct_kill = iwl4965_set_ct_threshold,
2337         },
2338 };
2339
2340 static struct iwl_ops iwl4965_ops = {
2341         .ucode = &iwl4965_ucode,
2342         .lib = &iwl4965_lib,
2343         .hcmd = &iwl4965_hcmd,
2344         .utils = &iwl4965_hcmd_utils,
2345         .led = &iwlagn_led_ops,
2346 };
2347
2348 struct iwl_cfg iwl4965_agn_cfg = {
2349         .name = "4965AGN",
2350         .fw_name_pre = IWL4965_FW_PRE,
2351         .ucode_api_max = IWL4965_UCODE_API_MAX,
2352         .ucode_api_min = IWL4965_UCODE_API_MIN,
2353         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2354         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2355         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2356         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2357         .ops = &iwl4965_ops,
2358         .mod_params = &iwl4965_mod_params,
2359         .use_isr_legacy = true,
2360         .ht_greenfield_support = false,
2361         .broken_powersave = true,
2362         .led_compensation = 61,
2363         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2364 };
2365
2366 /* Module firmware */
2367 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2368
2369 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2370 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2371 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2372 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2373 module_param_named(
2374         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2375 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2376
2377 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2378 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2379 /* 11n */
2380 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2381 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2382 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2383                    int, S_IRUGO);
2384 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2385
2386 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2387 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");