iwlwifi: set sm_ps_mode as part of cfg parameters
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  *  Intel Linux Wireless <ilw@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39
40 #include "iwl-eeprom.h"
41 #include "iwl-dev.h"
42 #include "iwl-core.h"
43 #include "iwl-io.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
46 #include "iwl-sta.h"
47 #include "iwl-agn-led.h"
48
49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
51
52 /* Highest firmware API version supported */
53 #define IWL4965_UCODE_API_MAX 2
54
55 /* Lowest firmware API version supported */
56 #define IWL4965_UCODE_API_MIN 2
57
58 #define IWL4965_FW_PRE "iwlwifi-4965-"
59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
61
62
63 /* module parameters */
64 static struct iwl_mod_params iwl4965_mod_params = {
65         .amsdu_size_8K = 1,
66         .restart_fw = 1,
67         /* the rest are 0 by default */
68 };
69
70 /* check contents of special bootstrap uCode SRAM */
71 static int iwl4965_verify_bsm(struct iwl_priv *priv)
72 {
73         __le32 *image = priv->ucode_boot.v_addr;
74         u32 len = priv->ucode_boot.len;
75         u32 reg;
76         u32 val;
77
78         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
79
80         /* verify BSM SRAM contents */
81         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
82         for (reg = BSM_SRAM_LOWER_BOUND;
83              reg < BSM_SRAM_LOWER_BOUND + len;
84              reg += sizeof(u32), image++) {
85                 val = iwl_read_prph(priv, reg);
86                 if (val != le32_to_cpu(*image)) {
87                         IWL_ERR(priv, "BSM uCode verification failed at "
88                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
89                                   BSM_SRAM_LOWER_BOUND,
90                                   reg - BSM_SRAM_LOWER_BOUND, len,
91                                   val, le32_to_cpu(*image));
92                         return -EIO;
93                 }
94         }
95
96         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
97
98         return 0;
99 }
100
101 /**
102  * iwl4965_load_bsm - Load bootstrap instructions
103  *
104  * BSM operation:
105  *
106  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
107  * in special SRAM that does not power down during RFKILL.  When powering back
108  * up after power-saving sleeps (or during initial uCode load), the BSM loads
109  * the bootstrap program into the on-board processor, and starts it.
110  *
111  * The bootstrap program loads (via DMA) instructions and data for a new
112  * program from host DRAM locations indicated by the host driver in the
113  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
114  * automatically.
115  *
116  * When initializing the NIC, the host driver points the BSM to the
117  * "initialize" uCode image.  This uCode sets up some internal data, then
118  * notifies host via "initialize alive" that it is complete.
119  *
120  * The host then replaces the BSM_DRAM_* pointer values to point to the
121  * normal runtime uCode instructions and a backup uCode data cache buffer
122  * (filled initially with starting data values for the on-board processor),
123  * then triggers the "initialize" uCode to load and launch the runtime uCode,
124  * which begins normal operation.
125  *
126  * When doing a power-save shutdown, runtime uCode saves data SRAM into
127  * the backup data cache in DRAM before SRAM is powered down.
128  *
129  * When powering back up, the BSM loads the bootstrap program.  This reloads
130  * the runtime uCode instructions and the backup data cache into SRAM,
131  * and re-launches the runtime uCode from where it left off.
132  */
133 static int iwl4965_load_bsm(struct iwl_priv *priv)
134 {
135         __le32 *image = priv->ucode_boot.v_addr;
136         u32 len = priv->ucode_boot.len;
137         dma_addr_t pinst;
138         dma_addr_t pdata;
139         u32 inst_len;
140         u32 data_len;
141         int i;
142         u32 done;
143         u32 reg_offset;
144         int ret;
145
146         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
147
148         priv->ucode_type = UCODE_RT;
149
150         /* make sure bootstrap program is no larger than BSM's SRAM size */
151         if (len > IWL49_MAX_BSM_SIZE)
152                 return -EINVAL;
153
154         /* Tell bootstrap uCode where to find the "Initialize" uCode
155          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
156          * NOTE:  iwl_init_alive_start() will replace these values,
157          *        after the "initialize" uCode has run, to point to
158          *        runtime/protocol instructions and backup data cache.
159          */
160         pinst = priv->ucode_init.p_addr >> 4;
161         pdata = priv->ucode_init_data.p_addr >> 4;
162         inst_len = priv->ucode_init.len;
163         data_len = priv->ucode_init_data.len;
164
165         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
166         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
167         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
168         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
169
170         /* Fill BSM memory with bootstrap instructions */
171         for (reg_offset = BSM_SRAM_LOWER_BOUND;
172              reg_offset < BSM_SRAM_LOWER_BOUND + len;
173              reg_offset += sizeof(u32), image++)
174                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
175
176         ret = iwl4965_verify_bsm(priv);
177         if (ret)
178                 return ret;
179
180         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
181         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
182         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
183         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
184
185         /* Load bootstrap code into instruction SRAM now,
186          *   to prepare to load "initialize" uCode */
187         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
188
189         /* Wait for load of bootstrap uCode to finish */
190         for (i = 0; i < 100; i++) {
191                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
192                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
193                         break;
194                 udelay(10);
195         }
196         if (i < 100)
197                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
198         else {
199                 IWL_ERR(priv, "BSM write did not complete!\n");
200                 return -EIO;
201         }
202
203         /* Enable future boot loads whenever power management unit triggers it
204          *   (e.g. when powering back up after power-save shutdown) */
205         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
206
207
208         return 0;
209 }
210
211 /**
212  * iwl4965_set_ucode_ptrs - Set uCode address location
213  *
214  * Tell initialization uCode where to find runtime uCode.
215  *
216  * BSM registers initially contain pointers to initialization uCode.
217  * We need to replace them to load runtime uCode inst and data,
218  * and to save runtime data when powering down.
219  */
220 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
221 {
222         dma_addr_t pinst;
223         dma_addr_t pdata;
224         int ret = 0;
225
226         /* bits 35:4 for 4965 */
227         pinst = priv->ucode_code.p_addr >> 4;
228         pdata = priv->ucode_data_backup.p_addr >> 4;
229
230         /* Tell bootstrap uCode where to find image to load */
231         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
232         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
233         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
234                                  priv->ucode_data.len);
235
236         /* Inst byte count must be last to set up, bit 31 signals uCode
237          *   that all new ptr/size info is in place */
238         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
239                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
240         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
241
242         return ret;
243 }
244
245 /**
246  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
247  *
248  * Called after REPLY_ALIVE notification received from "initialize" uCode.
249  *
250  * The 4965 "initialize" ALIVE reply contains calibration data for:
251  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
252  *   (3945 does not contain this data).
253  *
254  * Tell "initialize" uCode to go ahead and load the runtime uCode.
255 */
256 static void iwl4965_init_alive_start(struct iwl_priv *priv)
257 {
258         /* Check alive response for "valid" sign from uCode */
259         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
260                 /* We had an error bringing up the hardware, so take it
261                  * all the way back down so we can try again */
262                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
263                 goto restart;
264         }
265
266         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
267          * This is a paranoid check, because we would not have gotten the
268          * "initialize" alive if code weren't properly loaded.  */
269         if (iwl_verify_ucode(priv)) {
270                 /* Runtime instruction load was bad;
271                  * take it all the way back down so we can try again */
272                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
273                 goto restart;
274         }
275
276         /* Calculate temperature */
277         priv->temperature = iwl4965_hw_get_temperature(priv);
278
279         /* Send pointers to protocol/runtime uCode image ... init code will
280          * load and launch runtime uCode, which will send us another "Alive"
281          * notification. */
282         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
283         if (iwl4965_set_ucode_ptrs(priv)) {
284                 /* Runtime instruction load won't happen;
285                  * take it all the way back down so we can try again */
286                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
287                 goto restart;
288         }
289         return;
290
291 restart:
292         queue_work(priv->workqueue, &priv->restart);
293 }
294
295 static bool is_ht40_channel(__le32 rxon_flags)
296 {
297         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
298                                     >> RXON_FLG_CHANNEL_MODE_POS;
299         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
300                   (chan_mod == CHANNEL_MODE_MIXED));
301 }
302
303 /*
304  * EEPROM handlers
305  */
306 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
307 {
308         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
309 }
310
311 /*
312  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
313  * must be called under priv->lock and mac access
314  */
315 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
316 {
317         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
318 }
319
320 static void iwl4965_nic_config(struct iwl_priv *priv)
321 {
322         unsigned long flags;
323         u16 radio_cfg;
324
325         spin_lock_irqsave(&priv->lock, flags);
326
327         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
328
329         /* write radio config values to register */
330         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
331                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
332                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
333                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
334                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
335
336         /* set CSR_HW_CONFIG_REG for uCode use */
337         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
338                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
339                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
340
341         priv->calib_info = (struct iwl_eeprom_calib_info *)
342                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
343
344         spin_unlock_irqrestore(&priv->lock, flags);
345 }
346
347 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
348  * Called after every association, but this runs only once!
349  *  ... once chain noise is calibrated the first time, it's good forever.  */
350 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
351 {
352         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
353
354         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
355                 struct iwl_calib_diff_gain_cmd cmd;
356
357                 memset(&cmd, 0, sizeof(cmd));
358                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
359                 cmd.diff_gain_a = 0;
360                 cmd.diff_gain_b = 0;
361                 cmd.diff_gain_c = 0;
362                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
363                                  sizeof(cmd), &cmd))
364                         IWL_ERR(priv,
365                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
366                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
367                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
368         }
369 }
370
371 static void iwl4965_gain_computation(struct iwl_priv *priv,
372                 u32 *average_noise,
373                 u16 min_average_noise_antenna_i,
374                 u32 min_average_noise,
375                 u8 default_chain)
376 {
377         int i, ret;
378         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
379
380         data->delta_gain_code[min_average_noise_antenna_i] = 0;
381
382         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
383                 s32 delta_g = 0;
384
385                 if (!(data->disconn_array[i]) &&
386                     (data->delta_gain_code[i] ==
387                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
388                         delta_g = average_noise[i] - min_average_noise;
389                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
390                         data->delta_gain_code[i] =
391                                 min(data->delta_gain_code[i],
392                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
393
394                         data->delta_gain_code[i] =
395                                 (data->delta_gain_code[i] | (1 << 2));
396                 } else {
397                         data->delta_gain_code[i] = 0;
398                 }
399         }
400         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
401                      data->delta_gain_code[0],
402                      data->delta_gain_code[1],
403                      data->delta_gain_code[2]);
404
405         /* Differential gain gets sent to uCode only once */
406         if (!data->radio_write) {
407                 struct iwl_calib_diff_gain_cmd cmd;
408                 data->radio_write = 1;
409
410                 memset(&cmd, 0, sizeof(cmd));
411                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
412                 cmd.diff_gain_a = data->delta_gain_code[0];
413                 cmd.diff_gain_b = data->delta_gain_code[1];
414                 cmd.diff_gain_c = data->delta_gain_code[2];
415                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
416                                       sizeof(cmd), &cmd);
417                 if (ret)
418                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
419                                      "REPLY_PHY_CALIBRATION_CMD \n");
420
421                 /* TODO we might want recalculate
422                  * rx_chain in rxon cmd */
423
424                 /* Mark so we run this algo only once! */
425                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
426         }
427         data->chain_noise_a = 0;
428         data->chain_noise_b = 0;
429         data->chain_noise_c = 0;
430         data->chain_signal_a = 0;
431         data->chain_signal_b = 0;
432         data->chain_signal_c = 0;
433         data->beacon_count = 0;
434 }
435
436 static void iwl4965_bg_txpower_work(struct work_struct *work)
437 {
438         struct iwl_priv *priv = container_of(work, struct iwl_priv,
439                         txpower_work);
440
441         /* If a scan happened to start before we got here
442          * then just return; the statistics notification will
443          * kick off another scheduled work to compensate for
444          * any temperature delta we missed here. */
445         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
446             test_bit(STATUS_SCANNING, &priv->status))
447                 return;
448
449         mutex_lock(&priv->mutex);
450
451         /* Regardless of if we are associated, we must reconfigure the
452          * TX power since frames can be sent on non-radar channels while
453          * not associated */
454         iwl4965_send_tx_power(priv);
455
456         /* Update last_temperature to keep is_calib_needed from running
457          * when it isn't needed... */
458         priv->last_temperature = priv->temperature;
459
460         mutex_unlock(&priv->mutex);
461 }
462
463 /*
464  * Acquire priv->lock before calling this function !
465  */
466 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
467 {
468         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
469                              (index & 0xff) | (txq_id << 8));
470         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
471 }
472
473 /**
474  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
475  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
476  * @scd_retry: (1) Indicates queue will be used in aggregation mode
477  *
478  * NOTE:  Acquire priv->lock before calling this function !
479  */
480 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
481                                         struct iwl_tx_queue *txq,
482                                         int tx_fifo_id, int scd_retry)
483 {
484         int txq_id = txq->q.id;
485
486         /* Find out whether to activate Tx queue */
487         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
488
489         /* Set up and activate */
490         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
491                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
492                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
493                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
494                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
495                          IWL49_SCD_QUEUE_STTS_REG_MSK);
496
497         txq->sched_retry = scd_retry;
498
499         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
500                        active ? "Activate" : "Deactivate",
501                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
502 }
503
504 static const u16 default_queue_to_tx_fifo[] = {
505         IWL_TX_FIFO_AC3,
506         IWL_TX_FIFO_AC2,
507         IWL_TX_FIFO_AC1,
508         IWL_TX_FIFO_AC0,
509         IWL49_CMD_FIFO_NUM,
510         IWL_TX_FIFO_HCCA_1,
511         IWL_TX_FIFO_HCCA_2
512 };
513
514 static int iwl4965_alive_notify(struct iwl_priv *priv)
515 {
516         u32 a;
517         unsigned long flags;
518         int i, chan;
519         u32 reg_val;
520
521         spin_lock_irqsave(&priv->lock, flags);
522
523         /* Clear 4965's internal Tx Scheduler data base */
524         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
525         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
526         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
527                 iwl_write_targ_mem(priv, a, 0);
528         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
529                 iwl_write_targ_mem(priv, a, 0);
530         for (; a < priv->scd_base_addr +
531                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
532                 iwl_write_targ_mem(priv, a, 0);
533
534         /* Tel 4965 where to find Tx byte count tables */
535         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
536                         priv->scd_bc_tbls.dma >> 10);
537
538         /* Enable DMA channel */
539         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
540                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
541                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
542                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
543
544         /* Update FH chicken bits */
545         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
546         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
547                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
548
549         /* Disable chain mode for all queues */
550         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
551
552         /* Initialize each Tx queue (including the command queue) */
553         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
554
555                 /* TFD circular buffer read/write indexes */
556                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
557                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
558
559                 /* Max Tx Window size for Scheduler-ACK mode */
560                 iwl_write_targ_mem(priv, priv->scd_base_addr +
561                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
562                                 (SCD_WIN_SIZE <<
563                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
564                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
565
566                 /* Frame limit */
567                 iwl_write_targ_mem(priv, priv->scd_base_addr +
568                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
569                                 sizeof(u32),
570                                 (SCD_FRAME_LIMIT <<
571                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
572                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
573
574         }
575         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
576                                  (1 << priv->hw_params.max_txq_num) - 1);
577
578         /* Activate all Tx DMA/FIFO channels */
579         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
580
581         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
582
583         /* Map each Tx/cmd queue to its corresponding fifo */
584         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
585                 int ac = default_queue_to_tx_fifo[i];
586                 iwl_txq_ctx_activate(priv, i);
587                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
588         }
589
590         spin_unlock_irqrestore(&priv->lock, flags);
591
592         return 0;
593 }
594
595 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
596         .min_nrg_cck = 97,
597         .max_nrg_cck = 0, /* not used, set to 0 */
598
599         .auto_corr_min_ofdm = 85,
600         .auto_corr_min_ofdm_mrc = 170,
601         .auto_corr_min_ofdm_x1 = 105,
602         .auto_corr_min_ofdm_mrc_x1 = 220,
603
604         .auto_corr_max_ofdm = 120,
605         .auto_corr_max_ofdm_mrc = 210,
606         .auto_corr_max_ofdm_x1 = 140,
607         .auto_corr_max_ofdm_mrc_x1 = 270,
608
609         .auto_corr_min_cck = 125,
610         .auto_corr_max_cck = 200,
611         .auto_corr_min_cck_mrc = 200,
612         .auto_corr_max_cck_mrc = 400,
613
614         .nrg_th_cck = 100,
615         .nrg_th_ofdm = 100,
616
617         .barker_corr_th_min = 190,
618         .barker_corr_th_min_mrc = 390,
619         .nrg_th_cca = 62,
620 };
621
622 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
623 {
624         /* want Kelvin */
625         priv->hw_params.ct_kill_threshold =
626                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
627 }
628
629 /**
630  * iwl4965_hw_set_hw_params
631  *
632  * Called when initializing driver
633  */
634 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
635 {
636         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
637             priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
638                 priv->cfg->num_of_queues =
639                         priv->cfg->mod_params->num_of_queues;
640
641         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
642         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
643         priv->hw_params.scd_bc_tbls_size =
644                         priv->cfg->num_of_queues *
645                         sizeof(struct iwl4965_scd_bc_tbl);
646         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
647         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
648         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
649         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
650         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
651         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
652         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
653
654         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
655
656         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
657         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
658         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
659         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
660         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
661                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
662
663         priv->hw_params.sens = &iwl4965_sensitivity;
664
665         return 0;
666 }
667
668 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
669 {
670         s32 sign = 1;
671
672         if (num < 0) {
673                 sign = -sign;
674                 num = -num;
675         }
676         if (denom < 0) {
677                 sign = -sign;
678                 denom = -denom;
679         }
680         *res = 1;
681         *res = ((num * 2 + denom) / (denom * 2)) * sign;
682
683         return 1;
684 }
685
686 /**
687  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
688  *
689  * Determines power supply voltage compensation for txpower calculations.
690  * Returns number of 1/2-dB steps to subtract from gain table index,
691  * to compensate for difference between power supply voltage during
692  * factory measurements, vs. current power supply voltage.
693  *
694  * Voltage indication is higher for lower voltage.
695  * Lower voltage requires more gain (lower gain table index).
696  */
697 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
698                                             s32 current_voltage)
699 {
700         s32 comp = 0;
701
702         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
703             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
704                 return 0;
705
706         iwl4965_math_div_round(current_voltage - eeprom_voltage,
707                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
708
709         if (current_voltage > eeprom_voltage)
710                 comp *= 2;
711         if ((comp < -2) || (comp > 2))
712                 comp = 0;
713
714         return comp;
715 }
716
717 static s32 iwl4965_get_tx_atten_grp(u16 channel)
718 {
719         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
720             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
721                 return CALIB_CH_GROUP_5;
722
723         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
724             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
725                 return CALIB_CH_GROUP_1;
726
727         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
728             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
729                 return CALIB_CH_GROUP_2;
730
731         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
732             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
733                 return CALIB_CH_GROUP_3;
734
735         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
736             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
737                 return CALIB_CH_GROUP_4;
738
739         return -1;
740 }
741
742 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
743 {
744         s32 b = -1;
745
746         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
747                 if (priv->calib_info->band_info[b].ch_from == 0)
748                         continue;
749
750                 if ((channel >= priv->calib_info->band_info[b].ch_from)
751                     && (channel <= priv->calib_info->band_info[b].ch_to))
752                         break;
753         }
754
755         return b;
756 }
757
758 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
759 {
760         s32 val;
761
762         if (x2 == x1)
763                 return y1;
764         else {
765                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
766                 return val + y2;
767         }
768 }
769
770 /**
771  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
772  *
773  * Interpolates factory measurements from the two sample channels within a
774  * sub-band, to apply to channel of interest.  Interpolation is proportional to
775  * differences in channel frequencies, which is proportional to differences
776  * in channel number.
777  */
778 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
779                                     struct iwl_eeprom_calib_ch_info *chan_info)
780 {
781         s32 s = -1;
782         u32 c;
783         u32 m;
784         const struct iwl_eeprom_calib_measure *m1;
785         const struct iwl_eeprom_calib_measure *m2;
786         struct iwl_eeprom_calib_measure *omeas;
787         u32 ch_i1;
788         u32 ch_i2;
789
790         s = iwl4965_get_sub_band(priv, channel);
791         if (s >= EEPROM_TX_POWER_BANDS) {
792                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
793                 return -1;
794         }
795
796         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
797         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
798         chan_info->ch_num = (u8) channel;
799
800         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
801                           channel, s, ch_i1, ch_i2);
802
803         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
804                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
805                         m1 = &(priv->calib_info->band_info[s].ch1.
806                                measurements[c][m]);
807                         m2 = &(priv->calib_info->band_info[s].ch2.
808                                measurements[c][m]);
809                         omeas = &(chan_info->measurements[c][m]);
810
811                         omeas->actual_pow =
812                             (u8) iwl4965_interpolate_value(channel, ch_i1,
813                                                            m1->actual_pow,
814                                                            ch_i2,
815                                                            m2->actual_pow);
816                         omeas->gain_idx =
817                             (u8) iwl4965_interpolate_value(channel, ch_i1,
818                                                            m1->gain_idx, ch_i2,
819                                                            m2->gain_idx);
820                         omeas->temperature =
821                             (u8) iwl4965_interpolate_value(channel, ch_i1,
822                                                            m1->temperature,
823                                                            ch_i2,
824                                                            m2->temperature);
825                         omeas->pa_det =
826                             (s8) iwl4965_interpolate_value(channel, ch_i1,
827                                                            m1->pa_det, ch_i2,
828                                                            m2->pa_det);
829
830                         IWL_DEBUG_TXPOWER(priv,
831                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
832                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
833                         IWL_DEBUG_TXPOWER(priv,
834                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
835                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
836                         IWL_DEBUG_TXPOWER(priv,
837                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
838                                 m1->pa_det, m2->pa_det, omeas->pa_det);
839                         IWL_DEBUG_TXPOWER(priv,
840                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
841                                 m1->temperature, m2->temperature,
842                                 omeas->temperature);
843                 }
844         }
845
846         return 0;
847 }
848
849 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
850  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
851 static s32 back_off_table[] = {
852         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
853         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
854         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
855         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
856         10                      /* CCK */
857 };
858
859 /* Thermal compensation values for txpower for various frequency ranges ...
860  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
861 static struct iwl4965_txpower_comp_entry {
862         s32 degrees_per_05db_a;
863         s32 degrees_per_05db_a_denom;
864 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
865         {9, 2},                 /* group 0 5.2, ch  34-43 */
866         {4, 1},                 /* group 1 5.2, ch  44-70 */
867         {4, 1},                 /* group 2 5.2, ch  71-124 */
868         {4, 1},                 /* group 3 5.2, ch 125-200 */
869         {3, 1}                  /* group 4 2.4, ch   all */
870 };
871
872 static s32 get_min_power_index(s32 rate_power_index, u32 band)
873 {
874         if (!band) {
875                 if ((rate_power_index & 7) <= 4)
876                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
877         }
878         return MIN_TX_GAIN_INDEX;
879 }
880
881 struct gain_entry {
882         u8 dsp;
883         u8 radio;
884 };
885
886 static const struct gain_entry gain_table[2][108] = {
887         /* 5.2GHz power gain index table */
888         {
889          {123, 0x3F},           /* highest txpower */
890          {117, 0x3F},
891          {110, 0x3F},
892          {104, 0x3F},
893          {98, 0x3F},
894          {110, 0x3E},
895          {104, 0x3E},
896          {98, 0x3E},
897          {110, 0x3D},
898          {104, 0x3D},
899          {98, 0x3D},
900          {110, 0x3C},
901          {104, 0x3C},
902          {98, 0x3C},
903          {110, 0x3B},
904          {104, 0x3B},
905          {98, 0x3B},
906          {110, 0x3A},
907          {104, 0x3A},
908          {98, 0x3A},
909          {110, 0x39},
910          {104, 0x39},
911          {98, 0x39},
912          {110, 0x38},
913          {104, 0x38},
914          {98, 0x38},
915          {110, 0x37},
916          {104, 0x37},
917          {98, 0x37},
918          {110, 0x36},
919          {104, 0x36},
920          {98, 0x36},
921          {110, 0x35},
922          {104, 0x35},
923          {98, 0x35},
924          {110, 0x34},
925          {104, 0x34},
926          {98, 0x34},
927          {110, 0x33},
928          {104, 0x33},
929          {98, 0x33},
930          {110, 0x32},
931          {104, 0x32},
932          {98, 0x32},
933          {110, 0x31},
934          {104, 0x31},
935          {98, 0x31},
936          {110, 0x30},
937          {104, 0x30},
938          {98, 0x30},
939          {110, 0x25},
940          {104, 0x25},
941          {98, 0x25},
942          {110, 0x24},
943          {104, 0x24},
944          {98, 0x24},
945          {110, 0x23},
946          {104, 0x23},
947          {98, 0x23},
948          {110, 0x22},
949          {104, 0x18},
950          {98, 0x18},
951          {110, 0x17},
952          {104, 0x17},
953          {98, 0x17},
954          {110, 0x16},
955          {104, 0x16},
956          {98, 0x16},
957          {110, 0x15},
958          {104, 0x15},
959          {98, 0x15},
960          {110, 0x14},
961          {104, 0x14},
962          {98, 0x14},
963          {110, 0x13},
964          {104, 0x13},
965          {98, 0x13},
966          {110, 0x12},
967          {104, 0x08},
968          {98, 0x08},
969          {110, 0x07},
970          {104, 0x07},
971          {98, 0x07},
972          {110, 0x06},
973          {104, 0x06},
974          {98, 0x06},
975          {110, 0x05},
976          {104, 0x05},
977          {98, 0x05},
978          {110, 0x04},
979          {104, 0x04},
980          {98, 0x04},
981          {110, 0x03},
982          {104, 0x03},
983          {98, 0x03},
984          {110, 0x02},
985          {104, 0x02},
986          {98, 0x02},
987          {110, 0x01},
988          {104, 0x01},
989          {98, 0x01},
990          {110, 0x00},
991          {104, 0x00},
992          {98, 0x00},
993          {93, 0x00},
994          {88, 0x00},
995          {83, 0x00},
996          {78, 0x00},
997          },
998         /* 2.4GHz power gain index table */
999         {
1000          {110, 0x3f},           /* highest txpower */
1001          {104, 0x3f},
1002          {98, 0x3f},
1003          {110, 0x3e},
1004          {104, 0x3e},
1005          {98, 0x3e},
1006          {110, 0x3d},
1007          {104, 0x3d},
1008          {98, 0x3d},
1009          {110, 0x3c},
1010          {104, 0x3c},
1011          {98, 0x3c},
1012          {110, 0x3b},
1013          {104, 0x3b},
1014          {98, 0x3b},
1015          {110, 0x3a},
1016          {104, 0x3a},
1017          {98, 0x3a},
1018          {110, 0x39},
1019          {104, 0x39},
1020          {98, 0x39},
1021          {110, 0x38},
1022          {104, 0x38},
1023          {98, 0x38},
1024          {110, 0x37},
1025          {104, 0x37},
1026          {98, 0x37},
1027          {110, 0x36},
1028          {104, 0x36},
1029          {98, 0x36},
1030          {110, 0x35},
1031          {104, 0x35},
1032          {98, 0x35},
1033          {110, 0x34},
1034          {104, 0x34},
1035          {98, 0x34},
1036          {110, 0x33},
1037          {104, 0x33},
1038          {98, 0x33},
1039          {110, 0x32},
1040          {104, 0x32},
1041          {98, 0x32},
1042          {110, 0x31},
1043          {104, 0x31},
1044          {98, 0x31},
1045          {110, 0x30},
1046          {104, 0x30},
1047          {98, 0x30},
1048          {110, 0x6},
1049          {104, 0x6},
1050          {98, 0x6},
1051          {110, 0x5},
1052          {104, 0x5},
1053          {98, 0x5},
1054          {110, 0x4},
1055          {104, 0x4},
1056          {98, 0x4},
1057          {110, 0x3},
1058          {104, 0x3},
1059          {98, 0x3},
1060          {110, 0x2},
1061          {104, 0x2},
1062          {98, 0x2},
1063          {110, 0x1},
1064          {104, 0x1},
1065          {98, 0x1},
1066          {110, 0x0},
1067          {104, 0x0},
1068          {98, 0x0},
1069          {97, 0},
1070          {96, 0},
1071          {95, 0},
1072          {94, 0},
1073          {93, 0},
1074          {92, 0},
1075          {91, 0},
1076          {90, 0},
1077          {89, 0},
1078          {88, 0},
1079          {87, 0},
1080          {86, 0},
1081          {85, 0},
1082          {84, 0},
1083          {83, 0},
1084          {82, 0},
1085          {81, 0},
1086          {80, 0},
1087          {79, 0},
1088          {78, 0},
1089          {77, 0},
1090          {76, 0},
1091          {75, 0},
1092          {74, 0},
1093          {73, 0},
1094          {72, 0},
1095          {71, 0},
1096          {70, 0},
1097          {69, 0},
1098          {68, 0},
1099          {67, 0},
1100          {66, 0},
1101          {65, 0},
1102          {64, 0},
1103          {63, 0},
1104          {62, 0},
1105          {61, 0},
1106          {60, 0},
1107          {59, 0},
1108          }
1109 };
1110
1111 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1112                                     u8 is_ht40, u8 ctrl_chan_high,
1113                                     struct iwl4965_tx_power_db *tx_power_tbl)
1114 {
1115         u8 saturation_power;
1116         s32 target_power;
1117         s32 user_target_power;
1118         s32 power_limit;
1119         s32 current_temp;
1120         s32 reg_limit;
1121         s32 current_regulatory;
1122         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1123         int i;
1124         int c;
1125         const struct iwl_channel_info *ch_info = NULL;
1126         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1127         const struct iwl_eeprom_calib_measure *measurement;
1128         s16 voltage;
1129         s32 init_voltage;
1130         s32 voltage_compensation;
1131         s32 degrees_per_05db_num;
1132         s32 degrees_per_05db_denom;
1133         s32 factory_temp;
1134         s32 temperature_comp[2];
1135         s32 factory_gain_index[2];
1136         s32 factory_actual_pwr[2];
1137         s32 power_index;
1138
1139         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1140          *   are used for indexing into txpower table) */
1141         user_target_power = 2 * priv->tx_power_user_lmt;
1142
1143         /* Get current (RXON) channel, band, width */
1144         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1145                           is_ht40);
1146
1147         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1148
1149         if (!is_channel_valid(ch_info))
1150                 return -EINVAL;
1151
1152         /* get txatten group, used to select 1) thermal txpower adjustment
1153          *   and 2) mimo txpower balance between Tx chains. */
1154         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1155         if (txatten_grp < 0) {
1156                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1157                           channel);
1158                 return -EINVAL;
1159         }
1160
1161         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1162                           channel, txatten_grp);
1163
1164         if (is_ht40) {
1165                 if (ctrl_chan_high)
1166                         channel -= 2;
1167                 else
1168                         channel += 2;
1169         }
1170
1171         /* hardware txpower limits ...
1172          * saturation (clipping distortion) txpowers are in half-dBm */
1173         if (band)
1174                 saturation_power = priv->calib_info->saturation_power24;
1175         else
1176                 saturation_power = priv->calib_info->saturation_power52;
1177
1178         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1179             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1180                 if (band)
1181                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1182                 else
1183                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1184         }
1185
1186         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1187          *   max_power_avg values are in dBm, convert * 2 */
1188         if (is_ht40)
1189                 reg_limit = ch_info->ht40_max_power_avg * 2;
1190         else
1191                 reg_limit = ch_info->max_power_avg * 2;
1192
1193         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1194             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1195                 if (band)
1196                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1197                 else
1198                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1199         }
1200
1201         /* Interpolate txpower calibration values for this channel,
1202          *   based on factory calibration tests on spaced channels. */
1203         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1204
1205         /* calculate tx gain adjustment based on power supply voltage */
1206         voltage = priv->calib_info->voltage;
1207         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1208         voltage_compensation =
1209             iwl4965_get_voltage_compensation(voltage, init_voltage);
1210
1211         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1212                           init_voltage,
1213                           voltage, voltage_compensation);
1214
1215         /* get current temperature (Celsius) */
1216         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1217         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1218         current_temp = KELVIN_TO_CELSIUS(current_temp);
1219
1220         /* select thermal txpower adjustment params, based on channel group
1221          *   (same frequency group used for mimo txatten adjustment) */
1222         degrees_per_05db_num =
1223             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1224         degrees_per_05db_denom =
1225             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1226
1227         /* get per-chain txpower values from factory measurements */
1228         for (c = 0; c < 2; c++) {
1229                 measurement = &ch_eeprom_info.measurements[c][1];
1230
1231                 /* txgain adjustment (in half-dB steps) based on difference
1232                  *   between factory and current temperature */
1233                 factory_temp = measurement->temperature;
1234                 iwl4965_math_div_round((current_temp - factory_temp) *
1235                                        degrees_per_05db_denom,
1236                                        degrees_per_05db_num,
1237                                        &temperature_comp[c]);
1238
1239                 factory_gain_index[c] = measurement->gain_idx;
1240                 factory_actual_pwr[c] = measurement->actual_pow;
1241
1242                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1243                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1244                                   "curr tmp %d, comp %d steps\n",
1245                                   factory_temp, current_temp,
1246                                   temperature_comp[c]);
1247
1248                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1249                                   factory_gain_index[c],
1250                                   factory_actual_pwr[c]);
1251         }
1252
1253         /* for each of 33 bit-rates (including 1 for CCK) */
1254         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1255                 u8 is_mimo_rate;
1256                 union iwl4965_tx_power_dual_stream tx_power;
1257
1258                 /* for mimo, reduce each chain's txpower by half
1259                  * (3dB, 6 steps), so total output power is regulatory
1260                  * compliant. */
1261                 if (i & 0x8) {
1262                         current_regulatory = reg_limit -
1263                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1264                         is_mimo_rate = 1;
1265                 } else {
1266                         current_regulatory = reg_limit;
1267                         is_mimo_rate = 0;
1268                 }
1269
1270                 /* find txpower limit, either hardware or regulatory */
1271                 power_limit = saturation_power - back_off_table[i];
1272                 if (power_limit > current_regulatory)
1273                         power_limit = current_regulatory;
1274
1275                 /* reduce user's txpower request if necessary
1276                  * for this rate on this channel */
1277                 target_power = user_target_power;
1278                 if (target_power > power_limit)
1279                         target_power = power_limit;
1280
1281                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1282                                   i, saturation_power - back_off_table[i],
1283                                   current_regulatory, user_target_power,
1284                                   target_power);
1285
1286                 /* for each of 2 Tx chains (radio transmitters) */
1287                 for (c = 0; c < 2; c++) {
1288                         s32 atten_value;
1289
1290                         if (is_mimo_rate)
1291                                 atten_value =
1292                                     (s32)le32_to_cpu(priv->card_alive_init.
1293                                     tx_atten[txatten_grp][c]);
1294                         else
1295                                 atten_value = 0;
1296
1297                         /* calculate index; higher index means lower txpower */
1298                         power_index = (u8) (factory_gain_index[c] -
1299                                             (target_power -
1300                                              factory_actual_pwr[c]) -
1301                                             temperature_comp[c] -
1302                                             voltage_compensation +
1303                                             atten_value);
1304
1305 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1306                                                 power_index); */
1307
1308                         if (power_index < get_min_power_index(i, band))
1309                                 power_index = get_min_power_index(i, band);
1310
1311                         /* adjust 5 GHz index to support negative indexes */
1312                         if (!band)
1313                                 power_index += 9;
1314
1315                         /* CCK, rate 32, reduce txpower for CCK */
1316                         if (i == POWER_TABLE_CCK_ENTRY)
1317                                 power_index +=
1318                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1319
1320                         /* stay within the table! */
1321                         if (power_index > 107) {
1322                                 IWL_WARN(priv, "txpower index %d > 107\n",
1323                                             power_index);
1324                                 power_index = 107;
1325                         }
1326                         if (power_index < 0) {
1327                                 IWL_WARN(priv, "txpower index %d < 0\n",
1328                                             power_index);
1329                                 power_index = 0;
1330                         }
1331
1332                         /* fill txpower command for this rate/chain */
1333                         tx_power.s.radio_tx_gain[c] =
1334                                 gain_table[band][power_index].radio;
1335                         tx_power.s.dsp_predis_atten[c] =
1336                                 gain_table[band][power_index].dsp;
1337
1338                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1339                                           "gain 0x%02x dsp %d\n",
1340                                           c, atten_value, power_index,
1341                                         tx_power.s.radio_tx_gain[c],
1342                                         tx_power.s.dsp_predis_atten[c]);
1343                 } /* for each chain */
1344
1345                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1346
1347         } /* for each rate */
1348
1349         return 0;
1350 }
1351
1352 /**
1353  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1354  *
1355  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1356  * The power limit is taken from priv->tx_power_user_lmt.
1357  */
1358 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1359 {
1360         struct iwl4965_txpowertable_cmd cmd = { 0 };
1361         int ret;
1362         u8 band = 0;
1363         bool is_ht40 = false;
1364         u8 ctrl_chan_high = 0;
1365
1366         if (test_bit(STATUS_SCANNING, &priv->status)) {
1367                 /* If this gets hit a lot, switch it to a BUG() and catch
1368                  * the stack trace to find out who is calling this during
1369                  * a scan. */
1370                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1371                 return -EAGAIN;
1372         }
1373
1374         band = priv->band == IEEE80211_BAND_2GHZ;
1375
1376         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1377
1378         if (is_ht40 &&
1379             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1380                 ctrl_chan_high = 1;
1381
1382         cmd.band = band;
1383         cmd.channel = priv->active_rxon.channel;
1384
1385         ret = iwl4965_fill_txpower_tbl(priv, band,
1386                                 le16_to_cpu(priv->active_rxon.channel),
1387                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1388         if (ret)
1389                 goto out;
1390
1391         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1392
1393 out:
1394         return ret;
1395 }
1396
1397 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1398 {
1399         int ret = 0;
1400         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1401         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1402         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1403
1404         if ((rxon1->flags == rxon2->flags) &&
1405             (rxon1->filter_flags == rxon2->filter_flags) &&
1406             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1407             (rxon1->ofdm_ht_single_stream_basic_rates ==
1408              rxon2->ofdm_ht_single_stream_basic_rates) &&
1409             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1410              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1411             (rxon1->rx_chain == rxon2->rx_chain) &&
1412             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1413                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1414                 return 0;
1415         }
1416
1417         rxon_assoc.flags = priv->staging_rxon.flags;
1418         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1419         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1420         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1421         rxon_assoc.reserved = 0;
1422         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1423             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1424         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1425             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1426         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1427
1428         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1429                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1430         if (ret)
1431                 return ret;
1432
1433         return ret;
1434 }
1435
1436 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1437 {
1438         int rc;
1439         u8 band = 0;
1440         bool is_ht40 = false;
1441         u8 ctrl_chan_high = 0;
1442         struct iwl4965_channel_switch_cmd cmd;
1443         const struct iwl_channel_info *ch_info;
1444
1445         band = priv->band == IEEE80211_BAND_2GHZ;
1446
1447         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1448
1449         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1450
1451         if (is_ht40 &&
1452             (priv->staging_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1453                 ctrl_chan_high = 1;
1454
1455         cmd.band = band;
1456         cmd.expect_beacon = 0;
1457         cmd.channel = cpu_to_le16(channel);
1458         cmd.rxon_flags = priv->staging_rxon.flags;
1459         cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
1460         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1461         if (ch_info)
1462                 cmd.expect_beacon = is_channel_radar(ch_info);
1463         else {
1464                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1465                         priv->active_rxon.channel, channel);
1466                 return -EFAULT;
1467         }
1468
1469         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1470                                       ctrl_chan_high, &cmd.tx_power);
1471         if (rc) {
1472                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1473                 return rc;
1474         }
1475
1476         priv->switch_rxon.channel = cpu_to_le16(channel);
1477         priv->switch_rxon.switch_in_progress = true;
1478
1479         return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1480 }
1481
1482 /**
1483  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1484  */
1485 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1486                                             struct iwl_tx_queue *txq,
1487                                             u16 byte_cnt)
1488 {
1489         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1490         int txq_id = txq->q.id;
1491         int write_ptr = txq->q.write_ptr;
1492         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1493         __le16 bc_ent;
1494
1495         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1496
1497         bc_ent = cpu_to_le16(len & 0xFFF);
1498         /* Set up byte count within first 256 entries */
1499         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1500
1501         /* If within first 64 entries, duplicate at end */
1502         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1503                 scd_bc_tbl[txq_id].
1504                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1505 }
1506
1507 /**
1508  * sign_extend - Sign extend a value using specified bit as sign-bit
1509  *
1510  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1511  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1512  *
1513  * @param oper value to sign extend
1514  * @param index 0 based bit index (0<=index<32) to sign bit
1515  */
1516 static s32 sign_extend(u32 oper, int index)
1517 {
1518         u8 shift = 31 - index;
1519
1520         return (s32)(oper << shift) >> shift;
1521 }
1522
1523 /**
1524  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1525  * @statistics: Provides the temperature reading from the uCode
1526  *
1527  * A return of <0 indicates bogus data in the statistics
1528  */
1529 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1530 {
1531         s32 temperature;
1532         s32 vt;
1533         s32 R1, R2, R3;
1534         u32 R4;
1535
1536         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1537                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1538                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1539                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1540                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1541                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1542                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1543         } else {
1544                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1545                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1546                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1547                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1548                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1549         }
1550
1551         /*
1552          * Temperature is only 23 bits, so sign extend out to 32.
1553          *
1554          * NOTE If we haven't received a statistics notification yet
1555          * with an updated temperature, use R4 provided to us in the
1556          * "initialize" ALIVE response.
1557          */
1558         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1559                 vt = sign_extend(R4, 23);
1560         else
1561                 vt = sign_extend(
1562                         le32_to_cpu(priv->statistics.general.temperature), 23);
1563
1564         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1565
1566         if (R3 == R1) {
1567                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1568                 return -1;
1569         }
1570
1571         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1572          * Add offset to center the adjustment around 0 degrees Centigrade. */
1573         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1574         temperature /= (R3 - R1);
1575         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1576
1577         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1578                         temperature, KELVIN_TO_CELSIUS(temperature));
1579
1580         return temperature;
1581 }
1582
1583 /* Adjust Txpower only if temperature variance is greater than threshold. */
1584 #define IWL_TEMPERATURE_THRESHOLD   3
1585
1586 /**
1587  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1588  *
1589  * If the temperature changed has changed sufficiently, then a recalibration
1590  * is needed.
1591  *
1592  * Assumes caller will replace priv->last_temperature once calibration
1593  * executed.
1594  */
1595 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1596 {
1597         int temp_diff;
1598
1599         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1600                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1601                 return 0;
1602         }
1603
1604         temp_diff = priv->temperature - priv->last_temperature;
1605
1606         /* get absolute value */
1607         if (temp_diff < 0) {
1608                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1609                 temp_diff = -temp_diff;
1610         } else if (temp_diff == 0)
1611                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1612         else
1613                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1614
1615         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1616                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1617                 return 0;
1618         }
1619
1620         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1621
1622         return 1;
1623 }
1624
1625 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1626 {
1627         s32 temp;
1628
1629         temp = iwl4965_hw_get_temperature(priv);
1630         if (temp < 0)
1631                 return;
1632
1633         if (priv->temperature != temp) {
1634                 if (priv->temperature)
1635                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1636                                        "from %dC to %dC\n",
1637                                        KELVIN_TO_CELSIUS(priv->temperature),
1638                                        KELVIN_TO_CELSIUS(temp));
1639                 else
1640                         IWL_DEBUG_TEMP(priv, "Temperature "
1641                                        "initialized to %dC\n",
1642                                        KELVIN_TO_CELSIUS(temp));
1643         }
1644
1645         priv->temperature = temp;
1646         iwl_tt_handler(priv);
1647         set_bit(STATUS_TEMPERATURE, &priv->status);
1648
1649         if (!priv->disable_tx_power_cal &&
1650              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1651              iwl4965_is_temp_calib_needed(priv))
1652                 queue_work(priv->workqueue, &priv->txpower_work);
1653 }
1654
1655 /**
1656  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1657  */
1658 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1659                                             u16 txq_id)
1660 {
1661         /* Simply stop the queue, but don't change any configuration;
1662          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1663         iwl_write_prph(priv,
1664                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1665                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1666                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1667 }
1668
1669 /**
1670  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1671  * priv->lock must be held by the caller
1672  */
1673 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1674                                    u16 ssn_idx, u8 tx_fifo)
1675 {
1676         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1677             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1678              <= txq_id)) {
1679                 IWL_WARN(priv,
1680                         "queue number out of range: %d, must be %d to %d\n",
1681                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1682                         IWL49_FIRST_AMPDU_QUEUE +
1683                         priv->cfg->num_of_ampdu_queues - 1);
1684                 return -EINVAL;
1685         }
1686
1687         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1688
1689         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1690
1691         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1692         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1693         /* supposes that ssn_idx is valid (!= 0xFFF) */
1694         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1695
1696         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1697         iwl_txq_ctx_deactivate(priv, txq_id);
1698         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1699
1700         return 0;
1701 }
1702
1703 /**
1704  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1705  */
1706 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1707                                         u16 txq_id)
1708 {
1709         u32 tbl_dw_addr;
1710         u32 tbl_dw;
1711         u16 scd_q2ratid;
1712
1713         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1714
1715         tbl_dw_addr = priv->scd_base_addr +
1716                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1717
1718         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1719
1720         if (txq_id & 0x1)
1721                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1722         else
1723                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1724
1725         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1726
1727         return 0;
1728 }
1729
1730
1731 /**
1732  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1733  *
1734  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1735  *        i.e. it must be one of the higher queues used for aggregation
1736  */
1737 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1738                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1739 {
1740         unsigned long flags;
1741         u16 ra_tid;
1742
1743         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1744             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1745              <= txq_id)) {
1746                 IWL_WARN(priv,
1747                         "queue number out of range: %d, must be %d to %d\n",
1748                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1749                         IWL49_FIRST_AMPDU_QUEUE +
1750                         priv->cfg->num_of_ampdu_queues - 1);
1751                 return -EINVAL;
1752         }
1753
1754         ra_tid = BUILD_RAxTID(sta_id, tid);
1755
1756         /* Modify device's station table to Tx this TID */
1757         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1758
1759         spin_lock_irqsave(&priv->lock, flags);
1760
1761         /* Stop this Tx queue before configuring it */
1762         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1763
1764         /* Map receiver-address / traffic-ID to this queue */
1765         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1766
1767         /* Set this queue as a chain-building queue */
1768         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1769
1770         /* Place first TFD at index corresponding to start sequence number.
1771          * Assumes that ssn_idx is valid (!= 0xFFF) */
1772         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1773         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1774         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1775
1776         /* Set up Tx window size and frame limit for this queue */
1777         iwl_write_targ_mem(priv,
1778                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1779                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1780                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1781
1782         iwl_write_targ_mem(priv, priv->scd_base_addr +
1783                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1784                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1785                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1786
1787         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1788
1789         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1790         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1791
1792         spin_unlock_irqrestore(&priv->lock, flags);
1793
1794         return 0;
1795 }
1796
1797
1798 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1799 {
1800         switch (cmd_id) {
1801         case REPLY_RXON:
1802                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1803         default:
1804                 return len;
1805         }
1806 }
1807
1808 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1809 {
1810         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1811         addsta->mode = cmd->mode;
1812         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1813         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1814         addsta->station_flags = cmd->station_flags;
1815         addsta->station_flags_msk = cmd->station_flags_msk;
1816         addsta->tid_disable_tx = cmd->tid_disable_tx;
1817         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1818         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1819         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1820         addsta->sleep_tx_count = cmd->sleep_tx_count;
1821         addsta->reserved1 = cpu_to_le16(0);
1822         addsta->reserved2 = cpu_to_le32(0);
1823
1824         return (u16)sizeof(struct iwl4965_addsta_cmd);
1825 }
1826
1827 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1828 {
1829         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1830 }
1831
1832 /**
1833  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1834  */
1835 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1836                                       struct iwl_ht_agg *agg,
1837                                       struct iwl4965_tx_resp *tx_resp,
1838                                       int txq_id, u16 start_idx)
1839 {
1840         u16 status;
1841         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1842         struct ieee80211_tx_info *info = NULL;
1843         struct ieee80211_hdr *hdr = NULL;
1844         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1845         int i, sh, idx;
1846         u16 seq;
1847         if (agg->wait_for_ba)
1848                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1849
1850         agg->frame_count = tx_resp->frame_count;
1851         agg->start_idx = start_idx;
1852         agg->rate_n_flags = rate_n_flags;
1853         agg->bitmap = 0;
1854
1855         /* num frames attempted by Tx command */
1856         if (agg->frame_count == 1) {
1857                 /* Only one frame was attempted; no block-ack will arrive */
1858                 status = le16_to_cpu(frame_status[0].status);
1859                 idx = start_idx;
1860
1861                 /* FIXME: code repetition */
1862                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1863                                    agg->frame_count, agg->start_idx, idx);
1864
1865                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1866                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1867                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1868                 info->flags |= iwl_tx_status_to_mac80211(status);
1869                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1870                 /* FIXME: code repetition end */
1871
1872                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1873                                     status & 0xff, tx_resp->failure_frame);
1874                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1875
1876                 agg->wait_for_ba = 0;
1877         } else {
1878                 /* Two or more frames were attempted; expect block-ack */
1879                 u64 bitmap = 0;
1880                 int start = agg->start_idx;
1881
1882                 /* Construct bit-map of pending frames within Tx window */
1883                 for (i = 0; i < agg->frame_count; i++) {
1884                         u16 sc;
1885                         status = le16_to_cpu(frame_status[i].status);
1886                         seq  = le16_to_cpu(frame_status[i].sequence);
1887                         idx = SEQ_TO_INDEX(seq);
1888                         txq_id = SEQ_TO_QUEUE(seq);
1889
1890                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1891                                       AGG_TX_STATE_ABORT_MSK))
1892                                 continue;
1893
1894                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1895                                            agg->frame_count, txq_id, idx);
1896
1897                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1898                         if (!hdr) {
1899                                 IWL_ERR(priv,
1900                                         "BUG_ON idx doesn't point to valid skb"
1901                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1902                                 return -1;
1903                         }
1904
1905                         sc = le16_to_cpu(hdr->seq_ctrl);
1906                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1907                                 IWL_ERR(priv,
1908                                         "BUG_ON idx doesn't match seq control"
1909                                         " idx=%d, seq_idx=%d, seq=%d\n",
1910                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1911                                 return -1;
1912                         }
1913
1914                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1915                                            i, idx, SEQ_TO_SN(sc));
1916
1917                         sh = idx - start;
1918                         if (sh > 64) {
1919                                 sh = (start - idx) + 0xff;
1920                                 bitmap = bitmap << sh;
1921                                 sh = 0;
1922                                 start = idx;
1923                         } else if (sh < -64)
1924                                 sh  = 0xff - (start - idx);
1925                         else if (sh < 0) {
1926                                 sh = start - idx;
1927                                 start = idx;
1928                                 bitmap = bitmap << sh;
1929                                 sh = 0;
1930                         }
1931                         bitmap |= 1ULL << sh;
1932                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1933                                            start, (unsigned long long)bitmap);
1934                 }
1935
1936                 agg->bitmap = bitmap;
1937                 agg->start_idx = start;
1938                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1939                                    agg->frame_count, agg->start_idx,
1940                                    (unsigned long long)agg->bitmap);
1941
1942                 if (bitmap)
1943                         agg->wait_for_ba = 1;
1944         }
1945         return 0;
1946 }
1947
1948 /**
1949  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
1950  */
1951 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
1952                                 struct iwl_rx_mem_buffer *rxb)
1953 {
1954         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1955         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1956         int txq_id = SEQ_TO_QUEUE(sequence);
1957         int index = SEQ_TO_INDEX(sequence);
1958         struct iwl_tx_queue *txq = &priv->txq[txq_id];
1959         struct ieee80211_hdr *hdr;
1960         struct ieee80211_tx_info *info;
1961         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1962         u32  status = le32_to_cpu(tx_resp->u.status);
1963         int tid = MAX_TID_COUNT;
1964         int sta_id;
1965         int freed;
1966         u8 *qc = NULL;
1967
1968         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
1969                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
1970                           "is out of range [0-%d] %d %d\n", txq_id,
1971                           index, txq->q.n_bd, txq->q.write_ptr,
1972                           txq->q.read_ptr);
1973                 return;
1974         }
1975
1976         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
1977         memset(&info->status, 0, sizeof(info->status));
1978
1979         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
1980         if (ieee80211_is_data_qos(hdr->frame_control)) {
1981                 qc = ieee80211_get_qos_ctl(hdr);
1982                 tid = qc[0] & 0xf;
1983         }
1984
1985         sta_id = iwl_get_ra_sta_id(priv, hdr);
1986         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
1987                 IWL_ERR(priv, "Station not known\n");
1988                 return;
1989         }
1990
1991         if (txq->sched_retry) {
1992                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
1993                 struct iwl_ht_agg *agg = NULL;
1994
1995                 WARN_ON(!qc);
1996
1997                 agg = &priv->stations[sta_id].tid[tid].agg;
1998
1999                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2000
2001                 /* check if BAR is needed */
2002                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2003                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2004
2005                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2006                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2007                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2008                                            "%d index %d\n", scd_ssn , index);
2009                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2010                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2011
2012                         if (priv->mac80211_registered &&
2013                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2014                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2015                                 if (agg->state == IWL_AGG_OFF)
2016                                         iwl_wake_queue(priv, txq_id);
2017                                 else
2018                                         iwl_wake_queue(priv, txq->swq_id);
2019                         }
2020                 }
2021         } else {
2022                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2023                 info->flags |= iwl_tx_status_to_mac80211(status);
2024                 iwl_hwrate_to_tx_control(priv,
2025                                         le32_to_cpu(tx_resp->rate_n_flags),
2026                                         info);
2027
2028                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2029                                    "rate_n_flags 0x%x retries %d\n",
2030                                    txq_id,
2031                                    iwl_get_tx_fail_reason(status), status,
2032                                    le32_to_cpu(tx_resp->rate_n_flags),
2033                                    tx_resp->failure_frame);
2034
2035                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2036                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2037                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2038
2039                 if (priv->mac80211_registered &&
2040                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2041                         iwl_wake_queue(priv, txq_id);
2042         }
2043
2044         if (qc && likely(sta_id != IWL_INVALID_STATION))
2045                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2046
2047         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2048                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2049 }
2050
2051 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2052                              struct iwl_rx_phy_res *rx_resp)
2053 {
2054         /* data from PHY/DSP regarding signal strength, etc.,
2055          *   contents are always there, not configurable by host.  */
2056         struct iwl4965_rx_non_cfg_phy *ncphy =
2057             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2058         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2059                         >> IWL49_AGC_DB_POS;
2060
2061         u32 valid_antennae =
2062             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2063                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2064         u8 max_rssi = 0;
2065         u32 i;
2066
2067         /* Find max rssi among 3 possible receivers.
2068          * These values are measured by the digital signal processor (DSP).
2069          * They should stay fairly constant even as the signal strength varies,
2070          *   if the radio's automatic gain control (AGC) is working right.
2071          * AGC value (see below) will provide the "interesting" info. */
2072         for (i = 0; i < 3; i++)
2073                 if (valid_antennae & (1 << i))
2074                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2075
2076         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2077                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2078                 max_rssi, agc);
2079
2080         /* dBm = max_rssi dB - agc dB - constant.
2081          * Higher AGC (higher radio gain) means lower signal. */
2082         return max_rssi - agc - IWL49_RSSI_OFFSET;
2083 }
2084
2085
2086 /* Set up 4965-specific Rx frame reply handlers */
2087 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2088 {
2089         /* Legacy Rx frames */
2090         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2091         /* Tx response */
2092         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2093 }
2094
2095 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2096 {
2097         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2098 }
2099
2100 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2101 {
2102         cancel_work_sync(&priv->txpower_work);
2103 }
2104
2105 #define IWL4965_UCODE_GET(item)                                         \
2106 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2107                                     u32 api_ver)                        \
2108 {                                                                       \
2109         return le32_to_cpu(ucode->u.v1.item);                           \
2110 }
2111
2112 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2113 {
2114         return UCODE_HEADER_SIZE(1);
2115 }
2116 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2117                                    u32 api_ver)
2118 {
2119         return 0;
2120 }
2121 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2122                                   u32 api_ver)
2123 {
2124         return (u8 *) ucode->u.v1.data;
2125 }
2126
2127 IWL4965_UCODE_GET(inst_size);
2128 IWL4965_UCODE_GET(data_size);
2129 IWL4965_UCODE_GET(init_size);
2130 IWL4965_UCODE_GET(init_data_size);
2131 IWL4965_UCODE_GET(boot_size);
2132
2133 static struct iwl_hcmd_ops iwl4965_hcmd = {
2134         .rxon_assoc = iwl4965_send_rxon_assoc,
2135         .commit_rxon = iwl_commit_rxon,
2136         .set_rxon_chain = iwl_set_rxon_chain,
2137 };
2138
2139 static struct iwl_ucode_ops iwl4965_ucode = {
2140         .get_header_size = iwl4965_ucode_get_header_size,
2141         .get_build = iwl4965_ucode_get_build,
2142         .get_inst_size = iwl4965_ucode_get_inst_size,
2143         .get_data_size = iwl4965_ucode_get_data_size,
2144         .get_init_size = iwl4965_ucode_get_init_size,
2145         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2146         .get_boot_size = iwl4965_ucode_get_boot_size,
2147         .get_data = iwl4965_ucode_get_data,
2148 };
2149 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2150         .get_hcmd_size = iwl4965_get_hcmd_size,
2151         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2152         .chain_noise_reset = iwl4965_chain_noise_reset,
2153         .gain_computation = iwl4965_gain_computation,
2154         .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2155         .calc_rssi = iwl4965_calc_rssi,
2156 };
2157
2158 static struct iwl_lib_ops iwl4965_lib = {
2159         .set_hw_params = iwl4965_hw_set_hw_params,
2160         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2161         .txq_set_sched = iwl4965_txq_set_sched,
2162         .txq_agg_enable = iwl4965_txq_agg_enable,
2163         .txq_agg_disable = iwl4965_txq_agg_disable,
2164         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2165         .txq_free_tfd = iwl_hw_txq_free_tfd,
2166         .txq_init = iwl_hw_tx_queue_init,
2167         .rx_handler_setup = iwl4965_rx_handler_setup,
2168         .setup_deferred_work = iwl4965_setup_deferred_work,
2169         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2170         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2171         .alive_notify = iwl4965_alive_notify,
2172         .init_alive_start = iwl4965_init_alive_start,
2173         .load_ucode = iwl4965_load_bsm,
2174         .dump_nic_event_log = iwl_dump_nic_event_log,
2175         .dump_nic_error_log = iwl_dump_nic_error_log,
2176         .set_channel_switch = iwl4965_hw_channel_switch,
2177         .apm_ops = {
2178                 .init = iwl_apm_init,
2179                 .stop = iwl_apm_stop,
2180                 .config = iwl4965_nic_config,
2181                 .set_pwr_src = iwl_set_pwr_src,
2182         },
2183         .eeprom_ops = {
2184                 .regulatory_bands = {
2185                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2186                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2187                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2188                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2189                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2190                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2191                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2192                 },
2193                 .verify_signature  = iwlcore_eeprom_verify_signature,
2194                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2195                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2196                 .calib_version = iwl4965_eeprom_calib_version,
2197                 .query_addr = iwlcore_eeprom_query_addr,
2198         },
2199         .send_tx_power  = iwl4965_send_tx_power,
2200         .update_chain_flags = iwl_update_chain_flags,
2201         .post_associate = iwl_post_associate,
2202         .config_ap = iwl_config_ap,
2203         .isr = iwl_isr_legacy,
2204         .temp_ops = {
2205                 .temperature = iwl4965_temperature_calib,
2206                 .set_ct_kill = iwl4965_set_ct_threshold,
2207         },
2208 };
2209
2210 static struct iwl_ops iwl4965_ops = {
2211         .ucode = &iwl4965_ucode,
2212         .lib = &iwl4965_lib,
2213         .hcmd = &iwl4965_hcmd,
2214         .utils = &iwl4965_hcmd_utils,
2215         .led = &iwlagn_led_ops,
2216 };
2217
2218 struct iwl_cfg iwl4965_agn_cfg = {
2219         .name = "4965AGN",
2220         .fw_name_pre = IWL4965_FW_PRE,
2221         .ucode_api_max = IWL4965_UCODE_API_MAX,
2222         .ucode_api_min = IWL4965_UCODE_API_MIN,
2223         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2224         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2225         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2226         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2227         .ops = &iwl4965_ops,
2228         .num_of_queues = IWL49_NUM_QUEUES,
2229         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2230         .mod_params = &iwl4965_mod_params,
2231         .valid_tx_ant = ANT_AB,
2232         .valid_rx_ant = ANT_ABC,
2233         .pll_cfg_val = 0,
2234         .set_l0s = true,
2235         .use_bsm = true,
2236         .use_isr_legacy = true,
2237         .ht_greenfield_support = false,
2238         .broken_powersave = true,
2239         .led_compensation = 61,
2240         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2241         .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED,
2242 };
2243
2244 /* Module firmware */
2245 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2246
2247 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2248 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2249 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2250 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2251 module_param_named(
2252         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2253 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2254
2255 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2256 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2257 /* 11n */
2258 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2259 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2260 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2261                    int, S_IRUGO);
2262 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2263
2264 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2265 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");