iwlcore: register locks
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  *  Intel Linux Wireless <ilw@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39
40 #include "iwl-eeprom.h"
41 #include "iwl-dev.h"
42 #include "iwl-core.h"
43 #include "iwl-io.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
46 #include "iwl-sta.h"
47
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
50
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
53
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
56
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
60
61
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params = {
64         .num_of_queues = IWL49_NUM_QUEUES,
65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
66         .amsdu_size_8K = 1,
67         .restart_fw = 1,
68         /* the rest are 0 by default */
69 };
70
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
73 {
74         __le32 *image = priv->ucode_boot.v_addr;
75         u32 len = priv->ucode_boot.len;
76         u32 reg;
77         u32 val;
78
79         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
80
81         /* verify BSM SRAM contents */
82         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83         for (reg = BSM_SRAM_LOWER_BOUND;
84              reg < BSM_SRAM_LOWER_BOUND + len;
85              reg += sizeof(u32), image++) {
86                 val = iwl_read_prph(priv, reg);
87                 if (val != le32_to_cpu(*image)) {
88                         IWL_ERR(priv, "BSM uCode verification failed at "
89                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
90                                   BSM_SRAM_LOWER_BOUND,
91                                   reg - BSM_SRAM_LOWER_BOUND, len,
92                                   val, le32_to_cpu(*image));
93                         return -EIO;
94                 }
95         }
96
97         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
98
99         return 0;
100 }
101
102 /**
103  * iwl4965_load_bsm - Load bootstrap instructions
104  *
105  * BSM operation:
106  *
107  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108  * in special SRAM that does not power down during RFKILL.  When powering back
109  * up after power-saving sleeps (or during initial uCode load), the BSM loads
110  * the bootstrap program into the on-board processor, and starts it.
111  *
112  * The bootstrap program loads (via DMA) instructions and data for a new
113  * program from host DRAM locations indicated by the host driver in the
114  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
115  * automatically.
116  *
117  * When initializing the NIC, the host driver points the BSM to the
118  * "initialize" uCode image.  This uCode sets up some internal data, then
119  * notifies host via "initialize alive" that it is complete.
120  *
121  * The host then replaces the BSM_DRAM_* pointer values to point to the
122  * normal runtime uCode instructions and a backup uCode data cache buffer
123  * (filled initially with starting data values for the on-board processor),
124  * then triggers the "initialize" uCode to load and launch the runtime uCode,
125  * which begins normal operation.
126  *
127  * When doing a power-save shutdown, runtime uCode saves data SRAM into
128  * the backup data cache in DRAM before SRAM is powered down.
129  *
130  * When powering back up, the BSM loads the bootstrap program.  This reloads
131  * the runtime uCode instructions and the backup data cache into SRAM,
132  * and re-launches the runtime uCode from where it left off.
133  */
134 static int iwl4965_load_bsm(struct iwl_priv *priv)
135 {
136         __le32 *image = priv->ucode_boot.v_addr;
137         u32 len = priv->ucode_boot.len;
138         dma_addr_t pinst;
139         dma_addr_t pdata;
140         u32 inst_len;
141         u32 data_len;
142         int i;
143         u32 done;
144         u32 reg_offset;
145         int ret;
146
147         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
148
149         priv->ucode_type = UCODE_RT;
150
151         /* make sure bootstrap program is no larger than BSM's SRAM size */
152         if (len > IWL49_MAX_BSM_SIZE)
153                 return -EINVAL;
154
155         /* Tell bootstrap uCode where to find the "Initialize" uCode
156          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157          * NOTE:  iwl_init_alive_start() will replace these values,
158          *        after the "initialize" uCode has run, to point to
159          *        runtime/protocol instructions and backup data cache.
160          */
161         pinst = priv->ucode_init.p_addr >> 4;
162         pdata = priv->ucode_init_data.p_addr >> 4;
163         inst_len = priv->ucode_init.len;
164         data_len = priv->ucode_init_data.len;
165
166         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
167         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
168         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
169         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
170
171         /* Fill BSM memory with bootstrap instructions */
172         for (reg_offset = BSM_SRAM_LOWER_BOUND;
173              reg_offset < BSM_SRAM_LOWER_BOUND + len;
174              reg_offset += sizeof(u32), image++)
175                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
176
177         ret = iwl4965_verify_bsm(priv);
178         if (ret)
179                 return ret;
180
181         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
182         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
183         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
184         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
185
186         /* Load bootstrap code into instruction SRAM now,
187          *   to prepare to load "initialize" uCode */
188         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
189
190         /* Wait for load of bootstrap uCode to finish */
191         for (i = 0; i < 100; i++) {
192                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
193                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
194                         break;
195                 udelay(10);
196         }
197         if (i < 100)
198                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
199         else {
200                 IWL_ERR(priv, "BSM write did not complete!\n");
201                 return -EIO;
202         }
203
204         /* Enable future boot loads whenever power management unit triggers it
205          *   (e.g. when powering back up after power-save shutdown) */
206         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
207
208
209         return 0;
210 }
211
212 /**
213  * iwl4965_set_ucode_ptrs - Set uCode address location
214  *
215  * Tell initialization uCode where to find runtime uCode.
216  *
217  * BSM registers initially contain pointers to initialization uCode.
218  * We need to replace them to load runtime uCode inst and data,
219  * and to save runtime data when powering down.
220  */
221 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
222 {
223         dma_addr_t pinst;
224         dma_addr_t pdata;
225         int ret = 0;
226
227         /* bits 35:4 for 4965 */
228         pinst = priv->ucode_code.p_addr >> 4;
229         pdata = priv->ucode_data_backup.p_addr >> 4;
230
231         /* Tell bootstrap uCode where to find image to load */
232         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
233         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
234         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
235                                  priv->ucode_data.len);
236
237         /* Inst byte count must be last to set up, bit 31 signals uCode
238          *   that all new ptr/size info is in place */
239         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
240                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
241         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
242
243         return ret;
244 }
245
246 /**
247  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
248  *
249  * Called after REPLY_ALIVE notification received from "initialize" uCode.
250  *
251  * The 4965 "initialize" ALIVE reply contains calibration data for:
252  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
253  *   (3945 does not contain this data).
254  *
255  * Tell "initialize" uCode to go ahead and load the runtime uCode.
256 */
257 static void iwl4965_init_alive_start(struct iwl_priv *priv)
258 {
259         /* Check alive response for "valid" sign from uCode */
260         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
261                 /* We had an error bringing up the hardware, so take it
262                  * all the way back down so we can try again */
263                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
264                 goto restart;
265         }
266
267         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
268          * This is a paranoid check, because we would not have gotten the
269          * "initialize" alive if code weren't properly loaded.  */
270         if (iwl_verify_ucode(priv)) {
271                 /* Runtime instruction load was bad;
272                  * take it all the way back down so we can try again */
273                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
274                 goto restart;
275         }
276
277         /* Calculate temperature */
278         priv->temperature = iwl4965_hw_get_temperature(priv);
279
280         /* Send pointers to protocol/runtime uCode image ... init code will
281          * load and launch runtime uCode, which will send us another "Alive"
282          * notification. */
283         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
284         if (iwl4965_set_ucode_ptrs(priv)) {
285                 /* Runtime instruction load won't happen;
286                  * take it all the way back down so we can try again */
287                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
288                 goto restart;
289         }
290         return;
291
292 restart:
293         queue_work(priv->workqueue, &priv->restart);
294 }
295
296 static int is_fat_channel(__le32 rxon_flags)
297 {
298         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
299                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
300 }
301
302 /*
303  * EEPROM handlers
304  */
305 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
306 {
307         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
308 }
309
310 /*
311  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
312  * must be called under priv->lock and mac access
313  */
314 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
315 {
316         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
317 }
318
319 static int iwl4965_apm_init(struct iwl_priv *priv)
320 {
321         int ret = 0;
322
323         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
324                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
325
326         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
327         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
328                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
329
330         /* set "initialization complete" bit to move adapter
331          * D0U* --> D0A* state */
332         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
333
334         /* wait for clock stabilization */
335         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
336                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
337         if (ret < 0) {
338                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
339                 goto out;
340         }
341
342         /* enable DMA */
343         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
344                                                 APMG_CLK_VAL_BSM_CLK_RQT);
345
346         udelay(20);
347
348         /* disable L1-Active */
349         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
350                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
351
352 out:
353         return ret;
354 }
355
356
357 static void iwl4965_nic_config(struct iwl_priv *priv)
358 {
359         unsigned long flags;
360         u16 radio_cfg;
361         u16 lctl;
362
363         spin_lock_irqsave(&priv->lock, flags);
364
365         lctl = iwl_pcie_link_ctl(priv);
366
367         /* HW bug W/A - negligible power consumption */
368         /* L1-ASPM is enabled by BIOS */
369         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
370                 /* L1-ASPM enabled: disable L0S  */
371                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
372         else
373                 /* L1-ASPM disabled: enable L0S */
374                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
375
376         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
377
378         /* write radio config values to register */
379         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
380                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
381                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
382                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
383                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
384
385         /* set CSR_HW_CONFIG_REG for uCode use */
386         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
387                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
388                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
389
390         priv->calib_info = (struct iwl_eeprom_calib_info *)
391                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
392
393         spin_unlock_irqrestore(&priv->lock, flags);
394 }
395
396 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
397 {
398         unsigned long flags;
399
400         spin_lock_irqsave(&priv->lock, flags);
401
402         /* set stop master bit */
403         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
404
405         iwl_poll_direct_bit(priv, CSR_RESET,
406                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
407
408         spin_unlock_irqrestore(&priv->lock, flags);
409         IWL_DEBUG_INFO(priv, "stop master\n");
410
411         return 0;
412 }
413
414 static void iwl4965_apm_stop(struct iwl_priv *priv)
415 {
416         unsigned long flags;
417
418         iwl4965_apm_stop_master(priv);
419
420         spin_lock_irqsave(&priv->lock, flags);
421
422         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
423
424         udelay(10);
425         /* clear "init complete"  move adapter D0A* --> D0U state */
426         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
427         spin_unlock_irqrestore(&priv->lock, flags);
428 }
429
430 static int iwl4965_apm_reset(struct iwl_priv *priv)
431 {
432         int ret = 0;
433
434         iwl4965_apm_stop_master(priv);
435
436
437         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
438
439         udelay(10);
440
441         /* FIXME: put here L1A -L0S w/a */
442
443         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
444
445         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
446                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
447         if (ret < 0)
448                 goto out;
449
450         udelay(10);
451
452         /* Enable DMA and BSM Clock */
453         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
454                                               APMG_CLK_VAL_BSM_CLK_RQT);
455
456         udelay(10);
457
458         /* disable L1A */
459         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
460                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
461
462         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
463         wake_up_interruptible(&priv->wait_command_queue);
464
465 out:
466         return ret;
467 }
468
469 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
470  * Called after every association, but this runs only once!
471  *  ... once chain noise is calibrated the first time, it's good forever.  */
472 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
473 {
474         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
475
476         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
477                 struct iwl_calib_diff_gain_cmd cmd;
478
479                 memset(&cmd, 0, sizeof(cmd));
480                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
481                 cmd.diff_gain_a = 0;
482                 cmd.diff_gain_b = 0;
483                 cmd.diff_gain_c = 0;
484                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
485                                  sizeof(cmd), &cmd))
486                         IWL_ERR(priv,
487                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
488                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
489                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
490         }
491 }
492
493 static void iwl4965_gain_computation(struct iwl_priv *priv,
494                 u32 *average_noise,
495                 u16 min_average_noise_antenna_i,
496                 u32 min_average_noise)
497 {
498         int i, ret;
499         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
500
501         data->delta_gain_code[min_average_noise_antenna_i] = 0;
502
503         for (i = 0; i < NUM_RX_CHAINS; i++) {
504                 s32 delta_g = 0;
505
506                 if (!(data->disconn_array[i]) &&
507                     (data->delta_gain_code[i] ==
508                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
509                         delta_g = average_noise[i] - min_average_noise;
510                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
511                         data->delta_gain_code[i] =
512                                 min(data->delta_gain_code[i],
513                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
514
515                         data->delta_gain_code[i] =
516                                 (data->delta_gain_code[i] | (1 << 2));
517                 } else {
518                         data->delta_gain_code[i] = 0;
519                 }
520         }
521         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
522                      data->delta_gain_code[0],
523                      data->delta_gain_code[1],
524                      data->delta_gain_code[2]);
525
526         /* Differential gain gets sent to uCode only once */
527         if (!data->radio_write) {
528                 struct iwl_calib_diff_gain_cmd cmd;
529                 data->radio_write = 1;
530
531                 memset(&cmd, 0, sizeof(cmd));
532                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
533                 cmd.diff_gain_a = data->delta_gain_code[0];
534                 cmd.diff_gain_b = data->delta_gain_code[1];
535                 cmd.diff_gain_c = data->delta_gain_code[2];
536                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
537                                       sizeof(cmd), &cmd);
538                 if (ret)
539                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
540                                      "REPLY_PHY_CALIBRATION_CMD \n");
541
542                 /* TODO we might want recalculate
543                  * rx_chain in rxon cmd */
544
545                 /* Mark so we run this algo only once! */
546                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
547         }
548         data->chain_noise_a = 0;
549         data->chain_noise_b = 0;
550         data->chain_noise_c = 0;
551         data->chain_signal_a = 0;
552         data->chain_signal_b = 0;
553         data->chain_signal_c = 0;
554         data->beacon_count = 0;
555 }
556
557 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
558                         __le32 *tx_flags)
559 {
560         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
561                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
562                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
563         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
564                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
565                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
566         }
567 }
568
569 static void iwl4965_bg_txpower_work(struct work_struct *work)
570 {
571         struct iwl_priv *priv = container_of(work, struct iwl_priv,
572                         txpower_work);
573
574         /* If a scan happened to start before we got here
575          * then just return; the statistics notification will
576          * kick off another scheduled work to compensate for
577          * any temperature delta we missed here. */
578         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
579             test_bit(STATUS_SCANNING, &priv->status))
580                 return;
581
582         mutex_lock(&priv->mutex);
583
584         /* Regardless of if we are associated, we must reconfigure the
585          * TX power since frames can be sent on non-radar channels while
586          * not associated */
587         iwl4965_send_tx_power(priv);
588
589         /* Update last_temperature to keep is_calib_needed from running
590          * when it isn't needed... */
591         priv->last_temperature = priv->temperature;
592
593         mutex_unlock(&priv->mutex);
594 }
595
596 /*
597  * Acquire priv->lock before calling this function !
598  */
599 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
600 {
601         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
602                              (index & 0xff) | (txq_id << 8));
603         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
604 }
605
606 /**
607  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
608  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
609  * @scd_retry: (1) Indicates queue will be used in aggregation mode
610  *
611  * NOTE:  Acquire priv->lock before calling this function !
612  */
613 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
614                                         struct iwl_tx_queue *txq,
615                                         int tx_fifo_id, int scd_retry)
616 {
617         int txq_id = txq->q.id;
618
619         /* Find out whether to activate Tx queue */
620         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
621
622         /* Set up and activate */
623         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
624                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
625                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
626                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
627                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
628                          IWL49_SCD_QUEUE_STTS_REG_MSK);
629
630         txq->sched_retry = scd_retry;
631
632         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
633                        active ? "Activate" : "Deactivate",
634                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
635 }
636
637 static const u16 default_queue_to_tx_fifo[] = {
638         IWL_TX_FIFO_AC3,
639         IWL_TX_FIFO_AC2,
640         IWL_TX_FIFO_AC1,
641         IWL_TX_FIFO_AC0,
642         IWL49_CMD_FIFO_NUM,
643         IWL_TX_FIFO_HCCA_1,
644         IWL_TX_FIFO_HCCA_2
645 };
646
647 static int iwl4965_alive_notify(struct iwl_priv *priv)
648 {
649         u32 a;
650         unsigned long flags;
651         int i, chan;
652         u32 reg_val;
653
654         spin_lock_irqsave(&priv->lock, flags);
655
656         /* Clear 4965's internal Tx Scheduler data base */
657         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
658         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
659         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
660                 iwl_write_targ_mem(priv, a, 0);
661         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
662                 iwl_write_targ_mem(priv, a, 0);
663         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
664                 iwl_write_targ_mem(priv, a, 0);
665
666         /* Tel 4965 where to find Tx byte count tables */
667         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
668                         priv->scd_bc_tbls.dma >> 10);
669
670         /* Enable DMA channel */
671         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
672                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
673                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
674                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
675
676         /* Update FH chicken bits */
677         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
678         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
679                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
680
681         /* Disable chain mode for all queues */
682         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
683
684         /* Initialize each Tx queue (including the command queue) */
685         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
686
687                 /* TFD circular buffer read/write indexes */
688                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
689                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
690
691                 /* Max Tx Window size for Scheduler-ACK mode */
692                 iwl_write_targ_mem(priv, priv->scd_base_addr +
693                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
694                                 (SCD_WIN_SIZE <<
695                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
696                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
697
698                 /* Frame limit */
699                 iwl_write_targ_mem(priv, priv->scd_base_addr +
700                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
701                                 sizeof(u32),
702                                 (SCD_FRAME_LIMIT <<
703                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
704                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
705
706         }
707         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
708                                  (1 << priv->hw_params.max_txq_num) - 1);
709
710         /* Activate all Tx DMA/FIFO channels */
711         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
712
713         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
714
715         /* Map each Tx/cmd queue to its corresponding fifo */
716         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
717                 int ac = default_queue_to_tx_fifo[i];
718                 iwl_txq_ctx_activate(priv, i);
719                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
720         }
721
722         spin_unlock_irqrestore(&priv->lock, flags);
723
724         return 0;
725 }
726
727 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
728         .min_nrg_cck = 97,
729         .max_nrg_cck = 0,
730
731         .auto_corr_min_ofdm = 85,
732         .auto_corr_min_ofdm_mrc = 170,
733         .auto_corr_min_ofdm_x1 = 105,
734         .auto_corr_min_ofdm_mrc_x1 = 220,
735
736         .auto_corr_max_ofdm = 120,
737         .auto_corr_max_ofdm_mrc = 210,
738         .auto_corr_max_ofdm_x1 = 140,
739         .auto_corr_max_ofdm_mrc_x1 = 270,
740
741         .auto_corr_min_cck = 125,
742         .auto_corr_max_cck = 200,
743         .auto_corr_min_cck_mrc = 200,
744         .auto_corr_max_cck_mrc = 400,
745
746         .nrg_th_cck = 100,
747         .nrg_th_ofdm = 100,
748 };
749
750 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
751 {
752         /* want Kelvin */
753         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
754 }
755
756 /**
757  * iwl4965_hw_set_hw_params
758  *
759  * Called when initializing driver
760  */
761 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
762 {
763
764         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
765             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
766                 IWL_ERR(priv,
767                         "invalid queues_num, should be between %d and %d\n",
768                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
769                 return -EINVAL;
770         }
771
772         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
773         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
774         priv->hw_params.scd_bc_tbls_size =
775                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
776         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
777         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
778         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
779         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
780         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
781         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
782         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
783
784         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
785
786         priv->hw_params.tx_chains_num = 2;
787         priv->hw_params.rx_chains_num = 2;
788         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
789         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
790         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
791                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
792
793         priv->hw_params.sens = &iwl4965_sensitivity;
794
795         return 0;
796 }
797
798 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
799 {
800         s32 sign = 1;
801
802         if (num < 0) {
803                 sign = -sign;
804                 num = -num;
805         }
806         if (denom < 0) {
807                 sign = -sign;
808                 denom = -denom;
809         }
810         *res = 1;
811         *res = ((num * 2 + denom) / (denom * 2)) * sign;
812
813         return 1;
814 }
815
816 /**
817  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
818  *
819  * Determines power supply voltage compensation for txpower calculations.
820  * Returns number of 1/2-dB steps to subtract from gain table index,
821  * to compensate for difference between power supply voltage during
822  * factory measurements, vs. current power supply voltage.
823  *
824  * Voltage indication is higher for lower voltage.
825  * Lower voltage requires more gain (lower gain table index).
826  */
827 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
828                                             s32 current_voltage)
829 {
830         s32 comp = 0;
831
832         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
833             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
834                 return 0;
835
836         iwl4965_math_div_round(current_voltage - eeprom_voltage,
837                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
838
839         if (current_voltage > eeprom_voltage)
840                 comp *= 2;
841         if ((comp < -2) || (comp > 2))
842                 comp = 0;
843
844         return comp;
845 }
846
847 static s32 iwl4965_get_tx_atten_grp(u16 channel)
848 {
849         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
850             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
851                 return CALIB_CH_GROUP_5;
852
853         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
854             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
855                 return CALIB_CH_GROUP_1;
856
857         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
858             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
859                 return CALIB_CH_GROUP_2;
860
861         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
862             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
863                 return CALIB_CH_GROUP_3;
864
865         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
866             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
867                 return CALIB_CH_GROUP_4;
868
869         return -1;
870 }
871
872 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
873 {
874         s32 b = -1;
875
876         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
877                 if (priv->calib_info->band_info[b].ch_from == 0)
878                         continue;
879
880                 if ((channel >= priv->calib_info->band_info[b].ch_from)
881                     && (channel <= priv->calib_info->band_info[b].ch_to))
882                         break;
883         }
884
885         return b;
886 }
887
888 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
889 {
890         s32 val;
891
892         if (x2 == x1)
893                 return y1;
894         else {
895                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
896                 return val + y2;
897         }
898 }
899
900 /**
901  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
902  *
903  * Interpolates factory measurements from the two sample channels within a
904  * sub-band, to apply to channel of interest.  Interpolation is proportional to
905  * differences in channel frequencies, which is proportional to differences
906  * in channel number.
907  */
908 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
909                                     struct iwl_eeprom_calib_ch_info *chan_info)
910 {
911         s32 s = -1;
912         u32 c;
913         u32 m;
914         const struct iwl_eeprom_calib_measure *m1;
915         const struct iwl_eeprom_calib_measure *m2;
916         struct iwl_eeprom_calib_measure *omeas;
917         u32 ch_i1;
918         u32 ch_i2;
919
920         s = iwl4965_get_sub_band(priv, channel);
921         if (s >= EEPROM_TX_POWER_BANDS) {
922                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
923                 return -1;
924         }
925
926         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
927         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
928         chan_info->ch_num = (u8) channel;
929
930         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
931                           channel, s, ch_i1, ch_i2);
932
933         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
934                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
935                         m1 = &(priv->calib_info->band_info[s].ch1.
936                                measurements[c][m]);
937                         m2 = &(priv->calib_info->band_info[s].ch2.
938                                measurements[c][m]);
939                         omeas = &(chan_info->measurements[c][m]);
940
941                         omeas->actual_pow =
942                             (u8) iwl4965_interpolate_value(channel, ch_i1,
943                                                            m1->actual_pow,
944                                                            ch_i2,
945                                                            m2->actual_pow);
946                         omeas->gain_idx =
947                             (u8) iwl4965_interpolate_value(channel, ch_i1,
948                                                            m1->gain_idx, ch_i2,
949                                                            m2->gain_idx);
950                         omeas->temperature =
951                             (u8) iwl4965_interpolate_value(channel, ch_i1,
952                                                            m1->temperature,
953                                                            ch_i2,
954                                                            m2->temperature);
955                         omeas->pa_det =
956                             (s8) iwl4965_interpolate_value(channel, ch_i1,
957                                                            m1->pa_det, ch_i2,
958                                                            m2->pa_det);
959
960                         IWL_DEBUG_TXPOWER(priv,
961                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
962                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
963                         IWL_DEBUG_TXPOWER(priv,
964                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
965                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
966                         IWL_DEBUG_TXPOWER(priv,
967                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
968                                 m1->pa_det, m2->pa_det, omeas->pa_det);
969                         IWL_DEBUG_TXPOWER(priv,
970                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
971                                 m1->temperature, m2->temperature,
972                                 omeas->temperature);
973                 }
974         }
975
976         return 0;
977 }
978
979 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
980  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
981 static s32 back_off_table[] = {
982         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
983         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
984         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
985         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
986         10                      /* CCK */
987 };
988
989 /* Thermal compensation values for txpower for various frequency ranges ...
990  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
991 static struct iwl4965_txpower_comp_entry {
992         s32 degrees_per_05db_a;
993         s32 degrees_per_05db_a_denom;
994 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
995         {9, 2},                 /* group 0 5.2, ch  34-43 */
996         {4, 1},                 /* group 1 5.2, ch  44-70 */
997         {4, 1},                 /* group 2 5.2, ch  71-124 */
998         {4, 1},                 /* group 3 5.2, ch 125-200 */
999         {3, 1}                  /* group 4 2.4, ch   all */
1000 };
1001
1002 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1003 {
1004         if (!band) {
1005                 if ((rate_power_index & 7) <= 4)
1006                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1007         }
1008         return MIN_TX_GAIN_INDEX;
1009 }
1010
1011 struct gain_entry {
1012         u8 dsp;
1013         u8 radio;
1014 };
1015
1016 static const struct gain_entry gain_table[2][108] = {
1017         /* 5.2GHz power gain index table */
1018         {
1019          {123, 0x3F},           /* highest txpower */
1020          {117, 0x3F},
1021          {110, 0x3F},
1022          {104, 0x3F},
1023          {98, 0x3F},
1024          {110, 0x3E},
1025          {104, 0x3E},
1026          {98, 0x3E},
1027          {110, 0x3D},
1028          {104, 0x3D},
1029          {98, 0x3D},
1030          {110, 0x3C},
1031          {104, 0x3C},
1032          {98, 0x3C},
1033          {110, 0x3B},
1034          {104, 0x3B},
1035          {98, 0x3B},
1036          {110, 0x3A},
1037          {104, 0x3A},
1038          {98, 0x3A},
1039          {110, 0x39},
1040          {104, 0x39},
1041          {98, 0x39},
1042          {110, 0x38},
1043          {104, 0x38},
1044          {98, 0x38},
1045          {110, 0x37},
1046          {104, 0x37},
1047          {98, 0x37},
1048          {110, 0x36},
1049          {104, 0x36},
1050          {98, 0x36},
1051          {110, 0x35},
1052          {104, 0x35},
1053          {98, 0x35},
1054          {110, 0x34},
1055          {104, 0x34},
1056          {98, 0x34},
1057          {110, 0x33},
1058          {104, 0x33},
1059          {98, 0x33},
1060          {110, 0x32},
1061          {104, 0x32},
1062          {98, 0x32},
1063          {110, 0x31},
1064          {104, 0x31},
1065          {98, 0x31},
1066          {110, 0x30},
1067          {104, 0x30},
1068          {98, 0x30},
1069          {110, 0x25},
1070          {104, 0x25},
1071          {98, 0x25},
1072          {110, 0x24},
1073          {104, 0x24},
1074          {98, 0x24},
1075          {110, 0x23},
1076          {104, 0x23},
1077          {98, 0x23},
1078          {110, 0x22},
1079          {104, 0x18},
1080          {98, 0x18},
1081          {110, 0x17},
1082          {104, 0x17},
1083          {98, 0x17},
1084          {110, 0x16},
1085          {104, 0x16},
1086          {98, 0x16},
1087          {110, 0x15},
1088          {104, 0x15},
1089          {98, 0x15},
1090          {110, 0x14},
1091          {104, 0x14},
1092          {98, 0x14},
1093          {110, 0x13},
1094          {104, 0x13},
1095          {98, 0x13},
1096          {110, 0x12},
1097          {104, 0x08},
1098          {98, 0x08},
1099          {110, 0x07},
1100          {104, 0x07},
1101          {98, 0x07},
1102          {110, 0x06},
1103          {104, 0x06},
1104          {98, 0x06},
1105          {110, 0x05},
1106          {104, 0x05},
1107          {98, 0x05},
1108          {110, 0x04},
1109          {104, 0x04},
1110          {98, 0x04},
1111          {110, 0x03},
1112          {104, 0x03},
1113          {98, 0x03},
1114          {110, 0x02},
1115          {104, 0x02},
1116          {98, 0x02},
1117          {110, 0x01},
1118          {104, 0x01},
1119          {98, 0x01},
1120          {110, 0x00},
1121          {104, 0x00},
1122          {98, 0x00},
1123          {93, 0x00},
1124          {88, 0x00},
1125          {83, 0x00},
1126          {78, 0x00},
1127          },
1128         /* 2.4GHz power gain index table */
1129         {
1130          {110, 0x3f},           /* highest txpower */
1131          {104, 0x3f},
1132          {98, 0x3f},
1133          {110, 0x3e},
1134          {104, 0x3e},
1135          {98, 0x3e},
1136          {110, 0x3d},
1137          {104, 0x3d},
1138          {98, 0x3d},
1139          {110, 0x3c},
1140          {104, 0x3c},
1141          {98, 0x3c},
1142          {110, 0x3b},
1143          {104, 0x3b},
1144          {98, 0x3b},
1145          {110, 0x3a},
1146          {104, 0x3a},
1147          {98, 0x3a},
1148          {110, 0x39},
1149          {104, 0x39},
1150          {98, 0x39},
1151          {110, 0x38},
1152          {104, 0x38},
1153          {98, 0x38},
1154          {110, 0x37},
1155          {104, 0x37},
1156          {98, 0x37},
1157          {110, 0x36},
1158          {104, 0x36},
1159          {98, 0x36},
1160          {110, 0x35},
1161          {104, 0x35},
1162          {98, 0x35},
1163          {110, 0x34},
1164          {104, 0x34},
1165          {98, 0x34},
1166          {110, 0x33},
1167          {104, 0x33},
1168          {98, 0x33},
1169          {110, 0x32},
1170          {104, 0x32},
1171          {98, 0x32},
1172          {110, 0x31},
1173          {104, 0x31},
1174          {98, 0x31},
1175          {110, 0x30},
1176          {104, 0x30},
1177          {98, 0x30},
1178          {110, 0x6},
1179          {104, 0x6},
1180          {98, 0x6},
1181          {110, 0x5},
1182          {104, 0x5},
1183          {98, 0x5},
1184          {110, 0x4},
1185          {104, 0x4},
1186          {98, 0x4},
1187          {110, 0x3},
1188          {104, 0x3},
1189          {98, 0x3},
1190          {110, 0x2},
1191          {104, 0x2},
1192          {98, 0x2},
1193          {110, 0x1},
1194          {104, 0x1},
1195          {98, 0x1},
1196          {110, 0x0},
1197          {104, 0x0},
1198          {98, 0x0},
1199          {97, 0},
1200          {96, 0},
1201          {95, 0},
1202          {94, 0},
1203          {93, 0},
1204          {92, 0},
1205          {91, 0},
1206          {90, 0},
1207          {89, 0},
1208          {88, 0},
1209          {87, 0},
1210          {86, 0},
1211          {85, 0},
1212          {84, 0},
1213          {83, 0},
1214          {82, 0},
1215          {81, 0},
1216          {80, 0},
1217          {79, 0},
1218          {78, 0},
1219          {77, 0},
1220          {76, 0},
1221          {75, 0},
1222          {74, 0},
1223          {73, 0},
1224          {72, 0},
1225          {71, 0},
1226          {70, 0},
1227          {69, 0},
1228          {68, 0},
1229          {67, 0},
1230          {66, 0},
1231          {65, 0},
1232          {64, 0},
1233          {63, 0},
1234          {62, 0},
1235          {61, 0},
1236          {60, 0},
1237          {59, 0},
1238          }
1239 };
1240
1241 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1242                                     u8 is_fat, u8 ctrl_chan_high,
1243                                     struct iwl4965_tx_power_db *tx_power_tbl)
1244 {
1245         u8 saturation_power;
1246         s32 target_power;
1247         s32 user_target_power;
1248         s32 power_limit;
1249         s32 current_temp;
1250         s32 reg_limit;
1251         s32 current_regulatory;
1252         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1253         int i;
1254         int c;
1255         const struct iwl_channel_info *ch_info = NULL;
1256         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1257         const struct iwl_eeprom_calib_measure *measurement;
1258         s16 voltage;
1259         s32 init_voltage;
1260         s32 voltage_compensation;
1261         s32 degrees_per_05db_num;
1262         s32 degrees_per_05db_denom;
1263         s32 factory_temp;
1264         s32 temperature_comp[2];
1265         s32 factory_gain_index[2];
1266         s32 factory_actual_pwr[2];
1267         s32 power_index;
1268
1269         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1270          *   are used for indexing into txpower table) */
1271         user_target_power = 2 * priv->tx_power_user_lmt;
1272
1273         /* Get current (RXON) channel, band, width */
1274         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1275                           is_fat);
1276
1277         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1278
1279         if (!is_channel_valid(ch_info))
1280                 return -EINVAL;
1281
1282         /* get txatten group, used to select 1) thermal txpower adjustment
1283          *   and 2) mimo txpower balance between Tx chains. */
1284         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1285         if (txatten_grp < 0) {
1286                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1287                           channel);
1288                 return -EINVAL;
1289         }
1290
1291         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1292                           channel, txatten_grp);
1293
1294         if (is_fat) {
1295                 if (ctrl_chan_high)
1296                         channel -= 2;
1297                 else
1298                         channel += 2;
1299         }
1300
1301         /* hardware txpower limits ...
1302          * saturation (clipping distortion) txpowers are in half-dBm */
1303         if (band)
1304                 saturation_power = priv->calib_info->saturation_power24;
1305         else
1306                 saturation_power = priv->calib_info->saturation_power52;
1307
1308         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1309             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1310                 if (band)
1311                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1312                 else
1313                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1314         }
1315
1316         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1317          *   max_power_avg values are in dBm, convert * 2 */
1318         if (is_fat)
1319                 reg_limit = ch_info->fat_max_power_avg * 2;
1320         else
1321                 reg_limit = ch_info->max_power_avg * 2;
1322
1323         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1324             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1325                 if (band)
1326                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1327                 else
1328                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1329         }
1330
1331         /* Interpolate txpower calibration values for this channel,
1332          *   based on factory calibration tests on spaced channels. */
1333         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1334
1335         /* calculate tx gain adjustment based on power supply voltage */
1336         voltage = priv->calib_info->voltage;
1337         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1338         voltage_compensation =
1339             iwl4965_get_voltage_compensation(voltage, init_voltage);
1340
1341         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1342                           init_voltage,
1343                           voltage, voltage_compensation);
1344
1345         /* get current temperature (Celsius) */
1346         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1347         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1348         current_temp = KELVIN_TO_CELSIUS(current_temp);
1349
1350         /* select thermal txpower adjustment params, based on channel group
1351          *   (same frequency group used for mimo txatten adjustment) */
1352         degrees_per_05db_num =
1353             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1354         degrees_per_05db_denom =
1355             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1356
1357         /* get per-chain txpower values from factory measurements */
1358         for (c = 0; c < 2; c++) {
1359                 measurement = &ch_eeprom_info.measurements[c][1];
1360
1361                 /* txgain adjustment (in half-dB steps) based on difference
1362                  *   between factory and current temperature */
1363                 factory_temp = measurement->temperature;
1364                 iwl4965_math_div_round((current_temp - factory_temp) *
1365                                        degrees_per_05db_denom,
1366                                        degrees_per_05db_num,
1367                                        &temperature_comp[c]);
1368
1369                 factory_gain_index[c] = measurement->gain_idx;
1370                 factory_actual_pwr[c] = measurement->actual_pow;
1371
1372                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1373                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1374                                   "curr tmp %d, comp %d steps\n",
1375                                   factory_temp, current_temp,
1376                                   temperature_comp[c]);
1377
1378                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1379                                   factory_gain_index[c],
1380                                   factory_actual_pwr[c]);
1381         }
1382
1383         /* for each of 33 bit-rates (including 1 for CCK) */
1384         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1385                 u8 is_mimo_rate;
1386                 union iwl4965_tx_power_dual_stream tx_power;
1387
1388                 /* for mimo, reduce each chain's txpower by half
1389                  * (3dB, 6 steps), so total output power is regulatory
1390                  * compliant. */
1391                 if (i & 0x8) {
1392                         current_regulatory = reg_limit -
1393                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1394                         is_mimo_rate = 1;
1395                 } else {
1396                         current_regulatory = reg_limit;
1397                         is_mimo_rate = 0;
1398                 }
1399
1400                 /* find txpower limit, either hardware or regulatory */
1401                 power_limit = saturation_power - back_off_table[i];
1402                 if (power_limit > current_regulatory)
1403                         power_limit = current_regulatory;
1404
1405                 /* reduce user's txpower request if necessary
1406                  * for this rate on this channel */
1407                 target_power = user_target_power;
1408                 if (target_power > power_limit)
1409                         target_power = power_limit;
1410
1411                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1412                                   i, saturation_power - back_off_table[i],
1413                                   current_regulatory, user_target_power,
1414                                   target_power);
1415
1416                 /* for each of 2 Tx chains (radio transmitters) */
1417                 for (c = 0; c < 2; c++) {
1418                         s32 atten_value;
1419
1420                         if (is_mimo_rate)
1421                                 atten_value =
1422                                     (s32)le32_to_cpu(priv->card_alive_init.
1423                                     tx_atten[txatten_grp][c]);
1424                         else
1425                                 atten_value = 0;
1426
1427                         /* calculate index; higher index means lower txpower */
1428                         power_index = (u8) (factory_gain_index[c] -
1429                                             (target_power -
1430                                              factory_actual_pwr[c]) -
1431                                             temperature_comp[c] -
1432                                             voltage_compensation +
1433                                             atten_value);
1434
1435 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1436                                                 power_index); */
1437
1438                         if (power_index < get_min_power_index(i, band))
1439                                 power_index = get_min_power_index(i, band);
1440
1441                         /* adjust 5 GHz index to support negative indexes */
1442                         if (!band)
1443                                 power_index += 9;
1444
1445                         /* CCK, rate 32, reduce txpower for CCK */
1446                         if (i == POWER_TABLE_CCK_ENTRY)
1447                                 power_index +=
1448                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1449
1450                         /* stay within the table! */
1451                         if (power_index > 107) {
1452                                 IWL_WARN(priv, "txpower index %d > 107\n",
1453                                             power_index);
1454                                 power_index = 107;
1455                         }
1456                         if (power_index < 0) {
1457                                 IWL_WARN(priv, "txpower index %d < 0\n",
1458                                             power_index);
1459                                 power_index = 0;
1460                         }
1461
1462                         /* fill txpower command for this rate/chain */
1463                         tx_power.s.radio_tx_gain[c] =
1464                                 gain_table[band][power_index].radio;
1465                         tx_power.s.dsp_predis_atten[c] =
1466                                 gain_table[band][power_index].dsp;
1467
1468                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1469                                           "gain 0x%02x dsp %d\n",
1470                                           c, atten_value, power_index,
1471                                         tx_power.s.radio_tx_gain[c],
1472                                         tx_power.s.dsp_predis_atten[c]);
1473                 } /* for each chain */
1474
1475                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1476
1477         } /* for each rate */
1478
1479         return 0;
1480 }
1481
1482 /**
1483  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1484  *
1485  * Uses the active RXON for channel, band, and characteristics (fat, high)
1486  * The power limit is taken from priv->tx_power_user_lmt.
1487  */
1488 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1489 {
1490         struct iwl4965_txpowertable_cmd cmd = { 0 };
1491         int ret;
1492         u8 band = 0;
1493         u8 is_fat = 0;
1494         u8 ctrl_chan_high = 0;
1495
1496         if (test_bit(STATUS_SCANNING, &priv->status)) {
1497                 /* If this gets hit a lot, switch it to a BUG() and catch
1498                  * the stack trace to find out who is calling this during
1499                  * a scan. */
1500                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1501                 return -EAGAIN;
1502         }
1503
1504         band = priv->band == IEEE80211_BAND_2GHZ;
1505
1506         is_fat =  is_fat_channel(priv->active_rxon.flags);
1507
1508         if (is_fat &&
1509             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1510                 ctrl_chan_high = 1;
1511
1512         cmd.band = band;
1513         cmd.channel = priv->active_rxon.channel;
1514
1515         ret = iwl4965_fill_txpower_tbl(priv, band,
1516                                 le16_to_cpu(priv->active_rxon.channel),
1517                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1518         if (ret)
1519                 goto out;
1520
1521         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1522
1523 out:
1524         return ret;
1525 }
1526
1527 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1528 {
1529         int ret = 0;
1530         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1531         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1532         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1533
1534         if ((rxon1->flags == rxon2->flags) &&
1535             (rxon1->filter_flags == rxon2->filter_flags) &&
1536             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1537             (rxon1->ofdm_ht_single_stream_basic_rates ==
1538              rxon2->ofdm_ht_single_stream_basic_rates) &&
1539             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1540              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1541             (rxon1->rx_chain == rxon2->rx_chain) &&
1542             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1543                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1544                 return 0;
1545         }
1546
1547         rxon_assoc.flags = priv->staging_rxon.flags;
1548         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1549         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1550         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1551         rxon_assoc.reserved = 0;
1552         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1553             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1554         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1555             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1556         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1557
1558         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1559                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1560         if (ret)
1561                 return ret;
1562
1563         return ret;
1564 }
1565
1566 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1567 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1568 {
1569         int rc;
1570         u8 band = 0;
1571         u8 is_fat = 0;
1572         u8 ctrl_chan_high = 0;
1573         struct iwl4965_channel_switch_cmd cmd = { 0 };
1574         const struct iwl_channel_info *ch_info;
1575
1576         band = priv->band == IEEE80211_BAND_2GHZ;
1577
1578         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1579
1580         is_fat = is_fat_channel(priv->staging_rxon.flags);
1581
1582         if (is_fat &&
1583             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1584                 ctrl_chan_high = 1;
1585
1586         cmd.band = band;
1587         cmd.expect_beacon = 0;
1588         cmd.channel = cpu_to_le16(channel);
1589         cmd.rxon_flags = priv->active_rxon.flags;
1590         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1591         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1592         if (ch_info)
1593                 cmd.expect_beacon = is_channel_radar(ch_info);
1594         else
1595                 cmd.expect_beacon = 1;
1596
1597         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1598                                       ctrl_chan_high, &cmd.tx_power);
1599         if (rc) {
1600                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1601                 return rc;
1602         }
1603
1604         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1605         return rc;
1606 }
1607 #endif
1608
1609 /**
1610  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1611  */
1612 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1613                                             struct iwl_tx_queue *txq,
1614                                             u16 byte_cnt)
1615 {
1616         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1617         int txq_id = txq->q.id;
1618         int write_ptr = txq->q.write_ptr;
1619         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1620         __le16 bc_ent;
1621
1622         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1623
1624         bc_ent = cpu_to_le16(len & 0xFFF);
1625         /* Set up byte count within first 256 entries */
1626         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1627
1628         /* If within first 64 entries, duplicate at end */
1629         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1630                 scd_bc_tbl[txq_id].
1631                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1632 }
1633
1634 /**
1635  * sign_extend - Sign extend a value using specified bit as sign-bit
1636  *
1637  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1638  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1639  *
1640  * @param oper value to sign extend
1641  * @param index 0 based bit index (0<=index<32) to sign bit
1642  */
1643 static s32 sign_extend(u32 oper, int index)
1644 {
1645         u8 shift = 31 - index;
1646
1647         return (s32)(oper << shift) >> shift;
1648 }
1649
1650 /**
1651  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1652  * @statistics: Provides the temperature reading from the uCode
1653  *
1654  * A return of <0 indicates bogus data in the statistics
1655  */
1656 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1657 {
1658         s32 temperature;
1659         s32 vt;
1660         s32 R1, R2, R3;
1661         u32 R4;
1662
1663         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1664                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1665                 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1666                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1667                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1668                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1669                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1670         } else {
1671                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1672                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1673                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1674                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1675                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1676         }
1677
1678         /*
1679          * Temperature is only 23 bits, so sign extend out to 32.
1680          *
1681          * NOTE If we haven't received a statistics notification yet
1682          * with an updated temperature, use R4 provided to us in the
1683          * "initialize" ALIVE response.
1684          */
1685         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1686                 vt = sign_extend(R4, 23);
1687         else
1688                 vt = sign_extend(
1689                         le32_to_cpu(priv->statistics.general.temperature), 23);
1690
1691         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1692
1693         if (R3 == R1) {
1694                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1695                 return -1;
1696         }
1697
1698         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1699          * Add offset to center the adjustment around 0 degrees Centigrade. */
1700         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1701         temperature /= (R3 - R1);
1702         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1703
1704         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1705                         temperature, KELVIN_TO_CELSIUS(temperature));
1706
1707         return temperature;
1708 }
1709
1710 /* Adjust Txpower only if temperature variance is greater than threshold. */
1711 #define IWL_TEMPERATURE_THRESHOLD   3
1712
1713 /**
1714  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1715  *
1716  * If the temperature changed has changed sufficiently, then a recalibration
1717  * is needed.
1718  *
1719  * Assumes caller will replace priv->last_temperature once calibration
1720  * executed.
1721  */
1722 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1723 {
1724         int temp_diff;
1725
1726         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1727                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1728                 return 0;
1729         }
1730
1731         temp_diff = priv->temperature - priv->last_temperature;
1732
1733         /* get absolute value */
1734         if (temp_diff < 0) {
1735                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1736                 temp_diff = -temp_diff;
1737         } else if (temp_diff == 0)
1738                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1739         else
1740                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1741
1742         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1743                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1744                 return 0;
1745         }
1746
1747         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1748
1749         return 1;
1750 }
1751
1752 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1753 {
1754         s32 temp;
1755
1756         temp = iwl4965_hw_get_temperature(priv);
1757         if (temp < 0)
1758                 return;
1759
1760         if (priv->temperature != temp) {
1761                 if (priv->temperature)
1762                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1763                                        "from %dC to %dC\n",
1764                                        KELVIN_TO_CELSIUS(priv->temperature),
1765                                        KELVIN_TO_CELSIUS(temp));
1766                 else
1767                         IWL_DEBUG_TEMP(priv, "Temperature "
1768                                        "initialized to %dC\n",
1769                                        KELVIN_TO_CELSIUS(temp));
1770         }
1771
1772         priv->temperature = temp;
1773         set_bit(STATUS_TEMPERATURE, &priv->status);
1774
1775         if (!priv->disable_tx_power_cal &&
1776              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1777              iwl4965_is_temp_calib_needed(priv))
1778                 queue_work(priv->workqueue, &priv->txpower_work);
1779 }
1780
1781 /**
1782  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1783  */
1784 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1785                                             u16 txq_id)
1786 {
1787         /* Simply stop the queue, but don't change any configuration;
1788          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1789         iwl_write_prph(priv,
1790                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1791                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1792                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1793 }
1794
1795 /**
1796  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1797  * priv->lock must be held by the caller
1798  */
1799 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1800                                    u16 ssn_idx, u8 tx_fifo)
1801 {
1802         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1803             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1804                 IWL_WARN(priv,
1805                         "queue number out of range: %d, must be %d to %d\n",
1806                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1807                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1808                 return -EINVAL;
1809         }
1810
1811         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1812
1813         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1814
1815         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1816         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1817         /* supposes that ssn_idx is valid (!= 0xFFF) */
1818         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1819
1820         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1821         iwl_txq_ctx_deactivate(priv, txq_id);
1822         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1823
1824         return 0;
1825 }
1826
1827 /**
1828  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1829  */
1830 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1831                                         u16 txq_id)
1832 {
1833         u32 tbl_dw_addr;
1834         u32 tbl_dw;
1835         u16 scd_q2ratid;
1836
1837         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1838
1839         tbl_dw_addr = priv->scd_base_addr +
1840                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1841
1842         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1843
1844         if (txq_id & 0x1)
1845                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1846         else
1847                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1848
1849         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1850
1851         return 0;
1852 }
1853
1854
1855 /**
1856  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1857  *
1858  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1859  *        i.e. it must be one of the higher queues used for aggregation
1860  */
1861 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1862                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1863 {
1864         unsigned long flags;
1865         u16 ra_tid;
1866
1867         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1868             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1869                 IWL_WARN(priv,
1870                         "queue number out of range: %d, must be %d to %d\n",
1871                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1872                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1873                 return -EINVAL;
1874         }
1875
1876         ra_tid = BUILD_RAxTID(sta_id, tid);
1877
1878         /* Modify device's station table to Tx this TID */
1879         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1880
1881         spin_lock_irqsave(&priv->lock, flags);
1882
1883         /* Stop this Tx queue before configuring it */
1884         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1885
1886         /* Map receiver-address / traffic-ID to this queue */
1887         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1888
1889         /* Set this queue as a chain-building queue */
1890         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1891
1892         /* Place first TFD at index corresponding to start sequence number.
1893          * Assumes that ssn_idx is valid (!= 0xFFF) */
1894         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1895         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1896         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1897
1898         /* Set up Tx window size and frame limit for this queue */
1899         iwl_write_targ_mem(priv,
1900                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1901                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1902                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1903
1904         iwl_write_targ_mem(priv, priv->scd_base_addr +
1905                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1906                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1907                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1908
1909         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1910
1911         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1912         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1913
1914         spin_unlock_irqrestore(&priv->lock, flags);
1915
1916         return 0;
1917 }
1918
1919
1920 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1921 {
1922         switch (cmd_id) {
1923         case REPLY_RXON:
1924                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1925         default:
1926                 return len;
1927         }
1928 }
1929
1930 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1931 {
1932         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1933         addsta->mode = cmd->mode;
1934         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1935         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1936         addsta->station_flags = cmd->station_flags;
1937         addsta->station_flags_msk = cmd->station_flags_msk;
1938         addsta->tid_disable_tx = cmd->tid_disable_tx;
1939         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1940         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1941         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1942         addsta->reserved1 = cpu_to_le16(0);
1943         addsta->reserved2 = cpu_to_le32(0);
1944
1945         return (u16)sizeof(struct iwl4965_addsta_cmd);
1946 }
1947
1948 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1949 {
1950         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1951 }
1952
1953 /**
1954  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1955  */
1956 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1957                                       struct iwl_ht_agg *agg,
1958                                       struct iwl4965_tx_resp *tx_resp,
1959                                       int txq_id, u16 start_idx)
1960 {
1961         u16 status;
1962         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1963         struct ieee80211_tx_info *info = NULL;
1964         struct ieee80211_hdr *hdr = NULL;
1965         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1966         int i, sh, idx;
1967         u16 seq;
1968         if (agg->wait_for_ba)
1969                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1970
1971         agg->frame_count = tx_resp->frame_count;
1972         agg->start_idx = start_idx;
1973         agg->rate_n_flags = rate_n_flags;
1974         agg->bitmap = 0;
1975
1976         /* num frames attempted by Tx command */
1977         if (agg->frame_count == 1) {
1978                 /* Only one frame was attempted; no block-ack will arrive */
1979                 status = le16_to_cpu(frame_status[0].status);
1980                 idx = start_idx;
1981
1982                 /* FIXME: code repetition */
1983                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1984                                    agg->frame_count, agg->start_idx, idx);
1985
1986                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1987                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1988                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1989                 info->flags |= iwl_is_tx_success(status) ?
1990                         IEEE80211_TX_STAT_ACK : 0;
1991                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1992                 /* FIXME: code repetition end */
1993
1994                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1995                                     status & 0xff, tx_resp->failure_frame);
1996                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1997
1998                 agg->wait_for_ba = 0;
1999         } else {
2000                 /* Two or more frames were attempted; expect block-ack */
2001                 u64 bitmap = 0;
2002                 int start = agg->start_idx;
2003
2004                 /* Construct bit-map of pending frames within Tx window */
2005                 for (i = 0; i < agg->frame_count; i++) {
2006                         u16 sc;
2007                         status = le16_to_cpu(frame_status[i].status);
2008                         seq  = le16_to_cpu(frame_status[i].sequence);
2009                         idx = SEQ_TO_INDEX(seq);
2010                         txq_id = SEQ_TO_QUEUE(seq);
2011
2012                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2013                                       AGG_TX_STATE_ABORT_MSK))
2014                                 continue;
2015
2016                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2017                                            agg->frame_count, txq_id, idx);
2018
2019                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2020
2021                         sc = le16_to_cpu(hdr->seq_ctrl);
2022                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2023                                 IWL_ERR(priv,
2024                                         "BUG_ON idx doesn't match seq control"
2025                                         " idx=%d, seq_idx=%d, seq=%d\n",
2026                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2027                                 return -1;
2028                         }
2029
2030                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2031                                            i, idx, SEQ_TO_SN(sc));
2032
2033                         sh = idx - start;
2034                         if (sh > 64) {
2035                                 sh = (start - idx) + 0xff;
2036                                 bitmap = bitmap << sh;
2037                                 sh = 0;
2038                                 start = idx;
2039                         } else if (sh < -64)
2040                                 sh  = 0xff - (start - idx);
2041                         else if (sh < 0) {
2042                                 sh = start - idx;
2043                                 start = idx;
2044                                 bitmap = bitmap << sh;
2045                                 sh = 0;
2046                         }
2047                         bitmap |= 1ULL << sh;
2048                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2049                                            start, (unsigned long long)bitmap);
2050                 }
2051
2052                 agg->bitmap = bitmap;
2053                 agg->start_idx = start;
2054                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2055                                    agg->frame_count, agg->start_idx,
2056                                    (unsigned long long)agg->bitmap);
2057
2058                 if (bitmap)
2059                         agg->wait_for_ba = 1;
2060         }
2061         return 0;
2062 }
2063
2064 /**
2065  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2066  */
2067 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2068                                 struct iwl_rx_mem_buffer *rxb)
2069 {
2070         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2071         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2072         int txq_id = SEQ_TO_QUEUE(sequence);
2073         int index = SEQ_TO_INDEX(sequence);
2074         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2075         struct ieee80211_hdr *hdr;
2076         struct ieee80211_tx_info *info;
2077         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2078         u32  status = le32_to_cpu(tx_resp->u.status);
2079         int tid = MAX_TID_COUNT;
2080         int sta_id;
2081         int freed;
2082         u8 *qc = NULL;
2083
2084         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2085                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2086                           "is out of range [0-%d] %d %d\n", txq_id,
2087                           index, txq->q.n_bd, txq->q.write_ptr,
2088                           txq->q.read_ptr);
2089                 return;
2090         }
2091
2092         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2093         memset(&info->status, 0, sizeof(info->status));
2094
2095         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2096         if (ieee80211_is_data_qos(hdr->frame_control)) {
2097                 qc = ieee80211_get_qos_ctl(hdr);
2098                 tid = qc[0] & 0xf;
2099         }
2100
2101         sta_id = iwl_get_ra_sta_id(priv, hdr);
2102         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2103                 IWL_ERR(priv, "Station not known\n");
2104                 return;
2105         }
2106
2107         if (txq->sched_retry) {
2108                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2109                 struct iwl_ht_agg *agg = NULL;
2110
2111                 WARN_ON(!qc);
2112
2113                 agg = &priv->stations[sta_id].tid[tid].agg;
2114
2115                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2116
2117                 /* check if BAR is needed */
2118                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2119                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2120
2121                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2122                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2123                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2124                                            "%d index %d\n", scd_ssn , index);
2125                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2126                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2127
2128                         if (priv->mac80211_registered &&
2129                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2130                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2131                                 if (agg->state == IWL_AGG_OFF)
2132                                         iwl_wake_queue(priv, txq_id);
2133                                 else
2134                                         iwl_wake_queue(priv, txq->swq_id);
2135                         }
2136                 }
2137         } else {
2138                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2139                 info->flags |= iwl_is_tx_success(status) ?
2140                                         IEEE80211_TX_STAT_ACK : 0;
2141                 iwl_hwrate_to_tx_control(priv,
2142                                         le32_to_cpu(tx_resp->rate_n_flags),
2143                                         info);
2144
2145                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2146                                    "rate_n_flags 0x%x retries %d\n",
2147                                    txq_id,
2148                                    iwl_get_tx_fail_reason(status), status,
2149                                    le32_to_cpu(tx_resp->rate_n_flags),
2150                                    tx_resp->failure_frame);
2151
2152                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2153                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2154                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2155
2156                 if (priv->mac80211_registered &&
2157                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2158                         iwl_wake_queue(priv, txq_id);
2159         }
2160
2161         if (qc && likely(sta_id != IWL_INVALID_STATION))
2162                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2163
2164         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2165                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2166 }
2167
2168 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2169                              struct iwl_rx_phy_res *rx_resp)
2170 {
2171         /* data from PHY/DSP regarding signal strength, etc.,
2172          *   contents are always there, not configurable by host.  */
2173         struct iwl4965_rx_non_cfg_phy *ncphy =
2174             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2175         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2176                         >> IWL49_AGC_DB_POS;
2177
2178         u32 valid_antennae =
2179             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2180                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2181         u8 max_rssi = 0;
2182         u32 i;
2183
2184         /* Find max rssi among 3 possible receivers.
2185          * These values are measured by the digital signal processor (DSP).
2186          * They should stay fairly constant even as the signal strength varies,
2187          *   if the radio's automatic gain control (AGC) is working right.
2188          * AGC value (see below) will provide the "interesting" info. */
2189         for (i = 0; i < 3; i++)
2190                 if (valid_antennae & (1 << i))
2191                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2192
2193         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2194                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2195                 max_rssi, agc);
2196
2197         /* dBm = max_rssi dB - agc dB - constant.
2198          * Higher AGC (higher radio gain) means lower signal. */
2199         return max_rssi - agc - IWL49_RSSI_OFFSET;
2200 }
2201
2202
2203 /* Set up 4965-specific Rx frame reply handlers */
2204 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2205 {
2206         /* Legacy Rx frames */
2207         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2208         /* Tx response */
2209         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2210 }
2211
2212 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2213 {
2214         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2215 }
2216
2217 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2218 {
2219         cancel_work_sync(&priv->txpower_work);
2220 }
2221
2222 static struct iwl_station_mgmt_ops iwl4965_station_mgmt = {
2223         .add_station = iwl_add_station_flags,
2224         .remove_station = iwl_remove_station,
2225         .find_station = iwl_find_station,
2226         .clear_station_table = iwl_clear_stations_table,
2227 };
2228
2229 static struct iwl_hcmd_ops iwl4965_hcmd = {
2230         .rxon_assoc = iwl4965_send_rxon_assoc,
2231         .commit_rxon = iwl_commit_rxon,
2232         .set_rxon_chain = iwl_set_rxon_chain,
2233 };
2234
2235 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2236         .get_hcmd_size = iwl4965_get_hcmd_size,
2237         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2238         .chain_noise_reset = iwl4965_chain_noise_reset,
2239         .gain_computation = iwl4965_gain_computation,
2240         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2241         .calc_rssi = iwl4965_calc_rssi,
2242 };
2243
2244 static struct iwl_lib_ops iwl4965_lib = {
2245         .set_hw_params = iwl4965_hw_set_hw_params,
2246         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2247         .txq_set_sched = iwl4965_txq_set_sched,
2248         .txq_agg_enable = iwl4965_txq_agg_enable,
2249         .txq_agg_disable = iwl4965_txq_agg_disable,
2250         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2251         .txq_free_tfd = iwl_hw_txq_free_tfd,
2252         .txq_init = iwl_hw_tx_queue_init,
2253         .rx_handler_setup = iwl4965_rx_handler_setup,
2254         .setup_deferred_work = iwl4965_setup_deferred_work,
2255         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2256         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2257         .alive_notify = iwl4965_alive_notify,
2258         .init_alive_start = iwl4965_init_alive_start,
2259         .load_ucode = iwl4965_load_bsm,
2260         .apm_ops = {
2261                 .init = iwl4965_apm_init,
2262                 .reset = iwl4965_apm_reset,
2263                 .stop = iwl4965_apm_stop,
2264                 .config = iwl4965_nic_config,
2265                 .set_pwr_src = iwl_set_pwr_src,
2266         },
2267         .eeprom_ops = {
2268                 .regulatory_bands = {
2269                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2270                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2271                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2272                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2273                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2274                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2275                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2276                 },
2277                 .verify_signature  = iwlcore_eeprom_verify_signature,
2278                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2279                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2280                 .calib_version = iwl4965_eeprom_calib_version,
2281                 .query_addr = iwlcore_eeprom_query_addr,
2282         },
2283         .send_tx_power  = iwl4965_send_tx_power,
2284         .update_chain_flags = iwl_update_chain_flags,
2285         .post_associate = iwl_post_associate,
2286         .config_ap = iwl_config_ap,
2287         .temp_ops = {
2288                 .temperature = iwl4965_temperature_calib,
2289                 .set_ct_kill = iwl4965_set_ct_threshold,
2290         },
2291 };
2292
2293 static struct iwl_ops iwl4965_ops = {
2294         .lib = &iwl4965_lib,
2295         .hcmd = &iwl4965_hcmd,
2296         .utils = &iwl4965_hcmd_utils,
2297         .smgmt = &iwl4965_station_mgmt,
2298 };
2299
2300 struct iwl_cfg iwl4965_agn_cfg = {
2301         .name = "4965AGN",
2302         .fw_name_pre = IWL4965_FW_PRE,
2303         .ucode_api_max = IWL4965_UCODE_API_MAX,
2304         .ucode_api_min = IWL4965_UCODE_API_MIN,
2305         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2306         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2307         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2308         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2309         .ops = &iwl4965_ops,
2310         .mod_params = &iwl4965_mod_params,
2311 };
2312
2313 /* Module firmware */
2314 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2315
2316 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2317 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2318 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2319 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2320 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2321 MODULE_PARM_DESC(debug, "debug output mask");
2322 module_param_named(
2323         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2324 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2325
2326 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2327 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2328 /* 11n */
2329 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2330 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2331 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2332 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2333
2334 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2335 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");