Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
41
42 #include "iwl-3945-core.h"
43 #include "iwl-3945.h"
44 #include "iwl-helpers.h"
45 #include "iwl-3945-rs.h"
46
47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
48         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
49                                     IWL_RATE_##r##M_IEEE,   \
50                                     IWL_RATE_##ip##M_INDEX, \
51                                     IWL_RATE_##in##M_INDEX, \
52                                     IWL_RATE_##rp##M_INDEX, \
53                                     IWL_RATE_##rn##M_INDEX, \
54                                     IWL_RATE_##pp##M_INDEX, \
55                                     IWL_RATE_##np##M_INDEX, \
56                                     IWL_RATE_##r##M_INDEX_TABLE, \
57                                     IWL_RATE_##ip##M_INDEX_TABLE }
58
59 /*
60  * Parameter order:
61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
62  *
63  * If there isn't a valid next or previous rate then INV is used which
64  * maps to IWL_RATE_INVALID
65  *
66  */
67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
68         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
69         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
70         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
71         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
72         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
73         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
74         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
75         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
76         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
77         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
78         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
79         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
80 };
81
82 /* 1 = enable the iwl3945_disable_events() function */
83 #define IWL_EVT_DISABLE (0)
84 #define IWL_EVT_DISABLE_SIZE (1532/32)
85
86 /**
87  * iwl3945_disable_events - Disable selected events in uCode event log
88  *
89  * Disable an event by writing "1"s into "disable"
90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
91  *   Default values of 0 enable uCode events to be logged.
92  * Use for only special debugging.  This function is just a placeholder as-is,
93  *   you'll need to provide the special bits! ...
94  *   ... and set IWL_EVT_DISABLE to 1. */
95 void iwl3945_disable_events(struct iwl3945_priv *priv)
96 {
97         int ret;
98         int i;
99         u32 base;               /* SRAM address of event log header */
100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
101         u32 array_size;         /* # of u32 entries in array */
102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
103                 0x00000000,     /*   31 -    0  Event id numbers */
104                 0x00000000,     /*   63 -   32 */
105                 0x00000000,     /*   95 -   64 */
106                 0x00000000,     /*  127 -   96 */
107                 0x00000000,     /*  159 -  128 */
108                 0x00000000,     /*  191 -  160 */
109                 0x00000000,     /*  223 -  192 */
110                 0x00000000,     /*  255 -  224 */
111                 0x00000000,     /*  287 -  256 */
112                 0x00000000,     /*  319 -  288 */
113                 0x00000000,     /*  351 -  320 */
114                 0x00000000,     /*  383 -  352 */
115                 0x00000000,     /*  415 -  384 */
116                 0x00000000,     /*  447 -  416 */
117                 0x00000000,     /*  479 -  448 */
118                 0x00000000,     /*  511 -  480 */
119                 0x00000000,     /*  543 -  512 */
120                 0x00000000,     /*  575 -  544 */
121                 0x00000000,     /*  607 -  576 */
122                 0x00000000,     /*  639 -  608 */
123                 0x00000000,     /*  671 -  640 */
124                 0x00000000,     /*  703 -  672 */
125                 0x00000000,     /*  735 -  704 */
126                 0x00000000,     /*  767 -  736 */
127                 0x00000000,     /*  799 -  768 */
128                 0x00000000,     /*  831 -  800 */
129                 0x00000000,     /*  863 -  832 */
130                 0x00000000,     /*  895 -  864 */
131                 0x00000000,     /*  927 -  896 */
132                 0x00000000,     /*  959 -  928 */
133                 0x00000000,     /*  991 -  960 */
134                 0x00000000,     /* 1023 -  992 */
135                 0x00000000,     /* 1055 - 1024 */
136                 0x00000000,     /* 1087 - 1056 */
137                 0x00000000,     /* 1119 - 1088 */
138                 0x00000000,     /* 1151 - 1120 */
139                 0x00000000,     /* 1183 - 1152 */
140                 0x00000000,     /* 1215 - 1184 */
141                 0x00000000,     /* 1247 - 1216 */
142                 0x00000000,     /* 1279 - 1248 */
143                 0x00000000,     /* 1311 - 1280 */
144                 0x00000000,     /* 1343 - 1312 */
145                 0x00000000,     /* 1375 - 1344 */
146                 0x00000000,     /* 1407 - 1376 */
147                 0x00000000,     /* 1439 - 1408 */
148                 0x00000000,     /* 1471 - 1440 */
149                 0x00000000,     /* 1503 - 1472 */
150         };
151
152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
153         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
155                 return;
156         }
157
158         ret = iwl3945_grab_nic_access(priv);
159         if (ret) {
160                 IWL_WARNING("Can not read from adapter at this time.\n");
161                 return;
162         }
163
164         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
165         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
166         iwl3945_release_nic_access(priv);
167
168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
170                                disable_ptr);
171                 ret = iwl3945_grab_nic_access(priv);
172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
173                         iwl3945_write_targ_mem(priv,
174                                            disable_ptr + (i * sizeof(u32)),
175                                            evt_disable[i]);
176
177                 iwl3945_release_nic_access(priv);
178         } else {
179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
182                                disable_ptr, array_size);
183         }
184
185 }
186
187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
188 {
189         int idx;
190
191         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
192                 if (iwl3945_rates[idx].plcp == plcp)
193                         return idx;
194         return -1;
195 }
196
197 /**
198  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
199  * @priv: eeprom and antenna fields are used to determine antenna flags
200  *
201  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
202  * priv->antenna specifies the antenna diversity mode:
203  *
204  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
205  * IWL_ANTENNA_MAIN      - Force MAIN antenna
206  * IWL_ANTENNA_AUX       - Force AUX antenna
207  */
208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
209 {
210         switch (priv->antenna) {
211         case IWL_ANTENNA_DIVERSITY:
212                 return 0;
213
214         case IWL_ANTENNA_MAIN:
215                 if (priv->eeprom.antenna_switch_type)
216                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
217                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
218
219         case IWL_ANTENNA_AUX:
220                 if (priv->eeprom.antenna_switch_type)
221                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
222                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
223         }
224
225         /* bad antenna selector value */
226         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
227         return 0;               /* "diversity" is default if error */
228 }
229
230 #ifdef CONFIG_IWL3945_DEBUG
231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
232
233 static const char *iwl3945_get_tx_fail_reason(u32 status)
234 {
235         switch (status & TX_STATUS_MSK) {
236         case TX_STATUS_SUCCESS:
237                 return "SUCCESS";
238                 TX_STATUS_ENTRY(SHORT_LIMIT);
239                 TX_STATUS_ENTRY(LONG_LIMIT);
240                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
241                 TX_STATUS_ENTRY(MGMNT_ABORT);
242                 TX_STATUS_ENTRY(NEXT_FRAG);
243                 TX_STATUS_ENTRY(LIFE_EXPIRE);
244                 TX_STATUS_ENTRY(DEST_PS);
245                 TX_STATUS_ENTRY(ABORTED);
246                 TX_STATUS_ENTRY(BT_RETRY);
247                 TX_STATUS_ENTRY(STA_INVALID);
248                 TX_STATUS_ENTRY(FRAG_DROPPED);
249                 TX_STATUS_ENTRY(TID_DISABLE);
250                 TX_STATUS_ENTRY(FRAME_FLUSHED);
251                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
252                 TX_STATUS_ENTRY(TX_LOCKED);
253                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
254         }
255
256         return "UNKNOWN";
257 }
258 #else
259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
260 {
261         return "";
262 }
263 #endif
264
265
266 /**
267  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
268  *
269  * When FW advances 'R' index, all entries between old and new 'R' index
270  * need to be reclaimed. As result, some free space forms. If there is
271  * enough free space (> low mark), wake the stack that feeds us.
272  */
273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
274                                      int txq_id, int index)
275 {
276         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
277         struct iwl3945_queue *q = &txq->q;
278         struct iwl3945_tx_info *tx_info;
279
280         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
281
282         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
283                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
284
285                 tx_info = &txq->txb[txq->q.read_ptr];
286                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
287                 tx_info->skb[0] = NULL;
288                 iwl3945_hw_txq_free_tfd(priv, txq);
289         }
290
291         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
292                         (txq_id != IWL_CMD_QUEUE_NUM) &&
293                         priv->mac80211_registered)
294                 ieee80211_wake_queue(priv->hw, txq_id);
295 }
296
297 /**
298  * iwl3945_rx_reply_tx - Handle Tx response
299  */
300 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
301                             struct iwl3945_rx_mem_buffer *rxb)
302 {
303         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
304         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
305         int txq_id = SEQ_TO_QUEUE(sequence);
306         int index = SEQ_TO_INDEX(sequence);
307         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
308         struct ieee80211_tx_info *info;
309         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
310         u32  status = le32_to_cpu(tx_resp->status);
311         int rate_idx;
312
313         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
314                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
315                           "is out of range [0-%d] %d %d\n", txq_id,
316                           index, txq->q.n_bd, txq->q.write_ptr,
317                           txq->q.read_ptr);
318                 return;
319         }
320
321         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
322         memset(&info->status, 0, sizeof(info->status));
323
324         info->status.retry_count = tx_resp->failure_frame;
325         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
326         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
327                                 IEEE80211_TX_STAT_ACK : 0;
328
329         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
330                         txq_id, iwl3945_get_tx_fail_reason(status), status,
331                         tx_resp->rate, tx_resp->failure_frame);
332
333         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
334         if (info->band == IEEE80211_BAND_5GHZ)
335                 rate_idx -= IWL_FIRST_OFDM_RATE;
336         info->tx_rate_idx = rate_idx;
337         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
338         iwl3945_tx_queue_reclaim(priv, txq_id, index);
339
340         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
341                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
342 }
343
344
345
346 /*****************************************************************************
347  *
348  * Intel PRO/Wireless 3945ABG/BG Network Connection
349  *
350  *  RX handler implementations
351  *
352  *****************************************************************************/
353
354 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
355 {
356         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
357         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
358                      (int)sizeof(struct iwl3945_notif_statistics),
359                      le32_to_cpu(pkt->len));
360
361         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
362
363         iwl3945_led_background(priv);
364
365         priv->last_statistics_time = jiffies;
366 }
367
368 /******************************************************************************
369  *
370  * Misc. internal state and helper functions
371  *
372  ******************************************************************************/
373 #ifdef CONFIG_IWL3945_DEBUG
374
375 /**
376  * iwl3945_report_frame - dump frame to syslog during debug sessions
377  *
378  * You may hack this function to show different aspects of received frames,
379  * including selective frame dumps.
380  * group100 parameter selects whether to show 1 out of 100 good frames.
381  */
382 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
383                       struct iwl3945_rx_packet *pkt,
384                       struct ieee80211_hdr *header, int group100)
385 {
386         u32 to_us;
387         u32 print_summary = 0;
388         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
389         u32 hundred = 0;
390         u32 dataframe = 0;
391         __le16 fc;
392         u16 seq_ctl;
393         u16 channel;
394         u16 phy_flags;
395         u16 length;
396         u16 status;
397         u16 bcn_tmr;
398         u32 tsf_low;
399         u64 tsf;
400         u8 rssi;
401         u8 agc;
402         u16 sig_avg;
403         u16 noise_diff;
404         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
405         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
406         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
407         u8 *data = IWL_RX_DATA(pkt);
408
409         /* MAC header */
410         fc = header->frame_control;
411         seq_ctl = le16_to_cpu(header->seq_ctrl);
412
413         /* metadata */
414         channel = le16_to_cpu(rx_hdr->channel);
415         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
416         length = le16_to_cpu(rx_hdr->len);
417
418         /* end-of-frame status and timestamp */
419         status = le32_to_cpu(rx_end->status);
420         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
421         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
422         tsf = le64_to_cpu(rx_end->timestamp);
423
424         /* signal statistics */
425         rssi = rx_stats->rssi;
426         agc = rx_stats->agc;
427         sig_avg = le16_to_cpu(rx_stats->sig_avg);
428         noise_diff = le16_to_cpu(rx_stats->noise_diff);
429
430         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
431
432         /* if data frame is to us and all is good,
433          *   (optionally) print summary for only 1 out of every 100 */
434         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
435             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
436                 dataframe = 1;
437                 if (!group100)
438                         print_summary = 1;      /* print each frame */
439                 else if (priv->framecnt_to_us < 100) {
440                         priv->framecnt_to_us++;
441                         print_summary = 0;
442                 } else {
443                         priv->framecnt_to_us = 0;
444                         print_summary = 1;
445                         hundred = 1;
446                 }
447         } else {
448                 /* print summary for all other frames */
449                 print_summary = 1;
450         }
451
452         if (print_summary) {
453                 char *title;
454                 u32 rate;
455
456                 if (hundred)
457                         title = "100Frames";
458                 else if (ieee80211_has_retry(fc))
459                         title = "Retry";
460                 else if (ieee80211_is_assoc_resp(fc))
461                         title = "AscRsp";
462                 else if (ieee80211_is_reassoc_resp(fc))
463                         title = "RasRsp";
464                 else if (ieee80211_is_probe_resp(fc)) {
465                         title = "PrbRsp";
466                         print_dump = 1; /* dump frame contents */
467                 } else if (ieee80211_is_beacon(fc)) {
468                         title = "Beacon";
469                         print_dump = 1; /* dump frame contents */
470                 } else if (ieee80211_is_atim(fc))
471                         title = "ATIM";
472                 else if (ieee80211_is_auth(fc))
473                         title = "Auth";
474                 else if (ieee80211_is_deauth(fc))
475                         title = "DeAuth";
476                 else if (ieee80211_is_disassoc(fc))
477                         title = "DisAssoc";
478                 else
479                         title = "Frame";
480
481                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
482                 if (rate == -1)
483                         rate = 0;
484                 else
485                         rate = iwl3945_rates[rate].ieee / 2;
486
487                 /* print frame summary.
488                  * MAC addresses show just the last byte (for brevity),
489                  *    but you can hack it to show more, if you'd like to. */
490                 if (dataframe)
491                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
492                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
493                                      title, le16_to_cpu(fc), header->addr1[5],
494                                      length, rssi, channel, rate);
495                 else {
496                         /* src/dst addresses assume managed mode */
497                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
498                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
499                                      "phy=0x%02x, chnl=%d\n",
500                                      title, le16_to_cpu(fc), header->addr1[5],
501                                      header->addr3[5], rssi,
502                                      tsf_low - priv->scan_start_tsf,
503                                      phy_flags, channel);
504                 }
505         }
506         if (print_dump)
507                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
508 }
509 #else
510 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
511                       struct iwl3945_rx_packet *pkt,
512                       struct ieee80211_hdr *header, int group100)
513 {
514 }
515 #endif
516
517
518 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
519                                  struct sk_buff *skb,
520                                  struct iwl3945_rx_frame_hdr *rx_hdr,
521                                  struct ieee80211_rx_status *stats)
522 {
523         /* First cache any information we need before we overwrite
524          * the information provided in the skb from the hardware */
525         s8 signal = stats->signal;
526         s8 noise = 0;
527         int rate = stats->rate_idx;
528         u64 tsf = stats->mactime;
529         __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
530
531         struct iwl3945_rt_rx_hdr {
532                 struct ieee80211_radiotap_header rt_hdr;
533                 __le64 rt_tsf;          /* TSF */
534                 u8 rt_flags;            /* radiotap packet flags */
535                 u8 rt_rate;             /* rate in 500kb/s */
536                 __le16 rt_channelMHz;   /* channel in MHz */
537                 __le16 rt_chbitmask;    /* channel bitfield */
538                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
539                 s8 rt_dbmnoise;
540                 u8 rt_antenna;          /* antenna number */
541         } __attribute__ ((packed)) *iwl3945_rt;
542
543         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
544                 if (net_ratelimit())
545                         printk(KERN_ERR "not enough headroom [%d] for "
546                                "radiotap head [%zd]\n",
547                                skb_headroom(skb), sizeof(*iwl3945_rt));
548                 return;
549         }
550
551         /* put radiotap header in front of 802.11 header and data */
552         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
553
554         /* initialise radiotap header */
555         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
556         iwl3945_rt->rt_hdr.it_pad = 0;
557
558         /* total header + data */
559         put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
560
561         /* Indicate all the fields we add to the radiotap header */
562         put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
563                            (1 << IEEE80211_RADIOTAP_FLAGS) |
564                            (1 << IEEE80211_RADIOTAP_RATE) |
565                            (1 << IEEE80211_RADIOTAP_CHANNEL) |
566                            (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
567                            (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
568                            (1 << IEEE80211_RADIOTAP_ANTENNA),
569                         &iwl3945_rt->rt_hdr.it_present);
570
571         /* Zero the flags, we'll add to them as we go */
572         iwl3945_rt->rt_flags = 0;
573
574         put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
575
576         iwl3945_rt->rt_dbmsignal = signal;
577         iwl3945_rt->rt_dbmnoise = noise;
578
579         /* Convert the channel frequency and set the flags */
580         put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
581         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
582                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
583                               &iwl3945_rt->rt_chbitmask);
584         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
585                 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
586                               &iwl3945_rt->rt_chbitmask);
587         else    /* 802.11g */
588                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
589                               &iwl3945_rt->rt_chbitmask);
590
591         if (rate == -1)
592                 iwl3945_rt->rt_rate = 0;
593         else {
594                 if (stats->band == IEEE80211_BAND_5GHZ)
595                         rate += IWL_FIRST_OFDM_RATE;
596
597                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
598         }
599
600         /* antenna number */
601         antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
602         iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
603
604         /* set the preamble flag if we have it */
605         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
606                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
607
608         stats->flag |= RX_FLAG_RADIOTAP;
609 }
610
611 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
612                                    struct iwl3945_rx_mem_buffer *rxb,
613                                    struct ieee80211_rx_status *stats)
614 {
615         struct ieee80211_hdr *hdr;
616         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
617         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
618         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
619         short len = le16_to_cpu(rx_hdr->len);
620
621         /* We received data from the HW, so stop the watchdog */
622         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
623                 IWL_DEBUG_DROP("Corruption detected!\n");
624                 return;
625         }
626
627         /* We only process data packets if the interface is open */
628         if (unlikely(!priv->is_open)) {
629                 IWL_DEBUG_DROP_LIMIT
630                     ("Dropping packet while interface is not open.\n");
631                 return;
632         }
633
634         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
635         /* Set the size of the skb to the size of the frame */
636         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
637
638         hdr = (void *)rxb->skb->data;
639
640         if (iwl3945_param_hwcrypto)
641                 iwl3945_set_decrypted_flag(priv, rxb->skb,
642                                        le32_to_cpu(rx_end->status), stats);
643
644         if (priv->add_radiotap)
645                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
646
647 #ifdef CONFIG_IWL3945_LEDS
648         if (is_data)
649                 priv->rxtxpackets += len;
650 #endif
651         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
652         rxb->skb = NULL;
653 }
654
655 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
656
657 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
658                                 struct iwl3945_rx_mem_buffer *rxb)
659 {
660         struct ieee80211_hdr *header;
661         struct ieee80211_rx_status rx_status;
662         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
663         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
664         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
665         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
666         int snr;
667         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
668         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
669         u8 network_packet;
670
671         rx_status.antenna = 0;
672         rx_status.flag = 0;
673         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
674         rx_status.freq =
675                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
676         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
677                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
678
679         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
680         if (rx_status.band == IEEE80211_BAND_5GHZ)
681                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
682
683         if ((unlikely(rx_stats->phy_count > 20))) {
684                 IWL_DEBUG_DROP
685                     ("dsp size out of range [0,20]: "
686                      "%d/n", rx_stats->phy_count);
687                 return;
688         }
689
690         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
691             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
692                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
693                 return;
694         }
695
696         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
697                 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
698                 return;
699         }
700
701         /* Convert 3945's rssi indicator to dBm */
702         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
703
704         /* Set default noise value to -127 */
705         if (priv->last_rx_noise == 0)
706                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
707
708         /* 3945 provides noise info for OFDM frames only.
709          * sig_avg and noise_diff are measured by the 3945's digital signal
710          *   processor (DSP), and indicate linear levels of signal level and
711          *   distortion/noise within the packet preamble after
712          *   automatic gain control (AGC).  sig_avg should stay fairly
713          *   constant if the radio's AGC is working well.
714          * Since these values are linear (not dB or dBm), linear
715          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
716          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
717          *   to obtain noise level in dBm.
718          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
719         if (rx_stats_noise_diff) {
720                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
721                 rx_status.noise = rx_status.signal -
722                                         iwl3945_calc_db_from_ratio(snr);
723                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
724                                                          rx_status.noise);
725
726         /* If noise info not available, calculate signal quality indicator (%)
727          *   using just the dBm signal level. */
728         } else {
729                 rx_status.noise = priv->last_rx_noise;
730                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
731         }
732
733
734         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
735                         rx_status.signal, rx_status.noise, rx_status.qual,
736                         rx_stats_sig_avg, rx_stats_noise_diff);
737
738         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
739
740         network_packet = iwl3945_is_network_packet(priv, header);
741
742         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
743                               network_packet ? '*' : ' ',
744                               le16_to_cpu(rx_hdr->channel),
745                               rx_status.signal, rx_status.signal,
746                               rx_status.noise, rx_status.rate_idx);
747
748 #ifdef CONFIG_IWL3945_DEBUG
749         if (iwl3945_debug_level & (IWL_DL_RX))
750                 /* Set "1" to report good data frames in groups of 100 */
751                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
752 #endif
753
754         if (network_packet) {
755                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
756                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
757                 priv->last_rx_rssi = rx_status.signal;
758                 priv->last_rx_noise = rx_status.noise;
759         }
760
761         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
762         case IEEE80211_FTYPE_MGMT:
763                 switch (le16_to_cpu(header->frame_control) &
764                         IEEE80211_FCTL_STYPE) {
765                 case IEEE80211_STYPE_PROBE_RESP:
766                 case IEEE80211_STYPE_BEACON:{
767                                 /* If this is a beacon or probe response for
768                                  * our network then cache the beacon
769                                  * timestamp */
770                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
771                                       && !compare_ether_addr(header->addr2,
772                                                              priv->bssid)) ||
773                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
774                                       && !compare_ether_addr(header->addr3,
775                                                              priv->bssid)))) {
776                                         struct ieee80211_mgmt *mgmt =
777                                             (struct ieee80211_mgmt *)header;
778                                         __le32 *pos;
779                                         pos =
780                                             (__le32 *) & mgmt->u.beacon.
781                                             timestamp;
782                                         priv->timestamp0 = le32_to_cpu(pos[0]);
783                                         priv->timestamp1 = le32_to_cpu(pos[1]);
784                                         priv->beacon_int = le16_to_cpu(
785                                             mgmt->u.beacon.beacon_int);
786                                         if (priv->call_post_assoc_from_beacon &&
787                                             (priv->iw_mode ==
788                                                 IEEE80211_IF_TYPE_STA))
789                                                 queue_work(priv->workqueue,
790                                                     &priv->post_associate.work);
791
792                                         priv->call_post_assoc_from_beacon = 0;
793                                 }
794
795                                 break;
796                         }
797
798                 case IEEE80211_STYPE_ACTION:
799                         /* TODO: Parse 802.11h frames for CSA... */
800                         break;
801
802                         /*
803                          * TODO: Use the new callback function from
804                          * mac80211 instead of sniffing these packets.
805                          */
806                 case IEEE80211_STYPE_ASSOC_RESP:
807                 case IEEE80211_STYPE_REASSOC_RESP:{
808                                 struct ieee80211_mgmt *mgnt =
809                                     (struct ieee80211_mgmt *)header;
810
811                                 /* We have just associated, give some
812                                  * time for the 4-way handshake if
813                                  * any. Don't start scan too early. */
814                                 priv->next_scan_jiffies = jiffies +
815                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
816
817                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
818                                                   le16_to_cpu(mgnt->u.
819                                                               assoc_resp.aid));
820                                 priv->assoc_capability =
821                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
822                                 if (priv->beacon_int)
823                                         queue_work(priv->workqueue,
824                                             &priv->post_associate.work);
825                                 else
826                                         priv->call_post_assoc_from_beacon = 1;
827                                 break;
828                         }
829
830                 case IEEE80211_STYPE_PROBE_REQ:{
831                                 DECLARE_MAC_BUF(mac1);
832                                 DECLARE_MAC_BUF(mac2);
833                                 DECLARE_MAC_BUF(mac3);
834                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
835                                         IWL_DEBUG_DROP
836                                             ("Dropping (non network): %s"
837                                              ", %s, %s\n",
838                                              print_mac(mac1, header->addr1),
839                                              print_mac(mac2, header->addr2),
840                                              print_mac(mac3, header->addr3));
841                                 return;
842                         }
843                 }
844
845                 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
846                 break;
847
848         case IEEE80211_FTYPE_CTL:
849                 break;
850
851         case IEEE80211_FTYPE_DATA: {
852                 DECLARE_MAC_BUF(mac1);
853                 DECLARE_MAC_BUF(mac2);
854                 DECLARE_MAC_BUF(mac3);
855
856                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
857                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
858                                        print_mac(mac1, header->addr1),
859                                        print_mac(mac2, header->addr2),
860                                        print_mac(mac3, header->addr3));
861                 else
862                         iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
863                 break;
864         }
865         }
866 }
867
868 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
869                                  dma_addr_t addr, u16 len)
870 {
871         int count;
872         u32 pad;
873         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
874
875         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
876         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
877
878         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
879                 IWL_ERROR("Error can not send more than %d chunks\n",
880                           NUM_TFD_CHUNKS);
881                 return -EINVAL;
882         }
883
884         tfd->pa[count].addr = cpu_to_le32(addr);
885         tfd->pa[count].len = cpu_to_le32(len);
886
887         count++;
888
889         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
890                                          TFD_CTL_PAD_SET(pad));
891
892         return 0;
893 }
894
895 /**
896  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
897  *
898  * Does NOT advance any indexes
899  */
900 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
901 {
902         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
903         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
904         struct pci_dev *dev = priv->pci_dev;
905         int i;
906         int counter;
907
908         /* classify bd */
909         if (txq->q.id == IWL_CMD_QUEUE_NUM)
910                 /* nothing to cleanup after for host commands */
911                 return 0;
912
913         /* sanity check */
914         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
915         if (counter > NUM_TFD_CHUNKS) {
916                 IWL_ERROR("Too many chunks: %i\n", counter);
917                 /* @todo issue fatal error, it is quite serious situation */
918                 return 0;
919         }
920
921         /* unmap chunks if any */
922
923         for (i = 1; i < counter; i++) {
924                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
925                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
926                 if (txq->txb[txq->q.read_ptr].skb[0]) {
927                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
928                         if (txq->txb[txq->q.read_ptr].skb[0]) {
929                                 /* Can be called from interrupt context */
930                                 dev_kfree_skb_any(skb);
931                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
932                         }
933                 }
934         }
935         return 0;
936 }
937
938 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
939 {
940         int i;
941         int ret = IWL_INVALID_STATION;
942         unsigned long flags;
943         DECLARE_MAC_BUF(mac);
944
945         spin_lock_irqsave(&priv->sta_lock, flags);
946         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
947                 if ((priv->stations[i].used) &&
948                     (!compare_ether_addr
949                      (priv->stations[i].sta.sta.addr, addr))) {
950                         ret = i;
951                         goto out;
952                 }
953
954         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
955                        print_mac(mac, addr), priv->num_stations);
956  out:
957         spin_unlock_irqrestore(&priv->sta_lock, flags);
958         return ret;
959 }
960
961 /**
962  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
963  *
964 */
965 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
966                               struct iwl3945_cmd *cmd,
967                               struct ieee80211_tx_info *info,
968                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
969 {
970         unsigned long flags;
971         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
972         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
973         u16 rate_mask;
974         int rate;
975         u8 rts_retry_limit;
976         u8 data_retry_limit;
977         __le32 tx_flags;
978         __le16 fc = hdr->frame_control;
979
980         rate = iwl3945_rates[rate_index].plcp;
981         tx_flags = cmd->cmd.tx.tx_flags;
982
983         /* We need to figure out how to get the sta->supp_rates while
984          * in this running context */
985         rate_mask = IWL_RATES_MASK;
986
987         spin_lock_irqsave(&priv->sta_lock, flags);
988
989         priv->stations[sta_id].current_rate.rate_n_flags = rate;
990
991         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
992             (sta_id != priv->hw_setting.bcast_sta_id) &&
993                 (sta_id != IWL_MULTICAST_ID))
994                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
995
996         spin_unlock_irqrestore(&priv->sta_lock, flags);
997
998         if (tx_id >= IWL_CMD_QUEUE_NUM)
999                 rts_retry_limit = 3;
1000         else
1001                 rts_retry_limit = 7;
1002
1003         if (ieee80211_is_probe_resp(fc)) {
1004                 data_retry_limit = 3;
1005                 if (data_retry_limit < rts_retry_limit)
1006                         rts_retry_limit = data_retry_limit;
1007         } else
1008                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1009
1010         if (priv->data_retry_limit != -1)
1011                 data_retry_limit = priv->data_retry_limit;
1012
1013         if (ieee80211_is_mgmt(fc)) {
1014                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1015                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1016                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1017                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1018                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1019                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1020                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1021                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
1022                         }
1023                         break;
1024                 default:
1025                         break;
1026                 }
1027         }
1028
1029         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1030         cmd->cmd.tx.data_retry_limit = data_retry_limit;
1031         cmd->cmd.tx.rate = rate;
1032         cmd->cmd.tx.tx_flags = tx_flags;
1033
1034         /* OFDM */
1035         cmd->cmd.tx.supp_rates[0] =
1036            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1037
1038         /* CCK */
1039         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1040
1041         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1042                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1043                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1044                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1045 }
1046
1047 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1048 {
1049         unsigned long flags_spin;
1050         struct iwl3945_station_entry *station;
1051
1052         if (sta_id == IWL_INVALID_STATION)
1053                 return IWL_INVALID_STATION;
1054
1055         spin_lock_irqsave(&priv->sta_lock, flags_spin);
1056         station = &priv->stations[sta_id];
1057
1058         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1059         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1060         station->current_rate.rate_n_flags = tx_rate;
1061         station->sta.mode = STA_CONTROL_MODIFY_MSK;
1062
1063         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1064
1065         iwl3945_send_add_station(priv, &station->sta, flags);
1066         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1067                         sta_id, tx_rate);
1068         return sta_id;
1069 }
1070
1071 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1072 {
1073         int rc;
1074         unsigned long flags;
1075
1076         spin_lock_irqsave(&priv->lock, flags);
1077         rc = iwl3945_grab_nic_access(priv);
1078         if (rc) {
1079                 spin_unlock_irqrestore(&priv->lock, flags);
1080                 return rc;
1081         }
1082
1083         if (!pwr_max) {
1084                 u32 val;
1085
1086                 rc = pci_read_config_dword(priv->pci_dev,
1087                                 PCI_POWER_SOURCE, &val);
1088                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1089                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1090                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1091                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
1092                         iwl3945_release_nic_access(priv);
1093
1094                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
1095                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1096                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1097                 } else
1098                         iwl3945_release_nic_access(priv);
1099         } else {
1100                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1101                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1102                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
1103
1104                 iwl3945_release_nic_access(priv);
1105                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1106                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
1107         }
1108         spin_unlock_irqrestore(&priv->lock, flags);
1109
1110         return rc;
1111 }
1112
1113 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1114 {
1115         int rc;
1116         unsigned long flags;
1117
1118         spin_lock_irqsave(&priv->lock, flags);
1119         rc = iwl3945_grab_nic_access(priv);
1120         if (rc) {
1121                 spin_unlock_irqrestore(&priv->lock, flags);
1122                 return rc;
1123         }
1124
1125         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1126         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1127                              priv->hw_setting.shared_phys +
1128                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1129         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1130         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1131                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1132                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1133                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1134                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1135                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1136                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1137                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1138                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1139
1140         /* fake read to flush all prev I/O */
1141         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1142
1143         iwl3945_release_nic_access(priv);
1144         spin_unlock_irqrestore(&priv->lock, flags);
1145
1146         return 0;
1147 }
1148
1149 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1150 {
1151         int rc;
1152         unsigned long flags;
1153
1154         spin_lock_irqsave(&priv->lock, flags);
1155         rc = iwl3945_grab_nic_access(priv);
1156         if (rc) {
1157                 spin_unlock_irqrestore(&priv->lock, flags);
1158                 return rc;
1159         }
1160
1161         /* bypass mode */
1162         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1163
1164         /* RA 0 is active */
1165         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1166
1167         /* all 6 fifo are active */
1168         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1169
1170         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1171         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1172         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1173         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1174
1175         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1176                              priv->hw_setting.shared_phys);
1177
1178         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1179                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1180                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1181                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1182                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1183                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1184                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1185                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1186
1187         iwl3945_release_nic_access(priv);
1188         spin_unlock_irqrestore(&priv->lock, flags);
1189
1190         return 0;
1191 }
1192
1193 /**
1194  * iwl3945_txq_ctx_reset - Reset TX queue context
1195  *
1196  * Destroys all DMA structures and initialize them again
1197  */
1198 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1199 {
1200         int rc;
1201         int txq_id, slots_num;
1202
1203         iwl3945_hw_txq_ctx_free(priv);
1204
1205         /* Tx CMD queue */
1206         rc = iwl3945_tx_reset(priv);
1207         if (rc)
1208                 goto error;
1209
1210         /* Tx queue(s) */
1211         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1212                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1213                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1214                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1215                                 txq_id);
1216                 if (rc) {
1217                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1218                         goto error;
1219                 }
1220         }
1221
1222         return rc;
1223
1224  error:
1225         iwl3945_hw_txq_ctx_free(priv);
1226         return rc;
1227 }
1228
1229 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1230 {
1231         u8 rev_id;
1232         int rc;
1233         unsigned long flags;
1234         struct iwl3945_rx_queue *rxq = &priv->rxq;
1235
1236         iwl3945_power_init_handle(priv);
1237
1238         spin_lock_irqsave(&priv->lock, flags);
1239         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1240         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1241                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1242
1243         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1244         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1245                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1246                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1247         if (rc < 0) {
1248                 spin_unlock_irqrestore(&priv->lock, flags);
1249                 IWL_DEBUG_INFO("Failed to init the card\n");
1250                 return rc;
1251         }
1252
1253         rc = iwl3945_grab_nic_access(priv);
1254         if (rc) {
1255                 spin_unlock_irqrestore(&priv->lock, flags);
1256                 return rc;
1257         }
1258         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1259                                  APMG_CLK_VAL_DMA_CLK_RQT |
1260                                  APMG_CLK_VAL_BSM_CLK_RQT);
1261         udelay(20);
1262         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1263                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1264         iwl3945_release_nic_access(priv);
1265         spin_unlock_irqrestore(&priv->lock, flags);
1266
1267         /* Determine HW type */
1268         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1269         if (rc)
1270                 return rc;
1271         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1272
1273         iwl3945_nic_set_pwr_src(priv, 1);
1274         spin_lock_irqsave(&priv->lock, flags);
1275
1276         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1277                 IWL_DEBUG_INFO("RTP type \n");
1278         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1279                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1280                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1281                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1282         } else {
1283                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1284                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1285                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1286         }
1287
1288         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1289                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1290                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1291                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1292         } else
1293                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1294
1295         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1296                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1297                                priv->eeprom.board_revision);
1298                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1299                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1300         } else {
1301                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1302                                priv->eeprom.board_revision);
1303                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1304                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1305         }
1306
1307         if (priv->eeprom.almgor_m_version <= 1) {
1308                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1309                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1310                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1311                                priv->eeprom.almgor_m_version);
1312         } else {
1313                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1314                                priv->eeprom.almgor_m_version);
1315                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1316                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1317         }
1318         spin_unlock_irqrestore(&priv->lock, flags);
1319
1320         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1321                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1322
1323         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1324                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1325
1326         /* Allocate the RX queue, or reset if it is already allocated */
1327         if (!rxq->bd) {
1328                 rc = iwl3945_rx_queue_alloc(priv);
1329                 if (rc) {
1330                         IWL_ERROR("Unable to initialize Rx queue\n");
1331                         return -ENOMEM;
1332                 }
1333         } else
1334                 iwl3945_rx_queue_reset(priv, rxq);
1335
1336         iwl3945_rx_replenish(priv);
1337
1338         iwl3945_rx_init(priv, rxq);
1339
1340         spin_lock_irqsave(&priv->lock, flags);
1341
1342         /* Look at using this instead:
1343         rxq->need_update = 1;
1344         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1345         */
1346
1347         rc = iwl3945_grab_nic_access(priv);
1348         if (rc) {
1349                 spin_unlock_irqrestore(&priv->lock, flags);
1350                 return rc;
1351         }
1352         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1353         iwl3945_release_nic_access(priv);
1354
1355         spin_unlock_irqrestore(&priv->lock, flags);
1356
1357         rc = iwl3945_txq_ctx_reset(priv);
1358         if (rc)
1359                 return rc;
1360
1361         set_bit(STATUS_INIT, &priv->status);
1362
1363         return 0;
1364 }
1365
1366 /**
1367  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1368  *
1369  * Destroy all TX DMA queues and structures
1370  */
1371 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1372 {
1373         int txq_id;
1374
1375         /* Tx queues */
1376         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1377                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1378 }
1379
1380 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1381 {
1382         int queue;
1383         unsigned long flags;
1384
1385         spin_lock_irqsave(&priv->lock, flags);
1386         if (iwl3945_grab_nic_access(priv)) {
1387                 spin_unlock_irqrestore(&priv->lock, flags);
1388                 iwl3945_hw_txq_ctx_free(priv);
1389                 return;
1390         }
1391
1392         /* stop SCD */
1393         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1394
1395         /* reset TFD queues */
1396         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1397                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1398                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1399                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1400                                 1000);
1401         }
1402
1403         iwl3945_release_nic_access(priv);
1404         spin_unlock_irqrestore(&priv->lock, flags);
1405
1406         iwl3945_hw_txq_ctx_free(priv);
1407 }
1408
1409 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1410 {
1411         int rc = 0;
1412         u32 reg_val;
1413         unsigned long flags;
1414
1415         spin_lock_irqsave(&priv->lock, flags);
1416
1417         /* set stop master bit */
1418         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1419
1420         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1421
1422         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1423             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1424                 IWL_DEBUG_INFO("Card in power save, master is already "
1425                                "stopped\n");
1426         else {
1427                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1428                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1429                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1430                 if (rc < 0) {
1431                         spin_unlock_irqrestore(&priv->lock, flags);
1432                         return rc;
1433                 }
1434         }
1435
1436         spin_unlock_irqrestore(&priv->lock, flags);
1437         IWL_DEBUG_INFO("stop master\n");
1438
1439         return rc;
1440 }
1441
1442 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1443 {
1444         int rc;
1445         unsigned long flags;
1446
1447         iwl3945_hw_nic_stop_master(priv);
1448
1449         spin_lock_irqsave(&priv->lock, flags);
1450
1451         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1452
1453         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1454                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1455                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1456
1457         rc = iwl3945_grab_nic_access(priv);
1458         if (!rc) {
1459                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1460                                          APMG_CLK_VAL_BSM_CLK_RQT);
1461
1462                 udelay(10);
1463
1464                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1465                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1466
1467                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1468                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1469                                         0xFFFFFFFF);
1470
1471                 /* enable DMA */
1472                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1473                                          APMG_CLK_VAL_DMA_CLK_RQT |
1474                                          APMG_CLK_VAL_BSM_CLK_RQT);
1475                 udelay(10);
1476
1477                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1478                                 APMG_PS_CTRL_VAL_RESET_REQ);
1479                 udelay(5);
1480                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1481                                 APMG_PS_CTRL_VAL_RESET_REQ);
1482                 iwl3945_release_nic_access(priv);
1483         }
1484
1485         /* Clear the 'host command active' bit... */
1486         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1487
1488         wake_up_interruptible(&priv->wait_command_queue);
1489         spin_unlock_irqrestore(&priv->lock, flags);
1490
1491         return rc;
1492 }
1493
1494 /**
1495  * iwl3945_hw_reg_adjust_power_by_temp
1496  * return index delta into power gain settings table
1497 */
1498 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1499 {
1500         return (new_reading - old_reading) * (-11) / 100;
1501 }
1502
1503 /**
1504  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1505  */
1506 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1507 {
1508         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1509 }
1510
1511 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1512 {
1513         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1514 }
1515
1516 /**
1517  * iwl3945_hw_reg_txpower_get_temperature
1518  * get the current temperature by reading from NIC
1519 */
1520 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1521 {
1522         int temperature;
1523
1524         temperature = iwl3945_hw_get_temperature(priv);
1525
1526         /* driver's okay range is -260 to +25.
1527          *   human readable okay range is 0 to +285 */
1528         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1529
1530         /* handle insane temp reading */
1531         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1532                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1533
1534                 /* if really really hot(?),
1535                  *   substitute the 3rd band/group's temp measured at factory */
1536                 if (priv->last_temperature > 100)
1537                         temperature = priv->eeprom.groups[2].temperature;
1538                 else /* else use most recent "sane" value from driver */
1539                         temperature = priv->last_temperature;
1540         }
1541
1542         return temperature;     /* raw, not "human readable" */
1543 }
1544
1545 /* Adjust Txpower only if temperature variance is greater than threshold.
1546  *
1547  * Both are lower than older versions' 9 degrees */
1548 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1549
1550 /**
1551  * is_temp_calib_needed - determines if new calibration is needed
1552  *
1553  * records new temperature in tx_mgr->temperature.
1554  * replaces tx_mgr->last_temperature *only* if calib needed
1555  *    (assumes caller will actually do the calibration!). */
1556 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1557 {
1558         int temp_diff;
1559
1560         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1561         temp_diff = priv->temperature - priv->last_temperature;
1562
1563         /* get absolute value */
1564         if (temp_diff < 0) {
1565                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1566                 temp_diff = -temp_diff;
1567         } else if (temp_diff == 0)
1568                 IWL_DEBUG_POWER("Same temp,\n");
1569         else
1570                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1571
1572         /* if we don't need calibration, *don't* update last_temperature */
1573         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1574                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1575                 return 0;
1576         }
1577
1578         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1579
1580         /* assume that caller will actually do calib ...
1581          *   update the "last temperature" value */
1582         priv->last_temperature = priv->temperature;
1583         return 1;
1584 }
1585
1586 #define IWL_MAX_GAIN_ENTRIES 78
1587 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1588 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1589
1590 /* radio and DSP power table, each step is 1/2 dB.
1591  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1592 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1593         {
1594          {251, 127},            /* 2.4 GHz, highest power */
1595          {251, 127},
1596          {251, 127},
1597          {251, 127},
1598          {251, 125},
1599          {251, 110},
1600          {251, 105},
1601          {251, 98},
1602          {187, 125},
1603          {187, 115},
1604          {187, 108},
1605          {187, 99},
1606          {243, 119},
1607          {243, 111},
1608          {243, 105},
1609          {243, 97},
1610          {243, 92},
1611          {211, 106},
1612          {211, 100},
1613          {179, 120},
1614          {179, 113},
1615          {179, 107},
1616          {147, 125},
1617          {147, 119},
1618          {147, 112},
1619          {147, 106},
1620          {147, 101},
1621          {147, 97},
1622          {147, 91},
1623          {115, 107},
1624          {235, 121},
1625          {235, 115},
1626          {235, 109},
1627          {203, 127},
1628          {203, 121},
1629          {203, 115},
1630          {203, 108},
1631          {203, 102},
1632          {203, 96},
1633          {203, 92},
1634          {171, 110},
1635          {171, 104},
1636          {171, 98},
1637          {139, 116},
1638          {227, 125},
1639          {227, 119},
1640          {227, 113},
1641          {227, 107},
1642          {227, 101},
1643          {227, 96},
1644          {195, 113},
1645          {195, 106},
1646          {195, 102},
1647          {195, 95},
1648          {163, 113},
1649          {163, 106},
1650          {163, 102},
1651          {163, 95},
1652          {131, 113},
1653          {131, 106},
1654          {131, 102},
1655          {131, 95},
1656          {99, 113},
1657          {99, 106},
1658          {99, 102},
1659          {99, 95},
1660          {67, 113},
1661          {67, 106},
1662          {67, 102},
1663          {67, 95},
1664          {35, 113},
1665          {35, 106},
1666          {35, 102},
1667          {35, 95},
1668          {3, 113},
1669          {3, 106},
1670          {3, 102},
1671          {3, 95} },             /* 2.4 GHz, lowest power */
1672         {
1673          {251, 127},            /* 5.x GHz, highest power */
1674          {251, 120},
1675          {251, 114},
1676          {219, 119},
1677          {219, 101},
1678          {187, 113},
1679          {187, 102},
1680          {155, 114},
1681          {155, 103},
1682          {123, 117},
1683          {123, 107},
1684          {123, 99},
1685          {123, 92},
1686          {91, 108},
1687          {59, 125},
1688          {59, 118},
1689          {59, 109},
1690          {59, 102},
1691          {59, 96},
1692          {59, 90},
1693          {27, 104},
1694          {27, 98},
1695          {27, 92},
1696          {115, 118},
1697          {115, 111},
1698          {115, 104},
1699          {83, 126},
1700          {83, 121},
1701          {83, 113},
1702          {83, 105},
1703          {83, 99},
1704          {51, 118},
1705          {51, 111},
1706          {51, 104},
1707          {51, 98},
1708          {19, 116},
1709          {19, 109},
1710          {19, 102},
1711          {19, 98},
1712          {19, 93},
1713          {171, 113},
1714          {171, 107},
1715          {171, 99},
1716          {139, 120},
1717          {139, 113},
1718          {139, 107},
1719          {139, 99},
1720          {107, 120},
1721          {107, 113},
1722          {107, 107},
1723          {107, 99},
1724          {75, 120},
1725          {75, 113},
1726          {75, 107},
1727          {75, 99},
1728          {43, 120},
1729          {43, 113},
1730          {43, 107},
1731          {43, 99},
1732          {11, 120},
1733          {11, 113},
1734          {11, 107},
1735          {11, 99},
1736          {131, 107},
1737          {131, 99},
1738          {99, 120},
1739          {99, 113},
1740          {99, 107},
1741          {99, 99},
1742          {67, 120},
1743          {67, 113},
1744          {67, 107},
1745          {67, 99},
1746          {35, 120},
1747          {35, 113},
1748          {35, 107},
1749          {35, 99},
1750          {3, 120} }             /* 5.x GHz, lowest power */
1751 };
1752
1753 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1754 {
1755         if (index < 0)
1756                 return 0;
1757         if (index >= IWL_MAX_GAIN_ENTRIES)
1758                 return IWL_MAX_GAIN_ENTRIES - 1;
1759         return (u8) index;
1760 }
1761
1762 /* Kick off thermal recalibration check every 60 seconds */
1763 #define REG_RECALIB_PERIOD (60)
1764
1765 /**
1766  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1767  *
1768  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1769  * or 6 Mbit (OFDM) rates.
1770  */
1771 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1772                                s32 rate_index, const s8 *clip_pwrs,
1773                                struct iwl3945_channel_info *ch_info,
1774                                int band_index)
1775 {
1776         struct iwl3945_scan_power_info *scan_power_info;
1777         s8 power;
1778         u8 power_index;
1779
1780         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1781
1782         /* use this channel group's 6Mbit clipping/saturation pwr,
1783          *   but cap at regulatory scan power restriction (set during init
1784          *   based on eeprom channel data) for this channel.  */
1785         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1786
1787         /* further limit to user's max power preference.
1788          * FIXME:  Other spectrum management power limitations do not
1789          *   seem to apply?? */
1790         power = min(power, priv->user_txpower_limit);
1791         scan_power_info->requested_power = power;
1792
1793         /* find difference between new scan *power* and current "normal"
1794          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1795          *   current "normal" temperature-compensated Tx power *index* for
1796          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1797          *   *index*. */
1798         power_index = ch_info->power_info[rate_index].power_table_index
1799             - (power - ch_info->power_info
1800                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1801
1802         /* store reference index that we use when adjusting *all* scan
1803          *   powers.  So we can accommodate user (all channel) or spectrum
1804          *   management (single channel) power changes "between" temperature
1805          *   feedback compensation procedures.
1806          * don't force fit this reference index into gain table; it may be a
1807          *   negative number.  This will help avoid errors when we're at
1808          *   the lower bounds (highest gains, for warmest temperatures)
1809          *   of the table. */
1810
1811         /* don't exceed table bounds for "real" setting */
1812         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1813
1814         scan_power_info->power_table_index = power_index;
1815         scan_power_info->tpc.tx_gain =
1816             power_gain_table[band_index][power_index].tx_gain;
1817         scan_power_info->tpc.dsp_atten =
1818             power_gain_table[band_index][power_index].dsp_atten;
1819 }
1820
1821 /**
1822  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1823  *
1824  * Configures power settings for all rates for the current channel,
1825  * using values from channel info struct, and send to NIC
1826  */
1827 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1828 {
1829         int rate_idx, i;
1830         const struct iwl3945_channel_info *ch_info = NULL;
1831         struct iwl3945_txpowertable_cmd txpower = {
1832                 .channel = priv->active_rxon.channel,
1833         };
1834
1835         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1836         ch_info = iwl3945_get_channel_info(priv,
1837                                        priv->band,
1838                                        le16_to_cpu(priv->active_rxon.channel));
1839         if (!ch_info) {
1840                 IWL_ERROR
1841                     ("Failed to get channel info for channel %d [%d]\n",
1842                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1843                 return -EINVAL;
1844         }
1845
1846         if (!is_channel_valid(ch_info)) {
1847                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1848                                 "non-Tx channel.\n");
1849                 return 0;
1850         }
1851
1852         /* fill cmd with power settings for all rates for current channel */
1853         /* Fill OFDM rate */
1854         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1855              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1856
1857                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1858                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1859
1860                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1861                                 le16_to_cpu(txpower.channel),
1862                                 txpower.band,
1863                                 txpower.power[i].tpc.tx_gain,
1864                                 txpower.power[i].tpc.dsp_atten,
1865                                 txpower.power[i].rate);
1866         }
1867         /* Fill CCK rates */
1868         for (rate_idx = IWL_FIRST_CCK_RATE;
1869              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1870                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1871                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1872
1873                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1874                                 le16_to_cpu(txpower.channel),
1875                                 txpower.band,
1876                                 txpower.power[i].tpc.tx_gain,
1877                                 txpower.power[i].tpc.dsp_atten,
1878                                 txpower.power[i].rate);
1879         }
1880
1881         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1882                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1883
1884 }
1885
1886 /**
1887  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1888  * @ch_info: Channel to update.  Uses power_info.requested_power.
1889  *
1890  * Replace requested_power and base_power_index ch_info fields for
1891  * one channel.
1892  *
1893  * Called if user or spectrum management changes power preferences.
1894  * Takes into account h/w and modulation limitations (clip power).
1895  *
1896  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1897  *
1898  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1899  *       properly fill out the scan powers, and actual h/w gain settings,
1900  *       and send changes to NIC
1901  */
1902 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1903                              struct iwl3945_channel_info *ch_info)
1904 {
1905         struct iwl3945_channel_power_info *power_info;
1906         int power_changed = 0;
1907         int i;
1908         const s8 *clip_pwrs;
1909         int power;
1910
1911         /* Get this chnlgrp's rate-to-max/clip-powers table */
1912         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1913
1914         /* Get this channel's rate-to-current-power settings table */
1915         power_info = ch_info->power_info;
1916
1917         /* update OFDM Txpower settings */
1918         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1919              i++, ++power_info) {
1920                 int delta_idx;
1921
1922                 /* limit new power to be no more than h/w capability */
1923                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1924                 if (power == power_info->requested_power)
1925                         continue;
1926
1927                 /* find difference between old and new requested powers,
1928                  *    update base (non-temp-compensated) power index */
1929                 delta_idx = (power - power_info->requested_power) * 2;
1930                 power_info->base_power_index -= delta_idx;
1931
1932                 /* save new requested power value */
1933                 power_info->requested_power = power;
1934
1935                 power_changed = 1;
1936         }
1937
1938         /* update CCK Txpower settings, based on OFDM 12M setting ...
1939          *    ... all CCK power settings for a given channel are the *same*. */
1940         if (power_changed) {
1941                 power =
1942                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1943                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1944
1945                 /* do all CCK rates' iwl3945_channel_power_info structures */
1946                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1947                         power_info->requested_power = power;
1948                         power_info->base_power_index =
1949                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1950                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1951                         ++power_info;
1952                 }
1953         }
1954
1955         return 0;
1956 }
1957
1958 /**
1959  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1960  *
1961  * NOTE: Returned power limit may be less (but not more) than requested,
1962  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1963  *       (no consideration for h/w clipping limitations).
1964  */
1965 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1966 {
1967         s8 max_power;
1968
1969 #if 0
1970         /* if we're using TGd limits, use lower of TGd or EEPROM */
1971         if (ch_info->tgd_data.max_power != 0)
1972                 max_power = min(ch_info->tgd_data.max_power,
1973                                 ch_info->eeprom.max_power_avg);
1974
1975         /* else just use EEPROM limits */
1976         else
1977 #endif
1978                 max_power = ch_info->eeprom.max_power_avg;
1979
1980         return min(max_power, ch_info->max_power_avg);
1981 }
1982
1983 /**
1984  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1985  *
1986  * Compensate txpower settings of *all* channels for temperature.
1987  * This only accounts for the difference between current temperature
1988  *   and the factory calibration temperatures, and bases the new settings
1989  *   on the channel's base_power_index.
1990  *
1991  * If RxOn is "associated", this sends the new Txpower to NIC!
1992  */
1993 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1994 {
1995         struct iwl3945_channel_info *ch_info = NULL;
1996         int delta_index;
1997         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1998         u8 a_band;
1999         u8 rate_index;
2000         u8 scan_tbl_index;
2001         u8 i;
2002         int ref_temp;
2003         int temperature = priv->temperature;
2004
2005         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
2006         for (i = 0; i < priv->channel_count; i++) {
2007                 ch_info = &priv->channel_info[i];
2008                 a_band = is_channel_a_band(ch_info);
2009
2010                 /* Get this chnlgrp's factory calibration temperature */
2011                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2012                     temperature;
2013
2014                 /* get power index adjustment based on curr and factory
2015                  * temps */
2016                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2017                                                               ref_temp);
2018
2019                 /* set tx power value for all rates, OFDM and CCK */
2020                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2021                      rate_index++) {
2022                         int power_idx =
2023                             ch_info->power_info[rate_index].base_power_index;
2024
2025                         /* temperature compensate */
2026                         power_idx += delta_index;
2027
2028                         /* stay within table range */
2029                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2030                         ch_info->power_info[rate_index].
2031                             power_table_index = (u8) power_idx;
2032                         ch_info->power_info[rate_index].tpc =
2033                             power_gain_table[a_band][power_idx];
2034                 }
2035
2036                 /* Get this chnlgrp's rate-to-max/clip-powers table */
2037                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2038
2039                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2040                 for (scan_tbl_index = 0;
2041                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2042                         s32 actual_index = (scan_tbl_index == 0) ?
2043                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2044                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2045                                            actual_index, clip_pwrs,
2046                                            ch_info, a_band);
2047                 }
2048         }
2049
2050         /* send Txpower command for current channel to ucode */
2051         return iwl3945_hw_reg_send_txpower(priv);
2052 }
2053
2054 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2055 {
2056         struct iwl3945_channel_info *ch_info;
2057         s8 max_power;
2058         u8 a_band;
2059         u8 i;
2060
2061         if (priv->user_txpower_limit == power) {
2062                 IWL_DEBUG_POWER("Requested Tx power same as current "
2063                                 "limit: %ddBm.\n", power);
2064                 return 0;
2065         }
2066
2067         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2068         priv->user_txpower_limit = power;
2069
2070         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2071
2072         for (i = 0; i < priv->channel_count; i++) {
2073                 ch_info = &priv->channel_info[i];
2074                 a_band = is_channel_a_band(ch_info);
2075
2076                 /* find minimum power of all user and regulatory constraints
2077                  *    (does not consider h/w clipping limitations) */
2078                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2079                 max_power = min(power, max_power);
2080                 if (max_power != ch_info->curr_txpow) {
2081                         ch_info->curr_txpow = max_power;
2082
2083                         /* this considers the h/w clipping limitations */
2084                         iwl3945_hw_reg_set_new_power(priv, ch_info);
2085                 }
2086         }
2087
2088         /* update txpower settings for all channels,
2089          *   send to NIC if associated. */
2090         is_temp_calib_needed(priv);
2091         iwl3945_hw_reg_comp_txpower_temp(priv);
2092
2093         return 0;
2094 }
2095
2096 /* will add 3945 channel switch cmd handling later */
2097 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2098 {
2099         return 0;
2100 }
2101
2102 /**
2103  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2104  *
2105  * -- reset periodic timer
2106  * -- see if temp has changed enough to warrant re-calibration ... if so:
2107  *     -- correct coeffs for temp (can reset temp timer)
2108  *     -- save this temp as "last",
2109  *     -- send new set of gain settings to NIC
2110  * NOTE:  This should continue working, even when we're not associated,
2111  *   so we can keep our internal table of scan powers current. */
2112 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2113 {
2114         /* This will kick in the "brute force"
2115          * iwl3945_hw_reg_comp_txpower_temp() below */
2116         if (!is_temp_calib_needed(priv))
2117                 goto reschedule;
2118
2119         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2120          * This is based *only* on current temperature,
2121          * ignoring any previous power measurements */
2122         iwl3945_hw_reg_comp_txpower_temp(priv);
2123
2124  reschedule:
2125         queue_delayed_work(priv->workqueue,
2126                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2127 }
2128
2129 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2130 {
2131         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2132                                              thermal_periodic.work);
2133
2134         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2135                 return;
2136
2137         mutex_lock(&priv->mutex);
2138         iwl3945_reg_txpower_periodic(priv);
2139         mutex_unlock(&priv->mutex);
2140 }
2141
2142 /**
2143  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2144  *                                 for the channel.
2145  *
2146  * This function is used when initializing channel-info structs.
2147  *
2148  * NOTE: These channel groups do *NOT* match the bands above!
2149  *       These channel groups are based on factory-tested channels;
2150  *       on A-band, EEPROM's "group frequency" entries represent the top
2151  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2152  */
2153 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2154                                        const struct iwl3945_channel_info *ch_info)
2155 {
2156         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2157         u8 group;
2158         u16 group_index = 0;    /* based on factory calib frequencies */
2159         u8 grp_channel;
2160
2161         /* Find the group index for the channel ... don't use index 1(?) */
2162         if (is_channel_a_band(ch_info)) {
2163                 for (group = 1; group < 5; group++) {
2164                         grp_channel = ch_grp[group].group_channel;
2165                         if (ch_info->channel <= grp_channel) {
2166                                 group_index = group;
2167                                 break;
2168                         }
2169                 }
2170                 /* group 4 has a few channels *above* its factory cal freq */
2171                 if (group == 5)
2172                         group_index = 4;
2173         } else
2174                 group_index = 0;        /* 2.4 GHz, group 0 */
2175
2176         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2177                         group_index);
2178         return group_index;
2179 }
2180
2181 /**
2182  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2183  *
2184  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2185  *   into radio/DSP gain settings table for requested power.
2186  */
2187 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2188                                        s8 requested_power,
2189                                        s32 setting_index, s32 *new_index)
2190 {
2191         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2192         s32 index0, index1;
2193         s32 power = 2 * requested_power;
2194         s32 i;
2195         const struct iwl3945_eeprom_txpower_sample *samples;
2196         s32 gains0, gains1;
2197         s32 res;
2198         s32 denominator;
2199
2200         chnl_grp = &priv->eeprom.groups[setting_index];
2201         samples = chnl_grp->samples;
2202         for (i = 0; i < 5; i++) {
2203                 if (power == samples[i].power) {
2204                         *new_index = samples[i].gain_index;
2205                         return 0;
2206                 }
2207         }
2208
2209         if (power > samples[1].power) {
2210                 index0 = 0;
2211                 index1 = 1;
2212         } else if (power > samples[2].power) {
2213                 index0 = 1;
2214                 index1 = 2;
2215         } else if (power > samples[3].power) {
2216                 index0 = 2;
2217                 index1 = 3;
2218         } else {
2219                 index0 = 3;
2220                 index1 = 4;
2221         }
2222
2223         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2224         if (denominator == 0)
2225                 return -EINVAL;
2226         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2227         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2228         res = gains0 + (gains1 - gains0) *
2229             ((s32) power - (s32) samples[index0].power) / denominator +
2230             (1 << 18);
2231         *new_index = res >> 19;
2232         return 0;
2233 }
2234
2235 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2236 {
2237         u32 i;
2238         s32 rate_index;
2239         const struct iwl3945_eeprom_txpower_group *group;
2240
2241         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2242
2243         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2244                 s8 *clip_pwrs;  /* table of power levels for each rate */
2245                 s8 satur_pwr;   /* saturation power for each chnl group */
2246                 group = &priv->eeprom.groups[i];
2247
2248                 /* sanity check on factory saturation power value */
2249                 if (group->saturation_power < 40) {
2250                         IWL_WARNING("Error: saturation power is %d, "
2251                                     "less than minimum expected 40\n",
2252                                     group->saturation_power);
2253                         return;
2254                 }
2255
2256                 /*
2257                  * Derive requested power levels for each rate, based on
2258                  *   hardware capabilities (saturation power for band).
2259                  * Basic value is 3dB down from saturation, with further
2260                  *   power reductions for highest 3 data rates.  These
2261                  *   backoffs provide headroom for high rate modulation
2262                  *   power peaks, without too much distortion (clipping).
2263                  */
2264                 /* we'll fill in this array with h/w max power levels */
2265                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2266
2267                 /* divide factory saturation power by 2 to find -3dB level */
2268                 satur_pwr = (s8) (group->saturation_power >> 1);
2269
2270                 /* fill in channel group's nominal powers for each rate */
2271                 for (rate_index = 0;
2272                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2273                         switch (rate_index) {
2274                         case IWL_RATE_36M_INDEX_TABLE:
2275                                 if (i == 0)     /* B/G */
2276                                         *clip_pwrs = satur_pwr;
2277                                 else    /* A */
2278                                         *clip_pwrs = satur_pwr - 5;
2279                                 break;
2280                         case IWL_RATE_48M_INDEX_TABLE:
2281                                 if (i == 0)
2282                                         *clip_pwrs = satur_pwr - 7;
2283                                 else
2284                                         *clip_pwrs = satur_pwr - 10;
2285                                 break;
2286                         case IWL_RATE_54M_INDEX_TABLE:
2287                                 if (i == 0)
2288                                         *clip_pwrs = satur_pwr - 9;
2289                                 else
2290                                         *clip_pwrs = satur_pwr - 12;
2291                                 break;
2292                         default:
2293                                 *clip_pwrs = satur_pwr;
2294                                 break;
2295                         }
2296                 }
2297         }
2298 }
2299
2300 /**
2301  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2302  *
2303  * Second pass (during init) to set up priv->channel_info
2304  *
2305  * Set up Tx-power settings in our channel info database for each VALID
2306  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2307  * and current temperature.
2308  *
2309  * Since this is based on current temperature (at init time), these values may
2310  * not be valid for very long, but it gives us a starting/default point,
2311  * and allows us to active (i.e. using Tx) scan.
2312  *
2313  * This does *not* write values to NIC, just sets up our internal table.
2314  */
2315 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2316 {
2317         struct iwl3945_channel_info *ch_info = NULL;
2318         struct iwl3945_channel_power_info *pwr_info;
2319         int delta_index;
2320         u8 rate_index;
2321         u8 scan_tbl_index;
2322         const s8 *clip_pwrs;    /* array of power levels for each rate */
2323         u8 gain, dsp_atten;
2324         s8 power;
2325         u8 pwr_index, base_pwr_index, a_band;
2326         u8 i;
2327         int temperature;
2328
2329         /* save temperature reference,
2330          *   so we can determine next time to calibrate */
2331         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2332         priv->last_temperature = temperature;
2333
2334         iwl3945_hw_reg_init_channel_groups(priv);
2335
2336         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2337         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2338              i++, ch_info++) {
2339                 a_band = is_channel_a_band(ch_info);
2340                 if (!is_channel_valid(ch_info))
2341                         continue;
2342
2343                 /* find this channel's channel group (*not* "band") index */
2344                 ch_info->group_index =
2345                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2346
2347                 /* Get this chnlgrp's rate->max/clip-powers table */
2348                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2349
2350                 /* calculate power index *adjustment* value according to
2351                  *  diff between current temperature and factory temperature */
2352                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2353                                 priv->eeprom.groups[ch_info->group_index].
2354                                 temperature);
2355
2356                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2357                                 ch_info->channel, delta_index, temperature +
2358                                 IWL_TEMP_CONVERT);
2359
2360                 /* set tx power value for all OFDM rates */
2361                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2362                      rate_index++) {
2363                         s32 power_idx;
2364                         int rc;
2365
2366                         /* use channel group's clip-power table,
2367                          *   but don't exceed channel's max power */
2368                         s8 pwr = min(ch_info->max_power_avg,
2369                                      clip_pwrs[rate_index]);
2370
2371                         pwr_info = &ch_info->power_info[rate_index];
2372
2373                         /* get base (i.e. at factory-measured temperature)
2374                          *    power table index for this rate's power */
2375                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2376                                                          ch_info->group_index,
2377                                                          &power_idx);
2378                         if (rc) {
2379                                 IWL_ERROR("Invalid power index\n");
2380                                 return rc;
2381                         }
2382                         pwr_info->base_power_index = (u8) power_idx;
2383
2384                         /* temperature compensate */
2385                         power_idx += delta_index;
2386
2387                         /* stay within range of gain table */
2388                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2389
2390                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2391                         pwr_info->requested_power = pwr;
2392                         pwr_info->power_table_index = (u8) power_idx;
2393                         pwr_info->tpc.tx_gain =
2394                             power_gain_table[a_band][power_idx].tx_gain;
2395                         pwr_info->tpc.dsp_atten =
2396                             power_gain_table[a_band][power_idx].dsp_atten;
2397                 }
2398
2399                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2400                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2401                 power = pwr_info->requested_power +
2402                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2403                 pwr_index = pwr_info->power_table_index +
2404                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2405                 base_pwr_index = pwr_info->base_power_index +
2406                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2407
2408                 /* stay within table range */
2409                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2410                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2411                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2412
2413                 /* fill each CCK rate's iwl3945_channel_power_info structure
2414                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2415                  * NOTE:  CCK rates start at end of OFDM rates! */
2416                 for (rate_index = 0;
2417                      rate_index < IWL_CCK_RATES; rate_index++) {
2418                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2419                         pwr_info->requested_power = power;
2420                         pwr_info->power_table_index = pwr_index;
2421                         pwr_info->base_power_index = base_pwr_index;
2422                         pwr_info->tpc.tx_gain = gain;
2423                         pwr_info->tpc.dsp_atten = dsp_atten;
2424                 }
2425
2426                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2427                 for (scan_tbl_index = 0;
2428                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2429                         s32 actual_index = (scan_tbl_index == 0) ?
2430                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2431                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2432                                 actual_index, clip_pwrs, ch_info, a_band);
2433                 }
2434         }
2435
2436         return 0;
2437 }
2438
2439 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2440 {
2441         int rc;
2442         unsigned long flags;
2443
2444         spin_lock_irqsave(&priv->lock, flags);
2445         rc = iwl3945_grab_nic_access(priv);
2446         if (rc) {
2447                 spin_unlock_irqrestore(&priv->lock, flags);
2448                 return rc;
2449         }
2450
2451         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2452         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2453         if (rc < 0)
2454                 IWL_ERROR("Can't stop Rx DMA.\n");
2455
2456         iwl3945_release_nic_access(priv);
2457         spin_unlock_irqrestore(&priv->lock, flags);
2458
2459         return 0;
2460 }
2461
2462 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2463 {
2464         int rc;
2465         unsigned long flags;
2466         int txq_id = txq->q.id;
2467
2468         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2469
2470         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2471
2472         spin_lock_irqsave(&priv->lock, flags);
2473         rc = iwl3945_grab_nic_access(priv);
2474         if (rc) {
2475                 spin_unlock_irqrestore(&priv->lock, flags);
2476                 return rc;
2477         }
2478         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2479         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2480
2481         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2482                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2483                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2484                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2485                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2486                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2487         iwl3945_release_nic_access(priv);
2488
2489         /* fake read to flush all prev. writes */
2490         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2491         spin_unlock_irqrestore(&priv->lock, flags);
2492
2493         return 0;
2494 }
2495
2496 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2497 {
2498         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2499
2500         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2501 }
2502
2503 /**
2504  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2505  */
2506 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2507 {
2508         int rc, i, index, prev_index;
2509         struct iwl3945_rate_scaling_cmd rate_cmd = {
2510                 .reserved = {0, 0, 0},
2511         };
2512         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2513
2514         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2515                 index = iwl3945_rates[i].table_rs_index;
2516
2517                 table[index].rate_n_flags =
2518                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2519                 table[index].try_cnt = priv->retry_rate;
2520                 prev_index = iwl3945_get_prev_ieee_rate(i);
2521                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2522         }
2523
2524         switch (priv->band) {
2525         case IEEE80211_BAND_5GHZ:
2526                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2527                 /* If one of the following CCK rates is used,
2528                  * have it fall back to the 6M OFDM rate */
2529                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2530                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2531
2532                 /* Don't fall back to CCK rates */
2533                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2534
2535                 /* Don't drop out of OFDM rates */
2536                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2537                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2538                 break;
2539
2540         case IEEE80211_BAND_2GHZ:
2541                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2542                 /* If an OFDM rate is used, have it fall back to the
2543                  * 1M CCK rates */
2544                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2545                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2546
2547                 /* CCK shouldn't fall back to OFDM... */
2548                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2549                 break;
2550
2551         default:
2552                 WARN_ON(1);
2553                 break;
2554         }
2555
2556         /* Update the rate scaling for control frame Tx */
2557         rate_cmd.table_id = 0;
2558         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2559                               &rate_cmd);
2560         if (rc)
2561                 return rc;
2562
2563         /* Update the rate scaling for data frame Tx */
2564         rate_cmd.table_id = 1;
2565         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2566                                 &rate_cmd);
2567 }
2568
2569 /* Called when initializing driver */
2570 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2571 {
2572         memset((void *)&priv->hw_setting, 0,
2573                sizeof(struct iwl3945_driver_hw_info));
2574
2575         priv->hw_setting.shared_virt =
2576             pci_alloc_consistent(priv->pci_dev,
2577                                  sizeof(struct iwl3945_shared),
2578                                  &priv->hw_setting.shared_phys);
2579
2580         if (!priv->hw_setting.shared_virt) {
2581                 IWL_ERROR("failed to allocate pci memory\n");
2582                 mutex_unlock(&priv->mutex);
2583                 return -ENOMEM;
2584         }
2585
2586         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2587         priv->hw_setting.max_pkt_size = 2342;
2588         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2589         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2590         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2591         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2592         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2593
2594         priv->hw_setting.tx_ant_num = 2;
2595         return 0;
2596 }
2597
2598 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2599                           struct iwl3945_frame *frame, u8 rate)
2600 {
2601         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2602         unsigned int frame_size;
2603
2604         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2605         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2606
2607         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2608         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2609
2610         frame_size = iwl3945_fill_beacon_frame(priv,
2611                                 tx_beacon_cmd->frame,
2612                                 iwl3945_broadcast_addr,
2613                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2614
2615         BUG_ON(frame_size > MAX_MPDU_SIZE);
2616         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2617
2618         tx_beacon_cmd->tx.rate = rate;
2619         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2620                                       TX_CMD_FLG_TSF_MSK);
2621
2622         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2623         tx_beacon_cmd->tx.supp_rates[0] =
2624                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2625
2626         tx_beacon_cmd->tx.supp_rates[1] =
2627                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2628
2629         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2630 }
2631
2632 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2633 {
2634         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2635         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2636 }
2637
2638 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2639 {
2640         INIT_DELAYED_WORK(&priv->thermal_periodic,
2641                           iwl3945_bg_reg_txpower_periodic);
2642 }
2643
2644 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2645 {
2646         cancel_delayed_work(&priv->thermal_periodic);
2647 }
2648
2649 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2650         .name = "3945BG",
2651         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2652         .sku = IWL_SKU_G,
2653 };
2654
2655 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2656         .name = "3945ABG",
2657         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2658         .sku = IWL_SKU_A|IWL_SKU_G,
2659 };
2660
2661 struct pci_device_id iwl3945_hw_card_ids[] = {
2662         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2663         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2664         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2665         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2666         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2667         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2668         {0}
2669 };
2670
2671 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);