[PATCH] b43legacy: Fix potential return of uninitialized variable
[linux-2.6.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2  *
3  *  Broadcom B43legacy wireless driver
4  *
5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6  *  Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11  *
12  *  Some parts of the code in this file are derived from the ipw2200
13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
14
15  *  This program is free software; you can redistribute it and/or modify
16  *  it under the terms of the GNU General Public License as published by
17  *  the Free Software Foundation; either version 2 of the License, or
18  *  (at your option) any later version.
19  *
20  *  This program is distributed in the hope that it will be useful,
21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  *  GNU General Public License for more details.
24  *
25  *  You should have received a copy of the GNU General Public License
26  *  along with this program; see the file COPYING.  If not, write to
27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28  *  Boston, MA 02110-1301, USA.
29  *
30  */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio;
65 module_param_named(pio, modparam_pio, int, 0444);
66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio   0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio   1
71 #endif
72
73 static int modparam_bad_frames_preempt;
74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
76                  " Preemption");
77
78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
79 module_param_named(short_retry, modparam_short_retry, int, 0444);
80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
81
82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
83 module_param_named(long_retry, modparam_long_retry, int, 0444);
84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
85
86 static int modparam_noleds;
87 module_param_named(noleds, modparam_noleds, int, 0444);
88 MODULE_PARM_DESC(noleds, "Turn off all LED activity");
89
90 static char modparam_fwpostfix[16];
91 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
92 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
93
94 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
95 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
96         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
97         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
98         SSB_DEVTABLE_END
99 };
100 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
101
102
103 /* Channel and ratetables are shared for all devices.
104  * They can't be const, because ieee80211 puts some precalculated
105  * data in there. This data is the same for all devices, so we don't
106  * get concurrency issues */
107 #define RATETAB_ENT(_rateid, _flags) \
108         {                                                       \
109                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
110                 .val    = (_rateid),                            \
111                 .val2   = (_rateid),                            \
112                 .flags  = (_flags),                             \
113         }
114 static struct ieee80211_rate __b43legacy_ratetable[] = {
115         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
116         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
117         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
118         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
119         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
120         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
121         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
122         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
123         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
124         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
125         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
126         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
127 };
128 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
129 #define b43legacy_a_ratetable_size      8
130 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
131 #define b43legacy_b_ratetable_size      4
132 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
133 #define b43legacy_g_ratetable_size      12
134
135 #define CHANTAB_ENT(_chanid, _freq) \
136         {                                                       \
137                 .chan   = (_chanid),                            \
138                 .freq   = (_freq),                              \
139                 .val    = (_chanid),                            \
140                 .flag   = IEEE80211_CHAN_W_SCAN |               \
141                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
142                           IEEE80211_CHAN_W_IBSS,                \
143                 .power_level    = 0x0A,                         \
144                 .antenna_max    = 0xFF,                         \
145         }
146 static struct ieee80211_channel b43legacy_bg_chantable[] = {
147         CHANTAB_ENT(1, 2412),
148         CHANTAB_ENT(2, 2417),
149         CHANTAB_ENT(3, 2422),
150         CHANTAB_ENT(4, 2427),
151         CHANTAB_ENT(5, 2432),
152         CHANTAB_ENT(6, 2437),
153         CHANTAB_ENT(7, 2442),
154         CHANTAB_ENT(8, 2447),
155         CHANTAB_ENT(9, 2452),
156         CHANTAB_ENT(10, 2457),
157         CHANTAB_ENT(11, 2462),
158         CHANTAB_ENT(12, 2467),
159         CHANTAB_ENT(13, 2472),
160         CHANTAB_ENT(14, 2484),
161 };
162 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
163
164 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
165 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
166 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
167 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
168
169
170 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
171 {
172         if (!wl || !wl->current_dev)
173                 return 1;
174         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
175                 return 1;
176         /* We are up and running.
177          * Ratelimit the messages to avoid DoS over the net. */
178         return net_ratelimit();
179 }
180
181 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
182 {
183         va_list args;
184
185         if (!b43legacy_ratelimit(wl))
186                 return;
187         va_start(args, fmt);
188         printk(KERN_INFO "b43legacy-%s: ",
189                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
190         vprintk(fmt, args);
191         va_end(args);
192 }
193
194 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
195 {
196         va_list args;
197
198         if (!b43legacy_ratelimit(wl))
199                 return;
200         va_start(args, fmt);
201         printk(KERN_ERR "b43legacy-%s ERROR: ",
202                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
203         vprintk(fmt, args);
204         va_end(args);
205 }
206
207 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
208 {
209         va_list args;
210
211         if (!b43legacy_ratelimit(wl))
212                 return;
213         va_start(args, fmt);
214         printk(KERN_WARNING "b43legacy-%s warning: ",
215                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
216         vprintk(fmt, args);
217         va_end(args);
218 }
219
220 #if B43legacy_DEBUG
221 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
222 {
223         va_list args;
224
225         va_start(args, fmt);
226         printk(KERN_DEBUG "b43legacy-%s debug: ",
227                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
228         vprintk(fmt, args);
229         va_end(args);
230 }
231 #endif /* DEBUG */
232
233 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
234                                 u32 val)
235 {
236         u32 status;
237
238         B43legacy_WARN_ON(offset % 4 != 0);
239
240         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
241         if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
242                 val = swab32(val);
243
244         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
245         mmiowb();
246         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
247 }
248
249 static inline
250 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
251                                 u16 routing, u16 offset)
252 {
253         u32 control;
254
255         /* "offset" is the WORD offset. */
256
257         control = routing;
258         control <<= 16;
259         control |= offset;
260         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
261 }
262
263 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
264                        u16 routing, u16 offset)
265 {
266         u32 ret;
267
268         if (routing == B43legacy_SHM_SHARED) {
269                 B43legacy_WARN_ON((offset & 0x0001) != 0);
270                 if (offset & 0x0003) {
271                         /* Unaligned access */
272                         b43legacy_shm_control_word(dev, routing, offset >> 2);
273                         ret = b43legacy_read16(dev,
274                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
275                         ret <<= 16;
276                         b43legacy_shm_control_word(dev, routing,
277                                                      (offset >> 2) + 1);
278                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
279
280                         return ret;
281                 }
282                 offset >>= 2;
283         }
284         b43legacy_shm_control_word(dev, routing, offset);
285         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
286
287         return ret;
288 }
289
290 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
291                            u16 routing, u16 offset)
292 {
293         u16 ret;
294
295         if (routing == B43legacy_SHM_SHARED) {
296                 B43legacy_WARN_ON((offset & 0x0001) != 0);
297                 if (offset & 0x0003) {
298                         /* Unaligned access */
299                         b43legacy_shm_control_word(dev, routing, offset >> 2);
300                         ret = b43legacy_read16(dev,
301                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
302
303                         return ret;
304                 }
305                 offset >>= 2;
306         }
307         b43legacy_shm_control_word(dev, routing, offset);
308         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
309
310         return ret;
311 }
312
313 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
314                            u16 routing, u16 offset,
315                            u32 value)
316 {
317         if (routing == B43legacy_SHM_SHARED) {
318                 B43legacy_WARN_ON((offset & 0x0001) != 0);
319                 if (offset & 0x0003) {
320                         /* Unaligned access */
321                         b43legacy_shm_control_word(dev, routing, offset >> 2);
322                         mmiowb();
323                         b43legacy_write16(dev,
324                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
325                                           (value >> 16) & 0xffff);
326                         mmiowb();
327                         b43legacy_shm_control_word(dev, routing,
328                                                    (offset >> 2) + 1);
329                         mmiowb();
330                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
331                                           value & 0xffff);
332                         return;
333                 }
334                 offset >>= 2;
335         }
336         b43legacy_shm_control_word(dev, routing, offset);
337         mmiowb();
338         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
339 }
340
341 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
342                            u16 value)
343 {
344         if (routing == B43legacy_SHM_SHARED) {
345                 B43legacy_WARN_ON((offset & 0x0001) != 0);
346                 if (offset & 0x0003) {
347                         /* Unaligned access */
348                         b43legacy_shm_control_word(dev, routing, offset >> 2);
349                         mmiowb();
350                         b43legacy_write16(dev,
351                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
352                                           value);
353                         return;
354                 }
355                 offset >>= 2;
356         }
357         b43legacy_shm_control_word(dev, routing, offset);
358         mmiowb();
359         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
360 }
361
362 /* Read HostFlags */
363 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
364 {
365         u32 ret;
366
367         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
368                                    B43legacy_SHM_SH_HOSTFHI);
369         ret <<= 16;
370         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
371                                     B43legacy_SHM_SH_HOSTFLO);
372
373         return ret;
374 }
375
376 /* Write HostFlags */
377 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
378 {
379         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
380                               B43legacy_SHM_SH_HOSTFLO,
381                               (value & 0x0000FFFF));
382         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
383                               B43legacy_SHM_SH_HOSTFHI,
384                               ((value & 0xFFFF0000) >> 16));
385 }
386
387 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
388 {
389         /* We need to be careful. As we read the TSF from multiple
390          * registers, we should take care of register overflows.
391          * In theory, the whole tsf read process should be atomic.
392          * We try to be atomic here, by restaring the read process,
393          * if any of the high registers changed (overflew).
394          */
395         if (dev->dev->id.revision >= 3) {
396                 u32 low;
397                 u32 high;
398                 u32 high2;
399
400                 do {
401                         high = b43legacy_read32(dev,
402                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
403                         low = b43legacy_read32(dev,
404                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
405                         high2 = b43legacy_read32(dev,
406                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
407                 } while (unlikely(high != high2));
408
409                 *tsf = high;
410                 *tsf <<= 32;
411                 *tsf |= low;
412         } else {
413                 u64 tmp;
414                 u16 v0;
415                 u16 v1;
416                 u16 v2;
417                 u16 v3;
418                 u16 test1;
419                 u16 test2;
420                 u16 test3;
421
422                 do {
423                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
424                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
425                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
426                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
427
428                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
429                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
430                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
431                 } while (v3 != test3 || v2 != test2 || v1 != test1);
432
433                 *tsf = v3;
434                 *tsf <<= 48;
435                 tmp = v2;
436                 tmp <<= 32;
437                 *tsf |= tmp;
438                 tmp = v1;
439                 tmp <<= 16;
440                 *tsf |= tmp;
441                 *tsf |= v0;
442         }
443 }
444
445 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
446 {
447         u32 status;
448
449         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
450         status |= B43legacy_SBF_TIME_UPDATE;
451         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
452         mmiowb();
453 }
454
455 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
456 {
457         u32 status;
458
459         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
460         status &= ~B43legacy_SBF_TIME_UPDATE;
461         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
462 }
463
464 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
465 {
466         /* Be careful with the in-progress timer.
467          * First zero out the low register, so we have a full
468          * register-overflow duration to complete the operation.
469          */
470         if (dev->dev->id.revision >= 3) {
471                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
472                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
473
474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
475                 mmiowb();
476                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
477                                     hi);
478                 mmiowb();
479                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
480                                     lo);
481         } else {
482                 u16 v0 = (tsf & 0x000000000000FFFFULL);
483                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
484                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
485                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
486
487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
488                 mmiowb();
489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
490                 mmiowb();
491                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
492                 mmiowb();
493                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
494                 mmiowb();
495                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
496         }
497 }
498
499 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
500 {
501         b43legacy_time_lock(dev);
502         b43legacy_tsf_write_locked(dev, tsf);
503         b43legacy_time_unlock(dev);
504 }
505
506 static
507 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
508                              u16 offset, const u8 *mac)
509 {
510         static const u8 zero_addr[ETH_ALEN] = { 0 };
511         u16 data;
512
513         if (!mac)
514                 mac = zero_addr;
515
516         offset |= 0x0020;
517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
518
519         data = mac[0];
520         data |= mac[1] << 8;
521         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
522         data = mac[2];
523         data |= mac[3] << 8;
524         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
525         data = mac[4];
526         data |= mac[5] << 8;
527         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
528 }
529
530 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
531 {
532         static const u8 zero_addr[ETH_ALEN] = { 0 };
533         const u8 *mac = dev->wl->mac_addr;
534         const u8 *bssid = dev->wl->bssid;
535         u8 mac_bssid[ETH_ALEN * 2];
536         int i;
537         u32 tmp;
538
539         if (!bssid)
540                 bssid = zero_addr;
541         if (!mac)
542                 mac = zero_addr;
543
544         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
545
546         memcpy(mac_bssid, mac, ETH_ALEN);
547         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
548
549         /* Write our MAC address and BSSID to template ram */
550         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
551                 tmp =  (u32)(mac_bssid[i + 0]);
552                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
553                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
554                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
555                 b43legacy_ram_write(dev, 0x20 + i, tmp);
556                 b43legacy_ram_write(dev, 0x78 + i, tmp);
557                 b43legacy_ram_write(dev, 0x478 + i, tmp);
558         }
559 }
560
561 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
562 {
563         b43legacy_write_mac_bssid_templates(dev);
564         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
565                                 dev->wl->mac_addr);
566 }
567
568 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
569                                     u16 slot_time)
570 {
571         /* slot_time is in usec. */
572         if (dev->phy.type != B43legacy_PHYTYPE_G)
573                 return;
574         b43legacy_write16(dev, 0x684, 510 + slot_time);
575         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
576                               slot_time);
577 }
578
579 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
580 {
581         b43legacy_set_slot_time(dev, 9);
582         dev->short_slot = 1;
583 }
584
585 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
586 {
587         b43legacy_set_slot_time(dev, 20);
588         dev->short_slot = 0;
589 }
590
591 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
592  * Returns the _previously_ enabled IRQ mask.
593  */
594 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
595                                              u32 mask)
596 {
597         u32 old_mask;
598
599         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
600         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
601                           mask);
602
603         return old_mask;
604 }
605
606 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
607  * Returns the _previously_ enabled IRQ mask.
608  */
609 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
610                                               u32 mask)
611 {
612         u32 old_mask;
613
614         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
615         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
616
617         return old_mask;
618 }
619
620 /* Synchronize IRQ top- and bottom-half.
621  * IRQs must be masked before calling this.
622  * This must not be called with the irq_lock held.
623  */
624 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
625 {
626         synchronize_irq(dev->dev->irq);
627         tasklet_kill(&dev->isr_tasklet);
628 }
629
630 /* DummyTransmission function, as documented on
631  * http://bcm-specs.sipsolutions.net/DummyTransmission
632  */
633 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
634 {
635         struct b43legacy_phy *phy = &dev->phy;
636         unsigned int i;
637         unsigned int max_loop;
638         u16 value;
639         u32 buffer[5] = {
640                 0x00000000,
641                 0x00D40000,
642                 0x00000000,
643                 0x01000000,
644                 0x00000000,
645         };
646
647         switch (phy->type) {
648         case B43legacy_PHYTYPE_B:
649         case B43legacy_PHYTYPE_G:
650                 max_loop = 0xFA;
651                 buffer[0] = 0x000B846E;
652                 break;
653         default:
654                 B43legacy_BUG_ON(1);
655                 return;
656         }
657
658         for (i = 0; i < 5; i++)
659                 b43legacy_ram_write(dev, i * 4, buffer[i]);
660
661         /* dummy read follows */
662         b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
663
664         b43legacy_write16(dev, 0x0568, 0x0000);
665         b43legacy_write16(dev, 0x07C0, 0x0000);
666         b43legacy_write16(dev, 0x050C, 0x0000);
667         b43legacy_write16(dev, 0x0508, 0x0000);
668         b43legacy_write16(dev, 0x050A, 0x0000);
669         b43legacy_write16(dev, 0x054C, 0x0000);
670         b43legacy_write16(dev, 0x056A, 0x0014);
671         b43legacy_write16(dev, 0x0568, 0x0826);
672         b43legacy_write16(dev, 0x0500, 0x0000);
673         b43legacy_write16(dev, 0x0502, 0x0030);
674
675         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
676                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
677         for (i = 0x00; i < max_loop; i++) {
678                 value = b43legacy_read16(dev, 0x050E);
679                 if (value & 0x0080)
680                         break;
681                 udelay(10);
682         }
683         for (i = 0x00; i < 0x0A; i++) {
684                 value = b43legacy_read16(dev, 0x050E);
685                 if (value & 0x0400)
686                         break;
687                 udelay(10);
688         }
689         for (i = 0x00; i < 0x0A; i++) {
690                 value = b43legacy_read16(dev, 0x0690);
691                 if (!(value & 0x0100))
692                         break;
693                 udelay(10);
694         }
695         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
696                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
697 }
698
699 /* Turn the Analog ON/OFF */
700 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
701 {
702         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
703 }
704
705 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
706 {
707         u32 tmslow;
708         u32 macctl;
709
710         flags |= B43legacy_TMSLOW_PHYCLKEN;
711         flags |= B43legacy_TMSLOW_PHYRESET;
712         ssb_device_enable(dev->dev, flags);
713         msleep(2); /* Wait for the PLL to turn on. */
714
715         /* Now take the PHY out of Reset again */
716         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
717         tmslow |= SSB_TMSLOW_FGC;
718         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
719         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
720         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
721         msleep(1);
722         tmslow &= ~SSB_TMSLOW_FGC;
723         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
724         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
725         msleep(1);
726
727         /* Turn Analog ON */
728         b43legacy_switch_analog(dev, 1);
729
730         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
731         macctl &= ~B43legacy_MACCTL_GMODE;
732         if (flags & B43legacy_TMSLOW_GMODE) {
733                 macctl |= B43legacy_MACCTL_GMODE;
734                 dev->phy.gmode = 1;
735         } else
736                 dev->phy.gmode = 0;
737         macctl |= B43legacy_MACCTL_IHR_ENABLED;
738         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
739 }
740
741 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
742 {
743         u32 v0;
744         u32 v1;
745         u16 tmp;
746         struct b43legacy_txstatus stat;
747
748         while (1) {
749                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
750                 if (!(v0 & 0x00000001))
751                         break;
752                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
753
754                 stat.cookie = (v0 >> 16);
755                 stat.seq = (v1 & 0x0000FFFF);
756                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
757                 tmp = (v0 & 0x0000FFFF);
758                 stat.frame_count = ((tmp & 0xF000) >> 12);
759                 stat.rts_count = ((tmp & 0x0F00) >> 8);
760                 stat.supp_reason = ((tmp & 0x001C) >> 2);
761                 stat.pm_indicated = !!(tmp & 0x0080);
762                 stat.intermediate = !!(tmp & 0x0040);
763                 stat.for_ampdu = !!(tmp & 0x0020);
764                 stat.acked = !!(tmp & 0x0002);
765
766                 b43legacy_handle_txstatus(dev, &stat);
767         }
768 }
769
770 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
771 {
772         u32 dummy;
773
774         if (dev->dev->id.revision < 5)
775                 return;
776         /* Read all entries from the microcode TXstatus FIFO
777          * and throw them away.
778          */
779         while (1) {
780                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
781                 if (!(dummy & 0x00000001))
782                         break;
783                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
784         }
785 }
786
787 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
788 {
789         u32 val = 0;
790
791         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
792         val <<= 16;
793         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
794
795         return val;
796 }
797
798 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
799 {
800         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
801                               (jssi & 0x0000FFFF));
802         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
803                               (jssi & 0xFFFF0000) >> 16);
804 }
805
806 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
807 {
808         b43legacy_jssi_write(dev, 0x7F7F7F7F);
809         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
810                           b43legacy_read32(dev,
811                           B43legacy_MMIO_STATUS2_BITFIELD)
812                           | (1 << 4));
813         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
814                             dev->phy.channel);
815 }
816
817 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
818 {
819         /* Top half of Link Quality calculation. */
820
821         if (dev->noisecalc.calculation_running)
822                 return;
823         dev->noisecalc.channel_at_start = dev->phy.channel;
824         dev->noisecalc.calculation_running = 1;
825         dev->noisecalc.nr_samples = 0;
826
827         b43legacy_generate_noise_sample(dev);
828 }
829
830 static void handle_irq_noise(struct b43legacy_wldev *dev)
831 {
832         struct b43legacy_phy *phy = &dev->phy;
833         u16 tmp;
834         u8 noise[4];
835         u8 i;
836         u8 j;
837         s32 average;
838
839         /* Bottom half of Link Quality calculation. */
840
841         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
842         if (dev->noisecalc.channel_at_start != phy->channel)
843                 goto drop_calculation;
844         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
845         if (noise[0] == 0x7F || noise[1] == 0x7F ||
846             noise[2] == 0x7F || noise[3] == 0x7F)
847                 goto generate_new;
848
849         /* Get the noise samples. */
850         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
851         i = dev->noisecalc.nr_samples;
852         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
853         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
854         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
855         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
856         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
857         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
858         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
859         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
860         dev->noisecalc.nr_samples++;
861         if (dev->noisecalc.nr_samples == 8) {
862                 /* Calculate the Link Quality by the noise samples. */
863                 average = 0;
864                 for (i = 0; i < 8; i++) {
865                         for (j = 0; j < 4; j++)
866                                 average += dev->noisecalc.samples[i][j];
867                 }
868                 average /= (8 * 4);
869                 average *= 125;
870                 average += 64;
871                 average /= 128;
872                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
873                                              0x40C);
874                 tmp = (tmp / 128) & 0x1F;
875                 if (tmp >= 8)
876                         average += 2;
877                 else
878                         average -= 25;
879                 if (tmp == 8)
880                         average -= 72;
881                 else
882                         average -= 48;
883
884                 dev->stats.link_noise = average;
885 drop_calculation:
886                 dev->noisecalc.calculation_running = 0;
887                 return;
888         }
889 generate_new:
890         b43legacy_generate_noise_sample(dev);
891 }
892
893 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
894 {
895         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
896                 /* TODO: PS TBTT */
897         } else {
898                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
899                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
900         }
901         dev->reg124_set_0x4 = 0;
902         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
903                 dev->reg124_set_0x4 = 1;
904 }
905
906 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
907 {
908         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
909                 return;
910         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
911                           b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
912                           | 0x4);
913 }
914
915 static void handle_irq_pmq(struct b43legacy_wldev *dev)
916 {
917         u32 tmp;
918
919         /* TODO: AP mode. */
920
921         while (1) {
922                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
923                 if (!(tmp & 0x00000008))
924                         break;
925         }
926         /* 16bit write is odd, but correct. */
927         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
928 }
929
930 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
931                                             const u8 *data, u16 size,
932                                             u16 ram_offset,
933                                             u16 shm_size_offset, u8 rate)
934 {
935         u32 i;
936         u32 tmp;
937         struct b43legacy_plcp_hdr4 plcp;
938
939         plcp.data = 0;
940         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
941         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
942         ram_offset += sizeof(u32);
943         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
944          * So leave the first two bytes of the next write blank.
945          */
946         tmp = (u32)(data[0]) << 16;
947         tmp |= (u32)(data[1]) << 24;
948         b43legacy_ram_write(dev, ram_offset, tmp);
949         ram_offset += sizeof(u32);
950         for (i = 2; i < size; i += sizeof(u32)) {
951                 tmp = (u32)(data[i + 0]);
952                 if (i + 1 < size)
953                         tmp |= (u32)(data[i + 1]) << 8;
954                 if (i + 2 < size)
955                         tmp |= (u32)(data[i + 2]) << 16;
956                 if (i + 3 < size)
957                         tmp |= (u32)(data[i + 3]) << 24;
958                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
959         }
960         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
961                               size + sizeof(struct b43legacy_plcp_hdr6));
962 }
963
964 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
965                                             u16 ram_offset,
966                                             u16 shm_size_offset, u8 rate)
967 {
968         int len;
969         const u8 *data;
970
971         B43legacy_WARN_ON(!dev->cached_beacon);
972         len = min((size_t)dev->cached_beacon->len,
973                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
974         data = (const u8 *)(dev->cached_beacon->data);
975         b43legacy_write_template_common(dev, data,
976                                         len, ram_offset,
977                                         shm_size_offset, rate);
978 }
979
980 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
981                                             u16 shm_offset, u16 size,
982                                             u8 rate)
983 {
984         struct b43legacy_plcp_hdr4 plcp;
985         u32 tmp;
986         __le16 dur;
987
988         plcp.data = 0;
989         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
990         dur = ieee80211_generic_frame_duration(dev->wl->hw,
991                                                dev->wl->if_id,
992                                                size,
993                                                B43legacy_RATE_TO_100KBPS(rate));
994         /* Write PLCP in two parts and timing for packet transfer */
995         tmp = le32_to_cpu(plcp.data);
996         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
997                               tmp & 0xFFFF);
998         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
999                               tmp >> 16);
1000         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1001                               le16_to_cpu(dur));
1002 }
1003
1004 /* Instead of using custom probe response template, this function
1005  * just patches custom beacon template by:
1006  * 1) Changing packet type
1007  * 2) Patching duration field
1008  * 3) Stripping TIM
1009  */
1010 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1011                                          u16 *dest_size, u8 rate)
1012 {
1013         const u8 *src_data;
1014         u8 *dest_data;
1015         u16 src_size;
1016         u16 elem_size;
1017         u16 src_pos;
1018         u16 dest_pos;
1019         __le16 dur;
1020         struct ieee80211_hdr *hdr;
1021
1022         B43legacy_WARN_ON(!dev->cached_beacon);
1023         src_size = dev->cached_beacon->len;
1024         src_data = (const u8 *)dev->cached_beacon->data;
1025
1026         if (unlikely(src_size < 0x24)) {
1027                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1028                        "invalid beacon\n");
1029                 return NULL;
1030         }
1031
1032         dest_data = kmalloc(src_size, GFP_ATOMIC);
1033         if (unlikely(!dest_data))
1034                 return NULL;
1035
1036         /* 0x24 is offset of first variable-len Information-Element
1037          * in beacon frame.
1038          */
1039         memcpy(dest_data, src_data, 0x24);
1040         src_pos = 0x24;
1041         dest_pos = 0x24;
1042         for (; src_pos < src_size - 2; src_pos += elem_size) {
1043                 elem_size = src_data[src_pos + 1] + 2;
1044                 if (src_data[src_pos] != 0x05) { /* TIM */
1045                         memcpy(dest_data + dest_pos, src_data + src_pos,
1046                                elem_size);
1047                         dest_pos += elem_size;
1048                 }
1049         }
1050         *dest_size = dest_pos;
1051         hdr = (struct ieee80211_hdr *)dest_data;
1052
1053         /* Set the frame control. */
1054         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1055                                          IEEE80211_STYPE_PROBE_RESP);
1056         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1057                                                dev->wl->if_id,
1058                                                *dest_size,
1059                                                B43legacy_RATE_TO_100KBPS(rate));
1060         hdr->duration_id = dur;
1061
1062         return dest_data;
1063 }
1064
1065 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1066                                                 u16 ram_offset,
1067                                                 u16 shm_size_offset, u8 rate)
1068 {
1069         u8 *probe_resp_data;
1070         u16 size;
1071
1072         B43legacy_WARN_ON(!dev->cached_beacon);
1073         size = dev->cached_beacon->len;
1074         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1075         if (unlikely(!probe_resp_data))
1076                 return;
1077
1078         /* Looks like PLCP headers plus packet timings are stored for
1079          * all possible basic rates
1080          */
1081         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1082                                         B43legacy_CCK_RATE_1MB);
1083         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1084                                         B43legacy_CCK_RATE_2MB);
1085         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1086                                         B43legacy_CCK_RATE_5MB);
1087         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1088                                         B43legacy_CCK_RATE_11MB);
1089
1090         size = min((size_t)size,
1091                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1092         b43legacy_write_template_common(dev, probe_resp_data,
1093                                         size, ram_offset,
1094                                         shm_size_offset, rate);
1095         kfree(probe_resp_data);
1096 }
1097
1098 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1099                                            struct sk_buff *beacon)
1100 {
1101         if (dev->cached_beacon)
1102                 kfree_skb(dev->cached_beacon);
1103         dev->cached_beacon = beacon;
1104
1105         return 0;
1106 }
1107
1108 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1109 {
1110         u32 status;
1111
1112         B43legacy_WARN_ON(!dev->cached_beacon);
1113
1114         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1115                                         B43legacy_CCK_RATE_1MB);
1116         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1117                                         B43legacy_CCK_RATE_1MB);
1118         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1119                                             B43legacy_CCK_RATE_11MB);
1120
1121         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1122         status |= 0x03;
1123         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1124 }
1125
1126 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1127                                         struct sk_buff *beacon)
1128 {
1129         int err;
1130
1131         err = b43legacy_refresh_cached_beacon(dev, beacon);
1132         if (unlikely(err))
1133                 return;
1134         b43legacy_update_templates(dev);
1135 }
1136
1137 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1138                                const u8 *ssid, u8 ssid_len)
1139 {
1140         u32 tmp;
1141         u16 i;
1142         u16 len;
1143
1144         len = min((u16)ssid_len, (u16)0x100);
1145         for (i = 0; i < len; i += sizeof(u32)) {
1146                 tmp = (u32)(ssid[i + 0]);
1147                 if (i + 1 < len)
1148                         tmp |= (u32)(ssid[i + 1]) << 8;
1149                 if (i + 2 < len)
1150                         tmp |= (u32)(ssid[i + 2]) << 16;
1151                 if (i + 3 < len)
1152                         tmp |= (u32)(ssid[i + 3]) << 24;
1153                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1154                                       0x380 + i, tmp);
1155         }
1156         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1157                               0x48, len);
1158 }
1159
1160 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1161                                      u16 beacon_int)
1162 {
1163         b43legacy_time_lock(dev);
1164         if (dev->dev->id.revision >= 3)
1165                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1166         else {
1167                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1168                 b43legacy_write16(dev, 0x610, beacon_int);
1169         }
1170         b43legacy_time_unlock(dev);
1171 }
1172
1173 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1174 {
1175         u32 status;
1176
1177         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1178                 return;
1179
1180         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1181         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1182
1183         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1184                 /* ACK beacon IRQ. */
1185                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1186                                   B43legacy_IRQ_BEACON);
1187                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1188                 if (dev->cached_beacon)
1189                         kfree_skb(dev->cached_beacon);
1190                 dev->cached_beacon = NULL;
1191                 return;
1192         }
1193         if (!(status & 0x1)) {
1194                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1195                                                 B43legacy_CCK_RATE_1MB);
1196                 status |= 0x1;
1197                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1198                                   status);
1199         }
1200         if (!(status & 0x2)) {
1201                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1202                                                 B43legacy_CCK_RATE_1MB);
1203                 status |= 0x2;
1204                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1205                                   status);
1206         }
1207 }
1208
1209 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1210 {
1211 }
1212
1213 /* Interrupt handler bottom-half */
1214 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1215 {
1216         u32 reason;
1217         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1218         u32 merged_dma_reason = 0;
1219         int i;
1220         int activity = 0;
1221         unsigned long flags;
1222
1223         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1224
1225         B43legacy_WARN_ON(b43legacy_status(dev) <
1226                           B43legacy_STAT_INITIALIZED);
1227
1228         reason = dev->irq_reason;
1229         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1230                 dma_reason[i] = dev->dma_reason[i];
1231                 merged_dma_reason |= dma_reason[i];
1232         }
1233
1234         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1235                 b43legacyerr(dev->wl, "MAC transmission error\n");
1236
1237         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1238                 b43legacyerr(dev->wl, "PHY transmission error\n");
1239
1240         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1241                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1242                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1243                         b43legacyerr(dev->wl, "Fatal DMA error: "
1244                                "0x%08X, 0x%08X, 0x%08X, "
1245                                "0x%08X, 0x%08X, 0x%08X\n",
1246                                dma_reason[0], dma_reason[1],
1247                                dma_reason[2], dma_reason[3],
1248                                dma_reason[4], dma_reason[5]);
1249                         b43legacy_controller_restart(dev, "DMA error");
1250                         mmiowb();
1251                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1252                         return;
1253                 }
1254                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1255                         b43legacyerr(dev->wl, "DMA error: "
1256                                "0x%08X, 0x%08X, 0x%08X, "
1257                                "0x%08X, 0x%08X, 0x%08X\n",
1258                                dma_reason[0], dma_reason[1],
1259                                dma_reason[2], dma_reason[3],
1260                                dma_reason[4], dma_reason[5]);
1261         }
1262
1263         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1264                 handle_irq_ucode_debug(dev);
1265         if (reason & B43legacy_IRQ_TBTT_INDI)
1266                 handle_irq_tbtt_indication(dev);
1267         if (reason & B43legacy_IRQ_ATIM_END)
1268                 handle_irq_atim_end(dev);
1269         if (reason & B43legacy_IRQ_BEACON)
1270                 handle_irq_beacon(dev);
1271         if (reason & B43legacy_IRQ_PMQ)
1272                 handle_irq_pmq(dev);
1273         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1274                 ;/*TODO*/
1275         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1276                 handle_irq_noise(dev);
1277
1278         /* Check the DMA reason registers for received data. */
1279         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1280                 if (b43legacy_using_pio(dev))
1281                         b43legacy_pio_rx(dev->pio.queue0);
1282                 else
1283                         b43legacy_dma_rx(dev->dma.rx_ring0);
1284                 /* We intentionally don't set "activity" to 1, here. */
1285         }
1286         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1287         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1288         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1289                 if (b43legacy_using_pio(dev))
1290                         b43legacy_pio_rx(dev->pio.queue3);
1291                 else
1292                         b43legacy_dma_rx(dev->dma.rx_ring3);
1293                 activity = 1;
1294         }
1295         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1296         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1297
1298         if (reason & B43legacy_IRQ_TX_OK) {
1299                 handle_irq_transmit_status(dev);
1300                 activity = 1;
1301                 /* TODO: In AP mode, this also causes sending of powersave
1302                          responses. */
1303         }
1304
1305         if (!modparam_noleds)
1306                 b43legacy_leds_update(dev, activity);
1307         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1308         mmiowb();
1309         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1310 }
1311
1312 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1313                                u16 base, int queueidx)
1314 {
1315         u16 rxctl;
1316
1317         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1318         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1319                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1320         else
1321                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1322 }
1323
1324 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1325 {
1326         if (b43legacy_using_pio(dev) &&
1327             (dev->dev->id.revision < 3) &&
1328             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1329                 /* Apply a PIO specific workaround to the dma_reasons */
1330                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1331                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1332                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1333                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1334         }
1335
1336         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1337
1338         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1339                           dev->dma_reason[0]);
1340         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1341                           dev->dma_reason[1]);
1342         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1343                           dev->dma_reason[2]);
1344         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1345                           dev->dma_reason[3]);
1346         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1347                           dev->dma_reason[4]);
1348         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1349                           dev->dma_reason[5]);
1350 }
1351
1352 /* Interrupt handler top-half */
1353 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1354 {
1355         irqreturn_t ret = IRQ_NONE;
1356         struct b43legacy_wldev *dev = dev_id;
1357         u32 reason;
1358
1359         if (!dev)
1360                 return IRQ_NONE;
1361
1362         spin_lock(&dev->wl->irq_lock);
1363
1364         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1365                 goto out;
1366         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1367         if (reason == 0xffffffff) /* shared IRQ */
1368                 goto out;
1369         ret = IRQ_HANDLED;
1370         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1371         if (!reason)
1372                 goto out;
1373
1374         dev->dma_reason[0] = b43legacy_read32(dev,
1375                                               B43legacy_MMIO_DMA0_REASON)
1376                                               & 0x0001DC00;
1377         dev->dma_reason[1] = b43legacy_read32(dev,
1378                                               B43legacy_MMIO_DMA1_REASON)
1379                                               & 0x0000DC00;
1380         dev->dma_reason[2] = b43legacy_read32(dev,
1381                                               B43legacy_MMIO_DMA2_REASON)
1382                                               & 0x0000DC00;
1383         dev->dma_reason[3] = b43legacy_read32(dev,
1384                                               B43legacy_MMIO_DMA3_REASON)
1385                                               & 0x0001DC00;
1386         dev->dma_reason[4] = b43legacy_read32(dev,
1387                                               B43legacy_MMIO_DMA4_REASON)
1388                                               & 0x0000DC00;
1389         dev->dma_reason[5] = b43legacy_read32(dev,
1390                                               B43legacy_MMIO_DMA5_REASON)
1391                                               & 0x0000DC00;
1392
1393         b43legacy_interrupt_ack(dev, reason);
1394         /* disable all IRQs. They are enabled again in the bottom half. */
1395         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1396                                                           B43legacy_IRQ_ALL);
1397         /* save the reason code and call our bottom half. */
1398         dev->irq_reason = reason;
1399         tasklet_schedule(&dev->isr_tasklet);
1400 out:
1401         mmiowb();
1402         spin_unlock(&dev->wl->irq_lock);
1403
1404         return ret;
1405 }
1406
1407 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1408 {
1409         release_firmware(dev->fw.ucode);
1410         dev->fw.ucode = NULL;
1411         release_firmware(dev->fw.pcm);
1412         dev->fw.pcm = NULL;
1413         release_firmware(dev->fw.initvals);
1414         dev->fw.initvals = NULL;
1415         release_firmware(dev->fw.initvals_band);
1416         dev->fw.initvals_band = NULL;
1417 }
1418
1419 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1420 {
1421         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1422                      "Drivers/bcm43xx#devicefirmware "
1423                      "and download the correct firmware (version 3).\n");
1424 }
1425
1426 static int do_request_fw(struct b43legacy_wldev *dev,
1427                          const char *name,
1428                          const struct firmware **fw)
1429 {
1430         char path[sizeof(modparam_fwpostfix) + 32];
1431         struct b43legacy_fw_header *hdr;
1432         u32 size;
1433         int err;
1434
1435         if (!name)
1436                 return 0;
1437
1438         snprintf(path, ARRAY_SIZE(path),
1439                  "b43legacy%s/%s.fw",
1440                  modparam_fwpostfix, name);
1441         err = request_firmware(fw, path, dev->dev->dev);
1442         if (err) {
1443                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1444                        "or load failed.\n", path);
1445                 return err;
1446         }
1447         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1448                 goto err_format;
1449         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1450         switch (hdr->type) {
1451         case B43legacy_FW_TYPE_UCODE:
1452         case B43legacy_FW_TYPE_PCM:
1453                 size = be32_to_cpu(hdr->size);
1454                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1455                         goto err_format;
1456                 /* fallthrough */
1457         case B43legacy_FW_TYPE_IV:
1458                 if (hdr->ver != 1)
1459                         goto err_format;
1460                 break;
1461         default:
1462                 goto err_format;
1463         }
1464
1465         return err;
1466
1467 err_format:
1468         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1469         return -EPROTO;
1470 }
1471
1472 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1473 {
1474         struct b43legacy_firmware *fw = &dev->fw;
1475         const u8 rev = dev->dev->id.revision;
1476         const char *filename;
1477         u32 tmshigh;
1478         int err;
1479
1480         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1481         if (!fw->ucode) {
1482                 if (rev == 2)
1483                         filename = "ucode2";
1484                 else if (rev == 4)
1485                         filename = "ucode4";
1486                 else
1487                         filename = "ucode5";
1488                 err = do_request_fw(dev, filename, &fw->ucode);
1489                 if (err)
1490                         goto err_load;
1491         }
1492         if (!fw->pcm) {
1493                 if (rev < 5)
1494                         filename = "pcm4";
1495                 else
1496                         filename = "pcm5";
1497                 err = do_request_fw(dev, filename, &fw->pcm);
1498                 if (err)
1499                         goto err_load;
1500         }
1501         if (!fw->initvals) {
1502                 switch (dev->phy.type) {
1503                 case B43legacy_PHYTYPE_G:
1504                         if ((rev >= 5) && (rev <= 10))
1505                                 filename = "b0g0initvals5";
1506                         else if (rev == 2 || rev == 4)
1507                                 filename = "b0g0initvals2";
1508                         else
1509                                 goto err_no_initvals;
1510                         break;
1511                 default:
1512                         goto err_no_initvals;
1513                 }
1514                 err = do_request_fw(dev, filename, &fw->initvals);
1515                 if (err)
1516                         goto err_load;
1517         }
1518         if (!fw->initvals_band) {
1519                 switch (dev->phy.type) {
1520                 case B43legacy_PHYTYPE_G:
1521                         if ((rev >= 5) && (rev <= 10))
1522                                 filename = "b0g0bsinitvals5";
1523                         else if (rev >= 11)
1524                                 filename = NULL;
1525                         else if (rev == 2 || rev == 4)
1526                                 filename = NULL;
1527                         else
1528                                 goto err_no_initvals;
1529                         break;
1530                 default:
1531                         goto err_no_initvals;
1532                 }
1533                 err = do_request_fw(dev, filename, &fw->initvals_band);
1534                 if (err)
1535                         goto err_load;
1536         }
1537
1538         return 0;
1539
1540 err_load:
1541         b43legacy_print_fw_helptext(dev->wl);
1542         goto error;
1543
1544 err_no_initvals:
1545         err = -ENODEV;
1546         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1547                "core rev %u\n", dev->phy.type, rev);
1548         goto error;
1549
1550 error:
1551         b43legacy_release_firmware(dev);
1552         return err;
1553 }
1554
1555 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1556 {
1557         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1558         const __be32 *data;
1559         unsigned int i;
1560         unsigned int len;
1561         u16 fwrev;
1562         u16 fwpatch;
1563         u16 fwdate;
1564         u16 fwtime;
1565         u32 tmp;
1566         int err = 0;
1567
1568         /* Upload Microcode. */
1569         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1570         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1571         b43legacy_shm_control_word(dev,
1572                                    B43legacy_SHM_UCODE |
1573                                    B43legacy_SHM_AUTOINC_W,
1574                                    0x0000);
1575         for (i = 0; i < len; i++) {
1576                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1577                                     be32_to_cpu(data[i]));
1578                 udelay(10);
1579         }
1580
1581         if (dev->fw.pcm) {
1582                 /* Upload PCM data. */
1583                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1584                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1585                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1586                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1587                 /* No need for autoinc bit in SHM_HW */
1588                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1589                 for (i = 0; i < len; i++) {
1590                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1591                                           be32_to_cpu(data[i]));
1592                         udelay(10);
1593                 }
1594         }
1595
1596         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1597                           B43legacy_IRQ_ALL);
1598         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1599
1600         /* Wait for the microcode to load and respond */
1601         i = 0;
1602         while (1) {
1603                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1604                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1605                         break;
1606                 i++;
1607                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1608                         b43legacyerr(dev->wl, "Microcode not responding\n");
1609                         b43legacy_print_fw_helptext(dev->wl);
1610                         err = -ENODEV;
1611                         goto out;
1612                 }
1613                 udelay(10);
1614         }
1615         /* dummy read follows */
1616         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1617
1618         /* Get and check the revisions. */
1619         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1620                                      B43legacy_SHM_SH_UCODEREV);
1621         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1622                                        B43legacy_SHM_SH_UCODEPATCH);
1623         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1624                                       B43legacy_SHM_SH_UCODEDATE);
1625         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1626                                       B43legacy_SHM_SH_UCODETIME);
1627
1628         if (fwrev > 0x128) {
1629                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1630                              " Only firmware from binary drivers version 3.x"
1631                              " is supported. You must change your firmware"
1632                              " files.\n");
1633                 b43legacy_print_fw_helptext(dev->wl);
1634                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1635                 err = -EOPNOTSUPP;
1636                 goto out;
1637         }
1638         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1639                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1640                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1641                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1642
1643         dev->fw.rev = fwrev;
1644         dev->fw.patch = fwpatch;
1645
1646 out:
1647         return err;
1648 }
1649
1650 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1651                                     const struct b43legacy_iv *ivals,
1652                                     size_t count,
1653                                     size_t array_size)
1654 {
1655         const struct b43legacy_iv *iv;
1656         u16 offset;
1657         size_t i;
1658         bool bit32;
1659
1660         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1661         iv = ivals;
1662         for (i = 0; i < count; i++) {
1663                 if (array_size < sizeof(iv->offset_size))
1664                         goto err_format;
1665                 array_size -= sizeof(iv->offset_size);
1666                 offset = be16_to_cpu(iv->offset_size);
1667                 bit32 = !!(offset & B43legacy_IV_32BIT);
1668                 offset &= B43legacy_IV_OFFSET_MASK;
1669                 if (offset >= 0x1000)
1670                         goto err_format;
1671                 if (bit32) {
1672                         u32 value;
1673
1674                         if (array_size < sizeof(iv->data.d32))
1675                                 goto err_format;
1676                         array_size -= sizeof(iv->data.d32);
1677
1678                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1679                         b43legacy_write32(dev, offset, value);
1680
1681                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1682                                                         sizeof(__be16) +
1683                                                         sizeof(__be32));
1684                 } else {
1685                         u16 value;
1686
1687                         if (array_size < sizeof(iv->data.d16))
1688                                 goto err_format;
1689                         array_size -= sizeof(iv->data.d16);
1690
1691                         value = be16_to_cpu(iv->data.d16);
1692                         b43legacy_write16(dev, offset, value);
1693
1694                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1695                                                         sizeof(__be16) +
1696                                                         sizeof(__be16));
1697                 }
1698         }
1699         if (array_size)
1700                 goto err_format;
1701
1702         return 0;
1703
1704 err_format:
1705         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1706         b43legacy_print_fw_helptext(dev->wl);
1707
1708         return -EPROTO;
1709 }
1710
1711 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1712 {
1713         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1714         const struct b43legacy_fw_header *hdr;
1715         struct b43legacy_firmware *fw = &dev->fw;
1716         const struct b43legacy_iv *ivals;
1717         size_t count;
1718         int err;
1719
1720         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1721         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1722         count = be32_to_cpu(hdr->size);
1723         err = b43legacy_write_initvals(dev, ivals, count,
1724                                  fw->initvals->size - hdr_len);
1725         if (err)
1726                 goto out;
1727         if (fw->initvals_band) {
1728                 hdr = (const struct b43legacy_fw_header *)
1729                       (fw->initvals_band->data);
1730                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1731                         + hdr_len);
1732                 count = be32_to_cpu(hdr->size);
1733                 err = b43legacy_write_initvals(dev, ivals, count,
1734                                          fw->initvals_band->size - hdr_len);
1735                 if (err)
1736                         goto out;
1737         }
1738 out:
1739
1740         return err;
1741 }
1742
1743 /* Initialize the GPIOs
1744  * http://bcm-specs.sipsolutions.net/GPIO
1745  */
1746 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1747 {
1748         struct ssb_bus *bus = dev->dev->bus;
1749         struct ssb_device *gpiodev, *pcidev = NULL;
1750         u32 mask;
1751         u32 set;
1752
1753         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1754                           b43legacy_read32(dev,
1755                           B43legacy_MMIO_STATUS_BITFIELD)
1756                           & 0xFFFF3FFF);
1757
1758         b43legacy_leds_switch_all(dev, 0);
1759         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1760                           b43legacy_read16(dev,
1761                           B43legacy_MMIO_GPIO_MASK)
1762                           | 0x000F);
1763
1764         mask = 0x0000001F;
1765         set = 0x0000000F;
1766         if (dev->dev->bus->chip_id == 0x4301) {
1767                 mask |= 0x0060;
1768                 set |= 0x0060;
1769         }
1770         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1771                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1772                                   b43legacy_read16(dev,
1773                                   B43legacy_MMIO_GPIO_MASK)
1774                                   | 0x0200);
1775                 mask |= 0x0200;
1776                 set |= 0x0200;
1777         }
1778         if (dev->dev->id.revision >= 2)
1779                 mask  |= 0x0010; /* FIXME: This is redundant. */
1780
1781 #ifdef CONFIG_SSB_DRIVER_PCICORE
1782         pcidev = bus->pcicore.dev;
1783 #endif
1784         gpiodev = bus->chipco.dev ? : pcidev;
1785         if (!gpiodev)
1786                 return 0;
1787         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1788                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1789                      & mask) | set);
1790
1791         return 0;
1792 }
1793
1794 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1795 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1796 {
1797         struct ssb_bus *bus = dev->dev->bus;
1798         struct ssb_device *gpiodev, *pcidev = NULL;
1799
1800 #ifdef CONFIG_SSB_DRIVER_PCICORE
1801         pcidev = bus->pcicore.dev;
1802 #endif
1803         gpiodev = bus->chipco.dev ? : pcidev;
1804         if (!gpiodev)
1805                 return;
1806         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1807 }
1808
1809 /* http://bcm-specs.sipsolutions.net/EnableMac */
1810 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1811 {
1812         dev->mac_suspended--;
1813         B43legacy_WARN_ON(dev->mac_suspended < 0);
1814         if (dev->mac_suspended == 0) {
1815                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1816                                   b43legacy_read32(dev,
1817                                   B43legacy_MMIO_STATUS_BITFIELD)
1818                                   | B43legacy_SBF_MAC_ENABLED);
1819                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1820                                   B43legacy_IRQ_MAC_SUSPENDED);
1821                 /* the next two are dummy reads */
1822                 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1823                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1824                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1825         }
1826 }
1827
1828 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1829 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1830 {
1831         int i;
1832         u32 tmp;
1833
1834         B43legacy_WARN_ON(dev->mac_suspended < 0);
1835         if (dev->mac_suspended == 0) {
1836                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1837                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1838                                   b43legacy_read32(dev,
1839                                   B43legacy_MMIO_STATUS_BITFIELD)
1840                                   & ~B43legacy_SBF_MAC_ENABLED);
1841                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1842                 for (i = 10000; i; i--) {
1843                         tmp = b43legacy_read32(dev,
1844                                                B43legacy_MMIO_GEN_IRQ_REASON);
1845                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1846                                 goto out;
1847                         udelay(1);
1848                 }
1849                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1850         }
1851 out:
1852         dev->mac_suspended++;
1853 }
1854
1855 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1856 {
1857         struct b43legacy_wl *wl = dev->wl;
1858         u32 ctl;
1859         u16 cfp_pretbtt;
1860
1861         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1862         /* Reset status to STA infrastructure mode. */
1863         ctl &= ~B43legacy_MACCTL_AP;
1864         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1865         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1866         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1867         ctl &= ~B43legacy_MACCTL_PROMISC;
1868         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1869         ctl |= B43legacy_MACCTL_INFRA;
1870
1871         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1872                 ctl |= B43legacy_MACCTL_AP;
1873         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1874                 ctl &= ~B43legacy_MACCTL_INFRA;
1875
1876         if (wl->filter_flags & FIF_CONTROL)
1877                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1878         if (wl->filter_flags & FIF_FCSFAIL)
1879                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1880         if (wl->filter_flags & FIF_PLCPFAIL)
1881                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1882         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1883                 ctl |= B43legacy_MACCTL_PROMISC;
1884         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1885                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1886
1887         /* Workaround: On old hardware the HW-MAC-address-filter
1888          * doesn't work properly, so always run promisc in filter
1889          * it in software. */
1890         if (dev->dev->id.revision <= 4)
1891                 ctl |= B43legacy_MACCTL_PROMISC;
1892
1893         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1894
1895         cfp_pretbtt = 2;
1896         if ((ctl & B43legacy_MACCTL_INFRA) &&
1897             !(ctl & B43legacy_MACCTL_AP)) {
1898                 if (dev->dev->bus->chip_id == 0x4306 &&
1899                     dev->dev->bus->chip_rev == 3)
1900                         cfp_pretbtt = 100;
1901                 else
1902                         cfp_pretbtt = 50;
1903         }
1904         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1905 }
1906
1907 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1908                                         u16 rate,
1909                                         int is_ofdm)
1910 {
1911         u16 offset;
1912
1913         if (is_ofdm) {
1914                 offset = 0x480;
1915                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1916         } else {
1917                 offset = 0x4C0;
1918                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1919         }
1920         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1921                               b43legacy_shm_read16(dev,
1922                               B43legacy_SHM_SHARED, offset));
1923 }
1924
1925 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1926 {
1927         switch (dev->phy.type) {
1928         case B43legacy_PHYTYPE_G:
1929                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1930                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1931                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1932                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1933                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1934                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1935                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1936                 /* fallthrough */
1937         case B43legacy_PHYTYPE_B:
1938                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1939                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1940                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1941                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1942                 break;
1943         default:
1944                 B43legacy_BUG_ON(1);
1945         }
1946 }
1947
1948 /* Set the TX-Antenna for management frames sent by firmware. */
1949 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1950                                           int antenna)
1951 {
1952         u16 ant = 0;
1953         u16 tmp;
1954
1955         switch (antenna) {
1956         case B43legacy_ANTENNA0:
1957                 ant |= B43legacy_TX4_PHY_ANT0;
1958                 break;
1959         case B43legacy_ANTENNA1:
1960                 ant |= B43legacy_TX4_PHY_ANT1;
1961                 break;
1962         case B43legacy_ANTENNA_AUTO:
1963                 ant |= B43legacy_TX4_PHY_ANTLAST;
1964                 break;
1965         default:
1966                 B43legacy_BUG_ON(1);
1967         }
1968
1969         /* FIXME We also need to set the other flags of the PHY control
1970          * field somewhere. */
1971
1972         /* For Beacons */
1973         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1974                                    B43legacy_SHM_SH_BEACPHYCTL);
1975         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1976         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1977                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
1978         /* For ACK/CTS */
1979         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1980                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
1981         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1982         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1983                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
1984         /* For Probe Resposes */
1985         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1986                                    B43legacy_SHM_SH_PRPHYCTL);
1987         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1988         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1989                               B43legacy_SHM_SH_PRPHYCTL, tmp);
1990 }
1991
1992 /* Returns TRUE, if the radio is enabled in hardware. */
1993 static bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
1994 {
1995         if (dev->phy.rev >= 3) {
1996                 if (!(b43legacy_read32(dev, B43legacy_MMIO_RADIO_HWENABLED_HI)
1997                       & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
1998                         return 1;
1999         } else {
2000                 if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
2001                     & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
2002                         return 1;
2003         }
2004         return 0;
2005 }
2006
2007 /* This is the opposite of b43legacy_chip_init() */
2008 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2009 {
2010         b43legacy_radio_turn_off(dev);
2011         if (!modparam_noleds)
2012                 b43legacy_leds_exit(dev);
2013         b43legacy_gpio_cleanup(dev);
2014         /* firmware is released later */
2015 }
2016
2017 /* Initialize the chip
2018  * http://bcm-specs.sipsolutions.net/ChipInit
2019  */
2020 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2021 {
2022         struct b43legacy_phy *phy = &dev->phy;
2023         int err;
2024         int tmp;
2025         u32 value32;
2026         u16 value16;
2027
2028         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2029                           B43legacy_SBF_CORE_READY
2030                           | B43legacy_SBF_400);
2031
2032         err = b43legacy_request_firmware(dev);
2033         if (err)
2034                 goto out;
2035         err = b43legacy_upload_microcode(dev);
2036         if (err)
2037                 goto out; /* firmware is released later */
2038
2039         err = b43legacy_gpio_init(dev);
2040         if (err)
2041                 goto out; /* firmware is released later */
2042         err = b43legacy_upload_initvals(dev);
2043         if (err)
2044                 goto err_gpio_cleanup;
2045         b43legacy_radio_turn_on(dev);
2046
2047         b43legacy_write16(dev, 0x03E6, 0x0000);
2048         err = b43legacy_phy_init(dev);
2049         if (err)
2050                 goto err_radio_off;
2051
2052         /* Select initial Interference Mitigation. */
2053         tmp = phy->interfmode;
2054         phy->interfmode = B43legacy_INTERFMODE_NONE;
2055         b43legacy_radio_set_interference_mitigation(dev, tmp);
2056
2057         b43legacy_phy_set_antenna_diversity(dev);
2058         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2059
2060         if (phy->type == B43legacy_PHYTYPE_B) {
2061                 value16 = b43legacy_read16(dev, 0x005E);
2062                 value16 |= 0x0004;
2063                 b43legacy_write16(dev, 0x005E, value16);
2064         }
2065         b43legacy_write32(dev, 0x0100, 0x01000000);
2066         if (dev->dev->id.revision < 5)
2067                 b43legacy_write32(dev, 0x010C, 0x01000000);
2068
2069         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2070         value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2071         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2072         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2073         value32 |= B43legacy_SBF_MODE_NOTADHOC;
2074         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2075
2076         if (b43legacy_using_pio(dev)) {
2077                 b43legacy_write32(dev, 0x0210, 0x00000100);
2078                 b43legacy_write32(dev, 0x0230, 0x00000100);
2079                 b43legacy_write32(dev, 0x0250, 0x00000100);
2080                 b43legacy_write32(dev, 0x0270, 0x00000100);
2081                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2082                                       0x0000);
2083         }
2084
2085         /* Probe Response Timeout value */
2086         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2087         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2088
2089         /* Initially set the wireless operation mode. */
2090         b43legacy_adjust_opmode(dev);
2091
2092         if (dev->dev->id.revision < 3) {
2093                 b43legacy_write16(dev, 0x060E, 0x0000);
2094                 b43legacy_write16(dev, 0x0610, 0x8000);
2095                 b43legacy_write16(dev, 0x0604, 0x0000);
2096                 b43legacy_write16(dev, 0x0606, 0x0200);
2097         } else {
2098                 b43legacy_write32(dev, 0x0188, 0x80000000);
2099                 b43legacy_write32(dev, 0x018C, 0x02000000);
2100         }
2101         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2102         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2103         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2104         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2105         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2106         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2107         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2108
2109         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2110         value32 |= 0x00100000;
2111         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2112
2113         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2114                           dev->dev->bus->chipco.fast_pwrup_delay);
2115
2116         B43legacy_WARN_ON(err != 0);
2117         b43legacydbg(dev->wl, "Chip initialized\n");
2118 out:
2119         return err;
2120
2121 err_radio_off:
2122         b43legacy_radio_turn_off(dev);
2123 err_gpio_cleanup:
2124         b43legacy_gpio_cleanup(dev);
2125         goto out;
2126 }
2127
2128 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2129 {
2130         struct b43legacy_phy *phy = &dev->phy;
2131
2132         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2133                 return;
2134
2135         b43legacy_mac_suspend(dev);
2136         b43legacy_phy_lo_g_measure(dev);
2137         b43legacy_mac_enable(dev);
2138 }
2139
2140 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2141 {
2142         b43legacy_phy_lo_mark_all_unused(dev);
2143         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2144                 b43legacy_mac_suspend(dev);
2145                 b43legacy_calc_nrssi_slope(dev);
2146                 b43legacy_mac_enable(dev);
2147         }
2148 }
2149
2150 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2151 {
2152         /* Update device statistics. */
2153         b43legacy_calculate_link_quality(dev);
2154 }
2155
2156 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2157 {
2158         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2159 }
2160
2161 static void b43legacy_periodic_every1sec(struct b43legacy_wldev *dev)
2162 {
2163         bool radio_hw_enable;
2164
2165         /* check if radio hardware enabled status changed */
2166         radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2167         if (unlikely(dev->radio_hw_enable != radio_hw_enable)) {
2168                 dev->radio_hw_enable = radio_hw_enable;
2169                 b43legacyinfo(dev->wl, "Radio hardware status changed to %s\n",
2170                        (radio_hw_enable) ? "enabled" : "disabled");
2171                 b43legacy_leds_update(dev, 0);
2172         }
2173 }
2174
2175 static void do_periodic_work(struct b43legacy_wldev *dev)
2176 {
2177         unsigned int state;
2178
2179         state = dev->periodic_state;
2180         if (state % 120 == 0)
2181                 b43legacy_periodic_every120sec(dev);
2182         if (state % 60 == 0)
2183                 b43legacy_periodic_every60sec(dev);
2184         if (state % 30 == 0)
2185                 b43legacy_periodic_every30sec(dev);
2186         if (state % 15 == 0)
2187                 b43legacy_periodic_every15sec(dev);
2188         b43legacy_periodic_every1sec(dev);
2189 }
2190
2191 /* Estimate a "Badness" value based on the periodic work
2192  * state-machine state. "Badness" is worse (bigger), if the
2193  * periodic work will take longer.
2194  */
2195 static int estimate_periodic_work_badness(unsigned int state)
2196 {
2197         int badness = 0;
2198
2199         if (state % 120 == 0) /* every 120 sec */
2200                 badness += 10;
2201         if (state % 60 == 0) /* every 60 sec */
2202                 badness += 5;
2203         if (state % 30 == 0) /* every 30 sec */
2204                 badness += 1;
2205         if (state % 15 == 0) /* every 15 sec */
2206                 badness += 1;
2207
2208 #define BADNESS_LIMIT   4
2209         return badness;
2210 }
2211
2212 static void b43legacy_periodic_work_handler(struct work_struct *work)
2213 {
2214         struct b43legacy_wldev *dev =
2215                              container_of(work, struct b43legacy_wldev,
2216                              periodic_work.work);
2217         unsigned long flags;
2218         unsigned long delay;
2219         u32 savedirqs = 0;
2220         int badness;
2221
2222         mutex_lock(&dev->wl->mutex);
2223
2224         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2225                 goto out;
2226         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2227                 goto out_requeue;
2228
2229         badness = estimate_periodic_work_badness(dev->periodic_state);
2230         if (badness > BADNESS_LIMIT) {
2231                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2232                 /* Suspend TX as we don't want to transmit packets while
2233                  * we recalibrate the hardware. */
2234                 b43legacy_tx_suspend(dev);
2235                 savedirqs = b43legacy_interrupt_disable(dev,
2236                                                           B43legacy_IRQ_ALL);
2237                 /* Periodic work will take a long time, so we want it to
2238                  * be preemtible and release the spinlock. */
2239                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2240                 b43legacy_synchronize_irq(dev);
2241
2242                 do_periodic_work(dev);
2243
2244                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2245                 b43legacy_interrupt_enable(dev, savedirqs);
2246                 b43legacy_tx_resume(dev);
2247                 mmiowb();
2248                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2249         } else {
2250                 /* Take the global driver lock. This will lock any operation. */
2251                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2252
2253                 do_periodic_work(dev);
2254
2255                 mmiowb();
2256                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2257         }
2258         dev->periodic_state++;
2259 out_requeue:
2260         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2261                 delay = msecs_to_jiffies(50);
2262         else
2263                 delay = round_jiffies(HZ);
2264         queue_delayed_work(dev->wl->hw->workqueue,
2265                            &dev->periodic_work, delay);
2266 out:
2267         mutex_unlock(&dev->wl->mutex);
2268 }
2269
2270 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2271 {
2272         struct delayed_work *work = &dev->periodic_work;
2273
2274         dev->periodic_state = 0;
2275         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2276         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2277 }
2278
2279 /* Validate access to the chip (SHM) */
2280 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2281 {
2282         u32 value;
2283         u32 shm_backup;
2284
2285         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2286         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2287         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2288                                  0xAA5555AA)
2289                 goto error;
2290         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2291         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2292                                  0x55AAAA55)
2293                 goto error;
2294         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2295
2296         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2297         if ((value | B43legacy_MACCTL_GMODE) !=
2298             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2299                 goto error;
2300
2301         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2302         if (value)
2303                 goto error;
2304
2305         return 0;
2306 error:
2307         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2308         return -ENODEV;
2309 }
2310
2311 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2312 {
2313         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2314         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2315         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2316                                         0x0056);
2317         /* KTP is a word address, but we address SHM bytewise.
2318          * So multiply by two.
2319          */
2320         dev->ktp *= 2;
2321         if (dev->dev->id.revision >= 5)
2322                 /* Number of RCMTA address slots */
2323                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2324                                   dev->max_nr_keys - 8);
2325 }
2326
2327 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2328 {
2329         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2330         unsigned long flags;
2331
2332         /* Don't take wl->mutex here, as it could deadlock with
2333          * hwrng internal locking. It's not needed to take
2334          * wl->mutex here, anyway. */
2335
2336         spin_lock_irqsave(&wl->irq_lock, flags);
2337         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2338         spin_unlock_irqrestore(&wl->irq_lock, flags);
2339
2340         return (sizeof(u16));
2341 }
2342
2343 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2344 {
2345         if (wl->rng_initialized)
2346                 hwrng_unregister(&wl->rng);
2347 }
2348
2349 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2350 {
2351         int err;
2352
2353         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2354                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2355         wl->rng.name = wl->rng_name;
2356         wl->rng.data_read = b43legacy_rng_read;
2357         wl->rng.priv = (unsigned long)wl;
2358         wl->rng_initialized = 1;
2359         err = hwrng_register(&wl->rng);
2360         if (err) {
2361                 wl->rng_initialized = 0;
2362                 b43legacyerr(wl, "Failed to register the random "
2363                        "number generator (%d)\n", err);
2364         }
2365
2366         return err;
2367 }
2368
2369 static int b43legacy_tx(struct ieee80211_hw *hw,
2370                         struct sk_buff *skb,
2371                         struct ieee80211_tx_control *ctl)
2372 {
2373         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2374         struct b43legacy_wldev *dev = wl->current_dev;
2375         int err = -ENODEV;
2376         unsigned long flags;
2377
2378         if (unlikely(!dev))
2379                 goto out;
2380         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2381                 goto out;
2382         /* DMA-TX is done without a global lock. */
2383         if (b43legacy_using_pio(dev)) {
2384                 spin_lock_irqsave(&wl->irq_lock, flags);
2385                 err = b43legacy_pio_tx(dev, skb, ctl);
2386                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2387         } else
2388                 err = b43legacy_dma_tx(dev, skb, ctl);
2389 out:
2390         if (unlikely(err))
2391                 return NETDEV_TX_BUSY;
2392         return NETDEV_TX_OK;
2393 }
2394
2395 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2396                              int queue,
2397                              const struct ieee80211_tx_queue_params *params)
2398 {
2399         return 0;
2400 }
2401
2402 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2403                                   struct ieee80211_tx_queue_stats *stats)
2404 {
2405         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2406         struct b43legacy_wldev *dev = wl->current_dev;
2407         unsigned long flags;
2408         int err = -ENODEV;
2409
2410         if (!dev)
2411                 goto out;
2412         spin_lock_irqsave(&wl->irq_lock, flags);
2413         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2414                 if (b43legacy_using_pio(dev))
2415                         b43legacy_pio_get_tx_stats(dev, stats);
2416                 else
2417                         b43legacy_dma_get_tx_stats(dev, stats);
2418                 err = 0;
2419         }
2420         spin_unlock_irqrestore(&wl->irq_lock, flags);
2421 out:
2422         return err;
2423 }
2424
2425 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2426                                struct ieee80211_low_level_stats *stats)
2427 {
2428         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2429         unsigned long flags;
2430
2431         spin_lock_irqsave(&wl->irq_lock, flags);
2432         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2433         spin_unlock_irqrestore(&wl->irq_lock, flags);
2434
2435         return 0;
2436 }
2437
2438 static const char *phymode_to_string(unsigned int phymode)
2439 {
2440         switch (phymode) {
2441         case B43legacy_PHYMODE_B:
2442                 return "B";
2443         case B43legacy_PHYMODE_G:
2444                 return "G";
2445         default:
2446                 B43legacy_BUG_ON(1);
2447         }
2448         return "";
2449 }
2450
2451 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2452                                   unsigned int phymode,
2453                                   struct b43legacy_wldev **dev,
2454                                   bool *gmode)
2455 {
2456         struct b43legacy_wldev *d;
2457
2458         list_for_each_entry(d, &wl->devlist, list) {
2459                 if (d->phy.possible_phymodes & phymode) {
2460                         /* Ok, this device supports the PHY-mode.
2461                          * Set the gmode bit. */
2462                         *gmode = 1;
2463                         *dev = d;
2464
2465                         return 0;
2466                 }
2467         }
2468
2469         return -ESRCH;
2470 }
2471
2472 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2473 {
2474         struct ssb_device *sdev = dev->dev;
2475         u32 tmslow;
2476
2477         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2478         tmslow &= ~B43legacy_TMSLOW_GMODE;
2479         tmslow |= B43legacy_TMSLOW_PHYRESET;
2480         tmslow |= SSB_TMSLOW_FGC;
2481         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2482         msleep(1);
2483
2484         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2485         tmslow &= ~SSB_TMSLOW_FGC;
2486         tmslow |= B43legacy_TMSLOW_PHYRESET;
2487         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2488         msleep(1);
2489 }
2490
2491 /* Expects wl->mutex locked */
2492 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2493                                       unsigned int new_mode)
2494 {
2495         struct b43legacy_wldev *up_dev;
2496         struct b43legacy_wldev *down_dev;
2497         int err;
2498         bool gmode = 0;
2499         int prev_status;
2500
2501         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2502         if (err) {
2503                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2504                        phymode_to_string(new_mode));
2505                 return err;
2506         }
2507         if ((up_dev == wl->current_dev) &&
2508             (!!wl->current_dev->phy.gmode == !!gmode))
2509                 /* This device is already running. */
2510                 return 0;
2511         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2512                phymode_to_string(new_mode));
2513         down_dev = wl->current_dev;
2514
2515         prev_status = b43legacy_status(down_dev);
2516         /* Shutdown the currently running core. */
2517         if (prev_status >= B43legacy_STAT_STARTED)
2518                 b43legacy_wireless_core_stop(down_dev);
2519         if (prev_status >= B43legacy_STAT_INITIALIZED)
2520                 b43legacy_wireless_core_exit(down_dev);
2521
2522         if (down_dev != up_dev)
2523                 /* We switch to a different core, so we put PHY into
2524                  * RESET on the old core. */
2525                 b43legacy_put_phy_into_reset(down_dev);
2526
2527         /* Now start the new core. */
2528         up_dev->phy.gmode = gmode;
2529         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2530                 err = b43legacy_wireless_core_init(up_dev);
2531                 if (err) {
2532                         b43legacyerr(wl, "Fatal: Could not initialize device"
2533                                      " for newly selected %s-PHY mode\n",
2534                                      phymode_to_string(new_mode));
2535                         goto init_failure;
2536                 }
2537         }
2538         if (prev_status >= B43legacy_STAT_STARTED) {
2539                 err = b43legacy_wireless_core_start(up_dev);
2540                 if (err) {
2541                         b43legacyerr(wl, "Fatal: Coult not start device for "
2542                                "newly selected %s-PHY mode\n",
2543                                phymode_to_string(new_mode));
2544                         b43legacy_wireless_core_exit(up_dev);
2545                         goto init_failure;
2546                 }
2547         }
2548         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2549
2550         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2551
2552         wl->current_dev = up_dev;
2553
2554         return 0;
2555 init_failure:
2556         /* Whoops, failed to init the new core. No core is operating now. */
2557         wl->current_dev = NULL;
2558         return err;
2559 }
2560
2561 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2562 {
2563         switch (antenna) {
2564         case 0: /* default/diversity */
2565                 return B43legacy_ANTENNA_DEFAULT;
2566         case 1: /* Antenna 0 */
2567                 return B43legacy_ANTENNA0;
2568         case 2: /* Antenna 1 */
2569                 return B43legacy_ANTENNA1;
2570         default:
2571                 return B43legacy_ANTENNA_DEFAULT;
2572         }
2573 }
2574
2575 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2576                                 struct ieee80211_conf *conf)
2577 {
2578         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2579         struct b43legacy_wldev *dev;
2580         struct b43legacy_phy *phy;
2581         unsigned long flags;
2582         unsigned int new_phymode = 0xFFFF;
2583         int antenna_tx;
2584         int antenna_rx;
2585         int err = 0;
2586         u32 savedirqs;
2587
2588         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2589         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2590
2591         mutex_lock(&wl->mutex);
2592
2593         /* Switch the PHY mode (if necessary). */
2594         switch (conf->phymode) {
2595         case MODE_IEEE80211B:
2596                 new_phymode = B43legacy_PHYMODE_B;
2597                 break;
2598         case MODE_IEEE80211G:
2599                 new_phymode = B43legacy_PHYMODE_G;
2600                 break;
2601         default:
2602                 B43legacy_WARN_ON(1);
2603         }
2604         err = b43legacy_switch_phymode(wl, new_phymode);
2605         if (err)
2606                 goto out_unlock_mutex;
2607         dev = wl->current_dev;
2608         phy = &dev->phy;
2609
2610         /* Disable IRQs while reconfiguring the device.
2611          * This makes it possible to drop the spinlock throughout
2612          * the reconfiguration process. */
2613         spin_lock_irqsave(&wl->irq_lock, flags);
2614         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2615                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2616                 goto out_unlock_mutex;
2617         }
2618         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2619         spin_unlock_irqrestore(&wl->irq_lock, flags);
2620         b43legacy_synchronize_irq(dev);
2621
2622         /* Switch to the requested channel.
2623          * The firmware takes care of races with the TX handler. */
2624         if (conf->channel_val != phy->channel)
2625                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2626
2627         /* Enable/Disable ShortSlot timing. */
2628         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2629              != dev->short_slot) {
2630                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2631                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2632                         b43legacy_short_slot_timing_enable(dev);
2633                 else
2634                         b43legacy_short_slot_timing_disable(dev);
2635         }
2636
2637         /* Adjust the desired TX power level. */
2638         if (conf->power_level != 0) {
2639                 if (conf->power_level != phy->power_level) {
2640                         phy->power_level = conf->power_level;
2641                         b43legacy_phy_xmitpower(dev);
2642                 }
2643         }
2644
2645         /* Antennas for RX and management frame TX. */
2646         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2647
2648         /* Update templates for AP mode. */
2649         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2650                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2651
2652
2653         if (!!conf->radio_enabled != phy->radio_on) {
2654                 if (conf->radio_enabled) {
2655                         b43legacy_radio_turn_on(dev);
2656                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2657                         if (!dev->radio_hw_enable)
2658                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2659                                               " button still turns the radio"
2660                                               " physically off. Press the"
2661                                               " button to turn it on.\n");
2662                 } else {
2663                         b43legacy_radio_turn_off(dev);
2664                         b43legacyinfo(dev->wl, "Radio turned off by"
2665                                       " software\n");
2666                 }
2667         }
2668
2669         spin_lock_irqsave(&wl->irq_lock, flags);
2670         b43legacy_interrupt_enable(dev, savedirqs);
2671         mmiowb();
2672         spin_unlock_irqrestore(&wl->irq_lock, flags);
2673 out_unlock_mutex:
2674         mutex_unlock(&wl->mutex);
2675
2676         return err;
2677 }
2678
2679 static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
2680                                  enum set_key_cmd cmd,
2681                                  const u8 *local_addr, const u8 *addr,
2682                                  struct ieee80211_key_conf *key)
2683 {
2684         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2685         struct b43legacy_wldev *dev = wl->current_dev;
2686         unsigned long flags;
2687         int err = -EOPNOTSUPP;
2688         DECLARE_MAC_BUF(mac);
2689
2690         if (!dev)
2691                 return -ENODEV;
2692         mutex_lock(&wl->mutex);
2693         spin_lock_irqsave(&wl->irq_lock, flags);
2694
2695         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
2696                 err = -ENODEV;
2697         }
2698         spin_unlock_irqrestore(&wl->irq_lock, flags);
2699         mutex_unlock(&wl->mutex);
2700         b43legacydbg(wl, "Using software based encryption for "
2701                      "mac: %s\n", print_mac(mac, addr));
2702         return err;
2703 }
2704
2705 static void b43legacy_configure_filter(struct ieee80211_hw *hw,
2706                                        unsigned int changed,
2707                                        unsigned int *fflags,
2708                                        int mc_count,
2709                                        struct dev_addr_list *mc_list)
2710 {
2711         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2712         struct b43legacy_wldev *dev = wl->current_dev;
2713         unsigned long flags;
2714
2715         if (!dev) {
2716                 *fflags = 0;
2717                 return;
2718         }
2719
2720         spin_lock_irqsave(&wl->irq_lock, flags);
2721         *fflags &= FIF_PROMISC_IN_BSS |
2722                   FIF_ALLMULTI |
2723                   FIF_FCSFAIL |
2724                   FIF_PLCPFAIL |
2725                   FIF_CONTROL |
2726                   FIF_OTHER_BSS |
2727                   FIF_BCN_PRBRESP_PROMISC;
2728
2729         changed &= FIF_PROMISC_IN_BSS |
2730                    FIF_ALLMULTI |
2731                    FIF_FCSFAIL |
2732                    FIF_PLCPFAIL |
2733                    FIF_CONTROL |
2734                    FIF_OTHER_BSS |
2735                    FIF_BCN_PRBRESP_PROMISC;
2736
2737         wl->filter_flags = *fflags;
2738
2739         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2740                 b43legacy_adjust_opmode(dev);
2741         spin_unlock_irqrestore(&wl->irq_lock, flags);
2742 }
2743
2744 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2745                                       int if_id,
2746                                       struct ieee80211_if_conf *conf)
2747 {
2748         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2749         struct b43legacy_wldev *dev = wl->current_dev;
2750         unsigned long flags;
2751
2752         if (!dev)
2753                 return -ENODEV;
2754         mutex_lock(&wl->mutex);
2755         spin_lock_irqsave(&wl->irq_lock, flags);
2756         B43legacy_WARN_ON(wl->if_id != if_id);
2757         if (conf->bssid)
2758                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2759         else
2760                 memset(wl->bssid, 0, ETH_ALEN);
2761         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2762                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2763                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2764                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2765                         if (conf->beacon)
2766                                 b43legacy_refresh_templates(dev, conf->beacon);
2767                 }
2768                 b43legacy_write_mac_bssid_templates(dev);
2769         }
2770         spin_unlock_irqrestore(&wl->irq_lock, flags);
2771         mutex_unlock(&wl->mutex);
2772
2773         return 0;
2774 }
2775
2776 /* Locking: wl->mutex */
2777 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2778 {
2779         struct b43legacy_wl *wl = dev->wl;
2780         unsigned long flags;
2781
2782         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2783                 return;
2784         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2785
2786         mutex_unlock(&wl->mutex);
2787         /* Must unlock as it would otherwise deadlock. No races here.
2788          * Cancel the possibly running self-rearming periodic work. */
2789         cancel_delayed_work_sync(&dev->periodic_work);
2790         mutex_lock(&wl->mutex);
2791
2792         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2793
2794         /* Disable and sync interrupts. */
2795         spin_lock_irqsave(&wl->irq_lock, flags);
2796         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2797                                                           B43legacy_IRQ_ALL);
2798         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2799         spin_unlock_irqrestore(&wl->irq_lock, flags);
2800         b43legacy_synchronize_irq(dev);
2801
2802         b43legacy_mac_suspend(dev);
2803         free_irq(dev->dev->irq, dev);
2804         b43legacydbg(wl, "Wireless interface stopped\n");
2805 }
2806
2807 /* Locking: wl->mutex */
2808 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2809 {
2810         int err;
2811
2812         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2813
2814         drain_txstatus_queue(dev);
2815         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2816                           IRQF_SHARED, KBUILD_MODNAME, dev);
2817         if (err) {
2818                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2819                        dev->dev->irq);
2820                 goto out;
2821         }
2822         /* We are ready to run. */
2823         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2824
2825         /* Start data flow (TX/RX) */
2826         b43legacy_mac_enable(dev);
2827         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2828         ieee80211_start_queues(dev->wl->hw);
2829
2830         /* Start maintenance work */
2831         b43legacy_periodic_tasks_setup(dev);
2832
2833         b43legacydbg(dev->wl, "Wireless interface started\n");
2834 out:
2835         return err;
2836 }
2837
2838 /* Get PHY and RADIO versioning numbers */
2839 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2840 {
2841         struct b43legacy_phy *phy = &dev->phy;
2842         u32 tmp;
2843         u8 analog_type;
2844         u8 phy_type;
2845         u8 phy_rev;
2846         u16 radio_manuf;
2847         u16 radio_ver;
2848         u16 radio_rev;
2849         int unsupported = 0;
2850
2851         /* Get PHY versioning */
2852         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2853         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2854                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2855         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2856         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2857         switch (phy_type) {
2858         case B43legacy_PHYTYPE_B:
2859                 if (phy_rev != 2 && phy_rev != 4
2860                     && phy_rev != 6 && phy_rev != 7)
2861                         unsupported = 1;
2862                 break;
2863         case B43legacy_PHYTYPE_G:
2864                 if (phy_rev > 8)
2865                         unsupported = 1;
2866                 break;
2867         default:
2868                 unsupported = 1;
2869         };
2870         if (unsupported) {
2871                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2872                        "(Analog %u, Type %u, Revision %u)\n",
2873                        analog_type, phy_type, phy_rev);
2874                 return -EOPNOTSUPP;
2875         }
2876         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2877                analog_type, phy_type, phy_rev);
2878
2879
2880         /* Get RADIO versioning */
2881         if (dev->dev->bus->chip_id == 0x4317) {
2882                 if (dev->dev->bus->chip_rev == 0)
2883                         tmp = 0x3205017F;
2884                 else if (dev->dev->bus->chip_rev == 1)
2885                         tmp = 0x4205017F;
2886                 else
2887                         tmp = 0x5205017F;
2888         } else {
2889                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2890                                   B43legacy_RADIOCTL_ID);
2891                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2892                 tmp <<= 16;
2893                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2894                                   B43legacy_RADIOCTL_ID);
2895                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2896         }
2897         radio_manuf = (tmp & 0x00000FFF);
2898         radio_ver = (tmp & 0x0FFFF000) >> 12;
2899         radio_rev = (tmp & 0xF0000000) >> 28;
2900         switch (phy_type) {
2901         case B43legacy_PHYTYPE_B:
2902                 if ((radio_ver & 0xFFF0) != 0x2050)
2903                         unsupported = 1;
2904                 break;
2905         case B43legacy_PHYTYPE_G:
2906                 if (radio_ver != 0x2050)
2907                         unsupported = 1;
2908                 break;
2909         default:
2910                 B43legacy_BUG_ON(1);
2911         }
2912         if (unsupported) {
2913                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2914                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2915                        radio_manuf, radio_ver, radio_rev);
2916                 return -EOPNOTSUPP;
2917         }
2918         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2919                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2920
2921
2922         phy->radio_manuf = radio_manuf;
2923         phy->radio_ver = radio_ver;
2924         phy->radio_rev = radio_rev;
2925
2926         phy->analog = analog_type;
2927         phy->type = phy_type;
2928         phy->rev = phy_rev;
2929
2930         return 0;
2931 }
2932
2933 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2934                                       struct b43legacy_phy *phy)
2935 {
2936         struct b43legacy_lopair *lo;
2937         int i;
2938
2939         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2940         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2941
2942         /* Flags */
2943         phy->locked = 0;
2944         /* Assume the radio is enabled. If it's not enabled, the state will
2945          * immediately get fixed on the first periodic work run. */
2946         dev->radio_hw_enable = 1;
2947
2948         phy->savedpctlreg = 0xFFFF;
2949         phy->aci_enable = 0;
2950         phy->aci_wlan_automatic = 0;
2951         phy->aci_hw_rssi = 0;
2952
2953         lo = phy->_lo_pairs;
2954         if (lo)
2955                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2956                                      B43legacy_LO_COUNT);
2957         phy->max_lb_gain = 0;
2958         phy->trsw_rx_gain = 0;
2959
2960         /* Set default attenuation values. */
2961         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2962         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2963         phy->txctl1 = b43legacy_default_txctl1(dev);
2964         phy->txpwr_offset = 0;
2965
2966         /* NRSSI */
2967         phy->nrssislope = 0;
2968         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2969                 phy->nrssi[i] = -1000;
2970         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2971                 phy->nrssi_lt[i] = i;
2972
2973         phy->lofcal = 0xFFFF;
2974         phy->initval = 0xFFFF;
2975
2976         spin_lock_init(&phy->lock);
2977         phy->interfmode = B43legacy_INTERFMODE_NONE;
2978         phy->channel = 0xFF;
2979 }
2980
2981 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2982 {
2983         /* Flags */
2984         dev->reg124_set_0x4 = 0;
2985
2986         /* Stats */
2987         memset(&dev->stats, 0, sizeof(dev->stats));
2988
2989         setup_struct_phy_for_init(dev, &dev->phy);
2990
2991         /* IRQ related flags */
2992         dev->irq_reason = 0;
2993         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2994         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2995
2996         dev->mac_suspended = 1;
2997
2998         /* Noise calculation context */
2999         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3000 }
3001
3002 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
3003 {
3004 #ifdef CONFIG_SSB_DRIVER_PCICORE
3005         struct ssb_bus *bus = dev->dev->bus;
3006         u32 tmp;
3007
3008         if (bus->pcicore.dev &&
3009             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
3010             bus->pcicore.dev->id.revision <= 5) {
3011                 /* IMCFGLO timeouts workaround. */
3012                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
3013                 tmp &= ~SSB_IMCFGLO_REQTO;
3014                 tmp &= ~SSB_IMCFGLO_SERTO;
3015                 switch (bus->bustype) {
3016                 case SSB_BUSTYPE_PCI:
3017                 case SSB_BUSTYPE_PCMCIA:
3018                         tmp |= 0x32;
3019                         break;
3020                 case SSB_BUSTYPE_SSB:
3021                         tmp |= 0x53;
3022                         break;
3023                 }
3024                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
3025         }
3026 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3027 }
3028
3029 /* Shutdown a wireless core */
3030 /* Locking: wl->mutex */
3031 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3032 {
3033         struct b43legacy_wl *wl = dev->wl;
3034         struct b43legacy_phy *phy = &dev->phy;
3035
3036         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3037         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3038                 return;
3039         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3040
3041         mutex_unlock(&wl->mutex);
3042         /* Must unlock as it would otherwise deadlock. No races here.
3043          * Cancel possibly pending workqueues. */
3044         cancel_work_sync(&dev->restart_work);
3045         mutex_lock(&wl->mutex);
3046
3047         b43legacy_rng_exit(dev->wl);
3048         b43legacy_pio_free(dev);
3049         b43legacy_dma_free(dev);
3050         b43legacy_chip_exit(dev);
3051         b43legacy_radio_turn_off(dev);
3052         b43legacy_switch_analog(dev, 0);
3053         if (phy->dyn_tssi_tbl)
3054                 kfree(phy->tssi2dbm);
3055         kfree(phy->lo_control);
3056         phy->lo_control = NULL;
3057         ssb_device_disable(dev->dev, 0);
3058         ssb_bus_may_powerdown(dev->dev->bus);
3059 }
3060
3061 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3062 {
3063         struct b43legacy_phy *phy = &dev->phy;
3064         int i;
3065
3066         /* Set default attenuation values. */
3067         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3068         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3069         phy->txctl1 = b43legacy_default_txctl1(dev);
3070         phy->txctl2 = 0xFFFF;
3071         phy->txpwr_offset = 0;
3072
3073         /* NRSSI */
3074         phy->nrssislope = 0;
3075         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3076                 phy->nrssi[i] = -1000;
3077         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3078                 phy->nrssi_lt[i] = i;
3079
3080         phy->lofcal = 0xFFFF;
3081         phy->initval = 0xFFFF;
3082
3083         phy->aci_enable = 0;
3084         phy->aci_wlan_automatic = 0;
3085         phy->aci_hw_rssi = 0;
3086
3087         phy->antenna_diversity = 0xFFFF;
3088         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3089         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3090
3091         /* Flags */
3092         phy->calibrated = 0;
3093         phy->locked = 0;
3094
3095         if (phy->_lo_pairs)
3096                 memset(phy->_lo_pairs, 0,
3097                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3098         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3099 }
3100
3101 /* Initialize a wireless core */
3102 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3103 {
3104         struct b43legacy_wl *wl = dev->wl;
3105         struct ssb_bus *bus = dev->dev->bus;
3106         struct b43legacy_phy *phy = &dev->phy;
3107         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3108         int err;
3109         u32 hf;
3110         u32 tmp;
3111
3112         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3113
3114         err = ssb_bus_powerup(bus, 0);
3115         if (err)
3116                 goto out;
3117         if (!ssb_device_is_enabled(dev->dev)) {
3118                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3119                 b43legacy_wireless_core_reset(dev, tmp);
3120         }
3121
3122         if ((phy->type == B43legacy_PHYTYPE_B) ||
3123             (phy->type == B43legacy_PHYTYPE_G)) {
3124                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3125                                          * B43legacy_LO_COUNT,
3126                                          GFP_KERNEL);
3127                 if (!phy->_lo_pairs)
3128                         return -ENOMEM;
3129         }
3130         setup_struct_wldev_for_init(dev);
3131
3132         err = b43legacy_phy_init_tssi2dbm_table(dev);
3133         if (err)
3134                 goto err_kfree_lo_control;
3135
3136         /* Enable IRQ routing to this device. */
3137         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3138
3139         b43legacy_imcfglo_timeouts_workaround(dev);
3140         prepare_phy_data_for_init(dev);
3141         b43legacy_phy_calibrate(dev);
3142         err = b43legacy_chip_init(dev);
3143         if (err)
3144                 goto err_kfree_tssitbl;
3145         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3146                               B43legacy_SHM_SH_WLCOREREV,
3147                               dev->dev->id.revision);
3148         hf = b43legacy_hf_read(dev);
3149         if (phy->type == B43legacy_PHYTYPE_G) {
3150                 hf |= B43legacy_HF_SYMW;
3151                 if (phy->rev == 1)
3152                         hf |= B43legacy_HF_GDCW;
3153                 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3154                         hf |= B43legacy_HF_OFDMPABOOST;
3155         } else if (phy->type == B43legacy_PHYTYPE_B) {
3156                 hf |= B43legacy_HF_SYMW;
3157                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3158                         hf &= ~B43legacy_HF_GDCW;
3159         }
3160         b43legacy_hf_write(dev, hf);
3161
3162         /* Short/Long Retry Limit.
3163          * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3164          * the chip-internal counter.
3165          */
3166         tmp = limit_value(modparam_short_retry, 0, 0xF);
3167         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3168                               0x0006, tmp);
3169         tmp = limit_value(modparam_long_retry, 0, 0xF);
3170         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3171                               0x0007, tmp);
3172
3173         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3174                               0x0044, 3);
3175         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3176                               0x0046, 2);
3177
3178         /* Disable sending probe responses from firmware.
3179          * Setting the MaxTime to one usec will always trigger
3180          * a timeout, so we never send any probe resp.
3181          * A timeout of zero is infinite. */
3182         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3183                               B43legacy_SHM_SH_PRMAXTIME, 1);
3184
3185         b43legacy_rate_memory_init(dev);
3186
3187         /* Minimum Contention Window */
3188         if (phy->type == B43legacy_PHYTYPE_B)
3189                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3190                                       0x0003, 31);
3191         else
3192                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3193                                       0x0003, 15);
3194         /* Maximum Contention Window */
3195         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3196                               0x0004, 1023);
3197
3198         do {
3199                 if (b43legacy_using_pio(dev))
3200                         err = b43legacy_pio_init(dev);
3201                 else {
3202                         err = b43legacy_dma_init(dev);
3203                         if (!err)
3204                                 b43legacy_qos_init(dev);
3205                 }
3206         } while (err == -EAGAIN);
3207         if (err)
3208                 goto err_chip_exit;
3209
3210         b43legacy_write16(dev, 0x0612, 0x0050);
3211         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3212         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3213
3214         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3215         memset(wl->bssid, 0, ETH_ALEN);
3216         memset(wl->mac_addr, 0, ETH_ALEN);
3217         b43legacy_upload_card_macaddress(dev);
3218         b43legacy_security_init(dev);
3219         b43legacy_rng_init(wl);
3220
3221         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3222
3223 out:
3224         return err;
3225
3226 err_chip_exit:
3227         b43legacy_chip_exit(dev);
3228 err_kfree_tssitbl:
3229         if (phy->dyn_tssi_tbl)
3230                 kfree(phy->tssi2dbm);
3231 err_kfree_lo_control:
3232         kfree(phy->lo_control);
3233         phy->lo_control = NULL;
3234         ssb_bus_may_powerdown(bus);
3235         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3236         return err;
3237 }
3238
3239 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3240                                    struct ieee80211_if_init_conf *conf)
3241 {
3242         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3243         struct b43legacy_wldev *dev;
3244         unsigned long flags;
3245         int err = -EOPNOTSUPP;
3246
3247         /* TODO: allow WDS/AP devices to coexist */
3248
3249         if (conf->type != IEEE80211_IF_TYPE_AP &&
3250             conf->type != IEEE80211_IF_TYPE_STA &&
3251             conf->type != IEEE80211_IF_TYPE_WDS &&
3252             conf->type != IEEE80211_IF_TYPE_IBSS)
3253                 return -EOPNOTSUPP;
3254
3255         mutex_lock(&wl->mutex);
3256         if (wl->operating)
3257                 goto out_mutex_unlock;
3258
3259         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3260
3261         dev = wl->current_dev;
3262         wl->operating = 1;
3263         wl->if_id = conf->if_id;
3264         wl->if_type = conf->type;
3265         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3266
3267         spin_lock_irqsave(&wl->irq_lock, flags);
3268         b43legacy_adjust_opmode(dev);
3269         b43legacy_upload_card_macaddress(dev);
3270         spin_unlock_irqrestore(&wl->irq_lock, flags);
3271
3272         err = 0;
3273  out_mutex_unlock:
3274         mutex_unlock(&wl->mutex);
3275
3276         return err;
3277 }
3278
3279 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3280                                        struct ieee80211_if_init_conf *conf)
3281 {
3282         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3283         struct b43legacy_wldev *dev = wl->current_dev;
3284         unsigned long flags;
3285
3286         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3287
3288         mutex_lock(&wl->mutex);
3289
3290         B43legacy_WARN_ON(!wl->operating);
3291         B43legacy_WARN_ON(wl->if_id != conf->if_id);
3292
3293         wl->operating = 0;
3294
3295         spin_lock_irqsave(&wl->irq_lock, flags);
3296         b43legacy_adjust_opmode(dev);
3297         memset(wl->mac_addr, 0, ETH_ALEN);
3298         b43legacy_upload_card_macaddress(dev);
3299         spin_unlock_irqrestore(&wl->irq_lock, flags);
3300
3301         mutex_unlock(&wl->mutex);
3302 }
3303
3304 static int b43legacy_start(struct ieee80211_hw *hw)
3305 {
3306         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3307         struct b43legacy_wldev *dev = wl->current_dev;
3308         int did_init = 0;
3309         int err = 0;
3310
3311         mutex_lock(&wl->mutex);
3312
3313         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3314                 err = b43legacy_wireless_core_init(dev);
3315                 if (err)
3316                         goto out_mutex_unlock;
3317                 did_init = 1;
3318         }
3319
3320         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3321                 err = b43legacy_wireless_core_start(dev);
3322                 if (err) {
3323                         if (did_init)
3324                                 b43legacy_wireless_core_exit(dev);
3325                         goto out_mutex_unlock;
3326                 }
3327         }
3328
3329 out_mutex_unlock:
3330         mutex_unlock(&wl->mutex);
3331
3332         return err;
3333 }
3334
3335 void b43legacy_stop(struct ieee80211_hw *hw)
3336 {
3337         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3338         struct b43legacy_wldev *dev = wl->current_dev;
3339
3340         mutex_lock(&wl->mutex);
3341         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3342                 b43legacy_wireless_core_stop(dev);
3343         b43legacy_wireless_core_exit(dev);
3344         mutex_unlock(&wl->mutex);
3345 }
3346
3347
3348 static const struct ieee80211_ops b43legacy_hw_ops = {
3349         .tx = b43legacy_tx,
3350         .conf_tx = b43legacy_conf_tx,
3351         .add_interface = b43legacy_add_interface,
3352         .remove_interface = b43legacy_remove_interface,
3353         .config = b43legacy_dev_config,
3354         .config_interface = b43legacy_config_interface,
3355         .set_key = b43legacy_dev_set_key,
3356         .configure_filter = b43legacy_configure_filter,
3357         .get_stats = b43legacy_get_stats,
3358         .get_tx_stats = b43legacy_get_tx_stats,
3359         .start = b43legacy_start,
3360         .stop = b43legacy_stop,
3361 };
3362
3363 /* Hard-reset the chip. Do not call this directly.
3364  * Use b43legacy_controller_restart()
3365  */
3366 static void b43legacy_chip_reset(struct work_struct *work)
3367 {
3368         struct b43legacy_wldev *dev =
3369                 container_of(work, struct b43legacy_wldev, restart_work);
3370         struct b43legacy_wl *wl = dev->wl;
3371         int err = 0;
3372         int prev_status;
3373
3374         mutex_lock(&wl->mutex);
3375
3376         prev_status = b43legacy_status(dev);
3377         /* Bring the device down... */
3378         if (prev_status >= B43legacy_STAT_STARTED)
3379                 b43legacy_wireless_core_stop(dev);
3380         if (prev_status >= B43legacy_STAT_INITIALIZED)
3381                 b43legacy_wireless_core_exit(dev);
3382
3383         /* ...and up again. */
3384         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3385                 err = b43legacy_wireless_core_init(dev);
3386                 if (err)
3387                         goto out;
3388         }
3389         if (prev_status >= B43legacy_STAT_STARTED) {
3390                 err = b43legacy_wireless_core_start(dev);
3391                 if (err) {
3392                         b43legacy_wireless_core_exit(dev);
3393                         goto out;
3394                 }
3395         }
3396 out:
3397         mutex_unlock(&wl->mutex);
3398         if (err)
3399                 b43legacyerr(wl, "Controller restart FAILED\n");
3400         else
3401                 b43legacyinfo(wl, "Controller restarted\n");
3402 }
3403
3404 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3405                                  int have_bphy,
3406                                  int have_gphy)
3407 {
3408         struct ieee80211_hw *hw = dev->wl->hw;
3409         struct ieee80211_hw_mode *mode;
3410         struct b43legacy_phy *phy = &dev->phy;
3411         int cnt = 0;
3412         int err;
3413
3414         phy->possible_phymodes = 0;
3415         for (; 1; cnt++) {
3416                 if (have_bphy) {
3417                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3418                         mode = &phy->hwmodes[cnt];
3419
3420                         mode->mode = MODE_IEEE80211B;
3421                         mode->num_channels = b43legacy_bg_chantable_size;
3422                         mode->channels = b43legacy_bg_chantable;
3423                         mode->num_rates = b43legacy_b_ratetable_size;
3424                         mode->rates = b43legacy_b_ratetable;
3425                         err = ieee80211_register_hwmode(hw, mode);
3426                         if (err)
3427                                 return err;
3428
3429                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3430                         have_bphy = 0;
3431                         continue;
3432                 }
3433                 if (have_gphy) {
3434                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3435                         mode = &phy->hwmodes[cnt];
3436
3437                         mode->mode = MODE_IEEE80211G;
3438                         mode->num_channels = b43legacy_bg_chantable_size;
3439                         mode->channels = b43legacy_bg_chantable;
3440                         mode->num_rates = b43legacy_g_ratetable_size;
3441                         mode->rates = b43legacy_g_ratetable;
3442                         err = ieee80211_register_hwmode(hw, mode);
3443                         if (err)
3444                                 return err;
3445
3446                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3447                         have_gphy = 0;
3448                         continue;
3449                 }
3450                 break;
3451         }
3452
3453         return 0;
3454 }
3455
3456 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3457 {
3458         /* We release firmware that late to not be required to re-request
3459          * is all the time when we reinit the core. */
3460         b43legacy_release_firmware(dev);
3461 }
3462
3463 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3464 {
3465         struct b43legacy_wl *wl = dev->wl;
3466         struct ssb_bus *bus = dev->dev->bus;
3467         struct pci_dev *pdev = bus->host_pci;
3468         int err;
3469         int have_bphy = 0;
3470         int have_gphy = 0;
3471         u32 tmp;
3472
3473         /* Do NOT do any device initialization here.
3474          * Do it in wireless_core_init() instead.
3475          * This function is for gathering basic information about the HW, only.
3476          * Also some structs may be set up here. But most likely you want to
3477          * have that in core_init(), too.
3478          */
3479
3480         err = ssb_bus_powerup(bus, 0);
3481         if (err) {
3482                 b43legacyerr(wl, "Bus powerup failed\n");
3483                 goto out;
3484         }
3485         /* Get the PHY type. */
3486         if (dev->dev->id.revision >= 5) {
3487                 u32 tmshigh;
3488
3489                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3490                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3491                 if (!have_gphy)
3492                         have_bphy = 1;
3493         } else if (dev->dev->id.revision == 4)
3494                 have_gphy = 1;
3495         else
3496                 have_bphy = 1;
3497
3498         /* Initialize LEDs structs. */
3499         err = b43legacy_leds_init(dev);
3500         if (err)
3501                 goto err_powerdown;
3502
3503         dev->phy.gmode = (have_gphy || have_bphy);
3504         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3505         b43legacy_wireless_core_reset(dev, tmp);
3506
3507         err = b43legacy_phy_versioning(dev);
3508         if (err)
3509                 goto err_leds_exit;
3510         /* Check if this device supports multiband. */
3511         if (!pdev ||
3512             (pdev->device != 0x4312 &&
3513              pdev->device != 0x4319 &&
3514              pdev->device != 0x4324)) {
3515                 /* No multiband support. */
3516                 have_bphy = 0;
3517                 have_gphy = 0;
3518                 switch (dev->phy.type) {
3519                 case B43legacy_PHYTYPE_B:
3520                         have_bphy = 1;
3521                         break;
3522                 case B43legacy_PHYTYPE_G:
3523                         have_gphy = 1;
3524                         break;
3525                 default:
3526                         B43legacy_BUG_ON(1);
3527                 }
3528         }
3529         dev->phy.gmode = (have_gphy || have_bphy);
3530         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3531         b43legacy_wireless_core_reset(dev, tmp);
3532
3533         err = b43legacy_validate_chipaccess(dev);
3534         if (err)
3535                 goto err_leds_exit;
3536         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3537         if (err)
3538                 goto err_leds_exit;
3539
3540         /* Now set some default "current_dev" */
3541         if (!wl->current_dev)
3542                 wl->current_dev = dev;
3543         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3544
3545         b43legacy_radio_turn_off(dev);
3546         b43legacy_switch_analog(dev, 0);
3547         ssb_device_disable(dev->dev, 0);
3548         ssb_bus_may_powerdown(bus);
3549
3550 out:
3551         return err;
3552
3553 err_leds_exit:
3554         b43legacy_leds_exit(dev);
3555 err_powerdown:
3556         ssb_bus_may_powerdown(bus);
3557         return err;
3558 }
3559
3560 static void b43legacy_one_core_detach(struct ssb_device *dev)
3561 {
3562         struct b43legacy_wldev *wldev;
3563         struct b43legacy_wl *wl;
3564
3565         wldev = ssb_get_drvdata(dev);
3566         wl = wldev->wl;
3567         cancel_work_sync(&wldev->restart_work);
3568         b43legacy_debugfs_remove_device(wldev);
3569         b43legacy_wireless_core_detach(wldev);
3570         list_del(&wldev->list);
3571         wl->nr_devs--;
3572         ssb_set_drvdata(dev, NULL);
3573         kfree(wldev);
3574 }
3575
3576 static int b43legacy_one_core_attach(struct ssb_device *dev,
3577                                      struct b43legacy_wl *wl)
3578 {
3579         struct b43legacy_wldev *wldev;
3580         struct pci_dev *pdev;
3581         int err = -ENOMEM;
3582
3583         if (!list_empty(&wl->devlist)) {
3584                 /* We are not the first core on this chip. */
3585                 pdev = dev->bus->host_pci;
3586                 /* Only special chips support more than one wireless
3587                  * core, although some of the other chips have more than
3588                  * one wireless core as well. Check for this and
3589                  * bail out early.
3590                  */
3591                 if (!pdev ||
3592                     ((pdev->device != 0x4321) &&
3593                      (pdev->device != 0x4313) &&
3594                      (pdev->device != 0x431A))) {
3595                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3596                         return -ENODEV;
3597                 }
3598         }
3599
3600         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3601         if (!wldev)
3602                 goto out;
3603
3604         wldev->dev = dev;
3605         wldev->wl = wl;
3606         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3607         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3608         tasklet_init(&wldev->isr_tasklet,
3609                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3610                      (unsigned long)wldev);
3611         if (modparam_pio)
3612                 wldev->__using_pio = 1;
3613         INIT_LIST_HEAD(&wldev->list);
3614
3615         err = b43legacy_wireless_core_attach(wldev);
3616         if (err)
3617                 goto err_kfree_wldev;
3618
3619         list_add(&wldev->list, &wl->devlist);
3620         wl->nr_devs++;
3621         ssb_set_drvdata(dev, wldev);
3622         b43legacy_debugfs_add_device(wldev);
3623 out:
3624         return err;
3625
3626 err_kfree_wldev:
3627         kfree(wldev);
3628         return err;
3629 }
3630
3631 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3632 {
3633         /* boardflags workarounds */
3634         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3635             bus->boardinfo.type == 0x4E &&
3636             bus->boardinfo.rev > 0x40)
3637                 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3638
3639         /* Convert Antennagain values to Q5.2 */
3640         if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3641                 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3642         bus->sprom.r1.antenna_gain_bg <<= 2;
3643 }
3644
3645 static void b43legacy_wireless_exit(struct ssb_device *dev,
3646                                   struct b43legacy_wl *wl)
3647 {
3648         struct ieee80211_hw *hw = wl->hw;
3649
3650         ssb_set_devtypedata(dev, NULL);
3651         ieee80211_free_hw(hw);
3652 }
3653
3654 static int b43legacy_wireless_init(struct ssb_device *dev)
3655 {
3656         struct ssb_sprom *sprom = &dev->bus->sprom;
3657         struct ieee80211_hw *hw;
3658         struct b43legacy_wl *wl;
3659         int err = -ENOMEM;
3660
3661         b43legacy_sprom_fixup(dev->bus);
3662
3663         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3664         if (!hw) {
3665                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3666                 goto out;
3667         }
3668
3669         /* fill hw info */
3670         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3671                     IEEE80211_HW_RX_INCLUDES_FCS;
3672         hw->max_signal = 100;
3673         hw->max_rssi = -110;
3674         hw->max_noise = -110;
3675         hw->queues = 1; /* FIXME: hardware has more queues */
3676         SET_IEEE80211_DEV(hw, dev->dev);
3677         if (is_valid_ether_addr(sprom->r1.et1mac))
3678                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3679         else
3680                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3681
3682         /* Get and initialize struct b43legacy_wl */
3683         wl = hw_to_b43legacy_wl(hw);
3684         memset(wl, 0, sizeof(*wl));
3685         wl->hw = hw;
3686         spin_lock_init(&wl->irq_lock);
3687         spin_lock_init(&wl->leds_lock);
3688         mutex_init(&wl->mutex);
3689         INIT_LIST_HEAD(&wl->devlist);
3690
3691         ssb_set_devtypedata(dev, wl);
3692         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3693         err = 0;
3694 out:
3695         return err;
3696 }
3697
3698 static int b43legacy_probe(struct ssb_device *dev,
3699                          const struct ssb_device_id *id)
3700 {
3701         struct b43legacy_wl *wl;
3702         int err;
3703         int first = 0;
3704
3705         wl = ssb_get_devtypedata(dev);
3706         if (!wl) {
3707                 /* Probing the first core - setup common struct b43legacy_wl */
3708                 first = 1;
3709                 err = b43legacy_wireless_init(dev);
3710                 if (err)
3711                         goto out;
3712                 wl = ssb_get_devtypedata(dev);
3713                 B43legacy_WARN_ON(!wl);
3714         }
3715         err = b43legacy_one_core_attach(dev, wl);
3716         if (err)
3717                 goto err_wireless_exit;
3718
3719         if (first) {
3720                 err = ieee80211_register_hw(wl->hw);
3721                 if (err)
3722                         goto err_one_core_detach;
3723         }
3724
3725 out:
3726         return err;
3727
3728 err_one_core_detach:
3729         b43legacy_one_core_detach(dev);
3730 err_wireless_exit:
3731         if (first)
3732                 b43legacy_wireless_exit(dev, wl);
3733         return err;
3734 }
3735
3736 static void b43legacy_remove(struct ssb_device *dev)
3737 {
3738         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3739         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3740
3741         B43legacy_WARN_ON(!wl);
3742         if (wl->current_dev == wldev)
3743                 ieee80211_unregister_hw(wl->hw);
3744
3745         b43legacy_one_core_detach(dev);
3746
3747         if (list_empty(&wl->devlist))
3748                 /* Last core on the chip unregistered.
3749                  * We can destroy common struct b43legacy_wl.
3750                  */
3751                 b43legacy_wireless_exit(dev, wl);
3752 }
3753
3754 /* Perform a hardware reset. This can be called from any context. */
3755 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3756                                   const char *reason)
3757 {
3758         /* Must avoid requeueing, if we are in shutdown. */
3759         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3760                 return;
3761         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3762         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3763 }
3764
3765 #ifdef CONFIG_PM
3766
3767 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3768 {
3769         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3770         struct b43legacy_wl *wl = wldev->wl;
3771
3772         b43legacydbg(wl, "Suspending...\n");
3773
3774         mutex_lock(&wl->mutex);
3775         wldev->suspend_init_status = b43legacy_status(wldev);
3776         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3777                 b43legacy_wireless_core_stop(wldev);
3778         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3779                 b43legacy_wireless_core_exit(wldev);
3780         mutex_unlock(&wl->mutex);
3781
3782         b43legacydbg(wl, "Device suspended.\n");
3783
3784         return 0;
3785 }
3786
3787 static int b43legacy_resume(struct ssb_device *dev)
3788 {
3789         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3790         struct b43legacy_wl *wl = wldev->wl;
3791         int err = 0;
3792
3793         b43legacydbg(wl, "Resuming...\n");
3794
3795         mutex_lock(&wl->mutex);
3796         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3797                 err = b43legacy_wireless_core_init(wldev);
3798                 if (err) {
3799                         b43legacyerr(wl, "Resume failed at core init\n");
3800                         goto out;
3801                 }
3802         }
3803         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3804                 err = b43legacy_wireless_core_start(wldev);
3805                 if (err) {
3806                         b43legacy_wireless_core_exit(wldev);
3807                         b43legacyerr(wl, "Resume failed at core start\n");
3808                         goto out;
3809                 }
3810         }
3811         mutex_unlock(&wl->mutex);
3812
3813         b43legacydbg(wl, "Device resumed.\n");
3814 out:
3815         return err;
3816 }
3817
3818 #else   /* CONFIG_PM */
3819 # define b43legacy_suspend      NULL
3820 # define b43legacy_resume               NULL
3821 #endif  /* CONFIG_PM */
3822
3823 static struct ssb_driver b43legacy_ssb_driver = {
3824         .name           = KBUILD_MODNAME,
3825         .id_table       = b43legacy_ssb_tbl,
3826         .probe          = b43legacy_probe,
3827         .remove         = b43legacy_remove,
3828         .suspend        = b43legacy_suspend,
3829         .resume         = b43legacy_resume,
3830 };
3831
3832 static int __init b43legacy_init(void)
3833 {
3834         int err;
3835
3836         b43legacy_debugfs_init();
3837
3838         err = ssb_driver_register(&b43legacy_ssb_driver);
3839         if (err)
3840                 goto err_dfs_exit;
3841
3842         return err;
3843
3844 err_dfs_exit:
3845         b43legacy_debugfs_exit();
3846         return err;
3847 }
3848
3849 static void __exit b43legacy_exit(void)
3850 {
3851         ssb_driver_unregister(&b43legacy_ssb_driver);
3852         b43legacy_debugfs_exit();
3853 }
3854
3855 module_init(b43legacy_init)
3856 module_exit(b43legacy_exit)