Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2  *
3  *  Broadcom B43legacy wireless driver
4  *
5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11  *
12  *  Some parts of the code in this file are derived from the ipw2200
13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
14
15  *  This program is free software; you can redistribute it and/or modify
16  *  it under the terms of the GNU General Public License as published by
17  *  the Free Software Foundation; either version 2 of the License, or
18  *  (at your option) any later version.
19  *
20  *  This program is distributed in the hope that it will be useful,
21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  *  GNU General Public License for more details.
24  *
25  *  You should have received a copy of the GNU General Public License
26  *  along with this program; see the file COPYING.  If not, write to
27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28  *  Boston, MA 02110-1301, USA.
29  *
30  */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/wireless.h>
39 #include <linux/workqueue.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/slab.h>
44 #include <net/dst.h>
45 #include <asm/unaligned.h>
46
47 #include "b43legacy.h"
48 #include "main.h"
49 #include "debugfs.h"
50 #include "phy.h"
51 #include "dma.h"
52 #include "pio.h"
53 #include "sysfs.h"
54 #include "xmit.h"
55 #include "radio.h"
56
57
58 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
59 MODULE_AUTHOR("Martin Langer");
60 MODULE_AUTHOR("Stefano Brivio");
61 MODULE_AUTHOR("Michael Buesch");
62 MODULE_LICENSE("GPL");
63
64 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
65 MODULE_FIRMWARE("b43legacy/ucode2.fw");
66 MODULE_FIRMWARE("b43legacy/ucode4.fw");
67
68 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
69 static int modparam_pio;
70 module_param_named(pio, modparam_pio, int, 0444);
71 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
72 #elif defined(CONFIG_B43LEGACY_DMA)
73 # define modparam_pio   0
74 #elif defined(CONFIG_B43LEGACY_PIO)
75 # define modparam_pio   1
76 #endif
77
78 static int modparam_bad_frames_preempt;
79 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
80 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
81                  " Preemption");
82
83 static char modparam_fwpostfix[16];
84 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
85 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
86
87 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
88 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
89         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
90         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
91         SSB_DEVTABLE_END
92 };
93 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
94
95
96 /* Channel and ratetables are shared for all devices.
97  * They can't be const, because ieee80211 puts some precalculated
98  * data in there. This data is the same for all devices, so we don't
99  * get concurrency issues */
100 #define RATETAB_ENT(_rateid, _flags) \
101         {                                                               \
102                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
103                 .hw_value       = (_rateid),                            \
104                 .flags          = (_flags),                             \
105         }
106 /*
107  * NOTE: When changing this, sync with xmit.c's
108  *       b43legacy_plcp_get_bitrate_idx_* functions!
109  */
110 static struct ieee80211_rate __b43legacy_ratetable[] = {
111         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
112         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
113         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
114         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
115         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
116         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
117         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
118         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
119         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
120         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
121         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
122         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
123 };
124 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
125 #define b43legacy_b_ratetable_size      4
126 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
127 #define b43legacy_g_ratetable_size      12
128
129 #define CHANTAB_ENT(_chanid, _freq) \
130         {                                                       \
131                 .center_freq    = (_freq),                      \
132                 .hw_value       = (_chanid),                    \
133         }
134 static struct ieee80211_channel b43legacy_bg_chantable[] = {
135         CHANTAB_ENT(1, 2412),
136         CHANTAB_ENT(2, 2417),
137         CHANTAB_ENT(3, 2422),
138         CHANTAB_ENT(4, 2427),
139         CHANTAB_ENT(5, 2432),
140         CHANTAB_ENT(6, 2437),
141         CHANTAB_ENT(7, 2442),
142         CHANTAB_ENT(8, 2447),
143         CHANTAB_ENT(9, 2452),
144         CHANTAB_ENT(10, 2457),
145         CHANTAB_ENT(11, 2462),
146         CHANTAB_ENT(12, 2467),
147         CHANTAB_ENT(13, 2472),
148         CHANTAB_ENT(14, 2484),
149 };
150
151 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
152         .channels = b43legacy_bg_chantable,
153         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
154         .bitrates = b43legacy_b_ratetable,
155         .n_bitrates = b43legacy_b_ratetable_size,
156 };
157
158 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
159         .channels = b43legacy_bg_chantable,
160         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
161         .bitrates = b43legacy_g_ratetable,
162         .n_bitrates = b43legacy_g_ratetable_size,
163 };
164
165 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
166 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
167 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
168 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
169
170
171 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
172 {
173         if (!wl || !wl->current_dev)
174                 return 1;
175         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
176                 return 1;
177         /* We are up and running.
178          * Ratelimit the messages to avoid DoS over the net. */
179         return net_ratelimit();
180 }
181
182 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
183 {
184         struct va_format vaf;
185         va_list args;
186
187         if (!b43legacy_ratelimit(wl))
188                 return;
189
190         va_start(args, fmt);
191
192         vaf.fmt = fmt;
193         vaf.va = &args;
194
195         printk(KERN_INFO "b43legacy-%s: %pV",
196                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
197
198         va_end(args);
199 }
200
201 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
202 {
203         struct va_format vaf;
204         va_list args;
205
206         if (!b43legacy_ratelimit(wl))
207                 return;
208
209         va_start(args, fmt);
210
211         vaf.fmt = fmt;
212         vaf.va = &args;
213
214         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
215                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
216
217         va_end(args);
218 }
219
220 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
221 {
222         struct va_format vaf;
223         va_list args;
224
225         if (!b43legacy_ratelimit(wl))
226                 return;
227
228         va_start(args, fmt);
229
230         vaf.fmt = fmt;
231         vaf.va = &args;
232
233         printk(KERN_WARNING "b43legacy-%s warning: %pV",
234                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
235
236         va_end(args);
237 }
238
239 #if B43legacy_DEBUG
240 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
241 {
242         struct va_format vaf;
243         va_list args;
244
245         va_start(args, fmt);
246
247         vaf.fmt = fmt;
248         vaf.va = &args;
249
250         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
251                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
252
253         va_end(args);
254 }
255 #endif /* DEBUG */
256
257 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
258                                 u32 val)
259 {
260         u32 status;
261
262         B43legacy_WARN_ON(offset % 4 != 0);
263
264         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
265         if (status & B43legacy_MACCTL_BE)
266                 val = swab32(val);
267
268         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
269         mmiowb();
270         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
271 }
272
273 static inline
274 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
275                                 u16 routing, u16 offset)
276 {
277         u32 control;
278
279         /* "offset" is the WORD offset. */
280
281         control = routing;
282         control <<= 16;
283         control |= offset;
284         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
285 }
286
287 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
288                        u16 routing, u16 offset)
289 {
290         u32 ret;
291
292         if (routing == B43legacy_SHM_SHARED) {
293                 B43legacy_WARN_ON((offset & 0x0001) != 0);
294                 if (offset & 0x0003) {
295                         /* Unaligned access */
296                         b43legacy_shm_control_word(dev, routing, offset >> 2);
297                         ret = b43legacy_read16(dev,
298                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
299                         ret <<= 16;
300                         b43legacy_shm_control_word(dev, routing,
301                                                      (offset >> 2) + 1);
302                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
303
304                         return ret;
305                 }
306                 offset >>= 2;
307         }
308         b43legacy_shm_control_word(dev, routing, offset);
309         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
310
311         return ret;
312 }
313
314 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
315                            u16 routing, u16 offset)
316 {
317         u16 ret;
318
319         if (routing == B43legacy_SHM_SHARED) {
320                 B43legacy_WARN_ON((offset & 0x0001) != 0);
321                 if (offset & 0x0003) {
322                         /* Unaligned access */
323                         b43legacy_shm_control_word(dev, routing, offset >> 2);
324                         ret = b43legacy_read16(dev,
325                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
326
327                         return ret;
328                 }
329                 offset >>= 2;
330         }
331         b43legacy_shm_control_word(dev, routing, offset);
332         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
333
334         return ret;
335 }
336
337 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
338                            u16 routing, u16 offset,
339                            u32 value)
340 {
341         if (routing == B43legacy_SHM_SHARED) {
342                 B43legacy_WARN_ON((offset & 0x0001) != 0);
343                 if (offset & 0x0003) {
344                         /* Unaligned access */
345                         b43legacy_shm_control_word(dev, routing, offset >> 2);
346                         mmiowb();
347                         b43legacy_write16(dev,
348                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
349                                           (value >> 16) & 0xffff);
350                         mmiowb();
351                         b43legacy_shm_control_word(dev, routing,
352                                                    (offset >> 2) + 1);
353                         mmiowb();
354                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
355                                           value & 0xffff);
356                         return;
357                 }
358                 offset >>= 2;
359         }
360         b43legacy_shm_control_word(dev, routing, offset);
361         mmiowb();
362         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
363 }
364
365 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
366                            u16 value)
367 {
368         if (routing == B43legacy_SHM_SHARED) {
369                 B43legacy_WARN_ON((offset & 0x0001) != 0);
370                 if (offset & 0x0003) {
371                         /* Unaligned access */
372                         b43legacy_shm_control_word(dev, routing, offset >> 2);
373                         mmiowb();
374                         b43legacy_write16(dev,
375                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
376                                           value);
377                         return;
378                 }
379                 offset >>= 2;
380         }
381         b43legacy_shm_control_word(dev, routing, offset);
382         mmiowb();
383         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
384 }
385
386 /* Read HostFlags */
387 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
388 {
389         u32 ret;
390
391         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
392                                    B43legacy_SHM_SH_HOSTFHI);
393         ret <<= 16;
394         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
395                                     B43legacy_SHM_SH_HOSTFLO);
396
397         return ret;
398 }
399
400 /* Write HostFlags */
401 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
402 {
403         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
404                               B43legacy_SHM_SH_HOSTFLO,
405                               (value & 0x0000FFFF));
406         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
407                               B43legacy_SHM_SH_HOSTFHI,
408                               ((value & 0xFFFF0000) >> 16));
409 }
410
411 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
412 {
413         /* We need to be careful. As we read the TSF from multiple
414          * registers, we should take care of register overflows.
415          * In theory, the whole tsf read process should be atomic.
416          * We try to be atomic here, by restaring the read process,
417          * if any of the high registers changed (overflew).
418          */
419         if (dev->dev->id.revision >= 3) {
420                 u32 low;
421                 u32 high;
422                 u32 high2;
423
424                 do {
425                         high = b43legacy_read32(dev,
426                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
427                         low = b43legacy_read32(dev,
428                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
429                         high2 = b43legacy_read32(dev,
430                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
431                 } while (unlikely(high != high2));
432
433                 *tsf = high;
434                 *tsf <<= 32;
435                 *tsf |= low;
436         } else {
437                 u64 tmp;
438                 u16 v0;
439                 u16 v1;
440                 u16 v2;
441                 u16 v3;
442                 u16 test1;
443                 u16 test2;
444                 u16 test3;
445
446                 do {
447                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
448                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
449                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
450                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
451
452                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
453                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
454                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
455                 } while (v3 != test3 || v2 != test2 || v1 != test1);
456
457                 *tsf = v3;
458                 *tsf <<= 48;
459                 tmp = v2;
460                 tmp <<= 32;
461                 *tsf |= tmp;
462                 tmp = v1;
463                 tmp <<= 16;
464                 *tsf |= tmp;
465                 *tsf |= v0;
466         }
467 }
468
469 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
470 {
471         u32 status;
472
473         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
474         status |= B43legacy_MACCTL_TBTTHOLD;
475         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
476         mmiowb();
477 }
478
479 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
480 {
481         u32 status;
482
483         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
484         status &= ~B43legacy_MACCTL_TBTTHOLD;
485         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
486 }
487
488 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
489 {
490         /* Be careful with the in-progress timer.
491          * First zero out the low register, so we have a full
492          * register-overflow duration to complete the operation.
493          */
494         if (dev->dev->id.revision >= 3) {
495                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
496                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
497
498                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
499                 mmiowb();
500                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
501                                     hi);
502                 mmiowb();
503                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
504                                     lo);
505         } else {
506                 u16 v0 = (tsf & 0x000000000000FFFFULL);
507                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
508                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
509                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
510
511                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
512                 mmiowb();
513                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
514                 mmiowb();
515                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
516                 mmiowb();
517                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
518                 mmiowb();
519                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
520         }
521 }
522
523 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
524 {
525         b43legacy_time_lock(dev);
526         b43legacy_tsf_write_locked(dev, tsf);
527         b43legacy_time_unlock(dev);
528 }
529
530 static
531 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
532                              u16 offset, const u8 *mac)
533 {
534         static const u8 zero_addr[ETH_ALEN] = { 0 };
535         u16 data;
536
537         if (!mac)
538                 mac = zero_addr;
539
540         offset |= 0x0020;
541         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
542
543         data = mac[0];
544         data |= mac[1] << 8;
545         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
546         data = mac[2];
547         data |= mac[3] << 8;
548         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
549         data = mac[4];
550         data |= mac[5] << 8;
551         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
552 }
553
554 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
555 {
556         static const u8 zero_addr[ETH_ALEN] = { 0 };
557         const u8 *mac = dev->wl->mac_addr;
558         const u8 *bssid = dev->wl->bssid;
559         u8 mac_bssid[ETH_ALEN * 2];
560         int i;
561         u32 tmp;
562
563         if (!bssid)
564                 bssid = zero_addr;
565         if (!mac)
566                 mac = zero_addr;
567
568         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
569
570         memcpy(mac_bssid, mac, ETH_ALEN);
571         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
572
573         /* Write our MAC address and BSSID to template ram */
574         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
575                 tmp =  (u32)(mac_bssid[i + 0]);
576                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
577                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
578                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
579                 b43legacy_ram_write(dev, 0x20 + i, tmp);
580                 b43legacy_ram_write(dev, 0x78 + i, tmp);
581                 b43legacy_ram_write(dev, 0x478 + i, tmp);
582         }
583 }
584
585 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
586 {
587         b43legacy_write_mac_bssid_templates(dev);
588         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
589                                 dev->wl->mac_addr);
590 }
591
592 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
593                                     u16 slot_time)
594 {
595         /* slot_time is in usec. */
596         if (dev->phy.type != B43legacy_PHYTYPE_G)
597                 return;
598         b43legacy_write16(dev, 0x684, 510 + slot_time);
599         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
600                               slot_time);
601 }
602
603 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
604 {
605         b43legacy_set_slot_time(dev, 9);
606 }
607
608 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
609 {
610         b43legacy_set_slot_time(dev, 20);
611 }
612
613 /* Synchronize IRQ top- and bottom-half.
614  * IRQs must be masked before calling this.
615  * This must not be called with the irq_lock held.
616  */
617 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
618 {
619         synchronize_irq(dev->dev->irq);
620         tasklet_kill(&dev->isr_tasklet);
621 }
622
623 /* DummyTransmission function, as documented on
624  * http://bcm-specs.sipsolutions.net/DummyTransmission
625  */
626 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
627 {
628         struct b43legacy_phy *phy = &dev->phy;
629         unsigned int i;
630         unsigned int max_loop;
631         u16 value;
632         u32 buffer[5] = {
633                 0x00000000,
634                 0x00D40000,
635                 0x00000000,
636                 0x01000000,
637                 0x00000000,
638         };
639
640         switch (phy->type) {
641         case B43legacy_PHYTYPE_B:
642         case B43legacy_PHYTYPE_G:
643                 max_loop = 0xFA;
644                 buffer[0] = 0x000B846E;
645                 break;
646         default:
647                 B43legacy_BUG_ON(1);
648                 return;
649         }
650
651         for (i = 0; i < 5; i++)
652                 b43legacy_ram_write(dev, i * 4, buffer[i]);
653
654         /* dummy read follows */
655         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
656
657         b43legacy_write16(dev, 0x0568, 0x0000);
658         b43legacy_write16(dev, 0x07C0, 0x0000);
659         b43legacy_write16(dev, 0x050C, 0x0000);
660         b43legacy_write16(dev, 0x0508, 0x0000);
661         b43legacy_write16(dev, 0x050A, 0x0000);
662         b43legacy_write16(dev, 0x054C, 0x0000);
663         b43legacy_write16(dev, 0x056A, 0x0014);
664         b43legacy_write16(dev, 0x0568, 0x0826);
665         b43legacy_write16(dev, 0x0500, 0x0000);
666         b43legacy_write16(dev, 0x0502, 0x0030);
667
668         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
669                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
670         for (i = 0x00; i < max_loop; i++) {
671                 value = b43legacy_read16(dev, 0x050E);
672                 if (value & 0x0080)
673                         break;
674                 udelay(10);
675         }
676         for (i = 0x00; i < 0x0A; i++) {
677                 value = b43legacy_read16(dev, 0x050E);
678                 if (value & 0x0400)
679                         break;
680                 udelay(10);
681         }
682         for (i = 0x00; i < 0x0A; i++) {
683                 value = b43legacy_read16(dev, 0x0690);
684                 if (!(value & 0x0100))
685                         break;
686                 udelay(10);
687         }
688         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
689                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
690 }
691
692 /* Turn the Analog ON/OFF */
693 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
694 {
695         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
696 }
697
698 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
699 {
700         u32 tmslow;
701         u32 macctl;
702
703         flags |= B43legacy_TMSLOW_PHYCLKEN;
704         flags |= B43legacy_TMSLOW_PHYRESET;
705         ssb_device_enable(dev->dev, flags);
706         msleep(2); /* Wait for the PLL to turn on. */
707
708         /* Now take the PHY out of Reset again */
709         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
710         tmslow |= SSB_TMSLOW_FGC;
711         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
712         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
713         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
714         msleep(1);
715         tmslow &= ~SSB_TMSLOW_FGC;
716         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
717         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
718         msleep(1);
719
720         /* Turn Analog ON */
721         b43legacy_switch_analog(dev, 1);
722
723         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
724         macctl &= ~B43legacy_MACCTL_GMODE;
725         if (flags & B43legacy_TMSLOW_GMODE) {
726                 macctl |= B43legacy_MACCTL_GMODE;
727                 dev->phy.gmode = 1;
728         } else
729                 dev->phy.gmode = 0;
730         macctl |= B43legacy_MACCTL_IHR_ENABLED;
731         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
732 }
733
734 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
735 {
736         u32 v0;
737         u32 v1;
738         u16 tmp;
739         struct b43legacy_txstatus stat;
740
741         while (1) {
742                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
743                 if (!(v0 & 0x00000001))
744                         break;
745                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
746
747                 stat.cookie = (v0 >> 16);
748                 stat.seq = (v1 & 0x0000FFFF);
749                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
750                 tmp = (v0 & 0x0000FFFF);
751                 stat.frame_count = ((tmp & 0xF000) >> 12);
752                 stat.rts_count = ((tmp & 0x0F00) >> 8);
753                 stat.supp_reason = ((tmp & 0x001C) >> 2);
754                 stat.pm_indicated = !!(tmp & 0x0080);
755                 stat.intermediate = !!(tmp & 0x0040);
756                 stat.for_ampdu = !!(tmp & 0x0020);
757                 stat.acked = !!(tmp & 0x0002);
758
759                 b43legacy_handle_txstatus(dev, &stat);
760         }
761 }
762
763 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
764 {
765         u32 dummy;
766
767         if (dev->dev->id.revision < 5)
768                 return;
769         /* Read all entries from the microcode TXstatus FIFO
770          * and throw them away.
771          */
772         while (1) {
773                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
774                 if (!(dummy & 0x00000001))
775                         break;
776                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
777         }
778 }
779
780 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
781 {
782         u32 val = 0;
783
784         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
785         val <<= 16;
786         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
787
788         return val;
789 }
790
791 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
792 {
793         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
794                               (jssi & 0x0000FFFF));
795         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
796                               (jssi & 0xFFFF0000) >> 16);
797 }
798
799 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
800 {
801         b43legacy_jssi_write(dev, 0x7F7F7F7F);
802         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
803                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
804                           | B43legacy_MACCMD_BGNOISE);
805         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
806                             dev->phy.channel);
807 }
808
809 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
810 {
811         /* Top half of Link Quality calculation. */
812
813         if (dev->noisecalc.calculation_running)
814                 return;
815         dev->noisecalc.channel_at_start = dev->phy.channel;
816         dev->noisecalc.calculation_running = 1;
817         dev->noisecalc.nr_samples = 0;
818
819         b43legacy_generate_noise_sample(dev);
820 }
821
822 static void handle_irq_noise(struct b43legacy_wldev *dev)
823 {
824         struct b43legacy_phy *phy = &dev->phy;
825         u16 tmp;
826         u8 noise[4];
827         u8 i;
828         u8 j;
829         s32 average;
830
831         /* Bottom half of Link Quality calculation. */
832
833         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
834         if (dev->noisecalc.channel_at_start != phy->channel)
835                 goto drop_calculation;
836         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
837         if (noise[0] == 0x7F || noise[1] == 0x7F ||
838             noise[2] == 0x7F || noise[3] == 0x7F)
839                 goto generate_new;
840
841         /* Get the noise samples. */
842         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
843         i = dev->noisecalc.nr_samples;
844         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
846         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
847         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
848         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
849         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
850         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
851         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
852         dev->noisecalc.nr_samples++;
853         if (dev->noisecalc.nr_samples == 8) {
854                 /* Calculate the Link Quality by the noise samples. */
855                 average = 0;
856                 for (i = 0; i < 8; i++) {
857                         for (j = 0; j < 4; j++)
858                                 average += dev->noisecalc.samples[i][j];
859                 }
860                 average /= (8 * 4);
861                 average *= 125;
862                 average += 64;
863                 average /= 128;
864                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
865                                              0x40C);
866                 tmp = (tmp / 128) & 0x1F;
867                 if (tmp >= 8)
868                         average += 2;
869                 else
870                         average -= 25;
871                 if (tmp == 8)
872                         average -= 72;
873                 else
874                         average -= 48;
875
876                 dev->stats.link_noise = average;
877 drop_calculation:
878                 dev->noisecalc.calculation_running = 0;
879                 return;
880         }
881 generate_new:
882         b43legacy_generate_noise_sample(dev);
883 }
884
885 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
886 {
887         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
888                 /* TODO: PS TBTT */
889         } else {
890                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
891                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
892         }
893         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
894                 dev->dfq_valid = 1;
895 }
896
897 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
898 {
899         if (dev->dfq_valid) {
900                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
901                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
902                                   | B43legacy_MACCMD_DFQ_VALID);
903                 dev->dfq_valid = 0;
904         }
905 }
906
907 static void handle_irq_pmq(struct b43legacy_wldev *dev)
908 {
909         u32 tmp;
910
911         /* TODO: AP mode. */
912
913         while (1) {
914                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
915                 if (!(tmp & 0x00000008))
916                         break;
917         }
918         /* 16bit write is odd, but correct. */
919         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
920 }
921
922 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
923                                             const u8 *data, u16 size,
924                                             u16 ram_offset,
925                                             u16 shm_size_offset, u8 rate)
926 {
927         u32 i;
928         u32 tmp;
929         struct b43legacy_plcp_hdr4 plcp;
930
931         plcp.data = 0;
932         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
933         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
934         ram_offset += sizeof(u32);
935         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
936          * So leave the first two bytes of the next write blank.
937          */
938         tmp = (u32)(data[0]) << 16;
939         tmp |= (u32)(data[1]) << 24;
940         b43legacy_ram_write(dev, ram_offset, tmp);
941         ram_offset += sizeof(u32);
942         for (i = 2; i < size; i += sizeof(u32)) {
943                 tmp = (u32)(data[i + 0]);
944                 if (i + 1 < size)
945                         tmp |= (u32)(data[i + 1]) << 8;
946                 if (i + 2 < size)
947                         tmp |= (u32)(data[i + 2]) << 16;
948                 if (i + 3 < size)
949                         tmp |= (u32)(data[i + 3]) << 24;
950                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
951         }
952         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
953                               size + sizeof(struct b43legacy_plcp_hdr6));
954 }
955
956 /* Convert a b43legacy antenna number value to the PHY TX control value. */
957 static u16 b43legacy_antenna_to_phyctl(int antenna)
958 {
959         switch (antenna) {
960         case B43legacy_ANTENNA0:
961                 return B43legacy_TX4_PHY_ANT0;
962         case B43legacy_ANTENNA1:
963                 return B43legacy_TX4_PHY_ANT1;
964         }
965         return B43legacy_TX4_PHY_ANTLAST;
966 }
967
968 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
969                                             u16 ram_offset,
970                                             u16 shm_size_offset)
971 {
972
973         unsigned int i, len, variable_len;
974         const struct ieee80211_mgmt *bcn;
975         const u8 *ie;
976         bool tim_found = 0;
977         unsigned int rate;
978         u16 ctl;
979         int antenna;
980         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
981
982         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
983         len = min((size_t)dev->wl->current_beacon->len,
984                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
985         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
986
987         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
988                                         shm_size_offset, rate);
989
990         /* Write the PHY TX control parameters. */
991         antenna = B43legacy_ANTENNA_DEFAULT;
992         antenna = b43legacy_antenna_to_phyctl(antenna);
993         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
994                                    B43legacy_SHM_SH_BEACPHYCTL);
995         /* We can't send beacons with short preamble. Would get PHY errors. */
996         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
997         ctl &= ~B43legacy_TX4_PHY_ANT;
998         ctl &= ~B43legacy_TX4_PHY_ENC;
999         ctl |= antenna;
1000         ctl |= B43legacy_TX4_PHY_ENC_CCK;
1001         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1002                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
1003
1004         /* Find the position of the TIM and the DTIM_period value
1005          * and write them to SHM. */
1006         ie = bcn->u.beacon.variable;
1007         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1008         for (i = 0; i < variable_len - 2; ) {
1009                 uint8_t ie_id, ie_len;
1010
1011                 ie_id = ie[i];
1012                 ie_len = ie[i + 1];
1013                 if (ie_id == 5) {
1014                         u16 tim_position;
1015                         u16 dtim_period;
1016                         /* This is the TIM Information Element */
1017
1018                         /* Check whether the ie_len is in the beacon data range. */
1019                         if (variable_len < ie_len + 2 + i)
1020                                 break;
1021                         /* A valid TIM is at least 4 bytes long. */
1022                         if (ie_len < 4)
1023                                 break;
1024                         tim_found = 1;
1025
1026                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1027                         tim_position += offsetof(struct ieee80211_mgmt,
1028                                                  u.beacon.variable);
1029                         tim_position += i;
1030
1031                         dtim_period = ie[i + 3];
1032
1033                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1034                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1035                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1036                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1037                         break;
1038                 }
1039                 i += ie_len + 2;
1040         }
1041         if (!tim_found) {
1042                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1043                               "beacon template packet. AP or IBSS operation "
1044                               "may be broken.\n");
1045         } else
1046                 b43legacydbg(dev->wl, "Updated beacon template\n");
1047 }
1048
1049 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1050                                             u16 shm_offset, u16 size,
1051                                             struct ieee80211_rate *rate)
1052 {
1053         struct b43legacy_plcp_hdr4 plcp;
1054         u32 tmp;
1055         __le16 dur;
1056
1057         plcp.data = 0;
1058         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1059         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1060                                                dev->wl->vif,
1061                                                size,
1062                                                rate);
1063         /* Write PLCP in two parts and timing for packet transfer */
1064         tmp = le32_to_cpu(plcp.data);
1065         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1066                               tmp & 0xFFFF);
1067         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1068                               tmp >> 16);
1069         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1070                               le16_to_cpu(dur));
1071 }
1072
1073 /* Instead of using custom probe response template, this function
1074  * just patches custom beacon template by:
1075  * 1) Changing packet type
1076  * 2) Patching duration field
1077  * 3) Stripping TIM
1078  */
1079 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1080                                                u16 *dest_size,
1081                                                struct ieee80211_rate *rate)
1082 {
1083         const u8 *src_data;
1084         u8 *dest_data;
1085         u16 src_size, elem_size, src_pos, dest_pos;
1086         __le16 dur;
1087         struct ieee80211_hdr *hdr;
1088         size_t ie_start;
1089
1090         src_size = dev->wl->current_beacon->len;
1091         src_data = (const u8 *)dev->wl->current_beacon->data;
1092
1093         /* Get the start offset of the variable IEs in the packet. */
1094         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1095         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1096                                                u.beacon.variable));
1097
1098         if (B43legacy_WARN_ON(src_size < ie_start))
1099                 return NULL;
1100
1101         dest_data = kmalloc(src_size, GFP_ATOMIC);
1102         if (unlikely(!dest_data))
1103                 return NULL;
1104
1105         /* Copy the static data and all Information Elements, except the TIM. */
1106         memcpy(dest_data, src_data, ie_start);
1107         src_pos = ie_start;
1108         dest_pos = ie_start;
1109         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1110                 elem_size = src_data[src_pos + 1] + 2;
1111                 if (src_data[src_pos] == 5) {
1112                         /* This is the TIM. */
1113                         continue;
1114                 }
1115                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1116                 dest_pos += elem_size;
1117         }
1118         *dest_size = dest_pos;
1119         hdr = (struct ieee80211_hdr *)dest_data;
1120
1121         /* Set the frame control. */
1122         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1123                                          IEEE80211_STYPE_PROBE_RESP);
1124         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1125                                                dev->wl->vif,
1126                                                *dest_size,
1127                                                rate);
1128         hdr->duration_id = dur;
1129
1130         return dest_data;
1131 }
1132
1133 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1134                                                 u16 ram_offset,
1135                                                 u16 shm_size_offset,
1136                                                 struct ieee80211_rate *rate)
1137 {
1138         const u8 *probe_resp_data;
1139         u16 size;
1140
1141         size = dev->wl->current_beacon->len;
1142         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1143         if (unlikely(!probe_resp_data))
1144                 return;
1145
1146         /* Looks like PLCP headers plus packet timings are stored for
1147          * all possible basic rates
1148          */
1149         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1150                                         &b43legacy_b_ratetable[0]);
1151         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1152                                         &b43legacy_b_ratetable[1]);
1153         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1154                                         &b43legacy_b_ratetable[2]);
1155         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1156                                         &b43legacy_b_ratetable[3]);
1157
1158         size = min((size_t)size,
1159                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1160         b43legacy_write_template_common(dev, probe_resp_data,
1161                                         size, ram_offset,
1162                                         shm_size_offset, rate->hw_value);
1163         kfree(probe_resp_data);
1164 }
1165
1166 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1167 {
1168         struct b43legacy_wl *wl = dev->wl;
1169
1170         if (wl->beacon0_uploaded)
1171                 return;
1172         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1173         /* FIXME: Probe resp upload doesn't really belong here,
1174          *        but we don't use that feature anyway. */
1175         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1176                                       &__b43legacy_ratetable[3]);
1177         wl->beacon0_uploaded = 1;
1178 }
1179
1180 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1181 {
1182         struct b43legacy_wl *wl = dev->wl;
1183
1184         if (wl->beacon1_uploaded)
1185                 return;
1186         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1187         wl->beacon1_uploaded = 1;
1188 }
1189
1190 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1191 {
1192         struct b43legacy_wl *wl = dev->wl;
1193         u32 cmd, beacon0_valid, beacon1_valid;
1194
1195         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1196                 return;
1197
1198         /* This is the bottom half of the asynchronous beacon update. */
1199
1200         /* Ignore interrupt in the future. */
1201         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1202
1203         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1205         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1206
1207         /* Schedule interrupt manually, if busy. */
1208         if (beacon0_valid && beacon1_valid) {
1209                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1210                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1211                 return;
1212         }
1213
1214         if (unlikely(wl->beacon_templates_virgin)) {
1215                 /* We never uploaded a beacon before.
1216                  * Upload both templates now, but only mark one valid. */
1217                 wl->beacon_templates_virgin = 0;
1218                 b43legacy_upload_beacon0(dev);
1219                 b43legacy_upload_beacon1(dev);
1220                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1221                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1222                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1223         } else {
1224                 if (!beacon0_valid) {
1225                         b43legacy_upload_beacon0(dev);
1226                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1227                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1228                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1229                 } else if (!beacon1_valid) {
1230                         b43legacy_upload_beacon1(dev);
1231                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1232                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1233                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1234                 }
1235         }
1236 }
1237
1238 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1239 {
1240         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1241                                          beacon_update_trigger);
1242         struct b43legacy_wldev *dev;
1243
1244         mutex_lock(&wl->mutex);
1245         dev = wl->current_dev;
1246         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1247                 spin_lock_irq(&wl->irq_lock);
1248                 /* Update beacon right away or defer to IRQ. */
1249                 handle_irq_beacon(dev);
1250                 /* The handler might have updated the IRQ mask. */
1251                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1252                                   dev->irq_mask);
1253                 mmiowb();
1254                 spin_unlock_irq(&wl->irq_lock);
1255         }
1256         mutex_unlock(&wl->mutex);
1257 }
1258
1259 /* Asynchronously update the packet templates in template RAM.
1260  * Locking: Requires wl->irq_lock to be locked. */
1261 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1262 {
1263         struct sk_buff *beacon;
1264         /* This is the top half of the ansynchronous beacon update. The bottom
1265          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1266          * sending an invalid beacon. This can happen for example, if the
1267          * firmware transmits a beacon while we are updating it. */
1268
1269         /* We could modify the existing beacon and set the aid bit in the TIM
1270          * field, but that would probably require resizing and moving of data
1271          * within the beacon template. Simply request a new beacon and let
1272          * mac80211 do the hard work. */
1273         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1274         if (unlikely(!beacon))
1275                 return;
1276
1277         if (wl->current_beacon)
1278                 dev_kfree_skb_any(wl->current_beacon);
1279         wl->current_beacon = beacon;
1280         wl->beacon0_uploaded = 0;
1281         wl->beacon1_uploaded = 0;
1282         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1283 }
1284
1285 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1286                                      u16 beacon_int)
1287 {
1288         b43legacy_time_lock(dev);
1289         if (dev->dev->id.revision >= 3) {
1290                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1291                                  (beacon_int << 16));
1292                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1293                                  (beacon_int << 10));
1294         } else {
1295                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1296                 b43legacy_write16(dev, 0x610, beacon_int);
1297         }
1298         b43legacy_time_unlock(dev);
1299         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1300 }
1301
1302 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1303 {
1304 }
1305
1306 /* Interrupt handler bottom-half */
1307 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1308 {
1309         u32 reason;
1310         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1311         u32 merged_dma_reason = 0;
1312         int i;
1313         unsigned long flags;
1314
1315         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1316
1317         B43legacy_WARN_ON(b43legacy_status(dev) <
1318                           B43legacy_STAT_INITIALIZED);
1319
1320         reason = dev->irq_reason;
1321         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1322                 dma_reason[i] = dev->dma_reason[i];
1323                 merged_dma_reason |= dma_reason[i];
1324         }
1325
1326         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1327                 b43legacyerr(dev->wl, "MAC transmission error\n");
1328
1329         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1330                 b43legacyerr(dev->wl, "PHY transmission error\n");
1331                 rmb();
1332                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1333                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1334                                               "restarting the controller\n");
1335                         b43legacy_controller_restart(dev, "PHY TX errors");
1336                 }
1337         }
1338
1339         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1340                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1341                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1342                         b43legacyerr(dev->wl, "Fatal DMA error: "
1343                                "0x%08X, 0x%08X, 0x%08X, "
1344                                "0x%08X, 0x%08X, 0x%08X\n",
1345                                dma_reason[0], dma_reason[1],
1346                                dma_reason[2], dma_reason[3],
1347                                dma_reason[4], dma_reason[5]);
1348                         b43legacy_controller_restart(dev, "DMA error");
1349                         mmiowb();
1350                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1351                         return;
1352                 }
1353                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1354                         b43legacyerr(dev->wl, "DMA error: "
1355                                "0x%08X, 0x%08X, 0x%08X, "
1356                                "0x%08X, 0x%08X, 0x%08X\n",
1357                                dma_reason[0], dma_reason[1],
1358                                dma_reason[2], dma_reason[3],
1359                                dma_reason[4], dma_reason[5]);
1360         }
1361
1362         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1363                 handle_irq_ucode_debug(dev);
1364         if (reason & B43legacy_IRQ_TBTT_INDI)
1365                 handle_irq_tbtt_indication(dev);
1366         if (reason & B43legacy_IRQ_ATIM_END)
1367                 handle_irq_atim_end(dev);
1368         if (reason & B43legacy_IRQ_BEACON)
1369                 handle_irq_beacon(dev);
1370         if (reason & B43legacy_IRQ_PMQ)
1371                 handle_irq_pmq(dev);
1372         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1373                 ;/*TODO*/
1374         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1375                 handle_irq_noise(dev);
1376
1377         /* Check the DMA reason registers for received data. */
1378         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1379                 if (b43legacy_using_pio(dev))
1380                         b43legacy_pio_rx(dev->pio.queue0);
1381                 else
1382                         b43legacy_dma_rx(dev->dma.rx_ring0);
1383         }
1384         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1385         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1386         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1387                 if (b43legacy_using_pio(dev))
1388                         b43legacy_pio_rx(dev->pio.queue3);
1389                 else
1390                         b43legacy_dma_rx(dev->dma.rx_ring3);
1391         }
1392         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1393         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1394
1395         if (reason & B43legacy_IRQ_TX_OK)
1396                 handle_irq_transmit_status(dev);
1397
1398         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1399         mmiowb();
1400         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1401 }
1402
1403 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1404                                u16 base, int queueidx)
1405 {
1406         u16 rxctl;
1407
1408         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1409         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1410                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1411         else
1412                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1413 }
1414
1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1416 {
1417         if (b43legacy_using_pio(dev) &&
1418             (dev->dev->id.revision < 3) &&
1419             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1420                 /* Apply a PIO specific workaround to the dma_reasons */
1421                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1422                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1423                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1424                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1425         }
1426
1427         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1428
1429         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1430                           dev->dma_reason[0]);
1431         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1432                           dev->dma_reason[1]);
1433         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1434                           dev->dma_reason[2]);
1435         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1436                           dev->dma_reason[3]);
1437         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1438                           dev->dma_reason[4]);
1439         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1440                           dev->dma_reason[5]);
1441 }
1442
1443 /* Interrupt handler top-half */
1444 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1445 {
1446         irqreturn_t ret = IRQ_NONE;
1447         struct b43legacy_wldev *dev = dev_id;
1448         u32 reason;
1449
1450         B43legacy_WARN_ON(!dev);
1451
1452         spin_lock(&dev->wl->irq_lock);
1453
1454         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1455                 /* This can only happen on shared IRQ lines. */
1456                 goto out;
1457         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1458         if (reason == 0xffffffff) /* shared IRQ */
1459                 goto out;
1460         ret = IRQ_HANDLED;
1461         reason &= dev->irq_mask;
1462         if (!reason)
1463                 goto out;
1464
1465         dev->dma_reason[0] = b43legacy_read32(dev,
1466                                               B43legacy_MMIO_DMA0_REASON)
1467                                               & 0x0001DC00;
1468         dev->dma_reason[1] = b43legacy_read32(dev,
1469                                               B43legacy_MMIO_DMA1_REASON)
1470                                               & 0x0000DC00;
1471         dev->dma_reason[2] = b43legacy_read32(dev,
1472                                               B43legacy_MMIO_DMA2_REASON)
1473                                               & 0x0000DC00;
1474         dev->dma_reason[3] = b43legacy_read32(dev,
1475                                               B43legacy_MMIO_DMA3_REASON)
1476                                               & 0x0001DC00;
1477         dev->dma_reason[4] = b43legacy_read32(dev,
1478                                               B43legacy_MMIO_DMA4_REASON)
1479                                               & 0x0000DC00;
1480         dev->dma_reason[5] = b43legacy_read32(dev,
1481                                               B43legacy_MMIO_DMA5_REASON)
1482                                               & 0x0000DC00;
1483
1484         b43legacy_interrupt_ack(dev, reason);
1485         /* Disable all IRQs. They are enabled again in the bottom half. */
1486         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1487         /* Save the reason code and call our bottom half. */
1488         dev->irq_reason = reason;
1489         tasklet_schedule(&dev->isr_tasklet);
1490 out:
1491         mmiowb();
1492         spin_unlock(&dev->wl->irq_lock);
1493
1494         return ret;
1495 }
1496
1497 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1498 {
1499         release_firmware(dev->fw.ucode);
1500         dev->fw.ucode = NULL;
1501         release_firmware(dev->fw.pcm);
1502         dev->fw.pcm = NULL;
1503         release_firmware(dev->fw.initvals);
1504         dev->fw.initvals = NULL;
1505         release_firmware(dev->fw.initvals_band);
1506         dev->fw.initvals_band = NULL;
1507 }
1508
1509 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1510 {
1511         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1512                      "Drivers/b43#devicefirmware "
1513                      "and download the correct firmware (version 3).\n");
1514 }
1515
1516 static int do_request_fw(struct b43legacy_wldev *dev,
1517                          const char *name,
1518                          const struct firmware **fw)
1519 {
1520         char path[sizeof(modparam_fwpostfix) + 32];
1521         struct b43legacy_fw_header *hdr;
1522         u32 size;
1523         int err;
1524
1525         if (!name)
1526                 return 0;
1527
1528         snprintf(path, ARRAY_SIZE(path),
1529                  "b43legacy%s/%s.fw",
1530                  modparam_fwpostfix, name);
1531         err = request_firmware(fw, path, dev->dev->dev);
1532         if (err) {
1533                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1534                        "or load failed.\n", path);
1535                 return err;
1536         }
1537         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1538                 goto err_format;
1539         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1540         switch (hdr->type) {
1541         case B43legacy_FW_TYPE_UCODE:
1542         case B43legacy_FW_TYPE_PCM:
1543                 size = be32_to_cpu(hdr->size);
1544                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1545                         goto err_format;
1546                 /* fallthrough */
1547         case B43legacy_FW_TYPE_IV:
1548                 if (hdr->ver != 1)
1549                         goto err_format;
1550                 break;
1551         default:
1552                 goto err_format;
1553         }
1554
1555         return err;
1556
1557 err_format:
1558         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1559         return -EPROTO;
1560 }
1561
1562 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1563 {
1564         struct b43legacy_firmware *fw = &dev->fw;
1565         const u8 rev = dev->dev->id.revision;
1566         const char *filename;
1567         int err;
1568
1569         /* do dummy read */
1570         ssb_read32(dev->dev, SSB_TMSHIGH);
1571         if (!fw->ucode) {
1572                 if (rev == 2)
1573                         filename = "ucode2";
1574                 else if (rev == 4)
1575                         filename = "ucode4";
1576                 else
1577                         filename = "ucode5";
1578                 err = do_request_fw(dev, filename, &fw->ucode);
1579                 if (err)
1580                         goto err_load;
1581         }
1582         if (!fw->pcm) {
1583                 if (rev < 5)
1584                         filename = "pcm4";
1585                 else
1586                         filename = "pcm5";
1587                 err = do_request_fw(dev, filename, &fw->pcm);
1588                 if (err)
1589                         goto err_load;
1590         }
1591         if (!fw->initvals) {
1592                 switch (dev->phy.type) {
1593                 case B43legacy_PHYTYPE_B:
1594                 case B43legacy_PHYTYPE_G:
1595                         if ((rev >= 5) && (rev <= 10))
1596                                 filename = "b0g0initvals5";
1597                         else if (rev == 2 || rev == 4)
1598                                 filename = "b0g0initvals2";
1599                         else
1600                                 goto err_no_initvals;
1601                         break;
1602                 default:
1603                         goto err_no_initvals;
1604                 }
1605                 err = do_request_fw(dev, filename, &fw->initvals);
1606                 if (err)
1607                         goto err_load;
1608         }
1609         if (!fw->initvals_band) {
1610                 switch (dev->phy.type) {
1611                 case B43legacy_PHYTYPE_B:
1612                 case B43legacy_PHYTYPE_G:
1613                         if ((rev >= 5) && (rev <= 10))
1614                                 filename = "b0g0bsinitvals5";
1615                         else if (rev >= 11)
1616                                 filename = NULL;
1617                         else if (rev == 2 || rev == 4)
1618                                 filename = NULL;
1619                         else
1620                                 goto err_no_initvals;
1621                         break;
1622                 default:
1623                         goto err_no_initvals;
1624                 }
1625                 err = do_request_fw(dev, filename, &fw->initvals_band);
1626                 if (err)
1627                         goto err_load;
1628         }
1629
1630         return 0;
1631
1632 err_load:
1633         b43legacy_print_fw_helptext(dev->wl);
1634         goto error;
1635
1636 err_no_initvals:
1637         err = -ENODEV;
1638         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1639                "core rev %u\n", dev->phy.type, rev);
1640         goto error;
1641
1642 error:
1643         b43legacy_release_firmware(dev);
1644         return err;
1645 }
1646
1647 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1648 {
1649         struct wiphy *wiphy = dev->wl->hw->wiphy;
1650         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1651         const __be32 *data;
1652         unsigned int i;
1653         unsigned int len;
1654         u16 fwrev;
1655         u16 fwpatch;
1656         u16 fwdate;
1657         u16 fwtime;
1658         u32 tmp, macctl;
1659         int err = 0;
1660
1661         /* Jump the microcode PSM to offset 0 */
1662         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1663         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1664         macctl |= B43legacy_MACCTL_PSM_JMP0;
1665         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1666         /* Zero out all microcode PSM registers and shared memory. */
1667         for (i = 0; i < 64; i++)
1668                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1669         for (i = 0; i < 4096; i += 2)
1670                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1671
1672         /* Upload Microcode. */
1673         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1674         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1675         b43legacy_shm_control_word(dev,
1676                                    B43legacy_SHM_UCODE |
1677                                    B43legacy_SHM_AUTOINC_W,
1678                                    0x0000);
1679         for (i = 0; i < len; i++) {
1680                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1681                                     be32_to_cpu(data[i]));
1682                 udelay(10);
1683         }
1684
1685         if (dev->fw.pcm) {
1686                 /* Upload PCM data. */
1687                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1688                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1689                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1690                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1691                 /* No need for autoinc bit in SHM_HW */
1692                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1693                 for (i = 0; i < len; i++) {
1694                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1695                                           be32_to_cpu(data[i]));
1696                         udelay(10);
1697                 }
1698         }
1699
1700         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1701                           B43legacy_IRQ_ALL);
1702
1703         /* Start the microcode PSM */
1704         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1705         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1706         macctl |= B43legacy_MACCTL_PSM_RUN;
1707         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1708
1709         /* Wait for the microcode to load and respond */
1710         i = 0;
1711         while (1) {
1712                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1713                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1714                         break;
1715                 i++;
1716                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1717                         b43legacyerr(dev->wl, "Microcode not responding\n");
1718                         b43legacy_print_fw_helptext(dev->wl);
1719                         err = -ENODEV;
1720                         goto error;
1721                 }
1722                 msleep_interruptible(50);
1723                 if (signal_pending(current)) {
1724                         err = -EINTR;
1725                         goto error;
1726                 }
1727         }
1728         /* dummy read follows */
1729         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1730
1731         /* Get and check the revisions. */
1732         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1733                                      B43legacy_SHM_SH_UCODEREV);
1734         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1735                                        B43legacy_SHM_SH_UCODEPATCH);
1736         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1737                                       B43legacy_SHM_SH_UCODEDATE);
1738         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1739                                       B43legacy_SHM_SH_UCODETIME);
1740
1741         if (fwrev > 0x128) {
1742                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1743                              " Only firmware from binary drivers version 3.x"
1744                              " is supported. You must change your firmware"
1745                              " files.\n");
1746                 b43legacy_print_fw_helptext(dev->wl);
1747                 err = -EOPNOTSUPP;
1748                 goto error;
1749         }
1750         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1751                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1752                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1753                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1754                       fwtime & 0x1F);
1755
1756         dev->fw.rev = fwrev;
1757         dev->fw.patch = fwpatch;
1758
1759         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1760                         dev->fw.rev, dev->fw.patch);
1761         wiphy->hw_version = dev->dev->id.coreid;
1762
1763         return 0;
1764
1765 error:
1766         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1767         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1768         macctl |= B43legacy_MACCTL_PSM_JMP0;
1769         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1770
1771         return err;
1772 }
1773
1774 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1775                                     const struct b43legacy_iv *ivals,
1776                                     size_t count,
1777                                     size_t array_size)
1778 {
1779         const struct b43legacy_iv *iv;
1780         u16 offset;
1781         size_t i;
1782         bool bit32;
1783
1784         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1785         iv = ivals;
1786         for (i = 0; i < count; i++) {
1787                 if (array_size < sizeof(iv->offset_size))
1788                         goto err_format;
1789                 array_size -= sizeof(iv->offset_size);
1790                 offset = be16_to_cpu(iv->offset_size);
1791                 bit32 = !!(offset & B43legacy_IV_32BIT);
1792                 offset &= B43legacy_IV_OFFSET_MASK;
1793                 if (offset >= 0x1000)
1794                         goto err_format;
1795                 if (bit32) {
1796                         u32 value;
1797
1798                         if (array_size < sizeof(iv->data.d32))
1799                                 goto err_format;
1800                         array_size -= sizeof(iv->data.d32);
1801
1802                         value = get_unaligned_be32(&iv->data.d32);
1803                         b43legacy_write32(dev, offset, value);
1804
1805                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1806                                                         sizeof(__be16) +
1807                                                         sizeof(__be32));
1808                 } else {
1809                         u16 value;
1810
1811                         if (array_size < sizeof(iv->data.d16))
1812                                 goto err_format;
1813                         array_size -= sizeof(iv->data.d16);
1814
1815                         value = be16_to_cpu(iv->data.d16);
1816                         b43legacy_write16(dev, offset, value);
1817
1818                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1819                                                         sizeof(__be16) +
1820                                                         sizeof(__be16));
1821                 }
1822         }
1823         if (array_size)
1824                 goto err_format;
1825
1826         return 0;
1827
1828 err_format:
1829         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1830         b43legacy_print_fw_helptext(dev->wl);
1831
1832         return -EPROTO;
1833 }
1834
1835 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1836 {
1837         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1838         const struct b43legacy_fw_header *hdr;
1839         struct b43legacy_firmware *fw = &dev->fw;
1840         const struct b43legacy_iv *ivals;
1841         size_t count;
1842         int err;
1843
1844         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1845         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1846         count = be32_to_cpu(hdr->size);
1847         err = b43legacy_write_initvals(dev, ivals, count,
1848                                  fw->initvals->size - hdr_len);
1849         if (err)
1850                 goto out;
1851         if (fw->initvals_band) {
1852                 hdr = (const struct b43legacy_fw_header *)
1853                       (fw->initvals_band->data);
1854                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1855                         + hdr_len);
1856                 count = be32_to_cpu(hdr->size);
1857                 err = b43legacy_write_initvals(dev, ivals, count,
1858                                          fw->initvals_band->size - hdr_len);
1859                 if (err)
1860                         goto out;
1861         }
1862 out:
1863
1864         return err;
1865 }
1866
1867 /* Initialize the GPIOs
1868  * http://bcm-specs.sipsolutions.net/GPIO
1869  */
1870 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1871 {
1872         struct ssb_bus *bus = dev->dev->bus;
1873         struct ssb_device *gpiodev, *pcidev = NULL;
1874         u32 mask;
1875         u32 set;
1876
1877         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1878                           b43legacy_read32(dev,
1879                           B43legacy_MMIO_MACCTL)
1880                           & 0xFFFF3FFF);
1881
1882         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1883                           b43legacy_read16(dev,
1884                           B43legacy_MMIO_GPIO_MASK)
1885                           | 0x000F);
1886
1887         mask = 0x0000001F;
1888         set = 0x0000000F;
1889         if (dev->dev->bus->chip_id == 0x4301) {
1890                 mask |= 0x0060;
1891                 set |= 0x0060;
1892         }
1893         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1894                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1895                                   b43legacy_read16(dev,
1896                                   B43legacy_MMIO_GPIO_MASK)
1897                                   | 0x0200);
1898                 mask |= 0x0200;
1899                 set |= 0x0200;
1900         }
1901         if (dev->dev->id.revision >= 2)
1902                 mask  |= 0x0010; /* FIXME: This is redundant. */
1903
1904 #ifdef CONFIG_SSB_DRIVER_PCICORE
1905         pcidev = bus->pcicore.dev;
1906 #endif
1907         gpiodev = bus->chipco.dev ? : pcidev;
1908         if (!gpiodev)
1909                 return 0;
1910         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1911                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1912                      & mask) | set);
1913
1914         return 0;
1915 }
1916
1917 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1918 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1919 {
1920         struct ssb_bus *bus = dev->dev->bus;
1921         struct ssb_device *gpiodev, *pcidev = NULL;
1922
1923 #ifdef CONFIG_SSB_DRIVER_PCICORE
1924         pcidev = bus->pcicore.dev;
1925 #endif
1926         gpiodev = bus->chipco.dev ? : pcidev;
1927         if (!gpiodev)
1928                 return;
1929         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1930 }
1931
1932 /* http://bcm-specs.sipsolutions.net/EnableMac */
1933 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1934 {
1935         dev->mac_suspended--;
1936         B43legacy_WARN_ON(dev->mac_suspended < 0);
1937         B43legacy_WARN_ON(irqs_disabled());
1938         if (dev->mac_suspended == 0) {
1939                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1940                                   b43legacy_read32(dev,
1941                                   B43legacy_MMIO_MACCTL)
1942                                   | B43legacy_MACCTL_ENABLED);
1943                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1944                                   B43legacy_IRQ_MAC_SUSPENDED);
1945                 /* the next two are dummy reads */
1946                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1947                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1948                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1949
1950                 /* Re-enable IRQs. */
1951                 spin_lock_irq(&dev->wl->irq_lock);
1952                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1953                                   dev->irq_mask);
1954                 spin_unlock_irq(&dev->wl->irq_lock);
1955         }
1956 }
1957
1958 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1959 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1960 {
1961         int i;
1962         u32 tmp;
1963
1964         might_sleep();
1965         B43legacy_WARN_ON(irqs_disabled());
1966         B43legacy_WARN_ON(dev->mac_suspended < 0);
1967
1968         if (dev->mac_suspended == 0) {
1969                 /* Mask IRQs before suspending MAC. Otherwise
1970                  * the MAC stays busy and won't suspend. */
1971                 spin_lock_irq(&dev->wl->irq_lock);
1972                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1973                 spin_unlock_irq(&dev->wl->irq_lock);
1974                 b43legacy_synchronize_irq(dev);
1975
1976                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1977                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1978                                   b43legacy_read32(dev,
1979                                   B43legacy_MMIO_MACCTL)
1980                                   & ~B43legacy_MACCTL_ENABLED);
1981                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1982                 for (i = 40; i; i--) {
1983                         tmp = b43legacy_read32(dev,
1984                                                B43legacy_MMIO_GEN_IRQ_REASON);
1985                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1986                                 goto out;
1987                         msleep(1);
1988                 }
1989                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1990         }
1991 out:
1992         dev->mac_suspended++;
1993 }
1994
1995 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1996 {
1997         struct b43legacy_wl *wl = dev->wl;
1998         u32 ctl;
1999         u16 cfp_pretbtt;
2000
2001         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2002         /* Reset status to STA infrastructure mode. */
2003         ctl &= ~B43legacy_MACCTL_AP;
2004         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2005         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2006         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2007         ctl &= ~B43legacy_MACCTL_PROMISC;
2008         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2009         ctl |= B43legacy_MACCTL_INFRA;
2010
2011         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2012                 ctl |= B43legacy_MACCTL_AP;
2013         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2014                 ctl &= ~B43legacy_MACCTL_INFRA;
2015
2016         if (wl->filter_flags & FIF_CONTROL)
2017                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2018         if (wl->filter_flags & FIF_FCSFAIL)
2019                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2020         if (wl->filter_flags & FIF_PLCPFAIL)
2021                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2022         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
2023                 ctl |= B43legacy_MACCTL_PROMISC;
2024         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2025                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2026
2027         /* Workaround: On old hardware the HW-MAC-address-filter
2028          * doesn't work properly, so always run promisc in filter
2029          * it in software. */
2030         if (dev->dev->id.revision <= 4)
2031                 ctl |= B43legacy_MACCTL_PROMISC;
2032
2033         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2034
2035         cfp_pretbtt = 2;
2036         if ((ctl & B43legacy_MACCTL_INFRA) &&
2037             !(ctl & B43legacy_MACCTL_AP)) {
2038                 if (dev->dev->bus->chip_id == 0x4306 &&
2039                     dev->dev->bus->chip_rev == 3)
2040                         cfp_pretbtt = 100;
2041                 else
2042                         cfp_pretbtt = 50;
2043         }
2044         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2045 }
2046
2047 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2048                                         u16 rate,
2049                                         int is_ofdm)
2050 {
2051         u16 offset;
2052
2053         if (is_ofdm) {
2054                 offset = 0x480;
2055                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2056         } else {
2057                 offset = 0x4C0;
2058                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2059         }
2060         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2061                               b43legacy_shm_read16(dev,
2062                               B43legacy_SHM_SHARED, offset));
2063 }
2064
2065 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2066 {
2067         switch (dev->phy.type) {
2068         case B43legacy_PHYTYPE_G:
2069                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2070                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2071                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2072                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2073                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2074                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2075                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2076                 /* fallthrough */
2077         case B43legacy_PHYTYPE_B:
2078                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2079                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2080                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2081                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2082                 break;
2083         default:
2084                 B43legacy_BUG_ON(1);
2085         }
2086 }
2087
2088 /* Set the TX-Antenna for management frames sent by firmware. */
2089 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2090                                           int antenna)
2091 {
2092         u16 ant = 0;
2093         u16 tmp;
2094
2095         switch (antenna) {
2096         case B43legacy_ANTENNA0:
2097                 ant |= B43legacy_TX4_PHY_ANT0;
2098                 break;
2099         case B43legacy_ANTENNA1:
2100                 ant |= B43legacy_TX4_PHY_ANT1;
2101                 break;
2102         case B43legacy_ANTENNA_AUTO:
2103                 ant |= B43legacy_TX4_PHY_ANTLAST;
2104                 break;
2105         default:
2106                 B43legacy_BUG_ON(1);
2107         }
2108
2109         /* FIXME We also need to set the other flags of the PHY control
2110          * field somewhere. */
2111
2112         /* For Beacons */
2113         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2114                                    B43legacy_SHM_SH_BEACPHYCTL);
2115         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2116         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2117                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2118         /* For ACK/CTS */
2119         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2120                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2121         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2122         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2123                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2124         /* For Probe Resposes */
2125         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2126                                    B43legacy_SHM_SH_PRPHYCTL);
2127         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2128         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2129                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2130 }
2131
2132 /* This is the opposite of b43legacy_chip_init() */
2133 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2134 {
2135         b43legacy_radio_turn_off(dev, 1);
2136         b43legacy_gpio_cleanup(dev);
2137         /* firmware is released later */
2138 }
2139
2140 /* Initialize the chip
2141  * http://bcm-specs.sipsolutions.net/ChipInit
2142  */
2143 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2144 {
2145         struct b43legacy_phy *phy = &dev->phy;
2146         int err;
2147         int tmp;
2148         u32 value32, macctl;
2149         u16 value16;
2150
2151         /* Initialize the MAC control */
2152         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2153         if (dev->phy.gmode)
2154                 macctl |= B43legacy_MACCTL_GMODE;
2155         macctl |= B43legacy_MACCTL_INFRA;
2156         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2157
2158         err = b43legacy_request_firmware(dev);
2159         if (err)
2160                 goto out;
2161         err = b43legacy_upload_microcode(dev);
2162         if (err)
2163                 goto out; /* firmware is released later */
2164
2165         err = b43legacy_gpio_init(dev);
2166         if (err)
2167                 goto out; /* firmware is released later */
2168
2169         err = b43legacy_upload_initvals(dev);
2170         if (err)
2171                 goto err_gpio_clean;
2172         b43legacy_radio_turn_on(dev);
2173
2174         b43legacy_write16(dev, 0x03E6, 0x0000);
2175         err = b43legacy_phy_init(dev);
2176         if (err)
2177                 goto err_radio_off;
2178
2179         /* Select initial Interference Mitigation. */
2180         tmp = phy->interfmode;
2181         phy->interfmode = B43legacy_INTERFMODE_NONE;
2182         b43legacy_radio_set_interference_mitigation(dev, tmp);
2183
2184         b43legacy_phy_set_antenna_diversity(dev);
2185         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2186
2187         if (phy->type == B43legacy_PHYTYPE_B) {
2188                 value16 = b43legacy_read16(dev, 0x005E);
2189                 value16 |= 0x0004;
2190                 b43legacy_write16(dev, 0x005E, value16);
2191         }
2192         b43legacy_write32(dev, 0x0100, 0x01000000);
2193         if (dev->dev->id.revision < 5)
2194                 b43legacy_write32(dev, 0x010C, 0x01000000);
2195
2196         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2197         value32 &= ~B43legacy_MACCTL_INFRA;
2198         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2199         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2200         value32 |= B43legacy_MACCTL_INFRA;
2201         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2202
2203         if (b43legacy_using_pio(dev)) {
2204                 b43legacy_write32(dev, 0x0210, 0x00000100);
2205                 b43legacy_write32(dev, 0x0230, 0x00000100);
2206                 b43legacy_write32(dev, 0x0250, 0x00000100);
2207                 b43legacy_write32(dev, 0x0270, 0x00000100);
2208                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2209                                       0x0000);
2210         }
2211
2212         /* Probe Response Timeout value */
2213         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2214         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2215
2216         /* Initially set the wireless operation mode. */
2217         b43legacy_adjust_opmode(dev);
2218
2219         if (dev->dev->id.revision < 3) {
2220                 b43legacy_write16(dev, 0x060E, 0x0000);
2221                 b43legacy_write16(dev, 0x0610, 0x8000);
2222                 b43legacy_write16(dev, 0x0604, 0x0000);
2223                 b43legacy_write16(dev, 0x0606, 0x0200);
2224         } else {
2225                 b43legacy_write32(dev, 0x0188, 0x80000000);
2226                 b43legacy_write32(dev, 0x018C, 0x02000000);
2227         }
2228         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2229         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2230         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2231         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2232         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2233         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2234         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2235
2236         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2237         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2238         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2239
2240         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2241                           dev->dev->bus->chipco.fast_pwrup_delay);
2242
2243         /* PHY TX errors counter. */
2244         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2245
2246         B43legacy_WARN_ON(err != 0);
2247         b43legacydbg(dev->wl, "Chip initialized\n");
2248 out:
2249         return err;
2250
2251 err_radio_off:
2252         b43legacy_radio_turn_off(dev, 1);
2253 err_gpio_clean:
2254         b43legacy_gpio_cleanup(dev);
2255         goto out;
2256 }
2257
2258 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2259 {
2260         struct b43legacy_phy *phy = &dev->phy;
2261
2262         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2263                 return;
2264
2265         b43legacy_mac_suspend(dev);
2266         b43legacy_phy_lo_g_measure(dev);
2267         b43legacy_mac_enable(dev);
2268 }
2269
2270 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2271 {
2272         b43legacy_phy_lo_mark_all_unused(dev);
2273         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2274                 b43legacy_mac_suspend(dev);
2275                 b43legacy_calc_nrssi_slope(dev);
2276                 b43legacy_mac_enable(dev);
2277         }
2278 }
2279
2280 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2281 {
2282         /* Update device statistics. */
2283         b43legacy_calculate_link_quality(dev);
2284 }
2285
2286 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2287 {
2288         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2289
2290         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2291         wmb();
2292 }
2293
2294 static void do_periodic_work(struct b43legacy_wldev *dev)
2295 {
2296         unsigned int state;
2297
2298         state = dev->periodic_state;
2299         if (state % 8 == 0)
2300                 b43legacy_periodic_every120sec(dev);
2301         if (state % 4 == 0)
2302                 b43legacy_periodic_every60sec(dev);
2303         if (state % 2 == 0)
2304                 b43legacy_periodic_every30sec(dev);
2305         b43legacy_periodic_every15sec(dev);
2306 }
2307
2308 /* Periodic work locking policy:
2309  *      The whole periodic work handler is protected by
2310  *      wl->mutex. If another lock is needed somewhere in the
2311  *      pwork callchain, it's acquired in-place, where it's needed.
2312  */
2313 static void b43legacy_periodic_work_handler(struct work_struct *work)
2314 {
2315         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2316                                              periodic_work.work);
2317         struct b43legacy_wl *wl = dev->wl;
2318         unsigned long delay;
2319
2320         mutex_lock(&wl->mutex);
2321
2322         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2323                 goto out;
2324         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2325                 goto out_requeue;
2326
2327         do_periodic_work(dev);
2328
2329         dev->periodic_state++;
2330 out_requeue:
2331         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2332                 delay = msecs_to_jiffies(50);
2333         else
2334                 delay = round_jiffies_relative(HZ * 15);
2335         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2336 out:
2337         mutex_unlock(&wl->mutex);
2338 }
2339
2340 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2341 {
2342         struct delayed_work *work = &dev->periodic_work;
2343
2344         dev->periodic_state = 0;
2345         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2346         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2347 }
2348
2349 /* Validate access to the chip (SHM) */
2350 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2351 {
2352         u32 value;
2353         u32 shm_backup;
2354
2355         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2356         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2357         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2358                                  0xAA5555AA)
2359                 goto error;
2360         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2361         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2362                                  0x55AAAA55)
2363                 goto error;
2364         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2365
2366         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2367         if ((value | B43legacy_MACCTL_GMODE) !=
2368             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2369                 goto error;
2370
2371         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2372         if (value)
2373                 goto error;
2374
2375         return 0;
2376 error:
2377         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2378         return -ENODEV;
2379 }
2380
2381 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2382 {
2383         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2384         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2385         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2386                                         0x0056);
2387         /* KTP is a word address, but we address SHM bytewise.
2388          * So multiply by two.
2389          */
2390         dev->ktp *= 2;
2391         if (dev->dev->id.revision >= 5)
2392                 /* Number of RCMTA address slots */
2393                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2394                                   dev->max_nr_keys - 8);
2395 }
2396
2397 #ifdef CONFIG_B43LEGACY_HWRNG
2398 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2399 {
2400         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2401         unsigned long flags;
2402
2403         /* Don't take wl->mutex here, as it could deadlock with
2404          * hwrng internal locking. It's not needed to take
2405          * wl->mutex here, anyway. */
2406
2407         spin_lock_irqsave(&wl->irq_lock, flags);
2408         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2409         spin_unlock_irqrestore(&wl->irq_lock, flags);
2410
2411         return (sizeof(u16));
2412 }
2413 #endif
2414
2415 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2416 {
2417 #ifdef CONFIG_B43LEGACY_HWRNG
2418         if (wl->rng_initialized)
2419                 hwrng_unregister(&wl->rng);
2420 #endif
2421 }
2422
2423 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2424 {
2425         int err = 0;
2426
2427 #ifdef CONFIG_B43LEGACY_HWRNG
2428         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2429                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2430         wl->rng.name = wl->rng_name;
2431         wl->rng.data_read = b43legacy_rng_read;
2432         wl->rng.priv = (unsigned long)wl;
2433         wl->rng_initialized = 1;
2434         err = hwrng_register(&wl->rng);
2435         if (err) {
2436                 wl->rng_initialized = 0;
2437                 b43legacyerr(wl, "Failed to register the random "
2438                        "number generator (%d)\n", err);
2439         }
2440
2441 #endif
2442         return err;
2443 }
2444
2445 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2446                             struct sk_buff *skb)
2447 {
2448         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2449         struct b43legacy_wldev *dev = wl->current_dev;
2450         int err = -ENODEV;
2451         unsigned long flags;
2452
2453         if (unlikely(!dev))
2454                 goto out;
2455         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2456                 goto out;
2457         /* DMA-TX is done without a global lock. */
2458         if (b43legacy_using_pio(dev)) {
2459                 spin_lock_irqsave(&wl->irq_lock, flags);
2460                 err = b43legacy_pio_tx(dev, skb);
2461                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2462         } else
2463                 err = b43legacy_dma_tx(dev, skb);
2464 out:
2465         if (unlikely(err)) {
2466                 /* Drop the packet. */
2467                 dev_kfree_skb_any(skb);
2468         }
2469 }
2470
2471 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
2472                                 const struct ieee80211_tx_queue_params *params)
2473 {
2474         return 0;
2475 }
2476
2477 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2478                                   struct ieee80211_low_level_stats *stats)
2479 {
2480         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2481         unsigned long flags;
2482
2483         spin_lock_irqsave(&wl->irq_lock, flags);
2484         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2485         spin_unlock_irqrestore(&wl->irq_lock, flags);
2486
2487         return 0;
2488 }
2489
2490 static const char *phymode_to_string(unsigned int phymode)
2491 {
2492         switch (phymode) {
2493         case B43legacy_PHYMODE_B:
2494                 return "B";
2495         case B43legacy_PHYMODE_G:
2496                 return "G";
2497         default:
2498                 B43legacy_BUG_ON(1);
2499         }
2500         return "";
2501 }
2502
2503 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2504                                   unsigned int phymode,
2505                                   struct b43legacy_wldev **dev,
2506                                   bool *gmode)
2507 {
2508         struct b43legacy_wldev *d;
2509
2510         list_for_each_entry(d, &wl->devlist, list) {
2511                 if (d->phy.possible_phymodes & phymode) {
2512                         /* Ok, this device supports the PHY-mode.
2513                          * Set the gmode bit. */
2514                         *gmode = 1;
2515                         *dev = d;
2516
2517                         return 0;
2518                 }
2519         }
2520
2521         return -ESRCH;
2522 }
2523
2524 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2525 {
2526         struct ssb_device *sdev = dev->dev;
2527         u32 tmslow;
2528
2529         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2530         tmslow &= ~B43legacy_TMSLOW_GMODE;
2531         tmslow |= B43legacy_TMSLOW_PHYRESET;
2532         tmslow |= SSB_TMSLOW_FGC;
2533         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2534         msleep(1);
2535
2536         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2537         tmslow &= ~SSB_TMSLOW_FGC;
2538         tmslow |= B43legacy_TMSLOW_PHYRESET;
2539         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2540         msleep(1);
2541 }
2542
2543 /* Expects wl->mutex locked */
2544 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2545                                       unsigned int new_mode)
2546 {
2547         struct b43legacy_wldev *uninitialized_var(up_dev);
2548         struct b43legacy_wldev *down_dev;
2549         int err;
2550         bool gmode = 0;
2551         int prev_status;
2552
2553         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2554         if (err) {
2555                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2556                        phymode_to_string(new_mode));
2557                 return err;
2558         }
2559         if ((up_dev == wl->current_dev) &&
2560             (!!wl->current_dev->phy.gmode == !!gmode))
2561                 /* This device is already running. */
2562                 return 0;
2563         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2564                phymode_to_string(new_mode));
2565         down_dev = wl->current_dev;
2566
2567         prev_status = b43legacy_status(down_dev);
2568         /* Shutdown the currently running core. */
2569         if (prev_status >= B43legacy_STAT_STARTED)
2570                 b43legacy_wireless_core_stop(down_dev);
2571         if (prev_status >= B43legacy_STAT_INITIALIZED)
2572                 b43legacy_wireless_core_exit(down_dev);
2573
2574         if (down_dev != up_dev)
2575                 /* We switch to a different core, so we put PHY into
2576                  * RESET on the old core. */
2577                 b43legacy_put_phy_into_reset(down_dev);
2578
2579         /* Now start the new core. */
2580         up_dev->phy.gmode = gmode;
2581         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2582                 err = b43legacy_wireless_core_init(up_dev);
2583                 if (err) {
2584                         b43legacyerr(wl, "Fatal: Could not initialize device"
2585                                      " for newly selected %s-PHY mode\n",
2586                                      phymode_to_string(new_mode));
2587                         goto init_failure;
2588                 }
2589         }
2590         if (prev_status >= B43legacy_STAT_STARTED) {
2591                 err = b43legacy_wireless_core_start(up_dev);
2592                 if (err) {
2593                         b43legacyerr(wl, "Fatal: Coult not start device for "
2594                                "newly selected %s-PHY mode\n",
2595                                phymode_to_string(new_mode));
2596                         b43legacy_wireless_core_exit(up_dev);
2597                         goto init_failure;
2598                 }
2599         }
2600         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2601
2602         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2603
2604         wl->current_dev = up_dev;
2605
2606         return 0;
2607 init_failure:
2608         /* Whoops, failed to init the new core. No core is operating now. */
2609         wl->current_dev = NULL;
2610         return err;
2611 }
2612
2613 /* Write the short and long frame retry limit values. */
2614 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2615                                        unsigned int short_retry,
2616                                        unsigned int long_retry)
2617 {
2618         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2619          * the chip-internal counter. */
2620         short_retry = min(short_retry, (unsigned int)0xF);
2621         long_retry = min(long_retry, (unsigned int)0xF);
2622
2623         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2624         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2625 }
2626
2627 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2628                                    u32 changed)
2629 {
2630         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2631         struct b43legacy_wldev *dev;
2632         struct b43legacy_phy *phy;
2633         struct ieee80211_conf *conf = &hw->conf;
2634         unsigned long flags;
2635         unsigned int new_phymode = 0xFFFF;
2636         int antenna_tx;
2637         int err = 0;
2638
2639         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2640
2641         mutex_lock(&wl->mutex);
2642         dev = wl->current_dev;
2643         phy = &dev->phy;
2644
2645         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2646                 b43legacy_set_retry_limits(dev,
2647                                            conf->short_frame_max_tx_count,
2648                                            conf->long_frame_max_tx_count);
2649         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2650         if (!changed)
2651                 goto out_unlock_mutex;
2652
2653         /* Switch the PHY mode (if necessary). */
2654         switch (conf->channel->band) {
2655         case IEEE80211_BAND_2GHZ:
2656                 if (phy->type == B43legacy_PHYTYPE_B)
2657                         new_phymode = B43legacy_PHYMODE_B;
2658                 else
2659                         new_phymode = B43legacy_PHYMODE_G;
2660                 break;
2661         default:
2662                 B43legacy_WARN_ON(1);
2663         }
2664         err = b43legacy_switch_phymode(wl, new_phymode);
2665         if (err)
2666                 goto out_unlock_mutex;
2667
2668         /* Disable IRQs while reconfiguring the device.
2669          * This makes it possible to drop the spinlock throughout
2670          * the reconfiguration process. */
2671         spin_lock_irqsave(&wl->irq_lock, flags);
2672         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2673                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2674                 goto out_unlock_mutex;
2675         }
2676         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2677         spin_unlock_irqrestore(&wl->irq_lock, flags);
2678         b43legacy_synchronize_irq(dev);
2679
2680         /* Switch to the requested channel.
2681          * The firmware takes care of races with the TX handler. */
2682         if (conf->channel->hw_value != phy->channel)
2683                 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2684
2685         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2686
2687         /* Adjust the desired TX power level. */
2688         if (conf->power_level != 0) {
2689                 if (conf->power_level != phy->power_level) {
2690                         phy->power_level = conf->power_level;
2691                         b43legacy_phy_xmitpower(dev);
2692                 }
2693         }
2694
2695         /* Antennas for RX and management frame TX. */
2696         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2697
2698         if (wl->radio_enabled != phy->radio_on) {
2699                 if (wl->radio_enabled) {
2700                         b43legacy_radio_turn_on(dev);
2701                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2702                         if (!dev->radio_hw_enable)
2703                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2704                                               " button still turns the radio"
2705                                               " physically off. Press the"
2706                                               " button to turn it on.\n");
2707                 } else {
2708                         b43legacy_radio_turn_off(dev, 0);
2709                         b43legacyinfo(dev->wl, "Radio turned off by"
2710                                       " software\n");
2711                 }
2712         }
2713
2714         spin_lock_irqsave(&wl->irq_lock, flags);
2715         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2716         mmiowb();
2717         spin_unlock_irqrestore(&wl->irq_lock, flags);
2718 out_unlock_mutex:
2719         mutex_unlock(&wl->mutex);
2720
2721         return err;
2722 }
2723
2724 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2725 {
2726         struct ieee80211_supported_band *sband =
2727                 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2728         struct ieee80211_rate *rate;
2729         int i;
2730         u16 basic, direct, offset, basic_offset, rateptr;
2731
2732         for (i = 0; i < sband->n_bitrates; i++) {
2733                 rate = &sband->bitrates[i];
2734
2735                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2736                         direct = B43legacy_SHM_SH_CCKDIRECT;
2737                         basic = B43legacy_SHM_SH_CCKBASIC;
2738                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2739                         offset &= 0xF;
2740                 } else {
2741                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2742                         basic = B43legacy_SHM_SH_OFDMBASIC;
2743                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2744                         offset &= 0xF;
2745                 }
2746
2747                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2748
2749                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2750                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2751                         basic_offset &= 0xF;
2752                 } else {
2753                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2754                         basic_offset &= 0xF;
2755                 }
2756
2757                 /*
2758                  * Get the pointer that we need to point to
2759                  * from the direct map
2760                  */
2761                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2762                                                direct + 2 * basic_offset);
2763                 /* and write it to the basic map */
2764                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2765                                       basic + 2 * offset, rateptr);
2766         }
2767 }
2768
2769 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2770                                     struct ieee80211_vif *vif,
2771                                     struct ieee80211_bss_conf *conf,
2772                                     u32 changed)
2773 {
2774         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2775         struct b43legacy_wldev *dev;
2776         unsigned long flags;
2777
2778         mutex_lock(&wl->mutex);
2779         B43legacy_WARN_ON(wl->vif != vif);
2780
2781         dev = wl->current_dev;
2782
2783         /* Disable IRQs while reconfiguring the device.
2784          * This makes it possible to drop the spinlock throughout
2785          * the reconfiguration process. */
2786         spin_lock_irqsave(&wl->irq_lock, flags);
2787         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2788                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2789                 goto out_unlock_mutex;
2790         }
2791         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2792
2793         if (changed & BSS_CHANGED_BSSID) {
2794                 b43legacy_synchronize_irq(dev);
2795
2796                 if (conf->bssid)
2797                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2798                 else
2799                         memset(wl->bssid, 0, ETH_ALEN);
2800         }
2801
2802         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2803                 if (changed & BSS_CHANGED_BEACON &&
2804                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2805                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2806                         b43legacy_update_templates(wl);
2807
2808                 if (changed & BSS_CHANGED_BSSID)
2809                         b43legacy_write_mac_bssid_templates(dev);
2810         }
2811         spin_unlock_irqrestore(&wl->irq_lock, flags);
2812
2813         b43legacy_mac_suspend(dev);
2814
2815         if (changed & BSS_CHANGED_BEACON_INT &&
2816             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2817              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2818                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2819
2820         if (changed & BSS_CHANGED_BASIC_RATES)
2821                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2822
2823         if (changed & BSS_CHANGED_ERP_SLOT) {
2824                 if (conf->use_short_slot)
2825                         b43legacy_short_slot_timing_enable(dev);
2826                 else
2827                         b43legacy_short_slot_timing_disable(dev);
2828         }
2829
2830         b43legacy_mac_enable(dev);
2831
2832         spin_lock_irqsave(&wl->irq_lock, flags);
2833         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2834         /* XXX: why? */
2835         mmiowb();
2836         spin_unlock_irqrestore(&wl->irq_lock, flags);
2837  out_unlock_mutex:
2838         mutex_unlock(&wl->mutex);
2839 }
2840
2841 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2842                                           unsigned int changed,
2843                                           unsigned int *fflags,u64 multicast)
2844 {
2845         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2846         struct b43legacy_wldev *dev = wl->current_dev;
2847         unsigned long flags;
2848
2849         if (!dev) {
2850                 *fflags = 0;
2851                 return;
2852         }
2853
2854         spin_lock_irqsave(&wl->irq_lock, flags);
2855         *fflags &= FIF_PROMISC_IN_BSS |
2856                   FIF_ALLMULTI |
2857                   FIF_FCSFAIL |
2858                   FIF_PLCPFAIL |
2859                   FIF_CONTROL |
2860                   FIF_OTHER_BSS |
2861                   FIF_BCN_PRBRESP_PROMISC;
2862
2863         changed &= FIF_PROMISC_IN_BSS |
2864                    FIF_ALLMULTI |
2865                    FIF_FCSFAIL |
2866                    FIF_PLCPFAIL |
2867                    FIF_CONTROL |
2868                    FIF_OTHER_BSS |
2869                    FIF_BCN_PRBRESP_PROMISC;
2870
2871         wl->filter_flags = *fflags;
2872
2873         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2874                 b43legacy_adjust_opmode(dev);
2875         spin_unlock_irqrestore(&wl->irq_lock, flags);
2876 }
2877
2878 /* Locking: wl->mutex */
2879 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2880 {
2881         struct b43legacy_wl *wl = dev->wl;
2882         unsigned long flags;
2883
2884         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2885                 return;
2886
2887         /* Disable and sync interrupts. We must do this before than
2888          * setting the status to INITIALIZED, as the interrupt handler
2889          * won't care about IRQs then. */
2890         spin_lock_irqsave(&wl->irq_lock, flags);
2891         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2892         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2893         spin_unlock_irqrestore(&wl->irq_lock, flags);
2894         b43legacy_synchronize_irq(dev);
2895
2896         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2897
2898         mutex_unlock(&wl->mutex);
2899         /* Must unlock as it would otherwise deadlock. No races here.
2900          * Cancel the possibly running self-rearming periodic work. */
2901         cancel_delayed_work_sync(&dev->periodic_work);
2902         mutex_lock(&wl->mutex);
2903
2904         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2905
2906         b43legacy_mac_suspend(dev);
2907         free_irq(dev->dev->irq, dev);
2908         b43legacydbg(wl, "Wireless interface stopped\n");
2909 }
2910
2911 /* Locking: wl->mutex */
2912 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2913 {
2914         int err;
2915
2916         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2917
2918         drain_txstatus_queue(dev);
2919         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2920                           IRQF_SHARED, KBUILD_MODNAME, dev);
2921         if (err) {
2922                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2923                        dev->dev->irq);
2924                 goto out;
2925         }
2926         /* We are ready to run. */
2927         ieee80211_wake_queues(dev->wl->hw);
2928         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2929
2930         /* Start data flow (TX/RX) */
2931         b43legacy_mac_enable(dev);
2932         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2933
2934         /* Start maintenance work */
2935         b43legacy_periodic_tasks_setup(dev);
2936
2937         b43legacydbg(dev->wl, "Wireless interface started\n");
2938 out:
2939         return err;
2940 }
2941
2942 /* Get PHY and RADIO versioning numbers */
2943 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2944 {
2945         struct b43legacy_phy *phy = &dev->phy;
2946         u32 tmp;
2947         u8 analog_type;
2948         u8 phy_type;
2949         u8 phy_rev;
2950         u16 radio_manuf;
2951         u16 radio_ver;
2952         u16 radio_rev;
2953         int unsupported = 0;
2954
2955         /* Get PHY versioning */
2956         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2957         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2958                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2959         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2960         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2961         switch (phy_type) {
2962         case B43legacy_PHYTYPE_B:
2963                 if (phy_rev != 2 && phy_rev != 4
2964                     && phy_rev != 6 && phy_rev != 7)
2965                         unsupported = 1;
2966                 break;
2967         case B43legacy_PHYTYPE_G:
2968                 if (phy_rev > 8)
2969                         unsupported = 1;
2970                 break;
2971         default:
2972                 unsupported = 1;
2973         };
2974         if (unsupported) {
2975                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2976                        "(Analog %u, Type %u, Revision %u)\n",
2977                        analog_type, phy_type, phy_rev);
2978                 return -EOPNOTSUPP;
2979         }
2980         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2981                analog_type, phy_type, phy_rev);
2982
2983
2984         /* Get RADIO versioning */
2985         if (dev->dev->bus->chip_id == 0x4317) {
2986                 if (dev->dev->bus->chip_rev == 0)
2987                         tmp = 0x3205017F;
2988                 else if (dev->dev->bus->chip_rev == 1)
2989                         tmp = 0x4205017F;
2990                 else
2991                         tmp = 0x5205017F;
2992         } else {
2993                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2994                                   B43legacy_RADIOCTL_ID);
2995                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2996                 tmp <<= 16;
2997                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2998                                   B43legacy_RADIOCTL_ID);
2999                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3000         }
3001         radio_manuf = (tmp & 0x00000FFF);
3002         radio_ver = (tmp & 0x0FFFF000) >> 12;
3003         radio_rev = (tmp & 0xF0000000) >> 28;
3004         switch (phy_type) {
3005         case B43legacy_PHYTYPE_B:
3006                 if ((radio_ver & 0xFFF0) != 0x2050)
3007                         unsupported = 1;
3008                 break;
3009         case B43legacy_PHYTYPE_G:
3010                 if (radio_ver != 0x2050)
3011                         unsupported = 1;
3012                 break;
3013         default:
3014                 B43legacy_BUG_ON(1);
3015         }
3016         if (unsupported) {
3017                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3018                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3019                        radio_manuf, radio_ver, radio_rev);
3020                 return -EOPNOTSUPP;
3021         }
3022         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3023                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3024
3025
3026         phy->radio_manuf = radio_manuf;
3027         phy->radio_ver = radio_ver;
3028         phy->radio_rev = radio_rev;
3029
3030         phy->analog = analog_type;
3031         phy->type = phy_type;
3032         phy->rev = phy_rev;
3033
3034         return 0;
3035 }
3036
3037 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3038                                       struct b43legacy_phy *phy)
3039 {
3040         struct b43legacy_lopair *lo;
3041         int i;
3042
3043         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3044         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3045
3046         /* Assume the radio is enabled. If it's not enabled, the state will
3047          * immediately get fixed on the first periodic work run. */
3048         dev->radio_hw_enable = 1;
3049
3050         phy->savedpctlreg = 0xFFFF;
3051         phy->aci_enable = 0;
3052         phy->aci_wlan_automatic = 0;
3053         phy->aci_hw_rssi = 0;
3054
3055         lo = phy->_lo_pairs;
3056         if (lo)
3057                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3058                                      B43legacy_LO_COUNT);
3059         phy->max_lb_gain = 0;
3060         phy->trsw_rx_gain = 0;
3061
3062         /* Set default attenuation values. */
3063         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3064         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3065         phy->txctl1 = b43legacy_default_txctl1(dev);
3066         phy->txpwr_offset = 0;
3067
3068         /* NRSSI */
3069         phy->nrssislope = 0;
3070         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3071                 phy->nrssi[i] = -1000;
3072         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3073                 phy->nrssi_lt[i] = i;
3074
3075         phy->lofcal = 0xFFFF;
3076         phy->initval = 0xFFFF;
3077
3078         phy->interfmode = B43legacy_INTERFMODE_NONE;
3079         phy->channel = 0xFF;
3080 }
3081
3082 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3083 {
3084         /* Flags */
3085         dev->dfq_valid = 0;
3086
3087         /* Stats */
3088         memset(&dev->stats, 0, sizeof(dev->stats));
3089
3090         setup_struct_phy_for_init(dev, &dev->phy);
3091
3092         /* IRQ related flags */
3093         dev->irq_reason = 0;
3094         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3095         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3096
3097         dev->mac_suspended = 1;
3098
3099         /* Noise calculation context */
3100         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3101 }
3102
3103 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3104                                           bool idle) {
3105         u16 pu_delay = 1050;
3106
3107         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3108                 pu_delay = 500;
3109         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3110                 pu_delay = max(pu_delay, (u16)2400);
3111
3112         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3113                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3114 }
3115
3116 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3117 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3118 {
3119         u16 pretbtt;
3120
3121         /* The time value is in microseconds. */
3122         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3123                 pretbtt = 2;
3124         else
3125                 pretbtt = 250;
3126         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3127                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3128         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3129 }
3130
3131 /* Shutdown a wireless core */
3132 /* Locking: wl->mutex */
3133 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3134 {
3135         struct b43legacy_phy *phy = &dev->phy;
3136         u32 macctl;
3137
3138         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3139         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3140                 return;
3141         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3142
3143         /* Stop the microcode PSM. */
3144         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3145         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3146         macctl |= B43legacy_MACCTL_PSM_JMP0;
3147         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3148
3149         b43legacy_leds_exit(dev);
3150         b43legacy_rng_exit(dev->wl);
3151         b43legacy_pio_free(dev);
3152         b43legacy_dma_free(dev);
3153         b43legacy_chip_exit(dev);
3154         b43legacy_radio_turn_off(dev, 1);
3155         b43legacy_switch_analog(dev, 0);
3156         if (phy->dyn_tssi_tbl)
3157                 kfree(phy->tssi2dbm);
3158         kfree(phy->lo_control);
3159         phy->lo_control = NULL;
3160         if (dev->wl->current_beacon) {
3161                 dev_kfree_skb_any(dev->wl->current_beacon);
3162                 dev->wl->current_beacon = NULL;
3163         }
3164
3165         ssb_device_disable(dev->dev, 0);
3166         ssb_bus_may_powerdown(dev->dev->bus);
3167 }
3168
3169 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3170 {
3171         struct b43legacy_phy *phy = &dev->phy;
3172         int i;
3173
3174         /* Set default attenuation values. */
3175         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3176         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3177         phy->txctl1 = b43legacy_default_txctl1(dev);
3178         phy->txctl2 = 0xFFFF;
3179         phy->txpwr_offset = 0;
3180
3181         /* NRSSI */
3182         phy->nrssislope = 0;
3183         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3184                 phy->nrssi[i] = -1000;
3185         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3186                 phy->nrssi_lt[i] = i;
3187
3188         phy->lofcal = 0xFFFF;
3189         phy->initval = 0xFFFF;
3190
3191         phy->aci_enable = 0;
3192         phy->aci_wlan_automatic = 0;
3193         phy->aci_hw_rssi = 0;
3194
3195         phy->antenna_diversity = 0xFFFF;
3196         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3197         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3198
3199         /* Flags */
3200         phy->calibrated = 0;
3201
3202         if (phy->_lo_pairs)
3203                 memset(phy->_lo_pairs, 0,
3204                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3205         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3206 }
3207
3208 /* Initialize a wireless core */
3209 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3210 {
3211         struct b43legacy_wl *wl = dev->wl;
3212         struct ssb_bus *bus = dev->dev->bus;
3213         struct b43legacy_phy *phy = &dev->phy;
3214         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3215         int err;
3216         u32 hf;
3217         u32 tmp;
3218
3219         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3220
3221         err = ssb_bus_powerup(bus, 0);
3222         if (err)
3223                 goto out;
3224         if (!ssb_device_is_enabled(dev->dev)) {
3225                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3226                 b43legacy_wireless_core_reset(dev, tmp);
3227         }
3228
3229         if ((phy->type == B43legacy_PHYTYPE_B) ||
3230             (phy->type == B43legacy_PHYTYPE_G)) {
3231                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3232                                          * B43legacy_LO_COUNT,
3233                                          GFP_KERNEL);
3234                 if (!phy->_lo_pairs)
3235                         return -ENOMEM;
3236         }
3237         setup_struct_wldev_for_init(dev);
3238
3239         err = b43legacy_phy_init_tssi2dbm_table(dev);
3240         if (err)
3241                 goto err_kfree_lo_control;
3242
3243         /* Enable IRQ routing to this device. */
3244         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3245
3246         prepare_phy_data_for_init(dev);
3247         b43legacy_phy_calibrate(dev);
3248         err = b43legacy_chip_init(dev);
3249         if (err)
3250                 goto err_kfree_tssitbl;
3251         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3252                               B43legacy_SHM_SH_WLCOREREV,
3253                               dev->dev->id.revision);
3254         hf = b43legacy_hf_read(dev);
3255         if (phy->type == B43legacy_PHYTYPE_G) {
3256                 hf |= B43legacy_HF_SYMW;
3257                 if (phy->rev == 1)
3258                         hf |= B43legacy_HF_GDCW;
3259                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3260                         hf |= B43legacy_HF_OFDMPABOOST;
3261         } else if (phy->type == B43legacy_PHYTYPE_B) {
3262                 hf |= B43legacy_HF_SYMW;
3263                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3264                         hf &= ~B43legacy_HF_GDCW;
3265         }
3266         b43legacy_hf_write(dev, hf);
3267
3268         b43legacy_set_retry_limits(dev,
3269                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3270                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3271
3272         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3273                               0x0044, 3);
3274         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3275                               0x0046, 2);
3276
3277         /* Disable sending probe responses from firmware.
3278          * Setting the MaxTime to one usec will always trigger
3279          * a timeout, so we never send any probe resp.
3280          * A timeout of zero is infinite. */
3281         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3282                               B43legacy_SHM_SH_PRMAXTIME, 1);
3283
3284         b43legacy_rate_memory_init(dev);
3285
3286         /* Minimum Contention Window */
3287         if (phy->type == B43legacy_PHYTYPE_B)
3288                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3289                                       0x0003, 31);
3290         else
3291                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3292                                       0x0003, 15);
3293         /* Maximum Contention Window */
3294         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3295                               0x0004, 1023);
3296
3297         do {
3298                 if (b43legacy_using_pio(dev))
3299                         err = b43legacy_pio_init(dev);
3300                 else {
3301                         err = b43legacy_dma_init(dev);
3302                         if (!err)
3303                                 b43legacy_qos_init(dev);
3304                 }
3305         } while (err == -EAGAIN);
3306         if (err)
3307                 goto err_chip_exit;
3308
3309         b43legacy_set_synth_pu_delay(dev, 1);
3310
3311         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3312         b43legacy_upload_card_macaddress(dev);
3313         b43legacy_security_init(dev);
3314         b43legacy_rng_init(wl);
3315
3316         ieee80211_wake_queues(dev->wl->hw);
3317         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3318
3319         b43legacy_leds_init(dev);
3320 out:
3321         return err;
3322
3323 err_chip_exit:
3324         b43legacy_chip_exit(dev);
3325 err_kfree_tssitbl:
3326         if (phy->dyn_tssi_tbl)
3327                 kfree(phy->tssi2dbm);
3328 err_kfree_lo_control:
3329         kfree(phy->lo_control);
3330         phy->lo_control = NULL;
3331         ssb_bus_may_powerdown(bus);
3332         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3333         return err;
3334 }
3335
3336 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3337                                       struct ieee80211_vif *vif)
3338 {
3339         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3340         struct b43legacy_wldev *dev;
3341         unsigned long flags;
3342         int err = -EOPNOTSUPP;
3343
3344         /* TODO: allow WDS/AP devices to coexist */
3345
3346         if (vif->type != NL80211_IFTYPE_AP &&
3347             vif->type != NL80211_IFTYPE_STATION &&
3348             vif->type != NL80211_IFTYPE_WDS &&
3349             vif->type != NL80211_IFTYPE_ADHOC)
3350                 return -EOPNOTSUPP;
3351
3352         mutex_lock(&wl->mutex);
3353         if (wl->operating)
3354                 goto out_mutex_unlock;
3355
3356         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3357
3358         dev = wl->current_dev;
3359         wl->operating = 1;
3360         wl->vif = vif;
3361         wl->if_type = vif->type;
3362         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3363
3364         spin_lock_irqsave(&wl->irq_lock, flags);
3365         b43legacy_adjust_opmode(dev);
3366         b43legacy_set_pretbtt(dev);
3367         b43legacy_set_synth_pu_delay(dev, 0);
3368         b43legacy_upload_card_macaddress(dev);
3369         spin_unlock_irqrestore(&wl->irq_lock, flags);
3370
3371         err = 0;
3372  out_mutex_unlock:
3373         mutex_unlock(&wl->mutex);
3374
3375         return err;
3376 }
3377
3378 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3379                                           struct ieee80211_vif *vif)
3380 {
3381         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3382         struct b43legacy_wldev *dev = wl->current_dev;
3383         unsigned long flags;
3384
3385         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3386
3387         mutex_lock(&wl->mutex);
3388
3389         B43legacy_WARN_ON(!wl->operating);
3390         B43legacy_WARN_ON(wl->vif != vif);
3391         wl->vif = NULL;
3392
3393         wl->operating = 0;
3394
3395         spin_lock_irqsave(&wl->irq_lock, flags);
3396         b43legacy_adjust_opmode(dev);
3397         memset(wl->mac_addr, 0, ETH_ALEN);
3398         b43legacy_upload_card_macaddress(dev);
3399         spin_unlock_irqrestore(&wl->irq_lock, flags);
3400
3401         mutex_unlock(&wl->mutex);
3402 }
3403
3404 static int b43legacy_op_start(struct ieee80211_hw *hw)
3405 {
3406         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3407         struct b43legacy_wldev *dev = wl->current_dev;
3408         int did_init = 0;
3409         int err = 0;
3410
3411         /* Kill all old instance specific information to make sure
3412          * the card won't use it in the short timeframe between start
3413          * and mac80211 reconfiguring it. */
3414         memset(wl->bssid, 0, ETH_ALEN);
3415         memset(wl->mac_addr, 0, ETH_ALEN);
3416         wl->filter_flags = 0;
3417         wl->beacon0_uploaded = 0;
3418         wl->beacon1_uploaded = 0;
3419         wl->beacon_templates_virgin = 1;
3420         wl->radio_enabled = 1;
3421
3422         mutex_lock(&wl->mutex);
3423
3424         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3425                 err = b43legacy_wireless_core_init(dev);
3426                 if (err)
3427                         goto out_mutex_unlock;
3428                 did_init = 1;
3429         }
3430
3431         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3432                 err = b43legacy_wireless_core_start(dev);
3433                 if (err) {
3434                         if (did_init)
3435                                 b43legacy_wireless_core_exit(dev);
3436                         goto out_mutex_unlock;
3437                 }
3438         }
3439
3440         wiphy_rfkill_start_polling(hw->wiphy);
3441
3442 out_mutex_unlock:
3443         mutex_unlock(&wl->mutex);
3444
3445         return err;
3446 }
3447
3448 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3449 {
3450         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3451         struct b43legacy_wldev *dev = wl->current_dev;
3452
3453         cancel_work_sync(&(wl->beacon_update_trigger));
3454
3455         mutex_lock(&wl->mutex);
3456         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3457                 b43legacy_wireless_core_stop(dev);
3458         b43legacy_wireless_core_exit(dev);
3459         wl->radio_enabled = 0;
3460         mutex_unlock(&wl->mutex);
3461 }
3462
3463 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3464                                        struct ieee80211_sta *sta, bool set)
3465 {
3466         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3467         unsigned long flags;
3468
3469         spin_lock_irqsave(&wl->irq_lock, flags);
3470         b43legacy_update_templates(wl);
3471         spin_unlock_irqrestore(&wl->irq_lock, flags);
3472
3473         return 0;
3474 }
3475
3476 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3477                                    struct survey_info *survey)
3478 {
3479         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3480         struct b43legacy_wldev *dev = wl->current_dev;
3481         struct ieee80211_conf *conf = &hw->conf;
3482
3483         if (idx != 0)
3484                 return -ENOENT;
3485
3486         survey->channel = conf->channel;
3487         survey->filled = SURVEY_INFO_NOISE_DBM;
3488         survey->noise = dev->stats.link_noise;
3489
3490         return 0;
3491 }
3492
3493 static const struct ieee80211_ops b43legacy_hw_ops = {
3494         .tx                     = b43legacy_op_tx,
3495         .conf_tx                = b43legacy_op_conf_tx,
3496         .add_interface          = b43legacy_op_add_interface,
3497         .remove_interface       = b43legacy_op_remove_interface,
3498         .config                 = b43legacy_op_dev_config,
3499         .bss_info_changed       = b43legacy_op_bss_info_changed,
3500         .configure_filter       = b43legacy_op_configure_filter,
3501         .get_stats              = b43legacy_op_get_stats,
3502         .start                  = b43legacy_op_start,
3503         .stop                   = b43legacy_op_stop,
3504         .set_tim                = b43legacy_op_beacon_set_tim,
3505         .get_survey             = b43legacy_op_get_survey,
3506         .rfkill_poll            = b43legacy_rfkill_poll,
3507 };
3508
3509 /* Hard-reset the chip. Do not call this directly.
3510  * Use b43legacy_controller_restart()
3511  */
3512 static void b43legacy_chip_reset(struct work_struct *work)
3513 {
3514         struct b43legacy_wldev *dev =
3515                 container_of(work, struct b43legacy_wldev, restart_work);
3516         struct b43legacy_wl *wl = dev->wl;
3517         int err = 0;
3518         int prev_status;
3519
3520         mutex_lock(&wl->mutex);
3521
3522         prev_status = b43legacy_status(dev);
3523         /* Bring the device down... */
3524         if (prev_status >= B43legacy_STAT_STARTED)
3525                 b43legacy_wireless_core_stop(dev);
3526         if (prev_status >= B43legacy_STAT_INITIALIZED)
3527                 b43legacy_wireless_core_exit(dev);
3528
3529         /* ...and up again. */
3530         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3531                 err = b43legacy_wireless_core_init(dev);
3532                 if (err)
3533                         goto out;
3534         }
3535         if (prev_status >= B43legacy_STAT_STARTED) {
3536                 err = b43legacy_wireless_core_start(dev);
3537                 if (err) {
3538                         b43legacy_wireless_core_exit(dev);
3539                         goto out;
3540                 }
3541         }
3542 out:
3543         if (err)
3544                 wl->current_dev = NULL; /* Failed to init the dev. */
3545         mutex_unlock(&wl->mutex);
3546         if (err)
3547                 b43legacyerr(wl, "Controller restart FAILED\n");
3548         else
3549                 b43legacyinfo(wl, "Controller restarted\n");
3550 }
3551
3552 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3553                                  int have_bphy,
3554                                  int have_gphy)
3555 {
3556         struct ieee80211_hw *hw = dev->wl->hw;
3557         struct b43legacy_phy *phy = &dev->phy;
3558
3559         phy->possible_phymodes = 0;
3560         if (have_bphy) {
3561                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3562                         &b43legacy_band_2GHz_BPHY;
3563                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3564         }
3565
3566         if (have_gphy) {
3567                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3568                         &b43legacy_band_2GHz_GPHY;
3569                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3570         }
3571
3572         return 0;
3573 }
3574
3575 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3576 {
3577         /* We release firmware that late to not be required to re-request
3578          * is all the time when we reinit the core. */
3579         b43legacy_release_firmware(dev);
3580 }
3581
3582 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3583 {
3584         struct b43legacy_wl *wl = dev->wl;
3585         struct ssb_bus *bus = dev->dev->bus;
3586         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3587         int err;
3588         int have_bphy = 0;
3589         int have_gphy = 0;
3590         u32 tmp;
3591
3592         /* Do NOT do any device initialization here.
3593          * Do it in wireless_core_init() instead.
3594          * This function is for gathering basic information about the HW, only.
3595          * Also some structs may be set up here. But most likely you want to
3596          * have that in core_init(), too.
3597          */
3598
3599         err = ssb_bus_powerup(bus, 0);
3600         if (err) {
3601                 b43legacyerr(wl, "Bus powerup failed\n");
3602                 goto out;
3603         }
3604         /* Get the PHY type. */
3605         if (dev->dev->id.revision >= 5) {
3606                 u32 tmshigh;
3607
3608                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3609                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3610                 if (!have_gphy)
3611                         have_bphy = 1;
3612         } else if (dev->dev->id.revision == 4)
3613                 have_gphy = 1;
3614         else
3615                 have_bphy = 1;
3616
3617         dev->phy.gmode = (have_gphy || have_bphy);
3618         dev->phy.radio_on = 1;
3619         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3620         b43legacy_wireless_core_reset(dev, tmp);
3621
3622         err = b43legacy_phy_versioning(dev);
3623         if (err)
3624                 goto err_powerdown;
3625         /* Check if this device supports multiband. */
3626         if (!pdev ||
3627             (pdev->device != 0x4312 &&
3628              pdev->device != 0x4319 &&
3629              pdev->device != 0x4324)) {
3630                 /* No multiband support. */
3631                 have_bphy = 0;
3632                 have_gphy = 0;
3633                 switch (dev->phy.type) {
3634                 case B43legacy_PHYTYPE_B:
3635                         have_bphy = 1;
3636                         break;
3637                 case B43legacy_PHYTYPE_G:
3638                         have_gphy = 1;
3639                         break;
3640                 default:
3641                         B43legacy_BUG_ON(1);
3642                 }
3643         }
3644         dev->phy.gmode = (have_gphy || have_bphy);
3645         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3646         b43legacy_wireless_core_reset(dev, tmp);
3647
3648         err = b43legacy_validate_chipaccess(dev);
3649         if (err)
3650                 goto err_powerdown;
3651         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3652         if (err)
3653                 goto err_powerdown;
3654
3655         /* Now set some default "current_dev" */
3656         if (!wl->current_dev)
3657                 wl->current_dev = dev;
3658         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3659
3660         b43legacy_radio_turn_off(dev, 1);
3661         b43legacy_switch_analog(dev, 0);
3662         ssb_device_disable(dev->dev, 0);
3663         ssb_bus_may_powerdown(bus);
3664
3665 out:
3666         return err;
3667
3668 err_powerdown:
3669         ssb_bus_may_powerdown(bus);
3670         return err;
3671 }
3672
3673 static void b43legacy_one_core_detach(struct ssb_device *dev)
3674 {
3675         struct b43legacy_wldev *wldev;
3676         struct b43legacy_wl *wl;
3677
3678         /* Do not cancel ieee80211-workqueue based work here.
3679          * See comment in b43legacy_remove(). */
3680
3681         wldev = ssb_get_drvdata(dev);
3682         wl = wldev->wl;
3683         b43legacy_debugfs_remove_device(wldev);
3684         b43legacy_wireless_core_detach(wldev);
3685         list_del(&wldev->list);
3686         wl->nr_devs--;
3687         ssb_set_drvdata(dev, NULL);
3688         kfree(wldev);
3689 }
3690
3691 static int b43legacy_one_core_attach(struct ssb_device *dev,
3692                                      struct b43legacy_wl *wl)
3693 {
3694         struct b43legacy_wldev *wldev;
3695         int err = -ENOMEM;
3696
3697         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3698         if (!wldev)
3699                 goto out;
3700
3701         wldev->dev = dev;
3702         wldev->wl = wl;
3703         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3704         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3705         tasklet_init(&wldev->isr_tasklet,
3706                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3707                      (unsigned long)wldev);
3708         if (modparam_pio)
3709                 wldev->__using_pio = 1;
3710         INIT_LIST_HEAD(&wldev->list);
3711
3712         err = b43legacy_wireless_core_attach(wldev);
3713         if (err)
3714                 goto err_kfree_wldev;
3715
3716         list_add(&wldev->list, &wl->devlist);
3717         wl->nr_devs++;
3718         ssb_set_drvdata(dev, wldev);
3719         b43legacy_debugfs_add_device(wldev);
3720 out:
3721         return err;
3722
3723 err_kfree_wldev:
3724         kfree(wldev);
3725         return err;
3726 }
3727
3728 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3729 {
3730         /* boardflags workarounds */
3731         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3732             bus->boardinfo.type == 0x4E &&
3733             bus->boardinfo.rev > 0x40)
3734                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3735 }
3736
3737 static void b43legacy_wireless_exit(struct ssb_device *dev,
3738                                   struct b43legacy_wl *wl)
3739 {
3740         struct ieee80211_hw *hw = wl->hw;
3741
3742         ssb_set_devtypedata(dev, NULL);
3743         ieee80211_free_hw(hw);
3744 }
3745
3746 static int b43legacy_wireless_init(struct ssb_device *dev)
3747 {
3748         struct ssb_sprom *sprom = &dev->bus->sprom;
3749         struct ieee80211_hw *hw;
3750         struct b43legacy_wl *wl;
3751         int err = -ENOMEM;
3752
3753         b43legacy_sprom_fixup(dev->bus);
3754
3755         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3756         if (!hw) {
3757                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3758                 goto out;
3759         }
3760
3761         /* fill hw info */
3762         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
3763                     IEEE80211_HW_SIGNAL_DBM;
3764         hw->wiphy->interface_modes =
3765                 BIT(NL80211_IFTYPE_AP) |
3766                 BIT(NL80211_IFTYPE_STATION) |
3767                 BIT(NL80211_IFTYPE_WDS) |
3768                 BIT(NL80211_IFTYPE_ADHOC);
3769         hw->queues = 1; /* FIXME: hardware has more queues */
3770         hw->max_rates = 2;
3771         SET_IEEE80211_DEV(hw, dev->dev);
3772         if (is_valid_ether_addr(sprom->et1mac))
3773                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3774         else
3775                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3776
3777         /* Get and initialize struct b43legacy_wl */
3778         wl = hw_to_b43legacy_wl(hw);
3779         memset(wl, 0, sizeof(*wl));
3780         wl->hw = hw;
3781         spin_lock_init(&wl->irq_lock);
3782         spin_lock_init(&wl->leds_lock);
3783         mutex_init(&wl->mutex);
3784         INIT_LIST_HEAD(&wl->devlist);
3785         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3786
3787         ssb_set_devtypedata(dev, wl);
3788         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3789         err = 0;
3790 out:
3791         return err;
3792 }
3793
3794 static int b43legacy_probe(struct ssb_device *dev,
3795                          const struct ssb_device_id *id)
3796 {
3797         struct b43legacy_wl *wl;
3798         int err;
3799         int first = 0;
3800
3801         wl = ssb_get_devtypedata(dev);
3802         if (!wl) {
3803                 /* Probing the first core - setup common struct b43legacy_wl */
3804                 first = 1;
3805                 err = b43legacy_wireless_init(dev);
3806                 if (err)
3807                         goto out;
3808                 wl = ssb_get_devtypedata(dev);
3809                 B43legacy_WARN_ON(!wl);
3810         }
3811         err = b43legacy_one_core_attach(dev, wl);
3812         if (err)
3813                 goto err_wireless_exit;
3814
3815         if (first) {
3816                 err = ieee80211_register_hw(wl->hw);
3817                 if (err)
3818                         goto err_one_core_detach;
3819         }
3820
3821 out:
3822         return err;
3823
3824 err_one_core_detach:
3825         b43legacy_one_core_detach(dev);
3826 err_wireless_exit:
3827         if (first)
3828                 b43legacy_wireless_exit(dev, wl);
3829         return err;
3830 }
3831
3832 static void b43legacy_remove(struct ssb_device *dev)
3833 {
3834         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3835         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3836
3837         /* We must cancel any work here before unregistering from ieee80211,
3838          * as the ieee80211 unreg will destroy the workqueue. */
3839         cancel_work_sync(&wldev->restart_work);
3840
3841         B43legacy_WARN_ON(!wl);
3842         if (wl->current_dev == wldev)
3843                 ieee80211_unregister_hw(wl->hw);
3844
3845         b43legacy_one_core_detach(dev);
3846
3847         if (list_empty(&wl->devlist))
3848                 /* Last core on the chip unregistered.
3849                  * We can destroy common struct b43legacy_wl.
3850                  */
3851                 b43legacy_wireless_exit(dev, wl);
3852 }
3853
3854 /* Perform a hardware reset. This can be called from any context. */
3855 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3856                                   const char *reason)
3857 {
3858         /* Must avoid requeueing, if we are in shutdown. */
3859         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3860                 return;
3861         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3862         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3863 }
3864
3865 #ifdef CONFIG_PM
3866
3867 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3868 {
3869         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3870         struct b43legacy_wl *wl = wldev->wl;
3871
3872         b43legacydbg(wl, "Suspending...\n");
3873
3874         mutex_lock(&wl->mutex);
3875         wldev->suspend_init_status = b43legacy_status(wldev);
3876         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3877                 b43legacy_wireless_core_stop(wldev);
3878         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3879                 b43legacy_wireless_core_exit(wldev);
3880         mutex_unlock(&wl->mutex);
3881
3882         b43legacydbg(wl, "Device suspended.\n");
3883
3884         return 0;
3885 }
3886
3887 static int b43legacy_resume(struct ssb_device *dev)
3888 {
3889         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3890         struct b43legacy_wl *wl = wldev->wl;
3891         int err = 0;
3892
3893         b43legacydbg(wl, "Resuming...\n");
3894
3895         mutex_lock(&wl->mutex);
3896         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3897                 err = b43legacy_wireless_core_init(wldev);
3898                 if (err) {
3899                         b43legacyerr(wl, "Resume failed at core init\n");
3900                         goto out;
3901                 }
3902         }
3903         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3904                 err = b43legacy_wireless_core_start(wldev);
3905                 if (err) {
3906                         b43legacy_wireless_core_exit(wldev);
3907                         b43legacyerr(wl, "Resume failed at core start\n");
3908                         goto out;
3909                 }
3910         }
3911
3912         b43legacydbg(wl, "Device resumed.\n");
3913 out:
3914         mutex_unlock(&wl->mutex);
3915         return err;
3916 }
3917
3918 #else   /* CONFIG_PM */
3919 # define b43legacy_suspend      NULL
3920 # define b43legacy_resume               NULL
3921 #endif  /* CONFIG_PM */
3922
3923 static struct ssb_driver b43legacy_ssb_driver = {
3924         .name           = KBUILD_MODNAME,
3925         .id_table       = b43legacy_ssb_tbl,
3926         .probe          = b43legacy_probe,
3927         .remove         = b43legacy_remove,
3928         .suspend        = b43legacy_suspend,
3929         .resume         = b43legacy_resume,
3930 };
3931
3932 static void b43legacy_print_driverinfo(void)
3933 {
3934         const char *feat_pci = "", *feat_leds = "",
3935                    *feat_pio = "", *feat_dma = "";
3936
3937 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3938         feat_pci = "P";
3939 #endif
3940 #ifdef CONFIG_B43LEGACY_LEDS
3941         feat_leds = "L";
3942 #endif
3943 #ifdef CONFIG_B43LEGACY_PIO
3944         feat_pio = "I";
3945 #endif
3946 #ifdef CONFIG_B43LEGACY_DMA
3947         feat_dma = "D";
3948 #endif
3949         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3950                "[ Features: %s%s%s%s, Firmware-ID: "
3951                B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3952                feat_pci, feat_leds, feat_pio, feat_dma);
3953 }
3954
3955 static int __init b43legacy_init(void)
3956 {
3957         int err;
3958
3959         b43legacy_debugfs_init();
3960
3961         err = ssb_driver_register(&b43legacy_ssb_driver);
3962         if (err)
3963                 goto err_dfs_exit;
3964
3965         b43legacy_print_driverinfo();
3966
3967         return err;
3968
3969 err_dfs_exit:
3970         b43legacy_debugfs_exit();
3971         return err;
3972 }
3973
3974 static void __exit b43legacy_exit(void)
3975 {
3976         ssb_driver_unregister(&b43legacy_ssb_driver);
3977         b43legacy_debugfs_exit();
3978 }
3979
3980 module_init(b43legacy_init)
3981 module_exit(b43legacy_exit)