[B43LEGACY]: add mac80211-based driver for legacy BCM43xx devices
[linux-2.6.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2  *
3  *  Broadcom B43legacy wireless driver
4  *
5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6  *  Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11  *
12  *  Some parts of the code in this file are derived from the ipw2200
13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
14
15  *  This program is free software; you can redistribute it and/or modify
16  *  it under the terms of the GNU General Public License as published by
17  *  the Free Software Foundation; either version 2 of the License, or
18  *  (at your option) any later version.
19  *
20  *  This program is distributed in the hope that it will be useful,
21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  *  GNU General Public License for more details.
24  *
25  *  You should have received a copy of the GNU General Public License
26  *  along with this program; see the file COPYING.  If not, write to
27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28  *  Boston, MA 02110-1301, USA.
29  *
30  */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio;
65 module_param_named(pio, modparam_pio, int, 0444);
66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio   0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio   1
71 #endif
72
73 static int modparam_bad_frames_preempt;
74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
76                  " Preemption");
77
78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
79 module_param_named(short_retry, modparam_short_retry, int, 0444);
80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
81
82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
83 module_param_named(long_retry, modparam_long_retry, int, 0444);
84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
85
86 static int modparam_noleds;
87 module_param_named(noleds, modparam_noleds, int, 0444);
88 MODULE_PARM_DESC(noleds, "Turn off all LED activity");
89
90 static char modparam_fwpostfix[16];
91 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
92 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
93
94 static int modparam_mon_keep_bad;
95 module_param_named(mon_keep_bad, modparam_mon_keep_bad, int, 0444);
96 MODULE_PARM_DESC(mon_keep_bad, "Keep bad frames in monitor mode");
97
98 static int modparam_mon_keep_badplcp;
99 module_param_named(mon_keep_badplcp, modparam_mon_keep_bad, int, 0444);
100 MODULE_PARM_DESC(mon_keep_badplcp, "Keep frames with bad PLCP in monitor mode");
101
102 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
103 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
104         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
105         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
106         SSB_DEVTABLE_END
107 };
108 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
109
110
111 /* Channel and ratetables are shared for all devices.
112  * They can't be const, because ieee80211 puts some precalculated
113  * data in there. This data is the same for all devices, so we don't
114  * get concurrency issues */
115 #define RATETAB_ENT(_rateid, _flags) \
116         {                                                       \
117                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
118                 .val    = (_rateid),                            \
119                 .val2   = (_rateid),                            \
120                 .flags  = (_flags),                             \
121         }
122 static struct ieee80211_rate __b43legacy_ratetable[] = {
123         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
124         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
125         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
126         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
127         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
128         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
129         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
130         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
131         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
132         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
133         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
134         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
135 };
136 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
137 #define b43legacy_a_ratetable_size      8
138 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
139 #define b43legacy_b_ratetable_size      4
140 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
141 #define b43legacy_g_ratetable_size      12
142
143 #define CHANTAB_ENT(_chanid, _freq) \
144         {                                                       \
145                 .chan   = (_chanid),                            \
146                 .freq   = (_freq),                              \
147                 .val    = (_chanid),                            \
148                 .flag   = IEEE80211_CHAN_W_SCAN |               \
149                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
150                           IEEE80211_CHAN_W_IBSS,                \
151                 .power_level    = 0x0A,                         \
152                 .antenna_max    = 0xFF,                         \
153         }
154 static struct ieee80211_channel b43legacy_bg_chantable[] = {
155         CHANTAB_ENT(1, 2412),
156         CHANTAB_ENT(2, 2417),
157         CHANTAB_ENT(3, 2422),
158         CHANTAB_ENT(4, 2427),
159         CHANTAB_ENT(5, 2432),
160         CHANTAB_ENT(6, 2437),
161         CHANTAB_ENT(7, 2442),
162         CHANTAB_ENT(8, 2447),
163         CHANTAB_ENT(9, 2452),
164         CHANTAB_ENT(10, 2457),
165         CHANTAB_ENT(11, 2462),
166         CHANTAB_ENT(12, 2467),
167         CHANTAB_ENT(13, 2472),
168         CHANTAB_ENT(14, 2484),
169 };
170 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
171
172 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
173 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
174 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
175 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
176
177
178 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
179 {
180         if (!wl || !wl->current_dev)
181                 return 1;
182         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
183                 return 1;
184         /* We are up and running.
185          * Ratelimit the messages to avoid DoS over the net. */
186         return net_ratelimit();
187 }
188
189 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
190 {
191         va_list args;
192
193         if (!b43legacy_ratelimit(wl))
194                 return;
195         va_start(args, fmt);
196         printk(KERN_INFO "b43legacy-%s: ",
197                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
198         vprintk(fmt, args);
199         va_end(args);
200 }
201
202 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
203 {
204         va_list args;
205
206         if (!b43legacy_ratelimit(wl))
207                 return;
208         va_start(args, fmt);
209         printk(KERN_ERR "b43legacy-%s ERROR: ",
210                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
211         vprintk(fmt, args);
212         va_end(args);
213 }
214
215 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
216 {
217         va_list args;
218
219         if (!b43legacy_ratelimit(wl))
220                 return;
221         va_start(args, fmt);
222         printk(KERN_WARNING "b43legacy-%s warning: ",
223                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
224         vprintk(fmt, args);
225         va_end(args);
226 }
227
228 #if B43legacy_DEBUG
229 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
230 {
231         va_list args;
232
233         va_start(args, fmt);
234         printk(KERN_DEBUG "b43legacy-%s debug: ",
235                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
236         vprintk(fmt, args);
237         va_end(args);
238 }
239 #endif /* DEBUG */
240
241 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
242                                 u32 val)
243 {
244         u32 status;
245
246         B43legacy_WARN_ON(offset % 4 != 0);
247
248         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
249         if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
250                 val = swab32(val);
251
252         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
253         mmiowb();
254         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
255 }
256
257 static inline
258 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
259                                 u16 routing, u16 offset)
260 {
261         u32 control;
262
263         /* "offset" is the WORD offset. */
264
265         control = routing;
266         control <<= 16;
267         control |= offset;
268         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
269 }
270
271 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
272                        u16 routing, u16 offset)
273 {
274         u32 ret;
275
276         if (routing == B43legacy_SHM_SHARED) {
277                 B43legacy_WARN_ON((offset & 0x0001) != 0);
278                 if (offset & 0x0003) {
279                         /* Unaligned access */
280                         b43legacy_shm_control_word(dev, routing, offset >> 2);
281                         ret = b43legacy_read16(dev,
282                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
283                         ret <<= 16;
284                         b43legacy_shm_control_word(dev, routing,
285                                                      (offset >> 2) + 1);
286                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
287
288                         return ret;
289                 }
290                 offset >>= 2;
291         }
292         b43legacy_shm_control_word(dev, routing, offset);
293         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
294
295         return ret;
296 }
297
298 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
299                            u16 routing, u16 offset)
300 {
301         u16 ret;
302
303         if (routing == B43legacy_SHM_SHARED) {
304                 B43legacy_WARN_ON((offset & 0x0001) != 0);
305                 if (offset & 0x0003) {
306                         /* Unaligned access */
307                         b43legacy_shm_control_word(dev, routing, offset >> 2);
308                         ret = b43legacy_read16(dev,
309                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
310
311                         return ret;
312                 }
313                 offset >>= 2;
314         }
315         b43legacy_shm_control_word(dev, routing, offset);
316         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
317
318         return ret;
319 }
320
321 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
322                            u16 routing, u16 offset,
323                            u32 value)
324 {
325         if (routing == B43legacy_SHM_SHARED) {
326                 B43legacy_WARN_ON((offset & 0x0001) != 0);
327                 if (offset & 0x0003) {
328                         /* Unaligned access */
329                         b43legacy_shm_control_word(dev, routing, offset >> 2);
330                         mmiowb();
331                         b43legacy_write16(dev,
332                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
333                                           (value >> 16) & 0xffff);
334                         mmiowb();
335                         b43legacy_shm_control_word(dev, routing,
336                                                    (offset >> 2) + 1);
337                         mmiowb();
338                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
339                                           value & 0xffff);
340                         return;
341                 }
342                 offset >>= 2;
343         }
344         b43legacy_shm_control_word(dev, routing, offset);
345         mmiowb();
346         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
347 }
348
349 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
350                            u16 value)
351 {
352         if (routing == B43legacy_SHM_SHARED) {
353                 B43legacy_WARN_ON((offset & 0x0001) != 0);
354                 if (offset & 0x0003) {
355                         /* Unaligned access */
356                         b43legacy_shm_control_word(dev, routing, offset >> 2);
357                         mmiowb();
358                         b43legacy_write16(dev,
359                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
360                                           value);
361                         return;
362                 }
363                 offset >>= 2;
364         }
365         b43legacy_shm_control_word(dev, routing, offset);
366         mmiowb();
367         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
368 }
369
370 /* Read HostFlags */
371 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
372 {
373         u32 ret;
374
375         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
376                                    B43legacy_SHM_SH_HOSTFHI);
377         ret <<= 16;
378         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
379                                     B43legacy_SHM_SH_HOSTFLO);
380
381         return ret;
382 }
383
384 /* Write HostFlags */
385 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
386 {
387         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
388                               B43legacy_SHM_SH_HOSTFLO,
389                               (value & 0x0000FFFF));
390         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
391                               B43legacy_SHM_SH_HOSTFHI,
392                               ((value & 0xFFFF0000) >> 16));
393 }
394
395 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
396 {
397         /* We need to be careful. As we read the TSF from multiple
398          * registers, we should take care of register overflows.
399          * In theory, the whole tsf read process should be atomic.
400          * We try to be atomic here, by restaring the read process,
401          * if any of the high registers changed (overflew).
402          */
403         if (dev->dev->id.revision >= 3) {
404                 u32 low;
405                 u32 high;
406                 u32 high2;
407
408                 do {
409                         high = b43legacy_read32(dev,
410                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
411                         low = b43legacy_read32(dev,
412                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
413                         high2 = b43legacy_read32(dev,
414                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
415                 } while (unlikely(high != high2));
416
417                 *tsf = high;
418                 *tsf <<= 32;
419                 *tsf |= low;
420         } else {
421                 u64 tmp;
422                 u16 v0;
423                 u16 v1;
424                 u16 v2;
425                 u16 v3;
426                 u16 test1;
427                 u16 test2;
428                 u16 test3;
429
430                 do {
431                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
432                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
433                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
434                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
435
436                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
437                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
438                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
439                 } while (v3 != test3 || v2 != test2 || v1 != test1);
440
441                 *tsf = v3;
442                 *tsf <<= 48;
443                 tmp = v2;
444                 tmp <<= 32;
445                 *tsf |= tmp;
446                 tmp = v1;
447                 tmp <<= 16;
448                 *tsf |= tmp;
449                 *tsf |= v0;
450         }
451 }
452
453 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
454 {
455         u32 status;
456
457         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
458         status |= B43legacy_SBF_TIME_UPDATE;
459         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
460         mmiowb();
461 }
462
463 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
464 {
465         u32 status;
466
467         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
468         status &= ~B43legacy_SBF_TIME_UPDATE;
469         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
470 }
471
472 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
473 {
474         /* Be careful with the in-progress timer.
475          * First zero out the low register, so we have a full
476          * register-overflow duration to complete the operation.
477          */
478         if (dev->dev->id.revision >= 3) {
479                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
480                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
481
482                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
483                 mmiowb();
484                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
485                                     hi);
486                 mmiowb();
487                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
488                                     lo);
489         } else {
490                 u16 v0 = (tsf & 0x000000000000FFFFULL);
491                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
492                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
493                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
494
495                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
496                 mmiowb();
497                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
498                 mmiowb();
499                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
500                 mmiowb();
501                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
502                 mmiowb();
503                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
504         }
505 }
506
507 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
508 {
509         b43legacy_time_lock(dev);
510         b43legacy_tsf_write_locked(dev, tsf);
511         b43legacy_time_unlock(dev);
512 }
513
514 static
515 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
516                              u16 offset, const u8 *mac)
517 {
518         static const u8 zero_addr[ETH_ALEN] = { 0 };
519         u16 data;
520
521         if (!mac)
522                 mac = zero_addr;
523
524         offset |= 0x0020;
525         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
526
527         data = mac[0];
528         data |= mac[1] << 8;
529         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
530         data = mac[2];
531         data |= mac[3] << 8;
532         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
533         data = mac[4];
534         data |= mac[5] << 8;
535         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
536 }
537
538 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
539 {
540         static const u8 zero_addr[ETH_ALEN] = { 0 };
541         const u8 *mac = dev->wl->mac_addr;
542         const u8 *bssid = dev->wl->bssid;
543         u8 mac_bssid[ETH_ALEN * 2];
544         int i;
545         u32 tmp;
546
547         if (!bssid)
548                 bssid = zero_addr;
549         if (!mac)
550                 mac = zero_addr;
551
552         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
553
554         memcpy(mac_bssid, mac, ETH_ALEN);
555         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
556
557         /* Write our MAC address and BSSID to template ram */
558         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
559                 tmp =  (u32)(mac_bssid[i + 0]);
560                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
561                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
562                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
563                 b43legacy_ram_write(dev, 0x20 + i, tmp);
564                 b43legacy_ram_write(dev, 0x78 + i, tmp);
565                 b43legacy_ram_write(dev, 0x478 + i, tmp);
566         }
567 }
568
569 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev,
570                                              const u8 *mac_addr)
571 {
572         dev->wl->mac_addr = mac_addr;
573         b43legacy_write_mac_bssid_templates(dev);
574         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, mac_addr);
575 }
576
577 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
578                                     u16 slot_time)
579 {
580         /* slot_time is in usec. */
581         if (dev->phy.type != B43legacy_PHYTYPE_G)
582                 return;
583         b43legacy_write16(dev, 0x684, 510 + slot_time);
584         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
585                               slot_time);
586 }
587
588 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
589 {
590         b43legacy_set_slot_time(dev, 9);
591         dev->short_slot = 1;
592 }
593
594 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
595 {
596         b43legacy_set_slot_time(dev, 20);
597         dev->short_slot = 0;
598 }
599
600 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
601  * Returns the _previously_ enabled IRQ mask.
602  */
603 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
604                                              u32 mask)
605 {
606         u32 old_mask;
607
608         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
609         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
610                           mask);
611
612         return old_mask;
613 }
614
615 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
616  * Returns the _previously_ enabled IRQ mask.
617  */
618 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
619                                               u32 mask)
620 {
621         u32 old_mask;
622
623         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
624         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
625
626         return old_mask;
627 }
628
629 /* Synchronize IRQ top- and bottom-half.
630  * IRQs must be masked before calling this.
631  * This must not be called with the irq_lock held.
632  */
633 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
634 {
635         synchronize_irq(dev->dev->irq);
636         tasklet_kill(&dev->isr_tasklet);
637 }
638
639 /* DummyTransmission function, as documented on
640  * http://bcm-specs.sipsolutions.net/DummyTransmission
641  */
642 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
643 {
644         struct b43legacy_phy *phy = &dev->phy;
645         unsigned int i;
646         unsigned int max_loop;
647         u16 value;
648         u32 buffer[5] = {
649                 0x00000000,
650                 0x00D40000,
651                 0x00000000,
652                 0x01000000,
653                 0x00000000,
654         };
655
656         switch (phy->type) {
657         case B43legacy_PHYTYPE_B:
658         case B43legacy_PHYTYPE_G:
659                 max_loop = 0xFA;
660                 buffer[0] = 0x000B846E;
661                 break;
662         default:
663                 B43legacy_BUG_ON(1);
664                 return;
665         }
666
667         for (i = 0; i < 5; i++)
668                 b43legacy_ram_write(dev, i * 4, buffer[i]);
669
670         /* dummy read follows */
671         b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
672
673         b43legacy_write16(dev, 0x0568, 0x0000);
674         b43legacy_write16(dev, 0x07C0, 0x0000);
675         b43legacy_write16(dev, 0x050C, 0x0000);
676         b43legacy_write16(dev, 0x0508, 0x0000);
677         b43legacy_write16(dev, 0x050A, 0x0000);
678         b43legacy_write16(dev, 0x054C, 0x0000);
679         b43legacy_write16(dev, 0x056A, 0x0014);
680         b43legacy_write16(dev, 0x0568, 0x0826);
681         b43legacy_write16(dev, 0x0500, 0x0000);
682         b43legacy_write16(dev, 0x0502, 0x0030);
683
684         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
685                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
686         for (i = 0x00; i < max_loop; i++) {
687                 value = b43legacy_read16(dev, 0x050E);
688                 if (value & 0x0080)
689                         break;
690                 udelay(10);
691         }
692         for (i = 0x00; i < 0x0A; i++) {
693                 value = b43legacy_read16(dev, 0x050E);
694                 if (value & 0x0400)
695                         break;
696                 udelay(10);
697         }
698         for (i = 0x00; i < 0x0A; i++) {
699                 value = b43legacy_read16(dev, 0x0690);
700                 if (!(value & 0x0100))
701                         break;
702                 udelay(10);
703         }
704         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
705                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
706 }
707
708 /* Turn the Analog ON/OFF */
709 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
710 {
711         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
712 }
713
714 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
715 {
716         u32 tmslow;
717         u32 macctl;
718
719         flags |= B43legacy_TMSLOW_PHYCLKEN;
720         flags |= B43legacy_TMSLOW_PHYRESET;
721         ssb_device_enable(dev->dev, flags);
722         msleep(2); /* Wait for the PLL to turn on. */
723
724         /* Now take the PHY out of Reset again */
725         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
726         tmslow |= SSB_TMSLOW_FGC;
727         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
728         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
729         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
730         msleep(1);
731         tmslow &= ~SSB_TMSLOW_FGC;
732         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
733         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
734         msleep(1);
735
736         /* Turn Analog ON */
737         b43legacy_switch_analog(dev, 1);
738
739         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
740         macctl &= ~B43legacy_MACCTL_GMODE;
741         if (flags & B43legacy_TMSLOW_GMODE) {
742                 macctl |= B43legacy_MACCTL_GMODE;
743                 dev->phy.gmode = 1;
744         } else
745                 dev->phy.gmode = 0;
746         macctl |= B43legacy_MACCTL_IHR_ENABLED;
747         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
748 }
749
750 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
751 {
752         u32 v0;
753         u32 v1;
754         u16 tmp;
755         struct b43legacy_txstatus stat;
756
757         while (1) {
758                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
759                 if (!(v0 & 0x00000001))
760                         break;
761                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
762
763                 stat.cookie = (v0 >> 16);
764                 stat.seq = (v1 & 0x0000FFFF);
765                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
766                 tmp = (v0 & 0x0000FFFF);
767                 stat.frame_count = ((tmp & 0xF000) >> 12);
768                 stat.rts_count = ((tmp & 0x0F00) >> 8);
769                 stat.supp_reason = ((tmp & 0x001C) >> 2);
770                 stat.pm_indicated = !!(tmp & 0x0080);
771                 stat.intermediate = !!(tmp & 0x0040);
772                 stat.for_ampdu = !!(tmp & 0x0020);
773                 stat.acked = !!(tmp & 0x0002);
774
775                 b43legacy_handle_txstatus(dev, &stat);
776         }
777 }
778
779 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
780 {
781         u32 dummy;
782
783         if (dev->dev->id.revision < 5)
784                 return;
785         /* Read all entries from the microcode TXstatus FIFO
786          * and throw them away.
787          */
788         while (1) {
789                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
790                 if (!(dummy & 0x00000001))
791                         break;
792                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
793         }
794 }
795
796 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
797 {
798         u32 val = 0;
799
800         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
801         val <<= 16;
802         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
803
804         return val;
805 }
806
807 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
808 {
809         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
810                               (jssi & 0x0000FFFF));
811         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
812                               (jssi & 0xFFFF0000) >> 16);
813 }
814
815 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
816 {
817         b43legacy_jssi_write(dev, 0x7F7F7F7F);
818         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
819                           b43legacy_read32(dev,
820                           B43legacy_MMIO_STATUS2_BITFIELD)
821                           | (1 << 4));
822         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
823                             dev->phy.channel);
824 }
825
826 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
827 {
828         /* Top half of Link Quality calculation. */
829
830         if (dev->noisecalc.calculation_running)
831                 return;
832         dev->noisecalc.channel_at_start = dev->phy.channel;
833         dev->noisecalc.calculation_running = 1;
834         dev->noisecalc.nr_samples = 0;
835
836         b43legacy_generate_noise_sample(dev);
837 }
838
839 static void handle_irq_noise(struct b43legacy_wldev *dev)
840 {
841         struct b43legacy_phy *phy = &dev->phy;
842         u16 tmp;
843         u8 noise[4];
844         u8 i;
845         u8 j;
846         s32 average;
847
848         /* Bottom half of Link Quality calculation. */
849
850         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
851         if (dev->noisecalc.channel_at_start != phy->channel)
852                 goto drop_calculation;
853         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
854         if (noise[0] == 0x7F || noise[1] == 0x7F ||
855             noise[2] == 0x7F || noise[3] == 0x7F)
856                 goto generate_new;
857
858         /* Get the noise samples. */
859         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
860         i = dev->noisecalc.nr_samples;
861         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
862         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
863         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
864         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
865         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
866         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
867         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
868         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
869         dev->noisecalc.nr_samples++;
870         if (dev->noisecalc.nr_samples == 8) {
871                 /* Calculate the Link Quality by the noise samples. */
872                 average = 0;
873                 for (i = 0; i < 8; i++) {
874                         for (j = 0; j < 4; j++)
875                                 average += dev->noisecalc.samples[i][j];
876                 }
877                 average /= (8 * 4);
878                 average *= 125;
879                 average += 64;
880                 average /= 128;
881                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
882                                              0x40C);
883                 tmp = (tmp / 128) & 0x1F;
884                 if (tmp >= 8)
885                         average += 2;
886                 else
887                         average -= 25;
888                 if (tmp == 8)
889                         average -= 72;
890                 else
891                         average -= 48;
892
893                 dev->stats.link_noise = average;
894 drop_calculation:
895                 dev->noisecalc.calculation_running = 0;
896                 return;
897         }
898 generate_new:
899         b43legacy_generate_noise_sample(dev);
900 }
901
902 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
903 {
904         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
905                 /* TODO: PS TBTT */
906         } else {
907                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
908                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
909         }
910         dev->reg124_set_0x4 = 0;
911         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
912                 dev->reg124_set_0x4 = 1;
913 }
914
915 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
916 {
917         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
918                 return;
919         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
920                           b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
921                           | 0x4);
922 }
923
924 static void handle_irq_pmq(struct b43legacy_wldev *dev)
925 {
926         u32 tmp;
927
928         /* TODO: AP mode. */
929
930         while (1) {
931                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
932                 if (!(tmp & 0x00000008))
933                         break;
934         }
935         /* 16bit write is odd, but correct. */
936         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
937 }
938
939 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
940                                             const u8 *data, u16 size,
941                                             u16 ram_offset,
942                                             u16 shm_size_offset, u8 rate)
943 {
944         u32 i;
945         u32 tmp;
946         struct b43legacy_plcp_hdr4 plcp;
947
948         plcp.data = 0;
949         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
950         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
951         ram_offset += sizeof(u32);
952         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
953          * So leave the first two bytes of the next write blank.
954          */
955         tmp = (u32)(data[0]) << 16;
956         tmp |= (u32)(data[1]) << 24;
957         b43legacy_ram_write(dev, ram_offset, tmp);
958         ram_offset += sizeof(u32);
959         for (i = 2; i < size; i += sizeof(u32)) {
960                 tmp = (u32)(data[i + 0]);
961                 if (i + 1 < size)
962                         tmp |= (u32)(data[i + 1]) << 8;
963                 if (i + 2 < size)
964                         tmp |= (u32)(data[i + 2]) << 16;
965                 if (i + 3 < size)
966                         tmp |= (u32)(data[i + 3]) << 24;
967                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
968         }
969         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
970                               size + sizeof(struct b43legacy_plcp_hdr6));
971 }
972
973 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
974                                             u16 ram_offset,
975                                             u16 shm_size_offset, u8 rate)
976 {
977         int len;
978         const u8 *data;
979
980         B43legacy_WARN_ON(!dev->cached_beacon);
981         len = min((size_t)dev->cached_beacon->len,
982                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
983         data = (const u8 *)(dev->cached_beacon->data);
984         b43legacy_write_template_common(dev, data,
985                                         len, ram_offset,
986                                         shm_size_offset, rate);
987 }
988
989 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
990                                             u16 shm_offset, u16 size,
991                                             u8 rate)
992 {
993         struct b43legacy_plcp_hdr4 plcp;
994         u32 tmp;
995         __le16 dur;
996
997         plcp.data = 0;
998         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
999         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1000                                                dev->wl->if_id,
1001                                                size,
1002                                                B43legacy_RATE_TO_100KBPS(rate));
1003         /* Write PLCP in two parts and timing for packet transfer */
1004         tmp = le32_to_cpu(plcp.data);
1005         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1006                               tmp & 0xFFFF);
1007         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1008                               tmp >> 16);
1009         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1010                               le16_to_cpu(dur));
1011 }
1012
1013 /* Instead of using custom probe response template, this function
1014  * just patches custom beacon template by:
1015  * 1) Changing packet type
1016  * 2) Patching duration field
1017  * 3) Stripping TIM
1018  */
1019 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1020                                          u16 *dest_size, u8 rate)
1021 {
1022         const u8 *src_data;
1023         u8 *dest_data;
1024         u16 src_size;
1025         u16 elem_size;
1026         u16 src_pos;
1027         u16 dest_pos;
1028         __le16 dur;
1029         struct ieee80211_hdr *hdr;
1030
1031         B43legacy_WARN_ON(!dev->cached_beacon);
1032         src_size = dev->cached_beacon->len;
1033         src_data = (const u8 *)dev->cached_beacon->data;
1034
1035         if (unlikely(src_size < 0x24)) {
1036                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1037                        "invalid beacon\n");
1038                 return NULL;
1039         }
1040
1041         dest_data = kmalloc(src_size, GFP_ATOMIC);
1042         if (unlikely(!dest_data))
1043                 return NULL;
1044
1045         /* 0x24 is offset of first variable-len Information-Element
1046          * in beacon frame.
1047          */
1048         memcpy(dest_data, src_data, 0x24);
1049         src_pos = 0x24;
1050         dest_pos = 0x24;
1051         for (; src_pos < src_size - 2; src_pos += elem_size) {
1052                 elem_size = src_data[src_pos + 1] + 2;
1053                 if (src_data[src_pos] != 0x05) { /* TIM */
1054                         memcpy(dest_data + dest_pos, src_data + src_pos,
1055                                elem_size);
1056                         dest_pos += elem_size;
1057                 }
1058         }
1059         *dest_size = dest_pos;
1060         hdr = (struct ieee80211_hdr *)dest_data;
1061
1062         /* Set the frame control. */
1063         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1064                                          IEEE80211_STYPE_PROBE_RESP);
1065         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1066                                                dev->wl->if_id,
1067                                                *dest_size,
1068                                                B43legacy_RATE_TO_100KBPS(rate));
1069         hdr->duration_id = dur;
1070
1071         return dest_data;
1072 }
1073
1074 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1075                                                 u16 ram_offset,
1076                                                 u16 shm_size_offset, u8 rate)
1077 {
1078         u8 *probe_resp_data;
1079         u16 size;
1080
1081         B43legacy_WARN_ON(!dev->cached_beacon);
1082         size = dev->cached_beacon->len;
1083         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1084         if (unlikely(!probe_resp_data))
1085                 return;
1086
1087         /* Looks like PLCP headers plus packet timings are stored for
1088          * all possible basic rates
1089          */
1090         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1091                                         B43legacy_CCK_RATE_1MB);
1092         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1093                                         B43legacy_CCK_RATE_2MB);
1094         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1095                                         B43legacy_CCK_RATE_5MB);
1096         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1097                                         B43legacy_CCK_RATE_11MB);
1098
1099         size = min((size_t)size,
1100                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1101         b43legacy_write_template_common(dev, probe_resp_data,
1102                                         size, ram_offset,
1103                                         shm_size_offset, rate);
1104         kfree(probe_resp_data);
1105 }
1106
1107 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1108                                            struct sk_buff *beacon)
1109 {
1110         if (dev->cached_beacon)
1111                 kfree_skb(dev->cached_beacon);
1112         dev->cached_beacon = beacon;
1113
1114         return 0;
1115 }
1116
1117 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1118 {
1119         u32 status;
1120
1121         B43legacy_WARN_ON(!dev->cached_beacon);
1122
1123         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1124                                         B43legacy_CCK_RATE_1MB);
1125         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1126                                         B43legacy_CCK_RATE_1MB);
1127         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1128                                             B43legacy_CCK_RATE_11MB);
1129
1130         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1131         status |= 0x03;
1132         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1133 }
1134
1135 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1136                                         struct sk_buff *beacon)
1137 {
1138         int err;
1139
1140         err = b43legacy_refresh_cached_beacon(dev, beacon);
1141         if (unlikely(err))
1142                 return;
1143         b43legacy_update_templates(dev);
1144 }
1145
1146 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1147                                const u8 *ssid, u8 ssid_len)
1148 {
1149         u32 tmp;
1150         u16 i;
1151         u16 len;
1152
1153         len = min((u16)ssid_len, (u16)0x100);
1154         for (i = 0; i < len; i += sizeof(u32)) {
1155                 tmp = (u32)(ssid[i + 0]);
1156                 if (i + 1 < len)
1157                         tmp |= (u32)(ssid[i + 1]) << 8;
1158                 if (i + 2 < len)
1159                         tmp |= (u32)(ssid[i + 2]) << 16;
1160                 if (i + 3 < len)
1161                         tmp |= (u32)(ssid[i + 3]) << 24;
1162                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1163                                       0x380 + i, tmp);
1164         }
1165         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1166                               0x48, len);
1167 }
1168
1169 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1170                                      u16 beacon_int)
1171 {
1172         b43legacy_time_lock(dev);
1173         if (dev->dev->id.revision >= 3)
1174                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1175         else {
1176                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1177                 b43legacy_write16(dev, 0x610, beacon_int);
1178         }
1179         b43legacy_time_unlock(dev);
1180 }
1181
1182 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1183 {
1184         u32 status;
1185
1186         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1187                 return;
1188
1189         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1190         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1191
1192         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1193                 /* ACK beacon IRQ. */
1194                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1195                                   B43legacy_IRQ_BEACON);
1196                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1197                 if (dev->cached_beacon)
1198                         kfree_skb(dev->cached_beacon);
1199                 dev->cached_beacon = NULL;
1200                 return;
1201         }
1202         if (!(status & 0x1)) {
1203                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1204                                                 B43legacy_CCK_RATE_1MB);
1205                 status |= 0x1;
1206                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1207                                   status);
1208         }
1209         if (!(status & 0x2)) {
1210                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1211                                                 B43legacy_CCK_RATE_1MB);
1212                 status |= 0x2;
1213                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1214                                   status);
1215         }
1216 }
1217
1218 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1219 {
1220 }
1221
1222 /* Interrupt handler bottom-half */
1223 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1224 {
1225         u32 reason;
1226         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1227         u32 merged_dma_reason = 0;
1228         int i;
1229         int activity = 0;
1230         unsigned long flags;
1231
1232         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1233
1234         B43legacy_WARN_ON(b43legacy_status(dev) <
1235                           B43legacy_STAT_INITIALIZED);
1236
1237         reason = dev->irq_reason;
1238         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1239                 dma_reason[i] = dev->dma_reason[i];
1240                 merged_dma_reason |= dma_reason[i];
1241         }
1242
1243         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1244                 b43legacyerr(dev->wl, "MAC transmission error\n");
1245
1246         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1247                 b43legacyerr(dev->wl, "PHY transmission error\n");
1248
1249         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1250                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1251                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1252                         b43legacyerr(dev->wl, "Fatal DMA error: "
1253                                "0x%08X, 0x%08X, 0x%08X, "
1254                                "0x%08X, 0x%08X, 0x%08X\n",
1255                                dma_reason[0], dma_reason[1],
1256                                dma_reason[2], dma_reason[3],
1257                                dma_reason[4], dma_reason[5]);
1258                         b43legacy_controller_restart(dev, "DMA error");
1259                         mmiowb();
1260                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1261                         return;
1262                 }
1263                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1264                         b43legacyerr(dev->wl, "DMA error: "
1265                                "0x%08X, 0x%08X, 0x%08X, "
1266                                "0x%08X, 0x%08X, 0x%08X\n",
1267                                dma_reason[0], dma_reason[1],
1268                                dma_reason[2], dma_reason[3],
1269                                dma_reason[4], dma_reason[5]);
1270         }
1271
1272         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1273                 handle_irq_ucode_debug(dev);
1274         if (reason & B43legacy_IRQ_TBTT_INDI)
1275                 handle_irq_tbtt_indication(dev);
1276         if (reason & B43legacy_IRQ_ATIM_END)
1277                 handle_irq_atim_end(dev);
1278         if (reason & B43legacy_IRQ_BEACON)
1279                 handle_irq_beacon(dev);
1280         if (reason & B43legacy_IRQ_PMQ)
1281                 handle_irq_pmq(dev);
1282         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1283                 ;/*TODO*/
1284         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1285                 handle_irq_noise(dev);
1286
1287         /* Check the DMA reason registers for received data. */
1288         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1289                 if (b43legacy_using_pio(dev))
1290                         b43legacy_pio_rx(dev->pio.queue0);
1291                 else
1292                         b43legacy_dma_rx(dev->dma.rx_ring0);
1293                 /* We intentionally don't set "activity" to 1, here. */
1294         }
1295         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1296         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1297         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1298                 if (b43legacy_using_pio(dev))
1299                         b43legacy_pio_rx(dev->pio.queue3);
1300                 else
1301                         b43legacy_dma_rx(dev->dma.rx_ring3);
1302                 activity = 1;
1303         }
1304         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1305         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1306
1307         if (reason & B43legacy_IRQ_TX_OK) {
1308                 handle_irq_transmit_status(dev);
1309                 activity = 1;
1310                 /* TODO: In AP mode, this also causes sending of powersave
1311                          responses. */
1312         }
1313
1314         if (!modparam_noleds)
1315                 b43legacy_leds_update(dev, activity);
1316         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1317         mmiowb();
1318         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1319 }
1320
1321 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1322                                u16 base, int queueidx)
1323 {
1324         u16 rxctl;
1325
1326         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1327         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1328                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1329         else
1330                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1331 }
1332
1333 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1334 {
1335         if (b43legacy_using_pio(dev) &&
1336             (dev->dev->id.revision < 3) &&
1337             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1338                 /* Apply a PIO specific workaround to the dma_reasons */
1339                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1340                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1341                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1342                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1343         }
1344
1345         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1346
1347         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1348                           dev->dma_reason[0]);
1349         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1350                           dev->dma_reason[1]);
1351         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1352                           dev->dma_reason[2]);
1353         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1354                           dev->dma_reason[3]);
1355         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1356                           dev->dma_reason[4]);
1357         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1358                           dev->dma_reason[5]);
1359 }
1360
1361 /* Interrupt handler top-half */
1362 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1363 {
1364         irqreturn_t ret = IRQ_NONE;
1365         struct b43legacy_wldev *dev = dev_id;
1366         u32 reason;
1367
1368         if (!dev)
1369                 return IRQ_NONE;
1370
1371         spin_lock(&dev->wl->irq_lock);
1372
1373         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1374                 goto out;
1375         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1376         if (reason == 0xffffffff) /* shared IRQ */
1377                 goto out;
1378         ret = IRQ_HANDLED;
1379         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1380         if (!reason)
1381                 goto out;
1382
1383         dev->dma_reason[0] = b43legacy_read32(dev,
1384                                               B43legacy_MMIO_DMA0_REASON)
1385                                               & 0x0001DC00;
1386         dev->dma_reason[1] = b43legacy_read32(dev,
1387                                               B43legacy_MMIO_DMA1_REASON)
1388                                               & 0x0000DC00;
1389         dev->dma_reason[2] = b43legacy_read32(dev,
1390                                               B43legacy_MMIO_DMA2_REASON)
1391                                               & 0x0000DC00;
1392         dev->dma_reason[3] = b43legacy_read32(dev,
1393                                               B43legacy_MMIO_DMA3_REASON)
1394                                               & 0x0001DC00;
1395         dev->dma_reason[4] = b43legacy_read32(dev,
1396                                               B43legacy_MMIO_DMA4_REASON)
1397                                               & 0x0000DC00;
1398         dev->dma_reason[5] = b43legacy_read32(dev,
1399                                               B43legacy_MMIO_DMA5_REASON)
1400                                               & 0x0000DC00;
1401
1402         b43legacy_interrupt_ack(dev, reason);
1403         /* disable all IRQs. They are enabled again in the bottom half. */
1404         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1405                                                           B43legacy_IRQ_ALL);
1406         /* save the reason code and call our bottom half. */
1407         dev->irq_reason = reason;
1408         tasklet_schedule(&dev->isr_tasklet);
1409 out:
1410         mmiowb();
1411         spin_unlock(&dev->wl->irq_lock);
1412
1413         return ret;
1414 }
1415
1416 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1417 {
1418         release_firmware(dev->fw.ucode);
1419         dev->fw.ucode = NULL;
1420         release_firmware(dev->fw.pcm);
1421         dev->fw.pcm = NULL;
1422         release_firmware(dev->fw.initvals);
1423         dev->fw.initvals = NULL;
1424         release_firmware(dev->fw.initvals_band);
1425         dev->fw.initvals_band = NULL;
1426 }
1427
1428 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1429 {
1430         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1431                      "Drivers/bcm43xx#devicefirmware "
1432                      "and download the correct firmware (version 3).\n");
1433 }
1434
1435 static int do_request_fw(struct b43legacy_wldev *dev,
1436                          const char *name,
1437                          const struct firmware **fw)
1438 {
1439         char path[sizeof(modparam_fwpostfix) + 32];
1440         struct b43legacy_fw_header *hdr;
1441         u32 size;
1442         int err;
1443
1444         if (!name)
1445                 return 0;
1446
1447         snprintf(path, ARRAY_SIZE(path),
1448                  "b43legacy%s/%s.fw",
1449                  modparam_fwpostfix, name);
1450         err = request_firmware(fw, path, dev->dev->dev);
1451         if (err) {
1452                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1453                        "or load failed.\n", path);
1454                 return err;
1455         }
1456         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1457                 goto err_format;
1458         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1459         switch (hdr->type) {
1460         case B43legacy_FW_TYPE_UCODE:
1461         case B43legacy_FW_TYPE_PCM:
1462                 size = be32_to_cpu(hdr->size);
1463                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1464                         goto err_format;
1465                 /* fallthrough */
1466         case B43legacy_FW_TYPE_IV:
1467                 if (hdr->ver != 1)
1468                         goto err_format;
1469                 break;
1470         default:
1471                 goto err_format;
1472         }
1473
1474         return err;
1475
1476 err_format:
1477         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1478         return -EPROTO;
1479 }
1480
1481 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1482 {
1483         struct b43legacy_firmware *fw = &dev->fw;
1484         const u8 rev = dev->dev->id.revision;
1485         const char *filename;
1486         u32 tmshigh;
1487         int err;
1488
1489         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1490         if (!fw->ucode) {
1491                 if (rev == 2)
1492                         filename = "ucode2";
1493                 else if (rev == 4)
1494                         filename = "ucode4";
1495                 else
1496                         filename = "ucode5";
1497                 err = do_request_fw(dev, filename, &fw->ucode);
1498                 if (err)
1499                         goto err_load;
1500         }
1501         if (!fw->pcm) {
1502                 if (rev < 5)
1503                         filename = "pcm4";
1504                 else
1505                         filename = "pcm5";
1506                 err = do_request_fw(dev, filename, &fw->pcm);
1507                 if (err)
1508                         goto err_load;
1509         }
1510         if (!fw->initvals) {
1511                 switch (dev->phy.type) {
1512                 case B43legacy_PHYTYPE_G:
1513                         if ((rev >= 5) && (rev <= 10))
1514                                 filename = "b0g0initvals5";
1515                         else if (rev == 2 || rev == 4)
1516                                 filename = "b0g0initvals2";
1517                         else
1518                                 goto err_no_initvals;
1519                         break;
1520                 default:
1521                         goto err_no_initvals;
1522                 }
1523                 err = do_request_fw(dev, filename, &fw->initvals);
1524                 if (err)
1525                         goto err_load;
1526         }
1527         if (!fw->initvals_band) {
1528                 switch (dev->phy.type) {
1529                 case B43legacy_PHYTYPE_G:
1530                         if ((rev >= 5) && (rev <= 10))
1531                                 filename = "b0g0bsinitvals5";
1532                         else if (rev >= 11)
1533                                 filename = NULL;
1534                         else if (rev == 2 || rev == 4)
1535                                 filename = NULL;
1536                         else
1537                                 goto err_no_initvals;
1538                         break;
1539                 default:
1540                         goto err_no_initvals;
1541                 }
1542                 err = do_request_fw(dev, filename, &fw->initvals_band);
1543                 if (err)
1544                         goto err_load;
1545         }
1546
1547         return 0;
1548
1549 err_load:
1550         b43legacy_print_fw_helptext(dev->wl);
1551         goto error;
1552
1553 err_no_initvals:
1554         err = -ENODEV;
1555         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1556                "core rev %u\n", dev->phy.type, rev);
1557         goto error;
1558
1559 error:
1560         b43legacy_release_firmware(dev);
1561         return err;
1562 }
1563
1564 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1565 {
1566         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1567         const __be32 *data;
1568         unsigned int i;
1569         unsigned int len;
1570         u16 fwrev;
1571         u16 fwpatch;
1572         u16 fwdate;
1573         u16 fwtime;
1574         u32 tmp;
1575         int err = 0;
1576
1577         /* Upload Microcode. */
1578         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1579         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1580         b43legacy_shm_control_word(dev,
1581                                    B43legacy_SHM_UCODE |
1582                                    B43legacy_SHM_AUTOINC_W,
1583                                    0x0000);
1584         for (i = 0; i < len; i++) {
1585                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1586                                     be32_to_cpu(data[i]));
1587                 udelay(10);
1588         }
1589
1590         if (dev->fw.pcm) {
1591                 /* Upload PCM data. */
1592                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1593                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1594                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1595                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1596                 /* No need for autoinc bit in SHM_HW */
1597                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1598                 for (i = 0; i < len; i++) {
1599                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1600                                           be32_to_cpu(data[i]));
1601                         udelay(10);
1602                 }
1603         }
1604
1605         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1606                           B43legacy_IRQ_ALL);
1607         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1608
1609         /* Wait for the microcode to load and respond */
1610         i = 0;
1611         while (1) {
1612                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1613                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1614                         break;
1615                 i++;
1616                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1617                         b43legacyerr(dev->wl, "Microcode not responding\n");
1618                         b43legacy_print_fw_helptext(dev->wl);
1619                         err = -ENODEV;
1620                         goto out;
1621                 }
1622                 udelay(10);
1623         }
1624         /* dummy read follows */
1625         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1626
1627         /* Get and check the revisions. */
1628         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1629                                      B43legacy_SHM_SH_UCODEREV);
1630         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1631                                        B43legacy_SHM_SH_UCODEPATCH);
1632         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1633                                       B43legacy_SHM_SH_UCODEDATE);
1634         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1635                                       B43legacy_SHM_SH_UCODETIME);
1636
1637         if (fwrev > 0x128) {
1638                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1639                              " Only firmware from binary drivers version 3.x"
1640                              " is supported. You must change your firmware"
1641                              " files.\n");
1642                 b43legacy_print_fw_helptext(dev->wl);
1643                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1644                 err = -EOPNOTSUPP;
1645                 goto out;
1646         }
1647         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1648                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1649                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1650                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1651
1652         dev->fw.rev = fwrev;
1653         dev->fw.patch = fwpatch;
1654
1655 out:
1656         return err;
1657 }
1658
1659 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1660                                     const struct b43legacy_iv *ivals,
1661                                     size_t count,
1662                                     size_t array_size)
1663 {
1664         const struct b43legacy_iv *iv;
1665         u16 offset;
1666         size_t i;
1667         bool bit32;
1668
1669         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1670         iv = ivals;
1671         for (i = 0; i < count; i++) {
1672                 if (array_size < sizeof(iv->offset_size))
1673                         goto err_format;
1674                 array_size -= sizeof(iv->offset_size);
1675                 offset = be16_to_cpu(iv->offset_size);
1676                 bit32 = !!(offset & B43legacy_IV_32BIT);
1677                 offset &= B43legacy_IV_OFFSET_MASK;
1678                 if (offset >= 0x1000)
1679                         goto err_format;
1680                 if (bit32) {
1681                         u32 value;
1682
1683                         if (array_size < sizeof(iv->data.d32))
1684                                 goto err_format;
1685                         array_size -= sizeof(iv->data.d32);
1686
1687                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1688                         b43legacy_write32(dev, offset, value);
1689
1690                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1691                                                         sizeof(__be16) +
1692                                                         sizeof(__be32));
1693                 } else {
1694                         u16 value;
1695
1696                         if (array_size < sizeof(iv->data.d16))
1697                                 goto err_format;
1698                         array_size -= sizeof(iv->data.d16);
1699
1700                         value = be16_to_cpu(iv->data.d16);
1701                         b43legacy_write16(dev, offset, value);
1702
1703                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1704                                                         sizeof(__be16) +
1705                                                         sizeof(__be16));
1706                 }
1707         }
1708         if (array_size)
1709                 goto err_format;
1710
1711         return 0;
1712
1713 err_format:
1714         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1715         b43legacy_print_fw_helptext(dev->wl);
1716
1717         return -EPROTO;
1718 }
1719
1720 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1721 {
1722         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1723         const struct b43legacy_fw_header *hdr;
1724         struct b43legacy_firmware *fw = &dev->fw;
1725         const struct b43legacy_iv *ivals;
1726         size_t count;
1727         int err;
1728
1729         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1730         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1731         count = be32_to_cpu(hdr->size);
1732         err = b43legacy_write_initvals(dev, ivals, count,
1733                                  fw->initvals->size - hdr_len);
1734         if (err)
1735                 goto out;
1736         if (fw->initvals_band) {
1737                 hdr = (const struct b43legacy_fw_header *)
1738                       (fw->initvals_band->data);
1739                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1740                         + hdr_len);
1741                 count = be32_to_cpu(hdr->size);
1742                 err = b43legacy_write_initvals(dev, ivals, count,
1743                                          fw->initvals_band->size - hdr_len);
1744                 if (err)
1745                         goto out;
1746         }
1747 out:
1748
1749         return err;
1750 }
1751
1752 /* Initialize the GPIOs
1753  * http://bcm-specs.sipsolutions.net/GPIO
1754  */
1755 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1756 {
1757         struct ssb_bus *bus = dev->dev->bus;
1758         struct ssb_device *gpiodev, *pcidev = NULL;
1759         u32 mask;
1760         u32 set;
1761
1762         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1763                           b43legacy_read32(dev,
1764                           B43legacy_MMIO_STATUS_BITFIELD)
1765                           & 0xFFFF3FFF);
1766
1767         b43legacy_leds_switch_all(dev, 0);
1768         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1769                           b43legacy_read16(dev,
1770                           B43legacy_MMIO_GPIO_MASK)
1771                           | 0x000F);
1772
1773         mask = 0x0000001F;
1774         set = 0x0000000F;
1775         if (dev->dev->bus->chip_id == 0x4301) {
1776                 mask |= 0x0060;
1777                 set |= 0x0060;
1778         }
1779         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1780                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1781                                   b43legacy_read16(dev,
1782                                   B43legacy_MMIO_GPIO_MASK)
1783                                   | 0x0200);
1784                 mask |= 0x0200;
1785                 set |= 0x0200;
1786         }
1787         if (dev->dev->id.revision >= 2)
1788                 mask  |= 0x0010; /* FIXME: This is redundant. */
1789
1790 #ifdef CONFIG_SSB_DRIVER_PCICORE
1791         pcidev = bus->pcicore.dev;
1792 #endif
1793         gpiodev = bus->chipco.dev ? : pcidev;
1794         if (!gpiodev)
1795                 return 0;
1796         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1797                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1798                      & mask) | set);
1799
1800         return 0;
1801 }
1802
1803 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1804 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1805 {
1806         struct ssb_bus *bus = dev->dev->bus;
1807         struct ssb_device *gpiodev, *pcidev = NULL;
1808
1809 #ifdef CONFIG_SSB_DRIVER_PCICORE
1810         pcidev = bus->pcicore.dev;
1811 #endif
1812         gpiodev = bus->chipco.dev ? : pcidev;
1813         if (!gpiodev)
1814                 return;
1815         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1816 }
1817
1818 /* http://bcm-specs.sipsolutions.net/EnableMac */
1819 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1820 {
1821         dev->mac_suspended--;
1822         B43legacy_WARN_ON(dev->mac_suspended < 0);
1823         if (dev->mac_suspended == 0) {
1824                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1825                                   b43legacy_read32(dev,
1826                                   B43legacy_MMIO_STATUS_BITFIELD)
1827                                   | B43legacy_SBF_MAC_ENABLED);
1828                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1829                                   B43legacy_IRQ_MAC_SUSPENDED);
1830                 /* the next two are dummy reads */
1831                 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1832                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1833                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1834         }
1835 }
1836
1837 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1838 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1839 {
1840         int i;
1841         u32 tmp;
1842
1843         B43legacy_WARN_ON(dev->mac_suspended < 0);
1844         if (dev->mac_suspended == 0) {
1845                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1846                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1847                                   b43legacy_read32(dev,
1848                                   B43legacy_MMIO_STATUS_BITFIELD)
1849                                   & ~B43legacy_SBF_MAC_ENABLED);
1850                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1851                 for (i = 10000; i; i--) {
1852                         tmp = b43legacy_read32(dev,
1853                                                B43legacy_MMIO_GEN_IRQ_REASON);
1854                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1855                                 goto out;
1856                         udelay(1);
1857                 }
1858                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1859         }
1860 out:
1861         dev->mac_suspended++;
1862 }
1863
1864 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1865 {
1866         struct b43legacy_wl *wl = dev->wl;
1867         u32 ctl;
1868         u16 cfp_pretbtt;
1869
1870         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1871         /* Reset status to STA infrastructure mode. */
1872         ctl &= ~B43legacy_MACCTL_AP;
1873         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1874         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1875         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1876         ctl &= ~B43legacy_MACCTL_PROMISC;
1877         ctl |= B43legacy_MACCTL_INFRA;
1878
1879         if (wl->operating) {
1880                 switch (wl->if_type) {
1881                 case IEEE80211_IF_TYPE_AP:
1882                         ctl |= B43legacy_MACCTL_AP;
1883                         break;
1884                 case IEEE80211_IF_TYPE_IBSS:
1885                         ctl &= ~B43legacy_MACCTL_INFRA;
1886                         break;
1887                 case IEEE80211_IF_TYPE_STA:
1888                 case IEEE80211_IF_TYPE_MNTR:
1889                 case IEEE80211_IF_TYPE_WDS:
1890                         break;
1891                 default:
1892                         b43legacyerr(wl, "Improper value of %d for"
1893                                      " wl->if_type\n", wl->if_type);
1894                 }
1895         }
1896         if (wl->monitor) {
1897                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1898                 if (modparam_mon_keep_bad)
1899                         ctl |= B43legacy_MACCTL_KEEP_BAD;
1900                 if (modparam_mon_keep_badplcp)
1901                         ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1902         }
1903         if (wl->promisc)
1904                 ctl |= B43legacy_MACCTL_PROMISC;
1905         /* Workaround: On old hardware the HW-MAC-address-filter
1906          * doesn't work properly, so always run promisc in filter
1907          * it in software. */
1908         if (dev->dev->id.revision <= 4)
1909                 ctl |= B43legacy_MACCTL_PROMISC;
1910
1911         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1912
1913         cfp_pretbtt = 2;
1914         if ((ctl & B43legacy_MACCTL_INFRA) &&
1915             !(ctl & B43legacy_MACCTL_AP)) {
1916                 if (dev->dev->bus->chip_id == 0x4306 &&
1917                     dev->dev->bus->chip_rev == 3)
1918                         cfp_pretbtt = 100;
1919                 else
1920                         cfp_pretbtt = 50;
1921         }
1922         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1923 }
1924
1925 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1926                                         u16 rate,
1927                                         int is_ofdm)
1928 {
1929         u16 offset;
1930
1931         if (is_ofdm) {
1932                 offset = 0x480;
1933                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1934         } else {
1935                 offset = 0x4C0;
1936                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1937         }
1938         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1939                               b43legacy_shm_read16(dev,
1940                               B43legacy_SHM_SHARED, offset));
1941 }
1942
1943 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1944 {
1945         switch (dev->phy.type) {
1946         case B43legacy_PHYTYPE_G:
1947                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1948                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1949                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1950                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1951                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1952                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1953                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1954                 /* fallthrough */
1955         case B43legacy_PHYTYPE_B:
1956                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1957                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1958                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1959                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1960                 break;
1961         default:
1962                 B43legacy_BUG_ON(1);
1963         }
1964 }
1965
1966 /* Set the TX-Antenna for management frames sent by firmware. */
1967 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1968                                           int antenna)
1969 {
1970         u16 ant = 0;
1971         u16 tmp;
1972
1973         switch (antenna) {
1974         case B43legacy_ANTENNA0:
1975                 ant |= B43legacy_TX4_PHY_ANT0;
1976                 break;
1977         case B43legacy_ANTENNA1:
1978                 ant |= B43legacy_TX4_PHY_ANT1;
1979                 break;
1980         case B43legacy_ANTENNA_AUTO:
1981                 ant |= B43legacy_TX4_PHY_ANTLAST;
1982                 break;
1983         default:
1984                 B43legacy_BUG_ON(1);
1985         }
1986
1987         /* FIXME We also need to set the other flags of the PHY control
1988          * field somewhere. */
1989
1990         /* For Beacons */
1991         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1992                                    B43legacy_SHM_SH_BEACPHYCTL);
1993         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1994         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1995                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
1996         /* For ACK/CTS */
1997         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1998                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
1999         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2000         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2001                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2002         /* For Probe Resposes */
2003         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2004                                    B43legacy_SHM_SH_PRPHYCTL);
2005         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2006         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2007                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2008 }
2009
2010 /* This is the opposite of b43legacy_chip_init() */
2011 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2012 {
2013         b43legacy_radio_turn_off(dev);
2014         if (!modparam_noleds)
2015                 b43legacy_leds_exit(dev);
2016         b43legacy_gpio_cleanup(dev);
2017         /* firmware is released later */
2018 }
2019
2020 /* Initialize the chip
2021  * http://bcm-specs.sipsolutions.net/ChipInit
2022  */
2023 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2024 {
2025         struct b43legacy_phy *phy = &dev->phy;
2026         int err;
2027         int tmp;
2028         u32 value32;
2029         u16 value16;
2030
2031         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
2032                           B43legacy_SBF_CORE_READY
2033                           | B43legacy_SBF_400);
2034
2035         err = b43legacy_request_firmware(dev);
2036         if (err)
2037                 goto out;
2038         err = b43legacy_upload_microcode(dev);
2039         if (err)
2040                 goto out; /* firmware is released later */
2041
2042         err = b43legacy_gpio_init(dev);
2043         if (err)
2044                 goto out; /* firmware is released later */
2045         err = b43legacy_upload_initvals(dev);
2046         if (err)
2047                 goto err_gpio_cleanup;
2048         b43legacy_radio_turn_on(dev);
2049         dev->radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2050         b43legacyinfo(dev->wl, "Radio %s by hardware\n",
2051                (dev->radio_hw_enable == 0) ? "disabled" : "enabled");
2052
2053         b43legacy_write16(dev, 0x03E6, 0x0000);
2054         err = b43legacy_phy_init(dev);
2055         if (err)
2056                 goto err_radio_off;
2057
2058         /* Select initial Interference Mitigation. */
2059         tmp = phy->interfmode;
2060         phy->interfmode = B43legacy_INTERFMODE_NONE;
2061         b43legacy_radio_set_interference_mitigation(dev, tmp);
2062
2063         b43legacy_phy_set_antenna_diversity(dev);
2064         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2065
2066         if (phy->type == B43legacy_PHYTYPE_B) {
2067                 value16 = b43legacy_read16(dev, 0x005E);
2068                 value16 |= 0x0004;
2069                 b43legacy_write16(dev, 0x005E, value16);
2070         }
2071         b43legacy_write32(dev, 0x0100, 0x01000000);
2072         if (dev->dev->id.revision < 5)
2073                 b43legacy_write32(dev, 0x010C, 0x01000000);
2074
2075         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2076         value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2077         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2078         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2079         value32 |= B43legacy_SBF_MODE_NOTADHOC;
2080         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2081
2082         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2083         value32 |= 0x100000;
2084         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2085
2086         if (b43legacy_using_pio(dev)) {
2087                 b43legacy_write32(dev, 0x0210, 0x00000100);
2088                 b43legacy_write32(dev, 0x0230, 0x00000100);
2089                 b43legacy_write32(dev, 0x0250, 0x00000100);
2090                 b43legacy_write32(dev, 0x0270, 0x00000100);
2091                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2092                                       0x0000);
2093         }
2094
2095         /* Probe Response Timeout value */
2096         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2097         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2098
2099         /* Initially set the wireless operation mode. */
2100         b43legacy_adjust_opmode(dev);
2101
2102         if (dev->dev->id.revision < 3) {
2103                 b43legacy_write16(dev, 0x060E, 0x0000);
2104                 b43legacy_write16(dev, 0x0610, 0x8000);
2105                 b43legacy_write16(dev, 0x0604, 0x0000);
2106                 b43legacy_write16(dev, 0x0606, 0x0200);
2107         } else {
2108                 b43legacy_write32(dev, 0x0188, 0x80000000);
2109                 b43legacy_write32(dev, 0x018C, 0x02000000);
2110         }
2111         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2112         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2113         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2114         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2115         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2116         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2117         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2118
2119         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2120         value32 |= 0x00100000;
2121         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2122
2123         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2124                           dev->dev->bus->chipco.fast_pwrup_delay);
2125
2126         B43legacy_WARN_ON(err != 0);
2127         b43legacydbg(dev->wl, "Chip initialized\n");
2128 out:
2129         return err;
2130
2131 err_radio_off:
2132         b43legacy_radio_turn_off(dev);
2133 err_gpio_cleanup:
2134         b43legacy_gpio_cleanup(dev);
2135         goto out;
2136 }
2137
2138 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2139 {
2140         struct b43legacy_phy *phy = &dev->phy;
2141
2142         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2143                 return;
2144
2145         b43legacy_mac_suspend(dev);
2146         b43legacy_phy_lo_g_measure(dev);
2147         b43legacy_mac_enable(dev);
2148 }
2149
2150 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2151 {
2152         b43legacy_phy_lo_mark_all_unused(dev);
2153         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2154                 b43legacy_mac_suspend(dev);
2155                 b43legacy_calc_nrssi_slope(dev);
2156                 b43legacy_mac_enable(dev);
2157         }
2158 }
2159
2160 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2161 {
2162         /* Update device statistics. */
2163         b43legacy_calculate_link_quality(dev);
2164 }
2165
2166 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2167 {
2168         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2169 }
2170
2171 static void b43legacy_periodic_every1sec(struct b43legacy_wldev *dev)
2172 {
2173         int radio_hw_enable;
2174
2175         /* check if radio hardware enabled status changed */
2176         radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
2177         if (unlikely(dev->radio_hw_enable != radio_hw_enable)) {
2178                 dev->radio_hw_enable = radio_hw_enable;
2179                 b43legacyinfo(dev->wl, "Radio hardware status changed to %s\n",
2180                        (radio_hw_enable == 0) ? "disabled" : "enabled");
2181                 b43legacy_leds_update(dev, 0);
2182         }
2183 }
2184
2185 static void do_periodic_work(struct b43legacy_wldev *dev)
2186 {
2187         unsigned int state;
2188
2189         state = dev->periodic_state;
2190         if (state % 120 == 0)
2191                 b43legacy_periodic_every120sec(dev);
2192         if (state % 60 == 0)
2193                 b43legacy_periodic_every60sec(dev);
2194         if (state % 30 == 0)
2195                 b43legacy_periodic_every30sec(dev);
2196         if (state % 15 == 0)
2197                 b43legacy_periodic_every15sec(dev);
2198         b43legacy_periodic_every1sec(dev);
2199 }
2200
2201 /* Estimate a "Badness" value based on the periodic work
2202  * state-machine state. "Badness" is worse (bigger), if the
2203  * periodic work will take longer.
2204  */
2205 static int estimate_periodic_work_badness(unsigned int state)
2206 {
2207         int badness = 0;
2208
2209         if (state % 120 == 0) /* every 120 sec */
2210                 badness += 10;
2211         if (state % 60 == 0) /* every 60 sec */
2212                 badness += 5;
2213         if (state % 30 == 0) /* every 30 sec */
2214                 badness += 1;
2215         if (state % 15 == 0) /* every 15 sec */
2216                 badness += 1;
2217
2218 #define BADNESS_LIMIT   4
2219         return badness;
2220 }
2221
2222 static void b43legacy_periodic_work_handler(struct work_struct *work)
2223 {
2224         struct b43legacy_wldev *dev =
2225                              container_of(work, struct b43legacy_wldev,
2226                              periodic_work.work);
2227         unsigned long flags;
2228         unsigned long delay;
2229         u32 savedirqs = 0;
2230         int badness;
2231
2232         mutex_lock(&dev->wl->mutex);
2233
2234         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2235                 goto out;
2236         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2237                 goto out_requeue;
2238
2239         badness = estimate_periodic_work_badness(dev->periodic_state);
2240         if (badness > BADNESS_LIMIT) {
2241                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2242                 /* Suspend TX as we don't want to transmit packets while
2243                  * we recalibrate the hardware. */
2244                 b43legacy_tx_suspend(dev);
2245                 savedirqs = b43legacy_interrupt_disable(dev,
2246                                                           B43legacy_IRQ_ALL);
2247                 /* Periodic work will take a long time, so we want it to
2248                  * be preemtible and release the spinlock. */
2249                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2250                 b43legacy_synchronize_irq(dev);
2251
2252                 do_periodic_work(dev);
2253
2254                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2255                 b43legacy_interrupt_enable(dev, savedirqs);
2256                 b43legacy_tx_resume(dev);
2257                 mmiowb();
2258                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2259         } else {
2260                 /* Take the global driver lock. This will lock any operation. */
2261                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2262
2263                 do_periodic_work(dev);
2264
2265                 mmiowb();
2266                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2267         }
2268         dev->periodic_state++;
2269 out_requeue:
2270         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2271                 delay = msecs_to_jiffies(50);
2272         else
2273                 delay = round_jiffies(HZ);
2274         queue_delayed_work(dev->wl->hw->workqueue,
2275                            &dev->periodic_work, delay);
2276 out:
2277         mutex_unlock(&dev->wl->mutex);
2278 }
2279
2280 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2281 {
2282         struct delayed_work *work = &dev->periodic_work;
2283
2284         dev->periodic_state = 0;
2285         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2286         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2287 }
2288
2289 /* Validate access to the chip (SHM) */
2290 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2291 {
2292         u32 value;
2293         u32 shm_backup;
2294
2295         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2296         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2297         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2298                                  0xAA5555AA)
2299                 goto error;
2300         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2301         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2302                                  0x55AAAA55)
2303                 goto error;
2304         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2305
2306         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2307         if ((value | B43legacy_MACCTL_GMODE) !=
2308             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2309                 goto error;
2310
2311         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2312         if (value)
2313                 goto error;
2314
2315         return 0;
2316 error:
2317         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2318         return -ENODEV;
2319 }
2320
2321 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2322 {
2323         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2324         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2325         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2326                                         0x0056);
2327         /* KTP is a word address, but we address SHM bytewise.
2328          * So multiply by two.
2329          */
2330         dev->ktp *= 2;
2331         if (dev->dev->id.revision >= 5)
2332                 /* Number of RCMTA address slots */
2333                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2334                                   dev->max_nr_keys - 8);
2335 }
2336
2337 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2338 {
2339         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2340         unsigned long flags;
2341
2342         /* Don't take wl->mutex here, as it could deadlock with
2343          * hwrng internal locking. It's not needed to take
2344          * wl->mutex here, anyway. */
2345
2346         spin_lock_irqsave(&wl->irq_lock, flags);
2347         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2348         spin_unlock_irqrestore(&wl->irq_lock, flags);
2349
2350         return (sizeof(u16));
2351 }
2352
2353 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2354 {
2355         if (wl->rng_initialized)
2356                 hwrng_unregister(&wl->rng);
2357 }
2358
2359 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2360 {
2361         int err;
2362
2363         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2364                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2365         wl->rng.name = wl->rng_name;
2366         wl->rng.data_read = b43legacy_rng_read;
2367         wl->rng.priv = (unsigned long)wl;
2368         wl->rng_initialized = 1;
2369         err = hwrng_register(&wl->rng);
2370         if (err) {
2371                 wl->rng_initialized = 0;
2372                 b43legacyerr(wl, "Failed to register the random "
2373                        "number generator (%d)\n", err);
2374         }
2375
2376         return err;
2377 }
2378
2379 static int b43legacy_tx(struct ieee80211_hw *hw,
2380                         struct sk_buff *skb,
2381                         struct ieee80211_tx_control *ctl)
2382 {
2383         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2384         struct b43legacy_wldev *dev = wl->current_dev;
2385         int err = -ENODEV;
2386         unsigned long flags;
2387
2388         if (unlikely(!dev))
2389                 goto out;
2390         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2391                 goto out;
2392         /* DMA-TX is done without a global lock. */
2393         if (b43legacy_using_pio(dev)) {
2394                 spin_lock_irqsave(&wl->irq_lock, flags);
2395                 err = b43legacy_pio_tx(dev, skb, ctl);
2396                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2397         } else
2398                 err = b43legacy_dma_tx(dev, skb, ctl);
2399 out:
2400         if (unlikely(err))
2401                 return NETDEV_TX_BUSY;
2402         return NETDEV_TX_OK;
2403 }
2404
2405 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2406                              int queue,
2407                              const struct ieee80211_tx_queue_params *params)
2408 {
2409         return 0;
2410 }
2411
2412 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2413                                   struct ieee80211_tx_queue_stats *stats)
2414 {
2415         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2416         struct b43legacy_wldev *dev = wl->current_dev;
2417         unsigned long flags;
2418         int err = -ENODEV;
2419
2420         if (!dev)
2421                 goto out;
2422         spin_lock_irqsave(&wl->irq_lock, flags);
2423         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2424                 if (b43legacy_using_pio(dev))
2425                         b43legacy_pio_get_tx_stats(dev, stats);
2426                 else
2427                         b43legacy_dma_get_tx_stats(dev, stats);
2428                 err = 0;
2429         }
2430         spin_unlock_irqrestore(&wl->irq_lock, flags);
2431 out:
2432         return err;
2433 }
2434
2435 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2436                                struct ieee80211_low_level_stats *stats)
2437 {
2438         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2439         unsigned long flags;
2440
2441         spin_lock_irqsave(&wl->irq_lock, flags);
2442         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2443         spin_unlock_irqrestore(&wl->irq_lock, flags);
2444
2445         return 0;
2446 }
2447
2448 static const char *phymode_to_string(unsigned int phymode)
2449 {
2450         switch (phymode) {
2451         case B43legacy_PHYMODE_B:
2452                 return "B";
2453         case B43legacy_PHYMODE_G:
2454                 return "G";
2455         default:
2456                 B43legacy_BUG_ON(1);
2457         }
2458         return "";
2459 }
2460
2461 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2462                                   unsigned int phymode,
2463                                   struct b43legacy_wldev **dev,
2464                                   bool *gmode)
2465 {
2466         struct b43legacy_wldev *d;
2467
2468         list_for_each_entry(d, &wl->devlist, list) {
2469                 if (d->phy.possible_phymodes & phymode) {
2470                         /* Ok, this device supports the PHY-mode.
2471                          * Set the gmode bit. */
2472                         *gmode = 1;
2473                         *dev = d;
2474
2475                         return 0;
2476                 }
2477         }
2478
2479         return -ESRCH;
2480 }
2481
2482 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2483 {
2484         struct ssb_device *sdev = dev->dev;
2485         u32 tmslow;
2486
2487         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2488         tmslow &= ~B43legacy_TMSLOW_GMODE;
2489         tmslow |= B43legacy_TMSLOW_PHYRESET;
2490         tmslow |= SSB_TMSLOW_FGC;
2491         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2492         msleep(1);
2493
2494         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2495         tmslow &= ~SSB_TMSLOW_FGC;
2496         tmslow |= B43legacy_TMSLOW_PHYRESET;
2497         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2498         msleep(1);
2499 }
2500
2501 /* Expects wl->mutex locked */
2502 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2503                                       unsigned int new_mode)
2504 {
2505         struct b43legacy_wldev *up_dev;
2506         struct b43legacy_wldev *down_dev;
2507         int err;
2508         bool gmode = 0;
2509         int prev_status;
2510
2511         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2512         if (err) {
2513                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2514                        phymode_to_string(new_mode));
2515                 return err;
2516         }
2517         if ((up_dev == wl->current_dev) &&
2518             (!!wl->current_dev->phy.gmode == !!gmode))
2519                 /* This device is already running. */
2520                 return 0;
2521         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2522                phymode_to_string(new_mode));
2523         down_dev = wl->current_dev;
2524
2525         prev_status = b43legacy_status(down_dev);
2526         /* Shutdown the currently running core. */
2527         if (prev_status >= B43legacy_STAT_STARTED)
2528                 b43legacy_wireless_core_stop(down_dev);
2529         if (prev_status >= B43legacy_STAT_INITIALIZED)
2530                 b43legacy_wireless_core_exit(down_dev);
2531
2532         if (down_dev != up_dev)
2533                 /* We switch to a different core, so we put PHY into
2534                  * RESET on the old core. */
2535                 b43legacy_put_phy_into_reset(down_dev);
2536
2537         /* Now start the new core. */
2538         up_dev->phy.gmode = gmode;
2539         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2540                 err = b43legacy_wireless_core_init(up_dev);
2541                 if (err) {
2542                         b43legacyerr(wl, "Fatal: Could not initialize device"
2543                                      " for newly selected %s-PHY mode\n",
2544                                      phymode_to_string(new_mode));
2545                         goto init_failure;
2546                 }
2547         }
2548         if (prev_status >= B43legacy_STAT_STARTED) {
2549                 err = b43legacy_wireless_core_start(up_dev);
2550                 if (err) {
2551                         b43legacyerr(wl, "Fatal: Coult not start device for "
2552                                "newly selected %s-PHY mode\n",
2553                                phymode_to_string(new_mode));
2554                         b43legacy_wireless_core_exit(up_dev);
2555                         goto init_failure;
2556                 }
2557         }
2558         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2559
2560         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2561
2562         wl->current_dev = up_dev;
2563
2564         return 0;
2565 init_failure:
2566         /* Whoops, failed to init the new core. No core is operating now. */
2567         wl->current_dev = NULL;
2568         return err;
2569 }
2570
2571 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2572 {
2573         switch (antenna) {
2574         case 0: /* default/diversity */
2575                 return B43legacy_ANTENNA_DEFAULT;
2576         case 1: /* Antenna 0 */
2577                 return B43legacy_ANTENNA0;
2578         case 2: /* Antenna 1 */
2579                 return B43legacy_ANTENNA1;
2580         default:
2581                 return B43legacy_ANTENNA_DEFAULT;
2582         }
2583 }
2584
2585 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2586                                 struct ieee80211_conf *conf)
2587 {
2588         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2589         struct b43legacy_wldev *dev;
2590         struct b43legacy_phy *phy;
2591         unsigned long flags;
2592         unsigned int new_phymode = 0xFFFF;
2593         int antenna_tx;
2594         int antenna_rx;
2595         int err = 0;
2596         u32 savedirqs;
2597
2598         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2599         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2600
2601         mutex_lock(&wl->mutex);
2602
2603         /* Switch the PHY mode (if necessary). */
2604         switch (conf->phymode) {
2605         case MODE_IEEE80211B:
2606                 new_phymode = B43legacy_PHYMODE_B;
2607                 break;
2608         case MODE_IEEE80211G:
2609                 new_phymode = B43legacy_PHYMODE_G;
2610                 break;
2611         default:
2612                 B43legacy_WARN_ON(1);
2613         }
2614         err = b43legacy_switch_phymode(wl, new_phymode);
2615         if (err)
2616                 goto out_unlock_mutex;
2617         dev = wl->current_dev;
2618         phy = &dev->phy;
2619
2620         /* Disable IRQs while reconfiguring the device.
2621          * This makes it possible to drop the spinlock throughout
2622          * the reconfiguration process. */
2623         spin_lock_irqsave(&wl->irq_lock, flags);
2624         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2625                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2626                 goto out_unlock_mutex;
2627         }
2628         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2629         spin_unlock_irqrestore(&wl->irq_lock, flags);
2630         b43legacy_synchronize_irq(dev);
2631
2632         /* Switch to the requested channel.
2633          * The firmware takes care of races with the TX handler. */
2634         if (conf->channel_val != phy->channel)
2635                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2636
2637         /* Enable/Disable ShortSlot timing. */
2638         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2639              != dev->short_slot) {
2640                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2641                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2642                         b43legacy_short_slot_timing_enable(dev);
2643                 else
2644                         b43legacy_short_slot_timing_disable(dev);
2645         }
2646
2647         /* Adjust the desired TX power level. */
2648         if (conf->power_level != 0) {
2649                 if (conf->power_level != phy->power_level) {
2650                         phy->power_level = conf->power_level;
2651                         b43legacy_phy_xmitpower(dev);
2652                 }
2653         }
2654
2655         /* Antennas for RX and management frame TX. */
2656         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2657
2658         /* Update templates for AP mode. */
2659         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2660                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2661
2662
2663         spin_lock_irqsave(&wl->irq_lock, flags);
2664         b43legacy_interrupt_enable(dev, savedirqs);
2665         mmiowb();
2666         spin_unlock_irqrestore(&wl->irq_lock, flags);
2667 out_unlock_mutex:
2668         mutex_unlock(&wl->mutex);
2669
2670         return err;
2671 }
2672
2673 static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
2674                                  set_key_cmd cmd,
2675                                  const u8 *local_addr, const u8 *addr,
2676                                  struct ieee80211_key_conf *key)
2677 {
2678         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2679         struct b43legacy_wldev *dev = wl->current_dev;
2680         unsigned long flags;
2681         int err = -EOPNOTSUPP;
2682
2683         if (!dev)
2684                 return -ENODEV;
2685         mutex_lock(&wl->mutex);
2686         spin_lock_irqsave(&wl->irq_lock, flags);
2687
2688         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
2689                 err = -ENODEV;
2690         }
2691         spin_unlock_irqrestore(&wl->irq_lock, flags);
2692         mutex_unlock(&wl->mutex);
2693         b43legacydbg(wl, "Using software based encryption for "
2694                "mac: " MAC_FMT "\n", MAC_ARG(addr));
2695         return err;
2696 }
2697
2698 static void b43legacy_set_multicast_list(struct ieee80211_hw *hw,
2699                                          unsigned short netflags,
2700                                          int mc_count)
2701 {
2702         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2703         struct b43legacy_wldev *dev = wl->current_dev;
2704         unsigned long flags;
2705
2706         if (!dev)
2707                 return;
2708         spin_lock_irqsave(&wl->irq_lock, flags);
2709         if (wl->promisc != !!(netflags & IFF_PROMISC)) {
2710                 wl->promisc = !!(netflags & IFF_PROMISC);
2711                 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2712                         b43legacy_adjust_opmode(dev);
2713         }
2714         spin_unlock_irqrestore(&wl->irq_lock, flags);
2715 }
2716
2717 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2718                                       int if_id,
2719                                       struct ieee80211_if_conf *conf)
2720 {
2721         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2722         struct b43legacy_wldev *dev = wl->current_dev;
2723         unsigned long flags;
2724
2725         if (!dev)
2726                 return -ENODEV;
2727         mutex_lock(&wl->mutex);
2728         spin_lock_irqsave(&wl->irq_lock, flags);
2729         if (conf->type != IEEE80211_IF_TYPE_MNTR) {
2730                 B43legacy_WARN_ON(wl->if_id != if_id);
2731                 wl->bssid = conf->bssid;
2732                 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2733                         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2734                                 B43legacy_WARN_ON(conf->type !=
2735                                                   IEEE80211_IF_TYPE_AP);
2736                                 b43legacy_set_ssid(dev, conf->ssid,
2737                                                    conf->ssid_len);
2738                                 if (conf->beacon)
2739                                         b43legacy_refresh_templates(dev,
2740                                                                  conf->beacon);
2741                         }
2742                         b43legacy_write_mac_bssid_templates(dev);
2743                 }
2744         }
2745         spin_unlock_irqrestore(&wl->irq_lock, flags);
2746         mutex_unlock(&wl->mutex);
2747
2748         return 0;
2749 }
2750
2751 /* Locking: wl->mutex */
2752 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2753 {
2754         struct b43legacy_wl *wl = dev->wl;
2755         unsigned long flags;
2756
2757         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2758                 return;
2759         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2760
2761         mutex_unlock(&wl->mutex);
2762         /* Must unlock as it would otherwise deadlock. No races here.
2763          * Cancel the possibly running self-rearming periodic work. */
2764         cancel_delayed_work_sync(&dev->periodic_work);
2765         mutex_lock(&wl->mutex);
2766
2767         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2768
2769         /* Disable and sync interrupts. */
2770         spin_lock_irqsave(&wl->irq_lock, flags);
2771         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2772                                                           B43legacy_IRQ_ALL);
2773         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2774         spin_unlock_irqrestore(&wl->irq_lock, flags);
2775         b43legacy_synchronize_irq(dev);
2776
2777         b43legacy_mac_suspend(dev);
2778         free_irq(dev->dev->irq, dev);
2779         b43legacydbg(wl, "Wireless interface stopped\n");
2780 }
2781
2782 /* Locking: wl->mutex */
2783 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2784 {
2785         int err;
2786
2787         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2788
2789         drain_txstatus_queue(dev);
2790         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2791                           IRQF_SHARED, KBUILD_MODNAME, dev);
2792         if (err) {
2793                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2794                        dev->dev->irq);
2795                 goto out;
2796         }
2797         /* We are ready to run. */
2798         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2799
2800         /* Start data flow (TX/RX) */
2801         b43legacy_mac_enable(dev);
2802         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2803         ieee80211_start_queues(dev->wl->hw);
2804
2805         /* Start maintenance work */
2806         b43legacy_periodic_tasks_setup(dev);
2807
2808         b43legacydbg(dev->wl, "Wireless interface started\n");
2809 out:
2810         return err;
2811 }
2812
2813 /* Get PHY and RADIO versioning numbers */
2814 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2815 {
2816         struct b43legacy_phy *phy = &dev->phy;
2817         u32 tmp;
2818         u8 analog_type;
2819         u8 phy_type;
2820         u8 phy_rev;
2821         u16 radio_manuf;
2822         u16 radio_ver;
2823         u16 radio_rev;
2824         int unsupported = 0;
2825
2826         /* Get PHY versioning */
2827         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2828         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2829                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2830         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2831         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2832         switch (phy_type) {
2833         case B43legacy_PHYTYPE_B:
2834                 if (phy_rev != 2 && phy_rev != 4
2835                     && phy_rev != 6 && phy_rev != 7)
2836                         unsupported = 1;
2837                 break;
2838         case B43legacy_PHYTYPE_G:
2839                 if (phy_rev > 8)
2840                         unsupported = 1;
2841                 break;
2842         default:
2843                 unsupported = 1;
2844         };
2845         if (unsupported) {
2846                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2847                        "(Analog %u, Type %u, Revision %u)\n",
2848                        analog_type, phy_type, phy_rev);
2849                 return -EOPNOTSUPP;
2850         }
2851         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2852                analog_type, phy_type, phy_rev);
2853
2854
2855         /* Get RADIO versioning */
2856         if (dev->dev->bus->chip_id == 0x4317) {
2857                 if (dev->dev->bus->chip_rev == 0)
2858                         tmp = 0x3205017F;
2859                 else if (dev->dev->bus->chip_rev == 1)
2860                         tmp = 0x4205017F;
2861                 else
2862                         tmp = 0x5205017F;
2863         } else {
2864                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2865                                   B43legacy_RADIOCTL_ID);
2866                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2867                 tmp <<= 16;
2868                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2869                                   B43legacy_RADIOCTL_ID);
2870                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2871         }
2872         radio_manuf = (tmp & 0x00000FFF);
2873         radio_ver = (tmp & 0x0FFFF000) >> 12;
2874         radio_rev = (tmp & 0xF0000000) >> 28;
2875         switch (phy_type) {
2876         case B43legacy_PHYTYPE_B:
2877                 if ((radio_ver & 0xFFF0) != 0x2050)
2878                         unsupported = 1;
2879                 break;
2880         case B43legacy_PHYTYPE_G:
2881                 if (radio_ver != 0x2050)
2882                         unsupported = 1;
2883                 break;
2884         default:
2885                 B43legacy_BUG_ON(1);
2886         }
2887         if (unsupported) {
2888                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2889                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2890                        radio_manuf, radio_ver, radio_rev);
2891                 return -EOPNOTSUPP;
2892         }
2893         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2894                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2895
2896
2897         phy->radio_manuf = radio_manuf;
2898         phy->radio_ver = radio_ver;
2899         phy->radio_rev = radio_rev;
2900
2901         phy->analog = analog_type;
2902         phy->type = phy_type;
2903         phy->rev = phy_rev;
2904
2905         return 0;
2906 }
2907
2908 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2909                                       struct b43legacy_phy *phy)
2910 {
2911         struct b43legacy_lopair *lo;
2912         int i;
2913
2914         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2915         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2916
2917         /* Flags */
2918         phy->locked = 0;
2919
2920         phy->savedpctlreg = 0xFFFF;
2921         phy->aci_enable = 0;
2922         phy->aci_wlan_automatic = 0;
2923         phy->aci_hw_rssi = 0;
2924
2925         lo = phy->_lo_pairs;
2926         if (lo)
2927                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2928                                      B43legacy_LO_COUNT);
2929         phy->max_lb_gain = 0;
2930         phy->trsw_rx_gain = 0;
2931
2932         /* Set default attenuation values. */
2933         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2934         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2935         phy->txctl1 = b43legacy_default_txctl1(dev);
2936         phy->txpwr_offset = 0;
2937
2938         /* NRSSI */
2939         phy->nrssislope = 0;
2940         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2941                 phy->nrssi[i] = -1000;
2942         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2943                 phy->nrssi_lt[i] = i;
2944
2945         phy->lofcal = 0xFFFF;
2946         phy->initval = 0xFFFF;
2947
2948         spin_lock_init(&phy->lock);
2949         phy->interfmode = B43legacy_INTERFMODE_NONE;
2950         phy->channel = 0xFF;
2951 }
2952
2953 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2954 {
2955         /* Flags */
2956         dev->reg124_set_0x4 = 0;
2957
2958         /* Stats */
2959         memset(&dev->stats, 0, sizeof(dev->stats));
2960
2961         setup_struct_phy_for_init(dev, &dev->phy);
2962
2963         /* IRQ related flags */
2964         dev->irq_reason = 0;
2965         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2966         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2967
2968         dev->mac_suspended = 1;
2969
2970         /* Noise calculation context */
2971         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2972 }
2973
2974 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2975 {
2976 #ifdef CONFIG_SSB_DRIVER_PCICORE
2977         struct ssb_bus *bus = dev->dev->bus;
2978         u32 tmp;
2979
2980         if (bus->pcicore.dev &&
2981             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2982             bus->pcicore.dev->id.revision <= 5) {
2983                 /* IMCFGLO timeouts workaround. */
2984                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2985                 tmp &= ~SSB_IMCFGLO_REQTO;
2986                 tmp &= ~SSB_IMCFGLO_SERTO;
2987                 switch (bus->bustype) {
2988                 case SSB_BUSTYPE_PCI:
2989                 case SSB_BUSTYPE_PCMCIA:
2990                         tmp |= 0x32;
2991                         break;
2992                 case SSB_BUSTYPE_SSB:
2993                         tmp |= 0x53;
2994                         break;
2995                 }
2996                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2997         }
2998 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2999 }
3000
3001 /* Shutdown a wireless core */
3002 /* Locking: wl->mutex */
3003 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3004 {
3005         struct b43legacy_wl *wl = dev->wl;
3006         struct b43legacy_phy *phy = &dev->phy;
3007
3008         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3009         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3010                 return;
3011         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3012
3013         mutex_unlock(&wl->mutex);
3014         /* Must unlock as it would otherwise deadlock. No races here.
3015          * Cancel possibly pending workqueues. */
3016         cancel_work_sync(&dev->restart_work);
3017         mutex_lock(&wl->mutex);
3018
3019         b43legacy_rng_exit(dev->wl);
3020         b43legacy_pio_free(dev);
3021         b43legacy_dma_free(dev);
3022         b43legacy_chip_exit(dev);
3023         b43legacy_radio_turn_off(dev);
3024         b43legacy_switch_analog(dev, 0);
3025         if (phy->dyn_tssi_tbl)
3026                 kfree(phy->tssi2dbm);
3027         kfree(phy->lo_control);
3028         phy->lo_control = NULL;
3029         ssb_device_disable(dev->dev, 0);
3030         ssb_bus_may_powerdown(dev->dev->bus);
3031 }
3032
3033 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3034 {
3035         struct b43legacy_phy *phy = &dev->phy;
3036         int i;
3037
3038         /* Set default attenuation values. */
3039         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3040         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3041         phy->txctl1 = b43legacy_default_txctl1(dev);
3042         phy->txctl2 = 0xFFFF;
3043         phy->txpwr_offset = 0;
3044
3045         /* NRSSI */
3046         phy->nrssislope = 0;
3047         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3048                 phy->nrssi[i] = -1000;
3049         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3050                 phy->nrssi_lt[i] = i;
3051
3052         phy->lofcal = 0xFFFF;
3053         phy->initval = 0xFFFF;
3054
3055         phy->aci_enable = 0;
3056         phy->aci_wlan_automatic = 0;
3057         phy->aci_hw_rssi = 0;
3058
3059         phy->antenna_diversity = 0xFFFF;
3060         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3061         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3062
3063         /* Flags */
3064         phy->calibrated = 0;
3065         phy->locked = 0;
3066
3067         if (phy->_lo_pairs)
3068                 memset(phy->_lo_pairs, 0,
3069                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3070         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3071 }
3072
3073 /* Initialize a wireless core */
3074 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3075 {
3076         struct b43legacy_wl *wl = dev->wl;
3077         struct ssb_bus *bus = dev->dev->bus;
3078         struct b43legacy_phy *phy = &dev->phy;
3079         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3080         int err;
3081         u32 hf;
3082         u32 tmp;
3083
3084         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3085
3086         err = ssb_bus_powerup(bus, 0);
3087         if (err)
3088                 goto out;
3089         if (!ssb_device_is_enabled(dev->dev)) {
3090                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3091                 b43legacy_wireless_core_reset(dev, tmp);
3092         }
3093
3094         if ((phy->type == B43legacy_PHYTYPE_B) ||
3095             (phy->type == B43legacy_PHYTYPE_G)) {
3096                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3097                                          * B43legacy_LO_COUNT,
3098                                          GFP_KERNEL);
3099                 if (!phy->_lo_pairs)
3100                         return -ENOMEM;
3101         }
3102         setup_struct_wldev_for_init(dev);
3103
3104         err = b43legacy_phy_init_tssi2dbm_table(dev);
3105         if (err)
3106                 goto err_kfree_lo_control;
3107
3108         /* Enable IRQ routing to this device. */
3109         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3110
3111         b43legacy_imcfglo_timeouts_workaround(dev);
3112         prepare_phy_data_for_init(dev);
3113         b43legacy_phy_calibrate(dev);
3114         err = b43legacy_chip_init(dev);
3115         if (err)
3116                 goto err_kfree_tssitbl;
3117         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3118                               B43legacy_SHM_SH_WLCOREREV,
3119                               dev->dev->id.revision);
3120         hf = b43legacy_hf_read(dev);
3121         if (phy->type == B43legacy_PHYTYPE_G) {
3122                 hf |= B43legacy_HF_SYMW;
3123                 if (phy->rev == 1)
3124                         hf |= B43legacy_HF_GDCW;
3125                 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3126                         hf |= B43legacy_HF_OFDMPABOOST;
3127         } else if (phy->type == B43legacy_PHYTYPE_B) {
3128                 hf |= B43legacy_HF_SYMW;
3129                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3130                         hf &= ~B43legacy_HF_GDCW;
3131         }
3132         b43legacy_hf_write(dev, hf);
3133
3134         /* Short/Long Retry Limit.
3135          * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3136          * the chip-internal counter.
3137          */
3138         tmp = limit_value(modparam_short_retry, 0, 0xF);
3139         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3140                               0x0006, tmp);
3141         tmp = limit_value(modparam_long_retry, 0, 0xF);
3142         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3143                               0x0007, tmp);
3144
3145         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3146                               0x0044, 3);
3147         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3148                               0x0046, 2);
3149
3150         /* Disable sending probe responses from firmware.
3151          * Setting the MaxTime to one usec will always trigger
3152          * a timeout, so we never send any probe resp.
3153          * A timeout of zero is infinite. */
3154         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3155                               B43legacy_SHM_SH_PRMAXTIME, 1);
3156
3157         b43legacy_rate_memory_init(dev);
3158
3159         /* Minimum Contention Window */
3160         if (phy->type == B43legacy_PHYTYPE_B)
3161                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3162                                       0x0003, 31);
3163         else
3164                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3165                                       0x0003, 15);
3166         /* Maximum Contention Window */
3167         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3168                               0x0004, 1023);
3169
3170         do {
3171                 if (b43legacy_using_pio(dev))
3172                         err = b43legacy_pio_init(dev);
3173                 else {
3174                         err = b43legacy_dma_init(dev);
3175                         if (!err)
3176                                 b43legacy_qos_init(dev);
3177                 }
3178         } while (err == -EAGAIN);
3179         if (err)
3180                 goto err_chip_exit;
3181
3182         b43legacy_write16(dev, 0x0612, 0x0050);
3183         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3184         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3185
3186         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3187         wl->bssid = NULL;
3188         b43legacy_upload_card_macaddress(dev, NULL);
3189         b43legacy_security_init(dev);
3190         b43legacy_rng_init(wl);
3191
3192         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3193
3194 out:
3195         return err;
3196
3197 err_chip_exit:
3198         b43legacy_chip_exit(dev);
3199 err_kfree_tssitbl:
3200         if (phy->dyn_tssi_tbl)
3201                 kfree(phy->tssi2dbm);
3202 err_kfree_lo_control:
3203         kfree(phy->lo_control);
3204         phy->lo_control = NULL;
3205         ssb_bus_may_powerdown(bus);
3206         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3207         return err;
3208 }
3209
3210 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3211                                    struct ieee80211_if_init_conf *conf)
3212 {
3213         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3214         struct b43legacy_wldev *dev;
3215         unsigned long flags;
3216         int err = -EOPNOTSUPP;
3217         int did_init = 0;
3218
3219         mutex_lock(&wl->mutex);
3220         if ((conf->type != IEEE80211_IF_TYPE_MNTR) &&
3221             wl->operating)
3222                 goto out_mutex_unlock;
3223
3224         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3225
3226         dev = wl->current_dev;
3227         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3228                 err = b43legacy_wireless_core_init(dev);
3229                 if (err)
3230                         goto out_mutex_unlock;
3231                 did_init = 1;
3232         }
3233         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3234                 err = b43legacy_wireless_core_start(dev);
3235                 if (err) {
3236                         if (did_init)
3237                                 b43legacy_wireless_core_exit(dev);
3238                         goto out_mutex_unlock;
3239                 }
3240         }
3241
3242         spin_lock_irqsave(&wl->irq_lock, flags);
3243         switch (conf->type) {
3244         case IEEE80211_IF_TYPE_MNTR:
3245                 wl->monitor++;
3246                 break;
3247         default:
3248                 wl->operating = 1;
3249                 wl->if_id = conf->if_id;
3250                 wl->if_type = conf->type;
3251                 b43legacy_upload_card_macaddress(dev, conf->mac_addr);
3252         }
3253         b43legacy_adjust_opmode(dev);
3254         spin_unlock_irqrestore(&wl->irq_lock, flags);
3255
3256         err = 0;
3257 out_mutex_unlock:
3258         mutex_unlock(&wl->mutex);
3259
3260         return err;
3261 }
3262
3263 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3264                                        struct ieee80211_if_init_conf *conf)
3265 {
3266         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3267         struct b43legacy_wldev *dev;
3268         unsigned long flags;
3269
3270         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3271
3272         mutex_lock(&wl->mutex);
3273         if (conf->type == IEEE80211_IF_TYPE_MNTR) {
3274                 wl->monitor--;
3275                 B43legacy_WARN_ON(wl->monitor < 0);
3276         } else {
3277                 B43legacy_WARN_ON(!wl->operating);
3278                 wl->operating = 0;
3279         }
3280
3281         dev = wl->current_dev;
3282         if (!wl->operating && wl->monitor == 0) {
3283                 /* No interface left. */
3284                 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3285                         b43legacy_wireless_core_stop(dev);
3286                 b43legacy_wireless_core_exit(dev);
3287         } else {
3288                 /* Just monitor interfaces left. */
3289                 spin_lock_irqsave(&wl->irq_lock, flags);
3290                 b43legacy_adjust_opmode(dev);
3291                 if (!wl->operating)
3292                         b43legacy_upload_card_macaddress(dev, NULL);
3293                 spin_unlock_irqrestore(&wl->irq_lock, flags);
3294         }
3295         mutex_unlock(&wl->mutex);
3296 }
3297
3298
3299 static const struct ieee80211_ops b43legacy_hw_ops = {
3300         .tx = b43legacy_tx,
3301         .conf_tx = b43legacy_conf_tx,
3302         .add_interface = b43legacy_add_interface,
3303         .remove_interface = b43legacy_remove_interface,
3304         .config = b43legacy_dev_config,
3305         .config_interface = b43legacy_config_interface,
3306         .set_key = b43legacy_dev_set_key,
3307         .set_multicast_list = b43legacy_set_multicast_list,
3308         .get_stats = b43legacy_get_stats,
3309         .get_tx_stats = b43legacy_get_tx_stats,
3310 };
3311
3312 /* Hard-reset the chip. Do not call this directly.
3313  * Use b43legacy_controller_restart()
3314  */
3315 static void b43legacy_chip_reset(struct work_struct *work)
3316 {
3317         struct b43legacy_wldev *dev =
3318                 container_of(work, struct b43legacy_wldev, restart_work);
3319         struct b43legacy_wl *wl = dev->wl;
3320         int err = 0;
3321         int prev_status;
3322
3323         mutex_lock(&wl->mutex);
3324
3325         prev_status = b43legacy_status(dev);
3326         /* Bring the device down... */
3327         if (prev_status >= B43legacy_STAT_STARTED)
3328                 b43legacy_wireless_core_stop(dev);
3329         if (prev_status >= B43legacy_STAT_INITIALIZED)
3330                 b43legacy_wireless_core_exit(dev);
3331
3332         /* ...and up again. */
3333         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3334                 err = b43legacy_wireless_core_init(dev);
3335                 if (err)
3336                         goto out;
3337         }
3338         if (prev_status >= B43legacy_STAT_STARTED) {
3339                 err = b43legacy_wireless_core_start(dev);
3340                 if (err) {
3341                         b43legacy_wireless_core_exit(dev);
3342                         goto out;
3343                 }
3344         }
3345 out:
3346         mutex_unlock(&wl->mutex);
3347         if (err)
3348                 b43legacyerr(wl, "Controller restart FAILED\n");
3349         else
3350                 b43legacyinfo(wl, "Controller restarted\n");
3351 }
3352
3353 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3354                                  int have_bphy,
3355                                  int have_gphy)
3356 {
3357         struct ieee80211_hw *hw = dev->wl->hw;
3358         struct ieee80211_hw_mode *mode;
3359         struct b43legacy_phy *phy = &dev->phy;
3360         int cnt = 0;
3361         int err;
3362
3363         phy->possible_phymodes = 0;
3364         for (; 1; cnt++) {
3365                 if (have_bphy) {
3366                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3367                         mode = &phy->hwmodes[cnt];
3368
3369                         mode->mode = MODE_IEEE80211B;
3370                         mode->num_channels = b43legacy_bg_chantable_size;
3371                         mode->channels = b43legacy_bg_chantable;
3372                         mode->num_rates = b43legacy_b_ratetable_size;
3373                         mode->rates = b43legacy_b_ratetable;
3374                         err = ieee80211_register_hwmode(hw, mode);
3375                         if (err)
3376                                 return err;
3377
3378                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3379                         have_bphy = 0;
3380                         continue;
3381                 }
3382                 if (have_gphy) {
3383                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3384                         mode = &phy->hwmodes[cnt];
3385
3386                         mode->mode = MODE_IEEE80211G;
3387                         mode->num_channels = b43legacy_bg_chantable_size;
3388                         mode->channels = b43legacy_bg_chantable;
3389                         mode->num_rates = b43legacy_g_ratetable_size;
3390                         mode->rates = b43legacy_g_ratetable;
3391                         err = ieee80211_register_hwmode(hw, mode);
3392                         if (err)
3393                                 return err;
3394
3395                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3396                         have_gphy = 0;
3397                         continue;
3398                 }
3399                 break;
3400         }
3401
3402         return 0;
3403 }
3404
3405 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3406 {
3407         /* We release firmware that late to not be required to re-request
3408          * is all the time when we reinit the core. */
3409         b43legacy_release_firmware(dev);
3410 }
3411
3412 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3413 {
3414         struct b43legacy_wl *wl = dev->wl;
3415         struct ssb_bus *bus = dev->dev->bus;
3416         struct pci_dev *pdev = bus->host_pci;
3417         int err;
3418         int have_bphy = 0;
3419         int have_gphy = 0;
3420         u32 tmp;
3421
3422         /* Do NOT do any device initialization here.
3423          * Do it in wireless_core_init() instead.
3424          * This function is for gathering basic information about the HW, only.
3425          * Also some structs may be set up here. But most likely you want to
3426          * have that in core_init(), too.
3427          */
3428
3429         err = ssb_bus_powerup(bus, 0);
3430         if (err) {
3431                 b43legacyerr(wl, "Bus powerup failed\n");
3432                 goto out;
3433         }
3434         /* Get the PHY type. */
3435         if (dev->dev->id.revision >= 5) {
3436                 u32 tmshigh;
3437
3438                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3439                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3440                 if (!have_gphy)
3441                         have_bphy = 1;
3442         } else if (dev->dev->id.revision == 4)
3443                 have_gphy = 1;
3444         else
3445                 have_bphy = 1;
3446
3447         /* Initialize LEDs structs. */
3448         err = b43legacy_leds_init(dev);
3449         if (err)
3450                 goto err_powerdown;
3451
3452         dev->phy.gmode = (have_gphy || have_bphy);
3453         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3454         b43legacy_wireless_core_reset(dev, tmp);
3455
3456         err = b43legacy_phy_versioning(dev);
3457         if (err)
3458                 goto err_leds_exit;
3459         /* Check if this device supports multiband. */
3460         if (!pdev ||
3461             (pdev->device != 0x4312 &&
3462              pdev->device != 0x4319 &&
3463              pdev->device != 0x4324)) {
3464                 /* No multiband support. */
3465                 have_bphy = 0;
3466                 have_gphy = 0;
3467                 switch (dev->phy.type) {
3468                 case B43legacy_PHYTYPE_B:
3469                         have_bphy = 1;
3470                         break;
3471                 case B43legacy_PHYTYPE_G:
3472                         have_gphy = 1;
3473                         break;
3474                 default:
3475                         B43legacy_BUG_ON(1);
3476                 }
3477         }
3478         dev->phy.gmode = (have_gphy || have_bphy);
3479         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3480         b43legacy_wireless_core_reset(dev, tmp);
3481
3482         err = b43legacy_validate_chipaccess(dev);
3483         if (err)
3484                 goto err_leds_exit;
3485         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3486         if (err)
3487                 goto err_leds_exit;
3488
3489         /* Now set some default "current_dev" */
3490         if (!wl->current_dev)
3491                 wl->current_dev = dev;
3492         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3493
3494         b43legacy_radio_turn_off(dev);
3495         b43legacy_switch_analog(dev, 0);
3496         ssb_device_disable(dev->dev, 0);
3497         ssb_bus_may_powerdown(bus);
3498
3499 out:
3500         return err;
3501
3502 err_leds_exit:
3503         b43legacy_leds_exit(dev);
3504 err_powerdown:
3505         ssb_bus_may_powerdown(bus);
3506         return err;
3507 }
3508
3509 static void b43legacy_one_core_detach(struct ssb_device *dev)
3510 {
3511         struct b43legacy_wldev *wldev;
3512         struct b43legacy_wl *wl;
3513
3514         wldev = ssb_get_drvdata(dev);
3515         wl = wldev->wl;
3516         cancel_work_sync(&wldev->restart_work);
3517         b43legacy_debugfs_remove_device(wldev);
3518         b43legacy_wireless_core_detach(wldev);
3519         list_del(&wldev->list);
3520         wl->nr_devs--;
3521         ssb_set_drvdata(dev, NULL);
3522         kfree(wldev);
3523 }
3524
3525 static int b43legacy_one_core_attach(struct ssb_device *dev,
3526                                      struct b43legacy_wl *wl)
3527 {
3528         struct b43legacy_wldev *wldev;
3529         struct pci_dev *pdev;
3530         int err = -ENOMEM;
3531
3532         if (!list_empty(&wl->devlist)) {
3533                 /* We are not the first core on this chip. */
3534                 pdev = dev->bus->host_pci;
3535                 /* Only special chips support more than one wireless
3536                  * core, although some of the other chips have more than
3537                  * one wireless core as well. Check for this and
3538                  * bail out early.
3539                  */
3540                 if (!pdev ||
3541                     ((pdev->device != 0x4321) &&
3542                      (pdev->device != 0x4313) &&
3543                      (pdev->device != 0x431A))) {
3544                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3545                         return -ENODEV;
3546                 }
3547         }
3548
3549         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3550         if (!wldev)
3551                 goto out;
3552
3553         wldev->dev = dev;
3554         wldev->wl = wl;
3555         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3556         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3557         tasklet_init(&wldev->isr_tasklet,
3558                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3559                      (unsigned long)wldev);
3560         if (modparam_pio)
3561                 wldev->__using_pio = 1;
3562         INIT_LIST_HEAD(&wldev->list);
3563
3564         err = b43legacy_wireless_core_attach(wldev);
3565         if (err)
3566                 goto err_kfree_wldev;
3567
3568         list_add(&wldev->list, &wl->devlist);
3569         wl->nr_devs++;
3570         ssb_set_drvdata(dev, wldev);
3571         b43legacy_debugfs_add_device(wldev);
3572 out:
3573         return err;
3574
3575 err_kfree_wldev:
3576         kfree(wldev);
3577         return err;
3578 }
3579
3580 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3581 {
3582         /* boardflags workarounds */
3583         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3584             bus->boardinfo.type == 0x4E &&
3585             bus->boardinfo.rev > 0x40)
3586                 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3587
3588         /* Convert Antennagain values to Q5.2 */
3589         if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3590                 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3591         bus->sprom.r1.antenna_gain_bg <<= 2;
3592 }
3593
3594 static void b43legacy_wireless_exit(struct ssb_device *dev,
3595                                   struct b43legacy_wl *wl)
3596 {
3597         struct ieee80211_hw *hw = wl->hw;
3598
3599         ssb_set_devtypedata(dev, NULL);
3600         ieee80211_free_hw(hw);
3601 }
3602
3603 static int b43legacy_wireless_init(struct ssb_device *dev)
3604 {
3605         struct ssb_sprom *sprom = &dev->bus->sprom;
3606         struct ieee80211_hw *hw;
3607         struct b43legacy_wl *wl;
3608         int err = -ENOMEM;
3609
3610         b43legacy_sprom_fixup(dev->bus);
3611
3612         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3613         if (!hw) {
3614                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3615                 goto out;
3616         }
3617
3618         /* fill hw info */
3619         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3620                     IEEE80211_HW_RX_INCLUDES_FCS;
3621         hw->max_signal = 100;
3622         hw->max_rssi = -110;
3623         hw->max_noise = -110;
3624         hw->queues = 1; /* FIXME: hardware has more queues */
3625         SET_IEEE80211_DEV(hw, dev->dev);
3626         if (is_valid_ether_addr(sprom->r1.et1mac))
3627                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3628         else
3629                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3630
3631         /* Get and initialize struct b43legacy_wl */
3632         wl = hw_to_b43legacy_wl(hw);
3633         memset(wl, 0, sizeof(*wl));
3634         wl->hw = hw;
3635         spin_lock_init(&wl->irq_lock);
3636         spin_lock_init(&wl->leds_lock);
3637         mutex_init(&wl->mutex);
3638         INIT_LIST_HEAD(&wl->devlist);
3639
3640         ssb_set_devtypedata(dev, wl);
3641         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3642         err = 0;
3643 out:
3644         return err;
3645 }
3646
3647 static int b43legacy_probe(struct ssb_device *dev,
3648                          const struct ssb_device_id *id)
3649 {
3650         struct b43legacy_wl *wl;
3651         int err;
3652         int first = 0;
3653
3654         wl = ssb_get_devtypedata(dev);
3655         if (!wl) {
3656                 /* Probing the first core - setup common struct b43legacy_wl */
3657                 first = 1;
3658                 err = b43legacy_wireless_init(dev);
3659                 if (err)
3660                         goto out;
3661                 wl = ssb_get_devtypedata(dev);
3662                 B43legacy_WARN_ON(!wl);
3663         }
3664         err = b43legacy_one_core_attach(dev, wl);
3665         if (err)
3666                 goto err_wireless_exit;
3667
3668         if (first) {
3669                 err = ieee80211_register_hw(wl->hw);
3670                 if (err)
3671                         goto err_one_core_detach;
3672         }
3673
3674 out:
3675         return err;
3676
3677 err_one_core_detach:
3678         b43legacy_one_core_detach(dev);
3679 err_wireless_exit:
3680         if (first)
3681                 b43legacy_wireless_exit(dev, wl);
3682         return err;
3683 }
3684
3685 static void b43legacy_remove(struct ssb_device *dev)
3686 {
3687         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3688         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3689
3690         B43legacy_WARN_ON(!wl);
3691         if (wl->current_dev == wldev)
3692                 ieee80211_unregister_hw(wl->hw);
3693
3694         b43legacy_one_core_detach(dev);
3695
3696         if (list_empty(&wl->devlist))
3697                 /* Last core on the chip unregistered.
3698                  * We can destroy common struct b43legacy_wl.
3699                  */
3700                 b43legacy_wireless_exit(dev, wl);
3701 }
3702
3703 /* Perform a hardware reset. This can be called from any context. */
3704 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3705                                   const char *reason)
3706 {
3707         /* Must avoid requeueing, if we are in shutdown. */
3708         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3709                 return;
3710         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3711         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3712 }
3713
3714 #ifdef CONFIG_PM
3715
3716 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3717 {
3718         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3719         struct b43legacy_wl *wl = wldev->wl;
3720
3721         b43legacydbg(wl, "Suspending...\n");
3722
3723         mutex_lock(&wl->mutex);
3724         wldev->suspend_init_status = b43legacy_status(wldev);
3725         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3726                 b43legacy_wireless_core_stop(wldev);
3727         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3728                 b43legacy_wireless_core_exit(wldev);
3729         mutex_unlock(&wl->mutex);
3730
3731         b43legacydbg(wl, "Device suspended.\n");
3732
3733         return 0;
3734 }
3735
3736 static int b43legacy_resume(struct ssb_device *dev)
3737 {
3738         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3739         struct b43legacy_wl *wl = wldev->wl;
3740         int err = 0;
3741
3742         b43legacydbg(wl, "Resuming...\n");
3743
3744         mutex_lock(&wl->mutex);
3745         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3746                 err = b43legacy_wireless_core_init(wldev);
3747                 if (err) {
3748                         b43legacyerr(wl, "Resume failed at core init\n");
3749                         goto out;
3750                 }
3751         }
3752         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3753                 err = b43legacy_wireless_core_start(wldev);
3754                 if (err) {
3755                         b43legacy_wireless_core_exit(wldev);
3756                         b43legacyerr(wl, "Resume failed at core start\n");
3757                         goto out;
3758                 }
3759         }
3760         mutex_unlock(&wl->mutex);
3761
3762         b43legacydbg(wl, "Device resumed.\n");
3763 out:
3764         return err;
3765 }
3766
3767 #else   /* CONFIG_PM */
3768 # define b43legacy_suspend      NULL
3769 # define b43legacy_resume               NULL
3770 #endif  /* CONFIG_PM */
3771
3772 static struct ssb_driver b43legacy_ssb_driver = {
3773         .name           = KBUILD_MODNAME,
3774         .id_table       = b43legacy_ssb_tbl,
3775         .probe          = b43legacy_probe,
3776         .remove         = b43legacy_remove,
3777         .suspend        = b43legacy_suspend,
3778         .resume         = b43legacy_resume,
3779 };
3780
3781 static int __init b43legacy_init(void)
3782 {
3783         int err;
3784
3785         b43legacy_debugfs_init();
3786
3787         err = ssb_driver_register(&b43legacy_ssb_driver);
3788         if (err)
3789                 goto err_dfs_exit;
3790
3791         return err;
3792
3793 err_dfs_exit:
3794         b43legacy_debugfs_exit();
3795         return err;
3796 }
3797
3798 static void __exit b43legacy_exit(void)
3799 {
3800         ssb_driver_unregister(&b43legacy_ssb_driver);
3801         b43legacy_debugfs_exit();
3802 }
3803
3804 module_init(b43legacy_init)
3805 module_exit(b43legacy_exit)