82953dd0bae04b114e9e74c96afbf83ed9066ed5
[linux-2.6.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2  *
3  *  Broadcom B43legacy wireless driver
4  *
5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11  *
12  *  Some parts of the code in this file are derived from the ipw2200
13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
14
15  *  This program is free software; you can redistribute it and/or modify
16  *  it under the terms of the GNU General Public License as published by
17  *  the Free Software Foundation; either version 2 of the License, or
18  *  (at your option) any later version.
19  *
20  *  This program is distributed in the hope that it will be useful,
21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  *  GNU General Public License for more details.
24  *
25  *  You should have received a copy of the GNU General Public License
26  *  along with this program; see the file COPYING.  If not, write to
27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28  *  Boston, MA 02110-1301, USA.
29  *
30  */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
64
65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66 static int modparam_pio;
67 module_param_named(pio, modparam_pio, int, 0444);
68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
69 #elif defined(CONFIG_B43LEGACY_DMA)
70 # define modparam_pio   0
71 #elif defined(CONFIG_B43LEGACY_PIO)
72 # define modparam_pio   1
73 #endif
74
75 static int modparam_bad_frames_preempt;
76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
78                  " Preemption");
79
80 static char modparam_fwpostfix[16];
81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
83
84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
86         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
87         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
88         SSB_DEVTABLE_END
89 };
90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
91
92
93 /* Channel and ratetables are shared for all devices.
94  * They can't be const, because ieee80211 puts some precalculated
95  * data in there. This data is the same for all devices, so we don't
96  * get concurrency issues */
97 #define RATETAB_ENT(_rateid, _flags) \
98         {                                                               \
99                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
100                 .hw_value       = (_rateid),                            \
101                 .flags          = (_flags),                             \
102         }
103 /*
104  * NOTE: When changing this, sync with xmit.c's
105  *       b43legacy_plcp_get_bitrate_idx_* functions!
106  */
107 static struct ieee80211_rate __b43legacy_ratetable[] = {
108         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
109         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
110         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
111         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
112         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
113         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
114         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
115         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
116         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
117         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
118         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
119         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
120 };
121 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
122 #define b43legacy_b_ratetable_size      4
123 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
124 #define b43legacy_g_ratetable_size      12
125
126 #define CHANTAB_ENT(_chanid, _freq) \
127         {                                                       \
128                 .center_freq    = (_freq),                      \
129                 .hw_value       = (_chanid),                    \
130         }
131 static struct ieee80211_channel b43legacy_bg_chantable[] = {
132         CHANTAB_ENT(1, 2412),
133         CHANTAB_ENT(2, 2417),
134         CHANTAB_ENT(3, 2422),
135         CHANTAB_ENT(4, 2427),
136         CHANTAB_ENT(5, 2432),
137         CHANTAB_ENT(6, 2437),
138         CHANTAB_ENT(7, 2442),
139         CHANTAB_ENT(8, 2447),
140         CHANTAB_ENT(9, 2452),
141         CHANTAB_ENT(10, 2457),
142         CHANTAB_ENT(11, 2462),
143         CHANTAB_ENT(12, 2467),
144         CHANTAB_ENT(13, 2472),
145         CHANTAB_ENT(14, 2484),
146 };
147
148 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
149         .channels = b43legacy_bg_chantable,
150         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
151         .bitrates = b43legacy_b_ratetable,
152         .n_bitrates = b43legacy_b_ratetable_size,
153 };
154
155 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
156         .channels = b43legacy_bg_chantable,
157         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
158         .bitrates = b43legacy_g_ratetable,
159         .n_bitrates = b43legacy_g_ratetable_size,
160 };
161
162 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
163 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
164 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
165 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
166
167
168 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
169 {
170         if (!wl || !wl->current_dev)
171                 return 1;
172         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
173                 return 1;
174         /* We are up and running.
175          * Ratelimit the messages to avoid DoS over the net. */
176         return net_ratelimit();
177 }
178
179 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
180 {
181         va_list args;
182
183         if (!b43legacy_ratelimit(wl))
184                 return;
185         va_start(args, fmt);
186         printk(KERN_INFO "b43legacy-%s: ",
187                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
188         vprintk(fmt, args);
189         va_end(args);
190 }
191
192 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
193 {
194         va_list args;
195
196         if (!b43legacy_ratelimit(wl))
197                 return;
198         va_start(args, fmt);
199         printk(KERN_ERR "b43legacy-%s ERROR: ",
200                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
201         vprintk(fmt, args);
202         va_end(args);
203 }
204
205 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
206 {
207         va_list args;
208
209         if (!b43legacy_ratelimit(wl))
210                 return;
211         va_start(args, fmt);
212         printk(KERN_WARNING "b43legacy-%s warning: ",
213                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
214         vprintk(fmt, args);
215         va_end(args);
216 }
217
218 #if B43legacy_DEBUG
219 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
220 {
221         va_list args;
222
223         va_start(args, fmt);
224         printk(KERN_DEBUG "b43legacy-%s debug: ",
225                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
226         vprintk(fmt, args);
227         va_end(args);
228 }
229 #endif /* DEBUG */
230
231 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
232                                 u32 val)
233 {
234         u32 status;
235
236         B43legacy_WARN_ON(offset % 4 != 0);
237
238         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
239         if (status & B43legacy_MACCTL_BE)
240                 val = swab32(val);
241
242         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
243         mmiowb();
244         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
245 }
246
247 static inline
248 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
249                                 u16 routing, u16 offset)
250 {
251         u32 control;
252
253         /* "offset" is the WORD offset. */
254
255         control = routing;
256         control <<= 16;
257         control |= offset;
258         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
259 }
260
261 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
262                        u16 routing, u16 offset)
263 {
264         u32 ret;
265
266         if (routing == B43legacy_SHM_SHARED) {
267                 B43legacy_WARN_ON((offset & 0x0001) != 0);
268                 if (offset & 0x0003) {
269                         /* Unaligned access */
270                         b43legacy_shm_control_word(dev, routing, offset >> 2);
271                         ret = b43legacy_read16(dev,
272                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
273                         ret <<= 16;
274                         b43legacy_shm_control_word(dev, routing,
275                                                      (offset >> 2) + 1);
276                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
277
278                         return ret;
279                 }
280                 offset >>= 2;
281         }
282         b43legacy_shm_control_word(dev, routing, offset);
283         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
284
285         return ret;
286 }
287
288 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
289                            u16 routing, u16 offset)
290 {
291         u16 ret;
292
293         if (routing == B43legacy_SHM_SHARED) {
294                 B43legacy_WARN_ON((offset & 0x0001) != 0);
295                 if (offset & 0x0003) {
296                         /* Unaligned access */
297                         b43legacy_shm_control_word(dev, routing, offset >> 2);
298                         ret = b43legacy_read16(dev,
299                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
300
301                         return ret;
302                 }
303                 offset >>= 2;
304         }
305         b43legacy_shm_control_word(dev, routing, offset);
306         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
307
308         return ret;
309 }
310
311 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
312                            u16 routing, u16 offset,
313                            u32 value)
314 {
315         if (routing == B43legacy_SHM_SHARED) {
316                 B43legacy_WARN_ON((offset & 0x0001) != 0);
317                 if (offset & 0x0003) {
318                         /* Unaligned access */
319                         b43legacy_shm_control_word(dev, routing, offset >> 2);
320                         mmiowb();
321                         b43legacy_write16(dev,
322                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
323                                           (value >> 16) & 0xffff);
324                         mmiowb();
325                         b43legacy_shm_control_word(dev, routing,
326                                                    (offset >> 2) + 1);
327                         mmiowb();
328                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
329                                           value & 0xffff);
330                         return;
331                 }
332                 offset >>= 2;
333         }
334         b43legacy_shm_control_word(dev, routing, offset);
335         mmiowb();
336         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
337 }
338
339 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
340                            u16 value)
341 {
342         if (routing == B43legacy_SHM_SHARED) {
343                 B43legacy_WARN_ON((offset & 0x0001) != 0);
344                 if (offset & 0x0003) {
345                         /* Unaligned access */
346                         b43legacy_shm_control_word(dev, routing, offset >> 2);
347                         mmiowb();
348                         b43legacy_write16(dev,
349                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
350                                           value);
351                         return;
352                 }
353                 offset >>= 2;
354         }
355         b43legacy_shm_control_word(dev, routing, offset);
356         mmiowb();
357         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
358 }
359
360 /* Read HostFlags */
361 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
362 {
363         u32 ret;
364
365         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
366                                    B43legacy_SHM_SH_HOSTFHI);
367         ret <<= 16;
368         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
369                                     B43legacy_SHM_SH_HOSTFLO);
370
371         return ret;
372 }
373
374 /* Write HostFlags */
375 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
376 {
377         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
378                               B43legacy_SHM_SH_HOSTFLO,
379                               (value & 0x0000FFFF));
380         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
381                               B43legacy_SHM_SH_HOSTFHI,
382                               ((value & 0xFFFF0000) >> 16));
383 }
384
385 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
386 {
387         /* We need to be careful. As we read the TSF from multiple
388          * registers, we should take care of register overflows.
389          * In theory, the whole tsf read process should be atomic.
390          * We try to be atomic here, by restaring the read process,
391          * if any of the high registers changed (overflew).
392          */
393         if (dev->dev->id.revision >= 3) {
394                 u32 low;
395                 u32 high;
396                 u32 high2;
397
398                 do {
399                         high = b43legacy_read32(dev,
400                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
401                         low = b43legacy_read32(dev,
402                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
403                         high2 = b43legacy_read32(dev,
404                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
405                 } while (unlikely(high != high2));
406
407                 *tsf = high;
408                 *tsf <<= 32;
409                 *tsf |= low;
410         } else {
411                 u64 tmp;
412                 u16 v0;
413                 u16 v1;
414                 u16 v2;
415                 u16 v3;
416                 u16 test1;
417                 u16 test2;
418                 u16 test3;
419
420                 do {
421                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
422                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
423                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
424                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
425
426                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
427                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
428                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
429                 } while (v3 != test3 || v2 != test2 || v1 != test1);
430
431                 *tsf = v3;
432                 *tsf <<= 48;
433                 tmp = v2;
434                 tmp <<= 32;
435                 *tsf |= tmp;
436                 tmp = v1;
437                 tmp <<= 16;
438                 *tsf |= tmp;
439                 *tsf |= v0;
440         }
441 }
442
443 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
444 {
445         u32 status;
446
447         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
448         status |= B43legacy_MACCTL_TBTTHOLD;
449         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
450         mmiowb();
451 }
452
453 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
454 {
455         u32 status;
456
457         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
458         status &= ~B43legacy_MACCTL_TBTTHOLD;
459         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
460 }
461
462 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
463 {
464         /* Be careful with the in-progress timer.
465          * First zero out the low register, so we have a full
466          * register-overflow duration to complete the operation.
467          */
468         if (dev->dev->id.revision >= 3) {
469                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
470                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
471
472                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
473                 mmiowb();
474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
475                                     hi);
476                 mmiowb();
477                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
478                                     lo);
479         } else {
480                 u16 v0 = (tsf & 0x000000000000FFFFULL);
481                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
482                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
483                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
484
485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
486                 mmiowb();
487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
488                 mmiowb();
489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
490                 mmiowb();
491                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
492                 mmiowb();
493                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
494         }
495 }
496
497 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
498 {
499         b43legacy_time_lock(dev);
500         b43legacy_tsf_write_locked(dev, tsf);
501         b43legacy_time_unlock(dev);
502 }
503
504 static
505 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
506                              u16 offset, const u8 *mac)
507 {
508         static const u8 zero_addr[ETH_ALEN] = { 0 };
509         u16 data;
510
511         if (!mac)
512                 mac = zero_addr;
513
514         offset |= 0x0020;
515         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
516
517         data = mac[0];
518         data |= mac[1] << 8;
519         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
520         data = mac[2];
521         data |= mac[3] << 8;
522         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
523         data = mac[4];
524         data |= mac[5] << 8;
525         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
526 }
527
528 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
529 {
530         static const u8 zero_addr[ETH_ALEN] = { 0 };
531         const u8 *mac = dev->wl->mac_addr;
532         const u8 *bssid = dev->wl->bssid;
533         u8 mac_bssid[ETH_ALEN * 2];
534         int i;
535         u32 tmp;
536
537         if (!bssid)
538                 bssid = zero_addr;
539         if (!mac)
540                 mac = zero_addr;
541
542         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
543
544         memcpy(mac_bssid, mac, ETH_ALEN);
545         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
546
547         /* Write our MAC address and BSSID to template ram */
548         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
549                 tmp =  (u32)(mac_bssid[i + 0]);
550                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
551                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
552                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
553                 b43legacy_ram_write(dev, 0x20 + i, tmp);
554                 b43legacy_ram_write(dev, 0x78 + i, tmp);
555                 b43legacy_ram_write(dev, 0x478 + i, tmp);
556         }
557 }
558
559 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
560 {
561         b43legacy_write_mac_bssid_templates(dev);
562         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
563                                 dev->wl->mac_addr);
564 }
565
566 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
567                                     u16 slot_time)
568 {
569         /* slot_time is in usec. */
570         if (dev->phy.type != B43legacy_PHYTYPE_G)
571                 return;
572         b43legacy_write16(dev, 0x684, 510 + slot_time);
573         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
574                               slot_time);
575 }
576
577 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
578 {
579         b43legacy_set_slot_time(dev, 9);
580         dev->short_slot = 1;
581 }
582
583 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
584 {
585         b43legacy_set_slot_time(dev, 20);
586         dev->short_slot = 0;
587 }
588
589 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
590  * Returns the _previously_ enabled IRQ mask.
591  */
592 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
593                                              u32 mask)
594 {
595         u32 old_mask;
596
597         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
598         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
599                           mask);
600
601         return old_mask;
602 }
603
604 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
605  * Returns the _previously_ enabled IRQ mask.
606  */
607 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
608                                               u32 mask)
609 {
610         u32 old_mask;
611
612         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
613         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
614
615         return old_mask;
616 }
617
618 /* Synchronize IRQ top- and bottom-half.
619  * IRQs must be masked before calling this.
620  * This must not be called with the irq_lock held.
621  */
622 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
623 {
624         synchronize_irq(dev->dev->irq);
625         tasklet_kill(&dev->isr_tasklet);
626 }
627
628 /* DummyTransmission function, as documented on
629  * http://bcm-specs.sipsolutions.net/DummyTransmission
630  */
631 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
632 {
633         struct b43legacy_phy *phy = &dev->phy;
634         unsigned int i;
635         unsigned int max_loop;
636         u16 value;
637         u32 buffer[5] = {
638                 0x00000000,
639                 0x00D40000,
640                 0x00000000,
641                 0x01000000,
642                 0x00000000,
643         };
644
645         switch (phy->type) {
646         case B43legacy_PHYTYPE_B:
647         case B43legacy_PHYTYPE_G:
648                 max_loop = 0xFA;
649                 buffer[0] = 0x000B846E;
650                 break;
651         default:
652                 B43legacy_BUG_ON(1);
653                 return;
654         }
655
656         for (i = 0; i < 5; i++)
657                 b43legacy_ram_write(dev, i * 4, buffer[i]);
658
659         /* dummy read follows */
660         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
661
662         b43legacy_write16(dev, 0x0568, 0x0000);
663         b43legacy_write16(dev, 0x07C0, 0x0000);
664         b43legacy_write16(dev, 0x050C, 0x0000);
665         b43legacy_write16(dev, 0x0508, 0x0000);
666         b43legacy_write16(dev, 0x050A, 0x0000);
667         b43legacy_write16(dev, 0x054C, 0x0000);
668         b43legacy_write16(dev, 0x056A, 0x0014);
669         b43legacy_write16(dev, 0x0568, 0x0826);
670         b43legacy_write16(dev, 0x0500, 0x0000);
671         b43legacy_write16(dev, 0x0502, 0x0030);
672
673         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
674                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
675         for (i = 0x00; i < max_loop; i++) {
676                 value = b43legacy_read16(dev, 0x050E);
677                 if (value & 0x0080)
678                         break;
679                 udelay(10);
680         }
681         for (i = 0x00; i < 0x0A; i++) {
682                 value = b43legacy_read16(dev, 0x050E);
683                 if (value & 0x0400)
684                         break;
685                 udelay(10);
686         }
687         for (i = 0x00; i < 0x0A; i++) {
688                 value = b43legacy_read16(dev, 0x0690);
689                 if (!(value & 0x0100))
690                         break;
691                 udelay(10);
692         }
693         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
694                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
695 }
696
697 /* Turn the Analog ON/OFF */
698 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
699 {
700         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
701 }
702
703 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
704 {
705         u32 tmslow;
706         u32 macctl;
707
708         flags |= B43legacy_TMSLOW_PHYCLKEN;
709         flags |= B43legacy_TMSLOW_PHYRESET;
710         ssb_device_enable(dev->dev, flags);
711         msleep(2); /* Wait for the PLL to turn on. */
712
713         /* Now take the PHY out of Reset again */
714         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
715         tmslow |= SSB_TMSLOW_FGC;
716         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
717         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
718         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
719         msleep(1);
720         tmslow &= ~SSB_TMSLOW_FGC;
721         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
722         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
723         msleep(1);
724
725         /* Turn Analog ON */
726         b43legacy_switch_analog(dev, 1);
727
728         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
729         macctl &= ~B43legacy_MACCTL_GMODE;
730         if (flags & B43legacy_TMSLOW_GMODE) {
731                 macctl |= B43legacy_MACCTL_GMODE;
732                 dev->phy.gmode = 1;
733         } else
734                 dev->phy.gmode = 0;
735         macctl |= B43legacy_MACCTL_IHR_ENABLED;
736         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
737 }
738
739 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
740 {
741         u32 v0;
742         u32 v1;
743         u16 tmp;
744         struct b43legacy_txstatus stat;
745
746         while (1) {
747                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
748                 if (!(v0 & 0x00000001))
749                         break;
750                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
751
752                 stat.cookie = (v0 >> 16);
753                 stat.seq = (v1 & 0x0000FFFF);
754                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
755                 tmp = (v0 & 0x0000FFFF);
756                 stat.frame_count = ((tmp & 0xF000) >> 12);
757                 stat.rts_count = ((tmp & 0x0F00) >> 8);
758                 stat.supp_reason = ((tmp & 0x001C) >> 2);
759                 stat.pm_indicated = !!(tmp & 0x0080);
760                 stat.intermediate = !!(tmp & 0x0040);
761                 stat.for_ampdu = !!(tmp & 0x0020);
762                 stat.acked = !!(tmp & 0x0002);
763
764                 b43legacy_handle_txstatus(dev, &stat);
765         }
766 }
767
768 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
769 {
770         u32 dummy;
771
772         if (dev->dev->id.revision < 5)
773                 return;
774         /* Read all entries from the microcode TXstatus FIFO
775          * and throw them away.
776          */
777         while (1) {
778                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
779                 if (!(dummy & 0x00000001))
780                         break;
781                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
782         }
783 }
784
785 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
786 {
787         u32 val = 0;
788
789         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
790         val <<= 16;
791         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
792
793         return val;
794 }
795
796 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
797 {
798         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
799                               (jssi & 0x0000FFFF));
800         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
801                               (jssi & 0xFFFF0000) >> 16);
802 }
803
804 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
805 {
806         b43legacy_jssi_write(dev, 0x7F7F7F7F);
807         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
808                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
809                           | B43legacy_MACCMD_BGNOISE);
810         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
811                             dev->phy.channel);
812 }
813
814 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
815 {
816         /* Top half of Link Quality calculation. */
817
818         if (dev->noisecalc.calculation_running)
819                 return;
820         dev->noisecalc.channel_at_start = dev->phy.channel;
821         dev->noisecalc.calculation_running = 1;
822         dev->noisecalc.nr_samples = 0;
823
824         b43legacy_generate_noise_sample(dev);
825 }
826
827 static void handle_irq_noise(struct b43legacy_wldev *dev)
828 {
829         struct b43legacy_phy *phy = &dev->phy;
830         u16 tmp;
831         u8 noise[4];
832         u8 i;
833         u8 j;
834         s32 average;
835
836         /* Bottom half of Link Quality calculation. */
837
838         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
839         if (dev->noisecalc.channel_at_start != phy->channel)
840                 goto drop_calculation;
841         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
842         if (noise[0] == 0x7F || noise[1] == 0x7F ||
843             noise[2] == 0x7F || noise[3] == 0x7F)
844                 goto generate_new;
845
846         /* Get the noise samples. */
847         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
848         i = dev->noisecalc.nr_samples;
849         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
850         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
851         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
852         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
853         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
854         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
855         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
856         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
857         dev->noisecalc.nr_samples++;
858         if (dev->noisecalc.nr_samples == 8) {
859                 /* Calculate the Link Quality by the noise samples. */
860                 average = 0;
861                 for (i = 0; i < 8; i++) {
862                         for (j = 0; j < 4; j++)
863                                 average += dev->noisecalc.samples[i][j];
864                 }
865                 average /= (8 * 4);
866                 average *= 125;
867                 average += 64;
868                 average /= 128;
869                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
870                                              0x40C);
871                 tmp = (tmp / 128) & 0x1F;
872                 if (tmp >= 8)
873                         average += 2;
874                 else
875                         average -= 25;
876                 if (tmp == 8)
877                         average -= 72;
878                 else
879                         average -= 48;
880
881                 dev->stats.link_noise = average;
882 drop_calculation:
883                 dev->noisecalc.calculation_running = 0;
884                 return;
885         }
886 generate_new:
887         b43legacy_generate_noise_sample(dev);
888 }
889
890 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
891 {
892         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
893                 /* TODO: PS TBTT */
894         } else {
895                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
896                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
897         }
898         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
899                 dev->dfq_valid = 1;
900 }
901
902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
903 {
904         if (dev->dfq_valid) {
905                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
906                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
907                                   | B43legacy_MACCMD_DFQ_VALID);
908                 dev->dfq_valid = 0;
909         }
910 }
911
912 static void handle_irq_pmq(struct b43legacy_wldev *dev)
913 {
914         u32 tmp;
915
916         /* TODO: AP mode. */
917
918         while (1) {
919                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
920                 if (!(tmp & 0x00000008))
921                         break;
922         }
923         /* 16bit write is odd, but correct. */
924         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
925 }
926
927 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
928                                             const u8 *data, u16 size,
929                                             u16 ram_offset,
930                                             u16 shm_size_offset, u8 rate)
931 {
932         u32 i;
933         u32 tmp;
934         struct b43legacy_plcp_hdr4 plcp;
935
936         plcp.data = 0;
937         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
938         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
939         ram_offset += sizeof(u32);
940         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
941          * So leave the first two bytes of the next write blank.
942          */
943         tmp = (u32)(data[0]) << 16;
944         tmp |= (u32)(data[1]) << 24;
945         b43legacy_ram_write(dev, ram_offset, tmp);
946         ram_offset += sizeof(u32);
947         for (i = 2; i < size; i += sizeof(u32)) {
948                 tmp = (u32)(data[i + 0]);
949                 if (i + 1 < size)
950                         tmp |= (u32)(data[i + 1]) << 8;
951                 if (i + 2 < size)
952                         tmp |= (u32)(data[i + 2]) << 16;
953                 if (i + 3 < size)
954                         tmp |= (u32)(data[i + 3]) << 24;
955                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
956         }
957         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
958                               size + sizeof(struct b43legacy_plcp_hdr6));
959 }
960
961 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
962                                             u16 ram_offset,
963                                             u16 shm_size_offset, u8 rate)
964 {
965
966         unsigned int i, len, variable_len;
967         const struct ieee80211_mgmt *bcn;
968         const u8 *ie;
969         bool tim_found = 0;
970
971         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
972         len = min((size_t)dev->wl->current_beacon->len,
973                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
974
975         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
976                                         shm_size_offset, rate);
977
978         /* Find the position of the TIM and the DTIM_period value
979          * and write them to SHM. */
980         ie = bcn->u.beacon.variable;
981         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
982         for (i = 0; i < variable_len - 2; ) {
983                 uint8_t ie_id, ie_len;
984
985                 ie_id = ie[i];
986                 ie_len = ie[i + 1];
987                 if (ie_id == 5) {
988                         u16 tim_position;
989                         u16 dtim_period;
990                         /* This is the TIM Information Element */
991
992                         /* Check whether the ie_len is in the beacon data range. */
993                         if (variable_len < ie_len + 2 + i)
994                                 break;
995                         /* A valid TIM is at least 4 bytes long. */
996                         if (ie_len < 4)
997                                 break;
998                         tim_found = 1;
999
1000                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
1001                         tim_position += offsetof(struct ieee80211_mgmt,
1002                                                  u.beacon.variable);
1003                         tim_position += i;
1004
1005                         dtim_period = ie[i + 3];
1006
1007                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1008                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1009                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1010                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1011                         break;
1012                 }
1013                 i += ie_len + 2;
1014         }
1015         if (!tim_found) {
1016                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1017                               "beacon template packet. AP or IBSS operation "
1018                               "may be broken.\n");
1019         }
1020 }
1021
1022 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1023                                             u16 shm_offset, u16 size,
1024                                             struct ieee80211_rate *rate)
1025 {
1026         struct b43legacy_plcp_hdr4 plcp;
1027         u32 tmp;
1028         __le16 dur;
1029
1030         plcp.data = 0;
1031         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->bitrate);
1032         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1033                                                dev->wl->vif,
1034                                                size,
1035                                                rate);
1036         /* Write PLCP in two parts and timing for packet transfer */
1037         tmp = le32_to_cpu(plcp.data);
1038         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1039                               tmp & 0xFFFF);
1040         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1041                               tmp >> 16);
1042         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1043                               le16_to_cpu(dur));
1044 }
1045
1046 /* Instead of using custom probe response template, this function
1047  * just patches custom beacon template by:
1048  * 1) Changing packet type
1049  * 2) Patching duration field
1050  * 3) Stripping TIM
1051  */
1052 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1053                                                u16 *dest_size,
1054                                                struct ieee80211_rate *rate)
1055 {
1056         const u8 *src_data;
1057         u8 *dest_data;
1058         u16 src_size, elem_size, src_pos, dest_pos;
1059         __le16 dur;
1060         struct ieee80211_hdr *hdr;
1061         size_t ie_start;
1062
1063         src_size = dev->wl->current_beacon->len;
1064         src_data = (const u8 *)dev->wl->current_beacon->data;
1065
1066         /* Get the start offset of the variable IEs in the packet. */
1067         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1068         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1069                                                u.beacon.variable));
1070
1071         if (B43legacy_WARN_ON(src_size < ie_start))
1072                 return NULL;
1073
1074         dest_data = kmalloc(src_size, GFP_ATOMIC);
1075         if (unlikely(!dest_data))
1076                 return NULL;
1077
1078         /* Copy the static data and all Information Elements, except the TIM. */
1079         memcpy(dest_data, src_data, ie_start);
1080         src_pos = ie_start;
1081         dest_pos = ie_start;
1082         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1083                 elem_size = src_data[src_pos + 1] + 2;
1084                 if (src_data[src_pos] == 5) {
1085                         /* This is the TIM. */
1086                         continue;
1087                 }
1088                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1089                 dest_pos += elem_size;
1090         }
1091         *dest_size = dest_pos;
1092         hdr = (struct ieee80211_hdr *)dest_data;
1093
1094         /* Set the frame control. */
1095         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1096                                          IEEE80211_STYPE_PROBE_RESP);
1097         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1098                                                dev->wl->vif,
1099                                                *dest_size,
1100                                                rate);
1101         hdr->duration_id = dur;
1102
1103         return dest_data;
1104 }
1105
1106 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1107                                                 u16 ram_offset,
1108                                                 u16 shm_size_offset,
1109                                                 struct ieee80211_rate *rate)
1110 {
1111         const u8 *probe_resp_data;
1112         u16 size;
1113
1114         size = dev->wl->current_beacon->len;
1115         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1116         if (unlikely(!probe_resp_data))
1117                 return;
1118
1119         /* Looks like PLCP headers plus packet timings are stored for
1120          * all possible basic rates
1121          */
1122         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1123                                         &b43legacy_b_ratetable[0]);
1124         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1125                                         &b43legacy_b_ratetable[1]);
1126         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1127                                         &b43legacy_b_ratetable[2]);
1128         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1129                                         &b43legacy_b_ratetable[3]);
1130
1131         size = min((size_t)size,
1132                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1133         b43legacy_write_template_common(dev, probe_resp_data,
1134                                         size, ram_offset,
1135                                         shm_size_offset, rate->bitrate);
1136         kfree(probe_resp_data);
1137 }
1138
1139 /* Asynchronously update the packet templates in template RAM.
1140  * Locking: Requires wl->irq_lock to be locked. */
1141 static void b43legacy_update_templates(struct b43legacy_wl *wl,
1142                                        struct sk_buff *beacon)
1143 {
1144         /* This is the top half of the ansynchronous beacon update. The bottom
1145          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1146          * sending an invalid beacon. This can happen for example, if the
1147          * firmware transmits a beacon while we are updating it. */
1148
1149         if (wl->current_beacon)
1150                 dev_kfree_skb_any(wl->current_beacon);
1151         wl->current_beacon = beacon;
1152         wl->beacon0_uploaded = 0;
1153         wl->beacon1_uploaded = 0;
1154 }
1155
1156 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1157                                const u8 *ssid, u8 ssid_len)
1158 {
1159         u32 tmp;
1160         u16 i;
1161         u16 len;
1162
1163         len = min((u16)ssid_len, (u16)0x100);
1164         for (i = 0; i < len; i += sizeof(u32)) {
1165                 tmp = (u32)(ssid[i + 0]);
1166                 if (i + 1 < len)
1167                         tmp |= (u32)(ssid[i + 1]) << 8;
1168                 if (i + 2 < len)
1169                         tmp |= (u32)(ssid[i + 2]) << 16;
1170                 if (i + 3 < len)
1171                         tmp |= (u32)(ssid[i + 3]) << 24;
1172                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1173                                       0x380 + i, tmp);
1174         }
1175         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1176                               0x48, len);
1177 }
1178
1179 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1180                                      u16 beacon_int)
1181 {
1182         b43legacy_time_lock(dev);
1183         if (dev->dev->id.revision >= 3)
1184                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1185         else {
1186                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1187                 b43legacy_write16(dev, 0x610, beacon_int);
1188         }
1189         b43legacy_time_unlock(dev);
1190 }
1191
1192 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1193 {
1194         struct b43legacy_wl *wl = dev->wl;
1195         u32 cmd;
1196
1197         if (!b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1198                 return;
1199
1200         /* This is the bottom half of the asynchronous beacon update. */
1201
1202         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1203         if (!(cmd & B43legacy_MACCMD_BEACON0_VALID)) {
1204                 if (!wl->beacon0_uploaded) {
1205                         b43legacy_write_beacon_template(dev, 0x68,
1206                                                         B43legacy_SHM_SH_BTL0,
1207                                                         B43legacy_CCK_RATE_1MB);
1208                         b43legacy_write_probe_resp_template(dev, 0x268,
1209                                                             B43legacy_SHM_SH_PRTLEN,
1210                                                             &__b43legacy_ratetable[3]);
1211                         wl->beacon0_uploaded = 1;
1212                 }
1213                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1214         }
1215         if (!(cmd & B43legacy_MACCMD_BEACON1_VALID)) {
1216                 if (!wl->beacon1_uploaded) {
1217                         b43legacy_write_beacon_template(dev, 0x468,
1218                                                         B43legacy_SHM_SH_BTL1,
1219                                                         B43legacy_CCK_RATE_1MB);
1220                         wl->beacon1_uploaded = 1;
1221                 }
1222                 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1223         }
1224         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1225 }
1226
1227 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1228 {
1229 }
1230
1231 /* Interrupt handler bottom-half */
1232 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1233 {
1234         u32 reason;
1235         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1236         u32 merged_dma_reason = 0;
1237         int i;
1238         unsigned long flags;
1239
1240         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1241
1242         B43legacy_WARN_ON(b43legacy_status(dev) <
1243                           B43legacy_STAT_INITIALIZED);
1244
1245         reason = dev->irq_reason;
1246         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1247                 dma_reason[i] = dev->dma_reason[i];
1248                 merged_dma_reason |= dma_reason[i];
1249         }
1250
1251         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1252                 b43legacyerr(dev->wl, "MAC transmission error\n");
1253
1254         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1255                 b43legacyerr(dev->wl, "PHY transmission error\n");
1256                 rmb();
1257                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1258                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1259                                               "restarting the controller\n");
1260                         b43legacy_controller_restart(dev, "PHY TX errors");
1261                 }
1262         }
1263
1264         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1265                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1266                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1267                         b43legacyerr(dev->wl, "Fatal DMA error: "
1268                                "0x%08X, 0x%08X, 0x%08X, "
1269                                "0x%08X, 0x%08X, 0x%08X\n",
1270                                dma_reason[0], dma_reason[1],
1271                                dma_reason[2], dma_reason[3],
1272                                dma_reason[4], dma_reason[5]);
1273                         b43legacy_controller_restart(dev, "DMA error");
1274                         mmiowb();
1275                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1276                         return;
1277                 }
1278                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1279                         b43legacyerr(dev->wl, "DMA error: "
1280                                "0x%08X, 0x%08X, 0x%08X, "
1281                                "0x%08X, 0x%08X, 0x%08X\n",
1282                                dma_reason[0], dma_reason[1],
1283                                dma_reason[2], dma_reason[3],
1284                                dma_reason[4], dma_reason[5]);
1285         }
1286
1287         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1288                 handle_irq_ucode_debug(dev);
1289         if (reason & B43legacy_IRQ_TBTT_INDI)
1290                 handle_irq_tbtt_indication(dev);
1291         if (reason & B43legacy_IRQ_ATIM_END)
1292                 handle_irq_atim_end(dev);
1293         if (reason & B43legacy_IRQ_BEACON)
1294                 handle_irq_beacon(dev);
1295         if (reason & B43legacy_IRQ_PMQ)
1296                 handle_irq_pmq(dev);
1297         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1298                 ;/*TODO*/
1299         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1300                 handle_irq_noise(dev);
1301
1302         /* Check the DMA reason registers for received data. */
1303         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1304                 if (b43legacy_using_pio(dev))
1305                         b43legacy_pio_rx(dev->pio.queue0);
1306                 else
1307                         b43legacy_dma_rx(dev->dma.rx_ring0);
1308         }
1309         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1310         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1311         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1312                 if (b43legacy_using_pio(dev))
1313                         b43legacy_pio_rx(dev->pio.queue3);
1314                 else
1315                         b43legacy_dma_rx(dev->dma.rx_ring3);
1316         }
1317         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1318         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1319
1320         if (reason & B43legacy_IRQ_TX_OK)
1321                 handle_irq_transmit_status(dev);
1322
1323         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1324         mmiowb();
1325         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1326 }
1327
1328 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1329                                u16 base, int queueidx)
1330 {
1331         u16 rxctl;
1332
1333         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1334         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1335                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1336         else
1337                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1338 }
1339
1340 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1341 {
1342         if (b43legacy_using_pio(dev) &&
1343             (dev->dev->id.revision < 3) &&
1344             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1345                 /* Apply a PIO specific workaround to the dma_reasons */
1346                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1347                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1348                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1349                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1350         }
1351
1352         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1353
1354         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1355                           dev->dma_reason[0]);
1356         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1357                           dev->dma_reason[1]);
1358         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1359                           dev->dma_reason[2]);
1360         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1361                           dev->dma_reason[3]);
1362         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1363                           dev->dma_reason[4]);
1364         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1365                           dev->dma_reason[5]);
1366 }
1367
1368 /* Interrupt handler top-half */
1369 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1370 {
1371         irqreturn_t ret = IRQ_NONE;
1372         struct b43legacy_wldev *dev = dev_id;
1373         u32 reason;
1374
1375         if (!dev)
1376                 return IRQ_NONE;
1377
1378         spin_lock(&dev->wl->irq_lock);
1379
1380         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1381                 goto out;
1382         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1383         if (reason == 0xffffffff) /* shared IRQ */
1384                 goto out;
1385         ret = IRQ_HANDLED;
1386         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1387         if (!reason)
1388                 goto out;
1389
1390         dev->dma_reason[0] = b43legacy_read32(dev,
1391                                               B43legacy_MMIO_DMA0_REASON)
1392                                               & 0x0001DC00;
1393         dev->dma_reason[1] = b43legacy_read32(dev,
1394                                               B43legacy_MMIO_DMA1_REASON)
1395                                               & 0x0000DC00;
1396         dev->dma_reason[2] = b43legacy_read32(dev,
1397                                               B43legacy_MMIO_DMA2_REASON)
1398                                               & 0x0000DC00;
1399         dev->dma_reason[3] = b43legacy_read32(dev,
1400                                               B43legacy_MMIO_DMA3_REASON)
1401                                               & 0x0001DC00;
1402         dev->dma_reason[4] = b43legacy_read32(dev,
1403                                               B43legacy_MMIO_DMA4_REASON)
1404                                               & 0x0000DC00;
1405         dev->dma_reason[5] = b43legacy_read32(dev,
1406                                               B43legacy_MMIO_DMA5_REASON)
1407                                               & 0x0000DC00;
1408
1409         b43legacy_interrupt_ack(dev, reason);
1410         /* disable all IRQs. They are enabled again in the bottom half. */
1411         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1412                                                           B43legacy_IRQ_ALL);
1413         /* save the reason code and call our bottom half. */
1414         dev->irq_reason = reason;
1415         tasklet_schedule(&dev->isr_tasklet);
1416 out:
1417         mmiowb();
1418         spin_unlock(&dev->wl->irq_lock);
1419
1420         return ret;
1421 }
1422
1423 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1424 {
1425         release_firmware(dev->fw.ucode);
1426         dev->fw.ucode = NULL;
1427         release_firmware(dev->fw.pcm);
1428         dev->fw.pcm = NULL;
1429         release_firmware(dev->fw.initvals);
1430         dev->fw.initvals = NULL;
1431         release_firmware(dev->fw.initvals_band);
1432         dev->fw.initvals_band = NULL;
1433 }
1434
1435 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1436 {
1437         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1438                      "Drivers/b43#devicefirmware "
1439                      "and download the correct firmware (version 3).\n");
1440 }
1441
1442 static int do_request_fw(struct b43legacy_wldev *dev,
1443                          const char *name,
1444                          const struct firmware **fw)
1445 {
1446         char path[sizeof(modparam_fwpostfix) + 32];
1447         struct b43legacy_fw_header *hdr;
1448         u32 size;
1449         int err;
1450
1451         if (!name)
1452                 return 0;
1453
1454         snprintf(path, ARRAY_SIZE(path),
1455                  "b43legacy%s/%s.fw",
1456                  modparam_fwpostfix, name);
1457         err = request_firmware(fw, path, dev->dev->dev);
1458         if (err) {
1459                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1460                        "or load failed.\n", path);
1461                 return err;
1462         }
1463         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1464                 goto err_format;
1465         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1466         switch (hdr->type) {
1467         case B43legacy_FW_TYPE_UCODE:
1468         case B43legacy_FW_TYPE_PCM:
1469                 size = be32_to_cpu(hdr->size);
1470                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1471                         goto err_format;
1472                 /* fallthrough */
1473         case B43legacy_FW_TYPE_IV:
1474                 if (hdr->ver != 1)
1475                         goto err_format;
1476                 break;
1477         default:
1478                 goto err_format;
1479         }
1480
1481         return err;
1482
1483 err_format:
1484         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1485         return -EPROTO;
1486 }
1487
1488 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1489 {
1490         struct b43legacy_firmware *fw = &dev->fw;
1491         const u8 rev = dev->dev->id.revision;
1492         const char *filename;
1493         u32 tmshigh;
1494         int err;
1495
1496         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1497         if (!fw->ucode) {
1498                 if (rev == 2)
1499                         filename = "ucode2";
1500                 else if (rev == 4)
1501                         filename = "ucode4";
1502                 else
1503                         filename = "ucode5";
1504                 err = do_request_fw(dev, filename, &fw->ucode);
1505                 if (err)
1506                         goto err_load;
1507         }
1508         if (!fw->pcm) {
1509                 if (rev < 5)
1510                         filename = "pcm4";
1511                 else
1512                         filename = "pcm5";
1513                 err = do_request_fw(dev, filename, &fw->pcm);
1514                 if (err)
1515                         goto err_load;
1516         }
1517         if (!fw->initvals) {
1518                 switch (dev->phy.type) {
1519                 case B43legacy_PHYTYPE_G:
1520                         if ((rev >= 5) && (rev <= 10))
1521                                 filename = "b0g0initvals5";
1522                         else if (rev == 2 || rev == 4)
1523                                 filename = "b0g0initvals2";
1524                         else
1525                                 goto err_no_initvals;
1526                         break;
1527                 default:
1528                         goto err_no_initvals;
1529                 }
1530                 err = do_request_fw(dev, filename, &fw->initvals);
1531                 if (err)
1532                         goto err_load;
1533         }
1534         if (!fw->initvals_band) {
1535                 switch (dev->phy.type) {
1536                 case B43legacy_PHYTYPE_G:
1537                         if ((rev >= 5) && (rev <= 10))
1538                                 filename = "b0g0bsinitvals5";
1539                         else if (rev >= 11)
1540                                 filename = NULL;
1541                         else if (rev == 2 || rev == 4)
1542                                 filename = NULL;
1543                         else
1544                                 goto err_no_initvals;
1545                         break;
1546                 default:
1547                         goto err_no_initvals;
1548                 }
1549                 err = do_request_fw(dev, filename, &fw->initvals_band);
1550                 if (err)
1551                         goto err_load;
1552         }
1553
1554         return 0;
1555
1556 err_load:
1557         b43legacy_print_fw_helptext(dev->wl);
1558         goto error;
1559
1560 err_no_initvals:
1561         err = -ENODEV;
1562         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1563                "core rev %u\n", dev->phy.type, rev);
1564         goto error;
1565
1566 error:
1567         b43legacy_release_firmware(dev);
1568         return err;
1569 }
1570
1571 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1572 {
1573         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1574         const __be32 *data;
1575         unsigned int i;
1576         unsigned int len;
1577         u16 fwrev;
1578         u16 fwpatch;
1579         u16 fwdate;
1580         u16 fwtime;
1581         u32 tmp, macctl;
1582         int err = 0;
1583
1584         /* Jump the microcode PSM to offset 0 */
1585         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1586         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1587         macctl |= B43legacy_MACCTL_PSM_JMP0;
1588         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1589         /* Zero out all microcode PSM registers and shared memory. */
1590         for (i = 0; i < 64; i++)
1591                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1592         for (i = 0; i < 4096; i += 2)
1593                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1594
1595         /* Upload Microcode. */
1596         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1597         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1598         b43legacy_shm_control_word(dev,
1599                                    B43legacy_SHM_UCODE |
1600                                    B43legacy_SHM_AUTOINC_W,
1601                                    0x0000);
1602         for (i = 0; i < len; i++) {
1603                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1604                                     be32_to_cpu(data[i]));
1605                 udelay(10);
1606         }
1607
1608         if (dev->fw.pcm) {
1609                 /* Upload PCM data. */
1610                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1611                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1612                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1613                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1614                 /* No need for autoinc bit in SHM_HW */
1615                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1616                 for (i = 0; i < len; i++) {
1617                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1618                                           be32_to_cpu(data[i]));
1619                         udelay(10);
1620                 }
1621         }
1622
1623         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1624                           B43legacy_IRQ_ALL);
1625
1626         /* Start the microcode PSM */
1627         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1628         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1629         macctl |= B43legacy_MACCTL_PSM_RUN;
1630         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1631
1632         /* Wait for the microcode to load and respond */
1633         i = 0;
1634         while (1) {
1635                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1636                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1637                         break;
1638                 i++;
1639                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1640                         b43legacyerr(dev->wl, "Microcode not responding\n");
1641                         b43legacy_print_fw_helptext(dev->wl);
1642                         err = -ENODEV;
1643                         goto error;
1644                 }
1645                 msleep_interruptible(50);
1646                 if (signal_pending(current)) {
1647                         err = -EINTR;
1648                         goto error;
1649                 }
1650         }
1651         /* dummy read follows */
1652         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1653
1654         /* Get and check the revisions. */
1655         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1656                                      B43legacy_SHM_SH_UCODEREV);
1657         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1658                                        B43legacy_SHM_SH_UCODEPATCH);
1659         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1660                                       B43legacy_SHM_SH_UCODEDATE);
1661         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1662                                       B43legacy_SHM_SH_UCODETIME);
1663
1664         if (fwrev > 0x128) {
1665                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1666                              " Only firmware from binary drivers version 3.x"
1667                              " is supported. You must change your firmware"
1668                              " files.\n");
1669                 b43legacy_print_fw_helptext(dev->wl);
1670                 err = -EOPNOTSUPP;
1671                 goto error;
1672         }
1673         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1674                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1675                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1676                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1677                       fwtime & 0x1F);
1678
1679         dev->fw.rev = fwrev;
1680         dev->fw.patch = fwpatch;
1681
1682         return 0;
1683
1684 error:
1685         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1686         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1687         macctl |= B43legacy_MACCTL_PSM_JMP0;
1688         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1689
1690         return err;
1691 }
1692
1693 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1694                                     const struct b43legacy_iv *ivals,
1695                                     size_t count,
1696                                     size_t array_size)
1697 {
1698         const struct b43legacy_iv *iv;
1699         u16 offset;
1700         size_t i;
1701         bool bit32;
1702
1703         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1704         iv = ivals;
1705         for (i = 0; i < count; i++) {
1706                 if (array_size < sizeof(iv->offset_size))
1707                         goto err_format;
1708                 array_size -= sizeof(iv->offset_size);
1709                 offset = be16_to_cpu(iv->offset_size);
1710                 bit32 = !!(offset & B43legacy_IV_32BIT);
1711                 offset &= B43legacy_IV_OFFSET_MASK;
1712                 if (offset >= 0x1000)
1713                         goto err_format;
1714                 if (bit32) {
1715                         u32 value;
1716
1717                         if (array_size < sizeof(iv->data.d32))
1718                                 goto err_format;
1719                         array_size -= sizeof(iv->data.d32);
1720
1721                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1722                         b43legacy_write32(dev, offset, value);
1723
1724                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1725                                                         sizeof(__be16) +
1726                                                         sizeof(__be32));
1727                 } else {
1728                         u16 value;
1729
1730                         if (array_size < sizeof(iv->data.d16))
1731                                 goto err_format;
1732                         array_size -= sizeof(iv->data.d16);
1733
1734                         value = be16_to_cpu(iv->data.d16);
1735                         b43legacy_write16(dev, offset, value);
1736
1737                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1738                                                         sizeof(__be16) +
1739                                                         sizeof(__be16));
1740                 }
1741         }
1742         if (array_size)
1743                 goto err_format;
1744
1745         return 0;
1746
1747 err_format:
1748         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1749         b43legacy_print_fw_helptext(dev->wl);
1750
1751         return -EPROTO;
1752 }
1753
1754 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1755 {
1756         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1757         const struct b43legacy_fw_header *hdr;
1758         struct b43legacy_firmware *fw = &dev->fw;
1759         const struct b43legacy_iv *ivals;
1760         size_t count;
1761         int err;
1762
1763         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1764         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1765         count = be32_to_cpu(hdr->size);
1766         err = b43legacy_write_initvals(dev, ivals, count,
1767                                  fw->initvals->size - hdr_len);
1768         if (err)
1769                 goto out;
1770         if (fw->initvals_band) {
1771                 hdr = (const struct b43legacy_fw_header *)
1772                       (fw->initvals_band->data);
1773                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1774                         + hdr_len);
1775                 count = be32_to_cpu(hdr->size);
1776                 err = b43legacy_write_initvals(dev, ivals, count,
1777                                          fw->initvals_band->size - hdr_len);
1778                 if (err)
1779                         goto out;
1780         }
1781 out:
1782
1783         return err;
1784 }
1785
1786 /* Initialize the GPIOs
1787  * http://bcm-specs.sipsolutions.net/GPIO
1788  */
1789 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1790 {
1791         struct ssb_bus *bus = dev->dev->bus;
1792         struct ssb_device *gpiodev, *pcidev = NULL;
1793         u32 mask;
1794         u32 set;
1795
1796         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1797                           b43legacy_read32(dev,
1798                           B43legacy_MMIO_MACCTL)
1799                           & 0xFFFF3FFF);
1800
1801         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1802                           b43legacy_read16(dev,
1803                           B43legacy_MMIO_GPIO_MASK)
1804                           | 0x000F);
1805
1806         mask = 0x0000001F;
1807         set = 0x0000000F;
1808         if (dev->dev->bus->chip_id == 0x4301) {
1809                 mask |= 0x0060;
1810                 set |= 0x0060;
1811         }
1812         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1813                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1814                                   b43legacy_read16(dev,
1815                                   B43legacy_MMIO_GPIO_MASK)
1816                                   | 0x0200);
1817                 mask |= 0x0200;
1818                 set |= 0x0200;
1819         }
1820         if (dev->dev->id.revision >= 2)
1821                 mask  |= 0x0010; /* FIXME: This is redundant. */
1822
1823 #ifdef CONFIG_SSB_DRIVER_PCICORE
1824         pcidev = bus->pcicore.dev;
1825 #endif
1826         gpiodev = bus->chipco.dev ? : pcidev;
1827         if (!gpiodev)
1828                 return 0;
1829         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1830                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1831                      & mask) | set);
1832
1833         return 0;
1834 }
1835
1836 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1837 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1838 {
1839         struct ssb_bus *bus = dev->dev->bus;
1840         struct ssb_device *gpiodev, *pcidev = NULL;
1841
1842 #ifdef CONFIG_SSB_DRIVER_PCICORE
1843         pcidev = bus->pcicore.dev;
1844 #endif
1845         gpiodev = bus->chipco.dev ? : pcidev;
1846         if (!gpiodev)
1847                 return;
1848         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1849 }
1850
1851 /* http://bcm-specs.sipsolutions.net/EnableMac */
1852 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1853 {
1854         dev->mac_suspended--;
1855         B43legacy_WARN_ON(dev->mac_suspended < 0);
1856         B43legacy_WARN_ON(irqs_disabled());
1857         if (dev->mac_suspended == 0) {
1858                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1859                                   b43legacy_read32(dev,
1860                                   B43legacy_MMIO_MACCTL)
1861                                   | B43legacy_MACCTL_ENABLED);
1862                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1863                                   B43legacy_IRQ_MAC_SUSPENDED);
1864                 /* the next two are dummy reads */
1865                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1866                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1867                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1868
1869                 /* Re-enable IRQs. */
1870                 spin_lock_irq(&dev->wl->irq_lock);
1871                 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1872                 spin_unlock_irq(&dev->wl->irq_lock);
1873         }
1874 }
1875
1876 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1877 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1878 {
1879         int i;
1880         u32 tmp;
1881
1882         might_sleep();
1883         B43legacy_WARN_ON(irqs_disabled());
1884         B43legacy_WARN_ON(dev->mac_suspended < 0);
1885
1886         if (dev->mac_suspended == 0) {
1887                 /* Mask IRQs before suspending MAC. Otherwise
1888                  * the MAC stays busy and won't suspend. */
1889                 spin_lock_irq(&dev->wl->irq_lock);
1890                 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1891                 spin_unlock_irq(&dev->wl->irq_lock);
1892                 b43legacy_synchronize_irq(dev);
1893                 dev->irq_savedstate = tmp;
1894
1895                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1896                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1897                                   b43legacy_read32(dev,
1898                                   B43legacy_MMIO_MACCTL)
1899                                   & ~B43legacy_MACCTL_ENABLED);
1900                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1901                 for (i = 40; i; i--) {
1902                         tmp = b43legacy_read32(dev,
1903                                                B43legacy_MMIO_GEN_IRQ_REASON);
1904                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1905                                 goto out;
1906                         msleep(1);
1907                 }
1908                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1909         }
1910 out:
1911         dev->mac_suspended++;
1912 }
1913
1914 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1915 {
1916         struct b43legacy_wl *wl = dev->wl;
1917         u32 ctl;
1918         u16 cfp_pretbtt;
1919
1920         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1921         /* Reset status to STA infrastructure mode. */
1922         ctl &= ~B43legacy_MACCTL_AP;
1923         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1924         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1925         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1926         ctl &= ~B43legacy_MACCTL_PROMISC;
1927         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1928         ctl |= B43legacy_MACCTL_INFRA;
1929
1930         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1931                 ctl |= B43legacy_MACCTL_AP;
1932         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1933                 ctl &= ~B43legacy_MACCTL_INFRA;
1934
1935         if (wl->filter_flags & FIF_CONTROL)
1936                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1937         if (wl->filter_flags & FIF_FCSFAIL)
1938                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1939         if (wl->filter_flags & FIF_PLCPFAIL)
1940                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1941         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1942                 ctl |= B43legacy_MACCTL_PROMISC;
1943         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1944                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1945
1946         /* Workaround: On old hardware the HW-MAC-address-filter
1947          * doesn't work properly, so always run promisc in filter
1948          * it in software. */
1949         if (dev->dev->id.revision <= 4)
1950                 ctl |= B43legacy_MACCTL_PROMISC;
1951
1952         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1953
1954         cfp_pretbtt = 2;
1955         if ((ctl & B43legacy_MACCTL_INFRA) &&
1956             !(ctl & B43legacy_MACCTL_AP)) {
1957                 if (dev->dev->bus->chip_id == 0x4306 &&
1958                     dev->dev->bus->chip_rev == 3)
1959                         cfp_pretbtt = 100;
1960                 else
1961                         cfp_pretbtt = 50;
1962         }
1963         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1964 }
1965
1966 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1967                                         u16 rate,
1968                                         int is_ofdm)
1969 {
1970         u16 offset;
1971
1972         if (is_ofdm) {
1973                 offset = 0x480;
1974                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1975         } else {
1976                 offset = 0x4C0;
1977                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1978         }
1979         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1980                               b43legacy_shm_read16(dev,
1981                               B43legacy_SHM_SHARED, offset));
1982 }
1983
1984 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1985 {
1986         switch (dev->phy.type) {
1987         case B43legacy_PHYTYPE_G:
1988                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1989                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1990                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1991                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1992                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1993                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1994                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1995                 /* fallthrough */
1996         case B43legacy_PHYTYPE_B:
1997                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1998                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1999                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2000                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2001                 break;
2002         default:
2003                 B43legacy_BUG_ON(1);
2004         }
2005 }
2006
2007 /* Set the TX-Antenna for management frames sent by firmware. */
2008 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2009                                           int antenna)
2010 {
2011         u16 ant = 0;
2012         u16 tmp;
2013
2014         switch (antenna) {
2015         case B43legacy_ANTENNA0:
2016                 ant |= B43legacy_TX4_PHY_ANT0;
2017                 break;
2018         case B43legacy_ANTENNA1:
2019                 ant |= B43legacy_TX4_PHY_ANT1;
2020                 break;
2021         case B43legacy_ANTENNA_AUTO:
2022                 ant |= B43legacy_TX4_PHY_ANTLAST;
2023                 break;
2024         default:
2025                 B43legacy_BUG_ON(1);
2026         }
2027
2028         /* FIXME We also need to set the other flags of the PHY control
2029          * field somewhere. */
2030
2031         /* For Beacons */
2032         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2033                                    B43legacy_SHM_SH_BEACPHYCTL);
2034         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2035         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2036                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2037         /* For ACK/CTS */
2038         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2039                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2040         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2041         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2042                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2043         /* For Probe Resposes */
2044         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2045                                    B43legacy_SHM_SH_PRPHYCTL);
2046         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2047         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2048                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2049 }
2050
2051 /* This is the opposite of b43legacy_chip_init() */
2052 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2053 {
2054         b43legacy_radio_turn_off(dev, 1);
2055         b43legacy_gpio_cleanup(dev);
2056         /* firmware is released later */
2057 }
2058
2059 /* Initialize the chip
2060  * http://bcm-specs.sipsolutions.net/ChipInit
2061  */
2062 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2063 {
2064         struct b43legacy_phy *phy = &dev->phy;
2065         int err;
2066         int tmp;
2067         u32 value32, macctl;
2068         u16 value16;
2069
2070         /* Initialize the MAC control */
2071         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2072         if (dev->phy.gmode)
2073                 macctl |= B43legacy_MACCTL_GMODE;
2074         macctl |= B43legacy_MACCTL_INFRA;
2075         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2076
2077         err = b43legacy_request_firmware(dev);
2078         if (err)
2079                 goto out;
2080         err = b43legacy_upload_microcode(dev);
2081         if (err)
2082                 goto out; /* firmware is released later */
2083
2084         err = b43legacy_gpio_init(dev);
2085         if (err)
2086                 goto out; /* firmware is released later */
2087
2088         err = b43legacy_upload_initvals(dev);
2089         if (err)
2090                 goto err_gpio_clean;
2091         b43legacy_radio_turn_on(dev);
2092
2093         b43legacy_write16(dev, 0x03E6, 0x0000);
2094         err = b43legacy_phy_init(dev);
2095         if (err)
2096                 goto err_radio_off;
2097
2098         /* Select initial Interference Mitigation. */
2099         tmp = phy->interfmode;
2100         phy->interfmode = B43legacy_INTERFMODE_NONE;
2101         b43legacy_radio_set_interference_mitigation(dev, tmp);
2102
2103         b43legacy_phy_set_antenna_diversity(dev);
2104         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2105
2106         if (phy->type == B43legacy_PHYTYPE_B) {
2107                 value16 = b43legacy_read16(dev, 0x005E);
2108                 value16 |= 0x0004;
2109                 b43legacy_write16(dev, 0x005E, value16);
2110         }
2111         b43legacy_write32(dev, 0x0100, 0x01000000);
2112         if (dev->dev->id.revision < 5)
2113                 b43legacy_write32(dev, 0x010C, 0x01000000);
2114
2115         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2116         value32 &= ~B43legacy_MACCTL_INFRA;
2117         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2118         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2119         value32 |= B43legacy_MACCTL_INFRA;
2120         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2121
2122         if (b43legacy_using_pio(dev)) {
2123                 b43legacy_write32(dev, 0x0210, 0x00000100);
2124                 b43legacy_write32(dev, 0x0230, 0x00000100);
2125                 b43legacy_write32(dev, 0x0250, 0x00000100);
2126                 b43legacy_write32(dev, 0x0270, 0x00000100);
2127                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2128                                       0x0000);
2129         }
2130
2131         /* Probe Response Timeout value */
2132         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2133         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2134
2135         /* Initially set the wireless operation mode. */
2136         b43legacy_adjust_opmode(dev);
2137
2138         if (dev->dev->id.revision < 3) {
2139                 b43legacy_write16(dev, 0x060E, 0x0000);
2140                 b43legacy_write16(dev, 0x0610, 0x8000);
2141                 b43legacy_write16(dev, 0x0604, 0x0000);
2142                 b43legacy_write16(dev, 0x0606, 0x0200);
2143         } else {
2144                 b43legacy_write32(dev, 0x0188, 0x80000000);
2145                 b43legacy_write32(dev, 0x018C, 0x02000000);
2146         }
2147         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2148         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2149         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2150         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2151         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2152         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2153         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2154
2155         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2156         value32 |= 0x00100000;
2157         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2158
2159         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2160                           dev->dev->bus->chipco.fast_pwrup_delay);
2161
2162         /* PHY TX errors counter. */
2163         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2164
2165         B43legacy_WARN_ON(err != 0);
2166         b43legacydbg(dev->wl, "Chip initialized\n");
2167 out:
2168         return err;
2169
2170 err_radio_off:
2171         b43legacy_radio_turn_off(dev, 1);
2172 err_gpio_clean:
2173         b43legacy_gpio_cleanup(dev);
2174         goto out;
2175 }
2176
2177 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2178 {
2179         struct b43legacy_phy *phy = &dev->phy;
2180
2181         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2182                 return;
2183
2184         b43legacy_mac_suspend(dev);
2185         b43legacy_phy_lo_g_measure(dev);
2186         b43legacy_mac_enable(dev);
2187 }
2188
2189 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2190 {
2191         b43legacy_phy_lo_mark_all_unused(dev);
2192         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2193                 b43legacy_mac_suspend(dev);
2194                 b43legacy_calc_nrssi_slope(dev);
2195                 b43legacy_mac_enable(dev);
2196         }
2197 }
2198
2199 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2200 {
2201         /* Update device statistics. */
2202         b43legacy_calculate_link_quality(dev);
2203 }
2204
2205 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2206 {
2207         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2208
2209         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2210         wmb();
2211 }
2212
2213 static void do_periodic_work(struct b43legacy_wldev *dev)
2214 {
2215         unsigned int state;
2216
2217         state = dev->periodic_state;
2218         if (state % 8 == 0)
2219                 b43legacy_periodic_every120sec(dev);
2220         if (state % 4 == 0)
2221                 b43legacy_periodic_every60sec(dev);
2222         if (state % 2 == 0)
2223                 b43legacy_periodic_every30sec(dev);
2224         b43legacy_periodic_every15sec(dev);
2225 }
2226
2227 /* Periodic work locking policy:
2228  *      The whole periodic work handler is protected by
2229  *      wl->mutex. If another lock is needed somewhere in the
2230  *      pwork callchain, it's aquired in-place, where it's needed.
2231  */
2232 static void b43legacy_periodic_work_handler(struct work_struct *work)
2233 {
2234         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2235                                              periodic_work.work);
2236         struct b43legacy_wl *wl = dev->wl;
2237         unsigned long delay;
2238
2239         mutex_lock(&wl->mutex);
2240
2241         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2242                 goto out;
2243         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2244                 goto out_requeue;
2245
2246         do_periodic_work(dev);
2247
2248         dev->periodic_state++;
2249 out_requeue:
2250         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2251                 delay = msecs_to_jiffies(50);
2252         else
2253                 delay = round_jiffies_relative(HZ * 15);
2254         queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2255 out:
2256         mutex_unlock(&wl->mutex);
2257 }
2258
2259 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2260 {
2261         struct delayed_work *work = &dev->periodic_work;
2262
2263         dev->periodic_state = 0;
2264         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2265         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2266 }
2267
2268 /* Validate access to the chip (SHM) */
2269 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2270 {
2271         u32 value;
2272         u32 shm_backup;
2273
2274         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2275         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2276         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2277                                  0xAA5555AA)
2278                 goto error;
2279         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2280         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2281                                  0x55AAAA55)
2282                 goto error;
2283         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2284
2285         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2286         if ((value | B43legacy_MACCTL_GMODE) !=
2287             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2288                 goto error;
2289
2290         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2291         if (value)
2292                 goto error;
2293
2294         return 0;
2295 error:
2296         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2297         return -ENODEV;
2298 }
2299
2300 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2301 {
2302         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2303         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2304         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2305                                         0x0056);
2306         /* KTP is a word address, but we address SHM bytewise.
2307          * So multiply by two.
2308          */
2309         dev->ktp *= 2;
2310         if (dev->dev->id.revision >= 5)
2311                 /* Number of RCMTA address slots */
2312                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2313                                   dev->max_nr_keys - 8);
2314 }
2315
2316 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2317 {
2318         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2319         unsigned long flags;
2320
2321         /* Don't take wl->mutex here, as it could deadlock with
2322          * hwrng internal locking. It's not needed to take
2323          * wl->mutex here, anyway. */
2324
2325         spin_lock_irqsave(&wl->irq_lock, flags);
2326         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2327         spin_unlock_irqrestore(&wl->irq_lock, flags);
2328
2329         return (sizeof(u16));
2330 }
2331
2332 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2333 {
2334         if (wl->rng_initialized)
2335                 hwrng_unregister(&wl->rng);
2336 }
2337
2338 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2339 {
2340         int err;
2341
2342         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2343                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2344         wl->rng.name = wl->rng_name;
2345         wl->rng.data_read = b43legacy_rng_read;
2346         wl->rng.priv = (unsigned long)wl;
2347         wl->rng_initialized = 1;
2348         err = hwrng_register(&wl->rng);
2349         if (err) {
2350                 wl->rng_initialized = 0;
2351                 b43legacyerr(wl, "Failed to register the random "
2352                        "number generator (%d)\n", err);
2353         }
2354
2355         return err;
2356 }
2357
2358 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2359                            struct sk_buff *skb,
2360                            struct ieee80211_tx_control *ctl)
2361 {
2362         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2363         struct b43legacy_wldev *dev = wl->current_dev;
2364         int err = -ENODEV;
2365         unsigned long flags;
2366
2367         if (unlikely(!dev))
2368                 goto out;
2369         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2370                 goto out;
2371         /* DMA-TX is done without a global lock. */
2372         if (b43legacy_using_pio(dev)) {
2373                 spin_lock_irqsave(&wl->irq_lock, flags);
2374                 err = b43legacy_pio_tx(dev, skb, ctl);
2375                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2376         } else
2377                 err = b43legacy_dma_tx(dev, skb, ctl);
2378 out:
2379         if (unlikely(err))
2380                 return NETDEV_TX_BUSY;
2381         return NETDEV_TX_OK;
2382 }
2383
2384 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2385                                 int queue,
2386                                 const struct ieee80211_tx_queue_params *params)
2387 {
2388         return 0;
2389 }
2390
2391 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2392                                      struct ieee80211_tx_queue_stats *stats)
2393 {
2394         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2395         struct b43legacy_wldev *dev = wl->current_dev;
2396         unsigned long flags;
2397         int err = -ENODEV;
2398
2399         if (!dev)
2400                 goto out;
2401         spin_lock_irqsave(&wl->irq_lock, flags);
2402         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2403                 if (b43legacy_using_pio(dev))
2404                         b43legacy_pio_get_tx_stats(dev, stats);
2405                 else
2406                         b43legacy_dma_get_tx_stats(dev, stats);
2407                 err = 0;
2408         }
2409         spin_unlock_irqrestore(&wl->irq_lock, flags);
2410 out:
2411         return err;
2412 }
2413
2414 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2415                                   struct ieee80211_low_level_stats *stats)
2416 {
2417         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2418         unsigned long flags;
2419
2420         spin_lock_irqsave(&wl->irq_lock, flags);
2421         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2422         spin_unlock_irqrestore(&wl->irq_lock, flags);
2423
2424         return 0;
2425 }
2426
2427 static const char *phymode_to_string(unsigned int phymode)
2428 {
2429         switch (phymode) {
2430         case B43legacy_PHYMODE_B:
2431                 return "B";
2432         case B43legacy_PHYMODE_G:
2433                 return "G";
2434         default:
2435                 B43legacy_BUG_ON(1);
2436         }
2437         return "";
2438 }
2439
2440 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2441                                   unsigned int phymode,
2442                                   struct b43legacy_wldev **dev,
2443                                   bool *gmode)
2444 {
2445         struct b43legacy_wldev *d;
2446
2447         list_for_each_entry(d, &wl->devlist, list) {
2448                 if (d->phy.possible_phymodes & phymode) {
2449                         /* Ok, this device supports the PHY-mode.
2450                          * Set the gmode bit. */
2451                         *gmode = 1;
2452                         *dev = d;
2453
2454                         return 0;
2455                 }
2456         }
2457
2458         return -ESRCH;
2459 }
2460
2461 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2462 {
2463         struct ssb_device *sdev = dev->dev;
2464         u32 tmslow;
2465
2466         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2467         tmslow &= ~B43legacy_TMSLOW_GMODE;
2468         tmslow |= B43legacy_TMSLOW_PHYRESET;
2469         tmslow |= SSB_TMSLOW_FGC;
2470         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2471         msleep(1);
2472
2473         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2474         tmslow &= ~SSB_TMSLOW_FGC;
2475         tmslow |= B43legacy_TMSLOW_PHYRESET;
2476         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2477         msleep(1);
2478 }
2479
2480 /* Expects wl->mutex locked */
2481 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2482                                       unsigned int new_mode)
2483 {
2484         struct b43legacy_wldev *up_dev;
2485         struct b43legacy_wldev *down_dev;
2486         int err;
2487         bool gmode = 0;
2488         int prev_status;
2489
2490         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2491         if (err) {
2492                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2493                        phymode_to_string(new_mode));
2494                 return err;
2495         }
2496         if ((up_dev == wl->current_dev) &&
2497             (!!wl->current_dev->phy.gmode == !!gmode))
2498                 /* This device is already running. */
2499                 return 0;
2500         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2501                phymode_to_string(new_mode));
2502         down_dev = wl->current_dev;
2503
2504         prev_status = b43legacy_status(down_dev);
2505         /* Shutdown the currently running core. */
2506         if (prev_status >= B43legacy_STAT_STARTED)
2507                 b43legacy_wireless_core_stop(down_dev);
2508         if (prev_status >= B43legacy_STAT_INITIALIZED)
2509                 b43legacy_wireless_core_exit(down_dev);
2510
2511         if (down_dev != up_dev)
2512                 /* We switch to a different core, so we put PHY into
2513                  * RESET on the old core. */
2514                 b43legacy_put_phy_into_reset(down_dev);
2515
2516         /* Now start the new core. */
2517         up_dev->phy.gmode = gmode;
2518         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2519                 err = b43legacy_wireless_core_init(up_dev);
2520                 if (err) {
2521                         b43legacyerr(wl, "Fatal: Could not initialize device"
2522                                      " for newly selected %s-PHY mode\n",
2523                                      phymode_to_string(new_mode));
2524                         goto init_failure;
2525                 }
2526         }
2527         if (prev_status >= B43legacy_STAT_STARTED) {
2528                 err = b43legacy_wireless_core_start(up_dev);
2529                 if (err) {
2530                         b43legacyerr(wl, "Fatal: Coult not start device for "
2531                                "newly selected %s-PHY mode\n",
2532                                phymode_to_string(new_mode));
2533                         b43legacy_wireless_core_exit(up_dev);
2534                         goto init_failure;
2535                 }
2536         }
2537         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2538
2539         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2540
2541         wl->current_dev = up_dev;
2542
2543         return 0;
2544 init_failure:
2545         /* Whoops, failed to init the new core. No core is operating now. */
2546         wl->current_dev = NULL;
2547         return err;
2548 }
2549
2550 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2551 {
2552         switch (antenna) {
2553         case 0: /* default/diversity */
2554                 return B43legacy_ANTENNA_DEFAULT;
2555         case 1: /* Antenna 0 */
2556                 return B43legacy_ANTENNA0;
2557         case 2: /* Antenna 1 */
2558                 return B43legacy_ANTENNA1;
2559         default:
2560                 return B43legacy_ANTENNA_DEFAULT;
2561         }
2562 }
2563
2564 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2565                                    struct ieee80211_conf *conf)
2566 {
2567         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2568         struct b43legacy_wldev *dev;
2569         struct b43legacy_phy *phy;
2570         unsigned long flags;
2571         unsigned int new_phymode = 0xFFFF;
2572         int antenna_tx;
2573         int antenna_rx;
2574         int err = 0;
2575         u32 savedirqs;
2576
2577         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2578         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2579
2580         mutex_lock(&wl->mutex);
2581         dev = wl->current_dev;
2582         phy = &dev->phy;
2583
2584         /* Switch the PHY mode (if necessary). */
2585         switch (conf->channel->band) {
2586         case IEEE80211_BAND_2GHZ:
2587                 if (phy->type == B43legacy_PHYTYPE_B)
2588                         new_phymode = B43legacy_PHYMODE_B;
2589                 else
2590                         new_phymode = B43legacy_PHYMODE_G;
2591                 break;
2592         default:
2593                 B43legacy_WARN_ON(1);
2594         }
2595         err = b43legacy_switch_phymode(wl, new_phymode);
2596         if (err)
2597                 goto out_unlock_mutex;
2598
2599         /* Disable IRQs while reconfiguring the device.
2600          * This makes it possible to drop the spinlock throughout
2601          * the reconfiguration process. */
2602         spin_lock_irqsave(&wl->irq_lock, flags);
2603         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2604                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2605                 goto out_unlock_mutex;
2606         }
2607         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2608         spin_unlock_irqrestore(&wl->irq_lock, flags);
2609         b43legacy_synchronize_irq(dev);
2610
2611         /* Switch to the requested channel.
2612          * The firmware takes care of races with the TX handler. */
2613         if (conf->channel->hw_value != phy->channel)
2614                 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2615
2616         /* Enable/Disable ShortSlot timing. */
2617         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2618              != dev->short_slot) {
2619                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2620                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2621                         b43legacy_short_slot_timing_enable(dev);
2622                 else
2623                         b43legacy_short_slot_timing_disable(dev);
2624         }
2625
2626         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2627
2628         /* Adjust the desired TX power level. */
2629         if (conf->power_level != 0) {
2630                 if (conf->power_level != phy->power_level) {
2631                         phy->power_level = conf->power_level;
2632                         b43legacy_phy_xmitpower(dev);
2633                 }
2634         }
2635
2636         /* Antennas for RX and management frame TX. */
2637         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2638
2639         /* Update templates for AP mode. */
2640         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2641                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2642
2643
2644         if (!!conf->radio_enabled != phy->radio_on) {
2645                 if (conf->radio_enabled) {
2646                         b43legacy_radio_turn_on(dev);
2647                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2648                         if (!dev->radio_hw_enable)
2649                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2650                                               " button still turns the radio"
2651                                               " physically off. Press the"
2652                                               " button to turn it on.\n");
2653                 } else {
2654                         b43legacy_radio_turn_off(dev, 0);
2655                         b43legacyinfo(dev->wl, "Radio turned off by"
2656                                       " software\n");
2657                 }
2658         }
2659
2660         spin_lock_irqsave(&wl->irq_lock, flags);
2661         b43legacy_interrupt_enable(dev, savedirqs);
2662         mmiowb();
2663         spin_unlock_irqrestore(&wl->irq_lock, flags);
2664 out_unlock_mutex:
2665         mutex_unlock(&wl->mutex);
2666
2667         return err;
2668 }
2669
2670 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2671                                           unsigned int changed,
2672                                           unsigned int *fflags,
2673                                           int mc_count,
2674                                           struct dev_addr_list *mc_list)
2675 {
2676         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2677         struct b43legacy_wldev *dev = wl->current_dev;
2678         unsigned long flags;
2679
2680         if (!dev) {
2681                 *fflags = 0;
2682                 return;
2683         }
2684
2685         spin_lock_irqsave(&wl->irq_lock, flags);
2686         *fflags &= FIF_PROMISC_IN_BSS |
2687                   FIF_ALLMULTI |
2688                   FIF_FCSFAIL |
2689                   FIF_PLCPFAIL |
2690                   FIF_CONTROL |
2691                   FIF_OTHER_BSS |
2692                   FIF_BCN_PRBRESP_PROMISC;
2693
2694         changed &= FIF_PROMISC_IN_BSS |
2695                    FIF_ALLMULTI |
2696                    FIF_FCSFAIL |
2697                    FIF_PLCPFAIL |
2698                    FIF_CONTROL |
2699                    FIF_OTHER_BSS |
2700                    FIF_BCN_PRBRESP_PROMISC;
2701
2702         wl->filter_flags = *fflags;
2703
2704         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2705                 b43legacy_adjust_opmode(dev);
2706         spin_unlock_irqrestore(&wl->irq_lock, flags);
2707 }
2708
2709 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2710                                          struct ieee80211_vif *vif,
2711                                          struct ieee80211_if_conf *conf)
2712 {
2713         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2714         struct b43legacy_wldev *dev = wl->current_dev;
2715         unsigned long flags;
2716
2717         if (!dev)
2718                 return -ENODEV;
2719         mutex_lock(&wl->mutex);
2720         spin_lock_irqsave(&wl->irq_lock, flags);
2721         B43legacy_WARN_ON(wl->vif != vif);
2722         if (conf->bssid)
2723                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2724         else
2725                 memset(wl->bssid, 0, ETH_ALEN);
2726         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2727                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2728                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2729                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2730                         if (conf->beacon)
2731                                 b43legacy_update_templates(wl, conf->beacon);
2732                 }
2733                 b43legacy_write_mac_bssid_templates(dev);
2734         }
2735         spin_unlock_irqrestore(&wl->irq_lock, flags);
2736         mutex_unlock(&wl->mutex);
2737
2738         return 0;
2739 }
2740
2741 /* Locking: wl->mutex */
2742 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2743 {
2744         struct b43legacy_wl *wl = dev->wl;
2745         unsigned long flags;
2746
2747         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2748                 return;
2749
2750         /* Disable and sync interrupts. We must do this before than
2751          * setting the status to INITIALIZED, as the interrupt handler
2752          * won't care about IRQs then. */
2753         spin_lock_irqsave(&wl->irq_lock, flags);
2754         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2755                                                           B43legacy_IRQ_ALL);
2756         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2757         spin_unlock_irqrestore(&wl->irq_lock, flags);
2758         b43legacy_synchronize_irq(dev);
2759
2760         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2761
2762         mutex_unlock(&wl->mutex);
2763         /* Must unlock as it would otherwise deadlock. No races here.
2764          * Cancel the possibly running self-rearming periodic work. */
2765         cancel_delayed_work_sync(&dev->periodic_work);
2766         mutex_lock(&wl->mutex);
2767
2768         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2769
2770         b43legacy_mac_suspend(dev);
2771         free_irq(dev->dev->irq, dev);
2772         b43legacydbg(wl, "Wireless interface stopped\n");
2773 }
2774
2775 /* Locking: wl->mutex */
2776 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2777 {
2778         int err;
2779
2780         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2781
2782         drain_txstatus_queue(dev);
2783         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2784                           IRQF_SHARED, KBUILD_MODNAME, dev);
2785         if (err) {
2786                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2787                        dev->dev->irq);
2788                 goto out;
2789         }
2790         /* We are ready to run. */
2791         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2792
2793         /* Start data flow (TX/RX) */
2794         b43legacy_mac_enable(dev);
2795         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2796         ieee80211_start_queues(dev->wl->hw);
2797
2798         /* Start maintenance work */
2799         b43legacy_periodic_tasks_setup(dev);
2800
2801         b43legacydbg(dev->wl, "Wireless interface started\n");
2802 out:
2803         return err;
2804 }
2805
2806 /* Get PHY and RADIO versioning numbers */
2807 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2808 {
2809         struct b43legacy_phy *phy = &dev->phy;
2810         u32 tmp;
2811         u8 analog_type;
2812         u8 phy_type;
2813         u8 phy_rev;
2814         u16 radio_manuf;
2815         u16 radio_ver;
2816         u16 radio_rev;
2817         int unsupported = 0;
2818
2819         /* Get PHY versioning */
2820         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2821         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2822                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2823         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2824         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2825         switch (phy_type) {
2826         case B43legacy_PHYTYPE_B:
2827                 if (phy_rev != 2 && phy_rev != 4
2828                     && phy_rev != 6 && phy_rev != 7)
2829                         unsupported = 1;
2830                 break;
2831         case B43legacy_PHYTYPE_G:
2832                 if (phy_rev > 8)
2833                         unsupported = 1;
2834                 break;
2835         default:
2836                 unsupported = 1;
2837         };
2838         if (unsupported) {
2839                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2840                        "(Analog %u, Type %u, Revision %u)\n",
2841                        analog_type, phy_type, phy_rev);
2842                 return -EOPNOTSUPP;
2843         }
2844         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2845                analog_type, phy_type, phy_rev);
2846
2847
2848         /* Get RADIO versioning */
2849         if (dev->dev->bus->chip_id == 0x4317) {
2850                 if (dev->dev->bus->chip_rev == 0)
2851                         tmp = 0x3205017F;
2852                 else if (dev->dev->bus->chip_rev == 1)
2853                         tmp = 0x4205017F;
2854                 else
2855                         tmp = 0x5205017F;
2856         } else {
2857                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2858                                   B43legacy_RADIOCTL_ID);
2859                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2860                 tmp <<= 16;
2861                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2862                                   B43legacy_RADIOCTL_ID);
2863                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2864         }
2865         radio_manuf = (tmp & 0x00000FFF);
2866         radio_ver = (tmp & 0x0FFFF000) >> 12;
2867         radio_rev = (tmp & 0xF0000000) >> 28;
2868         switch (phy_type) {
2869         case B43legacy_PHYTYPE_B:
2870                 if ((radio_ver & 0xFFF0) != 0x2050)
2871                         unsupported = 1;
2872                 break;
2873         case B43legacy_PHYTYPE_G:
2874                 if (radio_ver != 0x2050)
2875                         unsupported = 1;
2876                 break;
2877         default:
2878                 B43legacy_BUG_ON(1);
2879         }
2880         if (unsupported) {
2881                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2882                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2883                        radio_manuf, radio_ver, radio_rev);
2884                 return -EOPNOTSUPP;
2885         }
2886         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2887                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2888
2889
2890         phy->radio_manuf = radio_manuf;
2891         phy->radio_ver = radio_ver;
2892         phy->radio_rev = radio_rev;
2893
2894         phy->analog = analog_type;
2895         phy->type = phy_type;
2896         phy->rev = phy_rev;
2897
2898         return 0;
2899 }
2900
2901 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2902                                       struct b43legacy_phy *phy)
2903 {
2904         struct b43legacy_lopair *lo;
2905         int i;
2906
2907         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2908         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2909
2910         /* Assume the radio is enabled. If it's not enabled, the state will
2911          * immediately get fixed on the first periodic work run. */
2912         dev->radio_hw_enable = 1;
2913
2914         phy->savedpctlreg = 0xFFFF;
2915         phy->aci_enable = 0;
2916         phy->aci_wlan_automatic = 0;
2917         phy->aci_hw_rssi = 0;
2918
2919         lo = phy->_lo_pairs;
2920         if (lo)
2921                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2922                                      B43legacy_LO_COUNT);
2923         phy->max_lb_gain = 0;
2924         phy->trsw_rx_gain = 0;
2925
2926         /* Set default attenuation values. */
2927         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2928         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2929         phy->txctl1 = b43legacy_default_txctl1(dev);
2930         phy->txpwr_offset = 0;
2931
2932         /* NRSSI */
2933         phy->nrssislope = 0;
2934         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2935                 phy->nrssi[i] = -1000;
2936         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2937                 phy->nrssi_lt[i] = i;
2938
2939         phy->lofcal = 0xFFFF;
2940         phy->initval = 0xFFFF;
2941
2942         phy->interfmode = B43legacy_INTERFMODE_NONE;
2943         phy->channel = 0xFF;
2944 }
2945
2946 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2947 {
2948         /* Flags */
2949         dev->dfq_valid = 0;
2950
2951         /* Stats */
2952         memset(&dev->stats, 0, sizeof(dev->stats));
2953
2954         setup_struct_phy_for_init(dev, &dev->phy);
2955
2956         /* IRQ related flags */
2957         dev->irq_reason = 0;
2958         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2959         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2960
2961         dev->mac_suspended = 1;
2962
2963         /* Noise calculation context */
2964         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2965 }
2966
2967 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2968 {
2969 #ifdef CONFIG_SSB_DRIVER_PCICORE
2970         struct ssb_bus *bus = dev->dev->bus;
2971         u32 tmp;
2972
2973         if (bus->pcicore.dev &&
2974             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2975             bus->pcicore.dev->id.revision <= 5) {
2976                 /* IMCFGLO timeouts workaround. */
2977                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2978                 tmp &= ~SSB_IMCFGLO_REQTO;
2979                 tmp &= ~SSB_IMCFGLO_SERTO;
2980                 switch (bus->bustype) {
2981                 case SSB_BUSTYPE_PCI:
2982                 case SSB_BUSTYPE_PCMCIA:
2983                         tmp |= 0x32;
2984                         break;
2985                 case SSB_BUSTYPE_SSB:
2986                         tmp |= 0x53;
2987                         break;
2988                 }
2989                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2990         }
2991 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2992 }
2993
2994 /* Write the short and long frame retry limit values. */
2995 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2996                                        unsigned int short_retry,
2997                                        unsigned int long_retry)
2998 {
2999         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3000          * the chip-internal counter. */
3001         short_retry = min(short_retry, (unsigned int)0xF);
3002         long_retry = min(long_retry, (unsigned int)0xF);
3003
3004         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
3005         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
3006 }
3007
3008 /* Shutdown a wireless core */
3009 /* Locking: wl->mutex */
3010 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3011 {
3012         struct b43legacy_wl *wl = dev->wl;
3013         struct b43legacy_phy *phy = &dev->phy;
3014         u32 macctl;
3015
3016         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3017         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3018                 return;
3019         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3020
3021         /* Stop the microcode PSM. */
3022         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3023         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3024         macctl |= B43legacy_MACCTL_PSM_JMP0;
3025         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3026
3027         mutex_unlock(&wl->mutex);
3028         /* Must unlock as it would otherwise deadlock. No races here.
3029          * Cancel possibly pending workqueues. */
3030         cancel_work_sync(&dev->restart_work);
3031         mutex_lock(&wl->mutex);
3032
3033         b43legacy_leds_exit(dev);
3034         b43legacy_rng_exit(dev->wl);
3035         b43legacy_pio_free(dev);
3036         b43legacy_dma_free(dev);
3037         b43legacy_chip_exit(dev);
3038         b43legacy_radio_turn_off(dev, 1);
3039         b43legacy_switch_analog(dev, 0);
3040         if (phy->dyn_tssi_tbl)
3041                 kfree(phy->tssi2dbm);
3042         kfree(phy->lo_control);
3043         phy->lo_control = NULL;
3044         if (dev->wl->current_beacon) {
3045                 dev_kfree_skb_any(dev->wl->current_beacon);
3046                 dev->wl->current_beacon = NULL;
3047         }
3048
3049         ssb_device_disable(dev->dev, 0);
3050         ssb_bus_may_powerdown(dev->dev->bus);
3051 }
3052
3053 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3054 {
3055         struct b43legacy_phy *phy = &dev->phy;
3056         int i;
3057
3058         /* Set default attenuation values. */
3059         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3060         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3061         phy->txctl1 = b43legacy_default_txctl1(dev);
3062         phy->txctl2 = 0xFFFF;
3063         phy->txpwr_offset = 0;
3064
3065         /* NRSSI */
3066         phy->nrssislope = 0;
3067         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3068                 phy->nrssi[i] = -1000;
3069         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3070                 phy->nrssi_lt[i] = i;
3071
3072         phy->lofcal = 0xFFFF;
3073         phy->initval = 0xFFFF;
3074
3075         phy->aci_enable = 0;
3076         phy->aci_wlan_automatic = 0;
3077         phy->aci_hw_rssi = 0;
3078
3079         phy->antenna_diversity = 0xFFFF;
3080         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3081         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3082
3083         /* Flags */
3084         phy->calibrated = 0;
3085
3086         if (phy->_lo_pairs)
3087                 memset(phy->_lo_pairs, 0,
3088                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3089         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3090 }
3091
3092 /* Initialize a wireless core */
3093 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3094 {
3095         struct b43legacy_wl *wl = dev->wl;
3096         struct ssb_bus *bus = dev->dev->bus;
3097         struct b43legacy_phy *phy = &dev->phy;
3098         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3099         int err;
3100         u32 hf;
3101         u32 tmp;
3102
3103         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3104
3105         err = ssb_bus_powerup(bus, 0);
3106         if (err)
3107                 goto out;
3108         if (!ssb_device_is_enabled(dev->dev)) {
3109                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3110                 b43legacy_wireless_core_reset(dev, tmp);
3111         }
3112
3113         if ((phy->type == B43legacy_PHYTYPE_B) ||
3114             (phy->type == B43legacy_PHYTYPE_G)) {
3115                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3116                                          * B43legacy_LO_COUNT,
3117                                          GFP_KERNEL);
3118                 if (!phy->_lo_pairs)
3119                         return -ENOMEM;
3120         }
3121         setup_struct_wldev_for_init(dev);
3122
3123         err = b43legacy_phy_init_tssi2dbm_table(dev);
3124         if (err)
3125                 goto err_kfree_lo_control;
3126
3127         /* Enable IRQ routing to this device. */
3128         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3129
3130         b43legacy_imcfglo_timeouts_workaround(dev);
3131         prepare_phy_data_for_init(dev);
3132         b43legacy_phy_calibrate(dev);
3133         err = b43legacy_chip_init(dev);
3134         if (err)
3135                 goto err_kfree_tssitbl;
3136         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3137                               B43legacy_SHM_SH_WLCOREREV,
3138                               dev->dev->id.revision);
3139         hf = b43legacy_hf_read(dev);
3140         if (phy->type == B43legacy_PHYTYPE_G) {
3141                 hf |= B43legacy_HF_SYMW;
3142                 if (phy->rev == 1)
3143                         hf |= B43legacy_HF_GDCW;
3144                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3145                         hf |= B43legacy_HF_OFDMPABOOST;
3146         } else if (phy->type == B43legacy_PHYTYPE_B) {
3147                 hf |= B43legacy_HF_SYMW;
3148                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3149                         hf &= ~B43legacy_HF_GDCW;
3150         }
3151         b43legacy_hf_write(dev, hf);
3152
3153         b43legacy_set_retry_limits(dev,
3154                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3155                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3156
3157         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3158                               0x0044, 3);
3159         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3160                               0x0046, 2);
3161
3162         /* Disable sending probe responses from firmware.
3163          * Setting the MaxTime to one usec will always trigger
3164          * a timeout, so we never send any probe resp.
3165          * A timeout of zero is infinite. */
3166         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3167                               B43legacy_SHM_SH_PRMAXTIME, 1);
3168
3169         b43legacy_rate_memory_init(dev);
3170
3171         /* Minimum Contention Window */
3172         if (phy->type == B43legacy_PHYTYPE_B)
3173                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3174                                       0x0003, 31);
3175         else
3176                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3177                                       0x0003, 15);
3178         /* Maximum Contention Window */
3179         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3180                               0x0004, 1023);
3181
3182         do {
3183                 if (b43legacy_using_pio(dev))
3184                         err = b43legacy_pio_init(dev);
3185                 else {
3186                         err = b43legacy_dma_init(dev);
3187                         if (!err)
3188                                 b43legacy_qos_init(dev);
3189                 }
3190         } while (err == -EAGAIN);
3191         if (err)
3192                 goto err_chip_exit;
3193
3194         b43legacy_write16(dev, 0x0612, 0x0050);
3195         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3196         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3197
3198         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3199         b43legacy_upload_card_macaddress(dev);
3200         b43legacy_security_init(dev);
3201         b43legacy_rng_init(wl);
3202
3203         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3204
3205         b43legacy_leds_init(dev);
3206 out:
3207         return err;
3208
3209 err_chip_exit:
3210         b43legacy_chip_exit(dev);
3211 err_kfree_tssitbl:
3212         if (phy->dyn_tssi_tbl)
3213                 kfree(phy->tssi2dbm);
3214 err_kfree_lo_control:
3215         kfree(phy->lo_control);
3216         phy->lo_control = NULL;
3217         ssb_bus_may_powerdown(bus);
3218         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3219         return err;
3220 }
3221
3222 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3223                                       struct ieee80211_if_init_conf *conf)
3224 {
3225         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3226         struct b43legacy_wldev *dev;
3227         unsigned long flags;
3228         int err = -EOPNOTSUPP;
3229
3230         /* TODO: allow WDS/AP devices to coexist */
3231
3232         if (conf->type != IEEE80211_IF_TYPE_AP &&
3233             conf->type != IEEE80211_IF_TYPE_STA &&
3234             conf->type != IEEE80211_IF_TYPE_WDS &&
3235             conf->type != IEEE80211_IF_TYPE_IBSS)
3236                 return -EOPNOTSUPP;
3237
3238         mutex_lock(&wl->mutex);
3239         if (wl->operating)
3240                 goto out_mutex_unlock;
3241
3242         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3243
3244         dev = wl->current_dev;
3245         wl->operating = 1;
3246         wl->vif = conf->vif;
3247         wl->if_type = conf->type;
3248         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3249
3250         spin_lock_irqsave(&wl->irq_lock, flags);
3251         b43legacy_adjust_opmode(dev);
3252         b43legacy_upload_card_macaddress(dev);
3253         spin_unlock_irqrestore(&wl->irq_lock, flags);
3254
3255         err = 0;
3256  out_mutex_unlock:
3257         mutex_unlock(&wl->mutex);
3258
3259         return err;
3260 }
3261
3262 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3263                                           struct ieee80211_if_init_conf *conf)
3264 {
3265         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3266         struct b43legacy_wldev *dev = wl->current_dev;
3267         unsigned long flags;
3268
3269         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3270
3271         mutex_lock(&wl->mutex);
3272
3273         B43legacy_WARN_ON(!wl->operating);
3274         B43legacy_WARN_ON(wl->vif != conf->vif);
3275         wl->vif = NULL;
3276
3277         wl->operating = 0;
3278
3279         spin_lock_irqsave(&wl->irq_lock, flags);
3280         b43legacy_adjust_opmode(dev);
3281         memset(wl->mac_addr, 0, ETH_ALEN);
3282         b43legacy_upload_card_macaddress(dev);
3283         spin_unlock_irqrestore(&wl->irq_lock, flags);
3284
3285         mutex_unlock(&wl->mutex);
3286 }
3287
3288 static int b43legacy_op_start(struct ieee80211_hw *hw)
3289 {
3290         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3291         struct b43legacy_wldev *dev = wl->current_dev;
3292         int did_init = 0;
3293         int err = 0;
3294         bool do_rfkill_exit = 0;
3295
3296         /* First register RFkill.
3297          * LEDs that are registered later depend on it. */
3298         b43legacy_rfkill_init(dev);
3299
3300         /* Kill all old instance specific information to make sure
3301          * the card won't use it in the short timeframe between start
3302          * and mac80211 reconfiguring it. */
3303         memset(wl->bssid, 0, ETH_ALEN);
3304         memset(wl->mac_addr, 0, ETH_ALEN);
3305         wl->filter_flags = 0;
3306
3307         mutex_lock(&wl->mutex);
3308
3309         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3310                 err = b43legacy_wireless_core_init(dev);
3311                 if (err) {
3312                         do_rfkill_exit = 1;
3313                         goto out_mutex_unlock;
3314                 }
3315                 did_init = 1;
3316         }
3317
3318         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3319                 err = b43legacy_wireless_core_start(dev);
3320                 if (err) {
3321                         if (did_init)
3322                                 b43legacy_wireless_core_exit(dev);
3323                         do_rfkill_exit = 1;
3324                         goto out_mutex_unlock;
3325                 }
3326         }
3327
3328 out_mutex_unlock:
3329         mutex_unlock(&wl->mutex);
3330
3331         if (do_rfkill_exit)
3332                 b43legacy_rfkill_exit(dev);
3333
3334         return err;
3335 }
3336
3337 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3338 {
3339         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3340         struct b43legacy_wldev *dev = wl->current_dev;
3341
3342         b43legacy_rfkill_exit(dev);
3343
3344         mutex_lock(&wl->mutex);
3345         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3346                 b43legacy_wireless_core_stop(dev);
3347         b43legacy_wireless_core_exit(dev);
3348         mutex_unlock(&wl->mutex);
3349 }
3350
3351 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3352                                         u32 short_retry_limit,
3353                                         u32 long_retry_limit)
3354 {
3355         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3356         struct b43legacy_wldev *dev;
3357         int err = 0;
3358
3359         mutex_lock(&wl->mutex);
3360         dev = wl->current_dev;
3361         if (unlikely(!dev ||
3362                      (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3363                 err = -ENODEV;
3364                 goto out_unlock;
3365         }
3366         b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3367 out_unlock:
3368         mutex_unlock(&wl->mutex);
3369
3370         return err;
3371 }
3372
3373 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3374                                        int aid, int set)
3375 {
3376         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3377         struct sk_buff *beacon;
3378         unsigned long flags;
3379
3380         /* We could modify the existing beacon and set the aid bit in the TIM
3381          * field, but that would probably require resizing and moving of data
3382          * within the beacon template. Simply request a new beacon and let
3383          * mac80211 do the hard work. */
3384         beacon = ieee80211_beacon_get(hw, wl->vif, NULL);
3385         if (unlikely(!beacon))
3386                 return -ENOMEM;
3387         spin_lock_irqsave(&wl->irq_lock, flags);
3388         b43legacy_update_templates(wl, beacon);
3389         spin_unlock_irqrestore(&wl->irq_lock, flags);
3390
3391         return 0;
3392 }
3393
3394 static int b43legacy_op_ibss_beacon_update(struct ieee80211_hw *hw,
3395                                            struct sk_buff *beacon,
3396                                            struct ieee80211_tx_control *ctl)
3397 {
3398         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3399         unsigned long flags;
3400
3401         spin_lock_irqsave(&wl->irq_lock, flags);
3402         b43legacy_update_templates(wl, beacon);
3403         spin_unlock_irqrestore(&wl->irq_lock, flags);
3404
3405         return 0;
3406 }
3407
3408 static const struct ieee80211_ops b43legacy_hw_ops = {
3409         .tx                     = b43legacy_op_tx,
3410         .conf_tx                = b43legacy_op_conf_tx,
3411         .add_interface          = b43legacy_op_add_interface,
3412         .remove_interface       = b43legacy_op_remove_interface,
3413         .config                 = b43legacy_op_dev_config,
3414         .config_interface       = b43legacy_op_config_interface,
3415         .configure_filter       = b43legacy_op_configure_filter,
3416         .get_stats              = b43legacy_op_get_stats,
3417         .get_tx_stats           = b43legacy_op_get_tx_stats,
3418         .start                  = b43legacy_op_start,
3419         .stop                   = b43legacy_op_stop,
3420         .set_retry_limit        = b43legacy_op_set_retry_limit,
3421         .set_tim                = b43legacy_op_beacon_set_tim,
3422         .beacon_update          = b43legacy_op_ibss_beacon_update,
3423 };
3424
3425 /* Hard-reset the chip. Do not call this directly.
3426  * Use b43legacy_controller_restart()
3427  */
3428 static void b43legacy_chip_reset(struct work_struct *work)
3429 {
3430         struct b43legacy_wldev *dev =
3431                 container_of(work, struct b43legacy_wldev, restart_work);
3432         struct b43legacy_wl *wl = dev->wl;
3433         int err = 0;
3434         int prev_status;
3435
3436         mutex_lock(&wl->mutex);
3437
3438         prev_status = b43legacy_status(dev);
3439         /* Bring the device down... */
3440         if (prev_status >= B43legacy_STAT_STARTED)
3441                 b43legacy_wireless_core_stop(dev);
3442         if (prev_status >= B43legacy_STAT_INITIALIZED)
3443                 b43legacy_wireless_core_exit(dev);
3444
3445         /* ...and up again. */
3446         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3447                 err = b43legacy_wireless_core_init(dev);
3448                 if (err)
3449                         goto out;
3450         }
3451         if (prev_status >= B43legacy_STAT_STARTED) {
3452                 err = b43legacy_wireless_core_start(dev);
3453                 if (err) {
3454                         b43legacy_wireless_core_exit(dev);
3455                         goto out;
3456                 }
3457         }
3458 out:
3459         mutex_unlock(&wl->mutex);
3460         if (err)
3461                 b43legacyerr(wl, "Controller restart FAILED\n");
3462         else
3463                 b43legacyinfo(wl, "Controller restarted\n");
3464 }
3465
3466 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3467                                  int have_bphy,
3468                                  int have_gphy)
3469 {
3470         struct ieee80211_hw *hw = dev->wl->hw;
3471         struct b43legacy_phy *phy = &dev->phy;
3472
3473         phy->possible_phymodes = 0;
3474         if (have_bphy) {
3475                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3476                         &b43legacy_band_2GHz_BPHY;
3477                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3478         }
3479
3480         if (have_gphy) {
3481                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3482                         &b43legacy_band_2GHz_GPHY;
3483                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3484         }
3485
3486         return 0;
3487 }
3488
3489 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3490 {
3491         /* We release firmware that late to not be required to re-request
3492          * is all the time when we reinit the core. */
3493         b43legacy_release_firmware(dev);
3494 }
3495
3496 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3497 {
3498         struct b43legacy_wl *wl = dev->wl;
3499         struct ssb_bus *bus = dev->dev->bus;
3500         struct pci_dev *pdev = bus->host_pci;
3501         int err;
3502         int have_bphy = 0;
3503         int have_gphy = 0;
3504         u32 tmp;
3505
3506         /* Do NOT do any device initialization here.
3507          * Do it in wireless_core_init() instead.
3508          * This function is for gathering basic information about the HW, only.
3509          * Also some structs may be set up here. But most likely you want to
3510          * have that in core_init(), too.
3511          */
3512
3513         err = ssb_bus_powerup(bus, 0);
3514         if (err) {
3515                 b43legacyerr(wl, "Bus powerup failed\n");
3516                 goto out;
3517         }
3518         /* Get the PHY type. */
3519         if (dev->dev->id.revision >= 5) {
3520                 u32 tmshigh;
3521
3522                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3523                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3524                 if (!have_gphy)
3525                         have_bphy = 1;
3526         } else if (dev->dev->id.revision == 4)
3527                 have_gphy = 1;
3528         else
3529                 have_bphy = 1;
3530
3531         dev->phy.gmode = (have_gphy || have_bphy);
3532         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3533         b43legacy_wireless_core_reset(dev, tmp);
3534
3535         err = b43legacy_phy_versioning(dev);
3536         if (err)
3537                 goto err_powerdown;
3538         /* Check if this device supports multiband. */
3539         if (!pdev ||
3540             (pdev->device != 0x4312 &&
3541              pdev->device != 0x4319 &&
3542              pdev->device != 0x4324)) {
3543                 /* No multiband support. */
3544                 have_bphy = 0;
3545                 have_gphy = 0;
3546                 switch (dev->phy.type) {
3547                 case B43legacy_PHYTYPE_B:
3548                         have_bphy = 1;
3549                         break;
3550                 case B43legacy_PHYTYPE_G:
3551                         have_gphy = 1;
3552                         break;
3553                 default:
3554                         B43legacy_BUG_ON(1);
3555                 }
3556         }
3557         dev->phy.gmode = (have_gphy || have_bphy);
3558         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3559         b43legacy_wireless_core_reset(dev, tmp);
3560
3561         err = b43legacy_validate_chipaccess(dev);
3562         if (err)
3563                 goto err_powerdown;
3564         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3565         if (err)
3566                 goto err_powerdown;
3567
3568         /* Now set some default "current_dev" */
3569         if (!wl->current_dev)
3570                 wl->current_dev = dev;
3571         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3572
3573         b43legacy_radio_turn_off(dev, 1);
3574         b43legacy_switch_analog(dev, 0);
3575         ssb_device_disable(dev->dev, 0);
3576         ssb_bus_may_powerdown(bus);
3577
3578 out:
3579         return err;
3580
3581 err_powerdown:
3582         ssb_bus_may_powerdown(bus);
3583         return err;
3584 }
3585
3586 static void b43legacy_one_core_detach(struct ssb_device *dev)
3587 {
3588         struct b43legacy_wldev *wldev;
3589         struct b43legacy_wl *wl;
3590
3591         wldev = ssb_get_drvdata(dev);
3592         wl = wldev->wl;
3593         cancel_work_sync(&wldev->restart_work);
3594         b43legacy_debugfs_remove_device(wldev);
3595         b43legacy_wireless_core_detach(wldev);
3596         list_del(&wldev->list);
3597         wl->nr_devs--;
3598         ssb_set_drvdata(dev, NULL);
3599         kfree(wldev);
3600 }
3601
3602 static int b43legacy_one_core_attach(struct ssb_device *dev,
3603                                      struct b43legacy_wl *wl)
3604 {
3605         struct b43legacy_wldev *wldev;
3606         struct pci_dev *pdev;
3607         int err = -ENOMEM;
3608
3609         if (!list_empty(&wl->devlist)) {
3610                 /* We are not the first core on this chip. */
3611                 pdev = dev->bus->host_pci;
3612                 /* Only special chips support more than one wireless
3613                  * core, although some of the other chips have more than
3614                  * one wireless core as well. Check for this and
3615                  * bail out early.
3616                  */
3617                 if (!pdev ||
3618                     ((pdev->device != 0x4321) &&
3619                      (pdev->device != 0x4313) &&
3620                      (pdev->device != 0x431A))) {
3621                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3622                         return -ENODEV;
3623                 }
3624         }
3625
3626         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3627         if (!wldev)
3628                 goto out;
3629
3630         wldev->dev = dev;
3631         wldev->wl = wl;
3632         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3633         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3634         tasklet_init(&wldev->isr_tasklet,
3635                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3636                      (unsigned long)wldev);
3637         if (modparam_pio)
3638                 wldev->__using_pio = 1;
3639         INIT_LIST_HEAD(&wldev->list);
3640
3641         err = b43legacy_wireless_core_attach(wldev);
3642         if (err)
3643                 goto err_kfree_wldev;
3644
3645         list_add(&wldev->list, &wl->devlist);
3646         wl->nr_devs++;
3647         ssb_set_drvdata(dev, wldev);
3648         b43legacy_debugfs_add_device(wldev);
3649 out:
3650         return err;
3651
3652 err_kfree_wldev:
3653         kfree(wldev);
3654         return err;
3655 }
3656
3657 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3658 {
3659         /* boardflags workarounds */
3660         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3661             bus->boardinfo.type == 0x4E &&
3662             bus->boardinfo.rev > 0x40)
3663                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3664 }
3665
3666 static void b43legacy_wireless_exit(struct ssb_device *dev,
3667                                   struct b43legacy_wl *wl)
3668 {
3669         struct ieee80211_hw *hw = wl->hw;
3670
3671         ssb_set_devtypedata(dev, NULL);
3672         ieee80211_free_hw(hw);
3673 }
3674
3675 static int b43legacy_wireless_init(struct ssb_device *dev)
3676 {
3677         struct ssb_sprom *sprom = &dev->bus->sprom;
3678         struct ieee80211_hw *hw;
3679         struct b43legacy_wl *wl;
3680         int err = -ENOMEM;
3681
3682         b43legacy_sprom_fixup(dev->bus);
3683
3684         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3685         if (!hw) {
3686                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3687                 goto out;
3688         }
3689
3690         /* fill hw info */
3691         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3692                     IEEE80211_HW_RX_INCLUDES_FCS;
3693         hw->max_signal = 100;
3694         hw->max_rssi = -110;
3695         hw->max_noise = -110;
3696         hw->queues = 1; /* FIXME: hardware has more queues */
3697         SET_IEEE80211_DEV(hw, dev->dev);
3698         if (is_valid_ether_addr(sprom->et1mac))
3699                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3700         else
3701                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3702
3703         /* Get and initialize struct b43legacy_wl */
3704         wl = hw_to_b43legacy_wl(hw);
3705         memset(wl, 0, sizeof(*wl));
3706         wl->hw = hw;
3707         spin_lock_init(&wl->irq_lock);
3708         spin_lock_init(&wl->leds_lock);
3709         mutex_init(&wl->mutex);
3710         INIT_LIST_HEAD(&wl->devlist);
3711
3712         ssb_set_devtypedata(dev, wl);
3713         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3714         err = 0;
3715 out:
3716         return err;
3717 }
3718
3719 static int b43legacy_probe(struct ssb_device *dev,
3720                          const struct ssb_device_id *id)
3721 {
3722         struct b43legacy_wl *wl;
3723         int err;
3724         int first = 0;
3725
3726         wl = ssb_get_devtypedata(dev);
3727         if (!wl) {
3728                 /* Probing the first core - setup common struct b43legacy_wl */
3729                 first = 1;
3730                 err = b43legacy_wireless_init(dev);
3731                 if (err)
3732                         goto out;
3733                 wl = ssb_get_devtypedata(dev);
3734                 B43legacy_WARN_ON(!wl);
3735         }
3736         err = b43legacy_one_core_attach(dev, wl);
3737         if (err)
3738                 goto err_wireless_exit;
3739
3740         if (first) {
3741                 err = ieee80211_register_hw(wl->hw);
3742                 if (err)
3743                         goto err_one_core_detach;
3744         }
3745
3746 out:
3747         return err;
3748
3749 err_one_core_detach:
3750         b43legacy_one_core_detach(dev);
3751 err_wireless_exit:
3752         if (first)
3753                 b43legacy_wireless_exit(dev, wl);
3754         return err;
3755 }
3756
3757 static void b43legacy_remove(struct ssb_device *dev)
3758 {
3759         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3760         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3761
3762         B43legacy_WARN_ON(!wl);
3763         if (wl->current_dev == wldev)
3764                 ieee80211_unregister_hw(wl->hw);
3765
3766         b43legacy_one_core_detach(dev);
3767
3768         if (list_empty(&wl->devlist))
3769                 /* Last core on the chip unregistered.
3770                  * We can destroy common struct b43legacy_wl.
3771                  */
3772                 b43legacy_wireless_exit(dev, wl);
3773 }
3774
3775 /* Perform a hardware reset. This can be called from any context. */
3776 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3777                                   const char *reason)
3778 {
3779         /* Must avoid requeueing, if we are in shutdown. */
3780         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3781                 return;
3782         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3783         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3784 }
3785
3786 #ifdef CONFIG_PM
3787
3788 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3789 {
3790         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3791         struct b43legacy_wl *wl = wldev->wl;
3792
3793         b43legacydbg(wl, "Suspending...\n");
3794
3795         mutex_lock(&wl->mutex);
3796         wldev->suspend_init_status = b43legacy_status(wldev);
3797         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3798                 b43legacy_wireless_core_stop(wldev);
3799         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3800                 b43legacy_wireless_core_exit(wldev);
3801         mutex_unlock(&wl->mutex);
3802
3803         b43legacydbg(wl, "Device suspended.\n");
3804
3805         return 0;
3806 }
3807
3808 static int b43legacy_resume(struct ssb_device *dev)
3809 {
3810         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3811         struct b43legacy_wl *wl = wldev->wl;
3812         int err = 0;
3813
3814         b43legacydbg(wl, "Resuming...\n");
3815
3816         mutex_lock(&wl->mutex);
3817         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3818                 err = b43legacy_wireless_core_init(wldev);
3819                 if (err) {
3820                         b43legacyerr(wl, "Resume failed at core init\n");
3821                         goto out;
3822                 }
3823         }
3824         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3825                 err = b43legacy_wireless_core_start(wldev);
3826                 if (err) {
3827                         b43legacy_wireless_core_exit(wldev);
3828                         b43legacyerr(wl, "Resume failed at core start\n");
3829                         goto out;
3830                 }
3831         }
3832         mutex_unlock(&wl->mutex);
3833
3834         b43legacydbg(wl, "Device resumed.\n");
3835 out:
3836         return err;
3837 }
3838
3839 #else   /* CONFIG_PM */
3840 # define b43legacy_suspend      NULL
3841 # define b43legacy_resume               NULL
3842 #endif  /* CONFIG_PM */
3843
3844 static struct ssb_driver b43legacy_ssb_driver = {
3845         .name           = KBUILD_MODNAME,
3846         .id_table       = b43legacy_ssb_tbl,
3847         .probe          = b43legacy_probe,
3848         .remove         = b43legacy_remove,
3849         .suspend        = b43legacy_suspend,
3850         .resume         = b43legacy_resume,
3851 };
3852
3853 static void b43legacy_print_driverinfo(void)
3854 {
3855         const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3856                    *feat_pio = "", *feat_dma = "";
3857
3858 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3859         feat_pci = "P";
3860 #endif
3861 #ifdef CONFIG_B43LEGACY_LEDS
3862         feat_leds = "L";
3863 #endif
3864 #ifdef CONFIG_B43LEGACY_RFKILL
3865         feat_rfkill = "R";
3866 #endif
3867 #ifdef CONFIG_B43LEGACY_PIO
3868         feat_pio = "I";
3869 #endif
3870 #ifdef CONFIG_B43LEGACY_DMA
3871         feat_dma = "D";
3872 #endif
3873         printk(KERN_INFO "Broadcom 43xx driver loaded "
3874                "[ Features: %s%s%s%s%s, Firmware-ID: "
3875                B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3876                feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3877 }
3878
3879 static int __init b43legacy_init(void)
3880 {
3881         int err;
3882
3883         b43legacy_debugfs_init();
3884
3885         err = ssb_driver_register(&b43legacy_ssb_driver);
3886         if (err)
3887                 goto err_dfs_exit;
3888
3889         b43legacy_print_driverinfo();
3890
3891         return err;
3892
3893 err_dfs_exit:
3894         b43legacy_debugfs_exit();
3895         return err;
3896 }
3897
3898 static void __exit b43legacy_exit(void)
3899 {
3900         ssb_driver_unregister(&b43legacy_ssb_driver);
3901         b43legacy_debugfs_exit();
3902 }
3903
3904 module_init(b43legacy_init)
3905 module_exit(b43legacy_exit)