3 Broadcom B43 wireless driver
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
35 static void b43_pio_rx_work(struct work_struct *work);
38 static u16 generate_cookie(struct b43_pio_txqueue *q,
39 struct b43_pio_txpacket *pack)
43 /* Use the upper 4 bits of the cookie as
44 * PIO controller ID and store the packet index number
45 * in the lower 12 bits.
46 * Note that the cookie must never be 0, as this
47 * is a special value used in RX path.
48 * It can also not be 0xFFFF because that is special
49 * for multicast frames.
51 cookie = (((u16)q->index + 1) << 12);
52 cookie |= pack->index;
58 struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
60 struct b43_pio_txpacket **pack)
62 struct b43_pio *pio = &dev->pio;
63 struct b43_pio_txqueue *q = NULL;
64 unsigned int pack_index;
66 switch (cookie & 0xF000) {
68 q = pio->tx_queue_AC_BK;
71 q = pio->tx_queue_AC_BE;
74 q = pio->tx_queue_AC_VI;
77 q = pio->tx_queue_AC_VO;
80 q = pio->tx_queue_mcast;
85 pack_index = (cookie & 0x0FFF);
86 if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
88 *pack = &q->packets[pack_index];
93 static u16 index_to_pioqueue_base(struct b43_wldev *dev,
96 static const u16 bases[] = {
106 static const u16 bases_rev11[] = {
107 B43_MMIO_PIO11_BASE0,
108 B43_MMIO_PIO11_BASE1,
109 B43_MMIO_PIO11_BASE2,
110 B43_MMIO_PIO11_BASE3,
111 B43_MMIO_PIO11_BASE4,
112 B43_MMIO_PIO11_BASE5,
115 if (dev->dev->id.revision >= 11) {
116 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
117 return bases_rev11[index];
119 B43_WARN_ON(index >= ARRAY_SIZE(bases));
123 static u16 pio_txqueue_offset(struct b43_wldev *dev)
125 if (dev->dev->id.revision >= 11)
130 static u16 pio_rxqueue_offset(struct b43_wldev *dev)
132 if (dev->dev->id.revision >= 11)
137 static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
140 struct b43_pio_txqueue *q;
141 struct b43_pio_txpacket *p;
144 q = kzalloc(sizeof(*q), GFP_KERNEL);
148 q->rev = dev->dev->id.revision;
149 q->mmio_base = index_to_pioqueue_base(dev, index) +
150 pio_txqueue_offset(dev);
153 q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
155 q->buffer_size = 1920; //FIXME this constant is wrong.
157 q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
158 q->buffer_size -= 80;
161 INIT_LIST_HEAD(&q->packets_list);
162 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
163 p = &(q->packets[i]);
164 INIT_LIST_HEAD(&p->list);
167 list_add(&p->list, &q->packets_list);
173 static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
176 struct b43_pio_rxqueue *q;
178 q = kzalloc(sizeof(*q), GFP_KERNEL);
182 q->rev = dev->dev->id.revision;
183 q->mmio_base = index_to_pioqueue_base(dev, index) +
184 pio_rxqueue_offset(dev);
185 INIT_WORK(&q->rx_work, b43_pio_rx_work);
187 /* Enable Direct FIFO RX (PIO) on the engine. */
188 b43_dma_direct_fifo_rx(dev, index, 1);
193 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
195 struct b43_pio_txpacket *pack;
198 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
199 pack = &(q->packets[i]);
201 dev_kfree_skb_any(pack->skb);
207 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
212 b43_pio_cancel_tx_packets(q);
216 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
224 #define destroy_queue_tx(pio, queue) do { \
225 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
226 (pio)->queue = NULL; \
229 #define destroy_queue_rx(pio, queue) do { \
230 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
231 (pio)->queue = NULL; \
234 void b43_pio_free(struct b43_wldev *dev)
238 if (!b43_using_pio_transfers(dev))
242 destroy_queue_rx(pio, rx_queue);
243 destroy_queue_tx(pio, tx_queue_mcast);
244 destroy_queue_tx(pio, tx_queue_AC_VO);
245 destroy_queue_tx(pio, tx_queue_AC_VI);
246 destroy_queue_tx(pio, tx_queue_AC_BE);
247 destroy_queue_tx(pio, tx_queue_AC_BK);
250 void b43_pio_stop(struct b43_wldev *dev)
252 if (!b43_using_pio_transfers(dev))
254 cancel_work_sync(&dev->pio.rx_queue->rx_work);
257 int b43_pio_init(struct b43_wldev *dev)
259 struct b43_pio *pio = &dev->pio;
262 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
264 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
266 pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
267 if (!pio->tx_queue_AC_BK)
270 pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
271 if (!pio->tx_queue_AC_BE)
274 pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
275 if (!pio->tx_queue_AC_VI)
278 pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
279 if (!pio->tx_queue_AC_VO)
282 pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
283 if (!pio->tx_queue_mcast)
286 pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
288 goto err_destroy_mcast;
290 b43dbg(dev->wl, "PIO initialized\n");
296 destroy_queue_tx(pio, tx_queue_mcast);
298 destroy_queue_tx(pio, tx_queue_AC_VO);
300 destroy_queue_tx(pio, tx_queue_AC_VI);
302 destroy_queue_tx(pio, tx_queue_AC_BE);
304 destroy_queue_tx(pio, tx_queue_AC_BK);
308 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
309 static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
312 struct b43_pio_txqueue *q;
314 if (dev->qos_enabled) {
315 /* 0 = highest priority */
316 switch (queue_prio) {
321 q = dev->pio.tx_queue_AC_VO;
324 q = dev->pio.tx_queue_AC_VI;
327 q = dev->pio.tx_queue_AC_BE;
330 q = dev->pio.tx_queue_AC_BK;
334 q = dev->pio.tx_queue_AC_BE;
339 static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
342 unsigned int data_len)
344 struct b43_wldev *dev = q->dev;
345 const u8 *data = _data;
347 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
348 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
350 ssb_block_write(dev->dev, data, (data_len & ~1),
351 q->mmio_base + B43_PIO_TXDATA,
354 /* Write the last byte. */
355 ctl &= ~B43_PIO_TXCTL_WRITEHI;
356 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
357 b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]);
363 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
364 const u8 *hdr, unsigned int hdrlen)
366 struct b43_pio_txqueue *q = pack->queue;
367 const char *frame = pack->skb->data;
368 unsigned int frame_len = pack->skb->len;
371 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
372 ctl |= B43_PIO_TXCTL_FREADY;
373 ctl &= ~B43_PIO_TXCTL_EOF;
375 /* Transfer the header data. */
376 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
377 /* Transfer the frame data. */
378 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
380 ctl |= B43_PIO_TXCTL_EOF;
381 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
384 static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
387 unsigned int data_len)
389 struct b43_wldev *dev = q->dev;
390 const u8 *data = _data;
392 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
393 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
394 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
396 ssb_block_write(dev->dev, data, (data_len & ~3),
397 q->mmio_base + B43_PIO8_TXDATA,
402 /* Write the last few bytes. */
403 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
404 B43_PIO8_TXCTL_24_31);
405 data = &(data[data_len - 1]);
406 switch (data_len & 3) {
408 ctl |= B43_PIO8_TXCTL_16_23;
409 value |= (u32)(*data) << 16;
412 ctl |= B43_PIO8_TXCTL_8_15;
413 value |= (u32)(*data) << 8;
416 value |= (u32)(*data);
418 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
419 b43_piotx_write32(q, B43_PIO8_TXDATA, value);
425 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
426 const u8 *hdr, unsigned int hdrlen)
428 struct b43_pio_txqueue *q = pack->queue;
429 const char *frame = pack->skb->data;
430 unsigned int frame_len = pack->skb->len;
433 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
434 ctl |= B43_PIO8_TXCTL_FREADY;
435 ctl &= ~B43_PIO8_TXCTL_EOF;
437 /* Transfer the header data. */
438 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
439 /* Transfer the frame data. */
440 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
442 ctl |= B43_PIO8_TXCTL_EOF;
443 b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
446 static int pio_tx_frame(struct b43_pio_txqueue *q,
449 struct b43_pio_txpacket *pack;
450 struct b43_txhdr txhdr;
454 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
456 B43_WARN_ON(list_empty(&q->packets_list));
457 pack = list_entry(q->packets_list.next,
458 struct b43_pio_txpacket, list);
460 cookie = generate_cookie(q, pack);
461 hdrlen = b43_txhdr_size(q->dev);
462 err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb,
467 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
468 /* Tell the firmware about the cookie of the last
469 * mcast frame, so it can clear the more-data bit in it. */
470 b43_shm_write16(q->dev, B43_SHM_SHARED,
471 B43_SHM_SH_MCASTCOOKIE, cookie);
476 pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
478 pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
480 /* Remove it from the list of available packet slots.
481 * It will be put back when we receive the status report. */
482 list_del(&pack->list);
484 /* Update the queue statistics. */
485 q->buffer_used += roundup(skb->len + hdrlen, 4);
486 q->free_packet_slots -= 1;
491 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
493 struct b43_pio_txqueue *q;
494 struct ieee80211_hdr *hdr;
495 unsigned int hdrlen, total_len;
497 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
499 hdr = (struct ieee80211_hdr *)skb->data;
501 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
502 /* The multicast queue will be sent after the DTIM. */
503 q = dev->pio.tx_queue_mcast;
504 /* Set the frame More-Data bit. Ucode will clear it
505 * for us on the last frame. */
506 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
508 /* Decide by priority where to put this frame. */
509 q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
512 hdrlen = b43_txhdr_size(dev);
513 total_len = roundup(skb->len + hdrlen, 4);
515 if (unlikely(total_len > q->buffer_size)) {
517 b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
520 if (unlikely(q->free_packet_slots == 0)) {
522 b43warn(dev->wl, "PIO: TX packet overflow.\n");
525 B43_WARN_ON(q->buffer_used > q->buffer_size);
527 if (total_len > (q->buffer_size - q->buffer_used)) {
528 /* Not enough memory on the queue. */
530 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
535 /* Assign the queue number to the ring (if not already done before)
536 * so TX status handling can use it. The mac80211-queue to b43-queue
537 * mapping is static, so we don't need to store it per frame. */
538 q->queue_prio = skb_get_queue_mapping(skb);
540 err = pio_tx_frame(q, skb);
541 if (unlikely(err == -ENOKEY)) {
542 /* Drop this packet, as we don't have the encryption key
543 * anymore and must not transmit it unencrypted. */
544 dev_kfree_skb_any(skb);
549 b43err(dev->wl, "PIO transmission failure\n");
554 B43_WARN_ON(q->buffer_used > q->buffer_size);
555 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
556 (q->free_packet_slots == 0)) {
557 /* The queue is full. */
558 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
566 void b43_pio_handle_txstatus(struct b43_wldev *dev,
567 const struct b43_txstatus *status)
569 struct b43_pio_txqueue *q;
570 struct b43_pio_txpacket *pack = NULL;
571 unsigned int total_len;
572 struct ieee80211_tx_info *info;
574 q = parse_cookie(dev, status->cookie, &pack);
579 info = IEEE80211_SKB_CB(pack->skb);
581 b43_fill_txstatus_report(dev, info, status);
583 total_len = pack->skb->len + b43_txhdr_size(dev);
584 total_len = roundup(total_len, 4);
585 q->buffer_used -= total_len;
586 q->free_packet_slots += 1;
588 ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb);
590 list_add(&pack->list, &q->packets_list);
593 ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
598 void b43_pio_get_tx_stats(struct b43_wldev *dev,
599 struct ieee80211_tx_queue_stats *stats)
601 const int nr_queues = dev->wl->hw->queues;
602 struct b43_pio_txqueue *q;
605 for (i = 0; i < nr_queues; i++) {
606 q = select_queue_by_priority(dev, i);
608 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
609 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
610 stats[i].count = q->nr_tx_packets;
614 /* Returns whether we should fetch another frame. */
615 static bool pio_rx_frame(struct b43_pio_rxqueue *q)
617 struct b43_wldev *dev = q->dev;
618 struct b43_rxhdr_fw4 rxhdr;
621 unsigned int i, padding;
623 const char *err_msg = NULL;
625 memset(&rxhdr, 0, sizeof(rxhdr));
627 /* Check if we have data and wait for it to get ready. */
631 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
632 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
634 b43_piorx_write32(q, B43_PIO8_RXCTL,
635 B43_PIO8_RXCTL_FRAMERDY);
636 for (i = 0; i < 10; i++) {
637 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
638 if (ctl & B43_PIO8_RXCTL_DATARDY)
645 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
646 if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
648 b43_piorx_write16(q, B43_PIO_RXCTL,
649 B43_PIO_RXCTL_FRAMERDY);
650 for (i = 0; i < 10; i++) {
651 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
652 if (ctl & B43_PIO_RXCTL_DATARDY)
657 b43dbg(q->dev->wl, "PIO RX timed out\n");
661 /* Get the preamble (RX header) */
663 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
664 q->mmio_base + B43_PIO8_RXDATA,
667 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
668 q->mmio_base + B43_PIO_RXDATA,
672 len = le16_to_cpu(rxhdr.frame_len);
673 if (unlikely(len > 0x700)) {
674 err_msg = "len > 0x700";
677 if (unlikely(len == 0)) {
678 err_msg = "len == 0";
682 macstat = le32_to_cpu(rxhdr.mac_status);
683 if (macstat & B43_RX_MAC_FCSERR) {
684 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
685 /* Drop frames with failed FCS. */
686 err_msg = "Frame FCS error";
691 /* We always pad 2 bytes, as that's what upstream code expects
692 * due to the RX-header being 30 bytes. In case the frame is
693 * unaligned, we pad another 2 bytes. */
694 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
695 skb = dev_alloc_skb(len + padding + 2);
696 if (unlikely(!skb)) {
697 err_msg = "Out of memory";
701 skb_put(skb, len + padding);
703 ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
704 q->mmio_base + B43_PIO8_RXDATA,
710 /* Read the last few bytes. */
711 value = b43_piorx_read32(q, B43_PIO8_RXDATA);
712 data = &(skb->data[len + padding - 1]);
715 *data = (value >> 16);
718 *data = (value >> 8);
725 ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
726 q->mmio_base + B43_PIO_RXDATA,
731 /* Read the last byte. */
732 value = b43_piorx_read16(q, B43_PIO_RXDATA);
733 skb->data[len + padding - 1] = value;
737 b43_rx(q->dev, skb, &rxhdr);
743 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
744 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
748 /* RX workqueue. We can sleep, yay! */
749 static void b43_pio_rx_work(struct work_struct *work)
751 struct b43_pio_rxqueue *q = container_of(work, struct b43_pio_rxqueue,
753 unsigned int budget = 50;
757 mutex_lock(&q->dev->wl->mutex);
758 stop = (pio_rx_frame(q) == 0);
759 mutex_unlock(&q->dev->wl->mutex);
766 /* Called with IRQs disabled. */
767 void b43_pio_rx(struct b43_pio_rxqueue *q)
769 /* Due to latency issues we must run the RX path in
770 * a workqueue to be able to schedule between packets. */
771 ieee80211_queue_work(q->dev->wl->hw, &q->rx_work);
774 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
777 b43_piotx_write32(q, B43_PIO8_TXCTL,
778 b43_piotx_read32(q, B43_PIO8_TXCTL)
779 | B43_PIO8_TXCTL_SUSPREQ);
781 b43_piotx_write16(q, B43_PIO_TXCTL,
782 b43_piotx_read16(q, B43_PIO_TXCTL)
783 | B43_PIO_TXCTL_SUSPREQ);
787 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
790 b43_piotx_write32(q, B43_PIO8_TXCTL,
791 b43_piotx_read32(q, B43_PIO8_TXCTL)
792 & ~B43_PIO8_TXCTL_SUSPREQ);
794 b43_piotx_write16(q, B43_PIO_TXCTL,
795 b43_piotx_read16(q, B43_PIO_TXCTL)
796 & ~B43_PIO_TXCTL_SUSPREQ);
800 void b43_pio_tx_suspend(struct b43_wldev *dev)
802 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
803 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
804 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
805 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
806 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
807 b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
810 void b43_pio_tx_resume(struct b43_wldev *dev)
812 b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
813 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
814 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
815 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
816 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
817 b43_power_saving_ctl_bits(dev, 0);