mac80211: rewrite HT handling
[linux-2.6.git] / drivers / net / wireless / ath9k / main.c
1 /*
2  * Copyright (c) 2008 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR       13
25
26 static char *dev_info = "ath9k";
27
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
32
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34         { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
35         { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36         { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
37         { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
38         { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39         { 0 }
40 };
41
42 static int ath_get_channel(struct ath_softc *sc,
43                            struct ieee80211_channel *chan)
44 {
45         int i;
46
47         for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48                 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49                         return i;
50         }
51
52         return -1;
53 }
54
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56                                      struct ieee80211_channel *chan)
57 {
58         u32 chanmode = 0;
59         u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60         enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62         switch (chan->band) {
63         case IEEE80211_BAND_2GHZ:
64                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
65                     (tx_chan_width == ATH9K_HT_MACMODE_20))
66                         chanmode = CHANNEL_G_HT20;
67                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
68                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
69                         chanmode = CHANNEL_G_HT40PLUS;
70                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
71                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
72                         chanmode = CHANNEL_G_HT40MINUS;
73                 break;
74         case IEEE80211_BAND_5GHZ:
75                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
76                     (tx_chan_width == ATH9K_HT_MACMODE_20))
77                         chanmode = CHANNEL_A_HT20;
78                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
79                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
80                         chanmode = CHANNEL_A_HT40PLUS;
81                 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
82                     (tx_chan_width == ATH9K_HT_MACMODE_2040))
83                         chanmode = CHANNEL_A_HT40MINUS;
84                 break;
85         default:
86                 break;
87         }
88
89         return chanmode;
90 }
91
92
93 static int ath_setkey_tkip(struct ath_softc *sc,
94                            struct ieee80211_key_conf *key,
95                            struct ath9k_keyval *hk,
96                            const u8 *addr)
97 {
98         u8 *key_rxmic = NULL;
99         u8 *key_txmic = NULL;
100
101         key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102         key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104         if (addr == NULL) {
105                 /* Group key installation */
106                 memcpy(hk->kv_mic,  key_rxmic, sizeof(hk->kv_mic));
107                 return ath_keyset(sc, key->keyidx, hk, addr);
108         }
109         if (!sc->sc_splitmic) {
110                 /*
111                  * data key goes at first index,
112                  * the hal handles the MIC keys at index+64.
113                  */
114                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116                 return ath_keyset(sc, key->keyidx, hk, addr);
117         }
118         /*
119          * TX key goes at first index, RX key at +32.
120          * The hal handles the MIC keys at index+64.
121          */
122         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123         if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124                 /* Txmic entry failed. No need to proceed further */
125                 DPRINTF(sc, ATH_DBG_KEYCACHE,
126                         "%s Setting TX MIC Key Failed\n", __func__);
127                 return 0;
128         }
129
130         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131         /* XXX delete tx key on failure? */
132         return ath_keyset(sc, key->keyidx+32, hk, addr);
133 }
134
135 static int ath_key_config(struct ath_softc *sc,
136                           const u8 *addr,
137                           struct ieee80211_key_conf *key)
138 {
139         struct ieee80211_vif *vif;
140         struct ath9k_keyval hk;
141         const u8 *mac = NULL;
142         int ret = 0;
143         enum nl80211_iftype opmode;
144
145         memset(&hk, 0, sizeof(hk));
146
147         switch (key->alg) {
148         case ALG_WEP:
149                 hk.kv_type = ATH9K_CIPHER_WEP;
150                 break;
151         case ALG_TKIP:
152                 hk.kv_type = ATH9K_CIPHER_TKIP;
153                 break;
154         case ALG_CCMP:
155                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156                 break;
157         default:
158                 return -EINVAL;
159         }
160
161         hk.kv_len  = key->keylen;
162         memcpy(hk.kv_val, key->key, key->keylen);
163
164         if (!sc->sc_vaps[0])
165                 return -EIO;
166
167         vif = sc->sc_vaps[0]->av_if_data;
168         opmode = vif->type;
169
170         /*
171          *  Strategy:
172          *   For _M_STA mc tx, we will not setup a key at all since we never
173          *   tx mc.
174          *   _M_STA mc rx, we will use the keyID.
175          *   for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176          *   for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177          *   peer node. BUT we will plumb a cleartext key so that we can do
178          *   perSta default key table lookup in software.
179          */
180         if (is_broadcast_ether_addr(addr)) {
181                 switch (opmode) {
182                 case NL80211_IFTYPE_STATION:
183                         /* default key:  could be group WPA key
184                          * or could be static WEP key */
185                         mac = NULL;
186                         break;
187                 case NL80211_IFTYPE_ADHOC:
188                         break;
189                 case NL80211_IFTYPE_AP:
190                         break;
191                 default:
192                         ASSERT(0);
193                         break;
194                 }
195         } else {
196                 mac = addr;
197         }
198
199         if (key->alg == ALG_TKIP)
200                 ret = ath_setkey_tkip(sc, key, &hk, mac);
201         else
202                 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204         if (!ret)
205                 return -EIO;
206
207         return 0;
208 }
209
210 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
211 {
212         int freeslot;
213
214         freeslot = (key->keyidx >= 4) ? 1 : 0;
215         ath_key_reset(sc, key->keyidx, freeslot);
216 }
217
218 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
219 {
220 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3       /* 2 ^ 16 */
221 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6          /* 8 usec */
222
223         ht_info->ht_supported = true;
224         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
225                        IEEE80211_HT_CAP_SM_PS |
226                        IEEE80211_HT_CAP_SGI_40 |
227                        IEEE80211_HT_CAP_DSSSCCK40;
228
229         ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230         ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
231         /* set up supported mcs set */
232         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
233         ht_info->mcs.rx_mask[0] = 0xff;
234         ht_info->mcs.rx_mask[1] = 0xff;
235         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
236 }
237
238 static int ath_rate2idx(struct ath_softc *sc, int rate)
239 {
240         int i = 0, cur_band, n_rates;
241         struct ieee80211_hw *hw = sc->hw;
242
243         cur_band = hw->conf.channel->band;
244         n_rates = sc->sbands[cur_band].n_bitrates;
245
246         for (i = 0; i < n_rates; i++) {
247                 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
248                         break;
249         }
250
251         /*
252          * NB:mac80211 validates rx rate index against the supported legacy rate
253          * index only (should be done against ht rates also), return the highest
254          * legacy rate index for rx rate which does not match any one of the
255          * supported basic and extended rates to make mac80211 happy.
256          * The following hack will be cleaned up once the issue with
257          * the rx rate index validation in mac80211 is fixed.
258          */
259         if (i == n_rates)
260                 return n_rates - 1;
261         return i;
262 }
263
264 static void ath9k_rx_prepare(struct ath_softc *sc,
265                              struct sk_buff *skb,
266                              struct ath_recv_status *status,
267                              struct ieee80211_rx_status *rx_status)
268 {
269         struct ieee80211_hw *hw = sc->hw;
270         struct ieee80211_channel *curchan = hw->conf.channel;
271
272         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
273
274         rx_status->mactime = status->tsf;
275         rx_status->band = curchan->band;
276         rx_status->freq =  curchan->center_freq;
277         rx_status->noise = sc->sc_ani.sc_noise_floor;
278         rx_status->signal = rx_status->noise + status->rssi;
279         rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280         rx_status->antenna = status->antenna;
281
282         /* XXX Fix me, 64 cannot be the max rssi value, rigure it out */
283         rx_status->qual = status->rssi * 100 / 64;
284
285         if (status->flags & ATH_RX_MIC_ERROR)
286                 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287         if (status->flags & ATH_RX_FCS_ERROR)
288                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289
290         rx_status->flag |= RX_FLAG_TSFT;
291 }
292
293 static u8 parse_mpdudensity(u8 mpdudensity)
294 {
295         /*
296          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297          *   0 for no restriction
298          *   1 for 1/4 us
299          *   2 for 1/2 us
300          *   3 for 1 us
301          *   4 for 2 us
302          *   5 for 4 us
303          *   6 for 8 us
304          *   7 for 16 us
305          */
306         switch (mpdudensity) {
307         case 0:
308                 return 0;
309         case 1:
310         case 2:
311         case 3:
312                 /* Our lower layer calculations limit our precision to
313                    1 microsecond */
314                 return 1;
315         case 4:
316                 return 2;
317         case 5:
318                 return 4;
319         case 6:
320                 return 8;
321         case 7:
322                 return 16;
323         default:
324                 return 0;
325         }
326 }
327
328 static void ath9k_ht_conf(struct ath_softc *sc,
329                           struct ieee80211_bss_conf *bss_conf)
330 {
331         struct ath_ht_info *ht_info = &sc->sc_ht_info;
332
333         if (sc->hw->conf.ht.enabled) {
334                 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
335
336                 if (bss_conf->ht.width_40_ok)
337                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
338                 else
339                         ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
340
341                 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
342         }
343 }
344
345 static void ath9k_bss_assoc_info(struct ath_softc *sc,
346                                  struct ieee80211_bss_conf *bss_conf)
347 {
348         struct ieee80211_hw *hw = sc->hw;
349         struct ieee80211_channel *curchan = hw->conf.channel;
350         struct ath_vap *avp;
351         int pos;
352
353         if (bss_conf->assoc) {
354                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
355                         __func__,
356                         bss_conf->aid);
357
358                 avp = sc->sc_vaps[0];
359                 if (avp == NULL) {
360                         DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
361                                 __func__);
362                         return;
363                 }
364
365                 /* New association, store aid */
366                 if (avp->av_opmode == ATH9K_M_STA) {
367                         sc->sc_curaid = bss_conf->aid;
368                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
369                                                sc->sc_curaid);
370                 }
371
372                 /* Configure the beacon */
373                 ath_beacon_config(sc, 0);
374                 sc->sc_flags |= SC_OP_BEACONS;
375
376                 /* Reset rssi stats */
377                 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
378                 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
379                 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
380                 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
381
382                 /* Update chainmask */
383                 ath_update_chainmask(sc, hw->conf.ht.enabled);
384
385                 DPRINTF(sc, ATH_DBG_CONFIG,
386                         "%s: bssid %pM aid 0x%x\n",
387                         __func__,
388                         sc->sc_curbssid, sc->sc_curaid);
389
390                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
391                         __func__,
392                         curchan->center_freq);
393
394                 pos = ath_get_channel(sc, curchan);
395                 if (pos == -1) {
396                         DPRINTF(sc, ATH_DBG_FATAL,
397                                 "%s: Invalid channel\n", __func__);
398                         return;
399                 }
400
401                 if (hw->conf.ht.enabled)
402                         sc->sc_ah->ah_channels[pos].chanmode =
403                                 ath_get_extchanmode(sc, curchan);
404                 else
405                         sc->sc_ah->ah_channels[pos].chanmode =
406                                 (curchan->band == IEEE80211_BAND_2GHZ) ?
407                                 CHANNEL_G : CHANNEL_A;
408
409                 /* set h/w channel */
410                 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
411                         DPRINTF(sc, ATH_DBG_FATAL,
412                                 "%s: Unable to set channel\n",
413                                 __func__);
414
415                 ath_rate_newstate(sc, avp);
416                 /* Update ratectrl about the new state */
417                 ath_rc_node_update(hw, avp->rc_node);
418
419                 /* Start ANI */
420                 mod_timer(&sc->sc_ani.timer,
421                         jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
422
423         } else {
424                 DPRINTF(sc, ATH_DBG_CONFIG,
425                 "%s: Bss Info DISSOC\n", __func__);
426                 sc->sc_curaid = 0;
427         }
428 }
429
430 void ath_get_beaconconfig(struct ath_softc *sc,
431                           int if_id,
432                           struct ath_beacon_config *conf)
433 {
434         struct ieee80211_hw *hw = sc->hw;
435
436         /* fill in beacon config data */
437
438         conf->beacon_interval = hw->conf.beacon_int;
439         conf->listen_interval = 100;
440         conf->dtim_count = 1;
441         conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
442 }
443
444 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
445                      struct ath_xmit_status *tx_status, struct ath_node *an)
446 {
447         struct ieee80211_hw *hw = sc->hw;
448         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
449
450         DPRINTF(sc, ATH_DBG_XMIT,
451                 "%s: TX complete: skb: %p\n", __func__, skb);
452
453         if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
454                 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
455                 /* free driver's private data area of tx_info */
456                 if (tx_info->driver_data[0] != NULL)
457                         kfree(tx_info->driver_data[0]);
458                         tx_info->driver_data[0] = NULL;
459         }
460
461         if (tx_status->flags & ATH_TX_BAR) {
462                 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
463                 tx_status->flags &= ~ATH_TX_BAR;
464         }
465
466         if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
467                 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
468                         /* Frame was not ACKed, but an ACK was expected */
469                         tx_info->status.excessive_retries = 1;
470                 }
471         } else {
472                 /* Frame was ACKed */
473                 tx_info->flags |= IEEE80211_TX_STAT_ACK;
474         }
475
476         tx_info->status.retry_count = tx_status->retries;
477
478         ieee80211_tx_status(hw, skb);
479         if (an)
480                 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
481 }
482
483 int _ath_rx_indicate(struct ath_softc *sc,
484                      struct sk_buff *skb,
485                      struct ath_recv_status *status,
486                      u16 keyix)
487 {
488         struct ieee80211_hw *hw = sc->hw;
489         struct ath_node *an = NULL;
490         struct ieee80211_rx_status rx_status;
491         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
492         int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
493         int padsize;
494         enum ATH_RX_TYPE st;
495
496         /* see if any padding is done by the hw and remove it */
497         if (hdrlen & 3) {
498                 padsize = hdrlen % 4;
499                 memmove(skb->data + padsize, skb->data, hdrlen);
500                 skb_pull(skb, padsize);
501         }
502
503         /* Prepare rx status */
504         ath9k_rx_prepare(sc, skb, status, &rx_status);
505
506         if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
507             !(status->flags & ATH_RX_DECRYPT_ERROR)) {
508                 rx_status.flag |= RX_FLAG_DECRYPTED;
509         } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
510                    && !(status->flags & ATH_RX_DECRYPT_ERROR)
511                    && skb->len >= hdrlen + 4) {
512                 keyix = skb->data[hdrlen + 3] >> 6;
513
514                 if (test_bit(keyix, sc->sc_keymap))
515                         rx_status.flag |= RX_FLAG_DECRYPTED;
516         }
517
518         spin_lock_bh(&sc->node_lock);
519         an = ath_node_find(sc, hdr->addr2);
520         spin_unlock_bh(&sc->node_lock);
521
522         if (an) {
523                 ath_rx_input(sc, an,
524                              skb, status, &st);
525         }
526         if (!an || (st != ATH_RX_CONSUMED))
527                 __ieee80211_rx(hw, skb, &rx_status);
528
529         return 0;
530 }
531
532 int ath_rx_subframe(struct ath_node *an,
533                     struct sk_buff *skb,
534                     struct ath_recv_status *status)
535 {
536         struct ath_softc *sc = an->an_sc;
537         struct ieee80211_hw *hw = sc->hw;
538         struct ieee80211_rx_status rx_status;
539
540         /* Prepare rx status */
541         ath9k_rx_prepare(sc, skb, status, &rx_status);
542         if (!(status->flags & ATH_RX_DECRYPT_ERROR))
543                 rx_status.flag |= RX_FLAG_DECRYPTED;
544
545         __ieee80211_rx(hw, skb, &rx_status);
546
547         return 0;
548 }
549
550 /********************************/
551 /*       LED functions          */
552 /********************************/
553
554 static void ath_led_brightness(struct led_classdev *led_cdev,
555                                enum led_brightness brightness)
556 {
557         struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
558         struct ath_softc *sc = led->sc;
559
560         switch (brightness) {
561         case LED_OFF:
562                 if (led->led_type == ATH_LED_ASSOC ||
563                     led->led_type == ATH_LED_RADIO)
564                         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
565                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
566                                 (led->led_type == ATH_LED_RADIO) ? 1 :
567                                 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
568                 break;
569         case LED_FULL:
570                 if (led->led_type == ATH_LED_ASSOC)
571                         sc->sc_flags |= SC_OP_LED_ASSOCIATED;
572                 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
573                 break;
574         default:
575                 break;
576         }
577 }
578
579 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
580                             char *trigger)
581 {
582         int ret;
583
584         led->sc = sc;
585         led->led_cdev.name = led->name;
586         led->led_cdev.default_trigger = trigger;
587         led->led_cdev.brightness_set = ath_led_brightness;
588
589         ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
590         if (ret)
591                 DPRINTF(sc, ATH_DBG_FATAL,
592                         "Failed to register led:%s", led->name);
593         else
594                 led->registered = 1;
595         return ret;
596 }
597
598 static void ath_unregister_led(struct ath_led *led)
599 {
600         if (led->registered) {
601                 led_classdev_unregister(&led->led_cdev);
602                 led->registered = 0;
603         }
604 }
605
606 static void ath_deinit_leds(struct ath_softc *sc)
607 {
608         ath_unregister_led(&sc->assoc_led);
609         sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
610         ath_unregister_led(&sc->tx_led);
611         ath_unregister_led(&sc->rx_led);
612         ath_unregister_led(&sc->radio_led);
613         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
614 }
615
616 static void ath_init_leds(struct ath_softc *sc)
617 {
618         char *trigger;
619         int ret;
620
621         /* Configure gpio 1 for output */
622         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
623                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
624         /* LED off, active low */
625         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
626
627         trigger = ieee80211_get_radio_led_name(sc->hw);
628         snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
629                 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
630         ret = ath_register_led(sc, &sc->radio_led, trigger);
631         sc->radio_led.led_type = ATH_LED_RADIO;
632         if (ret)
633                 goto fail;
634
635         trigger = ieee80211_get_assoc_led_name(sc->hw);
636         snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
637                 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
638         ret = ath_register_led(sc, &sc->assoc_led, trigger);
639         sc->assoc_led.led_type = ATH_LED_ASSOC;
640         if (ret)
641                 goto fail;
642
643         trigger = ieee80211_get_tx_led_name(sc->hw);
644         snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
645                 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
646         ret = ath_register_led(sc, &sc->tx_led, trigger);
647         sc->tx_led.led_type = ATH_LED_TX;
648         if (ret)
649                 goto fail;
650
651         trigger = ieee80211_get_rx_led_name(sc->hw);
652         snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
653                 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
654         ret = ath_register_led(sc, &sc->rx_led, trigger);
655         sc->rx_led.led_type = ATH_LED_RX;
656         if (ret)
657                 goto fail;
658
659         return;
660
661 fail:
662         ath_deinit_leds(sc);
663 }
664
665 #ifdef CONFIG_RFKILL
666 /*******************/
667 /*      Rfkill     */
668 /*******************/
669
670 static void ath_radio_enable(struct ath_softc *sc)
671 {
672         struct ath_hal *ah = sc->sc_ah;
673         int status;
674
675         spin_lock_bh(&sc->sc_resetlock);
676         if (!ath9k_hw_reset(ah, ah->ah_curchan,
677                             sc->sc_ht_info.tx_chan_width,
678                             sc->sc_tx_chainmask,
679                             sc->sc_rx_chainmask,
680                             sc->sc_ht_extprotspacing,
681                             false, &status)) {
682                 DPRINTF(sc, ATH_DBG_FATAL,
683                         "%s: unable to reset channel %u (%uMhz) "
684                         "flags 0x%x hal status %u\n", __func__,
685                         ath9k_hw_mhz2ieee(ah,
686                                           ah->ah_curchan->channel,
687                                           ah->ah_curchan->channelFlags),
688                         ah->ah_curchan->channel,
689                         ah->ah_curchan->channelFlags, status);
690         }
691         spin_unlock_bh(&sc->sc_resetlock);
692
693         ath_update_txpow(sc);
694         if (ath_startrecv(sc) != 0) {
695                 DPRINTF(sc, ATH_DBG_FATAL,
696                         "%s: unable to restart recv logic\n", __func__);
697                 return;
698         }
699
700         if (sc->sc_flags & SC_OP_BEACONS)
701                 ath_beacon_config(sc, ATH_IF_ID_ANY);   /* restart beacons */
702
703         /* Re-Enable  interrupts */
704         ath9k_hw_set_interrupts(ah, sc->sc_imask);
705
706         /* Enable LED */
707         ath9k_hw_cfg_output(ah, ATH_LED_PIN,
708                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
709         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
710
711         ieee80211_wake_queues(sc->hw);
712 }
713
714 static void ath_radio_disable(struct ath_softc *sc)
715 {
716         struct ath_hal *ah = sc->sc_ah;
717         int status;
718
719
720         ieee80211_stop_queues(sc->hw);
721
722         /* Disable LED */
723         ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
724         ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
725
726         /* Disable interrupts */
727         ath9k_hw_set_interrupts(ah, 0);
728
729         ath_draintxq(sc, false);        /* clear pending tx frames */
730         ath_stoprecv(sc);               /* turn off frame recv */
731         ath_flushrecv(sc);              /* flush recv queue */
732
733         spin_lock_bh(&sc->sc_resetlock);
734         if (!ath9k_hw_reset(ah, ah->ah_curchan,
735                             sc->sc_ht_info.tx_chan_width,
736                             sc->sc_tx_chainmask,
737                             sc->sc_rx_chainmask,
738                             sc->sc_ht_extprotspacing,
739                             false, &status)) {
740                 DPRINTF(sc, ATH_DBG_FATAL,
741                         "%s: unable to reset channel %u (%uMhz) "
742                         "flags 0x%x hal status %u\n", __func__,
743                         ath9k_hw_mhz2ieee(ah,
744                                 ah->ah_curchan->channel,
745                                 ah->ah_curchan->channelFlags),
746                         ah->ah_curchan->channel,
747                         ah->ah_curchan->channelFlags, status);
748         }
749         spin_unlock_bh(&sc->sc_resetlock);
750
751         ath9k_hw_phy_disable(ah);
752         ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
753 }
754
755 static bool ath_is_rfkill_set(struct ath_softc *sc)
756 {
757         struct ath_hal *ah = sc->sc_ah;
758
759         return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
760                                   ah->ah_rfkill_polarity;
761 }
762
763 /* h/w rfkill poll function */
764 static void ath_rfkill_poll(struct work_struct *work)
765 {
766         struct ath_softc *sc = container_of(work, struct ath_softc,
767                                             rf_kill.rfkill_poll.work);
768         bool radio_on;
769
770         if (sc->sc_flags & SC_OP_INVALID)
771                 return;
772
773         radio_on = !ath_is_rfkill_set(sc);
774
775         /*
776          * enable/disable radio only when there is a
777          * state change in RF switch
778          */
779         if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
780                 enum rfkill_state state;
781
782                 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
783                         state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
784                                 : RFKILL_STATE_HARD_BLOCKED;
785                 } else if (radio_on) {
786                         ath_radio_enable(sc);
787                         state = RFKILL_STATE_UNBLOCKED;
788                 } else {
789                         ath_radio_disable(sc);
790                         state = RFKILL_STATE_HARD_BLOCKED;
791                 }
792
793                 if (state == RFKILL_STATE_HARD_BLOCKED)
794                         sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
795                 else
796                         sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
797
798                 rfkill_force_state(sc->rf_kill.rfkill, state);
799         }
800
801         queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
802                            msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
803 }
804
805 /* s/w rfkill handler */
806 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
807 {
808         struct ath_softc *sc = data;
809
810         switch (state) {
811         case RFKILL_STATE_SOFT_BLOCKED:
812                 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
813                     SC_OP_RFKILL_SW_BLOCKED)))
814                         ath_radio_disable(sc);
815                 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
816                 return 0;
817         case RFKILL_STATE_UNBLOCKED:
818                 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
819                         sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
820                         if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
821                                 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
822                                         "radio as it is disabled by h/w \n");
823                                 return -EPERM;
824                         }
825                         ath_radio_enable(sc);
826                 }
827                 return 0;
828         default:
829                 return -EINVAL;
830         }
831 }
832
833 /* Init s/w rfkill */
834 static int ath_init_sw_rfkill(struct ath_softc *sc)
835 {
836         sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
837                                              RFKILL_TYPE_WLAN);
838         if (!sc->rf_kill.rfkill) {
839                 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
840                 return -ENOMEM;
841         }
842
843         snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
844                 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
845         sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
846         sc->rf_kill.rfkill->data = sc;
847         sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
848         sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
849         sc->rf_kill.rfkill->user_claim_unsupported = 1;
850
851         return 0;
852 }
853
854 /* Deinitialize rfkill */
855 static void ath_deinit_rfkill(struct ath_softc *sc)
856 {
857         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
858                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
859
860         if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
861                 rfkill_unregister(sc->rf_kill.rfkill);
862                 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
863                 sc->rf_kill.rfkill = NULL;
864         }
865 }
866 #endif /* CONFIG_RFKILL */
867
868 static int ath_detach(struct ath_softc *sc)
869 {
870         struct ieee80211_hw *hw = sc->hw;
871
872         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
873
874         /* Deinit LED control */
875         ath_deinit_leds(sc);
876
877 #ifdef CONFIG_RFKILL
878         /* deinit rfkill */
879         ath_deinit_rfkill(sc);
880 #endif
881
882         /* Unregister hw */
883
884         ieee80211_unregister_hw(hw);
885
886         /* unregister Rate control */
887         ath_rate_control_unregister();
888
889         /* tx/rx cleanup */
890
891         ath_rx_cleanup(sc);
892         ath_tx_cleanup(sc);
893
894         /* Deinit */
895
896         ath_deinit(sc);
897
898         return 0;
899 }
900
901 static int ath_attach(u16 devid,
902                       struct ath_softc *sc)
903 {
904         struct ieee80211_hw *hw = sc->hw;
905         int error = 0;
906
907         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
908
909         error = ath_init(devid, sc);
910         if (error != 0)
911                 return error;
912
913         /* Init nodes */
914
915         INIT_LIST_HEAD(&sc->node_list);
916         spin_lock_init(&sc->node_lock);
917
918         /* get mac address from hardware and set in mac80211 */
919
920         SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
921
922         /* setup channels and rates */
923
924         sc->sbands[IEEE80211_BAND_2GHZ].channels =
925                 sc->channels[IEEE80211_BAND_2GHZ];
926         sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
927                 sc->rates[IEEE80211_BAND_2GHZ];
928         sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
929
930         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
931                 /* Setup HT capabilities for 2.4Ghz*/
932                 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
933
934         hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
935                 &sc->sbands[IEEE80211_BAND_2GHZ];
936
937         if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
938                 sc->sbands[IEEE80211_BAND_5GHZ].channels =
939                         sc->channels[IEEE80211_BAND_5GHZ];
940                 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
941                         sc->rates[IEEE80211_BAND_5GHZ];
942                 sc->sbands[IEEE80211_BAND_5GHZ].band =
943                         IEEE80211_BAND_5GHZ;
944
945                 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
946                         /* Setup HT capabilities for 5Ghz*/
947                         setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
948
949                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
950                         &sc->sbands[IEEE80211_BAND_5GHZ];
951         }
952
953         /* FIXME: Have to figure out proper hw init values later */
954
955         hw->queues = 4;
956         hw->ampdu_queues = 1;
957
958         /* Register rate control */
959         hw->rate_control_algorithm = "ath9k_rate_control";
960         error = ath_rate_control_register();
961         if (error != 0) {
962                 DPRINTF(sc, ATH_DBG_FATAL,
963                         "%s: Unable to register rate control "
964                         "algorithm:%d\n", __func__, error);
965                 ath_rate_control_unregister();
966                 goto bad;
967         }
968
969         error = ieee80211_register_hw(hw);
970         if (error != 0) {
971                 ath_rate_control_unregister();
972                 goto bad;
973         }
974
975         /* Initialize LED control */
976         ath_init_leds(sc);
977
978 #ifdef CONFIG_RFKILL
979         /* Initialze h/w Rfkill */
980         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
981                 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
982
983         /* Initialize s/w rfkill */
984         if (ath_init_sw_rfkill(sc))
985                 goto detach;
986 #endif
987
988         /* initialize tx/rx engine */
989
990         error = ath_tx_init(sc, ATH_TXBUF);
991         if (error != 0)
992                 goto detach;
993
994         error = ath_rx_init(sc, ATH_RXBUF);
995         if (error != 0)
996                 goto detach;
997
998         return 0;
999 detach:
1000         ath_detach(sc);
1001 bad:
1002         return error;
1003 }
1004
1005 static int ath9k_start(struct ieee80211_hw *hw)
1006 {
1007         struct ath_softc *sc = hw->priv;
1008         struct ieee80211_channel *curchan = hw->conf.channel;
1009         int error = 0, pos;
1010
1011         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1012                 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1013
1014         /* setup initial channel */
1015
1016         pos = ath_get_channel(sc, curchan);
1017         if (pos == -1) {
1018                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1019                 return -EINVAL;
1020         }
1021
1022         sc->sc_ah->ah_channels[pos].chanmode =
1023                 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1024
1025         /* open ath_dev */
1026         error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1027         if (error) {
1028                 DPRINTF(sc, ATH_DBG_FATAL,
1029                         "%s: Unable to complete ath_open\n", __func__);
1030                 return error;
1031         }
1032
1033 #ifdef CONFIG_RFKILL
1034         /* Start rfkill polling */
1035         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1036                 queue_delayed_work(sc->hw->workqueue,
1037                                    &sc->rf_kill.rfkill_poll, 0);
1038
1039         if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1040                 if (rfkill_register(sc->rf_kill.rfkill)) {
1041                         DPRINTF(sc, ATH_DBG_FATAL,
1042                                         "Unable to register rfkill\n");
1043                         rfkill_free(sc->rf_kill.rfkill);
1044
1045                         /* Deinitialize the device */
1046                         if (sc->pdev->irq)
1047                                 free_irq(sc->pdev->irq, sc);
1048                         ath_detach(sc);
1049                         pci_iounmap(sc->pdev, sc->mem);
1050                         pci_release_region(sc->pdev, 0);
1051                         pci_disable_device(sc->pdev);
1052                         ieee80211_free_hw(hw);
1053                         return -EIO;
1054                 } else {
1055                         sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1056                 }
1057         }
1058 #endif
1059
1060         ieee80211_wake_queues(hw);
1061         return 0;
1062 }
1063
1064 static int ath9k_tx(struct ieee80211_hw *hw,
1065                     struct sk_buff *skb)
1066 {
1067         struct ath_softc *sc = hw->priv;
1068         int hdrlen, padsize;
1069         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1070
1071         /*
1072          * As a temporary workaround, assign seq# here; this will likely need
1073          * to be cleaned up to work better with Beacon transmission and virtual
1074          * BSSes.
1075          */
1076         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1077                 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1078                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1079                         sc->seq_no += 0x10;
1080                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1081                 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1082         }
1083
1084         /* Add the padding after the header if this is not already done */
1085         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1086         if (hdrlen & 3) {
1087                 padsize = hdrlen % 4;
1088                 if (skb_headroom(skb) < padsize)
1089                         return -1;
1090                 skb_push(skb, padsize);
1091                 memmove(skb->data, skb->data + padsize, hdrlen);
1092         }
1093
1094         DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1095                 __func__,
1096                 skb);
1097
1098         if (ath_tx_start(sc, skb) != 0) {
1099                 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1100                 dev_kfree_skb_any(skb);
1101                 /* FIXME: Check for proper return value from ATH_DEV */
1102                 return 0;
1103         }
1104
1105         return 0;
1106 }
1107
1108 static void ath9k_stop(struct ieee80211_hw *hw)
1109 {
1110         struct ath_softc *sc = hw->priv;
1111         int error;
1112
1113         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1114
1115         error = ath_suspend(sc);
1116         if (error)
1117                 DPRINTF(sc, ATH_DBG_CONFIG,
1118                         "%s: Device is no longer present\n", __func__);
1119
1120         ieee80211_stop_queues(hw);
1121
1122 #ifdef CONFIG_RFKILL
1123         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1124                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1125 #endif
1126 }
1127
1128 static int ath9k_add_interface(struct ieee80211_hw *hw,
1129                                struct ieee80211_if_init_conf *conf)
1130 {
1131         struct ath_softc *sc = hw->priv;
1132         int error, ic_opmode = 0;
1133
1134         /* Support only vap for now */
1135
1136         if (sc->sc_nvaps)
1137                 return -ENOBUFS;
1138
1139         switch (conf->type) {
1140         case NL80211_IFTYPE_STATION:
1141                 ic_opmode = ATH9K_M_STA;
1142                 break;
1143         case NL80211_IFTYPE_ADHOC:
1144                 ic_opmode = ATH9K_M_IBSS;
1145                 break;
1146         case NL80211_IFTYPE_AP:
1147                 ic_opmode = ATH9K_M_HOSTAP;
1148                 break;
1149         default:
1150                 DPRINTF(sc, ATH_DBG_FATAL,
1151                         "%s: Interface type %d not yet supported\n",
1152                         __func__, conf->type);
1153                 return -EOPNOTSUPP;
1154         }
1155
1156         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1157                 __func__,
1158                 ic_opmode);
1159
1160         error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1161         if (error) {
1162                 DPRINTF(sc, ATH_DBG_FATAL,
1163                         "%s: Unable to attach vap, error: %d\n",
1164                         __func__, error);
1165                 return error;
1166         }
1167
1168         if (conf->type == NL80211_IFTYPE_AP) {
1169                 /* TODO: is this a suitable place to start ANI for AP mode? */
1170                 /* Start ANI */
1171                 mod_timer(&sc->sc_ani.timer,
1172                           jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1173         }
1174
1175         return 0;
1176 }
1177
1178 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1179                                    struct ieee80211_if_init_conf *conf)
1180 {
1181         struct ath_softc *sc = hw->priv;
1182         struct ath_vap *avp;
1183         int error;
1184
1185         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1186
1187         avp = sc->sc_vaps[0];
1188         if (avp == NULL) {
1189                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1190                         __func__);
1191                 return;
1192         }
1193
1194 #ifdef CONFIG_SLOW_ANT_DIV
1195         ath_slow_ant_div_stop(&sc->sc_antdiv);
1196 #endif
1197         /* Stop ANI */
1198         del_timer_sync(&sc->sc_ani.timer);
1199
1200         /* Update ratectrl */
1201         ath_rate_newstate(sc, avp);
1202
1203         /* Reclaim beacon resources */
1204         if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1205             sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1206                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1207                 ath_beacon_return(sc, avp);
1208         }
1209
1210         /* Set interrupt mask */
1211         sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1212         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1213         sc->sc_flags &= ~SC_OP_BEACONS;
1214
1215         error = ath_vap_detach(sc, 0);
1216         if (error)
1217                 DPRINTF(sc, ATH_DBG_FATAL,
1218                         "%s: Unable to detach vap, error: %d\n",
1219                         __func__, error);
1220 }
1221
1222 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1223 {
1224         struct ath_softc *sc = hw->priv;
1225         struct ieee80211_channel *curchan = hw->conf.channel;
1226         struct ieee80211_conf *conf = &hw->conf;
1227         int pos;
1228
1229         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1230                 __func__,
1231                 curchan->center_freq);
1232
1233         /* Update chainmask */
1234         ath_update_chainmask(sc, conf->ht.enabled);
1235
1236         pos = ath_get_channel(sc, curchan);
1237         if (pos == -1) {
1238                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1239                 return -EINVAL;
1240         }
1241
1242         sc->sc_ah->ah_channels[pos].chanmode =
1243                 (curchan->band == IEEE80211_BAND_2GHZ) ?
1244                 CHANNEL_G : CHANNEL_A;
1245
1246         if (sc->sc_curaid && hw->conf.ht.enabled)
1247                 sc->sc_ah->ah_channels[pos].chanmode =
1248                         ath_get_extchanmode(sc, curchan);
1249
1250         sc->sc_config.txpowlimit = 2 * conf->power_level;
1251
1252         /* set h/w channel */
1253         if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1254                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1255                         __func__);
1256
1257         return 0;
1258 }
1259
1260 static int ath9k_config_interface(struct ieee80211_hw *hw,
1261                                   struct ieee80211_vif *vif,
1262                                   struct ieee80211_if_conf *conf)
1263 {
1264         struct ath_softc *sc = hw->priv;
1265         struct ath_hal *ah = sc->sc_ah;
1266         struct ath_vap *avp;
1267         u32 rfilt = 0;
1268         int error, i;
1269
1270         avp = sc->sc_vaps[0];
1271         if (avp == NULL) {
1272                 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1273                         __func__);
1274                 return -EINVAL;
1275         }
1276
1277         /* TODO: Need to decide which hw opmode to use for multi-interface
1278          * cases */
1279         if (vif->type == NL80211_IFTYPE_AP &&
1280             ah->ah_opmode != ATH9K_M_HOSTAP) {
1281                 ah->ah_opmode = ATH9K_M_HOSTAP;
1282                 ath9k_hw_setopmode(ah);
1283                 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1284                 /* Request full reset to get hw opmode changed properly */
1285                 sc->sc_flags |= SC_OP_FULL_RESET;
1286         }
1287
1288         if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1289             !is_zero_ether_addr(conf->bssid)) {
1290                 switch (vif->type) {
1291                 case NL80211_IFTYPE_STATION:
1292                 case NL80211_IFTYPE_ADHOC:
1293                         /* Update ratectrl about the new state */
1294                         ath_rate_newstate(sc, avp);
1295
1296                         /* Set BSSID */
1297                         memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1298                         sc->sc_curaid = 0;
1299                         ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1300                                                sc->sc_curaid);
1301
1302                         /* Set aggregation protection mode parameters */
1303                         sc->sc_config.ath_aggr_prot = 0;
1304
1305                         /*
1306                          * Reset our TSF so that its value is lower than the
1307                          * beacon that we are trying to catch.
1308                          * Only then hw will update its TSF register with the
1309                          * new beacon. Reset the TSF before setting the BSSID
1310                          * to avoid allowing in any frames that would update
1311                          * our TSF only to have us clear it
1312                          * immediately thereafter.
1313                          */
1314                         ath9k_hw_reset_tsf(sc->sc_ah);
1315
1316                         /* Disable BMISS interrupt when we're not associated */
1317                         ath9k_hw_set_interrupts(sc->sc_ah,
1318                                         sc->sc_imask &
1319                                         ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1320                         sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1321
1322                         DPRINTF(sc, ATH_DBG_CONFIG,
1323                                 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1324                                 __func__, rfilt,
1325                                 sc->sc_curbssid, sc->sc_curaid);
1326
1327                         /* need to reconfigure the beacon */
1328                         sc->sc_flags &= ~SC_OP_BEACONS ;
1329
1330                         break;
1331                 default:
1332                         break;
1333                 }
1334         }
1335
1336         if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1337             ((vif->type == NL80211_IFTYPE_ADHOC) ||
1338              (vif->type == NL80211_IFTYPE_AP))) {
1339                 /*
1340                  * Allocate and setup the beacon frame.
1341                  *
1342                  * Stop any previous beacon DMA.  This may be
1343                  * necessary, for example, when an ibss merge
1344                  * causes reconfiguration; we may be called
1345                  * with beacon transmission active.
1346                  */
1347                 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1348
1349                 error = ath_beacon_alloc(sc, 0);
1350                 if (error != 0)
1351                         return error;
1352
1353                 ath_beacon_sync(sc, 0);
1354         }
1355
1356         /* Check for WLAN_CAPABILITY_PRIVACY ? */
1357         if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1358                 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1359                         if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1360                                 ath9k_hw_keysetmac(sc->sc_ah,
1361                                                    (u16)i,
1362                                                    sc->sc_curbssid);
1363         }
1364
1365         /* Only legacy IBSS for now */
1366         if (vif->type == NL80211_IFTYPE_ADHOC)
1367                 ath_update_chainmask(sc, 0);
1368
1369         return 0;
1370 }
1371
1372 #define SUPPORTED_FILTERS                       \
1373         (FIF_PROMISC_IN_BSS |                   \
1374         FIF_ALLMULTI |                          \
1375         FIF_CONTROL |                           \
1376         FIF_OTHER_BSS |                         \
1377         FIF_BCN_PRBRESP_PROMISC |               \
1378         FIF_FCSFAIL)
1379
1380 /* FIXME: sc->sc_full_reset ? */
1381 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1382                                    unsigned int changed_flags,
1383                                    unsigned int *total_flags,
1384                                    int mc_count,
1385                                    struct dev_mc_list *mclist)
1386 {
1387         struct ath_softc *sc = hw->priv;
1388         u32 rfilt;
1389
1390         changed_flags &= SUPPORTED_FILTERS;
1391         *total_flags &= SUPPORTED_FILTERS;
1392
1393         sc->rx_filter = *total_flags;
1394         rfilt = ath_calcrxfilter(sc);
1395         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1396
1397         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1398                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1399                         ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1400         }
1401
1402         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1403                 __func__, sc->rx_filter);
1404 }
1405
1406 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1407                              struct ieee80211_vif *vif,
1408                              enum sta_notify_cmd cmd,
1409                              struct ieee80211_sta *sta)
1410 {
1411         struct ath_softc *sc = hw->priv;
1412         struct ath_node *an;
1413         unsigned long flags;
1414
1415         spin_lock_irqsave(&sc->node_lock, flags);
1416         an = ath_node_find(sc, sta->addr);
1417         spin_unlock_irqrestore(&sc->node_lock, flags);
1418
1419         switch (cmd) {
1420         case STA_NOTIFY_ADD:
1421                 spin_lock_irqsave(&sc->node_lock, flags);
1422                 if (!an) {
1423                         ath_node_attach(sc, sta->addr, 0);
1424                         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %pM\n",
1425                                 __func__, sta->addr);
1426                 } else {
1427                         ath_node_get(sc, sta->addr);
1428                 }
1429
1430                 /* XXX: Is this right? Can the capabilities change? */
1431                 an = ath_node_find(sc, sta->addr);
1432                 an->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
1433                                         sta->ht_cap.ampdu_factor);
1434                 an->mpdudensity =
1435                         parse_mpdudensity(sta->ht_cap.ampdu_density);
1436
1437                 spin_unlock_irqrestore(&sc->node_lock, flags);
1438                 break;
1439         case STA_NOTIFY_REMOVE:
1440                 if (!an)
1441                         DPRINTF(sc, ATH_DBG_FATAL,
1442                                 "%s: Removal of a non-existent node\n",
1443                                 __func__);
1444                 else {
1445                         ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1446                         DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %pM\n",
1447                                 __func__,
1448                                 sta->addr);
1449                 }
1450                 break;
1451         default:
1452                 break;
1453         }
1454 }
1455
1456 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1457                          u16 queue,
1458                          const struct ieee80211_tx_queue_params *params)
1459 {
1460         struct ath_softc *sc = hw->priv;
1461         struct ath9k_tx_queue_info qi;
1462         int ret = 0, qnum;
1463
1464         if (queue >= WME_NUM_AC)
1465                 return 0;
1466
1467         qi.tqi_aifs = params->aifs;
1468         qi.tqi_cwmin = params->cw_min;
1469         qi.tqi_cwmax = params->cw_max;
1470         qi.tqi_burstTime = params->txop;
1471         qnum = ath_get_hal_qnum(queue, sc);
1472
1473         DPRINTF(sc, ATH_DBG_CONFIG,
1474                 "%s: Configure tx [queue/halq] [%d/%d],  "
1475                 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1476                 __func__,
1477                 queue,
1478                 qnum,
1479                 params->aifs,
1480                 params->cw_min,
1481                 params->cw_max,
1482                 params->txop);
1483
1484         ret = ath_txq_update(sc, qnum, &qi);
1485         if (ret)
1486                 DPRINTF(sc, ATH_DBG_FATAL,
1487                         "%s: TXQ Update failed\n", __func__);
1488
1489         return ret;
1490 }
1491
1492 static int ath9k_set_key(struct ieee80211_hw *hw,
1493                          enum set_key_cmd cmd,
1494                          const u8 *local_addr,
1495                          const u8 *addr,
1496                          struct ieee80211_key_conf *key)
1497 {
1498         struct ath_softc *sc = hw->priv;
1499         int ret = 0;
1500
1501         DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1502
1503         switch (cmd) {
1504         case SET_KEY:
1505                 ret = ath_key_config(sc, addr, key);
1506                 if (!ret) {
1507                         set_bit(key->keyidx, sc->sc_keymap);
1508                         key->hw_key_idx = key->keyidx;
1509                         /* push IV and Michael MIC generation to stack */
1510                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1511                         if (key->alg == ALG_TKIP)
1512                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1513                 }
1514                 break;
1515         case DISABLE_KEY:
1516                 ath_key_delete(sc, key);
1517                 clear_bit(key->keyidx, sc->sc_keymap);
1518                 break;
1519         default:
1520                 ret = -EINVAL;
1521         }
1522
1523         return ret;
1524 }
1525
1526 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1527                                    struct ieee80211_vif *vif,
1528                                    struct ieee80211_bss_conf *bss_conf,
1529                                    u32 changed)
1530 {
1531         struct ath_softc *sc = hw->priv;
1532
1533         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1534                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1535                         __func__,
1536                         bss_conf->use_short_preamble);
1537                 if (bss_conf->use_short_preamble)
1538                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1539                 else
1540                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1541         }
1542
1543         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1544                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1545                         __func__,
1546                         bss_conf->use_cts_prot);
1547                 if (bss_conf->use_cts_prot &&
1548                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1549                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1550                 else
1551                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1552         }
1553
1554         if (changed & BSS_CHANGED_HT) {
1555                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1556                         __func__);
1557                 ath9k_ht_conf(sc, bss_conf);
1558         }
1559
1560         if (changed & BSS_CHANGED_ASSOC) {
1561                 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1562                         __func__,
1563                         bss_conf->assoc);
1564                 ath9k_bss_assoc_info(sc, bss_conf);
1565         }
1566 }
1567
1568 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1569 {
1570         u64 tsf;
1571         struct ath_softc *sc = hw->priv;
1572         struct ath_hal *ah = sc->sc_ah;
1573
1574         tsf = ath9k_hw_gettsf64(ah);
1575
1576         return tsf;
1577 }
1578
1579 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1580 {
1581         struct ath_softc *sc = hw->priv;
1582         struct ath_hal *ah = sc->sc_ah;
1583
1584         ath9k_hw_reset_tsf(ah);
1585 }
1586
1587 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1588                        enum ieee80211_ampdu_mlme_action action,
1589                        struct ieee80211_sta *sta,
1590                        u16 tid, u16 *ssn)
1591 {
1592         struct ath_softc *sc = hw->priv;
1593         int ret = 0;
1594
1595         switch (action) {
1596         case IEEE80211_AMPDU_RX_START:
1597                 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
1598                 if (ret < 0)
1599                         DPRINTF(sc, ATH_DBG_FATAL,
1600                                 "%s: Unable to start RX aggregation\n",
1601                                 __func__);
1602                 break;
1603         case IEEE80211_AMPDU_RX_STOP:
1604                 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
1605                 if (ret < 0)
1606                         DPRINTF(sc, ATH_DBG_FATAL,
1607                                 "%s: Unable to stop RX aggregation\n",
1608                                 __func__);
1609                 break;
1610         case IEEE80211_AMPDU_TX_START:
1611                 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
1612                 if (ret < 0)
1613                         DPRINTF(sc, ATH_DBG_FATAL,
1614                                 "%s: Unable to start TX aggregation\n",
1615                                 __func__);
1616                 else
1617                         ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1618                 break;
1619         case IEEE80211_AMPDU_TX_STOP:
1620                 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
1621                 if (ret < 0)
1622                         DPRINTF(sc, ATH_DBG_FATAL,
1623                                 "%s: Unable to stop TX aggregation\n",
1624                                 __func__);
1625
1626                 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1627                 break;
1628         default:
1629                 DPRINTF(sc, ATH_DBG_FATAL,
1630                         "%s: Unknown AMPDU action\n", __func__);
1631         }
1632
1633         return ret;
1634 }
1635
1636 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1637 {
1638         return -EOPNOTSUPP;
1639 }
1640
1641 static struct ieee80211_ops ath9k_ops = {
1642         .tx                 = ath9k_tx,
1643         .start              = ath9k_start,
1644         .stop               = ath9k_stop,
1645         .add_interface      = ath9k_add_interface,
1646         .remove_interface   = ath9k_remove_interface,
1647         .config             = ath9k_config,
1648         .config_interface   = ath9k_config_interface,
1649         .configure_filter   = ath9k_configure_filter,
1650         .get_stats          = NULL,
1651         .sta_notify         = ath9k_sta_notify,
1652         .conf_tx            = ath9k_conf_tx,
1653         .get_tx_stats       = NULL,
1654         .bss_info_changed   = ath9k_bss_info_changed,
1655         .set_tim            = NULL,
1656         .set_key            = ath9k_set_key,
1657         .hw_scan            = NULL,
1658         .get_tkip_seq       = NULL,
1659         .set_rts_threshold  = NULL,
1660         .set_frag_threshold = NULL,
1661         .get_tsf            = ath9k_get_tsf,
1662         .reset_tsf          = ath9k_reset_tsf,
1663         .tx_last_beacon     = NULL,
1664         .ampdu_action       = ath9k_ampdu_action,
1665         .set_frag_threshold = ath9k_no_fragmentation,
1666 };
1667
1668 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1669 {
1670         void __iomem *mem;
1671         struct ath_softc *sc;
1672         struct ieee80211_hw *hw;
1673         const char *athname;
1674         u8 csz;
1675         u32 val;
1676         int ret = 0;
1677
1678         if (pci_enable_device(pdev))
1679                 return -EIO;
1680
1681         /* XXX 32-bit addressing only */
1682         if (pci_set_dma_mask(pdev, 0xffffffff)) {
1683                 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1684                 ret = -ENODEV;
1685                 goto bad;
1686         }
1687
1688         /*
1689          * Cache line size is used to size and align various
1690          * structures used to communicate with the hardware.
1691          */
1692         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1693         if (csz == 0) {
1694                 /*
1695                  * Linux 2.4.18 (at least) writes the cache line size
1696                  * register as a 16-bit wide register which is wrong.
1697                  * We must have this setup properly for rx buffer
1698                  * DMA to work so force a reasonable value here if it
1699                  * comes up zero.
1700                  */
1701                 csz = L1_CACHE_BYTES / sizeof(u32);
1702                 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1703         }
1704         /*
1705          * The default setting of latency timer yields poor results,
1706          * set it to the value used by other systems. It may be worth
1707          * tweaking this setting more.
1708          */
1709         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1710
1711         pci_set_master(pdev);
1712
1713         /*
1714          * Disable the RETRY_TIMEOUT register (0x41) to keep
1715          * PCI Tx retries from interfering with C3 CPU state.
1716          */
1717         pci_read_config_dword(pdev, 0x40, &val);
1718         if ((val & 0x0000ff00) != 0)
1719                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1720
1721         ret = pci_request_region(pdev, 0, "ath9k");
1722         if (ret) {
1723                 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1724                 ret = -ENODEV;
1725                 goto bad;
1726         }
1727
1728         mem = pci_iomap(pdev, 0, 0);
1729         if (!mem) {
1730                 printk(KERN_ERR "PCI memory map error\n") ;
1731                 ret = -EIO;
1732                 goto bad1;
1733         }
1734
1735         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1736         if (hw == NULL) {
1737                 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1738                 goto bad2;
1739         }
1740
1741         hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1742                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1743                 IEEE80211_HW_SIGNAL_DBM |
1744                 IEEE80211_HW_NOISE_DBM;
1745
1746         hw->wiphy->interface_modes =
1747                 BIT(NL80211_IFTYPE_AP) |
1748                 BIT(NL80211_IFTYPE_STATION) |
1749                 BIT(NL80211_IFTYPE_ADHOC);
1750
1751         SET_IEEE80211_DEV(hw, &pdev->dev);
1752         pci_set_drvdata(pdev, hw);
1753
1754         sc = hw->priv;
1755         sc->hw = hw;
1756         sc->pdev = pdev;
1757         sc->mem = mem;
1758
1759         if (ath_attach(id->device, sc) != 0) {
1760                 ret = -ENODEV;
1761                 goto bad3;
1762         }
1763
1764         /* setup interrupt service routine */
1765
1766         if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1767                 printk(KERN_ERR "%s: request_irq failed\n",
1768                         wiphy_name(hw->wiphy));
1769                 ret = -EIO;
1770                 goto bad4;
1771         }
1772
1773         athname = ath9k_hw_probe(id->vendor, id->device);
1774
1775         printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1776                wiphy_name(hw->wiphy),
1777                athname ? athname : "Atheros ???",
1778                (unsigned long)mem, pdev->irq);
1779
1780         return 0;
1781 bad4:
1782         ath_detach(sc);
1783 bad3:
1784         ieee80211_free_hw(hw);
1785 bad2:
1786         pci_iounmap(pdev, mem);
1787 bad1:
1788         pci_release_region(pdev, 0);
1789 bad:
1790         pci_disable_device(pdev);
1791         return ret;
1792 }
1793
1794 static void ath_pci_remove(struct pci_dev *pdev)
1795 {
1796         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1797         struct ath_softc *sc = hw->priv;
1798         enum ath9k_int status;
1799
1800         if (pdev->irq) {
1801                 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1802                 /* clear the ISR */
1803                 ath9k_hw_getisr(sc->sc_ah, &status);
1804                 sc->sc_flags |= SC_OP_INVALID;
1805                 free_irq(pdev->irq, sc);
1806         }
1807         ath_detach(sc);
1808
1809         pci_iounmap(pdev, sc->mem);
1810         pci_release_region(pdev, 0);
1811         pci_disable_device(pdev);
1812         ieee80211_free_hw(hw);
1813 }
1814
1815 #ifdef CONFIG_PM
1816
1817 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1818 {
1819         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1820         struct ath_softc *sc = hw->priv;
1821
1822         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1823
1824 #ifdef CONFIG_RFKILL
1825         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1826                 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1827 #endif
1828
1829         pci_save_state(pdev);
1830         pci_disable_device(pdev);
1831         pci_set_power_state(pdev, 3);
1832
1833         return 0;
1834 }
1835
1836 static int ath_pci_resume(struct pci_dev *pdev)
1837 {
1838         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1839         struct ath_softc *sc = hw->priv;
1840         u32 val;
1841         int err;
1842
1843         err = pci_enable_device(pdev);
1844         if (err)
1845                 return err;
1846         pci_restore_state(pdev);
1847         /*
1848          * Suspend/Resume resets the PCI configuration space, so we have to
1849          * re-disable the RETRY_TIMEOUT register (0x41) to keep
1850          * PCI Tx retries from interfering with C3 CPU state
1851          */
1852         pci_read_config_dword(pdev, 0x40, &val);
1853         if ((val & 0x0000ff00) != 0)
1854                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1855
1856         /* Enable LED */
1857         ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1858                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1859         ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1860
1861 #ifdef CONFIG_RFKILL
1862         /*
1863          * check the h/w rfkill state on resume
1864          * and start the rfkill poll timer
1865          */
1866         if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1867                 queue_delayed_work(sc->hw->workqueue,
1868                                    &sc->rf_kill.rfkill_poll, 0);
1869 #endif
1870
1871         return 0;
1872 }
1873
1874 #endif /* CONFIG_PM */
1875
1876 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1877
1878 static struct pci_driver ath_pci_driver = {
1879         .name       = "ath9k",
1880         .id_table   = ath_pci_id_table,
1881         .probe      = ath_pci_probe,
1882         .remove     = ath_pci_remove,
1883 #ifdef CONFIG_PM
1884         .suspend    = ath_pci_suspend,
1885         .resume     = ath_pci_resume,
1886 #endif /* CONFIG_PM */
1887 };
1888
1889 static int __init init_ath_pci(void)
1890 {
1891         printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1892
1893         if (pci_register_driver(&ath_pci_driver) < 0) {
1894                 printk(KERN_ERR
1895                         "ath_pci: No devices found, driver not installed.\n");
1896                 pci_unregister_driver(&ath_pci_driver);
1897                 return -ENODEV;
1898         }
1899
1900         return 0;
1901 }
1902 module_init(init_ath_pci);
1903
1904 static void __exit exit_ath_pci(void)
1905 {
1906         pci_unregister_driver(&ath_pci_driver);
1907         printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1908 }
1909 module_exit(exit_ath_pci);