2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
227 if (sc->sc_flags & SC_OP_INVALID)
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
237 spin_lock_bh(&sc->sc_pcu_lock);
240 * This is only performed if the channel settings have
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
251 if (!ath_stoprecv(sc))
254 if (!ath9k_hw_check_alive(ah))
257 /* XXX: do not flush receive queue here. We don't want
258 * to flush data frames already in queue because of
259 * changing channel. */
261 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
264 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
265 caldata = &aphy->caldata;
267 ath_dbg(common, ATH_DBG_CONFIG,
268 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
269 sc->sc_ah->curchan->channel,
270 channel->center_freq, conf_is_ht40(conf),
273 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
276 "Unable to reset channel (%u MHz), reset status %d\n",
277 channel->center_freq, r);
281 if (ath_startrecv(sc) != 0) {
282 ath_err(common, "Unable to restart recv logic\n");
287 ath_update_txpow(sc);
288 ath9k_hw_set_interrupts(ah, ah->imask);
290 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
291 if (sc->sc_flags & SC_OP_BEACONS)
292 ath_beacon_config(sc, NULL);
293 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
294 ath_start_ani(common);
298 spin_unlock_bh(&sc->sc_pcu_lock);
300 ath9k_ps_restore(sc);
304 static void ath_paprd_activate(struct ath_softc *sc)
306 struct ath_hw *ah = sc->sc_ah;
307 struct ath9k_hw_cal_data *caldata = ah->caldata;
308 struct ath_common *common = ath9k_hw_common(ah);
311 if (!caldata || !caldata->paprd_done)
315 ar9003_paprd_enable(ah, false);
316 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
317 if (!(common->tx_chainmask & BIT(chain)))
320 ar9003_paprd_populate_single_table(ah, caldata, chain);
323 ar9003_paprd_enable(ah, true);
324 ath9k_ps_restore(sc);
327 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
329 struct ieee80211_hw *hw = sc->hw;
330 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
331 struct ath_tx_control txctl;
334 memset(&txctl, 0, sizeof(txctl));
335 txctl.txq = sc->tx.txq_map[WME_AC_BE];
337 memset(tx_info, 0, sizeof(*tx_info));
338 tx_info->band = hw->conf.channel->band;
339 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
340 tx_info->control.rates[0].idx = 0;
341 tx_info->control.rates[0].count = 1;
342 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
343 tx_info->control.rates[1].idx = -1;
345 init_completion(&sc->paprd_complete);
346 sc->paprd_pending = true;
347 txctl.paprd = BIT(chain);
348 if (ath_tx_start(hw, skb, &txctl) != 0)
351 time_left = wait_for_completion_timeout(&sc->paprd_complete,
352 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
353 sc->paprd_pending = false;
356 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
357 "Timeout waiting for paprd training on TX chain %d\n",
363 void ath_paprd_calibrate(struct work_struct *work)
365 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
366 struct ieee80211_hw *hw = sc->hw;
367 struct ath_hw *ah = sc->sc_ah;
368 struct ieee80211_hdr *hdr;
369 struct sk_buff *skb = NULL;
370 struct ath9k_hw_cal_data *caldata = ah->caldata;
371 struct ath_common *common = ath9k_hw_common(ah);
380 if (ar9003_paprd_init_table(ah) < 0)
383 skb = alloc_skb(len, GFP_KERNEL);
388 memset(skb->data, 0, len);
389 hdr = (struct ieee80211_hdr *)skb->data;
390 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
391 hdr->frame_control = cpu_to_le16(ftype);
392 hdr->duration_id = cpu_to_le16(10);
393 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
394 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
395 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
398 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
399 if (!(common->tx_chainmask & BIT(chain)))
404 ath_dbg(common, ATH_DBG_CALIBRATE,
405 "Sending PAPRD frame for thermal measurement "
406 "on chain %d\n", chain);
407 if (!ath_paprd_send_frame(sc, skb, chain))
410 ar9003_paprd_setup_gain_table(ah, chain);
412 ath_dbg(common, ATH_DBG_CALIBRATE,
413 "Sending PAPRD training frame on chain %d\n", chain);
414 if (!ath_paprd_send_frame(sc, skb, chain))
417 if (!ar9003_paprd_is_done(ah))
420 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
428 caldata->paprd_done = true;
429 ath_paprd_activate(sc);
433 ath9k_ps_restore(sc);
437 * This routine performs the periodic noise floor calibration function
438 * that is used to adjust and optimize the chip performance. This
439 * takes environmental changes (location, temperature) into account.
440 * When the task is complete, it reschedules itself depending on the
441 * appropriate interval that was calculated.
443 void ath_ani_calibrate(unsigned long data)
445 struct ath_softc *sc = (struct ath_softc *)data;
446 struct ath_hw *ah = sc->sc_ah;
447 struct ath_common *common = ath9k_hw_common(ah);
448 bool longcal = false;
449 bool shortcal = false;
450 bool aniflag = false;
451 unsigned int timestamp = jiffies_to_msecs(jiffies);
452 u32 cal_interval, short_cal_interval, long_cal_interval;
455 if (ah->caldata && ah->caldata->nfcal_interference)
456 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
458 long_cal_interval = ATH_LONG_CALINTERVAL;
460 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
461 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
463 /* Only calibrate if awake */
464 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
469 /* Long calibration runs independently of short calibration. */
470 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
472 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
473 common->ani.longcal_timer = timestamp;
476 /* Short calibration applies only while caldone is false */
477 if (!common->ani.caldone) {
478 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
480 ath_dbg(common, ATH_DBG_ANI,
481 "shortcal @%lu\n", jiffies);
482 common->ani.shortcal_timer = timestamp;
483 common->ani.resetcal_timer = timestamp;
486 if ((timestamp - common->ani.resetcal_timer) >=
487 ATH_RESTART_CALINTERVAL) {
488 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
489 if (common->ani.caldone)
490 common->ani.resetcal_timer = timestamp;
494 /* Verify whether we must check ANI */
495 if ((timestamp - common->ani.checkani_timer) >=
496 ah->config.ani_poll_interval) {
498 common->ani.checkani_timer = timestamp;
501 /* Skip all processing if there's nothing to do. */
502 if (longcal || shortcal || aniflag) {
503 /* Call ANI routine if necessary */
505 spin_lock_irqsave(&common->cc_lock, flags);
506 ath9k_hw_ani_monitor(ah, ah->curchan);
507 ath_update_survey_stats(sc);
508 spin_unlock_irqrestore(&common->cc_lock, flags);
511 /* Perform calibration if necessary */
512 if (longcal || shortcal) {
513 common->ani.caldone =
514 ath9k_hw_calibrate(ah,
516 common->rx_chainmask,
521 ath9k_ps_restore(sc);
525 * Set timer interval based on previous results.
526 * The interval must be the shortest necessary to satisfy ANI,
527 * short calibration and long calibration.
529 cal_interval = ATH_LONG_CALINTERVAL;
530 if (sc->sc_ah->config.enable_ani)
531 cal_interval = min(cal_interval,
532 (u32)ah->config.ani_poll_interval);
533 if (!common->ani.caldone)
534 cal_interval = min(cal_interval, (u32)short_cal_interval);
536 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
537 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
538 if (!ah->caldata->paprd_done)
539 ieee80211_queue_work(sc->hw, &sc->paprd_work);
540 else if (!ah->paprd_table_write_done)
541 ath_paprd_activate(sc);
545 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
548 struct ath_hw *ah = sc->sc_ah;
549 an = (struct ath_node *)sta->drv_priv;
551 #ifdef CONFIG_ATH9K_DEBUGFS
552 spin_lock(&sc->nodes_lock);
553 list_add(&an->list, &sc->nodes);
554 spin_unlock(&sc->nodes_lock);
557 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
558 sc->sc_flags |= SC_OP_ENABLE_APM;
560 if (sc->sc_flags & SC_OP_TXAGGR) {
561 ath_tx_node_init(sc, an);
562 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
563 sta->ht_cap.ampdu_factor);
564 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
568 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
570 struct ath_node *an = (struct ath_node *)sta->drv_priv;
572 #ifdef CONFIG_ATH9K_DEBUGFS
573 spin_lock(&sc->nodes_lock);
575 spin_unlock(&sc->nodes_lock);
579 if (sc->sc_flags & SC_OP_TXAGGR)
580 ath_tx_node_cleanup(sc, an);
583 void ath_hw_check(struct work_struct *work)
585 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
590 for (i = 0; i < 3; i++) {
591 if (ath9k_hw_check_alive(sc->sc_ah))
599 ath9k_ps_restore(sc);
602 void ath9k_tasklet(unsigned long data)
604 struct ath_softc *sc = (struct ath_softc *)data;
605 struct ath_hw *ah = sc->sc_ah;
606 struct ath_common *common = ath9k_hw_common(ah);
608 u32 status = sc->intrstatus;
611 if (status & ATH9K_INT_FATAL) {
617 spin_lock(&sc->sc_pcu_lock);
620 * Only run the baseband hang check if beacons stop working in AP or
621 * IBSS mode, because it has a high false positive rate. For station
622 * mode it should not be necessary, since the upper layers will detect
623 * this through a beacon miss automatically and the following channel
624 * change will trigger a hardware reset anyway
626 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
627 !ath9k_hw_check_alive(ah))
628 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
630 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
631 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
634 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
636 if (status & rxmask) {
637 /* Check for high priority Rx first */
638 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
639 (status & ATH9K_INT_RXHP))
640 ath_rx_tasklet(sc, 0, true);
642 ath_rx_tasklet(sc, 0, false);
645 if (status & ATH9K_INT_TX) {
646 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
647 ath_tx_edma_tasklet(sc);
652 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
654 * TSF sync does not look correct; remain awake to sync with
657 ath_dbg(common, ATH_DBG_PS,
658 "TSFOOR - Sync with next Beacon\n");
659 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
662 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
663 if (status & ATH9K_INT_GENTIMER)
664 ath_gen_timer_isr(sc->sc_ah);
666 /* re-enable hardware interrupt */
667 ath9k_hw_enable_interrupts(ah);
669 spin_unlock(&sc->sc_pcu_lock);
670 ath9k_ps_restore(sc);
673 irqreturn_t ath_isr(int irq, void *dev)
675 #define SCHED_INTR ( \
688 struct ath_softc *sc = dev;
689 struct ath_hw *ah = sc->sc_ah;
690 struct ath_common *common = ath9k_hw_common(ah);
691 enum ath9k_int status;
695 * The hardware is not ready/present, don't
696 * touch anything. Note this can happen early
697 * on if the IRQ is shared.
699 if (sc->sc_flags & SC_OP_INVALID)
703 /* shared irq, not for us */
705 if (!ath9k_hw_intrpend(ah))
709 * Figure out the reason(s) for the interrupt. Note
710 * that the hal returns a pseudo-ISR that may include
711 * bits we haven't explicitly enabled so we mask the
712 * value to insure we only process bits we requested.
714 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
715 status &= ah->imask; /* discard unasked-for bits */
718 * If there are no status bits set, then this interrupt was not
719 * for me (should have been caught above).
724 /* Cache the status */
725 sc->intrstatus = status;
727 if (status & SCHED_INTR)
731 * If a FATAL or RXORN interrupt is received, we have to reset the
734 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
735 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
738 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
739 (status & ATH9K_INT_BB_WATCHDOG)) {
741 spin_lock(&common->cc_lock);
742 ath_hw_cycle_counters_update(common);
743 ar9003_hw_bb_watchdog_dbg_info(ah);
744 spin_unlock(&common->cc_lock);
749 if (status & ATH9K_INT_SWBA)
750 tasklet_schedule(&sc->bcon_tasklet);
752 if (status & ATH9K_INT_TXURN)
753 ath9k_hw_updatetxtriglevel(ah, true);
755 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
756 if (status & ATH9K_INT_RXEOL) {
757 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
758 ath9k_hw_set_interrupts(ah, ah->imask);
762 if (status & ATH9K_INT_MIB) {
764 * Disable interrupts until we service the MIB
765 * interrupt; otherwise it will continue to
768 ath9k_hw_disable_interrupts(ah);
770 * Let the hal handle the event. We assume
771 * it will clear whatever condition caused
774 spin_lock(&common->cc_lock);
775 ath9k_hw_proc_mib_event(ah);
776 spin_unlock(&common->cc_lock);
777 ath9k_hw_enable_interrupts(ah);
780 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
781 if (status & ATH9K_INT_TIM_TIMER) {
782 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
784 /* Clear RxAbort bit so that we can
786 ath9k_setpower(sc, ATH9K_PM_AWAKE);
787 ath9k_hw_setrxabort(sc->sc_ah, 0);
788 sc->ps_flags |= PS_WAIT_FOR_BEACON;
793 ath_debug_stat_interrupt(sc, status);
796 /* turn off every interrupt */
797 ath9k_hw_disable_interrupts(ah);
798 tasklet_schedule(&sc->intr_tq);
806 static u32 ath_get_extchanmode(struct ath_softc *sc,
807 struct ieee80211_channel *chan,
808 enum nl80211_channel_type channel_type)
812 switch (chan->band) {
813 case IEEE80211_BAND_2GHZ:
814 switch(channel_type) {
815 case NL80211_CHAN_NO_HT:
816 case NL80211_CHAN_HT20:
817 chanmode = CHANNEL_G_HT20;
819 case NL80211_CHAN_HT40PLUS:
820 chanmode = CHANNEL_G_HT40PLUS;
822 case NL80211_CHAN_HT40MINUS:
823 chanmode = CHANNEL_G_HT40MINUS;
827 case IEEE80211_BAND_5GHZ:
828 switch(channel_type) {
829 case NL80211_CHAN_NO_HT:
830 case NL80211_CHAN_HT20:
831 chanmode = CHANNEL_A_HT20;
833 case NL80211_CHAN_HT40PLUS:
834 chanmode = CHANNEL_A_HT40PLUS;
836 case NL80211_CHAN_HT40MINUS:
837 chanmode = CHANNEL_A_HT40MINUS;
848 static void ath9k_bss_assoc_info(struct ath_softc *sc,
849 struct ieee80211_hw *hw,
850 struct ieee80211_vif *vif,
851 struct ieee80211_bss_conf *bss_conf)
853 struct ath_wiphy *aphy = hw->priv;
854 struct ath_hw *ah = sc->sc_ah;
855 struct ath_common *common = ath9k_hw_common(ah);
857 if (bss_conf->assoc) {
858 ath_dbg(common, ATH_DBG_CONFIG,
859 "Bss Info ASSOC %d, bssid: %pM\n",
860 bss_conf->aid, common->curbssid);
862 /* New association, store aid */
863 common->curaid = bss_conf->aid;
864 ath9k_hw_write_associd(ah);
867 * Request a re-configuration of Beacon related timers
868 * on the receipt of the first Beacon frame (i.e.,
869 * after time sync with the AP).
871 sc->ps_flags |= PS_BEACON_SYNC;
873 /* Configure the beacon */
874 ath_beacon_config(sc, vif);
876 /* Reset rssi stats */
877 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
878 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
880 sc->sc_flags |= SC_OP_ANI_RUN;
881 ath_start_ani(common);
883 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
886 sc->sc_flags &= ~SC_OP_ANI_RUN;
887 del_timer_sync(&common->ani.timer);
891 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
893 struct ath_hw *ah = sc->sc_ah;
894 struct ath_common *common = ath9k_hw_common(ah);
895 struct ieee80211_channel *channel = hw->conf.channel;
899 spin_lock_bh(&sc->sc_pcu_lock);
901 ath9k_hw_configpcipowersave(ah, 0, 0);
904 ah->curchan = ath_get_curchannel(sc, sc->hw);
906 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
909 "Unable to reset channel (%u MHz), reset status %d\n",
910 channel->center_freq, r);
913 ath_update_txpow(sc);
914 if (ath_startrecv(sc) != 0) {
915 ath_err(common, "Unable to restart recv logic\n");
918 if (sc->sc_flags & SC_OP_BEACONS)
919 ath_beacon_config(sc, NULL); /* restart beacons */
921 /* Re-Enable interrupts */
922 ath9k_hw_set_interrupts(ah, ah->imask);
925 ath9k_hw_cfg_output(ah, ah->led_pin,
926 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
927 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
929 ieee80211_wake_queues(hw);
931 spin_unlock_bh(&sc->sc_pcu_lock);
933 ath9k_ps_restore(sc);
936 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
938 struct ath_hw *ah = sc->sc_ah;
939 struct ieee80211_channel *channel = hw->conf.channel;
943 spin_lock_bh(&sc->sc_pcu_lock);
945 ieee80211_stop_queues(hw);
948 * Keep the LED on when the radio is disabled
949 * during idle unassociated state.
952 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
953 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
956 /* Disable interrupts */
957 ath9k_hw_disable_interrupts(ah);
959 ath_drain_all_txq(sc, false); /* clear pending tx frames */
961 ath_stoprecv(sc); /* turn off frame recv */
962 ath_flushrecv(sc); /* flush recv queue */
965 ah->curchan = ath_get_curchannel(sc, hw);
967 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
969 ath_err(ath9k_hw_common(sc->sc_ah),
970 "Unable to reset channel (%u MHz), reset status %d\n",
971 channel->center_freq, r);
974 ath9k_hw_phy_disable(ah);
976 ath9k_hw_configpcipowersave(ah, 1, 1);
978 spin_unlock_bh(&sc->sc_pcu_lock);
979 ath9k_ps_restore(sc);
981 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
984 int ath_reset(struct ath_softc *sc, bool retry_tx)
986 struct ath_hw *ah = sc->sc_ah;
987 struct ath_common *common = ath9k_hw_common(ah);
988 struct ieee80211_hw *hw = sc->hw;
992 del_timer_sync(&common->ani.timer);
995 spin_lock_bh(&sc->sc_pcu_lock);
997 ieee80211_stop_queues(hw);
999 ath9k_hw_disable_interrupts(ah);
1000 ath_drain_all_txq(sc, retry_tx);
1005 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1008 "Unable to reset hardware; reset status %d\n", r);
1010 if (ath_startrecv(sc) != 0)
1011 ath_err(common, "Unable to start recv logic\n");
1014 * We may be doing a reset in response to a request
1015 * that changes the channel so update any state that
1016 * might change as a result.
1018 ath_update_txpow(sc);
1020 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1021 ath_beacon_config(sc, NULL); /* restart beacons */
1023 ath9k_hw_set_interrupts(ah, ah->imask);
1027 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1028 if (ATH_TXQ_SETUP(sc, i)) {
1029 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1030 ath_txq_schedule(sc, &sc->tx.txq[i]);
1031 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1036 ieee80211_wake_queues(hw);
1037 spin_unlock_bh(&sc->sc_pcu_lock);
1040 ath_start_ani(common);
1041 ath9k_ps_restore(sc);
1046 /* XXX: Remove me once we don't depend on ath9k_channel for all
1047 * this redundant data */
1048 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1049 struct ath9k_channel *ichan)
1051 struct ieee80211_channel *chan = hw->conf.channel;
1052 struct ieee80211_conf *conf = &hw->conf;
1054 ichan->channel = chan->center_freq;
1057 if (chan->band == IEEE80211_BAND_2GHZ) {
1058 ichan->chanmode = CHANNEL_G;
1059 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1061 ichan->chanmode = CHANNEL_A;
1062 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1065 if (conf_is_ht(conf))
1066 ichan->chanmode = ath_get_extchanmode(sc, chan,
1067 conf->channel_type);
1070 /**********************/
1071 /* mac80211 callbacks */
1072 /**********************/
1074 static int ath9k_start(struct ieee80211_hw *hw)
1076 struct ath_wiphy *aphy = hw->priv;
1077 struct ath_softc *sc = aphy->sc;
1078 struct ath_hw *ah = sc->sc_ah;
1079 struct ath_common *common = ath9k_hw_common(ah);
1080 struct ieee80211_channel *curchan = hw->conf.channel;
1081 struct ath9k_channel *init_channel;
1084 ath_dbg(common, ATH_DBG_CONFIG,
1085 "Starting driver with initial channel: %d MHz\n",
1086 curchan->center_freq);
1088 mutex_lock(&sc->mutex);
1090 if (ath9k_wiphy_started(sc)) {
1091 if (sc->chan_idx == curchan->hw_value) {
1093 * Already on the operational channel, the new wiphy
1094 * can be marked active.
1096 aphy->state = ATH_WIPHY_ACTIVE;
1097 ieee80211_wake_queues(hw);
1100 * Another wiphy is on another channel, start the new
1101 * wiphy in paused state.
1103 aphy->state = ATH_WIPHY_PAUSED;
1104 ieee80211_stop_queues(hw);
1106 mutex_unlock(&sc->mutex);
1109 aphy->state = ATH_WIPHY_ACTIVE;
1111 /* setup initial channel */
1113 sc->chan_idx = curchan->hw_value;
1115 init_channel = ath_get_curchannel(sc, hw);
1117 /* Reset SERDES registers */
1118 ath9k_hw_configpcipowersave(ah, 0, 0);
1121 * The basic interface to setting the hardware in a good
1122 * state is ``reset''. On return the hardware is known to
1123 * be powered up and with interrupts disabled. This must
1124 * be followed by initialization of the appropriate bits
1125 * and then setup of the interrupt mask.
1127 spin_lock_bh(&sc->sc_pcu_lock);
1128 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1131 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1132 r, curchan->center_freq);
1133 spin_unlock_bh(&sc->sc_pcu_lock);
1138 * This is needed only to setup initial state
1139 * but it's best done after a reset.
1141 ath_update_txpow(sc);
1144 * Setup the hardware after reset:
1145 * The receive engine is set going.
1146 * Frame transmit is handled entirely
1147 * in the frame output path; there's nothing to do
1148 * here except setup the interrupt mask.
1150 if (ath_startrecv(sc) != 0) {
1151 ath_err(common, "Unable to start recv logic\n");
1153 spin_unlock_bh(&sc->sc_pcu_lock);
1156 spin_unlock_bh(&sc->sc_pcu_lock);
1158 /* Setup our intr mask. */
1159 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1160 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1163 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1164 ah->imask |= ATH9K_INT_RXHP |
1166 ATH9K_INT_BB_WATCHDOG;
1168 ah->imask |= ATH9K_INT_RX;
1170 ah->imask |= ATH9K_INT_GTT;
1172 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1173 ah->imask |= ATH9K_INT_CST;
1175 sc->sc_flags &= ~SC_OP_INVALID;
1176 sc->sc_ah->is_monitoring = false;
1178 /* Disable BMISS interrupt when we're not associated */
1179 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1180 ath9k_hw_set_interrupts(ah, ah->imask);
1182 ieee80211_wake_queues(hw);
1184 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1186 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1187 !ah->btcoex_hw.enabled) {
1188 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1189 AR_STOMP_LOW_WLAN_WGHT);
1190 ath9k_hw_btcoex_enable(ah);
1192 if (common->bus_ops->bt_coex_prep)
1193 common->bus_ops->bt_coex_prep(common);
1194 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1195 ath9k_btcoex_timer_resume(sc);
1198 /* User has the option to provide pm-qos value as a module
1199 * parameter rather than using the default value of
1200 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1202 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1204 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1205 common->bus_ops->extn_synch_en(common);
1208 mutex_unlock(&sc->mutex);
1213 static int ath9k_tx(struct ieee80211_hw *hw,
1214 struct sk_buff *skb)
1216 struct ath_wiphy *aphy = hw->priv;
1217 struct ath_softc *sc = aphy->sc;
1218 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1219 struct ath_tx_control txctl;
1220 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1222 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1223 ath_dbg(common, ATH_DBG_XMIT,
1224 "ath9k: %s: TX in unexpected wiphy state %d\n",
1225 wiphy_name(hw->wiphy), aphy->state);
1229 if (sc->ps_enabled) {
1231 * mac80211 does not set PM field for normal data frames, so we
1232 * need to update that based on the current PS mode.
1234 if (ieee80211_is_data(hdr->frame_control) &&
1235 !ieee80211_is_nullfunc(hdr->frame_control) &&
1236 !ieee80211_has_pm(hdr->frame_control)) {
1237 ath_dbg(common, ATH_DBG_PS,
1238 "Add PM=1 for a TX frame while in PS mode\n");
1239 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1243 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1245 * We are using PS-Poll and mac80211 can request TX while in
1246 * power save mode. Need to wake up hardware for the TX to be
1247 * completed and if needed, also for RX of buffered frames.
1249 ath9k_ps_wakeup(sc);
1250 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1251 ath9k_hw_setrxabort(sc->sc_ah, 0);
1252 if (ieee80211_is_pspoll(hdr->frame_control)) {
1253 ath_dbg(common, ATH_DBG_PS,
1254 "Sending PS-Poll to pick a buffered frame\n");
1255 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1257 ath_dbg(common, ATH_DBG_PS,
1258 "Wake up to complete TX\n");
1259 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1262 * The actual restore operation will happen only after
1263 * the sc_flags bit is cleared. We are just dropping
1264 * the ps_usecount here.
1266 ath9k_ps_restore(sc);
1269 memset(&txctl, 0, sizeof(struct ath_tx_control));
1270 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1272 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1274 if (ath_tx_start(hw, skb, &txctl) != 0) {
1275 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1281 dev_kfree_skb_any(skb);
1285 static void ath9k_stop(struct ieee80211_hw *hw)
1287 struct ath_wiphy *aphy = hw->priv;
1288 struct ath_softc *sc = aphy->sc;
1289 struct ath_hw *ah = sc->sc_ah;
1290 struct ath_common *common = ath9k_hw_common(ah);
1293 mutex_lock(&sc->mutex);
1295 aphy->state = ATH_WIPHY_INACTIVE;
1298 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1300 cancel_delayed_work_sync(&sc->tx_complete_work);
1301 cancel_work_sync(&sc->paprd_work);
1302 cancel_work_sync(&sc->hw_check_work);
1304 for (i = 0; i < sc->num_sec_wiphy; i++) {
1305 if (sc->sec_wiphy[i])
1309 if (i == sc->num_sec_wiphy) {
1310 cancel_delayed_work_sync(&sc->wiphy_work);
1311 cancel_work_sync(&sc->chan_work);
1314 if (sc->sc_flags & SC_OP_INVALID) {
1315 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1316 mutex_unlock(&sc->mutex);
1320 if (ath9k_wiphy_started(sc)) {
1321 mutex_unlock(&sc->mutex);
1322 return; /* another wiphy still in use */
1325 /* Ensure HW is awake when we try to shut it down. */
1326 ath9k_ps_wakeup(sc);
1328 if (ah->btcoex_hw.enabled) {
1329 ath9k_hw_btcoex_disable(ah);
1330 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1331 ath9k_btcoex_timer_pause(sc);
1334 spin_lock_bh(&sc->sc_pcu_lock);
1336 /* make sure h/w will not generate any interrupt
1337 * before setting the invalid flag. */
1338 ath9k_hw_disable_interrupts(ah);
1340 if (!(sc->sc_flags & SC_OP_INVALID)) {
1341 ath_drain_all_txq(sc, false);
1343 ath9k_hw_phy_disable(ah);
1345 sc->rx.rxlink = NULL;
1347 /* disable HAL and put h/w to sleep */
1348 ath9k_hw_disable(ah);
1349 ath9k_hw_configpcipowersave(ah, 1, 1);
1351 spin_unlock_bh(&sc->sc_pcu_lock);
1353 ath9k_ps_restore(sc);
1356 ath9k_set_wiphy_idle(aphy, true);
1357 ath_radio_disable(sc, hw);
1359 sc->sc_flags |= SC_OP_INVALID;
1361 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1363 mutex_unlock(&sc->mutex);
1365 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1368 bool ath9k_uses_beacons(int type)
1371 case NL80211_IFTYPE_AP:
1372 case NL80211_IFTYPE_ADHOC:
1373 case NL80211_IFTYPE_MESH_POINT:
1380 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1381 struct ieee80211_vif *vif)
1383 struct ath_vif *avp = (void *)vif->drv_priv;
1385 /* Disable SWBA interrupt */
1386 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1387 ath9k_ps_wakeup(sc);
1388 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1389 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1390 tasklet_kill(&sc->bcon_tasklet);
1391 ath9k_ps_restore(sc);
1393 ath_beacon_return(sc, avp);
1394 sc->sc_flags &= ~SC_OP_BEACONS;
1396 if (sc->nbcnvifs > 0) {
1397 /* Re-enable beaconing */
1398 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1399 ath9k_ps_wakeup(sc);
1400 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1401 ath9k_ps_restore(sc);
1405 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1407 struct ath9k_vif_iter_data *iter_data = data;
1410 if (iter_data->hw_macaddr)
1411 for (i = 0; i < ETH_ALEN; i++)
1412 iter_data->mask[i] &=
1413 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1415 switch (vif->type) {
1416 case NL80211_IFTYPE_AP:
1419 case NL80211_IFTYPE_STATION:
1420 iter_data->nstations++;
1422 case NL80211_IFTYPE_ADHOC:
1423 iter_data->nadhocs++;
1425 case NL80211_IFTYPE_MESH_POINT:
1426 iter_data->nmeshes++;
1428 case NL80211_IFTYPE_WDS:
1432 iter_data->nothers++;
1437 /* Called with sc->mutex held. */
1438 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1439 struct ieee80211_vif *vif,
1440 struct ath9k_vif_iter_data *iter_data)
1442 struct ath_wiphy *aphy = hw->priv;
1443 struct ath_softc *sc = aphy->sc;
1444 struct ath_hw *ah = sc->sc_ah;
1445 struct ath_common *common = ath9k_hw_common(ah);
1449 * Use the hardware MAC address as reference, the hardware uses it
1450 * together with the BSSID mask when matching addresses.
1452 memset(iter_data, 0, sizeof(*iter_data));
1453 iter_data->hw_macaddr = common->macaddr;
1454 memset(&iter_data->mask, 0xff, ETH_ALEN);
1457 ath9k_vif_iter(iter_data, vif->addr, vif);
1459 /* Get list of all active MAC addresses */
1460 spin_lock_bh(&sc->wiphy_lock);
1461 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1463 for (i = 0; i < sc->num_sec_wiphy; i++) {
1464 if (sc->sec_wiphy[i] == NULL)
1466 ieee80211_iterate_active_interfaces_atomic(
1467 sc->sec_wiphy[i]->hw, ath9k_vif_iter, iter_data);
1469 spin_unlock_bh(&sc->wiphy_lock);
1472 /* Called with sc->mutex held. */
1473 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1474 struct ieee80211_vif *vif)
1476 struct ath_wiphy *aphy = hw->priv;
1477 struct ath_softc *sc = aphy->sc;
1478 struct ath_hw *ah = sc->sc_ah;
1479 struct ath_common *common = ath9k_hw_common(ah);
1480 struct ath9k_vif_iter_data iter_data;
1482 ath9k_calculate_iter_data(hw, vif, &iter_data);
1484 /* Set BSSID mask. */
1485 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1486 ath_hw_setbssidmask(common);
1488 /* Set op-mode & TSF */
1489 if (iter_data.naps > 0) {
1490 ath9k_hw_set_tsfadjust(ah, 1);
1491 sc->sc_flags |= SC_OP_TSF_RESET;
1492 ah->opmode = NL80211_IFTYPE_AP;
1494 ath9k_hw_set_tsfadjust(ah, 0);
1495 sc->sc_flags &= ~SC_OP_TSF_RESET;
1497 if (iter_data.nwds + iter_data.nmeshes)
1498 ah->opmode = NL80211_IFTYPE_AP;
1499 else if (iter_data.nadhocs)
1500 ah->opmode = NL80211_IFTYPE_ADHOC;
1502 ah->opmode = NL80211_IFTYPE_STATION;
1506 * Enable MIB interrupts when there are hardware phy counters.
1508 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1509 if (ah->config.enable_ani)
1510 ah->imask |= ATH9K_INT_MIB;
1511 ah->imask |= ATH9K_INT_TSFOOR;
1513 ah->imask &= ~ATH9K_INT_MIB;
1514 ah->imask &= ~ATH9K_INT_TSFOOR;
1517 ath9k_hw_set_interrupts(ah, ah->imask);
1520 if ((iter_data.naps + iter_data.nadhocs) > 0) {
1521 sc->sc_flags |= SC_OP_ANI_RUN;
1522 ath_start_ani(common);
1524 sc->sc_flags &= ~SC_OP_ANI_RUN;
1525 del_timer_sync(&common->ani.timer);
1529 /* Called with sc->mutex held, vif counts set up properly. */
1530 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1531 struct ieee80211_vif *vif)
1533 struct ath_wiphy *aphy = hw->priv;
1534 struct ath_softc *sc = aphy->sc;
1536 ath9k_calculate_summary_state(hw, vif);
1538 if (ath9k_uses_beacons(vif->type)) {
1540 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1541 /* This may fail because upper levels do not have beacons
1542 * properly configured yet. That's OK, we assume it
1543 * will be properly configured and then we will be notified
1544 * in the info_changed method and set up beacons properly
1547 error = ath_beacon_alloc(aphy, vif);
1549 ath9k_reclaim_beacon(sc, vif);
1551 ath_beacon_config(sc, vif);
1556 static int ath9k_add_interface(struct ieee80211_hw *hw,
1557 struct ieee80211_vif *vif)
1559 struct ath_wiphy *aphy = hw->priv;
1560 struct ath_softc *sc = aphy->sc;
1561 struct ath_hw *ah = sc->sc_ah;
1562 struct ath_common *common = ath9k_hw_common(ah);
1563 struct ath_vif *avp = (void *)vif->drv_priv;
1566 mutex_lock(&sc->mutex);
1568 switch (vif->type) {
1569 case NL80211_IFTYPE_STATION:
1570 case NL80211_IFTYPE_WDS:
1571 case NL80211_IFTYPE_ADHOC:
1572 case NL80211_IFTYPE_AP:
1573 case NL80211_IFTYPE_MESH_POINT:
1576 ath_err(common, "Interface type %d not yet supported\n",
1582 if (ath9k_uses_beacons(vif->type)) {
1583 if (sc->nbcnvifs >= ATH_BCBUF) {
1584 ath_err(common, "Not enough beacon buffers when adding"
1585 " new interface of type: %i\n",
1592 if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1594 ath_err(common, "Cannot create ADHOC interface when other"
1595 " interfaces already exist.\n");
1600 ath_dbg(common, ATH_DBG_CONFIG,
1601 "Attach a VIF of type: %d\n", vif->type);
1603 /* Set the VIF opmode */
1604 avp->av_opmode = vif->type;
1609 ath9k_do_vif_add_setup(hw, vif);
1611 mutex_unlock(&sc->mutex);
1615 static int ath9k_change_interface(struct ieee80211_hw *hw,
1616 struct ieee80211_vif *vif,
1617 enum nl80211_iftype new_type,
1620 struct ath_wiphy *aphy = hw->priv;
1621 struct ath_softc *sc = aphy->sc;
1622 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1625 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1626 mutex_lock(&sc->mutex);
1628 /* See if new interface type is valid. */
1629 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1631 ath_err(common, "When using ADHOC, it must be the only"
1637 if (ath9k_uses_beacons(new_type) &&
1638 !ath9k_uses_beacons(vif->type)) {
1639 if (sc->nbcnvifs >= ATH_BCBUF) {
1640 ath_err(common, "No beacon slot available\n");
1646 /* Clean up old vif stuff */
1647 if (ath9k_uses_beacons(vif->type))
1648 ath9k_reclaim_beacon(sc, vif);
1650 /* Add new settings */
1651 vif->type = new_type;
1654 ath9k_do_vif_add_setup(hw, vif);
1656 mutex_unlock(&sc->mutex);
1660 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1661 struct ieee80211_vif *vif)
1663 struct ath_wiphy *aphy = hw->priv;
1664 struct ath_softc *sc = aphy->sc;
1665 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1667 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1669 mutex_lock(&sc->mutex);
1673 /* Reclaim beacon resources */
1674 if (ath9k_uses_beacons(vif->type))
1675 ath9k_reclaim_beacon(sc, vif);
1677 ath9k_calculate_summary_state(hw, NULL);
1679 mutex_unlock(&sc->mutex);
1682 static void ath9k_enable_ps(struct ath_softc *sc)
1684 struct ath_hw *ah = sc->sc_ah;
1686 sc->ps_enabled = true;
1687 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1688 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1689 ah->imask |= ATH9K_INT_TIM_TIMER;
1690 ath9k_hw_set_interrupts(ah, ah->imask);
1692 ath9k_hw_setrxabort(ah, 1);
1696 static void ath9k_disable_ps(struct ath_softc *sc)
1698 struct ath_hw *ah = sc->sc_ah;
1700 sc->ps_enabled = false;
1701 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1702 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1703 ath9k_hw_setrxabort(ah, 0);
1704 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1706 PS_WAIT_FOR_PSPOLL_DATA |
1707 PS_WAIT_FOR_TX_ACK);
1708 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1709 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1710 ath9k_hw_set_interrupts(ah, ah->imask);
1716 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1718 struct ath_wiphy *aphy = hw->priv;
1719 struct ath_softc *sc = aphy->sc;
1720 struct ath_hw *ah = sc->sc_ah;
1721 struct ath_common *common = ath9k_hw_common(ah);
1722 struct ieee80211_conf *conf = &hw->conf;
1725 mutex_lock(&sc->mutex);
1728 * Leave this as the first check because we need to turn on the
1729 * radio if it was disabled before prior to processing the rest
1730 * of the changes. Likewise we must only disable the radio towards
1733 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1735 bool all_wiphys_idle;
1736 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1738 spin_lock_bh(&sc->wiphy_lock);
1739 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1740 ath9k_set_wiphy_idle(aphy, idle);
1742 enable_radio = (!idle && all_wiphys_idle);
1745 * After we unlock here its possible another wiphy
1746 * can be re-renabled so to account for that we will
1747 * only disable the radio toward the end of this routine
1748 * if by then all wiphys are still idle.
1750 spin_unlock_bh(&sc->wiphy_lock);
1753 sc->ps_idle = false;
1754 ath_radio_enable(sc, hw);
1755 ath_dbg(common, ATH_DBG_CONFIG,
1756 "not-idle: enabling radio\n");
1761 * We just prepare to enable PS. We have to wait until our AP has
1762 * ACK'd our null data frame to disable RX otherwise we'll ignore
1763 * those ACKs and end up retransmitting the same null data frames.
1764 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1766 if (changed & IEEE80211_CONF_CHANGE_PS) {
1767 unsigned long flags;
1768 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1769 if (conf->flags & IEEE80211_CONF_PS)
1770 ath9k_enable_ps(sc);
1772 ath9k_disable_ps(sc);
1773 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1776 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1777 if (conf->flags & IEEE80211_CONF_MONITOR) {
1778 ath_dbg(common, ATH_DBG_CONFIG,
1779 "Monitor mode is enabled\n");
1780 sc->sc_ah->is_monitoring = true;
1782 ath_dbg(common, ATH_DBG_CONFIG,
1783 "Monitor mode is disabled\n");
1784 sc->sc_ah->is_monitoring = false;
1788 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1789 struct ieee80211_channel *curchan = hw->conf.channel;
1790 int pos = curchan->hw_value;
1792 unsigned long flags;
1795 old_pos = ah->curchan - &ah->channels[0];
1797 aphy->chan_idx = pos;
1798 aphy->chan_is_ht = conf_is_ht(conf);
1799 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1800 sc->sc_flags |= SC_OP_OFFCHANNEL;
1802 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1804 if (aphy->state == ATH_WIPHY_SCAN ||
1805 aphy->state == ATH_WIPHY_ACTIVE)
1806 ath9k_wiphy_pause_all_forced(sc, aphy);
1809 * Do not change operational channel based on a paused
1812 goto skip_chan_change;
1815 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1816 curchan->center_freq);
1818 /* XXX: remove me eventualy */
1819 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1821 /* update survey stats for the old channel before switching */
1822 spin_lock_irqsave(&common->cc_lock, flags);
1823 ath_update_survey_stats(sc);
1824 spin_unlock_irqrestore(&common->cc_lock, flags);
1827 * If the operating channel changes, change the survey in-use flags
1829 * Reset the survey data for the new channel, unless we're switching
1830 * back to the operating channel from an off-channel operation.
1832 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1833 sc->cur_survey != &sc->survey[pos]) {
1836 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1838 sc->cur_survey = &sc->survey[pos];
1840 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1841 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1842 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1843 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1846 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1847 ath_err(common, "Unable to set channel\n");
1848 mutex_unlock(&sc->mutex);
1853 * The most recent snapshot of channel->noisefloor for the old
1854 * channel is only available after the hardware reset. Copy it to
1855 * the survey stats now.
1858 ath_update_survey_nf(sc, old_pos);
1862 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1863 sc->config.txpowlimit = 2 * conf->power_level;
1864 ath9k_ps_wakeup(sc);
1865 ath_update_txpow(sc);
1866 ath9k_ps_restore(sc);
1869 spin_lock_bh(&sc->wiphy_lock);
1870 disable_radio = ath9k_all_wiphys_idle(sc);
1871 spin_unlock_bh(&sc->wiphy_lock);
1873 if (disable_radio) {
1874 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1876 ath_radio_disable(sc, hw);
1879 mutex_unlock(&sc->mutex);
1884 #define SUPPORTED_FILTERS \
1885 (FIF_PROMISC_IN_BSS | \
1890 FIF_BCN_PRBRESP_PROMISC | \
1894 /* FIXME: sc->sc_full_reset ? */
1895 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1896 unsigned int changed_flags,
1897 unsigned int *total_flags,
1900 struct ath_wiphy *aphy = hw->priv;
1901 struct ath_softc *sc = aphy->sc;
1904 changed_flags &= SUPPORTED_FILTERS;
1905 *total_flags &= SUPPORTED_FILTERS;
1907 sc->rx.rxfilter = *total_flags;
1908 ath9k_ps_wakeup(sc);
1909 rfilt = ath_calcrxfilter(sc);
1910 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1911 ath9k_ps_restore(sc);
1913 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1914 "Set HW RX filter: 0x%x\n", rfilt);
1917 static int ath9k_sta_add(struct ieee80211_hw *hw,
1918 struct ieee80211_vif *vif,
1919 struct ieee80211_sta *sta)
1921 struct ath_wiphy *aphy = hw->priv;
1922 struct ath_softc *sc = aphy->sc;
1924 ath_node_attach(sc, sta);
1929 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1930 struct ieee80211_vif *vif,
1931 struct ieee80211_sta *sta)
1933 struct ath_wiphy *aphy = hw->priv;
1934 struct ath_softc *sc = aphy->sc;
1936 ath_node_detach(sc, sta);
1941 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1942 const struct ieee80211_tx_queue_params *params)
1944 struct ath_wiphy *aphy = hw->priv;
1945 struct ath_softc *sc = aphy->sc;
1946 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1947 struct ath_txq *txq;
1948 struct ath9k_tx_queue_info qi;
1951 if (queue >= WME_NUM_AC)
1954 txq = sc->tx.txq_map[queue];
1956 mutex_lock(&sc->mutex);
1958 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1960 qi.tqi_aifs = params->aifs;
1961 qi.tqi_cwmin = params->cw_min;
1962 qi.tqi_cwmax = params->cw_max;
1963 qi.tqi_burstTime = params->txop;
1965 ath_dbg(common, ATH_DBG_CONFIG,
1966 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1967 queue, txq->axq_qnum, params->aifs, params->cw_min,
1968 params->cw_max, params->txop);
1970 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1972 ath_err(common, "TXQ Update failed\n");
1974 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1975 if (queue == WME_AC_BE && !ret)
1976 ath_beaconq_config(sc);
1978 mutex_unlock(&sc->mutex);
1983 static int ath9k_set_key(struct ieee80211_hw *hw,
1984 enum set_key_cmd cmd,
1985 struct ieee80211_vif *vif,
1986 struct ieee80211_sta *sta,
1987 struct ieee80211_key_conf *key)
1989 struct ath_wiphy *aphy = hw->priv;
1990 struct ath_softc *sc = aphy->sc;
1991 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1994 if (ath9k_modparam_nohwcrypt)
1997 mutex_lock(&sc->mutex);
1998 ath9k_ps_wakeup(sc);
1999 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
2003 ret = ath_key_config(common, vif, sta, key);
2005 key->hw_key_idx = ret;
2006 /* push IV and Michael MIC generation to stack */
2007 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2008 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2009 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
2010 if (sc->sc_ah->sw_mgmt_crypto &&
2011 key->cipher == WLAN_CIPHER_SUITE_CCMP)
2012 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
2017 ath_key_delete(common, key);
2023 ath9k_ps_restore(sc);
2024 mutex_unlock(&sc->mutex);
2029 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2030 struct ieee80211_vif *vif,
2031 struct ieee80211_bss_conf *bss_conf,
2034 struct ath_wiphy *aphy = hw->priv;
2035 struct ath_softc *sc = aphy->sc;
2036 struct ath_hw *ah = sc->sc_ah;
2037 struct ath_common *common = ath9k_hw_common(ah);
2038 struct ath_vif *avp = (void *)vif->drv_priv;
2042 mutex_lock(&sc->mutex);
2044 if (changed & BSS_CHANGED_BSSID) {
2046 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2047 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2049 ath9k_hw_write_associd(ah);
2051 /* Set aggregation protection mode parameters */
2052 sc->config.ath_aggr_prot = 0;
2054 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2055 common->curbssid, common->curaid);
2057 /* need to reconfigure the beacon */
2058 sc->sc_flags &= ~SC_OP_BEACONS ;
2061 /* Enable transmission of beacons (AP, IBSS, MESH) */
2062 if ((changed & BSS_CHANGED_BEACON) ||
2063 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2064 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2065 error = ath_beacon_alloc(aphy, vif);
2067 ath_beacon_config(sc, vif);
2070 if (changed & BSS_CHANGED_ERP_SLOT) {
2071 if (bss_conf->use_short_slot)
2075 if (vif->type == NL80211_IFTYPE_AP) {
2077 * Defer update, so that connected stations can adjust
2078 * their settings at the same time.
2079 * See beacon.c for more details
2081 sc->beacon.slottime = slottime;
2082 sc->beacon.updateslot = UPDATE;
2084 ah->slottime = slottime;
2085 ath9k_hw_init_global_settings(ah);
2089 /* Disable transmission of beacons */
2090 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
2091 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2093 if (changed & BSS_CHANGED_BEACON_INT) {
2094 sc->beacon_interval = bss_conf->beacon_int;
2096 * In case of AP mode, the HW TSF has to be reset
2097 * when the beacon interval changes.
2099 if (vif->type == NL80211_IFTYPE_AP) {
2100 sc->sc_flags |= SC_OP_TSF_RESET;
2101 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2102 error = ath_beacon_alloc(aphy, vif);
2104 ath_beacon_config(sc, vif);
2106 ath_beacon_config(sc, vif);
2110 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2111 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2112 bss_conf->use_short_preamble);
2113 if (bss_conf->use_short_preamble)
2114 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2116 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2119 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2120 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2121 bss_conf->use_cts_prot);
2122 if (bss_conf->use_cts_prot &&
2123 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2124 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2126 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2129 if (changed & BSS_CHANGED_ASSOC) {
2130 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2132 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2135 mutex_unlock(&sc->mutex);
2138 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2141 struct ath_wiphy *aphy = hw->priv;
2142 struct ath_softc *sc = aphy->sc;
2144 mutex_lock(&sc->mutex);
2145 ath9k_ps_wakeup(sc);
2146 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2147 ath9k_ps_restore(sc);
2148 mutex_unlock(&sc->mutex);
2153 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2155 struct ath_wiphy *aphy = hw->priv;
2156 struct ath_softc *sc = aphy->sc;
2158 mutex_lock(&sc->mutex);
2159 ath9k_ps_wakeup(sc);
2160 ath9k_hw_settsf64(sc->sc_ah, tsf);
2161 ath9k_ps_restore(sc);
2162 mutex_unlock(&sc->mutex);
2165 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2167 struct ath_wiphy *aphy = hw->priv;
2168 struct ath_softc *sc = aphy->sc;
2170 mutex_lock(&sc->mutex);
2172 ath9k_ps_wakeup(sc);
2173 ath9k_hw_reset_tsf(sc->sc_ah);
2174 ath9k_ps_restore(sc);
2176 mutex_unlock(&sc->mutex);
2179 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2180 struct ieee80211_vif *vif,
2181 enum ieee80211_ampdu_mlme_action action,
2182 struct ieee80211_sta *sta,
2183 u16 tid, u16 *ssn, u8 buf_size)
2185 struct ath_wiphy *aphy = hw->priv;
2186 struct ath_softc *sc = aphy->sc;
2192 case IEEE80211_AMPDU_RX_START:
2193 if (!(sc->sc_flags & SC_OP_RXAGGR))
2196 case IEEE80211_AMPDU_RX_STOP:
2198 case IEEE80211_AMPDU_TX_START:
2199 if (!(sc->sc_flags & SC_OP_TXAGGR))
2202 ath9k_ps_wakeup(sc);
2203 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2205 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2206 ath9k_ps_restore(sc);
2208 case IEEE80211_AMPDU_TX_STOP:
2209 ath9k_ps_wakeup(sc);
2210 ath_tx_aggr_stop(sc, sta, tid);
2211 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2212 ath9k_ps_restore(sc);
2214 case IEEE80211_AMPDU_TX_OPERATIONAL:
2215 ath9k_ps_wakeup(sc);
2216 ath_tx_aggr_resume(sc, sta, tid);
2217 ath9k_ps_restore(sc);
2220 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2228 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2229 struct survey_info *survey)
2231 struct ath_wiphy *aphy = hw->priv;
2232 struct ath_softc *sc = aphy->sc;
2233 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2234 struct ieee80211_supported_band *sband;
2235 struct ieee80211_channel *chan;
2236 unsigned long flags;
2239 spin_lock_irqsave(&common->cc_lock, flags);
2241 ath_update_survey_stats(sc);
2243 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2244 if (sband && idx >= sband->n_channels) {
2245 idx -= sband->n_channels;
2250 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2252 if (!sband || idx >= sband->n_channels) {
2253 spin_unlock_irqrestore(&common->cc_lock, flags);
2257 chan = &sband->channels[idx];
2258 pos = chan->hw_value;
2259 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2260 survey->channel = chan;
2261 spin_unlock_irqrestore(&common->cc_lock, flags);
2266 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2268 struct ath_wiphy *aphy = hw->priv;
2269 struct ath_softc *sc = aphy->sc;
2271 mutex_lock(&sc->mutex);
2272 if (ath9k_wiphy_scanning(sc)) {
2274 * There is a race here in mac80211 but fixing it requires
2275 * we revisit how we handle the scan complete callback.
2276 * After mac80211 fixes we will not have configured hardware
2277 * to the home channel nor would we have configured the RX
2280 mutex_unlock(&sc->mutex);
2284 aphy->state = ATH_WIPHY_SCAN;
2285 ath9k_wiphy_pause_all_forced(sc, aphy);
2286 mutex_unlock(&sc->mutex);
2290 * XXX: this requires a revisit after the driver
2291 * scan_complete gets moved to another place/removed in mac80211.
2293 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2295 struct ath_wiphy *aphy = hw->priv;
2296 struct ath_softc *sc = aphy->sc;
2298 mutex_lock(&sc->mutex);
2299 aphy->state = ATH_WIPHY_ACTIVE;
2300 mutex_unlock(&sc->mutex);
2303 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2305 struct ath_wiphy *aphy = hw->priv;
2306 struct ath_softc *sc = aphy->sc;
2307 struct ath_hw *ah = sc->sc_ah;
2309 mutex_lock(&sc->mutex);
2310 ah->coverage_class = coverage_class;
2311 ath9k_hw_init_global_settings(ah);
2312 mutex_unlock(&sc->mutex);
2315 struct ieee80211_ops ath9k_ops = {
2317 .start = ath9k_start,
2319 .add_interface = ath9k_add_interface,
2320 .change_interface = ath9k_change_interface,
2321 .remove_interface = ath9k_remove_interface,
2322 .config = ath9k_config,
2323 .configure_filter = ath9k_configure_filter,
2324 .sta_add = ath9k_sta_add,
2325 .sta_remove = ath9k_sta_remove,
2326 .conf_tx = ath9k_conf_tx,
2327 .bss_info_changed = ath9k_bss_info_changed,
2328 .set_key = ath9k_set_key,
2329 .get_tsf = ath9k_get_tsf,
2330 .set_tsf = ath9k_set_tsf,
2331 .reset_tsf = ath9k_reset_tsf,
2332 .ampdu_action = ath9k_ampdu_action,
2333 .get_survey = ath9k_get_survey,
2334 .sw_scan_start = ath9k_sw_scan_start,
2335 .sw_scan_complete = ath9k_sw_scan_complete,
2336 .rfkill_poll = ath9k_rfkill_poll_state,
2337 .set_coverage_class = ath9k_set_coverage_class,