Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static u8 parse_mpdudensity(u8 mpdudensity)
22 {
23         /*
24          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
25          *   0 for no restriction
26          *   1 for 1/4 us
27          *   2 for 1/2 us
28          *   3 for 1 us
29          *   4 for 2 us
30          *   5 for 4 us
31          *   6 for 8 us
32          *   7 for 16 us
33          */
34         switch (mpdudensity) {
35         case 0:
36                 return 0;
37         case 1:
38         case 2:
39         case 3:
40                 /* Our lower layer calculations limit our precision to
41                    1 microsecond */
42                 return 1;
43         case 4:
44                 return 2;
45         case 5:
46                 return 4;
47         case 6:
48                 return 8;
49         case 7:
50                 return 16;
51         default:
52                 return 0;
53         }
54 }
55
56 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
57 {
58         unsigned long flags;
59         bool ret;
60
61         spin_lock_irqsave(&sc->sc_pm_lock, flags);
62         ret = ath9k_hw_setpower(sc->sc_ah, mode);
63         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
64
65         return ret;
66 }
67
68 void ath9k_ps_wakeup(struct ath_softc *sc)
69 {
70         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
71         unsigned long flags;
72         enum ath9k_power_mode power_mode;
73
74         spin_lock_irqsave(&sc->sc_pm_lock, flags);
75         if (++sc->ps_usecount != 1)
76                 goto unlock;
77
78         power_mode = sc->sc_ah->power_mode;
79         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
80
81         /*
82          * While the hardware is asleep, the cycle counters contain no
83          * useful data. Better clear them now so that they don't mess up
84          * survey data results.
85          */
86         if (power_mode != ATH9K_PM_AWAKE) {
87                 spin_lock(&common->cc_lock);
88                 ath_hw_cycle_counters_update(common);
89                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
90                 spin_unlock(&common->cc_lock);
91         }
92
93  unlock:
94         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
95 }
96
97 void ath9k_ps_restore(struct ath_softc *sc)
98 {
99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
100         unsigned long flags;
101
102         spin_lock_irqsave(&sc->sc_pm_lock, flags);
103         if (--sc->ps_usecount != 0)
104                 goto unlock;
105
106         spin_lock(&common->cc_lock);
107         ath_hw_cycle_counters_update(common);
108         spin_unlock(&common->cc_lock);
109
110         if (sc->ps_idle)
111                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
112         else if (sc->ps_enabled &&
113                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
114                               PS_WAIT_FOR_CAB |
115                               PS_WAIT_FOR_PSPOLL_DATA |
116                               PS_WAIT_FOR_TX_ACK)))
117                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
118
119  unlock:
120         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 }
122
123 static void ath_start_ani(struct ath_common *common)
124 {
125         struct ath_hw *ah = common->ah;
126         unsigned long timestamp = jiffies_to_msecs(jiffies);
127         struct ath_softc *sc = (struct ath_softc *) common->priv;
128
129         if (!(sc->sc_flags & SC_OP_ANI_RUN))
130                 return;
131
132         if (sc->sc_flags & SC_OP_OFFCHANNEL)
133                 return;
134
135         common->ani.longcal_timer = timestamp;
136         common->ani.shortcal_timer = timestamp;
137         common->ani.checkani_timer = timestamp;
138
139         mod_timer(&common->ani.timer,
140                   jiffies +
141                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
142 }
143
144 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
145 {
146         struct ath_hw *ah = sc->sc_ah;
147         struct ath9k_channel *chan = &ah->channels[channel];
148         struct survey_info *survey = &sc->survey[channel];
149
150         if (chan->noisefloor) {
151                 survey->filled |= SURVEY_INFO_NOISE_DBM;
152                 survey->noise = chan->noisefloor;
153         }
154 }
155
156 /*
157  * Updates the survey statistics and returns the busy time since last
158  * update in %, if the measurement duration was long enough for the
159  * result to be useful, -1 otherwise.
160  */
161 static int ath_update_survey_stats(struct ath_softc *sc)
162 {
163         struct ath_hw *ah = sc->sc_ah;
164         struct ath_common *common = ath9k_hw_common(ah);
165         int pos = ah->curchan - &ah->channels[0];
166         struct survey_info *survey = &sc->survey[pos];
167         struct ath_cycle_counters *cc = &common->cc_survey;
168         unsigned int div = common->clockrate * 1000;
169         int ret = 0;
170
171         if (!ah->curchan)
172                 return -1;
173
174         if (ah->power_mode == ATH9K_PM_AWAKE)
175                 ath_hw_cycle_counters_update(common);
176
177         if (cc->cycles > 0) {
178                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
179                         SURVEY_INFO_CHANNEL_TIME_BUSY |
180                         SURVEY_INFO_CHANNEL_TIME_RX |
181                         SURVEY_INFO_CHANNEL_TIME_TX;
182                 survey->channel_time += cc->cycles / div;
183                 survey->channel_time_busy += cc->rx_busy / div;
184                 survey->channel_time_rx += cc->rx_frame / div;
185                 survey->channel_time_tx += cc->tx_frame / div;
186         }
187
188         if (cc->cycles < div)
189                 return -1;
190
191         if (cc->cycles > 0)
192                 ret = cc->rx_busy * 100 / cc->cycles;
193
194         memset(cc, 0, sizeof(*cc));
195
196         ath_update_survey_nf(sc, pos);
197
198         return ret;
199 }
200
201 /*
202  * Set/change channels.  If the channel is really being changed, it's done
203  * by reseting the chip.  To accomplish this we must first cleanup any pending
204  * DMA, then restart stuff.
205 */
206 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
207                     struct ath9k_channel *hchan)
208 {
209         struct ath_hw *ah = sc->sc_ah;
210         struct ath_common *common = ath9k_hw_common(ah);
211         struct ieee80211_conf *conf = &common->hw->conf;
212         bool fastcc = true, stopped;
213         struct ieee80211_channel *channel = hw->conf.channel;
214         struct ath9k_hw_cal_data *caldata = NULL;
215         int r;
216
217         if (sc->sc_flags & SC_OP_INVALID)
218                 return -EIO;
219
220         sc->hw_busy_count = 0;
221
222         del_timer_sync(&common->ani.timer);
223         cancel_work_sync(&sc->paprd_work);
224         cancel_work_sync(&sc->hw_check_work);
225         cancel_delayed_work_sync(&sc->tx_complete_work);
226         cancel_delayed_work_sync(&sc->hw_pll_work);
227
228         ath9k_ps_wakeup(sc);
229
230         spin_lock_bh(&sc->sc_pcu_lock);
231
232         /*
233          * This is only performed if the channel settings have
234          * actually changed.
235          *
236          * To switch channels clear any pending DMA operations;
237          * wait long enough for the RX fifo to drain, reset the
238          * hardware at the new frequency, and then re-enable
239          * the relevant bits of the h/w.
240          */
241         ath9k_hw_disable_interrupts(ah);
242         stopped = ath_drain_all_txq(sc, false);
243
244         if (!ath_stoprecv(sc))
245                 stopped = false;
246
247         if (!ath9k_hw_check_alive(ah))
248                 stopped = false;
249
250         /* XXX: do not flush receive queue here. We don't want
251          * to flush data frames already in queue because of
252          * changing channel. */
253
254         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
255                 fastcc = false;
256
257         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
258                 caldata = &sc->caldata;
259
260         ath_dbg(common, ATH_DBG_CONFIG,
261                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
262                 sc->sc_ah->curchan->channel,
263                 channel->center_freq, conf_is_ht40(conf),
264                 fastcc);
265
266         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
267         if (r) {
268                 ath_err(common,
269                         "Unable to reset channel (%u MHz), reset status %d\n",
270                         channel->center_freq, r);
271                 goto ps_restore;
272         }
273
274         if (ath_startrecv(sc) != 0) {
275                 ath_err(common, "Unable to restart recv logic\n");
276                 r = -EIO;
277                 goto ps_restore;
278         }
279
280         ath9k_cmn_update_txpow(ah, sc->curtxpow,
281                                sc->config.txpowlimit, &sc->curtxpow);
282         ath9k_hw_set_interrupts(ah, ah->imask);
283
284         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
285                 if (sc->sc_flags & SC_OP_BEACONS)
286                         ath_beacon_config(sc, NULL);
287                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
288                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
289                 ath_start_ani(common);
290         }
291
292  ps_restore:
293         ieee80211_wake_queues(hw);
294
295         spin_unlock_bh(&sc->sc_pcu_lock);
296
297         ath9k_ps_restore(sc);
298         return r;
299 }
300
301 static void ath_paprd_activate(struct ath_softc *sc)
302 {
303         struct ath_hw *ah = sc->sc_ah;
304         struct ath9k_hw_cal_data *caldata = ah->caldata;
305         struct ath_common *common = ath9k_hw_common(ah);
306         int chain;
307
308         if (!caldata || !caldata->paprd_done)
309                 return;
310
311         ath9k_ps_wakeup(sc);
312         ar9003_paprd_enable(ah, false);
313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314                 if (!(common->tx_chainmask & BIT(chain)))
315                         continue;
316
317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
318         }
319
320         ar9003_paprd_enable(ah, true);
321         ath9k_ps_restore(sc);
322 }
323
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
325 {
326         struct ieee80211_hw *hw = sc->hw;
327         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328         struct ath_hw *ah = sc->sc_ah;
329         struct ath_common *common = ath9k_hw_common(ah);
330         struct ath_tx_control txctl;
331         int time_left;
332
333         memset(&txctl, 0, sizeof(txctl));
334         txctl.txq = sc->tx.txq_map[WME_AC_BE];
335
336         memset(tx_info, 0, sizeof(*tx_info));
337         tx_info->band = hw->conf.channel->band;
338         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
339         tx_info->control.rates[0].idx = 0;
340         tx_info->control.rates[0].count = 1;
341         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
342         tx_info->control.rates[1].idx = -1;
343
344         init_completion(&sc->paprd_complete);
345         txctl.paprd = BIT(chain);
346
347         if (ath_tx_start(hw, skb, &txctl) != 0) {
348                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
349                 dev_kfree_skb_any(skb);
350                 return false;
351         }
352
353         time_left = wait_for_completion_timeout(&sc->paprd_complete,
354                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
355
356         if (!time_left)
357                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
358                         "Timeout waiting for paprd training on TX chain %d\n",
359                         chain);
360
361         return !!time_left;
362 }
363
364 void ath_paprd_calibrate(struct work_struct *work)
365 {
366         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
367         struct ieee80211_hw *hw = sc->hw;
368         struct ath_hw *ah = sc->sc_ah;
369         struct ieee80211_hdr *hdr;
370         struct sk_buff *skb = NULL;
371         struct ath9k_hw_cal_data *caldata = ah->caldata;
372         struct ath_common *common = ath9k_hw_common(ah);
373         int ftype;
374         int chain_ok = 0;
375         int chain;
376         int len = 1800;
377
378         if (!caldata)
379                 return;
380
381         if (ar9003_paprd_init_table(ah) < 0)
382                 return;
383
384         skb = alloc_skb(len, GFP_KERNEL);
385         if (!skb)
386                 return;
387
388         skb_put(skb, len);
389         memset(skb->data, 0, len);
390         hdr = (struct ieee80211_hdr *)skb->data;
391         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
392         hdr->frame_control = cpu_to_le16(ftype);
393         hdr->duration_id = cpu_to_le16(10);
394         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
395         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
396         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
397
398         ath9k_ps_wakeup(sc);
399         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
400                 if (!(common->tx_chainmask & BIT(chain)))
401                         continue;
402
403                 chain_ok = 0;
404
405                 ath_dbg(common, ATH_DBG_CALIBRATE,
406                         "Sending PAPRD frame for thermal measurement "
407                         "on chain %d\n", chain);
408                 if (!ath_paprd_send_frame(sc, skb, chain))
409                         goto fail_paprd;
410
411                 ar9003_paprd_setup_gain_table(ah, chain);
412
413                 ath_dbg(common, ATH_DBG_CALIBRATE,
414                         "Sending PAPRD training frame on chain %d\n", chain);
415                 if (!ath_paprd_send_frame(sc, skb, chain))
416                         goto fail_paprd;
417
418                 if (!ar9003_paprd_is_done(ah))
419                         break;
420
421                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
422                         break;
423
424                 chain_ok = 1;
425         }
426         kfree_skb(skb);
427
428         if (chain_ok) {
429                 caldata->paprd_done = true;
430                 ath_paprd_activate(sc);
431         }
432
433 fail_paprd:
434         ath9k_ps_restore(sc);
435 }
436
437 /*
438  *  This routine performs the periodic noise floor calibration function
439  *  that is used to adjust and optimize the chip performance.  This
440  *  takes environmental changes (location, temperature) into account.
441  *  When the task is complete, it reschedules itself depending on the
442  *  appropriate interval that was calculated.
443  */
444 void ath_ani_calibrate(unsigned long data)
445 {
446         struct ath_softc *sc = (struct ath_softc *)data;
447         struct ath_hw *ah = sc->sc_ah;
448         struct ath_common *common = ath9k_hw_common(ah);
449         bool longcal = false;
450         bool shortcal = false;
451         bool aniflag = false;
452         unsigned int timestamp = jiffies_to_msecs(jiffies);
453         u32 cal_interval, short_cal_interval, long_cal_interval;
454         unsigned long flags;
455
456         if (ah->caldata && ah->caldata->nfcal_interference)
457                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
458         else
459                 long_cal_interval = ATH_LONG_CALINTERVAL;
460
461         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
462                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
463
464         /* Only calibrate if awake */
465         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
466                 goto set_timer;
467
468         ath9k_ps_wakeup(sc);
469
470         /* Long calibration runs independently of short calibration. */
471         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
472                 longcal = true;
473                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
474                 common->ani.longcal_timer = timestamp;
475         }
476
477         /* Short calibration applies only while caldone is false */
478         if (!common->ani.caldone) {
479                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
480                         shortcal = true;
481                         ath_dbg(common, ATH_DBG_ANI,
482                                 "shortcal @%lu\n", jiffies);
483                         common->ani.shortcal_timer = timestamp;
484                         common->ani.resetcal_timer = timestamp;
485                 }
486         } else {
487                 if ((timestamp - common->ani.resetcal_timer) >=
488                     ATH_RESTART_CALINTERVAL) {
489                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
490                         if (common->ani.caldone)
491                                 common->ani.resetcal_timer = timestamp;
492                 }
493         }
494
495         /* Verify whether we must check ANI */
496         if ((timestamp - common->ani.checkani_timer) >=
497              ah->config.ani_poll_interval) {
498                 aniflag = true;
499                 common->ani.checkani_timer = timestamp;
500         }
501
502         /* Skip all processing if there's nothing to do. */
503         if (longcal || shortcal || aniflag) {
504                 /* Call ANI routine if necessary */
505                 if (aniflag) {
506                         spin_lock_irqsave(&common->cc_lock, flags);
507                         ath9k_hw_ani_monitor(ah, ah->curchan);
508                         ath_update_survey_stats(sc);
509                         spin_unlock_irqrestore(&common->cc_lock, flags);
510                 }
511
512                 /* Perform calibration if necessary */
513                 if (longcal || shortcal) {
514                         common->ani.caldone =
515                                 ath9k_hw_calibrate(ah,
516                                                    ah->curchan,
517                                                    common->rx_chainmask,
518                                                    longcal);
519                 }
520         }
521
522         ath9k_ps_restore(sc);
523
524 set_timer:
525         /*
526         * Set timer interval based on previous results.
527         * The interval must be the shortest necessary to satisfy ANI,
528         * short calibration and long calibration.
529         */
530         cal_interval = ATH_LONG_CALINTERVAL;
531         if (sc->sc_ah->config.enable_ani)
532                 cal_interval = min(cal_interval,
533                                    (u32)ah->config.ani_poll_interval);
534         if (!common->ani.caldone)
535                 cal_interval = min(cal_interval, (u32)short_cal_interval);
536
537         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
538         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
539                 if (!ah->caldata->paprd_done)
540                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
541                 else if (!ah->paprd_table_write_done)
542                         ath_paprd_activate(sc);
543         }
544 }
545
546 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
547 {
548         struct ath_node *an;
549         struct ath_hw *ah = sc->sc_ah;
550         an = (struct ath_node *)sta->drv_priv;
551
552 #ifdef CONFIG_ATH9K_DEBUGFS
553         spin_lock(&sc->nodes_lock);
554         list_add(&an->list, &sc->nodes);
555         spin_unlock(&sc->nodes_lock);
556         an->sta = sta;
557 #endif
558         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
559                 sc->sc_flags |= SC_OP_ENABLE_APM;
560
561         if (sc->sc_flags & SC_OP_TXAGGR) {
562                 ath_tx_node_init(sc, an);
563                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
564                                      sta->ht_cap.ampdu_factor);
565                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
566         }
567 }
568
569 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
570 {
571         struct ath_node *an = (struct ath_node *)sta->drv_priv;
572
573 #ifdef CONFIG_ATH9K_DEBUGFS
574         spin_lock(&sc->nodes_lock);
575         list_del(&an->list);
576         spin_unlock(&sc->nodes_lock);
577         an->sta = NULL;
578 #endif
579
580         if (sc->sc_flags & SC_OP_TXAGGR)
581                 ath_tx_node_cleanup(sc, an);
582 }
583
584 void ath_hw_check(struct work_struct *work)
585 {
586         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
587         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
588         unsigned long flags;
589         int busy;
590
591         ath9k_ps_wakeup(sc);
592         if (ath9k_hw_check_alive(sc->sc_ah))
593                 goto out;
594
595         spin_lock_irqsave(&common->cc_lock, flags);
596         busy = ath_update_survey_stats(sc);
597         spin_unlock_irqrestore(&common->cc_lock, flags);
598
599         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
600                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
601         if (busy >= 99) {
602                 if (++sc->hw_busy_count >= 3)
603                         ath_reset(sc, true);
604         } else if (busy >= 0)
605                 sc->hw_busy_count = 0;
606
607 out:
608         ath9k_ps_restore(sc);
609 }
610
611 void ath9k_tasklet(unsigned long data)
612 {
613         struct ath_softc *sc = (struct ath_softc *)data;
614         struct ath_hw *ah = sc->sc_ah;
615         struct ath_common *common = ath9k_hw_common(ah);
616
617         u32 status = sc->intrstatus;
618         u32 rxmask;
619
620         if (status & ATH9K_INT_FATAL) {
621                 ath_reset(sc, true);
622                 return;
623         }
624
625         ath9k_ps_wakeup(sc);
626         spin_lock(&sc->sc_pcu_lock);
627
628         /*
629          * Only run the baseband hang check if beacons stop working in AP or
630          * IBSS mode, because it has a high false positive rate. For station
631          * mode it should not be necessary, since the upper layers will detect
632          * this through a beacon miss automatically and the following channel
633          * change will trigger a hardware reset anyway
634          */
635         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
636             !ath9k_hw_check_alive(ah))
637                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
638
639         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
640                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
641                           ATH9K_INT_RXORN);
642         else
643                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
644
645         if (status & rxmask) {
646                 /* Check for high priority Rx first */
647                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
648                     (status & ATH9K_INT_RXHP))
649                         ath_rx_tasklet(sc, 0, true);
650
651                 ath_rx_tasklet(sc, 0, false);
652         }
653
654         if (status & ATH9K_INT_TX) {
655                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
656                         ath_tx_edma_tasklet(sc);
657                 else
658                         ath_tx_tasklet(sc);
659         }
660
661         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
662                 /*
663                  * TSF sync does not look correct; remain awake to sync with
664                  * the next Beacon.
665                  */
666                 ath_dbg(common, ATH_DBG_PS,
667                         "TSFOOR - Sync with next Beacon\n");
668                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
669         }
670
671         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
672                 if (status & ATH9K_INT_GENTIMER)
673                         ath_gen_timer_isr(sc->sc_ah);
674
675         /* re-enable hardware interrupt */
676         ath9k_hw_enable_interrupts(ah);
677
678         spin_unlock(&sc->sc_pcu_lock);
679         ath9k_ps_restore(sc);
680 }
681
682 irqreturn_t ath_isr(int irq, void *dev)
683 {
684 #define SCHED_INTR (                            \
685                 ATH9K_INT_FATAL |               \
686                 ATH9K_INT_RXORN |               \
687                 ATH9K_INT_RXEOL |               \
688                 ATH9K_INT_RX |                  \
689                 ATH9K_INT_RXLP |                \
690                 ATH9K_INT_RXHP |                \
691                 ATH9K_INT_TX |                  \
692                 ATH9K_INT_BMISS |               \
693                 ATH9K_INT_CST |                 \
694                 ATH9K_INT_TSFOOR |              \
695                 ATH9K_INT_GENTIMER)
696
697         struct ath_softc *sc = dev;
698         struct ath_hw *ah = sc->sc_ah;
699         struct ath_common *common = ath9k_hw_common(ah);
700         enum ath9k_int status;
701         bool sched = false;
702
703         /*
704          * The hardware is not ready/present, don't
705          * touch anything. Note this can happen early
706          * on if the IRQ is shared.
707          */
708         if (sc->sc_flags & SC_OP_INVALID)
709                 return IRQ_NONE;
710
711
712         /* shared irq, not for us */
713
714         if (!ath9k_hw_intrpend(ah))
715                 return IRQ_NONE;
716
717         /*
718          * Figure out the reason(s) for the interrupt.  Note
719          * that the hal returns a pseudo-ISR that may include
720          * bits we haven't explicitly enabled so we mask the
721          * value to insure we only process bits we requested.
722          */
723         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
724         status &= ah->imask;    /* discard unasked-for bits */
725
726         /*
727          * If there are no status bits set, then this interrupt was not
728          * for me (should have been caught above).
729          */
730         if (!status)
731                 return IRQ_NONE;
732
733         /* Cache the status */
734         sc->intrstatus = status;
735
736         if (status & SCHED_INTR)
737                 sched = true;
738
739         /*
740          * If a FATAL or RXORN interrupt is received, we have to reset the
741          * chip immediately.
742          */
743         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
744             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
745                 goto chip_reset;
746
747         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
748             (status & ATH9K_INT_BB_WATCHDOG)) {
749
750                 spin_lock(&common->cc_lock);
751                 ath_hw_cycle_counters_update(common);
752                 ar9003_hw_bb_watchdog_dbg_info(ah);
753                 spin_unlock(&common->cc_lock);
754
755                 goto chip_reset;
756         }
757
758         if (status & ATH9K_INT_SWBA)
759                 tasklet_schedule(&sc->bcon_tasklet);
760
761         if (status & ATH9K_INT_TXURN)
762                 ath9k_hw_updatetxtriglevel(ah, true);
763
764         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
765                 if (status & ATH9K_INT_RXEOL) {
766                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
767                         ath9k_hw_set_interrupts(ah, ah->imask);
768                 }
769         }
770
771         if (status & ATH9K_INT_MIB) {
772                 /*
773                  * Disable interrupts until we service the MIB
774                  * interrupt; otherwise it will continue to
775                  * fire.
776                  */
777                 ath9k_hw_disable_interrupts(ah);
778                 /*
779                  * Let the hal handle the event. We assume
780                  * it will clear whatever condition caused
781                  * the interrupt.
782                  */
783                 spin_lock(&common->cc_lock);
784                 ath9k_hw_proc_mib_event(ah);
785                 spin_unlock(&common->cc_lock);
786                 ath9k_hw_enable_interrupts(ah);
787         }
788
789         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
790                 if (status & ATH9K_INT_TIM_TIMER) {
791                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
792                                 goto chip_reset;
793                         /* Clear RxAbort bit so that we can
794                          * receive frames */
795                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
796                         ath9k_hw_setrxabort(sc->sc_ah, 0);
797                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
798                 }
799
800 chip_reset:
801
802         ath_debug_stat_interrupt(sc, status);
803
804         if (sched) {
805                 /* turn off every interrupt */
806                 ath9k_hw_disable_interrupts(ah);
807                 tasklet_schedule(&sc->intr_tq);
808         }
809
810         return IRQ_HANDLED;
811
812 #undef SCHED_INTR
813 }
814
815 static void ath9k_bss_assoc_info(struct ath_softc *sc,
816                                  struct ieee80211_hw *hw,
817                                  struct ieee80211_vif *vif,
818                                  struct ieee80211_bss_conf *bss_conf)
819 {
820         struct ath_hw *ah = sc->sc_ah;
821         struct ath_common *common = ath9k_hw_common(ah);
822
823         if (bss_conf->assoc) {
824                 ath_dbg(common, ATH_DBG_CONFIG,
825                         "Bss Info ASSOC %d, bssid: %pM\n",
826                         bss_conf->aid, common->curbssid);
827
828                 /* New association, store aid */
829                 common->curaid = bss_conf->aid;
830                 ath9k_hw_write_associd(ah);
831
832                 /*
833                  * Request a re-configuration of Beacon related timers
834                  * on the receipt of the first Beacon frame (i.e.,
835                  * after time sync with the AP).
836                  */
837                 sc->ps_flags |= PS_BEACON_SYNC;
838
839                 /* Configure the beacon */
840                 ath_beacon_config(sc, vif);
841
842                 /* Reset rssi stats */
843                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
844                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
845
846                 sc->sc_flags |= SC_OP_ANI_RUN;
847                 ath_start_ani(common);
848         } else {
849                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
850                 common->curaid = 0;
851                 /* Stop ANI */
852                 sc->sc_flags &= ~SC_OP_ANI_RUN;
853                 del_timer_sync(&common->ani.timer);
854         }
855 }
856
857 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
858 {
859         struct ath_hw *ah = sc->sc_ah;
860         struct ath_common *common = ath9k_hw_common(ah);
861         struct ieee80211_channel *channel = hw->conf.channel;
862         int r;
863
864         ath9k_ps_wakeup(sc);
865         spin_lock_bh(&sc->sc_pcu_lock);
866
867         ath9k_hw_configpcipowersave(ah, 0, 0);
868
869         if (!ah->curchan)
870                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
871
872         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
873         if (r) {
874                 ath_err(common,
875                         "Unable to reset channel (%u MHz), reset status %d\n",
876                         channel->center_freq, r);
877         }
878
879         ath9k_cmn_update_txpow(ah, sc->curtxpow,
880                                sc->config.txpowlimit, &sc->curtxpow);
881         if (ath_startrecv(sc) != 0) {
882                 ath_err(common, "Unable to restart recv logic\n");
883                 goto out;
884         }
885         if (sc->sc_flags & SC_OP_BEACONS)
886                 ath_beacon_config(sc, NULL);    /* restart beacons */
887
888         /* Re-Enable  interrupts */
889         ath9k_hw_set_interrupts(ah, ah->imask);
890
891         /* Enable LED */
892         ath9k_hw_cfg_output(ah, ah->led_pin,
893                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
894         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
895
896         ieee80211_wake_queues(hw);
897 out:
898         spin_unlock_bh(&sc->sc_pcu_lock);
899
900         ath9k_ps_restore(sc);
901 }
902
903 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
904 {
905         struct ath_hw *ah = sc->sc_ah;
906         struct ieee80211_channel *channel = hw->conf.channel;
907         int r;
908
909         ath9k_ps_wakeup(sc);
910         spin_lock_bh(&sc->sc_pcu_lock);
911
912         ieee80211_stop_queues(hw);
913
914         /*
915          * Keep the LED on when the radio is disabled
916          * during idle unassociated state.
917          */
918         if (!sc->ps_idle) {
919                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
920                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
921         }
922
923         /* Disable interrupts */
924         ath9k_hw_disable_interrupts(ah);
925
926         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
927
928         ath_stoprecv(sc);               /* turn off frame recv */
929         ath_flushrecv(sc);              /* flush recv queue */
930
931         if (!ah->curchan)
932                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
933
934         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
935         if (r) {
936                 ath_err(ath9k_hw_common(sc->sc_ah),
937                         "Unable to reset channel (%u MHz), reset status %d\n",
938                         channel->center_freq, r);
939         }
940
941         ath9k_hw_phy_disable(ah);
942
943         ath9k_hw_configpcipowersave(ah, 1, 1);
944
945         spin_unlock_bh(&sc->sc_pcu_lock);
946         ath9k_ps_restore(sc);
947 }
948
949 int ath_reset(struct ath_softc *sc, bool retry_tx)
950 {
951         struct ath_hw *ah = sc->sc_ah;
952         struct ath_common *common = ath9k_hw_common(ah);
953         struct ieee80211_hw *hw = sc->hw;
954         int r;
955
956         sc->hw_busy_count = 0;
957
958         /* Stop ANI */
959         del_timer_sync(&common->ani.timer);
960
961         ath9k_ps_wakeup(sc);
962         spin_lock_bh(&sc->sc_pcu_lock);
963
964         ieee80211_stop_queues(hw);
965
966         ath9k_hw_disable_interrupts(ah);
967         ath_drain_all_txq(sc, retry_tx);
968
969         ath_stoprecv(sc);
970         ath_flushrecv(sc);
971
972         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
973         if (r)
974                 ath_err(common,
975                         "Unable to reset hardware; reset status %d\n", r);
976
977         if (ath_startrecv(sc) != 0)
978                 ath_err(common, "Unable to start recv logic\n");
979
980         /*
981          * We may be doing a reset in response to a request
982          * that changes the channel so update any state that
983          * might change as a result.
984          */
985         ath9k_cmn_update_txpow(ah, sc->curtxpow,
986                                sc->config.txpowlimit, &sc->curtxpow);
987
988         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
989                 ath_beacon_config(sc, NULL);    /* restart beacons */
990
991         ath9k_hw_set_interrupts(ah, ah->imask);
992
993         if (retry_tx) {
994                 int i;
995                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
996                         if (ATH_TXQ_SETUP(sc, i)) {
997                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
998                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
999                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1000                         }
1001                 }
1002         }
1003
1004         ieee80211_wake_queues(hw);
1005         spin_unlock_bh(&sc->sc_pcu_lock);
1006
1007         /* Start ANI */
1008         ath_start_ani(common);
1009         ath9k_ps_restore(sc);
1010
1011         return r;
1012 }
1013
1014 /**********************/
1015 /* mac80211 callbacks */
1016 /**********************/
1017
1018 static int ath9k_start(struct ieee80211_hw *hw)
1019 {
1020         struct ath_softc *sc = hw->priv;
1021         struct ath_hw *ah = sc->sc_ah;
1022         struct ath_common *common = ath9k_hw_common(ah);
1023         struct ieee80211_channel *curchan = hw->conf.channel;
1024         struct ath9k_channel *init_channel;
1025         int r;
1026
1027         ath_dbg(common, ATH_DBG_CONFIG,
1028                 "Starting driver with initial channel: %d MHz\n",
1029                 curchan->center_freq);
1030
1031         mutex_lock(&sc->mutex);
1032
1033         /* setup initial channel */
1034         sc->chan_idx = curchan->hw_value;
1035
1036         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1037
1038         /* Reset SERDES registers */
1039         ath9k_hw_configpcipowersave(ah, 0, 0);
1040
1041         /*
1042          * The basic interface to setting the hardware in a good
1043          * state is ``reset''.  On return the hardware is known to
1044          * be powered up and with interrupts disabled.  This must
1045          * be followed by initialization of the appropriate bits
1046          * and then setup of the interrupt mask.
1047          */
1048         spin_lock_bh(&sc->sc_pcu_lock);
1049         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1050         if (r) {
1051                 ath_err(common,
1052                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1053                         r, curchan->center_freq);
1054                 spin_unlock_bh(&sc->sc_pcu_lock);
1055                 goto mutex_unlock;
1056         }
1057
1058         /*
1059          * This is needed only to setup initial state
1060          * but it's best done after a reset.
1061          */
1062         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1063                         sc->config.txpowlimit, &sc->curtxpow);
1064
1065         /*
1066          * Setup the hardware after reset:
1067          * The receive engine is set going.
1068          * Frame transmit is handled entirely
1069          * in the frame output path; there's nothing to do
1070          * here except setup the interrupt mask.
1071          */
1072         if (ath_startrecv(sc) != 0) {
1073                 ath_err(common, "Unable to start recv logic\n");
1074                 r = -EIO;
1075                 spin_unlock_bh(&sc->sc_pcu_lock);
1076                 goto mutex_unlock;
1077         }
1078         spin_unlock_bh(&sc->sc_pcu_lock);
1079
1080         /* Setup our intr mask. */
1081         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1082                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1083                     ATH9K_INT_GLOBAL;
1084
1085         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1086                 ah->imask |= ATH9K_INT_RXHP |
1087                              ATH9K_INT_RXLP |
1088                              ATH9K_INT_BB_WATCHDOG;
1089         else
1090                 ah->imask |= ATH9K_INT_RX;
1091
1092         ah->imask |= ATH9K_INT_GTT;
1093
1094         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1095                 ah->imask |= ATH9K_INT_CST;
1096
1097         sc->sc_flags &= ~SC_OP_INVALID;
1098         sc->sc_ah->is_monitoring = false;
1099
1100         /* Disable BMISS interrupt when we're not associated */
1101         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1102         ath9k_hw_set_interrupts(ah, ah->imask);
1103
1104         ieee80211_wake_queues(hw);
1105
1106         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1107
1108         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1109             !ah->btcoex_hw.enabled) {
1110                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1111                                            AR_STOMP_LOW_WLAN_WGHT);
1112                 ath9k_hw_btcoex_enable(ah);
1113
1114                 if (common->bus_ops->bt_coex_prep)
1115                         common->bus_ops->bt_coex_prep(common);
1116                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1117                         ath9k_btcoex_timer_resume(sc);
1118         }
1119
1120         /* User has the option to provide pm-qos value as a module
1121          * parameter rather than using the default value of
1122          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1123          */
1124         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1125
1126         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1127                 common->bus_ops->extn_synch_en(common);
1128
1129 mutex_unlock:
1130         mutex_unlock(&sc->mutex);
1131
1132         return r;
1133 }
1134
1135 static int ath9k_tx(struct ieee80211_hw *hw,
1136                     struct sk_buff *skb)
1137 {
1138         struct ath_softc *sc = hw->priv;
1139         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1140         struct ath_tx_control txctl;
1141         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1142
1143         if (sc->ps_enabled) {
1144                 /*
1145                  * mac80211 does not set PM field for normal data frames, so we
1146                  * need to update that based on the current PS mode.
1147                  */
1148                 if (ieee80211_is_data(hdr->frame_control) &&
1149                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1150                     !ieee80211_has_pm(hdr->frame_control)) {
1151                         ath_dbg(common, ATH_DBG_PS,
1152                                 "Add PM=1 for a TX frame while in PS mode\n");
1153                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1154                 }
1155         }
1156
1157         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1158                 /*
1159                  * We are using PS-Poll and mac80211 can request TX while in
1160                  * power save mode. Need to wake up hardware for the TX to be
1161                  * completed and if needed, also for RX of buffered frames.
1162                  */
1163                 ath9k_ps_wakeup(sc);
1164                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1165                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1166                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1167                         ath_dbg(common, ATH_DBG_PS,
1168                                 "Sending PS-Poll to pick a buffered frame\n");
1169                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1170                 } else {
1171                         ath_dbg(common, ATH_DBG_PS,
1172                                 "Wake up to complete TX\n");
1173                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1174                 }
1175                 /*
1176                  * The actual restore operation will happen only after
1177                  * the sc_flags bit is cleared. We are just dropping
1178                  * the ps_usecount here.
1179                  */
1180                 ath9k_ps_restore(sc);
1181         }
1182
1183         memset(&txctl, 0, sizeof(struct ath_tx_control));
1184         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1185
1186         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1187
1188         if (ath_tx_start(hw, skb, &txctl) != 0) {
1189                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1190                 goto exit;
1191         }
1192
1193         return 0;
1194 exit:
1195         dev_kfree_skb_any(skb);
1196         return 0;
1197 }
1198
1199 static void ath9k_stop(struct ieee80211_hw *hw)
1200 {
1201         struct ath_softc *sc = hw->priv;
1202         struct ath_hw *ah = sc->sc_ah;
1203         struct ath_common *common = ath9k_hw_common(ah);
1204
1205         mutex_lock(&sc->mutex);
1206
1207         if (led_blink)
1208                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1209
1210         cancel_delayed_work_sync(&sc->tx_complete_work);
1211         cancel_delayed_work_sync(&sc->hw_pll_work);
1212         cancel_work_sync(&sc->paprd_work);
1213         cancel_work_sync(&sc->hw_check_work);
1214
1215         if (sc->sc_flags & SC_OP_INVALID) {
1216                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1217                 mutex_unlock(&sc->mutex);
1218                 return;
1219         }
1220
1221         /* Ensure HW is awake when we try to shut it down. */
1222         ath9k_ps_wakeup(sc);
1223
1224         if (ah->btcoex_hw.enabled) {
1225                 ath9k_hw_btcoex_disable(ah);
1226                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1227                         ath9k_btcoex_timer_pause(sc);
1228         }
1229
1230         spin_lock_bh(&sc->sc_pcu_lock);
1231
1232         /* prevent tasklets to enable interrupts once we disable them */
1233         ah->imask &= ~ATH9K_INT_GLOBAL;
1234
1235         /* make sure h/w will not generate any interrupt
1236          * before setting the invalid flag. */
1237         ath9k_hw_disable_interrupts(ah);
1238
1239         if (!(sc->sc_flags & SC_OP_INVALID)) {
1240                 ath_drain_all_txq(sc, false);
1241                 ath_stoprecv(sc);
1242                 ath9k_hw_phy_disable(ah);
1243         } else
1244                 sc->rx.rxlink = NULL;
1245
1246         if (sc->rx.frag) {
1247                 dev_kfree_skb_any(sc->rx.frag);
1248                 sc->rx.frag = NULL;
1249         }
1250
1251         /* disable HAL and put h/w to sleep */
1252         ath9k_hw_disable(ah);
1253         ath9k_hw_configpcipowersave(ah, 1, 1);
1254
1255         spin_unlock_bh(&sc->sc_pcu_lock);
1256
1257         /* we can now sync irq and kill any running tasklets, since we already
1258          * disabled interrupts and not holding a spin lock */
1259         synchronize_irq(sc->irq);
1260         tasklet_kill(&sc->intr_tq);
1261         tasklet_kill(&sc->bcon_tasklet);
1262
1263         ath9k_ps_restore(sc);
1264
1265         sc->ps_idle = true;
1266         ath_radio_disable(sc, hw);
1267
1268         sc->sc_flags |= SC_OP_INVALID;
1269
1270         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1271
1272         mutex_unlock(&sc->mutex);
1273
1274         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1275 }
1276
1277 bool ath9k_uses_beacons(int type)
1278 {
1279         switch (type) {
1280         case NL80211_IFTYPE_AP:
1281         case NL80211_IFTYPE_ADHOC:
1282         case NL80211_IFTYPE_MESH_POINT:
1283                 return true;
1284         default:
1285                 return false;
1286         }
1287 }
1288
1289 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1290                                  struct ieee80211_vif *vif)
1291 {
1292         struct ath_vif *avp = (void *)vif->drv_priv;
1293
1294         /* Disable SWBA interrupt */
1295         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1296         ath9k_ps_wakeup(sc);
1297         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1298         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1299         tasklet_kill(&sc->bcon_tasklet);
1300         ath9k_ps_restore(sc);
1301
1302         ath_beacon_return(sc, avp);
1303         sc->sc_flags &= ~SC_OP_BEACONS;
1304
1305         if (sc->nbcnvifs > 0) {
1306                 /* Re-enable beaconing */
1307                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1308                 ath9k_ps_wakeup(sc);
1309                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1310                 ath9k_ps_restore(sc);
1311         }
1312 }
1313
1314 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1315 {
1316         struct ath9k_vif_iter_data *iter_data = data;
1317         int i;
1318
1319         if (iter_data->hw_macaddr)
1320                 for (i = 0; i < ETH_ALEN; i++)
1321                         iter_data->mask[i] &=
1322                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1323
1324         switch (vif->type) {
1325         case NL80211_IFTYPE_AP:
1326                 iter_data->naps++;
1327                 break;
1328         case NL80211_IFTYPE_STATION:
1329                 iter_data->nstations++;
1330                 break;
1331         case NL80211_IFTYPE_ADHOC:
1332                 iter_data->nadhocs++;
1333                 break;
1334         case NL80211_IFTYPE_MESH_POINT:
1335                 iter_data->nmeshes++;
1336                 break;
1337         case NL80211_IFTYPE_WDS:
1338                 iter_data->nwds++;
1339                 break;
1340         default:
1341                 iter_data->nothers++;
1342                 break;
1343         }
1344 }
1345
1346 /* Called with sc->mutex held. */
1347 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1348                                struct ieee80211_vif *vif,
1349                                struct ath9k_vif_iter_data *iter_data)
1350 {
1351         struct ath_softc *sc = hw->priv;
1352         struct ath_hw *ah = sc->sc_ah;
1353         struct ath_common *common = ath9k_hw_common(ah);
1354
1355         /*
1356          * Use the hardware MAC address as reference, the hardware uses it
1357          * together with the BSSID mask when matching addresses.
1358          */
1359         memset(iter_data, 0, sizeof(*iter_data));
1360         iter_data->hw_macaddr = common->macaddr;
1361         memset(&iter_data->mask, 0xff, ETH_ALEN);
1362
1363         if (vif)
1364                 ath9k_vif_iter(iter_data, vif->addr, vif);
1365
1366         /* Get list of all active MAC addresses */
1367         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1368                                                    iter_data);
1369 }
1370
1371 /* Called with sc->mutex held. */
1372 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1373                                           struct ieee80211_vif *vif)
1374 {
1375         struct ath_softc *sc = hw->priv;
1376         struct ath_hw *ah = sc->sc_ah;
1377         struct ath_common *common = ath9k_hw_common(ah);
1378         struct ath9k_vif_iter_data iter_data;
1379
1380         ath9k_calculate_iter_data(hw, vif, &iter_data);
1381
1382         ath9k_ps_wakeup(sc);
1383         /* Set BSSID mask. */
1384         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1385         ath_hw_setbssidmask(common);
1386
1387         /* Set op-mode & TSF */
1388         if (iter_data.naps > 0) {
1389                 ath9k_hw_set_tsfadjust(ah, 1);
1390                 sc->sc_flags |= SC_OP_TSF_RESET;
1391                 ah->opmode = NL80211_IFTYPE_AP;
1392         } else {
1393                 ath9k_hw_set_tsfadjust(ah, 0);
1394                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1395
1396                 if (iter_data.nwds + iter_data.nmeshes)
1397                         ah->opmode = NL80211_IFTYPE_AP;
1398                 else if (iter_data.nadhocs)
1399                         ah->opmode = NL80211_IFTYPE_ADHOC;
1400                 else
1401                         ah->opmode = NL80211_IFTYPE_STATION;
1402         }
1403
1404         /*
1405          * Enable MIB interrupts when there are hardware phy counters.
1406          */
1407         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1408                 if (ah->config.enable_ani)
1409                         ah->imask |= ATH9K_INT_MIB;
1410                 ah->imask |= ATH9K_INT_TSFOOR;
1411         } else {
1412                 ah->imask &= ~ATH9K_INT_MIB;
1413                 ah->imask &= ~ATH9K_INT_TSFOOR;
1414         }
1415
1416         ath9k_hw_set_interrupts(ah, ah->imask);
1417         ath9k_ps_restore(sc);
1418
1419         /* Set up ANI */
1420         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1421                 sc->sc_flags |= SC_OP_ANI_RUN;
1422                 ath_start_ani(common);
1423         } else {
1424                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1425                 del_timer_sync(&common->ani.timer);
1426         }
1427 }
1428
1429 /* Called with sc->mutex held, vif counts set up properly. */
1430 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1431                                    struct ieee80211_vif *vif)
1432 {
1433         struct ath_softc *sc = hw->priv;
1434
1435         ath9k_calculate_summary_state(hw, vif);
1436
1437         if (ath9k_uses_beacons(vif->type)) {
1438                 int error;
1439                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1440                 /* This may fail because upper levels do not have beacons
1441                  * properly configured yet.  That's OK, we assume it
1442                  * will be properly configured and then we will be notified
1443                  * in the info_changed method and set up beacons properly
1444                  * there.
1445                  */
1446                 error = ath_beacon_alloc(sc, vif);
1447                 if (!error)
1448                         ath_beacon_config(sc, vif);
1449         }
1450 }
1451
1452
1453 static int ath9k_add_interface(struct ieee80211_hw *hw,
1454                                struct ieee80211_vif *vif)
1455 {
1456         struct ath_softc *sc = hw->priv;
1457         struct ath_hw *ah = sc->sc_ah;
1458         struct ath_common *common = ath9k_hw_common(ah);
1459         struct ath_vif *avp = (void *)vif->drv_priv;
1460         int ret = 0;
1461
1462         mutex_lock(&sc->mutex);
1463
1464         switch (vif->type) {
1465         case NL80211_IFTYPE_STATION:
1466         case NL80211_IFTYPE_WDS:
1467         case NL80211_IFTYPE_ADHOC:
1468         case NL80211_IFTYPE_AP:
1469         case NL80211_IFTYPE_MESH_POINT:
1470                 break;
1471         default:
1472                 ath_err(common, "Interface type %d not yet supported\n",
1473                         vif->type);
1474                 ret = -EOPNOTSUPP;
1475                 goto out;
1476         }
1477
1478         if (ath9k_uses_beacons(vif->type)) {
1479                 if (sc->nbcnvifs >= ATH_BCBUF) {
1480                         ath_err(common, "Not enough beacon buffers when adding"
1481                                 " new interface of type: %i\n",
1482                                 vif->type);
1483                         ret = -ENOBUFS;
1484                         goto out;
1485                 }
1486         }
1487
1488         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1489             sc->nvifs > 0) {
1490                 ath_err(common, "Cannot create ADHOC interface when other"
1491                         " interfaces already exist.\n");
1492                 ret = -EINVAL;
1493                 goto out;
1494         }
1495
1496         ath_dbg(common, ATH_DBG_CONFIG,
1497                 "Attach a VIF of type: %d\n", vif->type);
1498
1499         /* Set the VIF opmode */
1500         avp->av_opmode = vif->type;
1501         avp->av_bslot = -1;
1502
1503         sc->nvifs++;
1504
1505         ath9k_do_vif_add_setup(hw, vif);
1506 out:
1507         mutex_unlock(&sc->mutex);
1508         return ret;
1509 }
1510
1511 static int ath9k_change_interface(struct ieee80211_hw *hw,
1512                                   struct ieee80211_vif *vif,
1513                                   enum nl80211_iftype new_type,
1514                                   bool p2p)
1515 {
1516         struct ath_softc *sc = hw->priv;
1517         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518         int ret = 0;
1519
1520         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1521         mutex_lock(&sc->mutex);
1522
1523         /* See if new interface type is valid. */
1524         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1525             (sc->nvifs > 1)) {
1526                 ath_err(common, "When using ADHOC, it must be the only"
1527                         " interface.\n");
1528                 ret = -EINVAL;
1529                 goto out;
1530         }
1531
1532         if (ath9k_uses_beacons(new_type) &&
1533             !ath9k_uses_beacons(vif->type)) {
1534                 if (sc->nbcnvifs >= ATH_BCBUF) {
1535                         ath_err(common, "No beacon slot available\n");
1536                         ret = -ENOBUFS;
1537                         goto out;
1538                 }
1539         }
1540
1541         /* Clean up old vif stuff */
1542         if (ath9k_uses_beacons(vif->type))
1543                 ath9k_reclaim_beacon(sc, vif);
1544
1545         /* Add new settings */
1546         vif->type = new_type;
1547         vif->p2p = p2p;
1548
1549         ath9k_do_vif_add_setup(hw, vif);
1550 out:
1551         mutex_unlock(&sc->mutex);
1552         return ret;
1553 }
1554
1555 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1556                                    struct ieee80211_vif *vif)
1557 {
1558         struct ath_softc *sc = hw->priv;
1559         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1560
1561         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1562
1563         mutex_lock(&sc->mutex);
1564
1565         sc->nvifs--;
1566
1567         /* Reclaim beacon resources */
1568         if (ath9k_uses_beacons(vif->type))
1569                 ath9k_reclaim_beacon(sc, vif);
1570
1571         ath9k_calculate_summary_state(hw, NULL);
1572
1573         mutex_unlock(&sc->mutex);
1574 }
1575
1576 static void ath9k_enable_ps(struct ath_softc *sc)
1577 {
1578         struct ath_hw *ah = sc->sc_ah;
1579
1580         sc->ps_enabled = true;
1581         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1582                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1583                         ah->imask |= ATH9K_INT_TIM_TIMER;
1584                         ath9k_hw_set_interrupts(ah, ah->imask);
1585                 }
1586                 ath9k_hw_setrxabort(ah, 1);
1587         }
1588 }
1589
1590 static void ath9k_disable_ps(struct ath_softc *sc)
1591 {
1592         struct ath_hw *ah = sc->sc_ah;
1593
1594         sc->ps_enabled = false;
1595         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1596         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1597                 ath9k_hw_setrxabort(ah, 0);
1598                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1599                                   PS_WAIT_FOR_CAB |
1600                                   PS_WAIT_FOR_PSPOLL_DATA |
1601                                   PS_WAIT_FOR_TX_ACK);
1602                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1603                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1604                         ath9k_hw_set_interrupts(ah, ah->imask);
1605                 }
1606         }
1607
1608 }
1609
1610 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1611 {
1612         struct ath_softc *sc = hw->priv;
1613         struct ath_hw *ah = sc->sc_ah;
1614         struct ath_common *common = ath9k_hw_common(ah);
1615         struct ieee80211_conf *conf = &hw->conf;
1616         bool disable_radio = false;
1617
1618         mutex_lock(&sc->mutex);
1619
1620         /*
1621          * Leave this as the first check because we need to turn on the
1622          * radio if it was disabled before prior to processing the rest
1623          * of the changes. Likewise we must only disable the radio towards
1624          * the end.
1625          */
1626         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1627                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1628                 if (!sc->ps_idle) {
1629                         ath_radio_enable(sc, hw);
1630                         ath_dbg(common, ATH_DBG_CONFIG,
1631                                 "not-idle: enabling radio\n");
1632                 } else {
1633                         disable_radio = true;
1634                 }
1635         }
1636
1637         /*
1638          * We just prepare to enable PS. We have to wait until our AP has
1639          * ACK'd our null data frame to disable RX otherwise we'll ignore
1640          * those ACKs and end up retransmitting the same null data frames.
1641          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1642          */
1643         if (changed & IEEE80211_CONF_CHANGE_PS) {
1644                 unsigned long flags;
1645                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1646                 if (conf->flags & IEEE80211_CONF_PS)
1647                         ath9k_enable_ps(sc);
1648                 else
1649                         ath9k_disable_ps(sc);
1650                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1651         }
1652
1653         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1654                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1655                         ath_dbg(common, ATH_DBG_CONFIG,
1656                                 "Monitor mode is enabled\n");
1657                         sc->sc_ah->is_monitoring = true;
1658                 } else {
1659                         ath_dbg(common, ATH_DBG_CONFIG,
1660                                 "Monitor mode is disabled\n");
1661                         sc->sc_ah->is_monitoring = false;
1662                 }
1663         }
1664
1665         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1666                 struct ieee80211_channel *curchan = hw->conf.channel;
1667                 int pos = curchan->hw_value;
1668                 int old_pos = -1;
1669                 unsigned long flags;
1670
1671                 if (ah->curchan)
1672                         old_pos = ah->curchan - &ah->channels[0];
1673
1674                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1675                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1676                 else
1677                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1678
1679                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1680                         curchan->center_freq);
1681
1682                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1683                                           curchan, conf->channel_type);
1684
1685                 /* update survey stats for the old channel before switching */
1686                 spin_lock_irqsave(&common->cc_lock, flags);
1687                 ath_update_survey_stats(sc);
1688                 spin_unlock_irqrestore(&common->cc_lock, flags);
1689
1690                 /*
1691                  * If the operating channel changes, change the survey in-use flags
1692                  * along with it.
1693                  * Reset the survey data for the new channel, unless we're switching
1694                  * back to the operating channel from an off-channel operation.
1695                  */
1696                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1697                     sc->cur_survey != &sc->survey[pos]) {
1698
1699                         if (sc->cur_survey)
1700                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1701
1702                         sc->cur_survey = &sc->survey[pos];
1703
1704                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1705                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1706                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1707                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1708                 }
1709
1710                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1711                         ath_err(common, "Unable to set channel\n");
1712                         mutex_unlock(&sc->mutex);
1713                         return -EINVAL;
1714                 }
1715
1716                 /*
1717                  * The most recent snapshot of channel->noisefloor for the old
1718                  * channel is only available after the hardware reset. Copy it to
1719                  * the survey stats now.
1720                  */
1721                 if (old_pos >= 0)
1722                         ath_update_survey_nf(sc, old_pos);
1723         }
1724
1725         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1726                 sc->config.txpowlimit = 2 * conf->power_level;
1727                 ath9k_ps_wakeup(sc);
1728                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1729                                        sc->config.txpowlimit, &sc->curtxpow);
1730                 ath9k_ps_restore(sc);
1731         }
1732
1733         if (disable_radio) {
1734                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1735                 ath_radio_disable(sc, hw);
1736         }
1737
1738         mutex_unlock(&sc->mutex);
1739
1740         return 0;
1741 }
1742
1743 #define SUPPORTED_FILTERS                       \
1744         (FIF_PROMISC_IN_BSS |                   \
1745         FIF_ALLMULTI |                          \
1746         FIF_CONTROL |                           \
1747         FIF_PSPOLL |                            \
1748         FIF_OTHER_BSS |                         \
1749         FIF_BCN_PRBRESP_PROMISC |               \
1750         FIF_PROBE_REQ |                         \
1751         FIF_FCSFAIL)
1752
1753 /* FIXME: sc->sc_full_reset ? */
1754 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1755                                    unsigned int changed_flags,
1756                                    unsigned int *total_flags,
1757                                    u64 multicast)
1758 {
1759         struct ath_softc *sc = hw->priv;
1760         u32 rfilt;
1761
1762         changed_flags &= SUPPORTED_FILTERS;
1763         *total_flags &= SUPPORTED_FILTERS;
1764
1765         sc->rx.rxfilter = *total_flags;
1766         ath9k_ps_wakeup(sc);
1767         rfilt = ath_calcrxfilter(sc);
1768         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1769         ath9k_ps_restore(sc);
1770
1771         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1772                 "Set HW RX filter: 0x%x\n", rfilt);
1773 }
1774
1775 static int ath9k_sta_add(struct ieee80211_hw *hw,
1776                          struct ieee80211_vif *vif,
1777                          struct ieee80211_sta *sta)
1778 {
1779         struct ath_softc *sc = hw->priv;
1780
1781         ath_node_attach(sc, sta);
1782
1783         return 0;
1784 }
1785
1786 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1787                             struct ieee80211_vif *vif,
1788                             struct ieee80211_sta *sta)
1789 {
1790         struct ath_softc *sc = hw->priv;
1791
1792         ath_node_detach(sc, sta);
1793
1794         return 0;
1795 }
1796
1797 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1798                          const struct ieee80211_tx_queue_params *params)
1799 {
1800         struct ath_softc *sc = hw->priv;
1801         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1802         struct ath_txq *txq;
1803         struct ath9k_tx_queue_info qi;
1804         int ret = 0;
1805
1806         if (queue >= WME_NUM_AC)
1807                 return 0;
1808
1809         txq = sc->tx.txq_map[queue];
1810
1811         mutex_lock(&sc->mutex);
1812
1813         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1814
1815         qi.tqi_aifs = params->aifs;
1816         qi.tqi_cwmin = params->cw_min;
1817         qi.tqi_cwmax = params->cw_max;
1818         qi.tqi_burstTime = params->txop;
1819
1820         ath_dbg(common, ATH_DBG_CONFIG,
1821                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1822                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1823                 params->cw_max, params->txop);
1824
1825         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1826         if (ret)
1827                 ath_err(common, "TXQ Update failed\n");
1828
1829         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1830                 if (queue == WME_AC_BE && !ret)
1831                         ath_beaconq_config(sc);
1832
1833         mutex_unlock(&sc->mutex);
1834
1835         return ret;
1836 }
1837
1838 static int ath9k_set_key(struct ieee80211_hw *hw,
1839                          enum set_key_cmd cmd,
1840                          struct ieee80211_vif *vif,
1841                          struct ieee80211_sta *sta,
1842                          struct ieee80211_key_conf *key)
1843 {
1844         struct ath_softc *sc = hw->priv;
1845         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1846         int ret = 0;
1847
1848         if (ath9k_modparam_nohwcrypt)
1849                 return -ENOSPC;
1850
1851         mutex_lock(&sc->mutex);
1852         ath9k_ps_wakeup(sc);
1853         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1854
1855         switch (cmd) {
1856         case SET_KEY:
1857                 ret = ath_key_config(common, vif, sta, key);
1858                 if (ret >= 0) {
1859                         key->hw_key_idx = ret;
1860                         /* push IV and Michael MIC generation to stack */
1861                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1862                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1863                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1864                         if (sc->sc_ah->sw_mgmt_crypto &&
1865                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1866                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1867                         ret = 0;
1868                 }
1869                 break;
1870         case DISABLE_KEY:
1871                 ath_key_delete(common, key);
1872                 break;
1873         default:
1874                 ret = -EINVAL;
1875         }
1876
1877         ath9k_ps_restore(sc);
1878         mutex_unlock(&sc->mutex);
1879
1880         return ret;
1881 }
1882
1883 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1884                                    struct ieee80211_vif *vif,
1885                                    struct ieee80211_bss_conf *bss_conf,
1886                                    u32 changed)
1887 {
1888         struct ath_softc *sc = hw->priv;
1889         struct ath_hw *ah = sc->sc_ah;
1890         struct ath_common *common = ath9k_hw_common(ah);
1891         struct ath_vif *avp = (void *)vif->drv_priv;
1892         int slottime;
1893         int error;
1894
1895         mutex_lock(&sc->mutex);
1896
1897         if (changed & BSS_CHANGED_BSSID) {
1898                 /* Set BSSID */
1899                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1900                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1901                 common->curaid = 0;
1902                 ath9k_hw_write_associd(ah);
1903
1904                 /* Set aggregation protection mode parameters */
1905                 sc->config.ath_aggr_prot = 0;
1906
1907                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1908                         common->curbssid, common->curaid);
1909
1910                 /* need to reconfigure the beacon */
1911                 sc->sc_flags &= ~SC_OP_BEACONS ;
1912         }
1913
1914         /* Enable transmission of beacons (AP, IBSS, MESH) */
1915         if ((changed & BSS_CHANGED_BEACON) ||
1916             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1917                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1918                 error = ath_beacon_alloc(sc, vif);
1919                 if (!error)
1920                         ath_beacon_config(sc, vif);
1921         }
1922
1923         if (changed & BSS_CHANGED_ERP_SLOT) {
1924                 if (bss_conf->use_short_slot)
1925                         slottime = 9;
1926                 else
1927                         slottime = 20;
1928                 if (vif->type == NL80211_IFTYPE_AP) {
1929                         /*
1930                          * Defer update, so that connected stations can adjust
1931                          * their settings at the same time.
1932                          * See beacon.c for more details
1933                          */
1934                         sc->beacon.slottime = slottime;
1935                         sc->beacon.updateslot = UPDATE;
1936                 } else {
1937                         ah->slottime = slottime;
1938                         ath9k_hw_init_global_settings(ah);
1939                 }
1940         }
1941
1942         /* Disable transmission of beacons */
1943         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1944                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1945
1946         if (changed & BSS_CHANGED_BEACON_INT) {
1947                 sc->beacon_interval = bss_conf->beacon_int;
1948                 /*
1949                  * In case of AP mode, the HW TSF has to be reset
1950                  * when the beacon interval changes.
1951                  */
1952                 if (vif->type == NL80211_IFTYPE_AP) {
1953                         sc->sc_flags |= SC_OP_TSF_RESET;
1954                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1955                         error = ath_beacon_alloc(sc, vif);
1956                         if (!error)
1957                                 ath_beacon_config(sc, vif);
1958                 } else {
1959                         ath_beacon_config(sc, vif);
1960                 }
1961         }
1962
1963         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1964                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1965                         bss_conf->use_short_preamble);
1966                 if (bss_conf->use_short_preamble)
1967                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1968                 else
1969                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1970         }
1971
1972         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1973                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1974                         bss_conf->use_cts_prot);
1975                 if (bss_conf->use_cts_prot &&
1976                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1977                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1978                 else
1979                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1980         }
1981
1982         if (changed & BSS_CHANGED_ASSOC) {
1983                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1984                         bss_conf->assoc);
1985                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1986         }
1987
1988         mutex_unlock(&sc->mutex);
1989 }
1990
1991 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1992 {
1993         struct ath_softc *sc = hw->priv;
1994         u64 tsf;
1995
1996         mutex_lock(&sc->mutex);
1997         ath9k_ps_wakeup(sc);
1998         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1999         ath9k_ps_restore(sc);
2000         mutex_unlock(&sc->mutex);
2001
2002         return tsf;
2003 }
2004
2005 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2006 {
2007         struct ath_softc *sc = hw->priv;
2008
2009         mutex_lock(&sc->mutex);
2010         ath9k_ps_wakeup(sc);
2011         ath9k_hw_settsf64(sc->sc_ah, tsf);
2012         ath9k_ps_restore(sc);
2013         mutex_unlock(&sc->mutex);
2014 }
2015
2016 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2017 {
2018         struct ath_softc *sc = hw->priv;
2019
2020         mutex_lock(&sc->mutex);
2021
2022         ath9k_ps_wakeup(sc);
2023         ath9k_hw_reset_tsf(sc->sc_ah);
2024         ath9k_ps_restore(sc);
2025
2026         mutex_unlock(&sc->mutex);
2027 }
2028
2029 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2030                               struct ieee80211_vif *vif,
2031                               enum ieee80211_ampdu_mlme_action action,
2032                               struct ieee80211_sta *sta,
2033                               u16 tid, u16 *ssn, u8 buf_size)
2034 {
2035         struct ath_softc *sc = hw->priv;
2036         int ret = 0;
2037
2038         local_bh_disable();
2039
2040         switch (action) {
2041         case IEEE80211_AMPDU_RX_START:
2042                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2043                         ret = -ENOTSUPP;
2044                 break;
2045         case IEEE80211_AMPDU_RX_STOP:
2046                 break;
2047         case IEEE80211_AMPDU_TX_START:
2048                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2049                         return -EOPNOTSUPP;
2050
2051                 ath9k_ps_wakeup(sc);
2052                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2053                 if (!ret)
2054                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2055                 ath9k_ps_restore(sc);
2056                 break;
2057         case IEEE80211_AMPDU_TX_STOP:
2058                 ath9k_ps_wakeup(sc);
2059                 ath_tx_aggr_stop(sc, sta, tid);
2060                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2061                 ath9k_ps_restore(sc);
2062                 break;
2063         case IEEE80211_AMPDU_TX_OPERATIONAL:
2064                 ath9k_ps_wakeup(sc);
2065                 ath_tx_aggr_resume(sc, sta, tid);
2066                 ath9k_ps_restore(sc);
2067                 break;
2068         default:
2069                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2070         }
2071
2072         local_bh_enable();
2073
2074         return ret;
2075 }
2076
2077 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2078                              struct survey_info *survey)
2079 {
2080         struct ath_softc *sc = hw->priv;
2081         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2082         struct ieee80211_supported_band *sband;
2083         struct ieee80211_channel *chan;
2084         unsigned long flags;
2085         int pos;
2086
2087         spin_lock_irqsave(&common->cc_lock, flags);
2088         if (idx == 0)
2089                 ath_update_survey_stats(sc);
2090
2091         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2092         if (sband && idx >= sband->n_channels) {
2093                 idx -= sband->n_channels;
2094                 sband = NULL;
2095         }
2096
2097         if (!sband)
2098                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2099
2100         if (!sband || idx >= sband->n_channels) {
2101                 spin_unlock_irqrestore(&common->cc_lock, flags);
2102                 return -ENOENT;
2103         }
2104
2105         chan = &sband->channels[idx];
2106         pos = chan->hw_value;
2107         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2108         survey->channel = chan;
2109         spin_unlock_irqrestore(&common->cc_lock, flags);
2110
2111         return 0;
2112 }
2113
2114 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2115 {
2116         struct ath_softc *sc = hw->priv;
2117         struct ath_hw *ah = sc->sc_ah;
2118
2119         mutex_lock(&sc->mutex);
2120         ah->coverage_class = coverage_class;
2121         ath9k_hw_init_global_settings(ah);
2122         mutex_unlock(&sc->mutex);
2123 }
2124
2125 struct ieee80211_ops ath9k_ops = {
2126         .tx                 = ath9k_tx,
2127         .start              = ath9k_start,
2128         .stop               = ath9k_stop,
2129         .add_interface      = ath9k_add_interface,
2130         .change_interface   = ath9k_change_interface,
2131         .remove_interface   = ath9k_remove_interface,
2132         .config             = ath9k_config,
2133         .configure_filter   = ath9k_configure_filter,
2134         .sta_add            = ath9k_sta_add,
2135         .sta_remove         = ath9k_sta_remove,
2136         .conf_tx            = ath9k_conf_tx,
2137         .bss_info_changed   = ath9k_bss_info_changed,
2138         .set_key            = ath9k_set_key,
2139         .get_tsf            = ath9k_get_tsf,
2140         .set_tsf            = ath9k_set_tsf,
2141         .reset_tsf          = ath9k_reset_tsf,
2142         .ampdu_action       = ath9k_ampdu_action,
2143         .get_survey         = ath9k_get_survey,
2144         .rfkill_poll        = ath9k_rfkill_poll_state,
2145         .set_coverage_class = ath9k_set_coverage_class,
2146 };