Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24         /*
25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26          *   0 for no restriction
27          *   1 for 1/4 us
28          *   2 for 1/2 us
29          *   3 for 1 us
30          *   4 for 2 us
31          *   5 for 4 us
32          *   6 for 8 us
33          *   7 for 16 us
34          */
35         switch (mpdudensity) {
36         case 0:
37                 return 0;
38         case 1:
39         case 2:
40         case 3:
41                 /* Our lower layer calculations limit our precision to
42                    1 microsecond */
43                 return 1;
44         case 4:
45                 return 2;
46         case 5:
47                 return 4;
48         case 6:
49                 return 8;
50         case 7:
51                 return 16;
52         default:
53                 return 0;
54         }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59         bool pending = false;
60
61         spin_lock_bh(&txq->axq_lock);
62
63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
64                 pending = true;
65         else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
66                 pending = !list_empty(&txq->txq_fifo_pending);
67
68         spin_unlock_bh(&txq->axq_lock);
69         return pending;
70 }
71
72 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
73 {
74         unsigned long flags;
75         bool ret;
76
77         spin_lock_irqsave(&sc->sc_pm_lock, flags);
78         ret = ath9k_hw_setpower(sc->sc_ah, mode);
79         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
80
81         return ret;
82 }
83
84 void ath9k_ps_wakeup(struct ath_softc *sc)
85 {
86         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
87         unsigned long flags;
88         enum ath9k_power_mode power_mode;
89
90         spin_lock_irqsave(&sc->sc_pm_lock, flags);
91         if (++sc->ps_usecount != 1)
92                 goto unlock;
93
94         power_mode = sc->sc_ah->power_mode;
95         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
96
97         /*
98          * While the hardware is asleep, the cycle counters contain no
99          * useful data. Better clear them now so that they don't mess up
100          * survey data results.
101          */
102         if (power_mode != ATH9K_PM_AWAKE) {
103                 spin_lock(&common->cc_lock);
104                 ath_hw_cycle_counters_update(common);
105                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
106                 spin_unlock(&common->cc_lock);
107         }
108
109  unlock:
110         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
111 }
112
113 void ath9k_ps_restore(struct ath_softc *sc)
114 {
115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116         unsigned long flags;
117
118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
119         if (--sc->ps_usecount != 0)
120                 goto unlock;
121
122         spin_lock(&common->cc_lock);
123         ath_hw_cycle_counters_update(common);
124         spin_unlock(&common->cc_lock);
125
126         if (sc->ps_idle)
127                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
128         else if (sc->ps_enabled &&
129                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
130                               PS_WAIT_FOR_CAB |
131                               PS_WAIT_FOR_PSPOLL_DATA |
132                               PS_WAIT_FOR_TX_ACK)))
133                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
134
135  unlock:
136         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
137 }
138
139 static void ath_start_ani(struct ath_common *common)
140 {
141         struct ath_hw *ah = common->ah;
142         unsigned long timestamp = jiffies_to_msecs(jiffies);
143         struct ath_softc *sc = (struct ath_softc *) common->priv;
144
145         if (!(sc->sc_flags & SC_OP_ANI_RUN))
146                 return;
147
148         if (sc->sc_flags & SC_OP_OFFCHANNEL)
149                 return;
150
151         common->ani.longcal_timer = timestamp;
152         common->ani.shortcal_timer = timestamp;
153         common->ani.checkani_timer = timestamp;
154
155         mod_timer(&common->ani.timer,
156                   jiffies +
157                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
158 }
159
160 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
161 {
162         struct ath_hw *ah = sc->sc_ah;
163         struct ath9k_channel *chan = &ah->channels[channel];
164         struct survey_info *survey = &sc->survey[channel];
165
166         if (chan->noisefloor) {
167                 survey->filled |= SURVEY_INFO_NOISE_DBM;
168                 survey->noise = chan->noisefloor;
169         }
170 }
171
172 /*
173  * Updates the survey statistics and returns the busy time since last
174  * update in %, if the measurement duration was long enough for the
175  * result to be useful, -1 otherwise.
176  */
177 static int ath_update_survey_stats(struct ath_softc *sc)
178 {
179         struct ath_hw *ah = sc->sc_ah;
180         struct ath_common *common = ath9k_hw_common(ah);
181         int pos = ah->curchan - &ah->channels[0];
182         struct survey_info *survey = &sc->survey[pos];
183         struct ath_cycle_counters *cc = &common->cc_survey;
184         unsigned int div = common->clockrate * 1000;
185         int ret = 0;
186
187         if (!ah->curchan)
188                 return -1;
189
190         if (ah->power_mode == ATH9K_PM_AWAKE)
191                 ath_hw_cycle_counters_update(common);
192
193         if (cc->cycles > 0) {
194                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
195                         SURVEY_INFO_CHANNEL_TIME_BUSY |
196                         SURVEY_INFO_CHANNEL_TIME_RX |
197                         SURVEY_INFO_CHANNEL_TIME_TX;
198                 survey->channel_time += cc->cycles / div;
199                 survey->channel_time_busy += cc->rx_busy / div;
200                 survey->channel_time_rx += cc->rx_frame / div;
201                 survey->channel_time_tx += cc->tx_frame / div;
202         }
203
204         if (cc->cycles < div)
205                 return -1;
206
207         if (cc->cycles > 0)
208                 ret = cc->rx_busy * 100 / cc->cycles;
209
210         memset(cc, 0, sizeof(*cc));
211
212         ath_update_survey_nf(sc, pos);
213
214         return ret;
215 }
216
217 /*
218  * Set/change channels.  If the channel is really being changed, it's done
219  * by reseting the chip.  To accomplish this we must first cleanup any pending
220  * DMA, then restart stuff.
221 */
222 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
223                     struct ath9k_channel *hchan)
224 {
225         struct ath_hw *ah = sc->sc_ah;
226         struct ath_common *common = ath9k_hw_common(ah);
227         struct ieee80211_conf *conf = &common->hw->conf;
228         bool fastcc = true, stopped;
229         struct ieee80211_channel *channel = hw->conf.channel;
230         struct ath9k_hw_cal_data *caldata = NULL;
231         int r;
232
233         if (sc->sc_flags & SC_OP_INVALID)
234                 return -EIO;
235
236         sc->hw_busy_count = 0;
237
238         del_timer_sync(&common->ani.timer);
239         cancel_work_sync(&sc->paprd_work);
240         cancel_work_sync(&sc->hw_check_work);
241         cancel_delayed_work_sync(&sc->tx_complete_work);
242         cancel_delayed_work_sync(&sc->hw_pll_work);
243
244         ath9k_ps_wakeup(sc);
245
246         spin_lock_bh(&sc->sc_pcu_lock);
247
248         /*
249          * This is only performed if the channel settings have
250          * actually changed.
251          *
252          * To switch channels clear any pending DMA operations;
253          * wait long enough for the RX fifo to drain, reset the
254          * hardware at the new frequency, and then re-enable
255          * the relevant bits of the h/w.
256          */
257         ath9k_hw_disable_interrupts(ah);
258         stopped = ath_drain_all_txq(sc, false);
259
260         if (!ath_stoprecv(sc))
261                 stopped = false;
262
263         if (!ath9k_hw_check_alive(ah))
264                 stopped = false;
265
266         /* XXX: do not flush receive queue here. We don't want
267          * to flush data frames already in queue because of
268          * changing channel. */
269
270         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
271                 fastcc = false;
272
273         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
274                 caldata = &sc->caldata;
275
276         ath_dbg(common, ATH_DBG_CONFIG,
277                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
278                 sc->sc_ah->curchan->channel,
279                 channel->center_freq, conf_is_ht40(conf),
280                 fastcc);
281
282         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
283         if (r) {
284                 ath_err(common,
285                         "Unable to reset channel (%u MHz), reset status %d\n",
286                         channel->center_freq, r);
287                 goto ps_restore;
288         }
289
290         if (ath_startrecv(sc) != 0) {
291                 ath_err(common, "Unable to restart recv logic\n");
292                 r = -EIO;
293                 goto ps_restore;
294         }
295
296         ath9k_cmn_update_txpow(ah, sc->curtxpow,
297                                sc->config.txpowlimit, &sc->curtxpow);
298         ath9k_hw_set_interrupts(ah, ah->imask);
299
300         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
301                 if (sc->sc_flags & SC_OP_BEACONS)
302                         ath_set_beacon(sc);
303                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
304                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
305                 ath_start_ani(common);
306         }
307
308  ps_restore:
309         ieee80211_wake_queues(hw);
310
311         spin_unlock_bh(&sc->sc_pcu_lock);
312
313         ath9k_ps_restore(sc);
314         return r;
315 }
316
317 static void ath_paprd_activate(struct ath_softc *sc)
318 {
319         struct ath_hw *ah = sc->sc_ah;
320         struct ath9k_hw_cal_data *caldata = ah->caldata;
321         struct ath_common *common = ath9k_hw_common(ah);
322         int chain;
323
324         if (!caldata || !caldata->paprd_done)
325                 return;
326
327         ath9k_ps_wakeup(sc);
328         ar9003_paprd_enable(ah, false);
329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330                 if (!(common->tx_chainmask & BIT(chain)))
331                         continue;
332
333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
334         }
335
336         ar9003_paprd_enable(ah, true);
337         ath9k_ps_restore(sc);
338 }
339
340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
341 {
342         struct ieee80211_hw *hw = sc->hw;
343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
344         struct ath_hw *ah = sc->sc_ah;
345         struct ath_common *common = ath9k_hw_common(ah);
346         struct ath_tx_control txctl;
347         int time_left;
348
349         memset(&txctl, 0, sizeof(txctl));
350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
351
352         memset(tx_info, 0, sizeof(*tx_info));
353         tx_info->band = hw->conf.channel->band;
354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
355         tx_info->control.rates[0].idx = 0;
356         tx_info->control.rates[0].count = 1;
357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
358         tx_info->control.rates[1].idx = -1;
359
360         init_completion(&sc->paprd_complete);
361         txctl.paprd = BIT(chain);
362
363         if (ath_tx_start(hw, skb, &txctl) != 0) {
364                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
365                 dev_kfree_skb_any(skb);
366                 return false;
367         }
368
369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
371
372         if (!time_left)
373                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
374                         "Timeout waiting for paprd training on TX chain %d\n",
375                         chain);
376
377         return !!time_left;
378 }
379
380 void ath_paprd_calibrate(struct work_struct *work)
381 {
382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
383         struct ieee80211_hw *hw = sc->hw;
384         struct ath_hw *ah = sc->sc_ah;
385         struct ieee80211_hdr *hdr;
386         struct sk_buff *skb = NULL;
387         struct ath9k_hw_cal_data *caldata = ah->caldata;
388         struct ath_common *common = ath9k_hw_common(ah);
389         int ftype;
390         int chain_ok = 0;
391         int chain;
392         int len = 1800;
393
394         if (!caldata)
395                 return;
396
397         if (ar9003_paprd_init_table(ah) < 0)
398                 return;
399
400         skb = alloc_skb(len, GFP_KERNEL);
401         if (!skb)
402                 return;
403
404         skb_put(skb, len);
405         memset(skb->data, 0, len);
406         hdr = (struct ieee80211_hdr *)skb->data;
407         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
408         hdr->frame_control = cpu_to_le16(ftype);
409         hdr->duration_id = cpu_to_le16(10);
410         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
411         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
412         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
413
414         ath9k_ps_wakeup(sc);
415         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
416                 if (!(common->tx_chainmask & BIT(chain)))
417                         continue;
418
419                 chain_ok = 0;
420
421                 ath_dbg(common, ATH_DBG_CALIBRATE,
422                         "Sending PAPRD frame for thermal measurement "
423                         "on chain %d\n", chain);
424                 if (!ath_paprd_send_frame(sc, skb, chain))
425                         goto fail_paprd;
426
427                 ar9003_paprd_setup_gain_table(ah, chain);
428
429                 ath_dbg(common, ATH_DBG_CALIBRATE,
430                         "Sending PAPRD training frame on chain %d\n", chain);
431                 if (!ath_paprd_send_frame(sc, skb, chain))
432                         goto fail_paprd;
433
434                 if (!ar9003_paprd_is_done(ah))
435                         break;
436
437                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
438                         break;
439
440                 chain_ok = 1;
441         }
442         kfree_skb(skb);
443
444         if (chain_ok) {
445                 caldata->paprd_done = true;
446                 ath_paprd_activate(sc);
447         }
448
449 fail_paprd:
450         ath9k_ps_restore(sc);
451 }
452
453 /*
454  *  This routine performs the periodic noise floor calibration function
455  *  that is used to adjust and optimize the chip performance.  This
456  *  takes environmental changes (location, temperature) into account.
457  *  When the task is complete, it reschedules itself depending on the
458  *  appropriate interval that was calculated.
459  */
460 void ath_ani_calibrate(unsigned long data)
461 {
462         struct ath_softc *sc = (struct ath_softc *)data;
463         struct ath_hw *ah = sc->sc_ah;
464         struct ath_common *common = ath9k_hw_common(ah);
465         bool longcal = false;
466         bool shortcal = false;
467         bool aniflag = false;
468         unsigned int timestamp = jiffies_to_msecs(jiffies);
469         u32 cal_interval, short_cal_interval, long_cal_interval;
470         unsigned long flags;
471
472         if (ah->caldata && ah->caldata->nfcal_interference)
473                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
474         else
475                 long_cal_interval = ATH_LONG_CALINTERVAL;
476
477         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
478                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
479
480         /* Only calibrate if awake */
481         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
482                 goto set_timer;
483
484         ath9k_ps_wakeup(sc);
485
486         /* Long calibration runs independently of short calibration. */
487         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
488                 longcal = true;
489                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
490                 common->ani.longcal_timer = timestamp;
491         }
492
493         /* Short calibration applies only while caldone is false */
494         if (!common->ani.caldone) {
495                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
496                         shortcal = true;
497                         ath_dbg(common, ATH_DBG_ANI,
498                                 "shortcal @%lu\n", jiffies);
499                         common->ani.shortcal_timer = timestamp;
500                         common->ani.resetcal_timer = timestamp;
501                 }
502         } else {
503                 if ((timestamp - common->ani.resetcal_timer) >=
504                     ATH_RESTART_CALINTERVAL) {
505                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
506                         if (common->ani.caldone)
507                                 common->ani.resetcal_timer = timestamp;
508                 }
509         }
510
511         /* Verify whether we must check ANI */
512         if ((timestamp - common->ani.checkani_timer) >=
513              ah->config.ani_poll_interval) {
514                 aniflag = true;
515                 common->ani.checkani_timer = timestamp;
516         }
517
518         /* Skip all processing if there's nothing to do. */
519         if (longcal || shortcal || aniflag) {
520                 /* Call ANI routine if necessary */
521                 if (aniflag) {
522                         spin_lock_irqsave(&common->cc_lock, flags);
523                         ath9k_hw_ani_monitor(ah, ah->curchan);
524                         ath_update_survey_stats(sc);
525                         spin_unlock_irqrestore(&common->cc_lock, flags);
526                 }
527
528                 /* Perform calibration if necessary */
529                 if (longcal || shortcal) {
530                         common->ani.caldone =
531                                 ath9k_hw_calibrate(ah,
532                                                    ah->curchan,
533                                                    common->rx_chainmask,
534                                                    longcal);
535                 }
536         }
537
538         ath9k_ps_restore(sc);
539
540 set_timer:
541         /*
542         * Set timer interval based on previous results.
543         * The interval must be the shortest necessary to satisfy ANI,
544         * short calibration and long calibration.
545         */
546         cal_interval = ATH_LONG_CALINTERVAL;
547         if (sc->sc_ah->config.enable_ani)
548                 cal_interval = min(cal_interval,
549                                    (u32)ah->config.ani_poll_interval);
550         if (!common->ani.caldone)
551                 cal_interval = min(cal_interval, (u32)short_cal_interval);
552
553         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
554         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
555                 if (!ah->caldata->paprd_done)
556                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
557                 else if (!ah->paprd_table_write_done)
558                         ath_paprd_activate(sc);
559         }
560 }
561
562 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
563 {
564         struct ath_node *an;
565         struct ath_hw *ah = sc->sc_ah;
566         an = (struct ath_node *)sta->drv_priv;
567
568 #ifdef CONFIG_ATH9K_DEBUGFS
569         spin_lock(&sc->nodes_lock);
570         list_add(&an->list, &sc->nodes);
571         spin_unlock(&sc->nodes_lock);
572         an->sta = sta;
573 #endif
574         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
575                 sc->sc_flags |= SC_OP_ENABLE_APM;
576
577         if (sc->sc_flags & SC_OP_TXAGGR) {
578                 ath_tx_node_init(sc, an);
579                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
580                                      sta->ht_cap.ampdu_factor);
581                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
582         }
583 }
584
585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
586 {
587         struct ath_node *an = (struct ath_node *)sta->drv_priv;
588
589 #ifdef CONFIG_ATH9K_DEBUGFS
590         spin_lock(&sc->nodes_lock);
591         list_del(&an->list);
592         spin_unlock(&sc->nodes_lock);
593         an->sta = NULL;
594 #endif
595
596         if (sc->sc_flags & SC_OP_TXAGGR)
597                 ath_tx_node_cleanup(sc, an);
598 }
599
600 void ath_hw_check(struct work_struct *work)
601 {
602         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
604         unsigned long flags;
605         int busy;
606
607         ath9k_ps_wakeup(sc);
608         if (ath9k_hw_check_alive(sc->sc_ah))
609                 goto out;
610
611         spin_lock_irqsave(&common->cc_lock, flags);
612         busy = ath_update_survey_stats(sc);
613         spin_unlock_irqrestore(&common->cc_lock, flags);
614
615         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
616                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
617         if (busy >= 99) {
618                 if (++sc->hw_busy_count >= 3)
619                         ath_reset(sc, true);
620         } else if (busy >= 0)
621                 sc->hw_busy_count = 0;
622
623 out:
624         ath9k_ps_restore(sc);
625 }
626
627 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
628 {
629         static int count;
630         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
631
632         if (pll_sqsum >= 0x40000) {
633                 count++;
634                 if (count == 3) {
635                         /* Rx is hung for more than 500ms. Reset it */
636                         ath_dbg(common, ATH_DBG_RESET,
637                                 "Possible RX hang, resetting");
638                         ath_reset(sc, true);
639                         count = 0;
640                 }
641         } else
642                 count = 0;
643 }
644
645 void ath_hw_pll_work(struct work_struct *work)
646 {
647         struct ath_softc *sc = container_of(work, struct ath_softc,
648                                             hw_pll_work.work);
649         u32 pll_sqsum;
650
651         if (AR_SREV_9485(sc->sc_ah)) {
652
653                 ath9k_ps_wakeup(sc);
654                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
655                 ath9k_ps_restore(sc);
656
657                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
658
659                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
660         }
661 }
662
663
664 void ath9k_tasklet(unsigned long data)
665 {
666         struct ath_softc *sc = (struct ath_softc *)data;
667         struct ath_hw *ah = sc->sc_ah;
668         struct ath_common *common = ath9k_hw_common(ah);
669
670         u32 status = sc->intrstatus;
671         u32 rxmask;
672
673         if ((status & ATH9K_INT_FATAL) ||
674             (status & ATH9K_INT_BB_WATCHDOG)) {
675                 ath_reset(sc, true);
676                 return;
677         }
678
679         ath9k_ps_wakeup(sc);
680         spin_lock(&sc->sc_pcu_lock);
681
682         /*
683          * Only run the baseband hang check if beacons stop working in AP or
684          * IBSS mode, because it has a high false positive rate. For station
685          * mode it should not be necessary, since the upper layers will detect
686          * this through a beacon miss automatically and the following channel
687          * change will trigger a hardware reset anyway
688          */
689         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
690             !ath9k_hw_check_alive(ah))
691                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
692
693         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
694                 /*
695                  * TSF sync does not look correct; remain awake to sync with
696                  * the next Beacon.
697                  */
698                 ath_dbg(common, ATH_DBG_PS,
699                         "TSFOOR - Sync with next Beacon\n");
700                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
701                                 PS_TSFOOR_SYNC;
702         }
703
704         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
705                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
706                           ATH9K_INT_RXORN);
707         else
708                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
709
710         if (status & rxmask) {
711                 /* Check for high priority Rx first */
712                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
713                     (status & ATH9K_INT_RXHP))
714                         ath_rx_tasklet(sc, 0, true);
715
716                 ath_rx_tasklet(sc, 0, false);
717         }
718
719         if (status & ATH9K_INT_TX) {
720                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
721                         ath_tx_edma_tasklet(sc);
722                 else
723                         ath_tx_tasklet(sc);
724         }
725
726         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
727                 if (status & ATH9K_INT_GENTIMER)
728                         ath_gen_timer_isr(sc->sc_ah);
729
730         /* re-enable hardware interrupt */
731         ath9k_hw_enable_interrupts(ah);
732
733         spin_unlock(&sc->sc_pcu_lock);
734         ath9k_ps_restore(sc);
735 }
736
737 irqreturn_t ath_isr(int irq, void *dev)
738 {
739 #define SCHED_INTR (                            \
740                 ATH9K_INT_FATAL |               \
741                 ATH9K_INT_BB_WATCHDOG |         \
742                 ATH9K_INT_RXORN |               \
743                 ATH9K_INT_RXEOL |               \
744                 ATH9K_INT_RX |                  \
745                 ATH9K_INT_RXLP |                \
746                 ATH9K_INT_RXHP |                \
747                 ATH9K_INT_TX |                  \
748                 ATH9K_INT_BMISS |               \
749                 ATH9K_INT_CST |                 \
750                 ATH9K_INT_TSFOOR |              \
751                 ATH9K_INT_GENTIMER)
752
753         struct ath_softc *sc = dev;
754         struct ath_hw *ah = sc->sc_ah;
755         struct ath_common *common = ath9k_hw_common(ah);
756         enum ath9k_int status;
757         bool sched = false;
758
759         /*
760          * The hardware is not ready/present, don't
761          * touch anything. Note this can happen early
762          * on if the IRQ is shared.
763          */
764         if (sc->sc_flags & SC_OP_INVALID)
765                 return IRQ_NONE;
766
767
768         /* shared irq, not for us */
769
770         if (!ath9k_hw_intrpend(ah))
771                 return IRQ_NONE;
772
773         /*
774          * Figure out the reason(s) for the interrupt.  Note
775          * that the hal returns a pseudo-ISR that may include
776          * bits we haven't explicitly enabled so we mask the
777          * value to insure we only process bits we requested.
778          */
779         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
780         status &= ah->imask;    /* discard unasked-for bits */
781
782         /*
783          * If there are no status bits set, then this interrupt was not
784          * for me (should have been caught above).
785          */
786         if (!status)
787                 return IRQ_NONE;
788
789         /* Cache the status */
790         sc->intrstatus = status;
791
792         if (status & SCHED_INTR)
793                 sched = true;
794
795         /*
796          * If a FATAL or RXORN interrupt is received, we have to reset the
797          * chip immediately.
798          */
799         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
800             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
801                 goto chip_reset;
802
803         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
804             (status & ATH9K_INT_BB_WATCHDOG)) {
805
806                 spin_lock(&common->cc_lock);
807                 ath_hw_cycle_counters_update(common);
808                 ar9003_hw_bb_watchdog_dbg_info(ah);
809                 spin_unlock(&common->cc_lock);
810
811                 goto chip_reset;
812         }
813
814         if (status & ATH9K_INT_SWBA)
815                 tasklet_schedule(&sc->bcon_tasklet);
816
817         if (status & ATH9K_INT_TXURN)
818                 ath9k_hw_updatetxtriglevel(ah, true);
819
820         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
821                 if (status & ATH9K_INT_RXEOL) {
822                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
823                         ath9k_hw_set_interrupts(ah, ah->imask);
824                 }
825         }
826
827         if (status & ATH9K_INT_MIB) {
828                 /*
829                  * Disable interrupts until we service the MIB
830                  * interrupt; otherwise it will continue to
831                  * fire.
832                  */
833                 ath9k_hw_disable_interrupts(ah);
834                 /*
835                  * Let the hal handle the event. We assume
836                  * it will clear whatever condition caused
837                  * the interrupt.
838                  */
839                 spin_lock(&common->cc_lock);
840                 ath9k_hw_proc_mib_event(ah);
841                 spin_unlock(&common->cc_lock);
842                 ath9k_hw_enable_interrupts(ah);
843         }
844
845         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
846                 if (status & ATH9K_INT_TIM_TIMER) {
847                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
848                                 goto chip_reset;
849                         /* Clear RxAbort bit so that we can
850                          * receive frames */
851                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
852                         ath9k_hw_setrxabort(sc->sc_ah, 0);
853                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
854                 }
855
856 chip_reset:
857
858         ath_debug_stat_interrupt(sc, status);
859
860         if (sched) {
861                 /* turn off every interrupt */
862                 ath9k_hw_disable_interrupts(ah);
863                 tasklet_schedule(&sc->intr_tq);
864         }
865
866         return IRQ_HANDLED;
867
868 #undef SCHED_INTR
869 }
870
871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
872 {
873         struct ath_hw *ah = sc->sc_ah;
874         struct ath_common *common = ath9k_hw_common(ah);
875         struct ieee80211_channel *channel = hw->conf.channel;
876         int r;
877
878         ath9k_ps_wakeup(sc);
879         spin_lock_bh(&sc->sc_pcu_lock);
880
881         ath9k_hw_configpcipowersave(ah, 0, 0);
882
883         if (!ah->curchan)
884                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
885
886         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
887         if (r) {
888                 ath_err(common,
889                         "Unable to reset channel (%u MHz), reset status %d\n",
890                         channel->center_freq, r);
891         }
892
893         ath9k_cmn_update_txpow(ah, sc->curtxpow,
894                                sc->config.txpowlimit, &sc->curtxpow);
895         if (ath_startrecv(sc) != 0) {
896                 ath_err(common, "Unable to restart recv logic\n");
897                 goto out;
898         }
899         if (sc->sc_flags & SC_OP_BEACONS)
900                 ath_set_beacon(sc);     /* restart beacons */
901
902         /* Re-Enable  interrupts */
903         ath9k_hw_set_interrupts(ah, ah->imask);
904
905         /* Enable LED */
906         ath9k_hw_cfg_output(ah, ah->led_pin,
907                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
908         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
909
910         ieee80211_wake_queues(hw);
911         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
912
913 out:
914         spin_unlock_bh(&sc->sc_pcu_lock);
915
916         ath9k_ps_restore(sc);
917 }
918
919 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
920 {
921         struct ath_hw *ah = sc->sc_ah;
922         struct ieee80211_channel *channel = hw->conf.channel;
923         int r;
924
925         ath9k_ps_wakeup(sc);
926         cancel_delayed_work_sync(&sc->hw_pll_work);
927
928         spin_lock_bh(&sc->sc_pcu_lock);
929
930         ieee80211_stop_queues(hw);
931
932         /*
933          * Keep the LED on when the radio is disabled
934          * during idle unassociated state.
935          */
936         if (!sc->ps_idle) {
937                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
938                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
939         }
940
941         /* Disable interrupts */
942         ath9k_hw_disable_interrupts(ah);
943
944         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
945
946         ath_stoprecv(sc);               /* turn off frame recv */
947         ath_flushrecv(sc);              /* flush recv queue */
948
949         if (!ah->curchan)
950                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
951
952         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
953         if (r) {
954                 ath_err(ath9k_hw_common(sc->sc_ah),
955                         "Unable to reset channel (%u MHz), reset status %d\n",
956                         channel->center_freq, r);
957         }
958
959         ath9k_hw_phy_disable(ah);
960
961         ath9k_hw_configpcipowersave(ah, 1, 1);
962
963         spin_unlock_bh(&sc->sc_pcu_lock);
964         ath9k_ps_restore(sc);
965 }
966
967 int ath_reset(struct ath_softc *sc, bool retry_tx)
968 {
969         struct ath_hw *ah = sc->sc_ah;
970         struct ath_common *common = ath9k_hw_common(ah);
971         struct ieee80211_hw *hw = sc->hw;
972         int r;
973
974         sc->hw_busy_count = 0;
975
976         /* Stop ANI */
977         del_timer_sync(&common->ani.timer);
978
979         ath9k_ps_wakeup(sc);
980         spin_lock_bh(&sc->sc_pcu_lock);
981
982         ieee80211_stop_queues(hw);
983
984         ath9k_hw_disable_interrupts(ah);
985         ath_drain_all_txq(sc, retry_tx);
986
987         ath_stoprecv(sc);
988         ath_flushrecv(sc);
989
990         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
991         if (r)
992                 ath_err(common,
993                         "Unable to reset hardware; reset status %d\n", r);
994
995         if (ath_startrecv(sc) != 0)
996                 ath_err(common, "Unable to start recv logic\n");
997
998         /*
999          * We may be doing a reset in response to a request
1000          * that changes the channel so update any state that
1001          * might change as a result.
1002          */
1003         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1004                                sc->config.txpowlimit, &sc->curtxpow);
1005
1006         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1007                 ath_set_beacon(sc);     /* restart beacons */
1008
1009         ath9k_hw_set_interrupts(ah, ah->imask);
1010
1011         if (retry_tx) {
1012                 int i;
1013                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1014                         if (ATH_TXQ_SETUP(sc, i)) {
1015                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1016                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1017                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1018                         }
1019                 }
1020         }
1021
1022         ieee80211_wake_queues(hw);
1023         spin_unlock_bh(&sc->sc_pcu_lock);
1024
1025         /* Start ANI */
1026         ath_start_ani(common);
1027         ath9k_ps_restore(sc);
1028
1029         return r;
1030 }
1031
1032 /**********************/
1033 /* mac80211 callbacks */
1034 /**********************/
1035
1036 static int ath9k_start(struct ieee80211_hw *hw)
1037 {
1038         struct ath_softc *sc = hw->priv;
1039         struct ath_hw *ah = sc->sc_ah;
1040         struct ath_common *common = ath9k_hw_common(ah);
1041         struct ieee80211_channel *curchan = hw->conf.channel;
1042         struct ath9k_channel *init_channel;
1043         int r;
1044
1045         ath_dbg(common, ATH_DBG_CONFIG,
1046                 "Starting driver with initial channel: %d MHz\n",
1047                 curchan->center_freq);
1048
1049         ath9k_ps_wakeup(sc);
1050
1051         mutex_lock(&sc->mutex);
1052
1053         /* setup initial channel */
1054         sc->chan_idx = curchan->hw_value;
1055
1056         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1057
1058         /* Reset SERDES registers */
1059         ath9k_hw_configpcipowersave(ah, 0, 0);
1060
1061         /*
1062          * The basic interface to setting the hardware in a good
1063          * state is ``reset''.  On return the hardware is known to
1064          * be powered up and with interrupts disabled.  This must
1065          * be followed by initialization of the appropriate bits
1066          * and then setup of the interrupt mask.
1067          */
1068         spin_lock_bh(&sc->sc_pcu_lock);
1069         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1070         if (r) {
1071                 ath_err(common,
1072                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1073                         r, curchan->center_freq);
1074                 spin_unlock_bh(&sc->sc_pcu_lock);
1075                 goto mutex_unlock;
1076         }
1077
1078         /*
1079          * This is needed only to setup initial state
1080          * but it's best done after a reset.
1081          */
1082         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1083                         sc->config.txpowlimit, &sc->curtxpow);
1084
1085         /*
1086          * Setup the hardware after reset:
1087          * The receive engine is set going.
1088          * Frame transmit is handled entirely
1089          * in the frame output path; there's nothing to do
1090          * here except setup the interrupt mask.
1091          */
1092         if (ath_startrecv(sc) != 0) {
1093                 ath_err(common, "Unable to start recv logic\n");
1094                 r = -EIO;
1095                 spin_unlock_bh(&sc->sc_pcu_lock);
1096                 goto mutex_unlock;
1097         }
1098         spin_unlock_bh(&sc->sc_pcu_lock);
1099
1100         /* Setup our intr mask. */
1101         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1102                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1103                     ATH9K_INT_GLOBAL;
1104
1105         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1106                 ah->imask |= ATH9K_INT_RXHP |
1107                              ATH9K_INT_RXLP |
1108                              ATH9K_INT_BB_WATCHDOG;
1109         else
1110                 ah->imask |= ATH9K_INT_RX;
1111
1112         ah->imask |= ATH9K_INT_GTT;
1113
1114         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1115                 ah->imask |= ATH9K_INT_CST;
1116
1117         sc->sc_flags &= ~SC_OP_INVALID;
1118         sc->sc_ah->is_monitoring = false;
1119
1120         /* Disable BMISS interrupt when we're not associated */
1121         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1122         ath9k_hw_set_interrupts(ah, ah->imask);
1123
1124         ieee80211_wake_queues(hw);
1125
1126         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1127
1128         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1129             !ah->btcoex_hw.enabled) {
1130                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1131                                            AR_STOMP_LOW_WLAN_WGHT);
1132                 ath9k_hw_btcoex_enable(ah);
1133
1134                 if (common->bus_ops->bt_coex_prep)
1135                         common->bus_ops->bt_coex_prep(common);
1136                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1137                         ath9k_btcoex_timer_resume(sc);
1138         }
1139
1140         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1141                 common->bus_ops->extn_synch_en(common);
1142
1143 mutex_unlock:
1144         mutex_unlock(&sc->mutex);
1145
1146         ath9k_ps_restore(sc);
1147
1148         return r;
1149 }
1150
1151 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1152 {
1153         struct ath_softc *sc = hw->priv;
1154         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1155         struct ath_tx_control txctl;
1156         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1157
1158         if (sc->ps_enabled) {
1159                 /*
1160                  * mac80211 does not set PM field for normal data frames, so we
1161                  * need to update that based on the current PS mode.
1162                  */
1163                 if (ieee80211_is_data(hdr->frame_control) &&
1164                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1165                     !ieee80211_has_pm(hdr->frame_control)) {
1166                         ath_dbg(common, ATH_DBG_PS,
1167                                 "Add PM=1 for a TX frame while in PS mode\n");
1168                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1169                 }
1170         }
1171
1172         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1173                 /*
1174                  * We are using PS-Poll and mac80211 can request TX while in
1175                  * power save mode. Need to wake up hardware for the TX to be
1176                  * completed and if needed, also for RX of buffered frames.
1177                  */
1178                 ath9k_ps_wakeup(sc);
1179                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1180                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1181                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1182                         ath_dbg(common, ATH_DBG_PS,
1183                                 "Sending PS-Poll to pick a buffered frame\n");
1184                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1185                 } else {
1186                         ath_dbg(common, ATH_DBG_PS,
1187                                 "Wake up to complete TX\n");
1188                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1189                 }
1190                 /*
1191                  * The actual restore operation will happen only after
1192                  * the sc_flags bit is cleared. We are just dropping
1193                  * the ps_usecount here.
1194                  */
1195                 ath9k_ps_restore(sc);
1196         }
1197
1198         memset(&txctl, 0, sizeof(struct ath_tx_control));
1199         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1200
1201         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1202
1203         if (ath_tx_start(hw, skb, &txctl) != 0) {
1204                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1205                 goto exit;
1206         }
1207
1208         return;
1209 exit:
1210         dev_kfree_skb_any(skb);
1211 }
1212
1213 static void ath9k_stop(struct ieee80211_hw *hw)
1214 {
1215         struct ath_softc *sc = hw->priv;
1216         struct ath_hw *ah = sc->sc_ah;
1217         struct ath_common *common = ath9k_hw_common(ah);
1218
1219         mutex_lock(&sc->mutex);
1220
1221         cancel_delayed_work_sync(&sc->tx_complete_work);
1222         cancel_delayed_work_sync(&sc->hw_pll_work);
1223         cancel_work_sync(&sc->paprd_work);
1224         cancel_work_sync(&sc->hw_check_work);
1225
1226         if (sc->sc_flags & SC_OP_INVALID) {
1227                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1228                 mutex_unlock(&sc->mutex);
1229                 return;
1230         }
1231
1232         /* Ensure HW is awake when we try to shut it down. */
1233         ath9k_ps_wakeup(sc);
1234
1235         if (ah->btcoex_hw.enabled) {
1236                 ath9k_hw_btcoex_disable(ah);
1237                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1238                         ath9k_btcoex_timer_pause(sc);
1239         }
1240
1241         spin_lock_bh(&sc->sc_pcu_lock);
1242
1243         /* prevent tasklets to enable interrupts once we disable them */
1244         ah->imask &= ~ATH9K_INT_GLOBAL;
1245
1246         /* make sure h/w will not generate any interrupt
1247          * before setting the invalid flag. */
1248         ath9k_hw_disable_interrupts(ah);
1249
1250         if (!(sc->sc_flags & SC_OP_INVALID)) {
1251                 ath_drain_all_txq(sc, false);
1252                 ath_stoprecv(sc);
1253                 ath9k_hw_phy_disable(ah);
1254         } else
1255                 sc->rx.rxlink = NULL;
1256
1257         if (sc->rx.frag) {
1258                 dev_kfree_skb_any(sc->rx.frag);
1259                 sc->rx.frag = NULL;
1260         }
1261
1262         /* disable HAL and put h/w to sleep */
1263         ath9k_hw_disable(ah);
1264         ath9k_hw_configpcipowersave(ah, 1, 1);
1265
1266         spin_unlock_bh(&sc->sc_pcu_lock);
1267
1268         /* we can now sync irq and kill any running tasklets, since we already
1269          * disabled interrupts and not holding a spin lock */
1270         synchronize_irq(sc->irq);
1271         tasklet_kill(&sc->intr_tq);
1272         tasklet_kill(&sc->bcon_tasklet);
1273
1274         ath9k_ps_restore(sc);
1275
1276         sc->ps_idle = true;
1277         ath_radio_disable(sc, hw);
1278
1279         sc->sc_flags |= SC_OP_INVALID;
1280
1281         mutex_unlock(&sc->mutex);
1282
1283         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1284 }
1285
1286 bool ath9k_uses_beacons(int type)
1287 {
1288         switch (type) {
1289         case NL80211_IFTYPE_AP:
1290         case NL80211_IFTYPE_ADHOC:
1291         case NL80211_IFTYPE_MESH_POINT:
1292                 return true;
1293         default:
1294                 return false;
1295         }
1296 }
1297
1298 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1299                                  struct ieee80211_vif *vif)
1300 {
1301         struct ath_vif *avp = (void *)vif->drv_priv;
1302
1303         ath9k_set_beaconing_status(sc, false);
1304         ath_beacon_return(sc, avp);
1305         ath9k_set_beaconing_status(sc, true);
1306         sc->sc_flags &= ~SC_OP_BEACONS;
1307 }
1308
1309 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1310 {
1311         struct ath9k_vif_iter_data *iter_data = data;
1312         int i;
1313
1314         if (iter_data->hw_macaddr)
1315                 for (i = 0; i < ETH_ALEN; i++)
1316                         iter_data->mask[i] &=
1317                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1318
1319         switch (vif->type) {
1320         case NL80211_IFTYPE_AP:
1321                 iter_data->naps++;
1322                 break;
1323         case NL80211_IFTYPE_STATION:
1324                 iter_data->nstations++;
1325                 break;
1326         case NL80211_IFTYPE_ADHOC:
1327                 iter_data->nadhocs++;
1328                 break;
1329         case NL80211_IFTYPE_MESH_POINT:
1330                 iter_data->nmeshes++;
1331                 break;
1332         case NL80211_IFTYPE_WDS:
1333                 iter_data->nwds++;
1334                 break;
1335         default:
1336                 iter_data->nothers++;
1337                 break;
1338         }
1339 }
1340
1341 /* Called with sc->mutex held. */
1342 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1343                                struct ieee80211_vif *vif,
1344                                struct ath9k_vif_iter_data *iter_data)
1345 {
1346         struct ath_softc *sc = hw->priv;
1347         struct ath_hw *ah = sc->sc_ah;
1348         struct ath_common *common = ath9k_hw_common(ah);
1349
1350         /*
1351          * Use the hardware MAC address as reference, the hardware uses it
1352          * together with the BSSID mask when matching addresses.
1353          */
1354         memset(iter_data, 0, sizeof(*iter_data));
1355         iter_data->hw_macaddr = common->macaddr;
1356         memset(&iter_data->mask, 0xff, ETH_ALEN);
1357
1358         if (vif)
1359                 ath9k_vif_iter(iter_data, vif->addr, vif);
1360
1361         /* Get list of all active MAC addresses */
1362         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1363                                                    iter_data);
1364 }
1365
1366 /* Called with sc->mutex held. */
1367 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1368                                           struct ieee80211_vif *vif)
1369 {
1370         struct ath_softc *sc = hw->priv;
1371         struct ath_hw *ah = sc->sc_ah;
1372         struct ath_common *common = ath9k_hw_common(ah);
1373         struct ath9k_vif_iter_data iter_data;
1374
1375         ath9k_calculate_iter_data(hw, vif, &iter_data);
1376
1377         /* Set BSSID mask. */
1378         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1379         ath_hw_setbssidmask(common);
1380
1381         /* Set op-mode & TSF */
1382         if (iter_data.naps > 0) {
1383                 ath9k_hw_set_tsfadjust(ah, 1);
1384                 sc->sc_flags |= SC_OP_TSF_RESET;
1385                 ah->opmode = NL80211_IFTYPE_AP;
1386         } else {
1387                 ath9k_hw_set_tsfadjust(ah, 0);
1388                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1389
1390                 if (iter_data.nmeshes)
1391                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1392                 else if (iter_data.nwds)
1393                         ah->opmode = NL80211_IFTYPE_AP;
1394                 else if (iter_data.nadhocs)
1395                         ah->opmode = NL80211_IFTYPE_ADHOC;
1396                 else
1397                         ah->opmode = NL80211_IFTYPE_STATION;
1398         }
1399
1400         /*
1401          * Enable MIB interrupts when there are hardware phy counters.
1402          */
1403         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1404                 if (ah->config.enable_ani)
1405                         ah->imask |= ATH9K_INT_MIB;
1406                 ah->imask |= ATH9K_INT_TSFOOR;
1407         } else {
1408                 ah->imask &= ~ATH9K_INT_MIB;
1409                 ah->imask &= ~ATH9K_INT_TSFOOR;
1410         }
1411
1412         ath9k_hw_set_interrupts(ah, ah->imask);
1413
1414         /* Set up ANI */
1415         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1416                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1417                 sc->sc_flags |= SC_OP_ANI_RUN;
1418                 ath_start_ani(common);
1419         } else {
1420                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1421                 del_timer_sync(&common->ani.timer);
1422         }
1423 }
1424
1425 /* Called with sc->mutex held, vif counts set up properly. */
1426 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1427                                    struct ieee80211_vif *vif)
1428 {
1429         struct ath_softc *sc = hw->priv;
1430
1431         ath9k_calculate_summary_state(hw, vif);
1432
1433         if (ath9k_uses_beacons(vif->type)) {
1434                 int error;
1435                 /* This may fail because upper levels do not have beacons
1436                  * properly configured yet.  That's OK, we assume it
1437                  * will be properly configured and then we will be notified
1438                  * in the info_changed method and set up beacons properly
1439                  * there.
1440                  */
1441                 ath9k_set_beaconing_status(sc, false);
1442                 error = ath_beacon_alloc(sc, vif);
1443                 if (!error)
1444                         ath_beacon_config(sc, vif);
1445                 ath9k_set_beaconing_status(sc, true);
1446         }
1447 }
1448
1449
1450 static int ath9k_add_interface(struct ieee80211_hw *hw,
1451                                struct ieee80211_vif *vif)
1452 {
1453         struct ath_softc *sc = hw->priv;
1454         struct ath_hw *ah = sc->sc_ah;
1455         struct ath_common *common = ath9k_hw_common(ah);
1456         int ret = 0;
1457
1458         ath9k_ps_wakeup(sc);
1459         mutex_lock(&sc->mutex);
1460
1461         switch (vif->type) {
1462         case NL80211_IFTYPE_STATION:
1463         case NL80211_IFTYPE_WDS:
1464         case NL80211_IFTYPE_ADHOC:
1465         case NL80211_IFTYPE_AP:
1466         case NL80211_IFTYPE_MESH_POINT:
1467                 break;
1468         default:
1469                 ath_err(common, "Interface type %d not yet supported\n",
1470                         vif->type);
1471                 ret = -EOPNOTSUPP;
1472                 goto out;
1473         }
1474
1475         if (ath9k_uses_beacons(vif->type)) {
1476                 if (sc->nbcnvifs >= ATH_BCBUF) {
1477                         ath_err(common, "Not enough beacon buffers when adding"
1478                                 " new interface of type: %i\n",
1479                                 vif->type);
1480                         ret = -ENOBUFS;
1481                         goto out;
1482                 }
1483         }
1484
1485         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1486             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1487              sc->nvifs > 0)) {
1488                 ath_err(common, "Cannot create ADHOC interface when other"
1489                         " interfaces already exist.\n");
1490                 ret = -EINVAL;
1491                 goto out;
1492         }
1493
1494         ath_dbg(common, ATH_DBG_CONFIG,
1495                 "Attach a VIF of type: %d\n", vif->type);
1496
1497         sc->nvifs++;
1498
1499         ath9k_do_vif_add_setup(hw, vif);
1500 out:
1501         mutex_unlock(&sc->mutex);
1502         ath9k_ps_restore(sc);
1503         return ret;
1504 }
1505
1506 static int ath9k_change_interface(struct ieee80211_hw *hw,
1507                                   struct ieee80211_vif *vif,
1508                                   enum nl80211_iftype new_type,
1509                                   bool p2p)
1510 {
1511         struct ath_softc *sc = hw->priv;
1512         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513         int ret = 0;
1514
1515         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1516         mutex_lock(&sc->mutex);
1517         ath9k_ps_wakeup(sc);
1518
1519         /* See if new interface type is valid. */
1520         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1521             (sc->nvifs > 1)) {
1522                 ath_err(common, "When using ADHOC, it must be the only"
1523                         " interface.\n");
1524                 ret = -EINVAL;
1525                 goto out;
1526         }
1527
1528         if (ath9k_uses_beacons(new_type) &&
1529             !ath9k_uses_beacons(vif->type)) {
1530                 if (sc->nbcnvifs >= ATH_BCBUF) {
1531                         ath_err(common, "No beacon slot available\n");
1532                         ret = -ENOBUFS;
1533                         goto out;
1534                 }
1535         }
1536
1537         /* Clean up old vif stuff */
1538         if (ath9k_uses_beacons(vif->type))
1539                 ath9k_reclaim_beacon(sc, vif);
1540
1541         /* Add new settings */
1542         vif->type = new_type;
1543         vif->p2p = p2p;
1544
1545         ath9k_do_vif_add_setup(hw, vif);
1546 out:
1547         ath9k_ps_restore(sc);
1548         mutex_unlock(&sc->mutex);
1549         return ret;
1550 }
1551
1552 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1553                                    struct ieee80211_vif *vif)
1554 {
1555         struct ath_softc *sc = hw->priv;
1556         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1557
1558         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1559
1560         ath9k_ps_wakeup(sc);
1561         mutex_lock(&sc->mutex);
1562
1563         sc->nvifs--;
1564
1565         /* Reclaim beacon resources */
1566         if (ath9k_uses_beacons(vif->type))
1567                 ath9k_reclaim_beacon(sc, vif);
1568
1569         ath9k_calculate_summary_state(hw, NULL);
1570
1571         mutex_unlock(&sc->mutex);
1572         ath9k_ps_restore(sc);
1573 }
1574
1575 static void ath9k_enable_ps(struct ath_softc *sc)
1576 {
1577         struct ath_hw *ah = sc->sc_ah;
1578
1579         sc->ps_enabled = true;
1580         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1581                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1582                         ah->imask |= ATH9K_INT_TIM_TIMER;
1583                         ath9k_hw_set_interrupts(ah, ah->imask);
1584                 }
1585                 ath9k_hw_setrxabort(ah, 1);
1586         }
1587 }
1588
1589 static void ath9k_disable_ps(struct ath_softc *sc)
1590 {
1591         struct ath_hw *ah = sc->sc_ah;
1592
1593         sc->ps_enabled = false;
1594         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1595         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1596                 ath9k_hw_setrxabort(ah, 0);
1597                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1598                                   PS_WAIT_FOR_CAB |
1599                                   PS_WAIT_FOR_PSPOLL_DATA |
1600                                   PS_WAIT_FOR_TX_ACK);
1601                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1602                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1603                         ath9k_hw_set_interrupts(ah, ah->imask);
1604                 }
1605         }
1606
1607 }
1608
1609 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1610 {
1611         struct ath_softc *sc = hw->priv;
1612         struct ath_hw *ah = sc->sc_ah;
1613         struct ath_common *common = ath9k_hw_common(ah);
1614         struct ieee80211_conf *conf = &hw->conf;
1615         bool disable_radio = false;
1616
1617         mutex_lock(&sc->mutex);
1618
1619         /*
1620          * Leave this as the first check because we need to turn on the
1621          * radio if it was disabled before prior to processing the rest
1622          * of the changes. Likewise we must only disable the radio towards
1623          * the end.
1624          */
1625         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1626                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1627                 if (!sc->ps_idle) {
1628                         ath_radio_enable(sc, hw);
1629                         ath_dbg(common, ATH_DBG_CONFIG,
1630                                 "not-idle: enabling radio\n");
1631                 } else {
1632                         disable_radio = true;
1633                 }
1634         }
1635
1636         /*
1637          * We just prepare to enable PS. We have to wait until our AP has
1638          * ACK'd our null data frame to disable RX otherwise we'll ignore
1639          * those ACKs and end up retransmitting the same null data frames.
1640          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1641          */
1642         if (changed & IEEE80211_CONF_CHANGE_PS) {
1643                 unsigned long flags;
1644                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1645                 if (conf->flags & IEEE80211_CONF_PS)
1646                         ath9k_enable_ps(sc);
1647                 else
1648                         ath9k_disable_ps(sc);
1649                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1650         }
1651
1652         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1653                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1654                         ath_dbg(common, ATH_DBG_CONFIG,
1655                                 "Monitor mode is enabled\n");
1656                         sc->sc_ah->is_monitoring = true;
1657                 } else {
1658                         ath_dbg(common, ATH_DBG_CONFIG,
1659                                 "Monitor mode is disabled\n");
1660                         sc->sc_ah->is_monitoring = false;
1661                 }
1662         }
1663
1664         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1665                 struct ieee80211_channel *curchan = hw->conf.channel;
1666                 int pos = curchan->hw_value;
1667                 int old_pos = -1;
1668                 unsigned long flags;
1669
1670                 if (ah->curchan)
1671                         old_pos = ah->curchan - &ah->channels[0];
1672
1673                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1674                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1675                 else
1676                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1677
1678                 ath_dbg(common, ATH_DBG_CONFIG,
1679                         "Set channel: %d MHz type: %d\n",
1680                         curchan->center_freq, conf->channel_type);
1681
1682                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1683                                           curchan, conf->channel_type);
1684
1685                 /* update survey stats for the old channel before switching */
1686                 spin_lock_irqsave(&common->cc_lock, flags);
1687                 ath_update_survey_stats(sc);
1688                 spin_unlock_irqrestore(&common->cc_lock, flags);
1689
1690                 /*
1691                  * If the operating channel changes, change the survey in-use flags
1692                  * along with it.
1693                  * Reset the survey data for the new channel, unless we're switching
1694                  * back to the operating channel from an off-channel operation.
1695                  */
1696                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1697                     sc->cur_survey != &sc->survey[pos]) {
1698
1699                         if (sc->cur_survey)
1700                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1701
1702                         sc->cur_survey = &sc->survey[pos];
1703
1704                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1705                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1706                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1707                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1708                 }
1709
1710                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1711                         ath_err(common, "Unable to set channel\n");
1712                         mutex_unlock(&sc->mutex);
1713                         return -EINVAL;
1714                 }
1715
1716                 /*
1717                  * The most recent snapshot of channel->noisefloor for the old
1718                  * channel is only available after the hardware reset. Copy it to
1719                  * the survey stats now.
1720                  */
1721                 if (old_pos >= 0)
1722                         ath_update_survey_nf(sc, old_pos);
1723         }
1724
1725         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1726                 ath_dbg(common, ATH_DBG_CONFIG,
1727                         "Set power: %d\n", conf->power_level);
1728                 sc->config.txpowlimit = 2 * conf->power_level;
1729                 ath9k_ps_wakeup(sc);
1730                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1731                                        sc->config.txpowlimit, &sc->curtxpow);
1732                 ath9k_ps_restore(sc);
1733         }
1734
1735         if (disable_radio) {
1736                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1737                 ath_radio_disable(sc, hw);
1738         }
1739
1740         mutex_unlock(&sc->mutex);
1741
1742         return 0;
1743 }
1744
1745 #define SUPPORTED_FILTERS                       \
1746         (FIF_PROMISC_IN_BSS |                   \
1747         FIF_ALLMULTI |                          \
1748         FIF_CONTROL |                           \
1749         FIF_PSPOLL |                            \
1750         FIF_OTHER_BSS |                         \
1751         FIF_BCN_PRBRESP_PROMISC |               \
1752         FIF_PROBE_REQ |                         \
1753         FIF_FCSFAIL)
1754
1755 /* FIXME: sc->sc_full_reset ? */
1756 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1757                                    unsigned int changed_flags,
1758                                    unsigned int *total_flags,
1759                                    u64 multicast)
1760 {
1761         struct ath_softc *sc = hw->priv;
1762         u32 rfilt;
1763
1764         changed_flags &= SUPPORTED_FILTERS;
1765         *total_flags &= SUPPORTED_FILTERS;
1766
1767         sc->rx.rxfilter = *total_flags;
1768         ath9k_ps_wakeup(sc);
1769         rfilt = ath_calcrxfilter(sc);
1770         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1771         ath9k_ps_restore(sc);
1772
1773         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1774                 "Set HW RX filter: 0x%x\n", rfilt);
1775 }
1776
1777 static int ath9k_sta_add(struct ieee80211_hw *hw,
1778                          struct ieee80211_vif *vif,
1779                          struct ieee80211_sta *sta)
1780 {
1781         struct ath_softc *sc = hw->priv;
1782         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1783         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1784         struct ieee80211_key_conf ps_key = { };
1785
1786         ath_node_attach(sc, sta);
1787
1788         if (vif->type != NL80211_IFTYPE_AP &&
1789             vif->type != NL80211_IFTYPE_AP_VLAN)
1790                 return 0;
1791
1792         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1793
1794         return 0;
1795 }
1796
1797 static void ath9k_del_ps_key(struct ath_softc *sc,
1798                              struct ieee80211_vif *vif,
1799                              struct ieee80211_sta *sta)
1800 {
1801         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1802         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1803         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1804
1805         if (!an->ps_key)
1806             return;
1807
1808         ath_key_delete(common, &ps_key);
1809 }
1810
1811 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1812                             struct ieee80211_vif *vif,
1813                             struct ieee80211_sta *sta)
1814 {
1815         struct ath_softc *sc = hw->priv;
1816
1817         ath9k_del_ps_key(sc, vif, sta);
1818         ath_node_detach(sc, sta);
1819
1820         return 0;
1821 }
1822
1823 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1824                          struct ieee80211_vif *vif,
1825                          enum sta_notify_cmd cmd,
1826                          struct ieee80211_sta *sta)
1827 {
1828         struct ath_softc *sc = hw->priv;
1829         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1830
1831         switch (cmd) {
1832         case STA_NOTIFY_SLEEP:
1833                 an->sleeping = true;
1834                 if (ath_tx_aggr_sleep(sc, an))
1835                         ieee80211_sta_set_tim(sta);
1836                 break;
1837         case STA_NOTIFY_AWAKE:
1838                 an->sleeping = false;
1839                 ath_tx_aggr_wakeup(sc, an);
1840                 break;
1841         }
1842 }
1843
1844 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1845                          const struct ieee80211_tx_queue_params *params)
1846 {
1847         struct ath_softc *sc = hw->priv;
1848         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1849         struct ath_txq *txq;
1850         struct ath9k_tx_queue_info qi;
1851         int ret = 0;
1852
1853         if (queue >= WME_NUM_AC)
1854                 return 0;
1855
1856         txq = sc->tx.txq_map[queue];
1857
1858         ath9k_ps_wakeup(sc);
1859         mutex_lock(&sc->mutex);
1860
1861         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1862
1863         qi.tqi_aifs = params->aifs;
1864         qi.tqi_cwmin = params->cw_min;
1865         qi.tqi_cwmax = params->cw_max;
1866         qi.tqi_burstTime = params->txop;
1867
1868         ath_dbg(common, ATH_DBG_CONFIG,
1869                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1870                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1871                 params->cw_max, params->txop);
1872
1873         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1874         if (ret)
1875                 ath_err(common, "TXQ Update failed\n");
1876
1877         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1878                 if (queue == WME_AC_BE && !ret)
1879                         ath_beaconq_config(sc);
1880
1881         mutex_unlock(&sc->mutex);
1882         ath9k_ps_restore(sc);
1883
1884         return ret;
1885 }
1886
1887 static int ath9k_set_key(struct ieee80211_hw *hw,
1888                          enum set_key_cmd cmd,
1889                          struct ieee80211_vif *vif,
1890                          struct ieee80211_sta *sta,
1891                          struct ieee80211_key_conf *key)
1892 {
1893         struct ath_softc *sc = hw->priv;
1894         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1895         int ret = 0;
1896
1897         if (ath9k_modparam_nohwcrypt)
1898                 return -ENOSPC;
1899
1900         if (vif->type == NL80211_IFTYPE_ADHOC &&
1901             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1902              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1903             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1904                 /*
1905                  * For now, disable hw crypto for the RSN IBSS group keys. This
1906                  * could be optimized in the future to use a modified key cache
1907                  * design to support per-STA RX GTK, but until that gets
1908                  * implemented, use of software crypto for group addressed
1909                  * frames is a acceptable to allow RSN IBSS to be used.
1910                  */
1911                 return -EOPNOTSUPP;
1912         }
1913
1914         mutex_lock(&sc->mutex);
1915         ath9k_ps_wakeup(sc);
1916         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1917
1918         switch (cmd) {
1919         case SET_KEY:
1920                 if (sta)
1921                         ath9k_del_ps_key(sc, vif, sta);
1922
1923                 ret = ath_key_config(common, vif, sta, key);
1924                 if (ret >= 0) {
1925                         key->hw_key_idx = ret;
1926                         /* push IV and Michael MIC generation to stack */
1927                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1928                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1929                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1930                         if (sc->sc_ah->sw_mgmt_crypto &&
1931                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1932                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1933                         ret = 0;
1934                 }
1935                 break;
1936         case DISABLE_KEY:
1937                 ath_key_delete(common, key);
1938                 break;
1939         default:
1940                 ret = -EINVAL;
1941         }
1942
1943         ath9k_ps_restore(sc);
1944         mutex_unlock(&sc->mutex);
1945
1946         return ret;
1947 }
1948 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1949 {
1950         struct ath_softc *sc = data;
1951         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1952         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1953         struct ath_vif *avp = (void *)vif->drv_priv;
1954
1955         switch (sc->sc_ah->opmode) {
1956         case NL80211_IFTYPE_ADHOC:
1957                 /* There can be only one vif available */
1958                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1959                 common->curaid = bss_conf->aid;
1960                 ath9k_hw_write_associd(sc->sc_ah);
1961                 /* configure beacon */
1962                 if (bss_conf->enable_beacon)
1963                         ath_beacon_config(sc, vif);
1964                 break;
1965         case NL80211_IFTYPE_STATION:
1966                 /*
1967                  * Skip iteration if primary station vif's bss info
1968                  * was not changed
1969                  */
1970                 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1971                         break;
1972
1973                 if (bss_conf->assoc) {
1974                         sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1975                         avp->primary_sta_vif = true;
1976                         memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1977                         common->curaid = bss_conf->aid;
1978                         ath9k_hw_write_associd(sc->sc_ah);
1979                         ath_dbg(common, ATH_DBG_CONFIG,
1980                                 "Bss Info ASSOC %d, bssid: %pM\n",
1981                                 bss_conf->aid, common->curbssid);
1982                         ath_beacon_config(sc, vif);
1983                         /*
1984                          * Request a re-configuration of Beacon related timers
1985                          * on the receipt of the first Beacon frame (i.e.,
1986                          * after time sync with the AP).
1987                          */
1988                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1989                         /* Reset rssi stats */
1990                         sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1991                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1992
1993                         sc->sc_flags |= SC_OP_ANI_RUN;
1994                         ath_start_ani(common);
1995                 }
1996                 break;
1997         default:
1998                 break;
1999         }
2000 }
2001
2002 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2003 {
2004         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2005         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2006         struct ath_vif *avp = (void *)vif->drv_priv;
2007
2008         /* Reconfigure bss info */
2009         if (avp->primary_sta_vif && !bss_conf->assoc) {
2010                 ath_dbg(common, ATH_DBG_CONFIG,
2011                         "Bss Info DISASSOC %d, bssid %pM\n",
2012                         common->curaid, common->curbssid);
2013                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2014                 avp->primary_sta_vif = false;
2015                 memset(common->curbssid, 0, ETH_ALEN);
2016                 common->curaid = 0;
2017         }
2018
2019         ieee80211_iterate_active_interfaces_atomic(
2020                         sc->hw, ath9k_bss_iter, sc);
2021
2022         /*
2023          * None of station vifs are associated.
2024          * Clear bssid & aid
2025          */
2026         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
2027             !(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2028                 ath9k_hw_write_associd(sc->sc_ah);
2029                 /* Stop ANI */
2030                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2031                 del_timer_sync(&common->ani.timer);
2032         }
2033 }
2034
2035 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2036                                    struct ieee80211_vif *vif,
2037                                    struct ieee80211_bss_conf *bss_conf,
2038                                    u32 changed)
2039 {
2040         struct ath_softc *sc = hw->priv;
2041         struct ath_hw *ah = sc->sc_ah;
2042         struct ath_common *common = ath9k_hw_common(ah);
2043         struct ath_vif *avp = (void *)vif->drv_priv;
2044         int slottime;
2045         int error;
2046
2047         ath9k_ps_wakeup(sc);
2048         mutex_lock(&sc->mutex);
2049
2050         if (changed & BSS_CHANGED_BSSID) {
2051                 ath9k_config_bss(sc, vif);
2052
2053                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2054                         common->curbssid, common->curaid);
2055         }
2056
2057         /* Enable transmission of beacons (AP, IBSS, MESH) */
2058         if ((changed & BSS_CHANGED_BEACON) ||
2059             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2060                 ath9k_set_beaconing_status(sc, false);
2061                 error = ath_beacon_alloc(sc, vif);
2062                 if (!error)
2063                         ath_beacon_config(sc, vif);
2064                 ath9k_set_beaconing_status(sc, true);
2065         }
2066
2067         if (changed & BSS_CHANGED_ERP_SLOT) {
2068                 if (bss_conf->use_short_slot)
2069                         slottime = 9;
2070                 else
2071                         slottime = 20;
2072                 if (vif->type == NL80211_IFTYPE_AP) {
2073                         /*
2074                          * Defer update, so that connected stations can adjust
2075                          * their settings at the same time.
2076                          * See beacon.c for more details
2077                          */
2078                         sc->beacon.slottime = slottime;
2079                         sc->beacon.updateslot = UPDATE;
2080                 } else {
2081                         ah->slottime = slottime;
2082                         ath9k_hw_init_global_settings(ah);
2083                 }
2084         }
2085
2086         /* Disable transmission of beacons */
2087         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2088             !bss_conf->enable_beacon) {
2089                 ath9k_set_beaconing_status(sc, false);
2090                 avp->is_bslot_active = false;
2091                 ath9k_set_beaconing_status(sc, true);
2092         }
2093
2094         if (changed & BSS_CHANGED_BEACON_INT) {
2095                 /*
2096                  * In case of AP mode, the HW TSF has to be reset
2097                  * when the beacon interval changes.
2098                  */
2099                 if (vif->type == NL80211_IFTYPE_AP) {
2100                         sc->sc_flags |= SC_OP_TSF_RESET;
2101                         ath9k_set_beaconing_status(sc, false);
2102                         error = ath_beacon_alloc(sc, vif);
2103                         if (!error)
2104                                 ath_beacon_config(sc, vif);
2105                         ath9k_set_beaconing_status(sc, true);
2106                 } else
2107                         ath_beacon_config(sc, vif);
2108         }
2109
2110         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2111                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2112                         bss_conf->use_short_preamble);
2113                 if (bss_conf->use_short_preamble)
2114                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2115                 else
2116                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2117         }
2118
2119         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2120                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2121                         bss_conf->use_cts_prot);
2122                 if (bss_conf->use_cts_prot &&
2123                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2124                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2125                 else
2126                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2127         }
2128
2129         mutex_unlock(&sc->mutex);
2130         ath9k_ps_restore(sc);
2131 }
2132
2133 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2134 {
2135         struct ath_softc *sc = hw->priv;
2136         u64 tsf;
2137
2138         mutex_lock(&sc->mutex);
2139         ath9k_ps_wakeup(sc);
2140         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2141         ath9k_ps_restore(sc);
2142         mutex_unlock(&sc->mutex);
2143
2144         return tsf;
2145 }
2146
2147 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2148 {
2149         struct ath_softc *sc = hw->priv;
2150
2151         mutex_lock(&sc->mutex);
2152         ath9k_ps_wakeup(sc);
2153         ath9k_hw_settsf64(sc->sc_ah, tsf);
2154         ath9k_ps_restore(sc);
2155         mutex_unlock(&sc->mutex);
2156 }
2157
2158 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2159 {
2160         struct ath_softc *sc = hw->priv;
2161
2162         mutex_lock(&sc->mutex);
2163
2164         ath9k_ps_wakeup(sc);
2165         ath9k_hw_reset_tsf(sc->sc_ah);
2166         ath9k_ps_restore(sc);
2167
2168         mutex_unlock(&sc->mutex);
2169 }
2170
2171 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2172                               struct ieee80211_vif *vif,
2173                               enum ieee80211_ampdu_mlme_action action,
2174                               struct ieee80211_sta *sta,
2175                               u16 tid, u16 *ssn, u8 buf_size)
2176 {
2177         struct ath_softc *sc = hw->priv;
2178         int ret = 0;
2179
2180         local_bh_disable();
2181
2182         switch (action) {
2183         case IEEE80211_AMPDU_RX_START:
2184                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2185                         ret = -ENOTSUPP;
2186                 break;
2187         case IEEE80211_AMPDU_RX_STOP:
2188                 break;
2189         case IEEE80211_AMPDU_TX_START:
2190                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2191                         return -EOPNOTSUPP;
2192
2193                 ath9k_ps_wakeup(sc);
2194                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2195                 if (!ret)
2196                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2197                 ath9k_ps_restore(sc);
2198                 break;
2199         case IEEE80211_AMPDU_TX_STOP:
2200                 ath9k_ps_wakeup(sc);
2201                 ath_tx_aggr_stop(sc, sta, tid);
2202                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2203                 ath9k_ps_restore(sc);
2204                 break;
2205         case IEEE80211_AMPDU_TX_OPERATIONAL:
2206                 ath9k_ps_wakeup(sc);
2207                 ath_tx_aggr_resume(sc, sta, tid);
2208                 ath9k_ps_restore(sc);
2209                 break;
2210         default:
2211                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2212         }
2213
2214         local_bh_enable();
2215
2216         return ret;
2217 }
2218
2219 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2220                              struct survey_info *survey)
2221 {
2222         struct ath_softc *sc = hw->priv;
2223         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2224         struct ieee80211_supported_band *sband;
2225         struct ieee80211_channel *chan;
2226         unsigned long flags;
2227         int pos;
2228
2229         spin_lock_irqsave(&common->cc_lock, flags);
2230         if (idx == 0)
2231                 ath_update_survey_stats(sc);
2232
2233         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2234         if (sband && idx >= sband->n_channels) {
2235                 idx -= sband->n_channels;
2236                 sband = NULL;
2237         }
2238
2239         if (!sband)
2240                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2241
2242         if (!sband || idx >= sband->n_channels) {
2243                 spin_unlock_irqrestore(&common->cc_lock, flags);
2244                 return -ENOENT;
2245         }
2246
2247         chan = &sband->channels[idx];
2248         pos = chan->hw_value;
2249         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2250         survey->channel = chan;
2251         spin_unlock_irqrestore(&common->cc_lock, flags);
2252
2253         return 0;
2254 }
2255
2256 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2257 {
2258         struct ath_softc *sc = hw->priv;
2259         struct ath_hw *ah = sc->sc_ah;
2260
2261         mutex_lock(&sc->mutex);
2262         ah->coverage_class = coverage_class;
2263         ath9k_hw_init_global_settings(ah);
2264         mutex_unlock(&sc->mutex);
2265 }
2266
2267 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2268 {
2269         struct ath_softc *sc = hw->priv;
2270         struct ath_hw *ah = sc->sc_ah;
2271         struct ath_common *common = ath9k_hw_common(ah);
2272         int timeout = 200; /* ms */
2273         int i, j;
2274         bool drain_txq;
2275
2276         mutex_lock(&sc->mutex);
2277         cancel_delayed_work_sync(&sc->tx_complete_work);
2278
2279         if (sc->sc_flags & SC_OP_INVALID) {
2280                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2281                 mutex_unlock(&sc->mutex);
2282                 return;
2283         }
2284
2285         if (drop)
2286                 timeout = 1;
2287
2288         for (j = 0; j < timeout; j++) {
2289                 bool npend = false;
2290
2291                 if (j)
2292                         usleep_range(1000, 2000);
2293
2294                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2295                         if (!ATH_TXQ_SETUP(sc, i))
2296                                 continue;
2297
2298                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2299
2300                         if (npend)
2301                                 break;
2302                 }
2303
2304                 if (!npend)
2305                     goto out;
2306         }
2307
2308         ath9k_ps_wakeup(sc);
2309         spin_lock_bh(&sc->sc_pcu_lock);
2310         drain_txq = ath_drain_all_txq(sc, false);
2311         spin_unlock_bh(&sc->sc_pcu_lock);
2312         if (!drain_txq)
2313                 ath_reset(sc, false);
2314         ath9k_ps_restore(sc);
2315         ieee80211_wake_queues(hw);
2316
2317 out:
2318         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2319         mutex_unlock(&sc->mutex);
2320 }
2321
2322 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2323 {
2324         struct ath_softc *sc = hw->priv;
2325         int i;
2326
2327         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2328                 if (!ATH_TXQ_SETUP(sc, i))
2329                         continue;
2330
2331                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2332                         return true;
2333         }
2334         return false;
2335 }
2336
2337 int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2338 {
2339         struct ath_softc *sc = hw->priv;
2340         struct ath_hw *ah = sc->sc_ah;
2341         struct ieee80211_vif *vif;
2342         struct ath_vif *avp;
2343         struct ath_buf *bf;
2344         struct ath_tx_status ts;
2345         int status;
2346
2347         vif = sc->beacon.bslot[0];
2348         if (!vif)
2349                 return 0;
2350
2351         avp = (void *)vif->drv_priv;
2352         if (!avp->is_bslot_active)
2353                 return 0;
2354
2355         if (!sc->beacon.tx_processed) {
2356                 tasklet_disable(&sc->bcon_tasklet);
2357
2358                 bf = avp->av_bcbuf;
2359                 if (!bf || !bf->bf_mpdu)
2360                         goto skip;
2361
2362                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2363                 if (status == -EINPROGRESS)
2364                         goto skip;
2365
2366                 sc->beacon.tx_processed = true;
2367                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2368
2369 skip:
2370                 tasklet_enable(&sc->bcon_tasklet);
2371         }
2372
2373         return sc->beacon.tx_last;
2374 }
2375
2376 struct ieee80211_ops ath9k_ops = {
2377         .tx                 = ath9k_tx,
2378         .start              = ath9k_start,
2379         .stop               = ath9k_stop,
2380         .add_interface      = ath9k_add_interface,
2381         .change_interface   = ath9k_change_interface,
2382         .remove_interface   = ath9k_remove_interface,
2383         .config             = ath9k_config,
2384         .configure_filter   = ath9k_configure_filter,
2385         .sta_add            = ath9k_sta_add,
2386         .sta_remove         = ath9k_sta_remove,
2387         .sta_notify         = ath9k_sta_notify,
2388         .conf_tx            = ath9k_conf_tx,
2389         .bss_info_changed   = ath9k_bss_info_changed,
2390         .set_key            = ath9k_set_key,
2391         .get_tsf            = ath9k_get_tsf,
2392         .set_tsf            = ath9k_set_tsf,
2393         .reset_tsf          = ath9k_reset_tsf,
2394         .ampdu_action       = ath9k_ampdu_action,
2395         .get_survey         = ath9k_get_survey,
2396         .rfkill_poll        = ath9k_rfkill_poll_state,
2397         .set_coverage_class = ath9k_set_coverage_class,
2398         .flush              = ath9k_flush,
2399         .tx_frames_pending  = ath9k_tx_frames_pending,
2400         .tx_last_beacon = ath9k_tx_last_beacon,
2401 };