net: Refactor full duplex flow control resolution
[linux-2.6.git] / drivers / net / usb / smsc95xx.c
1  /***************************************************************************
2  *
3  * Copyright (C) 2007-2008 SMSC
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License
7  * as published by the Free Software Foundation; either version 2
8  * of the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18  *
19  *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include "smsc95xx.h"
32
33 #define SMSC_CHIPNAME                   "smsc95xx"
34 #define SMSC_DRIVER_VERSION             "1.0.4"
35 #define HS_USB_PKT_SIZE                 (512)
36 #define FS_USB_PKT_SIZE                 (64)
37 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
38 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
39 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
40 #define MAX_SINGLE_PACKET_SIZE          (2048)
41 #define LAN95XX_EEPROM_MAGIC            (0x9500)
42 #define EEPROM_MAC_OFFSET               (0x01)
43 #define DEFAULT_TX_CSUM_ENABLE          (true)
44 #define DEFAULT_RX_CSUM_ENABLE          (true)
45 #define SMSC95XX_INTERNAL_PHY_ID        (1)
46 #define SMSC95XX_TX_OVERHEAD            (8)
47 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
48
49 struct smsc95xx_priv {
50         u32 mac_cr;
51         spinlock_t mac_cr_lock;
52         bool use_tx_csum;
53         bool use_rx_csum;
54 };
55
56 struct usb_context {
57         struct usb_ctrlrequest req;
58         struct completion notify;
59         struct usbnet *dev;
60 };
61
62 int turbo_mode = true;
63 module_param(turbo_mode, bool, 0644);
64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
65
66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
67 {
68         u32 *buf = kmalloc(4, GFP_KERNEL);
69         int ret;
70
71         BUG_ON(!dev);
72
73         if (!buf)
74                 return -ENOMEM;
75
76         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
77                 USB_VENDOR_REQUEST_READ_REGISTER,
78                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
79                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
80
81         if (unlikely(ret < 0))
82                 devwarn(dev, "Failed to read register index 0x%08x", index);
83
84         le32_to_cpus(buf);
85         *data = *buf;
86         kfree(buf);
87
88         return ret;
89 }
90
91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
92 {
93         u32 *buf = kmalloc(4, GFP_KERNEL);
94         int ret;
95
96         BUG_ON(!dev);
97
98         if (!buf)
99                 return -ENOMEM;
100
101         *buf = data;
102         cpu_to_le32s(buf);
103
104         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
105                 USB_VENDOR_REQUEST_WRITE_REGISTER,
106                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
107                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
108
109         if (unlikely(ret < 0))
110                 devwarn(dev, "Failed to write register index 0x%08x", index);
111
112         kfree(buf);
113
114         return ret;
115 }
116
117 /* Loop until the read is completed with timeout
118  * called with phy_mutex held */
119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
120 {
121         unsigned long start_time = jiffies;
122         u32 val;
123
124         do {
125                 smsc95xx_read_reg(dev, MII_ADDR, &val);
126                 if (!(val & MII_BUSY_))
127                         return 0;
128         } while (!time_after(jiffies, start_time + HZ));
129
130         return -EIO;
131 }
132
133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
134 {
135         struct usbnet *dev = netdev_priv(netdev);
136         u32 val, addr;
137
138         mutex_lock(&dev->phy_mutex);
139
140         /* confirm MII not busy */
141         if (smsc95xx_phy_wait_not_busy(dev)) {
142                 devwarn(dev, "MII is busy in smsc95xx_mdio_read");
143                 mutex_unlock(&dev->phy_mutex);
144                 return -EIO;
145         }
146
147         /* set the address, index & direction (read from PHY) */
148         phy_id &= dev->mii.phy_id_mask;
149         idx &= dev->mii.reg_num_mask;
150         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
151         smsc95xx_write_reg(dev, MII_ADDR, addr);
152
153         if (smsc95xx_phy_wait_not_busy(dev)) {
154                 devwarn(dev, "Timed out reading MII reg %02X", idx);
155                 mutex_unlock(&dev->phy_mutex);
156                 return -EIO;
157         }
158
159         smsc95xx_read_reg(dev, MII_DATA, &val);
160
161         mutex_unlock(&dev->phy_mutex);
162
163         return (u16)(val & 0xFFFF);
164 }
165
166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
167                                 int regval)
168 {
169         struct usbnet *dev = netdev_priv(netdev);
170         u32 val, addr;
171
172         mutex_lock(&dev->phy_mutex);
173
174         /* confirm MII not busy */
175         if (smsc95xx_phy_wait_not_busy(dev)) {
176                 devwarn(dev, "MII is busy in smsc95xx_mdio_write");
177                 mutex_unlock(&dev->phy_mutex);
178                 return;
179         }
180
181         val = regval;
182         smsc95xx_write_reg(dev, MII_DATA, val);
183
184         /* set the address, index & direction (write to PHY) */
185         phy_id &= dev->mii.phy_id_mask;
186         idx &= dev->mii.reg_num_mask;
187         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
188         smsc95xx_write_reg(dev, MII_ADDR, addr);
189
190         if (smsc95xx_phy_wait_not_busy(dev))
191                 devwarn(dev, "Timed out writing MII reg %02X", idx);
192
193         mutex_unlock(&dev->phy_mutex);
194 }
195
196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
197 {
198         unsigned long start_time = jiffies;
199         u32 val;
200
201         do {
202                 smsc95xx_read_reg(dev, E2P_CMD, &val);
203                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
204                         break;
205                 udelay(40);
206         } while (!time_after(jiffies, start_time + HZ));
207
208         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
209                 devwarn(dev, "EEPROM read operation timeout");
210                 return -EIO;
211         }
212
213         return 0;
214 }
215
216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
217 {
218         unsigned long start_time = jiffies;
219         u32 val;
220
221         do {
222                 smsc95xx_read_reg(dev, E2P_CMD, &val);
223
224                 if (!(val & E2P_CMD_LOADED_)) {
225                         devwarn(dev, "No EEPROM present");
226                         return -EIO;
227                 }
228
229                 if (!(val & E2P_CMD_BUSY_))
230                         return 0;
231
232                 udelay(40);
233         } while (!time_after(jiffies, start_time + HZ));
234
235         devwarn(dev, "EEPROM is busy");
236         return -EIO;
237 }
238
239 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
240                                 u8 *data)
241 {
242         u32 val;
243         int i, ret;
244
245         BUG_ON(!dev);
246         BUG_ON(!data);
247
248         ret = smsc95xx_eeprom_confirm_not_busy(dev);
249         if (ret)
250                 return ret;
251
252         for (i = 0; i < length; i++) {
253                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
254                 smsc95xx_write_reg(dev, E2P_CMD, val);
255
256                 ret = smsc95xx_wait_eeprom(dev);
257                 if (ret < 0)
258                         return ret;
259
260                 smsc95xx_read_reg(dev, E2P_DATA, &val);
261
262                 data[i] = val & 0xFF;
263                 offset++;
264         }
265
266         return 0;
267 }
268
269 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
270                                  u8 *data)
271 {
272         u32 val;
273         int i, ret;
274
275         BUG_ON(!dev);
276         BUG_ON(!data);
277
278         ret = smsc95xx_eeprom_confirm_not_busy(dev);
279         if (ret)
280                 return ret;
281
282         /* Issue write/erase enable command */
283         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
284         smsc95xx_write_reg(dev, E2P_CMD, val);
285
286         ret = smsc95xx_wait_eeprom(dev);
287         if (ret < 0)
288                 return ret;
289
290         for (i = 0; i < length; i++) {
291
292                 /* Fill data register */
293                 val = data[i];
294                 smsc95xx_write_reg(dev, E2P_DATA, val);
295
296                 /* Send "write" command */
297                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
298                 smsc95xx_write_reg(dev, E2P_CMD, val);
299
300                 ret = smsc95xx_wait_eeprom(dev);
301                 if (ret < 0)
302                         return ret;
303
304                 offset++;
305         }
306
307         return 0;
308 }
309
310 static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
311 {
312         struct usb_context *usb_context = urb->context;
313         struct usbnet *dev = usb_context->dev;
314
315         if (urb->status < 0)
316                 devwarn(dev, "async callback failed with %d", urb->status);
317
318         complete(&usb_context->notify);
319
320         kfree(usb_context);
321         usb_free_urb(urb);
322 }
323
324 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
325 {
326         struct usb_context *usb_context;
327         int status;
328         struct urb *urb;
329         const u16 size = 4;
330
331         urb = usb_alloc_urb(0, GFP_ATOMIC);
332         if (!urb) {
333                 devwarn(dev, "Error allocating URB");
334                 return -ENOMEM;
335         }
336
337         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
338         if (usb_context == NULL) {
339                 devwarn(dev, "Error allocating control msg");
340                 usb_free_urb(urb);
341                 return -ENOMEM;
342         }
343
344         usb_context->req.bRequestType =
345                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
346         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
347         usb_context->req.wValue = 00;
348         usb_context->req.wIndex = cpu_to_le16(index);
349         usb_context->req.wLength = cpu_to_le16(size);
350         init_completion(&usb_context->notify);
351
352         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
353                 (void *)&usb_context->req, data, size,
354                 (usb_complete_t)smsc95xx_async_cmd_callback,
355                 (void *)usb_context);
356
357         status = usb_submit_urb(urb, GFP_ATOMIC);
358         if (status < 0) {
359                 devwarn(dev, "Error submitting control msg, sts=%d", status);
360                 kfree(usb_context);
361                 usb_free_urb(urb);
362         }
363
364         return status;
365 }
366
367 /* returns hash bit number for given MAC address
368  * example:
369  * 01 00 5E 00 00 01 -> returns bit number 31 */
370 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
371 {
372         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
373 }
374
375 static void smsc95xx_set_multicast(struct net_device *netdev)
376 {
377         struct usbnet *dev = netdev_priv(netdev);
378         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
379         u32 hash_hi = 0;
380         u32 hash_lo = 0;
381         unsigned long flags;
382
383         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
384
385         if (dev->net->flags & IFF_PROMISC) {
386                 if (netif_msg_drv(dev))
387                         devdbg(dev, "promiscuous mode enabled");
388                 pdata->mac_cr |= MAC_CR_PRMS_;
389                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
390         } else if (dev->net->flags & IFF_ALLMULTI) {
391                 if (netif_msg_drv(dev))
392                         devdbg(dev, "receive all multicast enabled");
393                 pdata->mac_cr |= MAC_CR_MCPAS_;
394                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
395         } else if (dev->net->mc_count > 0) {
396                 struct dev_mc_list *mc_list = dev->net->mc_list;
397                 int count = 0;
398
399                 pdata->mac_cr |= MAC_CR_HPFILT_;
400                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
401
402                 while (mc_list) {
403                         count++;
404                         if (mc_list->dmi_addrlen == ETH_ALEN) {
405                                 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
406                                 u32 mask = 0x01 << (bitnum & 0x1F);
407                                 if (bitnum & 0x20)
408                                         hash_hi |= mask;
409                                 else
410                                         hash_lo |= mask;
411                         } else {
412                                 devwarn(dev, "dmi_addrlen != 6");
413                         }
414                         mc_list = mc_list->next;
415                 }
416
417                 if (count != ((u32)dev->net->mc_count))
418                         devwarn(dev, "mc_count != dev->mc_count");
419
420                 if (netif_msg_drv(dev))
421                         devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
422                                 hash_lo);
423         } else {
424                 if (netif_msg_drv(dev))
425                         devdbg(dev, "receive own packets only");
426                 pdata->mac_cr &=
427                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
428         }
429
430         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
431
432         /* Initiate async writes, as we can't wait for completion here */
433         smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
434         smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
435         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
436 }
437
438 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
439                                             u16 lcladv, u16 rmtadv)
440 {
441         u32 flow, afc_cfg = 0;
442
443         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
444         if (ret < 0) {
445                 devwarn(dev, "error reading AFC_CFG");
446                 return;
447         }
448
449         if (duplex == DUPLEX_FULL) {
450                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
451
452                 if (cap & FLOW_CTRL_RX)
453                         flow = 0xFFFF0002;
454                 else
455                         flow = 0;
456
457                 if (cap & FLOW_CTRL_TX)
458                         afc_cfg |= 0xF;
459                 else
460                         afc_cfg &= ~0xF;
461
462                 if (netif_msg_link(dev))
463                         devdbg(dev, "rx pause %s, tx pause %s",
464                                 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
465                                 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
466         } else {
467                 if (netif_msg_link(dev))
468                         devdbg(dev, "half duplex");
469                 flow = 0;
470                 afc_cfg |= 0xF;
471         }
472
473         smsc95xx_write_reg(dev, FLOW, flow);
474         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
475 }
476
477 static int smsc95xx_link_reset(struct usbnet *dev)
478 {
479         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
480         struct mii_if_info *mii = &dev->mii;
481         struct ethtool_cmd ecmd;
482         unsigned long flags;
483         u16 lcladv, rmtadv;
484         u32 intdata;
485
486         /* clear interrupt status */
487         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
488         intdata = 0xFFFFFFFF;
489         smsc95xx_write_reg(dev, INT_STS, intdata);
490
491         mii_check_media(mii, 1, 1);
492         mii_ethtool_gset(&dev->mii, &ecmd);
493         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
494         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
495
496         if (netif_msg_link(dev))
497                 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
498                         ecmd.speed, ecmd.duplex, lcladv, rmtadv);
499
500         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
501         if (ecmd.duplex != DUPLEX_FULL) {
502                 pdata->mac_cr &= ~MAC_CR_FDPX_;
503                 pdata->mac_cr |= MAC_CR_RCVOWN_;
504         } else {
505                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
506                 pdata->mac_cr |= MAC_CR_FDPX_;
507         }
508         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
509
510         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
511
512         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
513
514         return 0;
515 }
516
517 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
518 {
519         u32 intdata;
520
521         if (urb->actual_length != 4) {
522                 devwarn(dev, "unexpected urb length %d", urb->actual_length);
523                 return;
524         }
525
526         memcpy(&intdata, urb->transfer_buffer, 4);
527         le32_to_cpus(&intdata);
528
529         if (netif_msg_link(dev))
530                 devdbg(dev, "intdata: 0x%08X", intdata);
531
532         if (intdata & INT_ENP_PHY_INT_)
533                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
534         else
535                 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
536 }
537
538 /* Enable or disable Tx & Rx checksum offload engines */
539 static int smsc95xx_set_csums(struct usbnet *dev)
540 {
541         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
542         u32 read_buf;
543         int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
544         if (ret < 0) {
545                 devwarn(dev, "Failed to read COE_CR: %d", ret);
546                 return ret;
547         }
548
549         if (pdata->use_tx_csum)
550                 read_buf |= Tx_COE_EN_;
551         else
552                 read_buf &= ~Tx_COE_EN_;
553
554         if (pdata->use_rx_csum)
555                 read_buf |= Rx_COE_EN_;
556         else
557                 read_buf &= ~Rx_COE_EN_;
558
559         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
560         if (ret < 0) {
561                 devwarn(dev, "Failed to write COE_CR: %d", ret);
562                 return ret;
563         }
564
565         if (netif_msg_hw(dev))
566                 devdbg(dev, "COE_CR = 0x%08x", read_buf);
567         return 0;
568 }
569
570 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
571 {
572         return MAX_EEPROM_SIZE;
573 }
574
575 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
576                                        struct ethtool_eeprom *ee, u8 *data)
577 {
578         struct usbnet *dev = netdev_priv(netdev);
579
580         ee->magic = LAN95XX_EEPROM_MAGIC;
581
582         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
583 }
584
585 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
586                                        struct ethtool_eeprom *ee, u8 *data)
587 {
588         struct usbnet *dev = netdev_priv(netdev);
589
590         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
591                 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
592                         ee->magic);
593                 return -EINVAL;
594         }
595
596         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
597 }
598
599 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
600 {
601         struct usbnet *dev = netdev_priv(netdev);
602         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
603
604         return pdata->use_rx_csum;
605 }
606
607 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
608 {
609         struct usbnet *dev = netdev_priv(netdev);
610         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
611
612         pdata->use_rx_csum = !!val;
613
614         return smsc95xx_set_csums(dev);
615 }
616
617 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
618 {
619         struct usbnet *dev = netdev_priv(netdev);
620         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
621
622         return pdata->use_tx_csum;
623 }
624
625 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
626 {
627         struct usbnet *dev = netdev_priv(netdev);
628         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
629
630         pdata->use_tx_csum = !!val;
631
632         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
633         return smsc95xx_set_csums(dev);
634 }
635
636 static struct ethtool_ops smsc95xx_ethtool_ops = {
637         .get_link       = usbnet_get_link,
638         .nway_reset     = usbnet_nway_reset,
639         .get_drvinfo    = usbnet_get_drvinfo,
640         .get_msglevel   = usbnet_get_msglevel,
641         .set_msglevel   = usbnet_set_msglevel,
642         .get_settings   = usbnet_get_settings,
643         .set_settings   = usbnet_set_settings,
644         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
645         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
646         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
647         .get_tx_csum    = smsc95xx_ethtool_get_tx_csum,
648         .set_tx_csum    = smsc95xx_ethtool_set_tx_csum,
649         .get_rx_csum    = smsc95xx_ethtool_get_rx_csum,
650         .set_rx_csum    = smsc95xx_ethtool_set_rx_csum,
651 };
652
653 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
654 {
655         struct usbnet *dev = netdev_priv(netdev);
656
657         if (!netif_running(netdev))
658                 return -EINVAL;
659
660         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
661 }
662
663 static void smsc95xx_init_mac_address(struct usbnet *dev)
664 {
665         /* try reading mac address from EEPROM */
666         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
667                         dev->net->dev_addr) == 0) {
668                 if (is_valid_ether_addr(dev->net->dev_addr)) {
669                         /* eeprom values are valid so use them */
670                         if (netif_msg_ifup(dev))
671                                 devdbg(dev, "MAC address read from EEPROM");
672                         return;
673                 }
674         }
675
676         /* no eeprom, or eeprom values are invalid. generate random MAC */
677         random_ether_addr(dev->net->dev_addr);
678         if (netif_msg_ifup(dev))
679                 devdbg(dev, "MAC address set to random_ether_addr");
680 }
681
682 static int smsc95xx_set_mac_address(struct usbnet *dev)
683 {
684         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
685                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
686         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
687         int ret;
688
689         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
690         if (ret < 0) {
691                 devwarn(dev, "Failed to write ADDRL: %d", ret);
692                 return ret;
693         }
694
695         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
696         if (ret < 0) {
697                 devwarn(dev, "Failed to write ADDRH: %d", ret);
698                 return ret;
699         }
700
701         return 0;
702 }
703
704 /* starts the TX path */
705 static void smsc95xx_start_tx_path(struct usbnet *dev)
706 {
707         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
708         unsigned long flags;
709         u32 reg_val;
710
711         /* Enable Tx at MAC */
712         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
713         pdata->mac_cr |= MAC_CR_TXEN_;
714         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
715
716         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
717
718         /* Enable Tx at SCSRs */
719         reg_val = TX_CFG_ON_;
720         smsc95xx_write_reg(dev, TX_CFG, reg_val);
721 }
722
723 /* Starts the Receive path */
724 static void smsc95xx_start_rx_path(struct usbnet *dev)
725 {
726         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
727         unsigned long flags;
728
729         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
730         pdata->mac_cr |= MAC_CR_RXEN_;
731         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
732
733         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
734 }
735
736 static int smsc95xx_phy_initialize(struct usbnet *dev)
737 {
738         /* Initialize MII structure */
739         dev->mii.dev = dev->net;
740         dev->mii.mdio_read = smsc95xx_mdio_read;
741         dev->mii.mdio_write = smsc95xx_mdio_write;
742         dev->mii.phy_id_mask = 0x1f;
743         dev->mii.reg_num_mask = 0x1f;
744         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
745
746         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
747         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
748                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
749                 ADVERTISE_PAUSE_ASYM);
750
751         /* read to clear */
752         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
753
754         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
755                 PHY_INT_MASK_DEFAULT_);
756         mii_nway_restart(&dev->mii);
757
758         if (netif_msg_ifup(dev))
759                 devdbg(dev, "phy initialised succesfully");
760         return 0;
761 }
762
763 static int smsc95xx_reset(struct usbnet *dev)
764 {
765         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
766         struct net_device *netdev = dev->net;
767         u32 read_buf, write_buf, burst_cap;
768         int ret = 0, timeout;
769
770         if (netif_msg_ifup(dev))
771                 devdbg(dev, "entering smsc95xx_reset");
772
773         write_buf = HW_CFG_LRST_;
774         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
775         if (ret < 0) {
776                 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
777                         "register, ret = %d", ret);
778                 return ret;
779         }
780
781         timeout = 0;
782         do {
783                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
784                 if (ret < 0) {
785                         devwarn(dev, "Failed to read HW_CFG: %d", ret);
786                         return ret;
787                 }
788                 msleep(10);
789                 timeout++;
790         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
791
792         if (timeout >= 100) {
793                 devwarn(dev, "timeout waiting for completion of Lite Reset");
794                 return ret;
795         }
796
797         write_buf = PM_CTL_PHY_RST_;
798         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
799         if (ret < 0) {
800                 devwarn(dev, "Failed to write PM_CTRL: %d", ret);
801                 return ret;
802         }
803
804         timeout = 0;
805         do {
806                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
807                 if (ret < 0) {
808                         devwarn(dev, "Failed to read PM_CTRL: %d", ret);
809                         return ret;
810                 }
811                 msleep(10);
812                 timeout++;
813         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
814
815         if (timeout >= 100) {
816                 devwarn(dev, "timeout waiting for PHY Reset");
817                 return ret;
818         }
819
820         smsc95xx_init_mac_address(dev);
821
822         ret = smsc95xx_set_mac_address(dev);
823         if (ret < 0)
824                 return ret;
825
826         if (netif_msg_ifup(dev))
827                 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
828
829         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
830         if (ret < 0) {
831                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
832                 return ret;
833         }
834
835         if (netif_msg_ifup(dev))
836                 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
837
838         read_buf |= HW_CFG_BIR_;
839
840         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
841         if (ret < 0) {
842                 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
843                         "register, ret = %d", ret);
844                 return ret;
845         }
846
847         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
848         if (ret < 0) {
849                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
850                 return ret;
851         }
852         if (netif_msg_ifup(dev))
853                 devdbg(dev, "Read Value from HW_CFG after writing "
854                         "HW_CFG_BIR_: 0x%08x", read_buf);
855
856         if (!turbo_mode) {
857                 burst_cap = 0;
858                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
859         } else if (dev->udev->speed == USB_SPEED_HIGH) {
860                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
861                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
862         } else {
863                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
864                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
865         }
866
867         if (netif_msg_ifup(dev))
868                 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
869
870         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
871         if (ret < 0) {
872                 devwarn(dev, "Failed to write BURST_CAP: %d", ret);
873                 return ret;
874         }
875
876         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
877         if (ret < 0) {
878                 devwarn(dev, "Failed to read BURST_CAP: %d", ret);
879                 return ret;
880         }
881         if (netif_msg_ifup(dev))
882                 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
883                         read_buf);
884
885         read_buf = DEFAULT_BULK_IN_DELAY;
886         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
887         if (ret < 0) {
888                 devwarn(dev, "ret = %d", ret);
889                 return ret;
890         }
891
892         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
893         if (ret < 0) {
894                 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
895                 return ret;
896         }
897         if (netif_msg_ifup(dev))
898                 devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
899                         "0x%08x", read_buf);
900
901         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
902         if (ret < 0) {
903                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
904                 return ret;
905         }
906         if (netif_msg_ifup(dev))
907                 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
908
909         if (turbo_mode)
910                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
911
912         read_buf &= ~HW_CFG_RXDOFF_;
913
914         /* set Rx data offset=2, Make IP header aligns on word boundary. */
915         read_buf |= NET_IP_ALIGN << 9;
916
917         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
918         if (ret < 0) {
919                 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
920                 return ret;
921         }
922
923         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
924         if (ret < 0) {
925                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
926                 return ret;
927         }
928         if (netif_msg_ifup(dev))
929                 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
930                         read_buf);
931
932         write_buf = 0xFFFFFFFF;
933         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
934         if (ret < 0) {
935                 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
936                 return ret;
937         }
938
939         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
940         if (ret < 0) {
941                 devwarn(dev, "Failed to read ID_REV: %d", ret);
942                 return ret;
943         }
944         if (netif_msg_ifup(dev))
945                 devdbg(dev, "ID_REV = 0x%08x", read_buf);
946
947         /* Init Tx */
948         write_buf = 0;
949         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
950         if (ret < 0) {
951                 devwarn(dev, "Failed to write FLOW: %d", ret);
952                 return ret;
953         }
954
955         read_buf = AFC_CFG_DEFAULT;
956         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
957         if (ret < 0) {
958                 devwarn(dev, "Failed to write AFC_CFG: %d", ret);
959                 return ret;
960         }
961
962         /* Don't need mac_cr_lock during initialisation */
963         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
964         if (ret < 0) {
965                 devwarn(dev, "Failed to read MAC_CR: %d", ret);
966                 return ret;
967         }
968
969         /* Init Rx */
970         /* Set Vlan */
971         write_buf = (u32)ETH_P_8021Q;
972         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
973         if (ret < 0) {
974                 devwarn(dev, "Failed to write VAN1: %d", ret);
975                 return ret;
976         }
977
978         /* Enable or disable checksum offload engines */
979         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
980         ret = smsc95xx_set_csums(dev);
981         if (ret < 0) {
982                 devwarn(dev, "Failed to set csum offload: %d", ret);
983                 return ret;
984         }
985
986         smsc95xx_set_multicast(dev->net);
987
988         if (smsc95xx_phy_initialize(dev) < 0)
989                 return -EIO;
990
991         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
992         if (ret < 0) {
993                 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
994                 return ret;
995         }
996
997         /* enable PHY interrupts */
998         read_buf |= INT_EP_CTL_PHY_INT_;
999
1000         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1001         if (ret < 0) {
1002                 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
1003                 return ret;
1004         }
1005
1006         smsc95xx_start_tx_path(dev);
1007         smsc95xx_start_rx_path(dev);
1008
1009         if (netif_msg_ifup(dev))
1010                 devdbg(dev, "smsc95xx_reset, return 0");
1011         return 0;
1012 }
1013
1014 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1015 {
1016         struct smsc95xx_priv *pdata = NULL;
1017         int ret;
1018
1019         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1020
1021         ret = usbnet_get_endpoints(dev, intf);
1022         if (ret < 0) {
1023                 devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
1024                 return ret;
1025         }
1026
1027         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1028                 GFP_KERNEL);
1029
1030         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1031         if (!pdata) {
1032                 devwarn(dev, "Unable to allocate struct smsc95xx_priv");
1033                 return -ENOMEM;
1034         }
1035
1036         spin_lock_init(&pdata->mac_cr_lock);
1037
1038         pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1039         pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1040
1041         /* Init all registers */
1042         ret = smsc95xx_reset(dev);
1043
1044         dev->net->do_ioctl = smsc95xx_ioctl;
1045         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1046         dev->net->set_multicast_list = smsc95xx_set_multicast;
1047         dev->net->flags |= IFF_MULTICAST;
1048         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1049         return 0;
1050 }
1051
1052 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1053 {
1054         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1055         if (pdata) {
1056                 if (netif_msg_ifdown(dev))
1057                         devdbg(dev, "free pdata");
1058                 kfree(pdata);
1059                 pdata = NULL;
1060                 dev->data[0] = 0;
1061         }
1062 }
1063
1064 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1065 {
1066         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1067         skb->ip_summed = CHECKSUM_COMPLETE;
1068         skb_trim(skb, skb->len - 2);
1069 }
1070
1071 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1072 {
1073         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1074
1075         while (skb->len > 0) {
1076                 u32 header, align_count;
1077                 struct sk_buff *ax_skb;
1078                 unsigned char *packet;
1079                 u16 size;
1080
1081                 memcpy(&header, skb->data, sizeof(header));
1082                 le32_to_cpus(&header);
1083                 skb_pull(skb, 4 + NET_IP_ALIGN);
1084                 packet = skb->data;
1085
1086                 /* get the packet length */
1087                 size = (u16)((header & RX_STS_FL_) >> 16);
1088                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1089
1090                 if (unlikely(header & RX_STS_ES_)) {
1091                         if (netif_msg_rx_err(dev))
1092                                 devdbg(dev, "Error header=0x%08x", header);
1093                         dev->stats.rx_errors++;
1094                         dev->stats.rx_dropped++;
1095
1096                         if (header & RX_STS_CRC_) {
1097                                 dev->stats.rx_crc_errors++;
1098                         } else {
1099                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1100                                         dev->stats.rx_frame_errors++;
1101
1102                                 if ((header & RX_STS_LE_) &&
1103                                         (!(header & RX_STS_FT_)))
1104                                         dev->stats.rx_length_errors++;
1105                         }
1106                 } else {
1107                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1108                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1109                                 if (netif_msg_rx_err(dev))
1110                                         devdbg(dev, "size err header=0x%08x",
1111                                                 header);
1112                                 return 0;
1113                         }
1114
1115                         /* last frame in this batch */
1116                         if (skb->len == size) {
1117                                 if (pdata->use_rx_csum)
1118                                         smsc95xx_rx_csum_offload(skb);
1119
1120                                 skb->truesize = size + sizeof(struct sk_buff);
1121
1122                                 return 1;
1123                         }
1124
1125                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1126                         if (unlikely(!ax_skb)) {
1127                                 devwarn(dev, "Error allocating skb");
1128                                 return 0;
1129                         }
1130
1131                         ax_skb->len = size;
1132                         ax_skb->data = packet;
1133                         skb_set_tail_pointer(ax_skb, size);
1134
1135                         if (pdata->use_rx_csum)
1136                                 smsc95xx_rx_csum_offload(ax_skb);
1137
1138                         ax_skb->truesize = size + sizeof(struct sk_buff);
1139
1140                         usbnet_skb_return(dev, ax_skb);
1141                 }
1142
1143                 skb_pull(skb, size);
1144
1145                 /* padding bytes before the next frame starts */
1146                 if (skb->len)
1147                         skb_pull(skb, align_count);
1148         }
1149
1150         if (unlikely(skb->len < 0)) {
1151                 devwarn(dev, "invalid rx length<0 %d", skb->len);
1152                 return 0;
1153         }
1154
1155         return 1;
1156 }
1157
1158 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1159 {
1160         int len = skb->data - skb->head;
1161         u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1162         u16 low_16 = (u16)(skb->csum_start - len);
1163         return (high_16 << 16) | low_16;
1164 }
1165
1166 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1167                                          struct sk_buff *skb, gfp_t flags)
1168 {
1169         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1170         bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1171         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1172         u32 tx_cmd_a, tx_cmd_b;
1173
1174         /* We do not advertise SG, so skbs should be already linearized */
1175         BUG_ON(skb_shinfo(skb)->nr_frags);
1176
1177         if (skb_headroom(skb) < overhead) {
1178                 struct sk_buff *skb2 = skb_copy_expand(skb,
1179                         overhead, 0, flags);
1180                 dev_kfree_skb_any(skb);
1181                 skb = skb2;
1182                 if (!skb)
1183                         return NULL;
1184         }
1185
1186         if (csum) {
1187                 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1188                 skb_push(skb, 4);
1189                 memcpy(skb->data, &csum_preamble, 4);
1190         }
1191
1192         skb_push(skb, 4);
1193         tx_cmd_b = (u32)(skb->len - 4);
1194         if (csum)
1195                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1196         cpu_to_le32s(&tx_cmd_b);
1197         memcpy(skb->data, &tx_cmd_b, 4);
1198
1199         skb_push(skb, 4);
1200         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1201                 TX_CMD_A_LAST_SEG_;
1202         cpu_to_le32s(&tx_cmd_a);
1203         memcpy(skb->data, &tx_cmd_a, 4);
1204
1205         return skb;
1206 }
1207
1208 static const struct driver_info smsc95xx_info = {
1209         .description    = "smsc95xx USB 2.0 Ethernet",
1210         .bind           = smsc95xx_bind,
1211         .unbind         = smsc95xx_unbind,
1212         .link_reset     = smsc95xx_link_reset,
1213         .reset          = smsc95xx_reset,
1214         .rx_fixup       = smsc95xx_rx_fixup,
1215         .tx_fixup       = smsc95xx_tx_fixup,
1216         .status         = smsc95xx_status,
1217         .flags          = FLAG_ETHER,
1218 };
1219
1220 static const struct usb_device_id products[] = {
1221         {
1222                 /* SMSC9500 USB Ethernet Device */
1223                 USB_DEVICE(0x0424, 0x9500),
1224                 .driver_info = (unsigned long) &smsc95xx_info,
1225         },
1226         { },            /* END */
1227 };
1228 MODULE_DEVICE_TABLE(usb, products);
1229
1230 static struct usb_driver smsc95xx_driver = {
1231         .name           = "smsc95xx",
1232         .id_table       = products,
1233         .probe          = usbnet_probe,
1234         .suspend        = usbnet_suspend,
1235         .resume         = usbnet_resume,
1236         .disconnect     = usbnet_disconnect,
1237 };
1238
1239 static int __init smsc95xx_init(void)
1240 {
1241         return usb_register(&smsc95xx_driver);
1242 }
1243 module_init(smsc95xx_init);
1244
1245 static void __exit smsc95xx_exit(void)
1246 {
1247         usb_deregister(&smsc95xx_driver);
1248 }
1249 module_exit(smsc95xx_exit);
1250
1251 MODULE_AUTHOR("Nancy Lin");
1252 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1253 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1254 MODULE_LICENSE("GPL");