smsc95xx: remove unused completion struct
[linux-2.6.git] / drivers / net / usb / smsc95xx.c
1  /***************************************************************************
2  *
3  * Copyright (C) 2007-2008 SMSC
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License
7  * as published by the Free Software Foundation; either version 2
8  * of the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18  *
19  *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include "smsc95xx.h"
32
33 #define SMSC_CHIPNAME                   "smsc95xx"
34 #define SMSC_DRIVER_VERSION             "1.0.4"
35 #define HS_USB_PKT_SIZE                 (512)
36 #define FS_USB_PKT_SIZE                 (64)
37 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
38 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
39 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
40 #define MAX_SINGLE_PACKET_SIZE          (2048)
41 #define LAN95XX_EEPROM_MAGIC            (0x9500)
42 #define EEPROM_MAC_OFFSET               (0x01)
43 #define DEFAULT_TX_CSUM_ENABLE          (true)
44 #define DEFAULT_RX_CSUM_ENABLE          (true)
45 #define SMSC95XX_INTERNAL_PHY_ID        (1)
46 #define SMSC95XX_TX_OVERHEAD            (8)
47 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
48
49 struct smsc95xx_priv {
50         u32 mac_cr;
51         spinlock_t mac_cr_lock;
52         bool use_tx_csum;
53         bool use_rx_csum;
54 };
55
56 struct usb_context {
57         struct usb_ctrlrequest req;
58         struct usbnet *dev;
59 };
60
61 int turbo_mode = true;
62 module_param(turbo_mode, bool, 0644);
63 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
64
65 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
66 {
67         u32 *buf = kmalloc(4, GFP_KERNEL);
68         int ret;
69
70         BUG_ON(!dev);
71
72         if (!buf)
73                 return -ENOMEM;
74
75         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
76                 USB_VENDOR_REQUEST_READ_REGISTER,
77                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
78                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
79
80         if (unlikely(ret < 0))
81                 devwarn(dev, "Failed to read register index 0x%08x", index);
82
83         le32_to_cpus(buf);
84         *data = *buf;
85         kfree(buf);
86
87         return ret;
88 }
89
90 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
91 {
92         u32 *buf = kmalloc(4, GFP_KERNEL);
93         int ret;
94
95         BUG_ON(!dev);
96
97         if (!buf)
98                 return -ENOMEM;
99
100         *buf = data;
101         cpu_to_le32s(buf);
102
103         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
104                 USB_VENDOR_REQUEST_WRITE_REGISTER,
105                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
106                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
107
108         if (unlikely(ret < 0))
109                 devwarn(dev, "Failed to write register index 0x%08x", index);
110
111         kfree(buf);
112
113         return ret;
114 }
115
116 /* Loop until the read is completed with timeout
117  * called with phy_mutex held */
118 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
119 {
120         unsigned long start_time = jiffies;
121         u32 val;
122
123         do {
124                 smsc95xx_read_reg(dev, MII_ADDR, &val);
125                 if (!(val & MII_BUSY_))
126                         return 0;
127         } while (!time_after(jiffies, start_time + HZ));
128
129         return -EIO;
130 }
131
132 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
133 {
134         struct usbnet *dev = netdev_priv(netdev);
135         u32 val, addr;
136
137         mutex_lock(&dev->phy_mutex);
138
139         /* confirm MII not busy */
140         if (smsc95xx_phy_wait_not_busy(dev)) {
141                 devwarn(dev, "MII is busy in smsc95xx_mdio_read");
142                 mutex_unlock(&dev->phy_mutex);
143                 return -EIO;
144         }
145
146         /* set the address, index & direction (read from PHY) */
147         phy_id &= dev->mii.phy_id_mask;
148         idx &= dev->mii.reg_num_mask;
149         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
150         smsc95xx_write_reg(dev, MII_ADDR, addr);
151
152         if (smsc95xx_phy_wait_not_busy(dev)) {
153                 devwarn(dev, "Timed out reading MII reg %02X", idx);
154                 mutex_unlock(&dev->phy_mutex);
155                 return -EIO;
156         }
157
158         smsc95xx_read_reg(dev, MII_DATA, &val);
159
160         mutex_unlock(&dev->phy_mutex);
161
162         return (u16)(val & 0xFFFF);
163 }
164
165 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
166                                 int regval)
167 {
168         struct usbnet *dev = netdev_priv(netdev);
169         u32 val, addr;
170
171         mutex_lock(&dev->phy_mutex);
172
173         /* confirm MII not busy */
174         if (smsc95xx_phy_wait_not_busy(dev)) {
175                 devwarn(dev, "MII is busy in smsc95xx_mdio_write");
176                 mutex_unlock(&dev->phy_mutex);
177                 return;
178         }
179
180         val = regval;
181         smsc95xx_write_reg(dev, MII_DATA, val);
182
183         /* set the address, index & direction (write to PHY) */
184         phy_id &= dev->mii.phy_id_mask;
185         idx &= dev->mii.reg_num_mask;
186         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
187         smsc95xx_write_reg(dev, MII_ADDR, addr);
188
189         if (smsc95xx_phy_wait_not_busy(dev))
190                 devwarn(dev, "Timed out writing MII reg %02X", idx);
191
192         mutex_unlock(&dev->phy_mutex);
193 }
194
195 static int smsc95xx_wait_eeprom(struct usbnet *dev)
196 {
197         unsigned long start_time = jiffies;
198         u32 val;
199
200         do {
201                 smsc95xx_read_reg(dev, E2P_CMD, &val);
202                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
203                         break;
204                 udelay(40);
205         } while (!time_after(jiffies, start_time + HZ));
206
207         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
208                 devwarn(dev, "EEPROM read operation timeout");
209                 return -EIO;
210         }
211
212         return 0;
213 }
214
215 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
216 {
217         unsigned long start_time = jiffies;
218         u32 val;
219
220         do {
221                 smsc95xx_read_reg(dev, E2P_CMD, &val);
222
223                 if (!(val & E2P_CMD_LOADED_)) {
224                         devwarn(dev, "No EEPROM present");
225                         return -EIO;
226                 }
227
228                 if (!(val & E2P_CMD_BUSY_))
229                         return 0;
230
231                 udelay(40);
232         } while (!time_after(jiffies, start_time + HZ));
233
234         devwarn(dev, "EEPROM is busy");
235         return -EIO;
236 }
237
238 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
239                                 u8 *data)
240 {
241         u32 val;
242         int i, ret;
243
244         BUG_ON(!dev);
245         BUG_ON(!data);
246
247         ret = smsc95xx_eeprom_confirm_not_busy(dev);
248         if (ret)
249                 return ret;
250
251         for (i = 0; i < length; i++) {
252                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
253                 smsc95xx_write_reg(dev, E2P_CMD, val);
254
255                 ret = smsc95xx_wait_eeprom(dev);
256                 if (ret < 0)
257                         return ret;
258
259                 smsc95xx_read_reg(dev, E2P_DATA, &val);
260
261                 data[i] = val & 0xFF;
262                 offset++;
263         }
264
265         return 0;
266 }
267
268 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
269                                  u8 *data)
270 {
271         u32 val;
272         int i, ret;
273
274         BUG_ON(!dev);
275         BUG_ON(!data);
276
277         ret = smsc95xx_eeprom_confirm_not_busy(dev);
278         if (ret)
279                 return ret;
280
281         /* Issue write/erase enable command */
282         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
283         smsc95xx_write_reg(dev, E2P_CMD, val);
284
285         ret = smsc95xx_wait_eeprom(dev);
286         if (ret < 0)
287                 return ret;
288
289         for (i = 0; i < length; i++) {
290
291                 /* Fill data register */
292                 val = data[i];
293                 smsc95xx_write_reg(dev, E2P_DATA, val);
294
295                 /* Send "write" command */
296                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
297                 smsc95xx_write_reg(dev, E2P_CMD, val);
298
299                 ret = smsc95xx_wait_eeprom(dev);
300                 if (ret < 0)
301                         return ret;
302
303                 offset++;
304         }
305
306         return 0;
307 }
308
309 static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
310 {
311         struct usb_context *usb_context = urb->context;
312         struct usbnet *dev = usb_context->dev;
313         int status = urb->status;
314
315         if (status < 0)
316                 devwarn(dev, "async callback failed with %d", status);
317
318         kfree(usb_context);
319         usb_free_urb(urb);
320 }
321
322 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
323 {
324         struct usb_context *usb_context;
325         int status;
326         struct urb *urb;
327         const u16 size = 4;
328
329         urb = usb_alloc_urb(0, GFP_ATOMIC);
330         if (!urb) {
331                 devwarn(dev, "Error allocating URB");
332                 return -ENOMEM;
333         }
334
335         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
336         if (usb_context == NULL) {
337                 devwarn(dev, "Error allocating control msg");
338                 usb_free_urb(urb);
339                 return -ENOMEM;
340         }
341
342         usb_context->req.bRequestType =
343                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
344         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
345         usb_context->req.wValue = 00;
346         usb_context->req.wIndex = cpu_to_le16(index);
347         usb_context->req.wLength = cpu_to_le16(size);
348
349         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
350                 (void *)&usb_context->req, data, size,
351                 (usb_complete_t)smsc95xx_async_cmd_callback,
352                 (void *)usb_context);
353
354         status = usb_submit_urb(urb, GFP_ATOMIC);
355         if (status < 0) {
356                 devwarn(dev, "Error submitting control msg, sts=%d", status);
357                 kfree(usb_context);
358                 usb_free_urb(urb);
359         }
360
361         return status;
362 }
363
364 /* returns hash bit number for given MAC address
365  * example:
366  * 01 00 5E 00 00 01 -> returns bit number 31 */
367 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
368 {
369         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
370 }
371
372 static void smsc95xx_set_multicast(struct net_device *netdev)
373 {
374         struct usbnet *dev = netdev_priv(netdev);
375         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
376         u32 hash_hi = 0;
377         u32 hash_lo = 0;
378         unsigned long flags;
379
380         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
381
382         if (dev->net->flags & IFF_PROMISC) {
383                 if (netif_msg_drv(dev))
384                         devdbg(dev, "promiscuous mode enabled");
385                 pdata->mac_cr |= MAC_CR_PRMS_;
386                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
387         } else if (dev->net->flags & IFF_ALLMULTI) {
388                 if (netif_msg_drv(dev))
389                         devdbg(dev, "receive all multicast enabled");
390                 pdata->mac_cr |= MAC_CR_MCPAS_;
391                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
392         } else if (dev->net->mc_count > 0) {
393                 struct dev_mc_list *mc_list = dev->net->mc_list;
394                 int count = 0;
395
396                 pdata->mac_cr |= MAC_CR_HPFILT_;
397                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
398
399                 while (mc_list) {
400                         count++;
401                         if (mc_list->dmi_addrlen == ETH_ALEN) {
402                                 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
403                                 u32 mask = 0x01 << (bitnum & 0x1F);
404                                 if (bitnum & 0x20)
405                                         hash_hi |= mask;
406                                 else
407                                         hash_lo |= mask;
408                         } else {
409                                 devwarn(dev, "dmi_addrlen != 6");
410                         }
411                         mc_list = mc_list->next;
412                 }
413
414                 if (count != ((u32)dev->net->mc_count))
415                         devwarn(dev, "mc_count != dev->mc_count");
416
417                 if (netif_msg_drv(dev))
418                         devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
419                                 hash_lo);
420         } else {
421                 if (netif_msg_drv(dev))
422                         devdbg(dev, "receive own packets only");
423                 pdata->mac_cr &=
424                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
425         }
426
427         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
428
429         /* Initiate async writes, as we can't wait for completion here */
430         smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
431         smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
432         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
433 }
434
435 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
436                                             u16 lcladv, u16 rmtadv)
437 {
438         u32 flow, afc_cfg = 0;
439
440         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
441         if (ret < 0) {
442                 devwarn(dev, "error reading AFC_CFG");
443                 return;
444         }
445
446         if (duplex == DUPLEX_FULL) {
447                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
448
449                 if (cap & FLOW_CTRL_RX)
450                         flow = 0xFFFF0002;
451                 else
452                         flow = 0;
453
454                 if (cap & FLOW_CTRL_TX)
455                         afc_cfg |= 0xF;
456                 else
457                         afc_cfg &= ~0xF;
458
459                 if (netif_msg_link(dev))
460                         devdbg(dev, "rx pause %s, tx pause %s",
461                                 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
462                                 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
463         } else {
464                 if (netif_msg_link(dev))
465                         devdbg(dev, "half duplex");
466                 flow = 0;
467                 afc_cfg |= 0xF;
468         }
469
470         smsc95xx_write_reg(dev, FLOW, flow);
471         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
472 }
473
474 static int smsc95xx_link_reset(struct usbnet *dev)
475 {
476         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
477         struct mii_if_info *mii = &dev->mii;
478         struct ethtool_cmd ecmd;
479         unsigned long flags;
480         u16 lcladv, rmtadv;
481         u32 intdata;
482
483         /* clear interrupt status */
484         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
485         intdata = 0xFFFFFFFF;
486         smsc95xx_write_reg(dev, INT_STS, intdata);
487
488         mii_check_media(mii, 1, 1);
489         mii_ethtool_gset(&dev->mii, &ecmd);
490         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
491         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
492
493         if (netif_msg_link(dev))
494                 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
495                         ecmd.speed, ecmd.duplex, lcladv, rmtadv);
496
497         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
498         if (ecmd.duplex != DUPLEX_FULL) {
499                 pdata->mac_cr &= ~MAC_CR_FDPX_;
500                 pdata->mac_cr |= MAC_CR_RCVOWN_;
501         } else {
502                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
503                 pdata->mac_cr |= MAC_CR_FDPX_;
504         }
505         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
506
507         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
508
509         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
510
511         return 0;
512 }
513
514 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
515 {
516         u32 intdata;
517
518         if (urb->actual_length != 4) {
519                 devwarn(dev, "unexpected urb length %d", urb->actual_length);
520                 return;
521         }
522
523         memcpy(&intdata, urb->transfer_buffer, 4);
524         le32_to_cpus(&intdata);
525
526         if (netif_msg_link(dev))
527                 devdbg(dev, "intdata: 0x%08X", intdata);
528
529         if (intdata & INT_ENP_PHY_INT_)
530                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
531         else
532                 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
533 }
534
535 /* Enable or disable Tx & Rx checksum offload engines */
536 static int smsc95xx_set_csums(struct usbnet *dev)
537 {
538         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
539         u32 read_buf;
540         int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
541         if (ret < 0) {
542                 devwarn(dev, "Failed to read COE_CR: %d", ret);
543                 return ret;
544         }
545
546         if (pdata->use_tx_csum)
547                 read_buf |= Tx_COE_EN_;
548         else
549                 read_buf &= ~Tx_COE_EN_;
550
551         if (pdata->use_rx_csum)
552                 read_buf |= Rx_COE_EN_;
553         else
554                 read_buf &= ~Rx_COE_EN_;
555
556         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
557         if (ret < 0) {
558                 devwarn(dev, "Failed to write COE_CR: %d", ret);
559                 return ret;
560         }
561
562         if (netif_msg_hw(dev))
563                 devdbg(dev, "COE_CR = 0x%08x", read_buf);
564         return 0;
565 }
566
567 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
568 {
569         return MAX_EEPROM_SIZE;
570 }
571
572 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
573                                        struct ethtool_eeprom *ee, u8 *data)
574 {
575         struct usbnet *dev = netdev_priv(netdev);
576
577         ee->magic = LAN95XX_EEPROM_MAGIC;
578
579         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
580 }
581
582 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
583                                        struct ethtool_eeprom *ee, u8 *data)
584 {
585         struct usbnet *dev = netdev_priv(netdev);
586
587         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
588                 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
589                         ee->magic);
590                 return -EINVAL;
591         }
592
593         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
594 }
595
596 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
597 {
598         struct usbnet *dev = netdev_priv(netdev);
599         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
600
601         return pdata->use_rx_csum;
602 }
603
604 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
605 {
606         struct usbnet *dev = netdev_priv(netdev);
607         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
608
609         pdata->use_rx_csum = !!val;
610
611         return smsc95xx_set_csums(dev);
612 }
613
614 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
615 {
616         struct usbnet *dev = netdev_priv(netdev);
617         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
618
619         return pdata->use_tx_csum;
620 }
621
622 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
623 {
624         struct usbnet *dev = netdev_priv(netdev);
625         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
626
627         pdata->use_tx_csum = !!val;
628
629         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
630         return smsc95xx_set_csums(dev);
631 }
632
633 static struct ethtool_ops smsc95xx_ethtool_ops = {
634         .get_link       = usbnet_get_link,
635         .nway_reset     = usbnet_nway_reset,
636         .get_drvinfo    = usbnet_get_drvinfo,
637         .get_msglevel   = usbnet_get_msglevel,
638         .set_msglevel   = usbnet_set_msglevel,
639         .get_settings   = usbnet_get_settings,
640         .set_settings   = usbnet_set_settings,
641         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
642         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
643         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
644         .get_tx_csum    = smsc95xx_ethtool_get_tx_csum,
645         .set_tx_csum    = smsc95xx_ethtool_set_tx_csum,
646         .get_rx_csum    = smsc95xx_ethtool_get_rx_csum,
647         .set_rx_csum    = smsc95xx_ethtool_set_rx_csum,
648 };
649
650 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
651 {
652         struct usbnet *dev = netdev_priv(netdev);
653
654         if (!netif_running(netdev))
655                 return -EINVAL;
656
657         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
658 }
659
660 static void smsc95xx_init_mac_address(struct usbnet *dev)
661 {
662         /* try reading mac address from EEPROM */
663         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
664                         dev->net->dev_addr) == 0) {
665                 if (is_valid_ether_addr(dev->net->dev_addr)) {
666                         /* eeprom values are valid so use them */
667                         if (netif_msg_ifup(dev))
668                                 devdbg(dev, "MAC address read from EEPROM");
669                         return;
670                 }
671         }
672
673         /* no eeprom, or eeprom values are invalid. generate random MAC */
674         random_ether_addr(dev->net->dev_addr);
675         if (netif_msg_ifup(dev))
676                 devdbg(dev, "MAC address set to random_ether_addr");
677 }
678
679 static int smsc95xx_set_mac_address(struct usbnet *dev)
680 {
681         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
682                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
683         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
684         int ret;
685
686         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
687         if (ret < 0) {
688                 devwarn(dev, "Failed to write ADDRL: %d", ret);
689                 return ret;
690         }
691
692         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
693         if (ret < 0) {
694                 devwarn(dev, "Failed to write ADDRH: %d", ret);
695                 return ret;
696         }
697
698         return 0;
699 }
700
701 /* starts the TX path */
702 static void smsc95xx_start_tx_path(struct usbnet *dev)
703 {
704         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
705         unsigned long flags;
706         u32 reg_val;
707
708         /* Enable Tx at MAC */
709         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
710         pdata->mac_cr |= MAC_CR_TXEN_;
711         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
712
713         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
714
715         /* Enable Tx at SCSRs */
716         reg_val = TX_CFG_ON_;
717         smsc95xx_write_reg(dev, TX_CFG, reg_val);
718 }
719
720 /* Starts the Receive path */
721 static void smsc95xx_start_rx_path(struct usbnet *dev)
722 {
723         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
724         unsigned long flags;
725
726         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
727         pdata->mac_cr |= MAC_CR_RXEN_;
728         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
729
730         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
731 }
732
733 static int smsc95xx_phy_initialize(struct usbnet *dev)
734 {
735         /* Initialize MII structure */
736         dev->mii.dev = dev->net;
737         dev->mii.mdio_read = smsc95xx_mdio_read;
738         dev->mii.mdio_write = smsc95xx_mdio_write;
739         dev->mii.phy_id_mask = 0x1f;
740         dev->mii.reg_num_mask = 0x1f;
741         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
742
743         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
744         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
745                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
746                 ADVERTISE_PAUSE_ASYM);
747
748         /* read to clear */
749         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
750
751         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
752                 PHY_INT_MASK_DEFAULT_);
753         mii_nway_restart(&dev->mii);
754
755         if (netif_msg_ifup(dev))
756                 devdbg(dev, "phy initialised succesfully");
757         return 0;
758 }
759
760 static int smsc95xx_reset(struct usbnet *dev)
761 {
762         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
763         struct net_device *netdev = dev->net;
764         u32 read_buf, write_buf, burst_cap;
765         int ret = 0, timeout;
766
767         if (netif_msg_ifup(dev))
768                 devdbg(dev, "entering smsc95xx_reset");
769
770         write_buf = HW_CFG_LRST_;
771         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
772         if (ret < 0) {
773                 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
774                         "register, ret = %d", ret);
775                 return ret;
776         }
777
778         timeout = 0;
779         do {
780                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
781                 if (ret < 0) {
782                         devwarn(dev, "Failed to read HW_CFG: %d", ret);
783                         return ret;
784                 }
785                 msleep(10);
786                 timeout++;
787         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
788
789         if (timeout >= 100) {
790                 devwarn(dev, "timeout waiting for completion of Lite Reset");
791                 return ret;
792         }
793
794         write_buf = PM_CTL_PHY_RST_;
795         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
796         if (ret < 0) {
797                 devwarn(dev, "Failed to write PM_CTRL: %d", ret);
798                 return ret;
799         }
800
801         timeout = 0;
802         do {
803                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
804                 if (ret < 0) {
805                         devwarn(dev, "Failed to read PM_CTRL: %d", ret);
806                         return ret;
807                 }
808                 msleep(10);
809                 timeout++;
810         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
811
812         if (timeout >= 100) {
813                 devwarn(dev, "timeout waiting for PHY Reset");
814                 return ret;
815         }
816
817         smsc95xx_init_mac_address(dev);
818
819         ret = smsc95xx_set_mac_address(dev);
820         if (ret < 0)
821                 return ret;
822
823         if (netif_msg_ifup(dev))
824                 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
825
826         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
827         if (ret < 0) {
828                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
829                 return ret;
830         }
831
832         if (netif_msg_ifup(dev))
833                 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
834
835         read_buf |= HW_CFG_BIR_;
836
837         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
838         if (ret < 0) {
839                 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
840                         "register, ret = %d", ret);
841                 return ret;
842         }
843
844         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
845         if (ret < 0) {
846                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
847                 return ret;
848         }
849         if (netif_msg_ifup(dev))
850                 devdbg(dev, "Read Value from HW_CFG after writing "
851                         "HW_CFG_BIR_: 0x%08x", read_buf);
852
853         if (!turbo_mode) {
854                 burst_cap = 0;
855                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
856         } else if (dev->udev->speed == USB_SPEED_HIGH) {
857                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
858                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
859         } else {
860                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
861                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
862         }
863
864         if (netif_msg_ifup(dev))
865                 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
866
867         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
868         if (ret < 0) {
869                 devwarn(dev, "Failed to write BURST_CAP: %d", ret);
870                 return ret;
871         }
872
873         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
874         if (ret < 0) {
875                 devwarn(dev, "Failed to read BURST_CAP: %d", ret);
876                 return ret;
877         }
878         if (netif_msg_ifup(dev))
879                 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
880                         read_buf);
881
882         read_buf = DEFAULT_BULK_IN_DELAY;
883         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
884         if (ret < 0) {
885                 devwarn(dev, "ret = %d", ret);
886                 return ret;
887         }
888
889         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
890         if (ret < 0) {
891                 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
892                 return ret;
893         }
894         if (netif_msg_ifup(dev))
895                 devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
896                         "0x%08x", read_buf);
897
898         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
899         if (ret < 0) {
900                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
901                 return ret;
902         }
903         if (netif_msg_ifup(dev))
904                 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
905
906         if (turbo_mode)
907                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
908
909         read_buf &= ~HW_CFG_RXDOFF_;
910
911         /* set Rx data offset=2, Make IP header aligns on word boundary. */
912         read_buf |= NET_IP_ALIGN << 9;
913
914         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
915         if (ret < 0) {
916                 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
917                 return ret;
918         }
919
920         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
921         if (ret < 0) {
922                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
923                 return ret;
924         }
925         if (netif_msg_ifup(dev))
926                 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
927                         read_buf);
928
929         write_buf = 0xFFFFFFFF;
930         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
931         if (ret < 0) {
932                 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
933                 return ret;
934         }
935
936         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
937         if (ret < 0) {
938                 devwarn(dev, "Failed to read ID_REV: %d", ret);
939                 return ret;
940         }
941         if (netif_msg_ifup(dev))
942                 devdbg(dev, "ID_REV = 0x%08x", read_buf);
943
944         /* Init Tx */
945         write_buf = 0;
946         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
947         if (ret < 0) {
948                 devwarn(dev, "Failed to write FLOW: %d", ret);
949                 return ret;
950         }
951
952         read_buf = AFC_CFG_DEFAULT;
953         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
954         if (ret < 0) {
955                 devwarn(dev, "Failed to write AFC_CFG: %d", ret);
956                 return ret;
957         }
958
959         /* Don't need mac_cr_lock during initialisation */
960         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
961         if (ret < 0) {
962                 devwarn(dev, "Failed to read MAC_CR: %d", ret);
963                 return ret;
964         }
965
966         /* Init Rx */
967         /* Set Vlan */
968         write_buf = (u32)ETH_P_8021Q;
969         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
970         if (ret < 0) {
971                 devwarn(dev, "Failed to write VAN1: %d", ret);
972                 return ret;
973         }
974
975         /* Enable or disable checksum offload engines */
976         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
977         ret = smsc95xx_set_csums(dev);
978         if (ret < 0) {
979                 devwarn(dev, "Failed to set csum offload: %d", ret);
980                 return ret;
981         }
982
983         smsc95xx_set_multicast(dev->net);
984
985         if (smsc95xx_phy_initialize(dev) < 0)
986                 return -EIO;
987
988         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
989         if (ret < 0) {
990                 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
991                 return ret;
992         }
993
994         /* enable PHY interrupts */
995         read_buf |= INT_EP_CTL_PHY_INT_;
996
997         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
998         if (ret < 0) {
999                 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
1000                 return ret;
1001         }
1002
1003         smsc95xx_start_tx_path(dev);
1004         smsc95xx_start_rx_path(dev);
1005
1006         if (netif_msg_ifup(dev))
1007                 devdbg(dev, "smsc95xx_reset, return 0");
1008         return 0;
1009 }
1010
1011 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1012 {
1013         struct smsc95xx_priv *pdata = NULL;
1014         int ret;
1015
1016         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1017
1018         ret = usbnet_get_endpoints(dev, intf);
1019         if (ret < 0) {
1020                 devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
1021                 return ret;
1022         }
1023
1024         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1025                 GFP_KERNEL);
1026
1027         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1028         if (!pdata) {
1029                 devwarn(dev, "Unable to allocate struct smsc95xx_priv");
1030                 return -ENOMEM;
1031         }
1032
1033         spin_lock_init(&pdata->mac_cr_lock);
1034
1035         pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1036         pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1037
1038         /* Init all registers */
1039         ret = smsc95xx_reset(dev);
1040
1041         dev->net->do_ioctl = smsc95xx_ioctl;
1042         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1043         dev->net->set_multicast_list = smsc95xx_set_multicast;
1044         dev->net->flags |= IFF_MULTICAST;
1045         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1046         return 0;
1047 }
1048
1049 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1050 {
1051         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1052         if (pdata) {
1053                 if (netif_msg_ifdown(dev))
1054                         devdbg(dev, "free pdata");
1055                 kfree(pdata);
1056                 pdata = NULL;
1057                 dev->data[0] = 0;
1058         }
1059 }
1060
1061 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1062 {
1063         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1064         skb->ip_summed = CHECKSUM_COMPLETE;
1065         skb_trim(skb, skb->len - 2);
1066 }
1067
1068 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1069 {
1070         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1071
1072         while (skb->len > 0) {
1073                 u32 header, align_count;
1074                 struct sk_buff *ax_skb;
1075                 unsigned char *packet;
1076                 u16 size;
1077
1078                 memcpy(&header, skb->data, sizeof(header));
1079                 le32_to_cpus(&header);
1080                 skb_pull(skb, 4 + NET_IP_ALIGN);
1081                 packet = skb->data;
1082
1083                 /* get the packet length */
1084                 size = (u16)((header & RX_STS_FL_) >> 16);
1085                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1086
1087                 if (unlikely(header & RX_STS_ES_)) {
1088                         if (netif_msg_rx_err(dev))
1089                                 devdbg(dev, "Error header=0x%08x", header);
1090                         dev->stats.rx_errors++;
1091                         dev->stats.rx_dropped++;
1092
1093                         if (header & RX_STS_CRC_) {
1094                                 dev->stats.rx_crc_errors++;
1095                         } else {
1096                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1097                                         dev->stats.rx_frame_errors++;
1098
1099                                 if ((header & RX_STS_LE_) &&
1100                                         (!(header & RX_STS_FT_)))
1101                                         dev->stats.rx_length_errors++;
1102                         }
1103                 } else {
1104                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1105                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1106                                 if (netif_msg_rx_err(dev))
1107                                         devdbg(dev, "size err header=0x%08x",
1108                                                 header);
1109                                 return 0;
1110                         }
1111
1112                         /* last frame in this batch */
1113                         if (skb->len == size) {
1114                                 if (pdata->use_rx_csum)
1115                                         smsc95xx_rx_csum_offload(skb);
1116
1117                                 skb->truesize = size + sizeof(struct sk_buff);
1118
1119                                 return 1;
1120                         }
1121
1122                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1123                         if (unlikely(!ax_skb)) {
1124                                 devwarn(dev, "Error allocating skb");
1125                                 return 0;
1126                         }
1127
1128                         ax_skb->len = size;
1129                         ax_skb->data = packet;
1130                         skb_set_tail_pointer(ax_skb, size);
1131
1132                         if (pdata->use_rx_csum)
1133                                 smsc95xx_rx_csum_offload(ax_skb);
1134
1135                         ax_skb->truesize = size + sizeof(struct sk_buff);
1136
1137                         usbnet_skb_return(dev, ax_skb);
1138                 }
1139
1140                 skb_pull(skb, size);
1141
1142                 /* padding bytes before the next frame starts */
1143                 if (skb->len)
1144                         skb_pull(skb, align_count);
1145         }
1146
1147         if (unlikely(skb->len < 0)) {
1148                 devwarn(dev, "invalid rx length<0 %d", skb->len);
1149                 return 0;
1150         }
1151
1152         return 1;
1153 }
1154
1155 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1156 {
1157         int len = skb->data - skb->head;
1158         u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1159         u16 low_16 = (u16)(skb->csum_start - len);
1160         return (high_16 << 16) | low_16;
1161 }
1162
1163 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1164                                          struct sk_buff *skb, gfp_t flags)
1165 {
1166         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1167         bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1168         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1169         u32 tx_cmd_a, tx_cmd_b;
1170
1171         /* We do not advertise SG, so skbs should be already linearized */
1172         BUG_ON(skb_shinfo(skb)->nr_frags);
1173
1174         if (skb_headroom(skb) < overhead) {
1175                 struct sk_buff *skb2 = skb_copy_expand(skb,
1176                         overhead, 0, flags);
1177                 dev_kfree_skb_any(skb);
1178                 skb = skb2;
1179                 if (!skb)
1180                         return NULL;
1181         }
1182
1183         if (csum) {
1184                 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1185                 skb_push(skb, 4);
1186                 memcpy(skb->data, &csum_preamble, 4);
1187         }
1188
1189         skb_push(skb, 4);
1190         tx_cmd_b = (u32)(skb->len - 4);
1191         if (csum)
1192                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1193         cpu_to_le32s(&tx_cmd_b);
1194         memcpy(skb->data, &tx_cmd_b, 4);
1195
1196         skb_push(skb, 4);
1197         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1198                 TX_CMD_A_LAST_SEG_;
1199         cpu_to_le32s(&tx_cmd_a);
1200         memcpy(skb->data, &tx_cmd_a, 4);
1201
1202         return skb;
1203 }
1204
1205 static const struct driver_info smsc95xx_info = {
1206         .description    = "smsc95xx USB 2.0 Ethernet",
1207         .bind           = smsc95xx_bind,
1208         .unbind         = smsc95xx_unbind,
1209         .link_reset     = smsc95xx_link_reset,
1210         .reset          = smsc95xx_reset,
1211         .rx_fixup       = smsc95xx_rx_fixup,
1212         .tx_fixup       = smsc95xx_tx_fixup,
1213         .status         = smsc95xx_status,
1214         .flags          = FLAG_ETHER,
1215 };
1216
1217 static const struct usb_device_id products[] = {
1218         {
1219                 /* SMSC9500 USB Ethernet Device */
1220                 USB_DEVICE(0x0424, 0x9500),
1221                 .driver_info = (unsigned long) &smsc95xx_info,
1222         },
1223         { },            /* END */
1224 };
1225 MODULE_DEVICE_TABLE(usb, products);
1226
1227 static struct usb_driver smsc95xx_driver = {
1228         .name           = "smsc95xx",
1229         .id_table       = products,
1230         .probe          = usbnet_probe,
1231         .suspend        = usbnet_suspend,
1232         .resume         = usbnet_resume,
1233         .disconnect     = usbnet_disconnect,
1234 };
1235
1236 static int __init smsc95xx_init(void)
1237 {
1238         return usb_register(&smsc95xx_driver);
1239 }
1240 module_init(smsc95xx_init);
1241
1242 static void __exit smsc95xx_exit(void)
1243 {
1244         usb_deregister(&smsc95xx_driver);
1245 }
1246 module_exit(smsc95xx_exit);
1247
1248 MODULE_AUTHOR("Nancy Lin");
1249 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1250 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1251 MODULE_LICENSE("GPL");