NULL noise in drivers/net
[linux-2.6.git] / drivers / net / sunhme.c
1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
2  *           auto carrier detecting ethernet driver.  Also known as the
3  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
4  *
5  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
6                  2006 David S. Miller (davem@davemloft.net)
7  *
8  * Changes :
9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10  *   - port to non-sparc architectures. Tested only on x86 and
11  *     only currently works with QFE PCI cards.
12  *   - ability to specify the MAC address at module load time by passing this
13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
14  */
15
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/fcntl.h>
20 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ethtool.h>
28 #include <linux/mii.h>
29 #include <linux/crc32.h>
30 #include <linux/random.h>
31 #include <linux/errno.h>
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <linux/mm.h>
36 #include <linux/bitops.h>
37
38 #include <asm/system.h>
39 #include <asm/io.h>
40 #include <asm/dma.h>
41 #include <asm/byteorder.h>
42
43 #ifdef CONFIG_SPARC
44 #include <asm/idprom.h>
45 #include <asm/sbus.h>
46 #include <asm/openprom.h>
47 #include <asm/oplib.h>
48 #include <asm/prom.h>
49 #include <asm/auxio.h>
50 #endif
51 #include <asm/uaccess.h>
52
53 #include <asm/pgtable.h>
54 #include <asm/irq.h>
55
56 #ifdef CONFIG_PCI
57 #include <linux/pci.h>
58 #endif
59
60 #include "sunhme.h"
61
62 #define DRV_NAME        "sunhme"
63 #define DRV_VERSION     "3.00"
64 #define DRV_RELDATE     "June 23, 2006"
65 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
66
67 static char version[] =
68         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
69
70 MODULE_VERSION(DRV_VERSION);
71 MODULE_AUTHOR(DRV_AUTHOR);
72 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
73 MODULE_LICENSE("GPL");
74
75 static int macaddr[6];
76
77 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
78 module_param_array(macaddr, int, NULL, 0);
79 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
80
81 #ifdef CONFIG_SBUS
82 static struct quattro *qfe_sbus_list;
83 #endif
84
85 #ifdef CONFIG_PCI
86 static struct quattro *qfe_pci_list;
87 #endif
88
89 #undef HMEDEBUG
90 #undef SXDEBUG
91 #undef RXDEBUG
92 #undef TXDEBUG
93 #undef TXLOGGING
94
95 #ifdef TXLOGGING
96 struct hme_tx_logent {
97         unsigned int tstamp;
98         int tx_new, tx_old;
99         unsigned int action;
100 #define TXLOG_ACTION_IRQ        0x01
101 #define TXLOG_ACTION_TXMIT      0x02
102 #define TXLOG_ACTION_TBUSY      0x04
103 #define TXLOG_ACTION_NBUFS      0x08
104         unsigned int status;
105 };
106 #define TX_LOG_LEN      128
107 static struct hme_tx_logent tx_log[TX_LOG_LEN];
108 static int txlog_cur_entry;
109 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
110 {
111         struct hme_tx_logent *tlp;
112         unsigned long flags;
113
114         save_and_cli(flags);
115         tlp = &tx_log[txlog_cur_entry];
116         tlp->tstamp = (unsigned int)jiffies;
117         tlp->tx_new = hp->tx_new;
118         tlp->tx_old = hp->tx_old;
119         tlp->action = a;
120         tlp->status = s;
121         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
122         restore_flags(flags);
123 }
124 static __inline__ void tx_dump_log(void)
125 {
126         int i, this;
127
128         this = txlog_cur_entry;
129         for (i = 0; i < TX_LOG_LEN; i++) {
130                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
131                        tx_log[this].tstamp,
132                        tx_log[this].tx_new, tx_log[this].tx_old,
133                        tx_log[this].action, tx_log[this].status);
134                 this = (this + 1) & (TX_LOG_LEN - 1);
135         }
136 }
137 static __inline__ void tx_dump_ring(struct happy_meal *hp)
138 {
139         struct hmeal_init_block *hb = hp->happy_block;
140         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
141         int i;
142
143         for (i = 0; i < TX_RING_SIZE; i+=4) {
144                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
145                        i, i + 4,
146                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
147                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
148                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
149                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
150         }
151 }
152 #else
153 #define tx_add_log(hp, a, s)            do { } while(0)
154 #define tx_dump_log()                   do { } while(0)
155 #define tx_dump_ring(hp)                do { } while(0)
156 #endif
157
158 #ifdef HMEDEBUG
159 #define HMD(x)  printk x
160 #else
161 #define HMD(x)
162 #endif
163
164 /* #define AUTO_SWITCH_DEBUG */
165
166 #ifdef AUTO_SWITCH_DEBUG
167 #define ASD(x)  printk x
168 #else
169 #define ASD(x)
170 #endif
171
172 #define DEFAULT_IPG0      16 /* For lance-mode only */
173 #define DEFAULT_IPG1       8 /* For all modes */
174 #define DEFAULT_IPG2       4 /* For all modes */
175 #define DEFAULT_JAMSIZE    4 /* Toe jam */
176
177 /* NOTE: In the descriptor writes one _must_ write the address
178  *       member _first_.  The card must not be allowed to see
179  *       the updated descriptor flags until the address is
180  *       correct.  I've added a write memory barrier between
181  *       the two stores so that I can sleep well at night... -DaveM
182  */
183
184 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
185 static void sbus_hme_write32(void __iomem *reg, u32 val)
186 {
187         sbus_writel(val, reg);
188 }
189
190 static u32 sbus_hme_read32(void __iomem *reg)
191 {
192         return sbus_readl(reg);
193 }
194
195 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
196 {
197         rxd->rx_addr = (__force hme32)addr;
198         wmb();
199         rxd->rx_flags = (__force hme32)flags;
200 }
201
202 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
203 {
204         txd->tx_addr = (__force hme32)addr;
205         wmb();
206         txd->tx_flags = (__force hme32)flags;
207 }
208
209 static u32 sbus_hme_read_desc32(hme32 *p)
210 {
211         return (__force u32)*p;
212 }
213
214 static void pci_hme_write32(void __iomem *reg, u32 val)
215 {
216         writel(val, reg);
217 }
218
219 static u32 pci_hme_read32(void __iomem *reg)
220 {
221         return readl(reg);
222 }
223
224 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
225 {
226         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
227         wmb();
228         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
229 }
230
231 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
232 {
233         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
234         wmb();
235         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
236 }
237
238 static u32 pci_hme_read_desc32(hme32 *p)
239 {
240         return le32_to_cpup((__le32 *)p);
241 }
242
243 #define hme_write32(__hp, __reg, __val) \
244         ((__hp)->write32((__reg), (__val)))
245 #define hme_read32(__hp, __reg) \
246         ((__hp)->read32(__reg))
247 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
248         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
249 #define hme_write_txd(__hp, __txd, __flags, __addr) \
250         ((__hp)->write_txd((__txd), (__flags), (__addr)))
251 #define hme_read_desc32(__hp, __p) \
252         ((__hp)->read_desc32(__p))
253 #define hme_dma_map(__hp, __ptr, __size, __dir) \
254         ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
255 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
256         ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
257 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
258         ((__hp)->dma_sync_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir)))
259 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
260         ((__hp)->dma_sync_for_device((__hp)->happy_dev, (__addr), (__size), (__dir)))
261 #else
262 #ifdef CONFIG_SBUS
263 /* SBUS only compilation */
264 #define hme_write32(__hp, __reg, __val) \
265         sbus_writel((__val), (__reg))
266 #define hme_read32(__hp, __reg) \
267         sbus_readl(__reg)
268 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
269 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
270         wmb(); \
271         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
272 } while(0)
273 #define hme_write_txd(__hp, __txd, __flags, __addr) \
274 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
275         wmb(); \
276         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
277 } while(0)
278 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
279 #define hme_dma_map(__hp, __ptr, __size, __dir) \
280         sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
281 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
282         sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
283 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
284         sbus_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
285 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
286         sbus_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
287 #else
288 /* PCI only compilation */
289 #define hme_write32(__hp, __reg, __val) \
290         writel((__val), (__reg))
291 #define hme_read32(__hp, __reg) \
292         readl(__reg)
293 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
294 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
295         wmb(); \
296         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
297 } while(0)
298 #define hme_write_txd(__hp, __txd, __flags, __addr) \
299 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
300         wmb(); \
301         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
302 } while(0)
303 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
304 {
305         return le32_to_cpup((__le32 *)p);
306 }
307 #define hme_dma_map(__hp, __ptr, __size, __dir) \
308         pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
309 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
310         pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
311 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
312         pci_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
313 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
314         pci_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
315 #endif
316 #endif
317
318
319 #ifdef SBUS_DMA_BIDIRECTIONAL
320 #       define DMA_BIDIRECTIONAL        SBUS_DMA_BIDIRECTIONAL
321 #else
322 #       define DMA_BIDIRECTIONAL        0
323 #endif
324
325 #ifdef SBUS_DMA_FROMDEVICE
326 #       define DMA_FROMDEVICE           SBUS_DMA_FROMDEVICE
327 #else
328 #       define DMA_TODEVICE             1
329 #endif
330
331 #ifdef SBUS_DMA_TODEVICE
332 #       define DMA_TODEVICE             SBUS_DMA_TODEVICE
333 #else
334 #       define DMA_FROMDEVICE           2
335 #endif
336
337
338 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
339 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
340 {
341         hme_write32(hp, tregs + TCVR_BBDATA, bit);
342         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
343         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
344 }
345
346 #if 0
347 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
348 {
349         u32 ret;
350
351         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
352         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
353         ret = hme_read32(hp, tregs + TCVR_CFG);
354         if (internal)
355                 ret &= TCV_CFG_MDIO0;
356         else
357                 ret &= TCV_CFG_MDIO1;
358
359         return ret;
360 }
361 #endif
362
363 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
364 {
365         u32 retval;
366
367         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
368         udelay(1);
369         retval = hme_read32(hp, tregs + TCVR_CFG);
370         if (internal)
371                 retval &= TCV_CFG_MDIO0;
372         else
373                 retval &= TCV_CFG_MDIO1;
374         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
375
376         return retval;
377 }
378
379 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
380
381 static int happy_meal_bb_read(struct happy_meal *hp,
382                               void __iomem *tregs, int reg)
383 {
384         u32 tmp;
385         int retval = 0;
386         int i;
387
388         ASD(("happy_meal_bb_read: reg=%d ", reg));
389
390         /* Enable the MIF BitBang outputs. */
391         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
392
393         /* Force BitBang into the idle state. */
394         for (i = 0; i < 32; i++)
395                 BB_PUT_BIT(hp, tregs, 1);
396
397         /* Give it the read sequence. */
398         BB_PUT_BIT(hp, tregs, 0);
399         BB_PUT_BIT(hp, tregs, 1);
400         BB_PUT_BIT(hp, tregs, 1);
401         BB_PUT_BIT(hp, tregs, 0);
402
403         /* Give it the PHY address. */
404         tmp = hp->paddr & 0xff;
405         for (i = 4; i >= 0; i--)
406                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
407
408         /* Tell it what register we want to read. */
409         tmp = (reg & 0xff);
410         for (i = 4; i >= 0; i--)
411                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
412
413         /* Close down the MIF BitBang outputs. */
414         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
415
416         /* Now read in the value. */
417         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
418         for (i = 15; i >= 0; i--)
419                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
420         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
421         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
422         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
423         ASD(("value=%x\n", retval));
424         return retval;
425 }
426
427 static void happy_meal_bb_write(struct happy_meal *hp,
428                                 void __iomem *tregs, int reg,
429                                 unsigned short value)
430 {
431         u32 tmp;
432         int i;
433
434         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
435
436         /* Enable the MIF BitBang outputs. */
437         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
438
439         /* Force BitBang into the idle state. */
440         for (i = 0; i < 32; i++)
441                 BB_PUT_BIT(hp, tregs, 1);
442
443         /* Give it write sequence. */
444         BB_PUT_BIT(hp, tregs, 0);
445         BB_PUT_BIT(hp, tregs, 1);
446         BB_PUT_BIT(hp, tregs, 0);
447         BB_PUT_BIT(hp, tregs, 1);
448
449         /* Give it the PHY address. */
450         tmp = (hp->paddr & 0xff);
451         for (i = 4; i >= 0; i--)
452                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
453
454         /* Tell it what register we will be writing. */
455         tmp = (reg & 0xff);
456         for (i = 4; i >= 0; i--)
457                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
458
459         /* Tell it to become ready for the bits. */
460         BB_PUT_BIT(hp, tregs, 1);
461         BB_PUT_BIT(hp, tregs, 0);
462
463         for (i = 15; i >= 0; i--)
464                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
465
466         /* Close down the MIF BitBang outputs. */
467         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
468 }
469
470 #define TCVR_READ_TRIES   16
471
472 static int happy_meal_tcvr_read(struct happy_meal *hp,
473                                 void __iomem *tregs, int reg)
474 {
475         int tries = TCVR_READ_TRIES;
476         int retval;
477
478         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
479         if (hp->tcvr_type == none) {
480                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
481                 return TCVR_FAILURE;
482         }
483
484         if (!(hp->happy_flags & HFLAG_FENABLE)) {
485                 ASD(("doing bit bang\n"));
486                 return happy_meal_bb_read(hp, tregs, reg);
487         }
488
489         hme_write32(hp, tregs + TCVR_FRAME,
490                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
491         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
492                 udelay(20);
493         if (!tries) {
494                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
495                 return TCVR_FAILURE;
496         }
497         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
498         ASD(("value=%04x\n", retval));
499         return retval;
500 }
501
502 #define TCVR_WRITE_TRIES  16
503
504 static void happy_meal_tcvr_write(struct happy_meal *hp,
505                                   void __iomem *tregs, int reg,
506                                   unsigned short value)
507 {
508         int tries = TCVR_WRITE_TRIES;
509
510         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
511
512         /* Welcome to Sun Microsystems, can I take your order please? */
513         if (!(hp->happy_flags & HFLAG_FENABLE)) {
514                 happy_meal_bb_write(hp, tregs, reg, value);
515                 return;
516         }
517
518         /* Would you like fries with that? */
519         hme_write32(hp, tregs + TCVR_FRAME,
520                     (FRAME_WRITE | (hp->paddr << 23) |
521                      ((reg & 0xff) << 18) | (value & 0xffff)));
522         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
523                 udelay(20);
524
525         /* Anything else? */
526         if (!tries)
527                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
528
529         /* Fifty-two cents is your change, have a nice day. */
530 }
531
532 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
533  * that keeps watching the auto negotiation process as it progresses.
534  * The DP83840 is first told to start doing it's thing, we set up the time
535  * and place the timer state machine in it's initial state.
536  *
537  * Here the timer peeks at the DP83840 status registers at each click to see
538  * if the auto negotiation has completed, we assume here that the DP83840 PHY
539  * will time out at some point and just tell us what (didn't) happen.  For
540  * complete coverage we only allow so many of the ticks at this level to run,
541  * when this has expired we print a warning message and try another strategy.
542  * This "other" strategy is to force the interface into various speed/duplex
543  * configurations and we stop when we see a link-up condition before the
544  * maximum number of "peek" ticks have occurred.
545  *
546  * Once a valid link status has been detected we configure the BigMAC and
547  * the rest of the Happy Meal to speak the most efficient protocol we could
548  * get a clean link for.  The priority for link configurations, highest first
549  * is:
550  *                 100 Base-T Full Duplex
551  *                 100 Base-T Half Duplex
552  *                 10 Base-T Full Duplex
553  *                 10 Base-T Half Duplex
554  *
555  * We start a new timer now, after a successful auto negotiation status has
556  * been detected.  This timer just waits for the link-up bit to get set in
557  * the BMCR of the DP83840.  When this occurs we print a kernel log message
558  * describing the link type in use and the fact that it is up.
559  *
560  * If a fatal error of some sort is signalled and detected in the interrupt
561  * service routine, and the chip is reset, or the link is ifconfig'd down
562  * and then back up, this entire process repeats itself all over again.
563  */
564 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
565 {
566         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
567
568         /* Downgrade from full to half duplex.  Only possible
569          * via ethtool.
570          */
571         if (hp->sw_bmcr & BMCR_FULLDPLX) {
572                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
573                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
574                 return 0;
575         }
576
577         /* Downgrade from 100 to 10. */
578         if (hp->sw_bmcr & BMCR_SPEED100) {
579                 hp->sw_bmcr &= ~(BMCR_SPEED100);
580                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
581                 return 0;
582         }
583
584         /* We've tried everything. */
585         return -1;
586 }
587
588 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
589 {
590         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
591         if (hp->tcvr_type == external)
592                 printk("external ");
593         else
594                 printk("internal ");
595         printk("transceiver at ");
596         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
597         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
598                 if (hp->sw_lpa & LPA_100FULL)
599                         printk("100Mb/s, Full Duplex.\n");
600                 else
601                         printk("100Mb/s, Half Duplex.\n");
602         } else {
603                 if (hp->sw_lpa & LPA_10FULL)
604                         printk("10Mb/s, Full Duplex.\n");
605                 else
606                         printk("10Mb/s, Half Duplex.\n");
607         }
608 }
609
610 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
611 {
612         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
613         if (hp->tcvr_type == external)
614                 printk("external ");
615         else
616                 printk("internal ");
617         printk("transceiver at ");
618         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
619         if (hp->sw_bmcr & BMCR_SPEED100)
620                 printk("100Mb/s, ");
621         else
622                 printk("10Mb/s, ");
623         if (hp->sw_bmcr & BMCR_FULLDPLX)
624                 printk("Full Duplex.\n");
625         else
626                 printk("Half Duplex.\n");
627 }
628
629 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
630 {
631         int full;
632
633         /* All we care about is making sure the bigmac tx_cfg has a
634          * proper duplex setting.
635          */
636         if (hp->timer_state == arbwait) {
637                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
638                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
639                         goto no_response;
640                 if (hp->sw_lpa & LPA_100FULL)
641                         full = 1;
642                 else if (hp->sw_lpa & LPA_100HALF)
643                         full = 0;
644                 else if (hp->sw_lpa & LPA_10FULL)
645                         full = 1;
646                 else
647                         full = 0;
648         } else {
649                 /* Forcing a link mode. */
650                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
651                 if (hp->sw_bmcr & BMCR_FULLDPLX)
652                         full = 1;
653                 else
654                         full = 0;
655         }
656
657         /* Before changing other bits in the tx_cfg register, and in
658          * general any of other the TX config registers too, you
659          * must:
660          * 1) Clear Enable
661          * 2) Poll with reads until that bit reads back as zero
662          * 3) Make TX configuration changes
663          * 4) Set Enable once more
664          */
665         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
666                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
667                     ~(BIGMAC_TXCFG_ENABLE));
668         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
669                 barrier();
670         if (full) {
671                 hp->happy_flags |= HFLAG_FULL;
672                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
673                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
674                             BIGMAC_TXCFG_FULLDPLX);
675         } else {
676                 hp->happy_flags &= ~(HFLAG_FULL);
677                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
678                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
679                             ~(BIGMAC_TXCFG_FULLDPLX));
680         }
681         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
682                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
683                     BIGMAC_TXCFG_ENABLE);
684         return 0;
685 no_response:
686         return 1;
687 }
688
689 static int happy_meal_init(struct happy_meal *hp);
690
691 static int is_lucent_phy(struct happy_meal *hp)
692 {
693         void __iomem *tregs = hp->tcvregs;
694         unsigned short mr2, mr3;
695         int ret = 0;
696
697         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
698         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
699         if ((mr2 & 0xffff) == 0x0180 &&
700             ((mr3 & 0xffff) >> 10) == 0x1d)
701                 ret = 1;
702
703         return ret;
704 }
705
706 static void happy_meal_timer(unsigned long data)
707 {
708         struct happy_meal *hp = (struct happy_meal *) data;
709         void __iomem *tregs = hp->tcvregs;
710         int restart_timer = 0;
711
712         spin_lock_irq(&hp->happy_lock);
713
714         hp->timer_ticks++;
715         switch(hp->timer_state) {
716         case arbwait:
717                 /* Only allow for 5 ticks, thats 10 seconds and much too
718                  * long to wait for arbitration to complete.
719                  */
720                 if (hp->timer_ticks >= 10) {
721                         /* Enter force mode. */
722         do_force_mode:
723                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
724                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
725                                hp->dev->name);
726                         hp->sw_bmcr = BMCR_SPEED100;
727                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
728
729                         if (!is_lucent_phy(hp)) {
730                                 /* OK, seems we need do disable the transceiver for the first
731                                  * tick to make sure we get an accurate link state at the
732                                  * second tick.
733                                  */
734                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
735                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
736                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
737                         }
738                         hp->timer_state = ltrywait;
739                         hp->timer_ticks = 0;
740                         restart_timer = 1;
741                 } else {
742                         /* Anything interesting happen? */
743                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
744                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
745                                 int ret;
746
747                                 /* Just what we've been waiting for... */
748                                 ret = set_happy_link_modes(hp, tregs);
749                                 if (ret) {
750                                         /* Ooops, something bad happened, go to force
751                                          * mode.
752                                          *
753                                          * XXX Broken hubs which don't support 802.3u
754                                          * XXX auto-negotiation make this happen as well.
755                                          */
756                                         goto do_force_mode;
757                                 }
758
759                                 /* Success, at least so far, advance our state engine. */
760                                 hp->timer_state = lupwait;
761                                 restart_timer = 1;
762                         } else {
763                                 restart_timer = 1;
764                         }
765                 }
766                 break;
767
768         case lupwait:
769                 /* Auto negotiation was successful and we are awaiting a
770                  * link up status.  I have decided to let this timer run
771                  * forever until some sort of error is signalled, reporting
772                  * a message to the user at 10 second intervals.
773                  */
774                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
775                 if (hp->sw_bmsr & BMSR_LSTATUS) {
776                         /* Wheee, it's up, display the link mode in use and put
777                          * the timer to sleep.
778                          */
779                         display_link_mode(hp, tregs);
780                         hp->timer_state = asleep;
781                         restart_timer = 0;
782                 } else {
783                         if (hp->timer_ticks >= 10) {
784                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
785                                        "not completely up.\n", hp->dev->name);
786                                 hp->timer_ticks = 0;
787                                 restart_timer = 1;
788                         } else {
789                                 restart_timer = 1;
790                         }
791                 }
792                 break;
793
794         case ltrywait:
795                 /* Making the timeout here too long can make it take
796                  * annoyingly long to attempt all of the link mode
797                  * permutations, but then again this is essentially
798                  * error recovery code for the most part.
799                  */
800                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
801                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
802                 if (hp->timer_ticks == 1) {
803                         if (!is_lucent_phy(hp)) {
804                                 /* Re-enable transceiver, we'll re-enable the transceiver next
805                                  * tick, then check link state on the following tick.
806                                  */
807                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
808                                 happy_meal_tcvr_write(hp, tregs,
809                                                       DP83840_CSCONFIG, hp->sw_csconfig);
810                         }
811                         restart_timer = 1;
812                         break;
813                 }
814                 if (hp->timer_ticks == 2) {
815                         if (!is_lucent_phy(hp)) {
816                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
817                                 happy_meal_tcvr_write(hp, tregs,
818                                                       DP83840_CSCONFIG, hp->sw_csconfig);
819                         }
820                         restart_timer = 1;
821                         break;
822                 }
823                 if (hp->sw_bmsr & BMSR_LSTATUS) {
824                         /* Force mode selection success. */
825                         display_forced_link_mode(hp, tregs);
826                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
827                         hp->timer_state = asleep;
828                         restart_timer = 0;
829                 } else {
830                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
831                                 int ret;
832
833                                 ret = try_next_permutation(hp, tregs);
834                                 if (ret == -1) {
835                                         /* Aieee, tried them all, reset the
836                                          * chip and try all over again.
837                                          */
838
839                                         /* Let the user know... */
840                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
841                                                hp->dev->name);
842
843                                         ret = happy_meal_init(hp);
844                                         if (ret) {
845                                                 /* ho hum... */
846                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
847                                                        "Happy Meal.\n", hp->dev->name);
848                                         }
849                                         goto out;
850                                 }
851                                 if (!is_lucent_phy(hp)) {
852                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
853                                                                                DP83840_CSCONFIG);
854                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
855                                         happy_meal_tcvr_write(hp, tregs,
856                                                               DP83840_CSCONFIG, hp->sw_csconfig);
857                                 }
858                                 hp->timer_ticks = 0;
859                                 restart_timer = 1;
860                         } else {
861                                 restart_timer = 1;
862                         }
863                 }
864                 break;
865
866         case asleep:
867         default:
868                 /* Can't happens.... */
869                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
870                        hp->dev->name);
871                 restart_timer = 0;
872                 hp->timer_ticks = 0;
873                 hp->timer_state = asleep; /* foo on you */
874                 break;
875         };
876
877         if (restart_timer) {
878                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
879                 add_timer(&hp->happy_timer);
880         }
881
882 out:
883         spin_unlock_irq(&hp->happy_lock);
884 }
885
886 #define TX_RESET_TRIES     32
887 #define RX_RESET_TRIES     32
888
889 /* hp->happy_lock must be held */
890 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
891 {
892         int tries = TX_RESET_TRIES;
893
894         HMD(("happy_meal_tx_reset: reset, "));
895
896         /* Would you like to try our SMCC Delux? */
897         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
898         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
899                 udelay(20);
900
901         /* Lettuce, tomato, buggy hardware (no extra charge)? */
902         if (!tries)
903                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
904
905         /* Take care. */
906         HMD(("done\n"));
907 }
908
909 /* hp->happy_lock must be held */
910 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
911 {
912         int tries = RX_RESET_TRIES;
913
914         HMD(("happy_meal_rx_reset: reset, "));
915
916         /* We have a special on GNU/Viking hardware bugs today. */
917         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
918         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
919                 udelay(20);
920
921         /* Will that be all? */
922         if (!tries)
923                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
924
925         /* Don't forget your vik_1137125_wa.  Have a nice day. */
926         HMD(("done\n"));
927 }
928
929 #define STOP_TRIES         16
930
931 /* hp->happy_lock must be held */
932 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
933 {
934         int tries = STOP_TRIES;
935
936         HMD(("happy_meal_stop: reset, "));
937
938         /* We're consolidating our STB products, it's your lucky day. */
939         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
940         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
941                 udelay(20);
942
943         /* Come back next week when we are "Sun Microelectronics". */
944         if (!tries)
945                 printk(KERN_ERR "happy meal: Fry guys.");
946
947         /* Remember: "Different name, same old buggy as shit hardware." */
948         HMD(("done\n"));
949 }
950
951 /* hp->happy_lock must be held */
952 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
953 {
954         struct net_device_stats *stats = &hp->net_stats;
955
956         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
957         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
958
959         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
960         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
961
962         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
963         hme_write32(hp, bregs + BMAC_GLECTR, 0);
964
965         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
966
967         stats->collisions +=
968                 (hme_read32(hp, bregs + BMAC_EXCTR) +
969                  hme_read32(hp, bregs + BMAC_LTCTR));
970         hme_write32(hp, bregs + BMAC_EXCTR, 0);
971         hme_write32(hp, bregs + BMAC_LTCTR, 0);
972 }
973
974 /* hp->happy_lock must be held */
975 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
976 {
977         ASD(("happy_meal_poll_stop: "));
978
979         /* If polling disabled or not polling already, nothing to do. */
980         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
981            (HFLAG_POLLENABLE | HFLAG_POLL)) {
982                 HMD(("not polling, return\n"));
983                 return;
984         }
985
986         /* Shut up the MIF. */
987         ASD(("were polling, mif ints off, "));
988         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
989
990         /* Turn off polling. */
991         ASD(("polling off, "));
992         hme_write32(hp, tregs + TCVR_CFG,
993                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
994
995         /* We are no longer polling. */
996         hp->happy_flags &= ~(HFLAG_POLL);
997
998         /* Let the bits set. */
999         udelay(200);
1000         ASD(("done\n"));
1001 }
1002
1003 /* Only Sun can take such nice parts and fuck up the programming interface
1004  * like this.  Good job guys...
1005  */
1006 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
1007 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
1008
1009 /* hp->happy_lock must be held */
1010 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
1011 {
1012         u32 tconfig;
1013         int result, tries = TCVR_RESET_TRIES;
1014
1015         tconfig = hme_read32(hp, tregs + TCVR_CFG);
1016         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1017         if (hp->tcvr_type == external) {
1018                 ASD(("external<"));
1019                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1020                 hp->tcvr_type = internal;
1021                 hp->paddr = TCV_PADDR_ITX;
1022                 ASD(("ISOLATE,"));
1023                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1024                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1025                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1026                 if (result == TCVR_FAILURE) {
1027                         ASD(("phyread_fail>\n"));
1028                         return -1;
1029                 }
1030                 ASD(("phyread_ok,PSELECT>"));
1031                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1032                 hp->tcvr_type = external;
1033                 hp->paddr = TCV_PADDR_ETX;
1034         } else {
1035                 if (tconfig & TCV_CFG_MDIO1) {
1036                         ASD(("internal<PSELECT,"));
1037                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1038                         ASD(("ISOLATE,"));
1039                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1040                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1041                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1042                         if (result == TCVR_FAILURE) {
1043                                 ASD(("phyread_fail>\n"));
1044                                 return -1;
1045                         }
1046                         ASD(("phyread_ok,~PSELECT>"));
1047                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1048                         hp->tcvr_type = internal;
1049                         hp->paddr = TCV_PADDR_ITX;
1050                 }
1051         }
1052
1053         ASD(("BMCR_RESET "));
1054         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1055
1056         while (--tries) {
1057                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1058                 if (result == TCVR_FAILURE)
1059                         return -1;
1060                 hp->sw_bmcr = result;
1061                 if (!(result & BMCR_RESET))
1062                         break;
1063                 udelay(20);
1064         }
1065         if (!tries) {
1066                 ASD(("BMCR RESET FAILED!\n"));
1067                 return -1;
1068         }
1069         ASD(("RESET_OK\n"));
1070
1071         /* Get fresh copies of the PHY registers. */
1072         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1073         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1074         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1075         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1076
1077         ASD(("UNISOLATE"));
1078         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1079         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1080
1081         tries = TCVR_UNISOLATE_TRIES;
1082         while (--tries) {
1083                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1084                 if (result == TCVR_FAILURE)
1085                         return -1;
1086                 if (!(result & BMCR_ISOLATE))
1087                         break;
1088                 udelay(20);
1089         }
1090         if (!tries) {
1091                 ASD((" FAILED!\n"));
1092                 return -1;
1093         }
1094         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1095         if (!is_lucent_phy(hp)) {
1096                 result = happy_meal_tcvr_read(hp, tregs,
1097                                               DP83840_CSCONFIG);
1098                 happy_meal_tcvr_write(hp, tregs,
1099                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1100         }
1101         return 0;
1102 }
1103
1104 /* Figure out whether we have an internal or external transceiver.
1105  *
1106  * hp->happy_lock must be held
1107  */
1108 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1109 {
1110         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1111
1112         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1113         if (hp->happy_flags & HFLAG_POLL) {
1114                 /* If we are polling, we must stop to get the transceiver type. */
1115                 ASD(("<polling> "));
1116                 if (hp->tcvr_type == internal) {
1117                         if (tconfig & TCV_CFG_MDIO1) {
1118                                 ASD(("<internal> <poll stop> "));
1119                                 happy_meal_poll_stop(hp, tregs);
1120                                 hp->paddr = TCV_PADDR_ETX;
1121                                 hp->tcvr_type = external;
1122                                 ASD(("<external>\n"));
1123                                 tconfig &= ~(TCV_CFG_PENABLE);
1124                                 tconfig |= TCV_CFG_PSELECT;
1125                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1126                         }
1127                 } else {
1128                         if (hp->tcvr_type == external) {
1129                                 ASD(("<external> "));
1130                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1131                                         ASD(("<poll stop> "));
1132                                         happy_meal_poll_stop(hp, tregs);
1133                                         hp->paddr = TCV_PADDR_ITX;
1134                                         hp->tcvr_type = internal;
1135                                         ASD(("<internal>\n"));
1136                                         hme_write32(hp, tregs + TCVR_CFG,
1137                                                     hme_read32(hp, tregs + TCVR_CFG) &
1138                                                     ~(TCV_CFG_PSELECT));
1139                                 }
1140                                 ASD(("\n"));
1141                         } else {
1142                                 ASD(("<none>\n"));
1143                         }
1144                 }
1145         } else {
1146                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1147
1148                 /* Else we can just work off of the MDIO bits. */
1149                 ASD(("<not polling> "));
1150                 if (reread & TCV_CFG_MDIO1) {
1151                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1152                         hp->paddr = TCV_PADDR_ETX;
1153                         hp->tcvr_type = external;
1154                         ASD(("<external>\n"));
1155                 } else {
1156                         if (reread & TCV_CFG_MDIO0) {
1157                                 hme_write32(hp, tregs + TCVR_CFG,
1158                                             tconfig & ~(TCV_CFG_PSELECT));
1159                                 hp->paddr = TCV_PADDR_ITX;
1160                                 hp->tcvr_type = internal;
1161                                 ASD(("<internal>\n"));
1162                         } else {
1163                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1164                                 hp->tcvr_type = none; /* Grrr... */
1165                                 ASD(("<none>\n"));
1166                         }
1167                 }
1168         }
1169 }
1170
1171 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1172  *
1173  * The buffers we dma into must be 64 byte aligned.  So we use a special
1174  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1175  * we really need.
1176  *
1177  * We use skb_reserve() to align the data block we get in the skb.  We
1178  * also program the etxregs->cfg register to use an offset of 2.  This
1179  * imperical constant plus the ethernet header size will always leave
1180  * us with a nicely aligned ip header once we pass things up to the
1181  * protocol layers.
1182  *
1183  * The numbers work out to:
1184  *
1185  *         Max ethernet frame size         1518
1186  *         Ethernet header size              14
1187  *         Happy Meal base offset             2
1188  *
1189  * Say a skb data area is at 0xf001b010, and its size alloced is
1190  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1191  *
1192  * First our alloc_skb() routine aligns the data base to a 64 byte
1193  * boundary.  We now have 0xf001b040 as our skb data address.  We
1194  * plug this into the receive descriptor address.
1195  *
1196  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1197  * So now the data we will end up looking at starts at 0xf001b042.  When
1198  * the packet arrives, we will check out the size received and subtract
1199  * this from the skb->length.  Then we just pass the packet up to the
1200  * protocols as is, and allocate a new skb to replace this slot we have
1201  * just received from.
1202  *
1203  * The ethernet layer will strip the ether header from the front of the
1204  * skb we just sent to it, this leaves us with the ip header sitting
1205  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1206  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1207  * bit checksum is obtained from the low bits of the receive descriptor
1208  * flags, thus:
1209  *
1210  *      skb->csum = rxd->rx_flags & 0xffff;
1211  *      skb->ip_summed = CHECKSUM_COMPLETE;
1212  *
1213  * before sending off the skb to the protocols, and we are good as gold.
1214  */
1215 static void happy_meal_clean_rings(struct happy_meal *hp)
1216 {
1217         int i;
1218
1219         for (i = 0; i < RX_RING_SIZE; i++) {
1220                 if (hp->rx_skbs[i] != NULL) {
1221                         struct sk_buff *skb = hp->rx_skbs[i];
1222                         struct happy_meal_rxd *rxd;
1223                         u32 dma_addr;
1224
1225                         rxd = &hp->happy_block->happy_meal_rxd[i];
1226                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1227                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
1228                         dev_kfree_skb_any(skb);
1229                         hp->rx_skbs[i] = NULL;
1230                 }
1231         }
1232
1233         for (i = 0; i < TX_RING_SIZE; i++) {
1234                 if (hp->tx_skbs[i] != NULL) {
1235                         struct sk_buff *skb = hp->tx_skbs[i];
1236                         struct happy_meal_txd *txd;
1237                         u32 dma_addr;
1238                         int frag;
1239
1240                         hp->tx_skbs[i] = NULL;
1241
1242                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1243                                 txd = &hp->happy_block->happy_meal_txd[i];
1244                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1245                                 hme_dma_unmap(hp, dma_addr,
1246                                               (hme_read_desc32(hp, &txd->tx_flags)
1247                                                & TXFLAG_SIZE),
1248                                               DMA_TODEVICE);
1249
1250                                 if (frag != skb_shinfo(skb)->nr_frags)
1251                                         i++;
1252                         }
1253
1254                         dev_kfree_skb_any(skb);
1255                 }
1256         }
1257 }
1258
1259 /* hp->happy_lock must be held */
1260 static void happy_meal_init_rings(struct happy_meal *hp)
1261 {
1262         struct hmeal_init_block *hb = hp->happy_block;
1263         struct net_device *dev = hp->dev;
1264         int i;
1265
1266         HMD(("happy_meal_init_rings: counters to zero, "));
1267         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1268
1269         /* Free any skippy bufs left around in the rings. */
1270         HMD(("clean, "));
1271         happy_meal_clean_rings(hp);
1272
1273         /* Now get new skippy bufs for the receive ring. */
1274         HMD(("init rxring, "));
1275         for (i = 0; i < RX_RING_SIZE; i++) {
1276                 struct sk_buff *skb;
1277
1278                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1279                 if (!skb) {
1280                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1281                         continue;
1282                 }
1283                 hp->rx_skbs[i] = skb;
1284                 skb->dev = dev;
1285
1286                 /* Because we reserve afterwards. */
1287                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1288                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1289                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1290                               hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
1291                 skb_reserve(skb, RX_OFFSET);
1292         }
1293
1294         HMD(("init txring, "));
1295         for (i = 0; i < TX_RING_SIZE; i++)
1296                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1297
1298         HMD(("done\n"));
1299 }
1300
1301 /* hp->happy_lock must be held */
1302 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1303                                               void __iomem *tregs,
1304                                               struct ethtool_cmd *ep)
1305 {
1306         int timeout;
1307
1308         /* Read all of the registers we are interested in now. */
1309         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1310         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1311         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1312         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1313
1314         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1315
1316         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1317         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1318                 /* Advertise everything we can support. */
1319                 if (hp->sw_bmsr & BMSR_10HALF)
1320                         hp->sw_advertise |= (ADVERTISE_10HALF);
1321                 else
1322                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1323
1324                 if (hp->sw_bmsr & BMSR_10FULL)
1325                         hp->sw_advertise |= (ADVERTISE_10FULL);
1326                 else
1327                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1328                 if (hp->sw_bmsr & BMSR_100HALF)
1329                         hp->sw_advertise |= (ADVERTISE_100HALF);
1330                 else
1331                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1332                 if (hp->sw_bmsr & BMSR_100FULL)
1333                         hp->sw_advertise |= (ADVERTISE_100FULL);
1334                 else
1335                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1336                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1337
1338                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1339                  * XXX and this is because the DP83840 does not support it, changes
1340                  * XXX would need to be made to the tx/rx logic in the driver as well
1341                  * XXX so I completely skip checking for it in the BMSR for now.
1342                  */
1343
1344 #ifdef AUTO_SWITCH_DEBUG
1345                 ASD(("%s: Advertising [ ", hp->dev->name));
1346                 if (hp->sw_advertise & ADVERTISE_10HALF)
1347                         ASD(("10H "));
1348                 if (hp->sw_advertise & ADVERTISE_10FULL)
1349                         ASD(("10F "));
1350                 if (hp->sw_advertise & ADVERTISE_100HALF)
1351                         ASD(("100H "));
1352                 if (hp->sw_advertise & ADVERTISE_100FULL)
1353                         ASD(("100F "));
1354 #endif
1355
1356                 /* Enable Auto-Negotiation, this is usually on already... */
1357                 hp->sw_bmcr |= BMCR_ANENABLE;
1358                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1359
1360                 /* Restart it to make sure it is going. */
1361                 hp->sw_bmcr |= BMCR_ANRESTART;
1362                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1363
1364                 /* BMCR_ANRESTART self clears when the process has begun. */
1365
1366                 timeout = 64;  /* More than enough. */
1367                 while (--timeout) {
1368                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1369                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1370                                 break; /* got it. */
1371                         udelay(10);
1372                 }
1373                 if (!timeout) {
1374                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1375                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1376                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1377                                hp->dev->name);
1378                         goto force_link;
1379                 } else {
1380                         hp->timer_state = arbwait;
1381                 }
1382         } else {
1383 force_link:
1384                 /* Force the link up, trying first a particular mode.
1385                  * Either we are here at the request of ethtool or
1386                  * because the Happy Meal would not start to autoneg.
1387                  */
1388
1389                 /* Disable auto-negotiation in BMCR, enable the duplex and
1390                  * speed setting, init the timer state machine, and fire it off.
1391                  */
1392                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1393                         hp->sw_bmcr = BMCR_SPEED100;
1394                 } else {
1395                         if (ep->speed == SPEED_100)
1396                                 hp->sw_bmcr = BMCR_SPEED100;
1397                         else
1398                                 hp->sw_bmcr = 0;
1399                         if (ep->duplex == DUPLEX_FULL)
1400                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1401                 }
1402                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1403
1404                 if (!is_lucent_phy(hp)) {
1405                         /* OK, seems we need do disable the transceiver for the first
1406                          * tick to make sure we get an accurate link state at the
1407                          * second tick.
1408                          */
1409                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1410                                                                DP83840_CSCONFIG);
1411                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1412                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1413                                               hp->sw_csconfig);
1414                 }
1415                 hp->timer_state = ltrywait;
1416         }
1417
1418         hp->timer_ticks = 0;
1419         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1420         hp->happy_timer.data = (unsigned long) hp;
1421         hp->happy_timer.function = &happy_meal_timer;
1422         add_timer(&hp->happy_timer);
1423 }
1424
1425 /* hp->happy_lock must be held */
1426 static int happy_meal_init(struct happy_meal *hp)
1427 {
1428         void __iomem *gregs        = hp->gregs;
1429         void __iomem *etxregs      = hp->etxregs;
1430         void __iomem *erxregs      = hp->erxregs;
1431         void __iomem *bregs        = hp->bigmacregs;
1432         void __iomem *tregs        = hp->tcvregs;
1433         u32 regtmp, rxcfg;
1434         unsigned char *e = &hp->dev->dev_addr[0];
1435
1436         /* If auto-negotiation timer is running, kill it. */
1437         del_timer(&hp->happy_timer);
1438
1439         HMD(("happy_meal_init: happy_flags[%08x] ",
1440              hp->happy_flags));
1441         if (!(hp->happy_flags & HFLAG_INIT)) {
1442                 HMD(("set HFLAG_INIT, "));
1443                 hp->happy_flags |= HFLAG_INIT;
1444                 happy_meal_get_counters(hp, bregs);
1445         }
1446
1447         /* Stop polling. */
1448         HMD(("to happy_meal_poll_stop\n"));
1449         happy_meal_poll_stop(hp, tregs);
1450
1451         /* Stop transmitter and receiver. */
1452         HMD(("happy_meal_init: to happy_meal_stop\n"));
1453         happy_meal_stop(hp, gregs);
1454
1455         /* Alloc and reset the tx/rx descriptor chains. */
1456         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1457         happy_meal_init_rings(hp);
1458
1459         /* Shut up the MIF. */
1460         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1461              hme_read32(hp, tregs + TCVR_IMASK)));
1462         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1463
1464         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1465         if (hp->happy_flags & HFLAG_FENABLE) {
1466                 HMD(("use frame old[%08x], ",
1467                      hme_read32(hp, tregs + TCVR_CFG)));
1468                 hme_write32(hp, tregs + TCVR_CFG,
1469                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1470         } else {
1471                 HMD(("use bitbang old[%08x], ",
1472                      hme_read32(hp, tregs + TCVR_CFG)));
1473                 hme_write32(hp, tregs + TCVR_CFG,
1474                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1475         }
1476
1477         /* Check the state of the transceiver. */
1478         HMD(("to happy_meal_transceiver_check\n"));
1479         happy_meal_transceiver_check(hp, tregs);
1480
1481         /* Put the Big Mac into a sane state. */
1482         HMD(("happy_meal_init: "));
1483         switch(hp->tcvr_type) {
1484         case none:
1485                 /* Cannot operate if we don't know the transceiver type! */
1486                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1487                 return -EAGAIN;
1488
1489         case internal:
1490                 /* Using the MII buffers. */
1491                 HMD(("internal, using MII, "));
1492                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1493                 break;
1494
1495         case external:
1496                 /* Not using the MII, disable it. */
1497                 HMD(("external, disable MII, "));
1498                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1499                 break;
1500         };
1501
1502         if (happy_meal_tcvr_reset(hp, tregs))
1503                 return -EAGAIN;
1504
1505         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1506         HMD(("tx/rx reset, "));
1507         happy_meal_tx_reset(hp, bregs);
1508         happy_meal_rx_reset(hp, bregs);
1509
1510         /* Set jam size and inter-packet gaps to reasonable defaults. */
1511         HMD(("jsize/ipg1/ipg2, "));
1512         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1513         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1514         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1515
1516         /* Load up the MAC address and random seed. */
1517         HMD(("rseed/macaddr, "));
1518
1519         /* The docs recommend to use the 10LSB of our MAC here. */
1520         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1521
1522         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1523         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1524         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1525
1526         HMD(("htable, "));
1527         if ((hp->dev->flags & IFF_ALLMULTI) ||
1528             (hp->dev->mc_count > 64)) {
1529                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1530                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1531                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1532                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1533         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1534                 u16 hash_table[4];
1535                 struct dev_mc_list *dmi = hp->dev->mc_list;
1536                 char *addrs;
1537                 int i;
1538                 u32 crc;
1539
1540                 for (i = 0; i < 4; i++)
1541                         hash_table[i] = 0;
1542
1543                 for (i = 0; i < hp->dev->mc_count; i++) {
1544                         addrs = dmi->dmi_addr;
1545                         dmi = dmi->next;
1546
1547                         if (!(*addrs & 1))
1548                                 continue;
1549
1550                         crc = ether_crc_le(6, addrs);
1551                         crc >>= 26;
1552                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1553                 }
1554                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1555                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1556                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1557                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1558         } else {
1559                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1560                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1561                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1562                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1563         }
1564
1565         /* Set the RX and TX ring ptrs. */
1566         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1567              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1568              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1569         hme_write32(hp, erxregs + ERX_RING,
1570                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1571         hme_write32(hp, etxregs + ETX_RING,
1572                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1573
1574         /* Parity issues in the ERX unit of some HME revisions can cause some
1575          * registers to not be written unless their parity is even.  Detect such
1576          * lost writes and simply rewrite with a low bit set (which will be ignored
1577          * since the rxring needs to be 2K aligned).
1578          */
1579         if (hme_read32(hp, erxregs + ERX_RING) !=
1580             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1581                 hme_write32(hp, erxregs + ERX_RING,
1582                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1583                             | 0x4);
1584
1585         /* Set the supported burst sizes. */
1586         HMD(("happy_meal_init: old[%08x] bursts<",
1587              hme_read32(hp, gregs + GREG_CFG)));
1588
1589 #ifndef CONFIG_SPARC
1590         /* It is always PCI and can handle 64byte bursts. */
1591         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1592 #else
1593         if ((hp->happy_bursts & DMA_BURST64) &&
1594             ((hp->happy_flags & HFLAG_PCI) != 0
1595 #ifdef CONFIG_SBUS
1596              || sbus_can_burst64(hp->happy_dev)
1597 #endif
1598              || 0)) {
1599                 u32 gcfg = GREG_CFG_BURST64;
1600
1601                 /* I have no idea if I should set the extended
1602                  * transfer mode bit for Cheerio, so for now I
1603                  * do not.  -DaveM
1604                  */
1605 #ifdef CONFIG_SBUS
1606                 if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1607                     sbus_can_dma_64bit(hp->happy_dev)) {
1608                         sbus_set_sbus64(hp->happy_dev,
1609                                         hp->happy_bursts);
1610                         gcfg |= GREG_CFG_64BIT;
1611                 }
1612 #endif
1613
1614                 HMD(("64>"));
1615                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1616         } else if (hp->happy_bursts & DMA_BURST32) {
1617                 HMD(("32>"));
1618                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1619         } else if (hp->happy_bursts & DMA_BURST16) {
1620                 HMD(("16>"));
1621                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1622         } else {
1623                 HMD(("XXX>"));
1624                 hme_write32(hp, gregs + GREG_CFG, 0);
1625         }
1626 #endif /* CONFIG_SPARC */
1627
1628         /* Turn off interrupts we do not want to hear. */
1629         HMD((", enable global interrupts, "));
1630         hme_write32(hp, gregs + GREG_IMASK,
1631                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1632                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1633
1634         /* Set the transmit ring buffer size. */
1635         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1636              hme_read32(hp, etxregs + ETX_RSIZE)));
1637         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1638
1639         /* Enable transmitter DVMA. */
1640         HMD(("tx dma enable old[%08x], ",
1641              hme_read32(hp, etxregs + ETX_CFG)));
1642         hme_write32(hp, etxregs + ETX_CFG,
1643                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1644
1645         /* This chip really rots, for the receiver sometimes when you
1646          * write to its control registers not all the bits get there
1647          * properly.  I cannot think of a sane way to provide complete
1648          * coverage for this hardware bug yet.
1649          */
1650         HMD(("erx regs bug old[%08x]\n",
1651              hme_read32(hp, erxregs + ERX_CFG)));
1652         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1653         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1654         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1655         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1656                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1657                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1658                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1659                 /* XXX Should return failure here... */
1660         }
1661
1662         /* Enable Big Mac hash table filter. */
1663         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1664              hme_read32(hp, bregs + BMAC_RXCFG)));
1665         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1666         if (hp->dev->flags & IFF_PROMISC)
1667                 rxcfg |= BIGMAC_RXCFG_PMISC;
1668         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1669
1670         /* Let the bits settle in the chip. */
1671         udelay(10);
1672
1673         /* Ok, configure the Big Mac transmitter. */
1674         HMD(("BIGMAC init, "));
1675         regtmp = 0;
1676         if (hp->happy_flags & HFLAG_FULL)
1677                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1678
1679         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1680          * to deadlock with the PHY if a Jabber occurs.
1681          */
1682         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1683
1684         /* Give up after 16 TX attempts. */
1685         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1686
1687         /* Enable the output drivers no matter what. */
1688         regtmp = BIGMAC_XCFG_ODENABLE;
1689
1690         /* If card can do lance mode, enable it. */
1691         if (hp->happy_flags & HFLAG_LANCE)
1692                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1693
1694         /* Disable the MII buffers if using external transceiver. */
1695         if (hp->tcvr_type == external)
1696                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1697
1698         HMD(("XIF config old[%08x], ",
1699              hme_read32(hp, bregs + BMAC_XIFCFG)));
1700         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1701
1702         /* Start things up. */
1703         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1704              hme_read32(hp, bregs + BMAC_TXCFG),
1705              hme_read32(hp, bregs + BMAC_RXCFG)));
1706
1707         /* Set larger TX/RX size to allow for 802.1q */
1708         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1709         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1710
1711         hme_write32(hp, bregs + BMAC_TXCFG,
1712                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1713         hme_write32(hp, bregs + BMAC_RXCFG,
1714                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1715
1716         /* Get the autonegotiation started, and the watch timer ticking. */
1717         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1718
1719         /* Success. */
1720         return 0;
1721 }
1722
1723 /* hp->happy_lock must be held */
1724 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1725 {
1726         void __iomem *tregs     = hp->tcvregs;
1727         void __iomem *bregs     = hp->bigmacregs;
1728         void __iomem *gregs     = hp->gregs;
1729
1730         happy_meal_stop(hp, gregs);
1731         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1732         if (hp->happy_flags & HFLAG_FENABLE)
1733                 hme_write32(hp, tregs + TCVR_CFG,
1734                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1735         else
1736                 hme_write32(hp, tregs + TCVR_CFG,
1737                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1738         happy_meal_transceiver_check(hp, tregs);
1739         switch(hp->tcvr_type) {
1740         case none:
1741                 return;
1742         case internal:
1743                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1744                 break;
1745         case external:
1746                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1747                 break;
1748         };
1749         if (happy_meal_tcvr_reset(hp, tregs))
1750                 return;
1751
1752         /* Latch PHY registers as of now. */
1753         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1754         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1755
1756         /* Advertise everything we can support. */
1757         if (hp->sw_bmsr & BMSR_10HALF)
1758                 hp->sw_advertise |= (ADVERTISE_10HALF);
1759         else
1760                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1761
1762         if (hp->sw_bmsr & BMSR_10FULL)
1763                 hp->sw_advertise |= (ADVERTISE_10FULL);
1764         else
1765                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1766         if (hp->sw_bmsr & BMSR_100HALF)
1767                 hp->sw_advertise |= (ADVERTISE_100HALF);
1768         else
1769                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1770         if (hp->sw_bmsr & BMSR_100FULL)
1771                 hp->sw_advertise |= (ADVERTISE_100FULL);
1772         else
1773                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1774
1775         /* Update the PHY advertisement register. */
1776         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1777 }
1778
1779 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1780  * the hardware, so we cannot re-read it and get a correct value.
1781  *
1782  * hp->happy_lock must be held
1783  */
1784 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1785 {
1786         int reset = 0;
1787
1788         /* Only print messages for non-counter related interrupts. */
1789         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1790                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1791                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1792                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1793                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1794                       GREG_STAT_SLVPERR))
1795                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1796                        hp->dev->name, status);
1797
1798         if (status & GREG_STAT_RFIFOVF) {
1799                 /* Receive FIFO overflow is harmless and the hardware will take
1800                    care of it, just some packets are lost. Who cares. */
1801                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1802         }
1803
1804         if (status & GREG_STAT_STSTERR) {
1805                 /* BigMAC SQE link test failed. */
1806                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1807                 reset = 1;
1808         }
1809
1810         if (status & GREG_STAT_TFIFO_UND) {
1811                 /* Transmit FIFO underrun, again DMA error likely. */
1812                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1813                        hp->dev->name);
1814                 reset = 1;
1815         }
1816
1817         if (status & GREG_STAT_MAXPKTERR) {
1818                 /* Driver error, tried to transmit something larger
1819                  * than ethernet max mtu.
1820                  */
1821                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1822                 reset = 1;
1823         }
1824
1825         if (status & GREG_STAT_NORXD) {
1826                 /* This is harmless, it just means the system is
1827                  * quite loaded and the incoming packet rate was
1828                  * faster than the interrupt handler could keep up
1829                  * with.
1830                  */
1831                 printk(KERN_INFO "%s: Happy Meal out of receive "
1832                        "descriptors, packet dropped.\n",
1833                        hp->dev->name);
1834         }
1835
1836         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1837                 /* All sorts of DMA receive errors. */
1838                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1839                 if (status & GREG_STAT_RXERR)
1840                         printk("GenericError ");
1841                 if (status & GREG_STAT_RXPERR)
1842                         printk("ParityError ");
1843                 if (status & GREG_STAT_RXTERR)
1844                         printk("RxTagBotch ");
1845                 printk("]\n");
1846                 reset = 1;
1847         }
1848
1849         if (status & GREG_STAT_EOPERR) {
1850                 /* Driver bug, didn't set EOP bit in tx descriptor given
1851                  * to the happy meal.
1852                  */
1853                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1854                        hp->dev->name);
1855                 reset = 1;
1856         }
1857
1858         if (status & GREG_STAT_MIFIRQ) {
1859                 /* MIF signalled an interrupt, were we polling it? */
1860                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1861         }
1862
1863         if (status &
1864             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1865                 /* All sorts of transmit DMA errors. */
1866                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1867                 if (status & GREG_STAT_TXEACK)
1868                         printk("GenericError ");
1869                 if (status & GREG_STAT_TXLERR)
1870                         printk("LateError ");
1871                 if (status & GREG_STAT_TXPERR)
1872                         printk("ParityErro ");
1873                 if (status & GREG_STAT_TXTERR)
1874                         printk("TagBotch ");
1875                 printk("]\n");
1876                 reset = 1;
1877         }
1878
1879         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1880                 /* Bus or parity error when cpu accessed happy meal registers
1881                  * or it's internal FIFO's.  Should never see this.
1882                  */
1883                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1884                        hp->dev->name,
1885                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1886                 reset = 1;
1887         }
1888
1889         if (reset) {
1890                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1891                 happy_meal_init(hp);
1892                 return 1;
1893         }
1894         return 0;
1895 }
1896
1897 /* hp->happy_lock must be held */
1898 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1899 {
1900         void __iomem *tregs = hp->tcvregs;
1901
1902         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1903         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1904         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1905
1906         /* Use the fastest transmission protocol possible. */
1907         if (hp->sw_lpa & LPA_100FULL) {
1908                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1909                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1910         } else if (hp->sw_lpa & LPA_100HALF) {
1911                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1912                 hp->sw_bmcr |= BMCR_SPEED100;
1913         } else if (hp->sw_lpa & LPA_10FULL) {
1914                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1915                 hp->sw_bmcr |= BMCR_FULLDPLX;
1916         } else {
1917                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1918         }
1919         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1920
1921         /* Finally stop polling and shut up the MIF. */
1922         happy_meal_poll_stop(hp, tregs);
1923 }
1924
1925 #ifdef TXDEBUG
1926 #define TXD(x) printk x
1927 #else
1928 #define TXD(x)
1929 #endif
1930
1931 /* hp->happy_lock must be held */
1932 static void happy_meal_tx(struct happy_meal *hp)
1933 {
1934         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1935         struct happy_meal_txd *this;
1936         struct net_device *dev = hp->dev;
1937         int elem;
1938
1939         elem = hp->tx_old;
1940         TXD(("TX<"));
1941         while (elem != hp->tx_new) {
1942                 struct sk_buff *skb;
1943                 u32 flags, dma_addr, dma_len;
1944                 int frag;
1945
1946                 TXD(("[%d]", elem));
1947                 this = &txbase[elem];
1948                 flags = hme_read_desc32(hp, &this->tx_flags);
1949                 if (flags & TXFLAG_OWN)
1950                         break;
1951                 skb = hp->tx_skbs[elem];
1952                 if (skb_shinfo(skb)->nr_frags) {
1953                         int last;
1954
1955                         last = elem + skb_shinfo(skb)->nr_frags;
1956                         last &= (TX_RING_SIZE - 1);
1957                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1958                         if (flags & TXFLAG_OWN)
1959                                 break;
1960                 }
1961                 hp->tx_skbs[elem] = NULL;
1962                 hp->net_stats.tx_bytes += skb->len;
1963
1964                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1965                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1966                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1967
1968                         dma_len &= TXFLAG_SIZE;
1969                         hme_dma_unmap(hp, dma_addr, dma_len, DMA_TODEVICE);
1970
1971                         elem = NEXT_TX(elem);
1972                         this = &txbase[elem];
1973                 }
1974
1975                 dev_kfree_skb_irq(skb);
1976                 hp->net_stats.tx_packets++;
1977         }
1978         hp->tx_old = elem;
1979         TXD((">"));
1980
1981         if (netif_queue_stopped(dev) &&
1982             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1983                 netif_wake_queue(dev);
1984 }
1985
1986 #ifdef RXDEBUG
1987 #define RXD(x) printk x
1988 #else
1989 #define RXD(x)
1990 #endif
1991
1992 /* Originally I used to handle the allocation failure by just giving back just
1993  * that one ring buffer to the happy meal.  Problem is that usually when that
1994  * condition is triggered, the happy meal expects you to do something reasonable
1995  * with all of the packets it has DMA'd in.  So now I just drop the entire
1996  * ring when we cannot get a new skb and give them all back to the happy meal,
1997  * maybe things will be "happier" now.
1998  *
1999  * hp->happy_lock must be held
2000  */
2001 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
2002 {
2003         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2004         struct happy_meal_rxd *this;
2005         int elem = hp->rx_new, drops = 0;
2006         u32 flags;
2007
2008         RXD(("RX<"));
2009         this = &rxbase[elem];
2010         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2011                 struct sk_buff *skb;
2012                 int len = flags >> 16;
2013                 u16 csum = flags & RXFLAG_CSUM;
2014                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2015
2016                 RXD(("[%d ", elem));
2017
2018                 /* Check for errors. */
2019                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2020                         RXD(("ERR(%08x)]", flags));
2021                         hp->net_stats.rx_errors++;
2022                         if (len < ETH_ZLEN)
2023                                 hp->net_stats.rx_length_errors++;
2024                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2025                                 hp->net_stats.rx_over_errors++;
2026                                 hp->net_stats.rx_fifo_errors++;
2027                         }
2028
2029                         /* Return it to the Happy meal. */
2030         drop_it:
2031                         hp->net_stats.rx_dropped++;
2032                         hme_write_rxd(hp, this,
2033                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2034                                       dma_addr);
2035                         goto next;
2036                 }
2037                 skb = hp->rx_skbs[elem];
2038                 if (len > RX_COPY_THRESHOLD) {
2039                         struct sk_buff *new_skb;
2040
2041                         /* Now refill the entry, if we can. */
2042                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2043                         if (new_skb == NULL) {
2044                                 drops++;
2045                                 goto drop_it;
2046                         }
2047                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
2048                         hp->rx_skbs[elem] = new_skb;
2049                         new_skb->dev = dev;
2050                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
2051                         hme_write_rxd(hp, this,
2052                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2053                                       hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
2054                         skb_reserve(new_skb, RX_OFFSET);
2055
2056                         /* Trim the original skb for the netif. */
2057                         skb_trim(skb, len);
2058                 } else {
2059                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2060
2061                         if (copy_skb == NULL) {
2062                                 drops++;
2063                                 goto drop_it;
2064                         }
2065
2066                         skb_reserve(copy_skb, 2);
2067                         skb_put(copy_skb, len);
2068                         hme_dma_sync_for_cpu(hp, dma_addr, len, DMA_FROMDEVICE);
2069                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2070                         hme_dma_sync_for_device(hp, dma_addr, len, DMA_FROMDEVICE);
2071
2072                         /* Reuse original ring buffer. */
2073                         hme_write_rxd(hp, this,
2074                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2075                                       dma_addr);
2076
2077                         skb = copy_skb;
2078                 }
2079
2080                 /* This card is _fucking_ hot... */
2081                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2082                 skb->ip_summed = CHECKSUM_COMPLETE;
2083
2084                 RXD(("len=%d csum=%4x]", len, csum));
2085                 skb->protocol = eth_type_trans(skb, dev);
2086                 netif_rx(skb);
2087
2088                 dev->last_rx = jiffies;
2089                 hp->net_stats.rx_packets++;
2090                 hp->net_stats.rx_bytes += len;
2091         next:
2092                 elem = NEXT_RX(elem);
2093                 this = &rxbase[elem];
2094         }
2095         hp->rx_new = elem;
2096         if (drops)
2097                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2098         RXD((">"));
2099 }
2100
2101 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2102 {
2103         struct net_device *dev = dev_id;
2104         struct happy_meal *hp  = netdev_priv(dev);
2105         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2106
2107         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2108
2109         spin_lock(&hp->happy_lock);
2110
2111         if (happy_status & GREG_STAT_ERRORS) {
2112                 HMD(("ERRORS "));
2113                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2114                         goto out;
2115         }
2116
2117         if (happy_status & GREG_STAT_MIFIRQ) {
2118                 HMD(("MIFIRQ "));
2119                 happy_meal_mif_interrupt(hp);
2120         }
2121
2122         if (happy_status & GREG_STAT_TXALL) {
2123                 HMD(("TXALL "));
2124                 happy_meal_tx(hp);
2125         }
2126
2127         if (happy_status & GREG_STAT_RXTOHOST) {
2128                 HMD(("RXTOHOST "));
2129                 happy_meal_rx(hp, dev);
2130         }
2131
2132         HMD(("done\n"));
2133 out:
2134         spin_unlock(&hp->happy_lock);
2135
2136         return IRQ_HANDLED;
2137 }
2138
2139 #ifdef CONFIG_SBUS
2140 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2141 {
2142         struct quattro *qp = (struct quattro *) cookie;
2143         int i;
2144
2145         for (i = 0; i < 4; i++) {
2146                 struct net_device *dev = qp->happy_meals[i];
2147                 struct happy_meal *hp  = dev->priv;
2148                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2149
2150                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2151
2152                 if (!(happy_status & (GREG_STAT_ERRORS |
2153                                       GREG_STAT_MIFIRQ |
2154                                       GREG_STAT_TXALL |
2155                                       GREG_STAT_RXTOHOST)))
2156                         continue;
2157
2158                 spin_lock(&hp->happy_lock);
2159
2160                 if (happy_status & GREG_STAT_ERRORS) {
2161                         HMD(("ERRORS "));
2162                         if (happy_meal_is_not_so_happy(hp, happy_status))
2163                                 goto next;
2164                 }
2165
2166                 if (happy_status & GREG_STAT_MIFIRQ) {
2167                         HMD(("MIFIRQ "));
2168                         happy_meal_mif_interrupt(hp);
2169                 }
2170
2171                 if (happy_status & GREG_STAT_TXALL) {
2172                         HMD(("TXALL "));
2173                         happy_meal_tx(hp);
2174                 }
2175
2176                 if (happy_status & GREG_STAT_RXTOHOST) {
2177                         HMD(("RXTOHOST "));
2178                         happy_meal_rx(hp, dev);
2179                 }
2180
2181         next:
2182                 spin_unlock(&hp->happy_lock);
2183         }
2184         HMD(("done\n"));
2185
2186         return IRQ_HANDLED;
2187 }
2188 #endif
2189
2190 static int happy_meal_open(struct net_device *dev)
2191 {
2192         struct happy_meal *hp = dev->priv;
2193         int res;
2194
2195         HMD(("happy_meal_open: "));
2196
2197         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2198          * into a single source which we register handling at probe time.
2199          */
2200         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2201                 if (request_irq(dev->irq, &happy_meal_interrupt,
2202                                 IRQF_SHARED, dev->name, (void *)dev)) {
2203                         HMD(("EAGAIN\n"));
2204                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2205                                dev->irq);
2206
2207                         return -EAGAIN;
2208                 }
2209         }
2210
2211         HMD(("to happy_meal_init\n"));
2212
2213         spin_lock_irq(&hp->happy_lock);
2214         res = happy_meal_init(hp);
2215         spin_unlock_irq(&hp->happy_lock);
2216
2217         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2218                 free_irq(dev->irq, dev);
2219         return res;
2220 }
2221
2222 static int happy_meal_close(struct net_device *dev)
2223 {
2224         struct happy_meal *hp = dev->priv;
2225
2226         spin_lock_irq(&hp->happy_lock);
2227         happy_meal_stop(hp, hp->gregs);
2228         happy_meal_clean_rings(hp);
2229
2230         /* If auto-negotiation timer is running, kill it. */
2231         del_timer(&hp->happy_timer);
2232
2233         spin_unlock_irq(&hp->happy_lock);
2234
2235         /* On Quattro QFE cards, all hme interrupts are concentrated
2236          * into a single source which we register handling at probe
2237          * time and never unregister.
2238          */
2239         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2240                 free_irq(dev->irq, dev);
2241
2242         return 0;
2243 }
2244
2245 #ifdef SXDEBUG
2246 #define SXD(x) printk x
2247 #else
2248 #define SXD(x)
2249 #endif
2250
2251 static void happy_meal_tx_timeout(struct net_device *dev)
2252 {
2253         struct happy_meal *hp = dev->priv;
2254
2255         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2256         tx_dump_log();
2257         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2258                 hme_read32(hp, hp->gregs + GREG_STAT),
2259                 hme_read32(hp, hp->etxregs + ETX_CFG),
2260                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2261
2262         spin_lock_irq(&hp->happy_lock);
2263         happy_meal_init(hp);
2264         spin_unlock_irq(&hp->happy_lock);
2265
2266         netif_wake_queue(dev);
2267 }
2268
2269 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2270 {
2271         struct happy_meal *hp = dev->priv;
2272         int entry;
2273         u32 tx_flags;
2274
2275         tx_flags = TXFLAG_OWN;
2276         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2277                 const u32 csum_start_off = skb_transport_offset(skb);
2278                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2279
2280                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2281                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2282                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2283         }
2284
2285         spin_lock_irq(&hp->happy_lock);
2286
2287         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2288                 netif_stop_queue(dev);
2289                 spin_unlock_irq(&hp->happy_lock);
2290                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2291                        dev->name);
2292                 return 1;
2293         }
2294
2295         entry = hp->tx_new;
2296         SXD(("SX<l[%d]e[%d]>", len, entry));
2297         hp->tx_skbs[entry] = skb;
2298
2299         if (skb_shinfo(skb)->nr_frags == 0) {
2300                 u32 mapping, len;
2301
2302                 len = skb->len;
2303                 mapping = hme_dma_map(hp, skb->data, len, DMA_TODEVICE);
2304                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2305                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2306                               (tx_flags | (len & TXFLAG_SIZE)),
2307                               mapping);
2308                 entry = NEXT_TX(entry);
2309         } else {
2310                 u32 first_len, first_mapping;
2311                 int frag, first_entry = entry;
2312
2313                 /* We must give this initial chunk to the device last.
2314                  * Otherwise we could race with the device.
2315                  */
2316                 first_len = skb_headlen(skb);
2317                 first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TODEVICE);
2318                 entry = NEXT_TX(entry);
2319
2320                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2321                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2322                         u32 len, mapping, this_txflags;
2323
2324                         len = this_frag->size;
2325                         mapping = hme_dma_map(hp,
2326                                               ((void *) page_address(this_frag->page) +
2327                                                this_frag->page_offset),
2328                                               len, DMA_TODEVICE);
2329                         this_txflags = tx_flags;
2330                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2331                                 this_txflags |= TXFLAG_EOP;
2332                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2333                                       (this_txflags | (len & TXFLAG_SIZE)),
2334                                       mapping);
2335                         entry = NEXT_TX(entry);
2336                 }
2337                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2338                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2339                               first_mapping);
2340         }
2341
2342         hp->tx_new = entry;
2343
2344         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2345                 netif_stop_queue(dev);
2346
2347         /* Get it going. */
2348         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2349
2350         spin_unlock_irq(&hp->happy_lock);
2351
2352         dev->trans_start = jiffies;
2353
2354         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2355         return 0;
2356 }
2357
2358 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2359 {
2360         struct happy_meal *hp = dev->priv;
2361
2362         spin_lock_irq(&hp->happy_lock);
2363         happy_meal_get_counters(hp, hp->bigmacregs);
2364         spin_unlock_irq(&hp->happy_lock);
2365
2366         return &hp->net_stats;
2367 }
2368
2369 static void happy_meal_set_multicast(struct net_device *dev)
2370 {
2371         struct happy_meal *hp = dev->priv;
2372         void __iomem *bregs = hp->bigmacregs;
2373         struct dev_mc_list *dmi = dev->mc_list;
2374         char *addrs;
2375         int i;
2376         u32 crc;
2377
2378         spin_lock_irq(&hp->happy_lock);
2379
2380         netif_stop_queue(dev);
2381
2382         if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2383                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2384                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2385                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2386                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2387         } else if (dev->flags & IFF_PROMISC) {
2388                 hme_write32(hp, bregs + BMAC_RXCFG,
2389                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2390         } else {
2391                 u16 hash_table[4];
2392
2393                 for (i = 0; i < 4; i++)
2394                         hash_table[i] = 0;
2395
2396                 for (i = 0; i < dev->mc_count; i++) {
2397                         addrs = dmi->dmi_addr;
2398                         dmi = dmi->next;
2399
2400                         if (!(*addrs & 1))
2401                                 continue;
2402
2403                         crc = ether_crc_le(6, addrs);
2404                         crc >>= 26;
2405                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2406                 }
2407                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2408                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2409                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2410                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2411         }
2412
2413         netif_wake_queue(dev);
2414
2415         spin_unlock_irq(&hp->happy_lock);
2416 }
2417
2418 /* Ethtool support... */
2419 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2420 {
2421         struct happy_meal *hp = dev->priv;
2422
2423         cmd->supported =
2424                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2425                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2426                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2427
2428         /* XXX hardcoded stuff for now */
2429         cmd->port = PORT_TP; /* XXX no MII support */
2430         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2431         cmd->phy_address = 0; /* XXX fixed PHYAD */
2432
2433         /* Record PHY settings. */
2434         spin_lock_irq(&hp->happy_lock);
2435         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2436         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2437         spin_unlock_irq(&hp->happy_lock);
2438
2439         if (hp->sw_bmcr & BMCR_ANENABLE) {
2440                 cmd->autoneg = AUTONEG_ENABLE;
2441                 cmd->speed =
2442                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2443                         SPEED_100 : SPEED_10;
2444                 if (cmd->speed == SPEED_100)
2445                         cmd->duplex =
2446                                 (hp->sw_lpa & (LPA_100FULL)) ?
2447                                 DUPLEX_FULL : DUPLEX_HALF;
2448                 else
2449                         cmd->duplex =
2450                                 (hp->sw_lpa & (LPA_10FULL)) ?
2451                                 DUPLEX_FULL : DUPLEX_HALF;
2452         } else {
2453                 cmd->autoneg = AUTONEG_DISABLE;
2454                 cmd->speed =
2455                         (hp->sw_bmcr & BMCR_SPEED100) ?
2456                         SPEED_100 : SPEED_10;
2457                 cmd->duplex =
2458                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2459                         DUPLEX_FULL : DUPLEX_HALF;
2460         }
2461         return 0;
2462 }
2463
2464 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2465 {
2466         struct happy_meal *hp = dev->priv;
2467
2468         /* Verify the settings we care about. */
2469         if (cmd->autoneg != AUTONEG_ENABLE &&
2470             cmd->autoneg != AUTONEG_DISABLE)
2471                 return -EINVAL;
2472         if (cmd->autoneg == AUTONEG_DISABLE &&
2473             ((cmd->speed != SPEED_100 &&
2474               cmd->speed != SPEED_10) ||
2475              (cmd->duplex != DUPLEX_HALF &&
2476               cmd->duplex != DUPLEX_FULL)))
2477                 return -EINVAL;
2478
2479         /* Ok, do it to it. */
2480         spin_lock_irq(&hp->happy_lock);
2481         del_timer(&hp->happy_timer);
2482         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2483         spin_unlock_irq(&hp->happy_lock);
2484
2485         return 0;
2486 }
2487
2488 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2489 {
2490         struct happy_meal *hp = dev->priv;
2491
2492         strcpy(info->driver, "sunhme");
2493         strcpy(info->version, "2.02");
2494         if (hp->happy_flags & HFLAG_PCI) {
2495                 struct pci_dev *pdev = hp->happy_dev;
2496                 strcpy(info->bus_info, pci_name(pdev));
2497         }
2498 #ifdef CONFIG_SBUS
2499         else {
2500                 struct sbus_dev *sdev = hp->happy_dev;
2501                 sprintf(info->bus_info, "SBUS:%d",
2502                         sdev->slot);
2503         }
2504 #endif
2505 }
2506
2507 static u32 hme_get_link(struct net_device *dev)
2508 {
2509         struct happy_meal *hp = dev->priv;
2510
2511         spin_lock_irq(&hp->happy_lock);
2512         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2513         spin_unlock_irq(&hp->happy_lock);
2514
2515         return (hp->sw_bmsr & BMSR_LSTATUS);
2516 }
2517
2518 static const struct ethtool_ops hme_ethtool_ops = {
2519         .get_settings           = hme_get_settings,
2520         .set_settings           = hme_set_settings,
2521         .get_drvinfo            = hme_get_drvinfo,
2522         .get_link               = hme_get_link,
2523 };
2524
2525 static int hme_version_printed;
2526
2527 #ifdef CONFIG_SBUS
2528 void __devinit quattro_get_ranges(struct quattro *qp)
2529 {
2530         struct sbus_dev *sdev = qp->quattro_dev;
2531         int err;
2532
2533         err = prom_getproperty(sdev->prom_node,
2534                                "ranges",
2535                                (char *)&qp->ranges[0],
2536                                sizeof(qp->ranges));
2537         if (err == 0 || err == -1) {
2538                 qp->nranges = 0;
2539                 return;
2540         }
2541         qp->nranges = (err / sizeof(struct linux_prom_ranges));
2542 }
2543
2544 static void __devinit quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2545 {
2546         struct sbus_dev *sdev = hp->happy_dev;
2547         int rng;
2548
2549         for (rng = 0; rng < qp->nranges; rng++) {
2550                 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2551                 int reg;
2552
2553                 for (reg = 0; reg < 5; reg++) {
2554                         if (sdev->reg_addrs[reg].which_io ==
2555                             rngp->ot_child_space)
2556                                 break;
2557                 }
2558                 if (reg == 5)
2559                         continue;
2560
2561                 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2562                 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2563         }
2564 }
2565
2566 /* Given a happy meal sbus device, find it's quattro parent.
2567  * If none exist, allocate and return a new one.
2568  *
2569  * Return NULL on failure.
2570  */
2571 static struct quattro * __devinit quattro_sbus_find(struct sbus_dev *goal_sdev)
2572 {
2573         struct sbus_dev *sdev;
2574         struct quattro *qp;
2575         int i;
2576
2577         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2578                 for (i = 0, sdev = qp->quattro_dev;
2579                      (sdev != NULL) && (i < 4);
2580                      sdev = sdev->next, i++) {
2581                         if (sdev == goal_sdev)
2582                                 return qp;
2583                 }
2584         }
2585
2586         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2587         if (qp != NULL) {
2588                 int i;
2589
2590                 for (i = 0; i < 4; i++)
2591                         qp->happy_meals[i] = NULL;
2592
2593                 qp->quattro_dev = goal_sdev;
2594                 qp->next = qfe_sbus_list;
2595                 qfe_sbus_list = qp;
2596                 quattro_get_ranges(qp);
2597         }
2598         return qp;
2599 }
2600
2601 /* After all quattro cards have been probed, we call these functions
2602  * to register the IRQ handlers.
2603  */
2604 static void __init quattro_sbus_register_irqs(void)
2605 {
2606         struct quattro *qp;
2607
2608         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2609                 struct sbus_dev *sdev = qp->quattro_dev;
2610                 int err;
2611
2612                 err = request_irq(sdev->irqs[0],
2613                                   quattro_sbus_interrupt,
2614                                   IRQF_SHARED, "Quattro",
2615                                   qp);
2616                 if (err != 0) {
2617                         printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2618                         panic("QFE request irq");
2619                 }
2620         }
2621 }
2622
2623 static void quattro_sbus_free_irqs(void)
2624 {
2625         struct quattro *qp;
2626
2627         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2628                 struct sbus_dev *sdev = qp->quattro_dev;
2629
2630                 free_irq(sdev->irqs[0], qp);
2631         }
2632 }
2633 #endif /* CONFIG_SBUS */
2634
2635 #ifdef CONFIG_PCI
2636 static struct quattro * __devinit quattro_pci_find(struct pci_dev *pdev)
2637 {
2638         struct pci_dev *bdev = pdev->bus->self;
2639         struct quattro *qp;
2640
2641         if (!bdev) return NULL;
2642         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2643                 struct pci_dev *qpdev = qp->quattro_dev;
2644
2645                 if (qpdev == bdev)
2646                         return qp;
2647         }
2648         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2649         if (qp != NULL) {
2650                 int i;
2651
2652                 for (i = 0; i < 4; i++)
2653                         qp->happy_meals[i] = NULL;
2654
2655                 qp->quattro_dev = bdev;
2656                 qp->next = qfe_pci_list;
2657                 qfe_pci_list = qp;
2658
2659                 /* No range tricks necessary on PCI. */
2660                 qp->nranges = 0;
2661         }
2662         return qp;
2663 }
2664 #endif /* CONFIG_PCI */
2665
2666 #ifdef CONFIG_SBUS
2667 static int __devinit happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
2668 {
2669         struct device_node *dp = sdev->ofdev.node;
2670         struct quattro *qp = NULL;
2671         struct happy_meal *hp;
2672         struct net_device *dev;
2673         int i, qfe_slot = -1;
2674         int err = -ENODEV;
2675         DECLARE_MAC_BUF(mac);
2676
2677         if (is_qfe) {
2678                 qp = quattro_sbus_find(sdev);
2679                 if (qp == NULL)
2680                         goto err_out;
2681                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2682                         if (qp->happy_meals[qfe_slot] == NULL)
2683                                 break;
2684                 if (qfe_slot == 4)
2685                         goto err_out;
2686         }
2687
2688         err = -ENOMEM;
2689         dev = alloc_etherdev(sizeof(struct happy_meal));
2690         if (!dev)
2691                 goto err_out;
2692         SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
2693
2694         if (hme_version_printed++ == 0)
2695                 printk(KERN_INFO "%s", version);
2696
2697         /* If user did not specify a MAC address specifically, use
2698          * the Quattro local-mac-address property...
2699          */
2700         for (i = 0; i < 6; i++) {
2701                 if (macaddr[i] != 0)
2702                         break;
2703         }
2704         if (i < 6) { /* a mac address was given */
2705                 for (i = 0; i < 6; i++)
2706                         dev->dev_addr[i] = macaddr[i];
2707                 macaddr[5]++;
2708         } else {
2709                 const unsigned char *addr;
2710                 int len;
2711
2712                 addr = of_get_property(dp, "local-mac-address", &len);
2713
2714                 if (qfe_slot != -1 && addr && len == 6)
2715                         memcpy(dev->dev_addr, addr, 6);
2716                 else
2717                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2718         }
2719
2720         hp = dev->priv;
2721
2722         hp->happy_dev = sdev;
2723
2724         spin_lock_init(&hp->happy_lock);
2725
2726         err = -ENODEV;
2727         if (sdev->num_registers != 5) {
2728                 printk(KERN_ERR "happymeal: Device needs 5 regs, has %d.\n",
2729                        sdev->num_registers);
2730                 goto err_out_free_netdev;
2731         }
2732
2733         if (qp != NULL) {
2734                 hp->qfe_parent = qp;
2735                 hp->qfe_ent = qfe_slot;
2736                 qp->happy_meals[qfe_slot] = dev;
2737                 quattro_apply_ranges(qp, hp);
2738         }
2739
2740         hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2741                                  GREG_REG_SIZE, "HME Global Regs");
2742         if (!hp->gregs) {
2743                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2744                 goto err_out_free_netdev;
2745         }
2746
2747         hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2748                                    ETX_REG_SIZE, "HME TX Regs");
2749         if (!hp->etxregs) {
2750                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2751                 goto err_out_iounmap;
2752         }
2753
2754         hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2755                                    ERX_REG_SIZE, "HME RX Regs");
2756         if (!hp->erxregs) {
2757                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2758                 goto err_out_iounmap;
2759         }
2760
2761         hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2762                                       BMAC_REG_SIZE, "HME BIGMAC Regs");
2763         if (!hp->bigmacregs) {
2764                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2765                 goto err_out_iounmap;
2766         }
2767
2768         hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2769                                    TCVR_REG_SIZE, "HME Tranceiver Regs");
2770         if (!hp->tcvregs) {
2771                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2772                 goto err_out_iounmap;
2773         }
2774
2775         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2776         if (hp->hm_revision == 0xff)
2777                 hp->hm_revision = 0xa0;
2778
2779         /* Now enable the feature flags we can. */
2780         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2781                 hp->happy_flags = HFLAG_20_21;
2782         else if (hp->hm_revision != 0xa0)
2783                 hp->happy_flags = HFLAG_NOT_A0;
2784
2785         if (qp != NULL)
2786                 hp->happy_flags |= HFLAG_QUATTRO;
2787
2788         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2789         hp->happy_bursts = of_getintprop_default(sdev->bus->ofdev.node,
2790                                                  "burst-sizes", 0x00);
2791
2792         hp->happy_block = sbus_alloc_consistent(hp->happy_dev,
2793                                                 PAGE_SIZE,
2794                                                 &hp->hblock_dvma);
2795         err = -ENOMEM;
2796         if (!hp->happy_block) {
2797                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2798                 goto err_out_iounmap;
2799         }
2800
2801         /* Force check of the link first time we are brought up. */
2802         hp->linkcheck = 0;
2803
2804         /* Force timer state to 'asleep' with count of zero. */
2805         hp->timer_state = asleep;
2806         hp->timer_ticks = 0;
2807
2808         init_timer(&hp->happy_timer);
2809
2810         hp->dev = dev;
2811         dev->open = &happy_meal_open;
2812         dev->stop = &happy_meal_close;
2813         dev->hard_start_xmit = &happy_meal_start_xmit;
2814         dev->get_stats = &happy_meal_get_stats;
2815         dev->set_multicast_list = &happy_meal_set_multicast;
2816         dev->tx_timeout = &happy_meal_tx_timeout;
2817         dev->watchdog_timeo = 5*HZ;
2818         dev->ethtool_ops = &hme_ethtool_ops;
2819
2820         /* Happy Meal can do it all... */
2821         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2822
2823         dev->irq = sdev->irqs[0];
2824
2825 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2826         /* Hook up PCI register/dma accessors. */
2827         hp->read_desc32 = sbus_hme_read_desc32;
2828         hp->write_txd = sbus_hme_write_txd;
2829         hp->write_rxd = sbus_hme_write_rxd;
2830         hp->dma_map = (u32 (*)(void *, void *, long, int))sbus_map_single;
2831         hp->dma_unmap = (void (*)(void *, u32, long, int))sbus_unmap_single;
2832         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
2833                 sbus_dma_sync_single_for_cpu;
2834         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
2835                 sbus_dma_sync_single_for_device;
2836         hp->read32 = sbus_hme_read32;
2837         hp->write32 = sbus_hme_write32;
2838 #endif
2839
2840         /* Grrr, Happy Meal comes up by default not advertising
2841          * full duplex 100baseT capabilities, fix this.
2842          */
2843         spin_lock_irq(&hp->happy_lock);
2844         happy_meal_set_initial_advertisement(hp);
2845         spin_unlock_irq(&hp->happy_lock);
2846
2847         if (register_netdev(hp->dev)) {
2848                 printk(KERN_ERR "happymeal: Cannot register net device, "
2849                        "aborting.\n");
2850                 goto err_out_free_consistent;
2851         }
2852
2853         dev_set_drvdata(&sdev->ofdev.dev, hp);
2854
2855         if (qfe_slot != -1)
2856                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2857                        dev->name, qfe_slot);
2858         else
2859                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2860                        dev->name);
2861
2862         printk("%s\n", print_mac(mac, dev->dev_addr));
2863
2864         return 0;
2865
2866 err_out_free_consistent:
2867         sbus_free_consistent(hp->happy_dev,
2868                              PAGE_SIZE,
2869                              hp->happy_block,
2870                              hp->hblock_dvma);
2871
2872 err_out_iounmap:
2873         if (hp->gregs)
2874                 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2875         if (hp->etxregs)
2876                 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2877         if (hp->erxregs)
2878                 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2879         if (hp->bigmacregs)
2880                 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2881         if (hp->tcvregs)
2882                 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2883
2884 err_out_free_netdev:
2885         free_netdev(dev);
2886
2887 err_out:
2888         return err;
2889 }
2890 #endif
2891
2892 #ifdef CONFIG_PCI
2893 #ifndef CONFIG_SPARC
2894 static int is_quattro_p(struct pci_dev *pdev)
2895 {
2896         struct pci_dev *busdev = pdev->bus->self;
2897         struct list_head *tmp;
2898         int n_hmes;
2899
2900         if (busdev == NULL ||
2901             busdev->vendor != PCI_VENDOR_ID_DEC ||
2902             busdev->device != PCI_DEVICE_ID_DEC_21153)
2903                 return 0;
2904
2905         n_hmes = 0;
2906         tmp = pdev->bus->devices.next;
2907         while (tmp != &pdev->bus->devices) {
2908                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2909
2910                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2911                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2912                         n_hmes++;
2913
2914                 tmp = tmp->next;
2915         }
2916
2917         if (n_hmes != 4)
2918                 return 0;
2919
2920         return 1;
2921 }
2922
2923 /* Fetch MAC address from vital product data of PCI ROM. */
2924 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2925 {
2926         int this_offset;
2927
2928         for (this_offset = 0x20; this_offset < len; this_offset++) {
2929                 void __iomem *p = rom_base + this_offset;
2930
2931                 if (readb(p + 0) != 0x90 ||
2932                     readb(p + 1) != 0x00 ||
2933                     readb(p + 2) != 0x09 ||
2934                     readb(p + 3) != 0x4e ||
2935                     readb(p + 4) != 0x41 ||
2936                     readb(p + 5) != 0x06)
2937                         continue;
2938
2939                 this_offset += 6;
2940                 p += 6;
2941
2942                 if (index == 0) {
2943                         int i;
2944
2945                         for (i = 0; i < 6; i++)
2946                                 dev_addr[i] = readb(p + i);
2947                         return 1;
2948                 }
2949                 index--;
2950         }
2951         return 0;
2952 }
2953
2954 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2955 {
2956         size_t size;
2957         void __iomem *p = pci_map_rom(pdev, &size);
2958
2959         if (p) {
2960                 int index = 0;
2961                 int found;
2962
2963                 if (is_quattro_p(pdev))
2964                         index = PCI_SLOT(pdev->devfn);
2965
2966                 found = readb(p) == 0x55 &&
2967                         readb(p + 1) == 0xaa &&
2968                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2969                 pci_unmap_rom(pdev, p);
2970                 if (found)
2971                         return;
2972         }
2973
2974         /* Sun MAC prefix then 3 random bytes. */
2975         dev_addr[0] = 0x08;
2976         dev_addr[1] = 0x00;
2977         dev_addr[2] = 0x20;
2978         get_random_bytes(&dev_addr[3], 3);
2979         return;
2980 }
2981 #endif /* !(CONFIG_SPARC) */
2982
2983 static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2984                                           const struct pci_device_id *ent)
2985 {
2986         struct quattro *qp = NULL;
2987 #ifdef CONFIG_SPARC
2988         struct device_node *dp;
2989 #endif
2990         struct happy_meal *hp;
2991         struct net_device *dev;
2992         void __iomem *hpreg_base;
2993         unsigned long hpreg_res;
2994         int i, qfe_slot = -1;
2995         char prom_name[64];
2996         int err;
2997         DECLARE_MAC_BUF(mac);
2998
2999         /* Now make sure pci_dev cookie is there. */
3000 #ifdef CONFIG_SPARC
3001         dp = pci_device_to_OF_node(pdev);
3002         strcpy(prom_name, dp->name);
3003 #else
3004         if (is_quattro_p(pdev))
3005                 strcpy(prom_name, "SUNW,qfe");
3006         else
3007                 strcpy(prom_name, "SUNW,hme");
3008 #endif
3009
3010         err = -ENODEV;
3011
3012         if (pci_enable_device(pdev))
3013                 goto err_out;
3014         pci_set_master(pdev);
3015
3016         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3017                 qp = quattro_pci_find(pdev);
3018                 if (qp == NULL)
3019                         goto err_out;
3020                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3021                         if (qp->happy_meals[qfe_slot] == NULL)
3022                                 break;
3023                 if (qfe_slot == 4)
3024                         goto err_out;
3025         }
3026
3027         dev = alloc_etherdev(sizeof(struct happy_meal));
3028         err = -ENOMEM;
3029         if (!dev)
3030                 goto err_out;
3031         SET_NETDEV_DEV(dev, &pdev->dev);
3032
3033         if (hme_version_printed++ == 0)
3034                 printk(KERN_INFO "%s", version);
3035
3036         dev->base_addr = (long) pdev;
3037
3038         hp = (struct happy_meal *)dev->priv;
3039         memset(hp, 0, sizeof(*hp));
3040
3041         hp->happy_dev = pdev;
3042
3043         spin_lock_init(&hp->happy_lock);
3044
3045         if (qp != NULL) {
3046                 hp->qfe_parent = qp;
3047                 hp->qfe_ent = qfe_slot;
3048                 qp->happy_meals[qfe_slot] = dev;
3049         }
3050
3051         hpreg_res = pci_resource_start(pdev, 0);
3052         err = -ENODEV;
3053         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3054                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3055                 goto err_out_clear_quattro;
3056         }
3057         if (pci_request_regions(pdev, DRV_NAME)) {
3058                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3059                        "aborting.\n");
3060                 goto err_out_clear_quattro;
3061         }
3062
3063         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3064                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3065                 goto err_out_free_res;
3066         }
3067
3068         for (i = 0; i < 6; i++) {
3069                 if (macaddr[i] != 0)
3070                         break;
3071         }
3072         if (i < 6) { /* a mac address was given */
3073                 for (i = 0; i < 6; i++)
3074                         dev->dev_addr[i] = macaddr[i];
3075                 macaddr[5]++;
3076         } else {
3077 #ifdef CONFIG_SPARC
3078                 const unsigned char *addr;
3079                 int len;
3080
3081                 if (qfe_slot != -1 &&
3082                     (addr = of_get_property(dp,
3083                                             "local-mac-address", &len)) != NULL
3084                     && len == 6) {
3085                         memcpy(dev->dev_addr, addr, 6);
3086                 } else {
3087                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3088                 }
3089 #else
3090                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3091 #endif
3092         }
3093
3094         /* Layout registers. */
3095         hp->gregs      = (hpreg_base + 0x0000UL);
3096         hp->etxregs    = (hpreg_base + 0x2000UL);
3097         hp->erxregs    = (hpreg_base + 0x4000UL);
3098         hp->bigmacregs = (hpreg_base + 0x6000UL);
3099         hp->tcvregs    = (hpreg_base + 0x7000UL);
3100
3101 #ifdef CONFIG_SPARC
3102         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3103         if (hp->hm_revision == 0xff)
3104                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3105 #else
3106         /* works with this on non-sparc hosts */
3107         hp->hm_revision = 0x20;
3108 #endif
3109
3110         /* Now enable the feature flags we can. */
3111         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3112                 hp->happy_flags = HFLAG_20_21;
3113         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3114                 hp->happy_flags = HFLAG_NOT_A0;
3115
3116         if (qp != NULL)
3117                 hp->happy_flags |= HFLAG_QUATTRO;
3118
3119         /* And of course, indicate this is PCI. */
3120         hp->happy_flags |= HFLAG_PCI;
3121
3122 #ifdef CONFIG_SPARC
3123         /* Assume PCI happy meals can handle all burst sizes. */
3124         hp->happy_bursts = DMA_BURSTBITS;
3125 #endif
3126
3127         hp->happy_block = (struct hmeal_init_block *)
3128                 pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3129
3130         err = -ENODEV;
3131         if (!hp->happy_block) {
3132                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3133                 goto err_out_iounmap;
3134         }
3135
3136         hp->linkcheck = 0;
3137         hp->timer_state = asleep;
3138         hp->timer_ticks = 0;
3139
3140         init_timer(&hp->happy_timer);
3141
3142         hp->dev = dev;
3143         dev->open = &happy_meal_open;
3144         dev->stop = &happy_meal_close;
3145         dev->hard_start_xmit = &happy_meal_start_xmit;
3146         dev->get_stats = &happy_meal_get_stats;
3147         dev->set_multicast_list = &happy_meal_set_multicast;
3148         dev->tx_timeout = &happy_meal_tx_timeout;
3149         dev->watchdog_timeo = 5*HZ;
3150         dev->ethtool_ops = &hme_ethtool_ops;
3151         dev->irq = pdev->irq;
3152         dev->dma = 0;
3153
3154         /* Happy Meal can do it all... */
3155         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3156
3157 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3158         /* Hook up PCI register/dma accessors. */
3159         hp->read_desc32 = pci_hme_read_desc32;
3160         hp->write_txd = pci_hme_write_txd;
3161         hp->write_rxd = pci_hme_write_rxd;
3162         hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3163         hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3164         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
3165                 pci_dma_sync_single_for_cpu;
3166         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
3167                 pci_dma_sync_single_for_device;
3168         hp->read32 = pci_hme_read32;
3169         hp->write32 = pci_hme_write32;
3170 #endif
3171
3172         /* Grrr, Happy Meal comes up by default not advertising
3173          * full duplex 100baseT capabilities, fix this.
3174          */
3175         spin_lock_irq(&hp->happy_lock);
3176         happy_meal_set_initial_advertisement(hp);
3177         spin_unlock_irq(&hp->happy_lock);
3178
3179         if (register_netdev(hp->dev)) {
3180                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3181                        "aborting.\n");
3182                 goto err_out_iounmap;
3183         }
3184
3185         dev_set_drvdata(&pdev->dev, hp);
3186
3187         if (!qfe_slot) {
3188                 struct pci_dev *qpdev = qp->quattro_dev;
3189
3190                 prom_name[0] = 0;
3191                 if (!strncmp(dev->name, "eth", 3)) {
3192                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3193                         sprintf(prom_name, "-%d", i + 3);
3194                 }
3195                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3196                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3197                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3198                         printk("DEC 21153 PCI Bridge\n");
3199                 else
3200                         printk("unknown bridge %04x.%04x\n",
3201                                 qpdev->vendor, qpdev->device);
3202         }
3203
3204         if (qfe_slot != -1)
3205                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3206                        dev->name, qfe_slot);
3207         else
3208                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3209                        dev->name);
3210
3211         printk("%s\n", print_mac(mac, dev->dev_addr));
3212
3213         return 0;
3214
3215 err_out_iounmap:
3216         iounmap(hp->gregs);
3217
3218 err_out_free_res:
3219         pci_release_regions(pdev);
3220
3221 err_out_clear_quattro:
3222         if (qp != NULL)
3223                 qp->happy_meals[qfe_slot] = NULL;
3224
3225         free_netdev(dev);
3226
3227 err_out:
3228         return err;
3229 }
3230
3231 static void __devexit happy_meal_pci_remove(struct pci_dev *pdev)
3232 {
3233         struct happy_meal *hp = dev_get_drvdata(&pdev->dev);
3234         struct net_device *net_dev = hp->dev;
3235
3236         unregister_netdev(net_dev);
3237
3238         pci_free_consistent(hp->happy_dev,
3239                             PAGE_SIZE,
3240                             hp->happy_block,
3241                             hp->hblock_dvma);
3242         iounmap(hp->gregs);
3243         pci_release_regions(hp->happy_dev);
3244
3245         free_netdev(net_dev);
3246
3247         dev_set_drvdata(&pdev->dev, NULL);
3248 }
3249
3250 static struct pci_device_id happymeal_pci_ids[] = {
3251         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3252         { }                     /* Terminating entry */
3253 };
3254
3255 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3256
3257 static struct pci_driver hme_pci_driver = {
3258         .name           = "hme",
3259         .id_table       = happymeal_pci_ids,
3260         .probe          = happy_meal_pci_probe,
3261         .remove         = __devexit_p(happy_meal_pci_remove),
3262 };
3263
3264 static int __init happy_meal_pci_init(void)
3265 {
3266         return pci_register_driver(&hme_pci_driver);
3267 }
3268
3269 static void happy_meal_pci_exit(void)
3270 {
3271         pci_unregister_driver(&hme_pci_driver);
3272
3273         while (qfe_pci_list) {
3274                 struct quattro *qfe = qfe_pci_list;
3275                 struct quattro *next = qfe->next;
3276
3277                 kfree(qfe);
3278
3279                 qfe_pci_list = next;
3280         }
3281 }
3282
3283 #endif
3284
3285 #ifdef CONFIG_SBUS
3286 static int __devinit hme_sbus_probe(struct of_device *dev, const struct of_device_id *match)
3287 {
3288         struct sbus_dev *sdev = to_sbus_device(&dev->dev);
3289         struct device_node *dp = dev->node;
3290         const char *model = of_get_property(dp, "model", NULL);
3291         int is_qfe = (match->data != NULL);
3292
3293         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3294                 is_qfe = 1;
3295
3296         return happy_meal_sbus_probe_one(sdev, is_qfe);
3297 }
3298
3299 static int __devexit hme_sbus_remove(struct of_device *dev)
3300 {
3301         struct happy_meal *hp = dev_get_drvdata(&dev->dev);
3302         struct net_device *net_dev = hp->dev;
3303
3304         unregister_netdev(net_dev);
3305
3306         /* XXX qfe parent interrupt... */
3307
3308         sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3309         sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3310         sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3311         sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3312         sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3313         sbus_free_consistent(hp->happy_dev,
3314                              PAGE_SIZE,
3315                              hp->happy_block,
3316                              hp->hblock_dvma);
3317
3318         free_netdev(net_dev);
3319
3320         dev_set_drvdata(&dev->dev, NULL);
3321
3322         return 0;
3323 }
3324
3325 static struct of_device_id hme_sbus_match[] = {
3326         {
3327                 .name = "SUNW,hme",
3328         },
3329         {
3330                 .name = "SUNW,qfe",
3331                 .data = (void *) 1,
3332         },
3333         {
3334                 .name = "qfe",
3335                 .data = (void *) 1,
3336         },
3337         {},
3338 };
3339
3340 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3341
3342 static struct of_platform_driver hme_sbus_driver = {
3343         .name           = "hme",
3344         .match_table    = hme_sbus_match,
3345         .probe          = hme_sbus_probe,
3346         .remove         = __devexit_p(hme_sbus_remove),
3347 };
3348
3349 static int __init happy_meal_sbus_init(void)
3350 {
3351         int err;
3352
3353         err = of_register_driver(&hme_sbus_driver, &sbus_bus_type);
3354         if (!err)
3355                 quattro_sbus_register_irqs();
3356
3357         return err;
3358 }
3359
3360 static void happy_meal_sbus_exit(void)
3361 {
3362         of_unregister_driver(&hme_sbus_driver);
3363         quattro_sbus_free_irqs();
3364
3365         while (qfe_sbus_list) {
3366                 struct quattro *qfe = qfe_sbus_list;
3367                 struct quattro *next = qfe->next;
3368
3369                 kfree(qfe);
3370
3371                 qfe_sbus_list = next;
3372         }
3373 }
3374 #endif
3375
3376 static int __init happy_meal_probe(void)
3377 {
3378         int err = 0;
3379
3380 #ifdef CONFIG_SBUS
3381         err = happy_meal_sbus_init();
3382 #endif
3383 #ifdef CONFIG_PCI
3384         if (!err) {
3385                 err = happy_meal_pci_init();
3386 #ifdef CONFIG_SBUS
3387                 if (err)
3388                         happy_meal_sbus_exit();
3389 #endif
3390         }
3391 #endif
3392
3393         return err;
3394 }
3395
3396
3397 static void __exit happy_meal_exit(void)
3398 {
3399 #ifdef CONFIG_SBUS
3400         happy_meal_sbus_exit();
3401 #endif
3402 #ifdef CONFIG_PCI
3403         happy_meal_pci_exit();
3404 #endif
3405 }
3406
3407 module_init(happy_meal_probe);
3408 module_exit(happy_meal_exit);