net: wireless: bcmdhd: Allow Improved suspend/resume processing on 2.6.39
[linux-2.6.git] / drivers / net / sunhme.c
1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
2  *           auto carrier detecting ethernet driver.  Also known as the
3  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
4  *
5  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
6  *              2006, 2008 David S. Miller (davem@davemloft.net)
7  *
8  * Changes :
9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10  *   - port to non-sparc architectures. Tested only on x86 and
11  *     only currently works with QFE PCI cards.
12  *   - ability to specify the MAC address at module load time by passing this
13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
14  */
15
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/fcntl.h>
20 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ethtool.h>
28 #include <linux/mii.h>
29 #include <linux/crc32.h>
30 #include <linux/random.h>
31 #include <linux/errno.h>
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <linux/mm.h>
36 #include <linux/bitops.h>
37 #include <linux/dma-mapping.h>
38
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/dma.h>
42 #include <asm/byteorder.h>
43
44 #ifdef CONFIG_SPARC
45 #include <linux/of.h>
46 #include <linux/of_device.h>
47 #include <asm/idprom.h>
48 #include <asm/openprom.h>
49 #include <asm/oplib.h>
50 #include <asm/prom.h>
51 #include <asm/auxio.h>
52 #endif
53 #include <asm/uaccess.h>
54
55 #include <asm/pgtable.h>
56 #include <asm/irq.h>
57
58 #ifdef CONFIG_PCI
59 #include <linux/pci.h>
60 #endif
61
62 #include "sunhme.h"
63
64 #define DRV_NAME        "sunhme"
65 #define DRV_VERSION     "3.10"
66 #define DRV_RELDATE     "August 26, 2008"
67 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
68
69 static char version[] =
70         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
71
72 MODULE_VERSION(DRV_VERSION);
73 MODULE_AUTHOR(DRV_AUTHOR);
74 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
75 MODULE_LICENSE("GPL");
76
77 static int macaddr[6];
78
79 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
80 module_param_array(macaddr, int, NULL, 0);
81 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
82
83 #ifdef CONFIG_SBUS
84 static struct quattro *qfe_sbus_list;
85 #endif
86
87 #ifdef CONFIG_PCI
88 static struct quattro *qfe_pci_list;
89 #endif
90
91 #undef HMEDEBUG
92 #undef SXDEBUG
93 #undef RXDEBUG
94 #undef TXDEBUG
95 #undef TXLOGGING
96
97 #ifdef TXLOGGING
98 struct hme_tx_logent {
99         unsigned int tstamp;
100         int tx_new, tx_old;
101         unsigned int action;
102 #define TXLOG_ACTION_IRQ        0x01
103 #define TXLOG_ACTION_TXMIT      0x02
104 #define TXLOG_ACTION_TBUSY      0x04
105 #define TXLOG_ACTION_NBUFS      0x08
106         unsigned int status;
107 };
108 #define TX_LOG_LEN      128
109 static struct hme_tx_logent tx_log[TX_LOG_LEN];
110 static int txlog_cur_entry;
111 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
112 {
113         struct hme_tx_logent *tlp;
114         unsigned long flags;
115
116         local_irq_save(flags);
117         tlp = &tx_log[txlog_cur_entry];
118         tlp->tstamp = (unsigned int)jiffies;
119         tlp->tx_new = hp->tx_new;
120         tlp->tx_old = hp->tx_old;
121         tlp->action = a;
122         tlp->status = s;
123         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
124         local_irq_restore(flags);
125 }
126 static __inline__ void tx_dump_log(void)
127 {
128         int i, this;
129
130         this = txlog_cur_entry;
131         for (i = 0; i < TX_LOG_LEN; i++) {
132                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
133                        tx_log[this].tstamp,
134                        tx_log[this].tx_new, tx_log[this].tx_old,
135                        tx_log[this].action, tx_log[this].status);
136                 this = (this + 1) & (TX_LOG_LEN - 1);
137         }
138 }
139 static __inline__ void tx_dump_ring(struct happy_meal *hp)
140 {
141         struct hmeal_init_block *hb = hp->happy_block;
142         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
143         int i;
144
145         for (i = 0; i < TX_RING_SIZE; i+=4) {
146                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
147                        i, i + 4,
148                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
149                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
150                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
151                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
152         }
153 }
154 #else
155 #define tx_add_log(hp, a, s)            do { } while(0)
156 #define tx_dump_log()                   do { } while(0)
157 #define tx_dump_ring(hp)                do { } while(0)
158 #endif
159
160 #ifdef HMEDEBUG
161 #define HMD(x)  printk x
162 #else
163 #define HMD(x)
164 #endif
165
166 /* #define AUTO_SWITCH_DEBUG */
167
168 #ifdef AUTO_SWITCH_DEBUG
169 #define ASD(x)  printk x
170 #else
171 #define ASD(x)
172 #endif
173
174 #define DEFAULT_IPG0      16 /* For lance-mode only */
175 #define DEFAULT_IPG1       8 /* For all modes */
176 #define DEFAULT_IPG2       4 /* For all modes */
177 #define DEFAULT_JAMSIZE    4 /* Toe jam */
178
179 /* NOTE: In the descriptor writes one _must_ write the address
180  *       member _first_.  The card must not be allowed to see
181  *       the updated descriptor flags until the address is
182  *       correct.  I've added a write memory barrier between
183  *       the two stores so that I can sleep well at night... -DaveM
184  */
185
186 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
187 static void sbus_hme_write32(void __iomem *reg, u32 val)
188 {
189         sbus_writel(val, reg);
190 }
191
192 static u32 sbus_hme_read32(void __iomem *reg)
193 {
194         return sbus_readl(reg);
195 }
196
197 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
198 {
199         rxd->rx_addr = (__force hme32)addr;
200         wmb();
201         rxd->rx_flags = (__force hme32)flags;
202 }
203
204 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
205 {
206         txd->tx_addr = (__force hme32)addr;
207         wmb();
208         txd->tx_flags = (__force hme32)flags;
209 }
210
211 static u32 sbus_hme_read_desc32(hme32 *p)
212 {
213         return (__force u32)*p;
214 }
215
216 static void pci_hme_write32(void __iomem *reg, u32 val)
217 {
218         writel(val, reg);
219 }
220
221 static u32 pci_hme_read32(void __iomem *reg)
222 {
223         return readl(reg);
224 }
225
226 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
227 {
228         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
229         wmb();
230         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
231 }
232
233 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
234 {
235         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
236         wmb();
237         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
238 }
239
240 static u32 pci_hme_read_desc32(hme32 *p)
241 {
242         return le32_to_cpup((__le32 *)p);
243 }
244
245 #define hme_write32(__hp, __reg, __val) \
246         ((__hp)->write32((__reg), (__val)))
247 #define hme_read32(__hp, __reg) \
248         ((__hp)->read32(__reg))
249 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
250         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
251 #define hme_write_txd(__hp, __txd, __flags, __addr) \
252         ((__hp)->write_txd((__txd), (__flags), (__addr)))
253 #define hme_read_desc32(__hp, __p) \
254         ((__hp)->read_desc32(__p))
255 #define hme_dma_map(__hp, __ptr, __size, __dir) \
256         ((__hp)->dma_map((__hp)->dma_dev, (__ptr), (__size), (__dir)))
257 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
258         ((__hp)->dma_unmap((__hp)->dma_dev, (__addr), (__size), (__dir)))
259 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
260         ((__hp)->dma_sync_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir)))
261 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
262         ((__hp)->dma_sync_for_device((__hp)->dma_dev, (__addr), (__size), (__dir)))
263 #else
264 #ifdef CONFIG_SBUS
265 /* SBUS only compilation */
266 #define hme_write32(__hp, __reg, __val) \
267         sbus_writel((__val), (__reg))
268 #define hme_read32(__hp, __reg) \
269         sbus_readl(__reg)
270 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
271 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
272         wmb(); \
273         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
274 } while(0)
275 #define hme_write_txd(__hp, __txd, __flags, __addr) \
276 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
277         wmb(); \
278         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
279 } while(0)
280 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
281 #define hme_dma_map(__hp, __ptr, __size, __dir) \
282         dma_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
283 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
284         dma_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
285 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
286         dma_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
287 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
288         dma_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
289 #else
290 /* PCI only compilation */
291 #define hme_write32(__hp, __reg, __val) \
292         writel((__val), (__reg))
293 #define hme_read32(__hp, __reg) \
294         readl(__reg)
295 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
296 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
297         wmb(); \
298         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
299 } while(0)
300 #define hme_write_txd(__hp, __txd, __flags, __addr) \
301 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
302         wmb(); \
303         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
304 } while(0)
305 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
306 {
307         return le32_to_cpup((__le32 *)p);
308 }
309 #define hme_dma_map(__hp, __ptr, __size, __dir) \
310         pci_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
311 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
312         pci_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
313 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
314         pci_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
315 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
316         pci_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
317 #endif
318 #endif
319
320
321 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
322 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
323 {
324         hme_write32(hp, tregs + TCVR_BBDATA, bit);
325         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
326         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
327 }
328
329 #if 0
330 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
331 {
332         u32 ret;
333
334         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
335         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
336         ret = hme_read32(hp, tregs + TCVR_CFG);
337         if (internal)
338                 ret &= TCV_CFG_MDIO0;
339         else
340                 ret &= TCV_CFG_MDIO1;
341
342         return ret;
343 }
344 #endif
345
346 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
347 {
348         u32 retval;
349
350         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
351         udelay(1);
352         retval = hme_read32(hp, tregs + TCVR_CFG);
353         if (internal)
354                 retval &= TCV_CFG_MDIO0;
355         else
356                 retval &= TCV_CFG_MDIO1;
357         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
358
359         return retval;
360 }
361
362 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
363
364 static int happy_meal_bb_read(struct happy_meal *hp,
365                               void __iomem *tregs, int reg)
366 {
367         u32 tmp;
368         int retval = 0;
369         int i;
370
371         ASD(("happy_meal_bb_read: reg=%d ", reg));
372
373         /* Enable the MIF BitBang outputs. */
374         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
375
376         /* Force BitBang into the idle state. */
377         for (i = 0; i < 32; i++)
378                 BB_PUT_BIT(hp, tregs, 1);
379
380         /* Give it the read sequence. */
381         BB_PUT_BIT(hp, tregs, 0);
382         BB_PUT_BIT(hp, tregs, 1);
383         BB_PUT_BIT(hp, tregs, 1);
384         BB_PUT_BIT(hp, tregs, 0);
385
386         /* Give it the PHY address. */
387         tmp = hp->paddr & 0xff;
388         for (i = 4; i >= 0; i--)
389                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
390
391         /* Tell it what register we want to read. */
392         tmp = (reg & 0xff);
393         for (i = 4; i >= 0; i--)
394                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
395
396         /* Close down the MIF BitBang outputs. */
397         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
398
399         /* Now read in the value. */
400         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
401         for (i = 15; i >= 0; i--)
402                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
403         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
404         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
405         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
406         ASD(("value=%x\n", retval));
407         return retval;
408 }
409
410 static void happy_meal_bb_write(struct happy_meal *hp,
411                                 void __iomem *tregs, int reg,
412                                 unsigned short value)
413 {
414         u32 tmp;
415         int i;
416
417         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
418
419         /* Enable the MIF BitBang outputs. */
420         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
421
422         /* Force BitBang into the idle state. */
423         for (i = 0; i < 32; i++)
424                 BB_PUT_BIT(hp, tregs, 1);
425
426         /* Give it write sequence. */
427         BB_PUT_BIT(hp, tregs, 0);
428         BB_PUT_BIT(hp, tregs, 1);
429         BB_PUT_BIT(hp, tregs, 0);
430         BB_PUT_BIT(hp, tregs, 1);
431
432         /* Give it the PHY address. */
433         tmp = (hp->paddr & 0xff);
434         for (i = 4; i >= 0; i--)
435                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
436
437         /* Tell it what register we will be writing. */
438         tmp = (reg & 0xff);
439         for (i = 4; i >= 0; i--)
440                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
441
442         /* Tell it to become ready for the bits. */
443         BB_PUT_BIT(hp, tregs, 1);
444         BB_PUT_BIT(hp, tregs, 0);
445
446         for (i = 15; i >= 0; i--)
447                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
448
449         /* Close down the MIF BitBang outputs. */
450         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
451 }
452
453 #define TCVR_READ_TRIES   16
454
455 static int happy_meal_tcvr_read(struct happy_meal *hp,
456                                 void __iomem *tregs, int reg)
457 {
458         int tries = TCVR_READ_TRIES;
459         int retval;
460
461         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
462         if (hp->tcvr_type == none) {
463                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
464                 return TCVR_FAILURE;
465         }
466
467         if (!(hp->happy_flags & HFLAG_FENABLE)) {
468                 ASD(("doing bit bang\n"));
469                 return happy_meal_bb_read(hp, tregs, reg);
470         }
471
472         hme_write32(hp, tregs + TCVR_FRAME,
473                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
474         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
475                 udelay(20);
476         if (!tries) {
477                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
478                 return TCVR_FAILURE;
479         }
480         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
481         ASD(("value=%04x\n", retval));
482         return retval;
483 }
484
485 #define TCVR_WRITE_TRIES  16
486
487 static void happy_meal_tcvr_write(struct happy_meal *hp,
488                                   void __iomem *tregs, int reg,
489                                   unsigned short value)
490 {
491         int tries = TCVR_WRITE_TRIES;
492
493         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
494
495         /* Welcome to Sun Microsystems, can I take your order please? */
496         if (!(hp->happy_flags & HFLAG_FENABLE)) {
497                 happy_meal_bb_write(hp, tregs, reg, value);
498                 return;
499         }
500
501         /* Would you like fries with that? */
502         hme_write32(hp, tregs + TCVR_FRAME,
503                     (FRAME_WRITE | (hp->paddr << 23) |
504                      ((reg & 0xff) << 18) | (value & 0xffff)));
505         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
506                 udelay(20);
507
508         /* Anything else? */
509         if (!tries)
510                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
511
512         /* Fifty-two cents is your change, have a nice day. */
513 }
514
515 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
516  * that keeps watching the auto negotiation process as it progresses.
517  * The DP83840 is first told to start doing it's thing, we set up the time
518  * and place the timer state machine in it's initial state.
519  *
520  * Here the timer peeks at the DP83840 status registers at each click to see
521  * if the auto negotiation has completed, we assume here that the DP83840 PHY
522  * will time out at some point and just tell us what (didn't) happen.  For
523  * complete coverage we only allow so many of the ticks at this level to run,
524  * when this has expired we print a warning message and try another strategy.
525  * This "other" strategy is to force the interface into various speed/duplex
526  * configurations and we stop when we see a link-up condition before the
527  * maximum number of "peek" ticks have occurred.
528  *
529  * Once a valid link status has been detected we configure the BigMAC and
530  * the rest of the Happy Meal to speak the most efficient protocol we could
531  * get a clean link for.  The priority for link configurations, highest first
532  * is:
533  *                 100 Base-T Full Duplex
534  *                 100 Base-T Half Duplex
535  *                 10 Base-T Full Duplex
536  *                 10 Base-T Half Duplex
537  *
538  * We start a new timer now, after a successful auto negotiation status has
539  * been detected.  This timer just waits for the link-up bit to get set in
540  * the BMCR of the DP83840.  When this occurs we print a kernel log message
541  * describing the link type in use and the fact that it is up.
542  *
543  * If a fatal error of some sort is signalled and detected in the interrupt
544  * service routine, and the chip is reset, or the link is ifconfig'd down
545  * and then back up, this entire process repeats itself all over again.
546  */
547 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
548 {
549         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
550
551         /* Downgrade from full to half duplex.  Only possible
552          * via ethtool.
553          */
554         if (hp->sw_bmcr & BMCR_FULLDPLX) {
555                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
556                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
557                 return 0;
558         }
559
560         /* Downgrade from 100 to 10. */
561         if (hp->sw_bmcr & BMCR_SPEED100) {
562                 hp->sw_bmcr &= ~(BMCR_SPEED100);
563                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
564                 return 0;
565         }
566
567         /* We've tried everything. */
568         return -1;
569 }
570
571 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
572 {
573         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
574         if (hp->tcvr_type == external)
575                 printk("external ");
576         else
577                 printk("internal ");
578         printk("transceiver at ");
579         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
580         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
581                 if (hp->sw_lpa & LPA_100FULL)
582                         printk("100Mb/s, Full Duplex.\n");
583                 else
584                         printk("100Mb/s, Half Duplex.\n");
585         } else {
586                 if (hp->sw_lpa & LPA_10FULL)
587                         printk("10Mb/s, Full Duplex.\n");
588                 else
589                         printk("10Mb/s, Half Duplex.\n");
590         }
591 }
592
593 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
594 {
595         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
596         if (hp->tcvr_type == external)
597                 printk("external ");
598         else
599                 printk("internal ");
600         printk("transceiver at ");
601         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
602         if (hp->sw_bmcr & BMCR_SPEED100)
603                 printk("100Mb/s, ");
604         else
605                 printk("10Mb/s, ");
606         if (hp->sw_bmcr & BMCR_FULLDPLX)
607                 printk("Full Duplex.\n");
608         else
609                 printk("Half Duplex.\n");
610 }
611
612 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
613 {
614         int full;
615
616         /* All we care about is making sure the bigmac tx_cfg has a
617          * proper duplex setting.
618          */
619         if (hp->timer_state == arbwait) {
620                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
621                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
622                         goto no_response;
623                 if (hp->sw_lpa & LPA_100FULL)
624                         full = 1;
625                 else if (hp->sw_lpa & LPA_100HALF)
626                         full = 0;
627                 else if (hp->sw_lpa & LPA_10FULL)
628                         full = 1;
629                 else
630                         full = 0;
631         } else {
632                 /* Forcing a link mode. */
633                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
634                 if (hp->sw_bmcr & BMCR_FULLDPLX)
635                         full = 1;
636                 else
637                         full = 0;
638         }
639
640         /* Before changing other bits in the tx_cfg register, and in
641          * general any of other the TX config registers too, you
642          * must:
643          * 1) Clear Enable
644          * 2) Poll with reads until that bit reads back as zero
645          * 3) Make TX configuration changes
646          * 4) Set Enable once more
647          */
648         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
649                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
650                     ~(BIGMAC_TXCFG_ENABLE));
651         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
652                 barrier();
653         if (full) {
654                 hp->happy_flags |= HFLAG_FULL;
655                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
656                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
657                             BIGMAC_TXCFG_FULLDPLX);
658         } else {
659                 hp->happy_flags &= ~(HFLAG_FULL);
660                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
661                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
662                             ~(BIGMAC_TXCFG_FULLDPLX));
663         }
664         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
665                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
666                     BIGMAC_TXCFG_ENABLE);
667         return 0;
668 no_response:
669         return 1;
670 }
671
672 static int happy_meal_init(struct happy_meal *hp);
673
674 static int is_lucent_phy(struct happy_meal *hp)
675 {
676         void __iomem *tregs = hp->tcvregs;
677         unsigned short mr2, mr3;
678         int ret = 0;
679
680         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
681         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
682         if ((mr2 & 0xffff) == 0x0180 &&
683             ((mr3 & 0xffff) >> 10) == 0x1d)
684                 ret = 1;
685
686         return ret;
687 }
688
689 static void happy_meal_timer(unsigned long data)
690 {
691         struct happy_meal *hp = (struct happy_meal *) data;
692         void __iomem *tregs = hp->tcvregs;
693         int restart_timer = 0;
694
695         spin_lock_irq(&hp->happy_lock);
696
697         hp->timer_ticks++;
698         switch(hp->timer_state) {
699         case arbwait:
700                 /* Only allow for 5 ticks, thats 10 seconds and much too
701                  * long to wait for arbitration to complete.
702                  */
703                 if (hp->timer_ticks >= 10) {
704                         /* Enter force mode. */
705         do_force_mode:
706                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
707                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
708                                hp->dev->name);
709                         hp->sw_bmcr = BMCR_SPEED100;
710                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
711
712                         if (!is_lucent_phy(hp)) {
713                                 /* OK, seems we need do disable the transceiver for the first
714                                  * tick to make sure we get an accurate link state at the
715                                  * second tick.
716                                  */
717                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
718                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
719                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
720                         }
721                         hp->timer_state = ltrywait;
722                         hp->timer_ticks = 0;
723                         restart_timer = 1;
724                 } else {
725                         /* Anything interesting happen? */
726                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
727                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
728                                 int ret;
729
730                                 /* Just what we've been waiting for... */
731                                 ret = set_happy_link_modes(hp, tregs);
732                                 if (ret) {
733                                         /* Ooops, something bad happened, go to force
734                                          * mode.
735                                          *
736                                          * XXX Broken hubs which don't support 802.3u
737                                          * XXX auto-negotiation make this happen as well.
738                                          */
739                                         goto do_force_mode;
740                                 }
741
742                                 /* Success, at least so far, advance our state engine. */
743                                 hp->timer_state = lupwait;
744                                 restart_timer = 1;
745                         } else {
746                                 restart_timer = 1;
747                         }
748                 }
749                 break;
750
751         case lupwait:
752                 /* Auto negotiation was successful and we are awaiting a
753                  * link up status.  I have decided to let this timer run
754                  * forever until some sort of error is signalled, reporting
755                  * a message to the user at 10 second intervals.
756                  */
757                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
758                 if (hp->sw_bmsr & BMSR_LSTATUS) {
759                         /* Wheee, it's up, display the link mode in use and put
760                          * the timer to sleep.
761                          */
762                         display_link_mode(hp, tregs);
763                         hp->timer_state = asleep;
764                         restart_timer = 0;
765                 } else {
766                         if (hp->timer_ticks >= 10) {
767                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
768                                        "not completely up.\n", hp->dev->name);
769                                 hp->timer_ticks = 0;
770                                 restart_timer = 1;
771                         } else {
772                                 restart_timer = 1;
773                         }
774                 }
775                 break;
776
777         case ltrywait:
778                 /* Making the timeout here too long can make it take
779                  * annoyingly long to attempt all of the link mode
780                  * permutations, but then again this is essentially
781                  * error recovery code for the most part.
782                  */
783                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
784                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
785                 if (hp->timer_ticks == 1) {
786                         if (!is_lucent_phy(hp)) {
787                                 /* Re-enable transceiver, we'll re-enable the transceiver next
788                                  * tick, then check link state on the following tick.
789                                  */
790                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
791                                 happy_meal_tcvr_write(hp, tregs,
792                                                       DP83840_CSCONFIG, hp->sw_csconfig);
793                         }
794                         restart_timer = 1;
795                         break;
796                 }
797                 if (hp->timer_ticks == 2) {
798                         if (!is_lucent_phy(hp)) {
799                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
800                                 happy_meal_tcvr_write(hp, tregs,
801                                                       DP83840_CSCONFIG, hp->sw_csconfig);
802                         }
803                         restart_timer = 1;
804                         break;
805                 }
806                 if (hp->sw_bmsr & BMSR_LSTATUS) {
807                         /* Force mode selection success. */
808                         display_forced_link_mode(hp, tregs);
809                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
810                         hp->timer_state = asleep;
811                         restart_timer = 0;
812                 } else {
813                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
814                                 int ret;
815
816                                 ret = try_next_permutation(hp, tregs);
817                                 if (ret == -1) {
818                                         /* Aieee, tried them all, reset the
819                                          * chip and try all over again.
820                                          */
821
822                                         /* Let the user know... */
823                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
824                                                hp->dev->name);
825
826                                         ret = happy_meal_init(hp);
827                                         if (ret) {
828                                                 /* ho hum... */
829                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
830                                                        "Happy Meal.\n", hp->dev->name);
831                                         }
832                                         goto out;
833                                 }
834                                 if (!is_lucent_phy(hp)) {
835                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
836                                                                                DP83840_CSCONFIG);
837                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
838                                         happy_meal_tcvr_write(hp, tregs,
839                                                               DP83840_CSCONFIG, hp->sw_csconfig);
840                                 }
841                                 hp->timer_ticks = 0;
842                                 restart_timer = 1;
843                         } else {
844                                 restart_timer = 1;
845                         }
846                 }
847                 break;
848
849         case asleep:
850         default:
851                 /* Can't happens.... */
852                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
853                        hp->dev->name);
854                 restart_timer = 0;
855                 hp->timer_ticks = 0;
856                 hp->timer_state = asleep; /* foo on you */
857                 break;
858         }
859
860         if (restart_timer) {
861                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
862                 add_timer(&hp->happy_timer);
863         }
864
865 out:
866         spin_unlock_irq(&hp->happy_lock);
867 }
868
869 #define TX_RESET_TRIES     32
870 #define RX_RESET_TRIES     32
871
872 /* hp->happy_lock must be held */
873 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
874 {
875         int tries = TX_RESET_TRIES;
876
877         HMD(("happy_meal_tx_reset: reset, "));
878
879         /* Would you like to try our SMCC Delux? */
880         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
881         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
882                 udelay(20);
883
884         /* Lettuce, tomato, buggy hardware (no extra charge)? */
885         if (!tries)
886                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
887
888         /* Take care. */
889         HMD(("done\n"));
890 }
891
892 /* hp->happy_lock must be held */
893 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
894 {
895         int tries = RX_RESET_TRIES;
896
897         HMD(("happy_meal_rx_reset: reset, "));
898
899         /* We have a special on GNU/Viking hardware bugs today. */
900         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
901         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
902                 udelay(20);
903
904         /* Will that be all? */
905         if (!tries)
906                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
907
908         /* Don't forget your vik_1137125_wa.  Have a nice day. */
909         HMD(("done\n"));
910 }
911
912 #define STOP_TRIES         16
913
914 /* hp->happy_lock must be held */
915 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
916 {
917         int tries = STOP_TRIES;
918
919         HMD(("happy_meal_stop: reset, "));
920
921         /* We're consolidating our STB products, it's your lucky day. */
922         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
923         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
924                 udelay(20);
925
926         /* Come back next week when we are "Sun Microelectronics". */
927         if (!tries)
928                 printk(KERN_ERR "happy meal: Fry guys.");
929
930         /* Remember: "Different name, same old buggy as shit hardware." */
931         HMD(("done\n"));
932 }
933
934 /* hp->happy_lock must be held */
935 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
936 {
937         struct net_device_stats *stats = &hp->net_stats;
938
939         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
940         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
941
942         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
943         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
944
945         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
946         hme_write32(hp, bregs + BMAC_GLECTR, 0);
947
948         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
949
950         stats->collisions +=
951                 (hme_read32(hp, bregs + BMAC_EXCTR) +
952                  hme_read32(hp, bregs + BMAC_LTCTR));
953         hme_write32(hp, bregs + BMAC_EXCTR, 0);
954         hme_write32(hp, bregs + BMAC_LTCTR, 0);
955 }
956
957 /* hp->happy_lock must be held */
958 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
959 {
960         ASD(("happy_meal_poll_stop: "));
961
962         /* If polling disabled or not polling already, nothing to do. */
963         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
964            (HFLAG_POLLENABLE | HFLAG_POLL)) {
965                 HMD(("not polling, return\n"));
966                 return;
967         }
968
969         /* Shut up the MIF. */
970         ASD(("were polling, mif ints off, "));
971         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
972
973         /* Turn off polling. */
974         ASD(("polling off, "));
975         hme_write32(hp, tregs + TCVR_CFG,
976                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
977
978         /* We are no longer polling. */
979         hp->happy_flags &= ~(HFLAG_POLL);
980
981         /* Let the bits set. */
982         udelay(200);
983         ASD(("done\n"));
984 }
985
986 /* Only Sun can take such nice parts and fuck up the programming interface
987  * like this.  Good job guys...
988  */
989 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
990 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
991
992 /* hp->happy_lock must be held */
993 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
994 {
995         u32 tconfig;
996         int result, tries = TCVR_RESET_TRIES;
997
998         tconfig = hme_read32(hp, tregs + TCVR_CFG);
999         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1000         if (hp->tcvr_type == external) {
1001                 ASD(("external<"));
1002                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1003                 hp->tcvr_type = internal;
1004                 hp->paddr = TCV_PADDR_ITX;
1005                 ASD(("ISOLATE,"));
1006                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1007                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1008                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1009                 if (result == TCVR_FAILURE) {
1010                         ASD(("phyread_fail>\n"));
1011                         return -1;
1012                 }
1013                 ASD(("phyread_ok,PSELECT>"));
1014                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1015                 hp->tcvr_type = external;
1016                 hp->paddr = TCV_PADDR_ETX;
1017         } else {
1018                 if (tconfig & TCV_CFG_MDIO1) {
1019                         ASD(("internal<PSELECT,"));
1020                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1021                         ASD(("ISOLATE,"));
1022                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1023                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1024                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1025                         if (result == TCVR_FAILURE) {
1026                                 ASD(("phyread_fail>\n"));
1027                                 return -1;
1028                         }
1029                         ASD(("phyread_ok,~PSELECT>"));
1030                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1031                         hp->tcvr_type = internal;
1032                         hp->paddr = TCV_PADDR_ITX;
1033                 }
1034         }
1035
1036         ASD(("BMCR_RESET "));
1037         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1038
1039         while (--tries) {
1040                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1041                 if (result == TCVR_FAILURE)
1042                         return -1;
1043                 hp->sw_bmcr = result;
1044                 if (!(result & BMCR_RESET))
1045                         break;
1046                 udelay(20);
1047         }
1048         if (!tries) {
1049                 ASD(("BMCR RESET FAILED!\n"));
1050                 return -1;
1051         }
1052         ASD(("RESET_OK\n"));
1053
1054         /* Get fresh copies of the PHY registers. */
1055         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1056         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1057         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1058         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1059
1060         ASD(("UNISOLATE"));
1061         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1062         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1063
1064         tries = TCVR_UNISOLATE_TRIES;
1065         while (--tries) {
1066                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1067                 if (result == TCVR_FAILURE)
1068                         return -1;
1069                 if (!(result & BMCR_ISOLATE))
1070                         break;
1071                 udelay(20);
1072         }
1073         if (!tries) {
1074                 ASD((" FAILED!\n"));
1075                 return -1;
1076         }
1077         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1078         if (!is_lucent_phy(hp)) {
1079                 result = happy_meal_tcvr_read(hp, tregs,
1080                                               DP83840_CSCONFIG);
1081                 happy_meal_tcvr_write(hp, tregs,
1082                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1083         }
1084         return 0;
1085 }
1086
1087 /* Figure out whether we have an internal or external transceiver.
1088  *
1089  * hp->happy_lock must be held
1090  */
1091 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1092 {
1093         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1094
1095         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1096         if (hp->happy_flags & HFLAG_POLL) {
1097                 /* If we are polling, we must stop to get the transceiver type. */
1098                 ASD(("<polling> "));
1099                 if (hp->tcvr_type == internal) {
1100                         if (tconfig & TCV_CFG_MDIO1) {
1101                                 ASD(("<internal> <poll stop> "));
1102                                 happy_meal_poll_stop(hp, tregs);
1103                                 hp->paddr = TCV_PADDR_ETX;
1104                                 hp->tcvr_type = external;
1105                                 ASD(("<external>\n"));
1106                                 tconfig &= ~(TCV_CFG_PENABLE);
1107                                 tconfig |= TCV_CFG_PSELECT;
1108                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1109                         }
1110                 } else {
1111                         if (hp->tcvr_type == external) {
1112                                 ASD(("<external> "));
1113                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1114                                         ASD(("<poll stop> "));
1115                                         happy_meal_poll_stop(hp, tregs);
1116                                         hp->paddr = TCV_PADDR_ITX;
1117                                         hp->tcvr_type = internal;
1118                                         ASD(("<internal>\n"));
1119                                         hme_write32(hp, tregs + TCVR_CFG,
1120                                                     hme_read32(hp, tregs + TCVR_CFG) &
1121                                                     ~(TCV_CFG_PSELECT));
1122                                 }
1123                                 ASD(("\n"));
1124                         } else {
1125                                 ASD(("<none>\n"));
1126                         }
1127                 }
1128         } else {
1129                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1130
1131                 /* Else we can just work off of the MDIO bits. */
1132                 ASD(("<not polling> "));
1133                 if (reread & TCV_CFG_MDIO1) {
1134                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1135                         hp->paddr = TCV_PADDR_ETX;
1136                         hp->tcvr_type = external;
1137                         ASD(("<external>\n"));
1138                 } else {
1139                         if (reread & TCV_CFG_MDIO0) {
1140                                 hme_write32(hp, tregs + TCVR_CFG,
1141                                             tconfig & ~(TCV_CFG_PSELECT));
1142                                 hp->paddr = TCV_PADDR_ITX;
1143                                 hp->tcvr_type = internal;
1144                                 ASD(("<internal>\n"));
1145                         } else {
1146                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1147                                 hp->tcvr_type = none; /* Grrr... */
1148                                 ASD(("<none>\n"));
1149                         }
1150                 }
1151         }
1152 }
1153
1154 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1155  *
1156  * The buffers we dma into must be 64 byte aligned.  So we use a special
1157  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1158  * we really need.
1159  *
1160  * We use skb_reserve() to align the data block we get in the skb.  We
1161  * also program the etxregs->cfg register to use an offset of 2.  This
1162  * imperical constant plus the ethernet header size will always leave
1163  * us with a nicely aligned ip header once we pass things up to the
1164  * protocol layers.
1165  *
1166  * The numbers work out to:
1167  *
1168  *         Max ethernet frame size         1518
1169  *         Ethernet header size              14
1170  *         Happy Meal base offset             2
1171  *
1172  * Say a skb data area is at 0xf001b010, and its size alloced is
1173  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1174  *
1175  * First our alloc_skb() routine aligns the data base to a 64 byte
1176  * boundary.  We now have 0xf001b040 as our skb data address.  We
1177  * plug this into the receive descriptor address.
1178  *
1179  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1180  * So now the data we will end up looking at starts at 0xf001b042.  When
1181  * the packet arrives, we will check out the size received and subtract
1182  * this from the skb->length.  Then we just pass the packet up to the
1183  * protocols as is, and allocate a new skb to replace this slot we have
1184  * just received from.
1185  *
1186  * The ethernet layer will strip the ether header from the front of the
1187  * skb we just sent to it, this leaves us with the ip header sitting
1188  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1189  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1190  * bit checksum is obtained from the low bits of the receive descriptor
1191  * flags, thus:
1192  *
1193  *      skb->csum = rxd->rx_flags & 0xffff;
1194  *      skb->ip_summed = CHECKSUM_COMPLETE;
1195  *
1196  * before sending off the skb to the protocols, and we are good as gold.
1197  */
1198 static void happy_meal_clean_rings(struct happy_meal *hp)
1199 {
1200         int i;
1201
1202         for (i = 0; i < RX_RING_SIZE; i++) {
1203                 if (hp->rx_skbs[i] != NULL) {
1204                         struct sk_buff *skb = hp->rx_skbs[i];
1205                         struct happy_meal_rxd *rxd;
1206                         u32 dma_addr;
1207
1208                         rxd = &hp->happy_block->happy_meal_rxd[i];
1209                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1210                         dma_unmap_single(hp->dma_dev, dma_addr,
1211                                          RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
1212                         dev_kfree_skb_any(skb);
1213                         hp->rx_skbs[i] = NULL;
1214                 }
1215         }
1216
1217         for (i = 0; i < TX_RING_SIZE; i++) {
1218                 if (hp->tx_skbs[i] != NULL) {
1219                         struct sk_buff *skb = hp->tx_skbs[i];
1220                         struct happy_meal_txd *txd;
1221                         u32 dma_addr;
1222                         int frag;
1223
1224                         hp->tx_skbs[i] = NULL;
1225
1226                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1227                                 txd = &hp->happy_block->happy_meal_txd[i];
1228                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1229                                 if (!frag)
1230                                         dma_unmap_single(hp->dma_dev, dma_addr,
1231                                                          (hme_read_desc32(hp, &txd->tx_flags)
1232                                                           & TXFLAG_SIZE),
1233                                                          DMA_TO_DEVICE);
1234                                 else
1235                                         dma_unmap_page(hp->dma_dev, dma_addr,
1236                                                          (hme_read_desc32(hp, &txd->tx_flags)
1237                                                           & TXFLAG_SIZE),
1238                                                          DMA_TO_DEVICE);
1239
1240                                 if (frag != skb_shinfo(skb)->nr_frags)
1241                                         i++;
1242                         }
1243
1244                         dev_kfree_skb_any(skb);
1245                 }
1246         }
1247 }
1248
1249 /* hp->happy_lock must be held */
1250 static void happy_meal_init_rings(struct happy_meal *hp)
1251 {
1252         struct hmeal_init_block *hb = hp->happy_block;
1253         struct net_device *dev = hp->dev;
1254         int i;
1255
1256         HMD(("happy_meal_init_rings: counters to zero, "));
1257         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1258
1259         /* Free any skippy bufs left around in the rings. */
1260         HMD(("clean, "));
1261         happy_meal_clean_rings(hp);
1262
1263         /* Now get new skippy bufs for the receive ring. */
1264         HMD(("init rxring, "));
1265         for (i = 0; i < RX_RING_SIZE; i++) {
1266                 struct sk_buff *skb;
1267
1268                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1269                 if (!skb) {
1270                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1271                         continue;
1272                 }
1273                 hp->rx_skbs[i] = skb;
1274                 skb->dev = dev;
1275
1276                 /* Because we reserve afterwards. */
1277                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1278                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1279                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1280                               dma_map_single(hp->dma_dev, skb->data, RX_BUF_ALLOC_SIZE,
1281                                              DMA_FROM_DEVICE));
1282                 skb_reserve(skb, RX_OFFSET);
1283         }
1284
1285         HMD(("init txring, "));
1286         for (i = 0; i < TX_RING_SIZE; i++)
1287                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1288
1289         HMD(("done\n"));
1290 }
1291
1292 /* hp->happy_lock must be held */
1293 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1294                                               void __iomem *tregs,
1295                                               struct ethtool_cmd *ep)
1296 {
1297         int timeout;
1298
1299         /* Read all of the registers we are interested in now. */
1300         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1301         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1302         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1303         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1304
1305         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1306
1307         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1308         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1309                 /* Advertise everything we can support. */
1310                 if (hp->sw_bmsr & BMSR_10HALF)
1311                         hp->sw_advertise |= (ADVERTISE_10HALF);
1312                 else
1313                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1314
1315                 if (hp->sw_bmsr & BMSR_10FULL)
1316                         hp->sw_advertise |= (ADVERTISE_10FULL);
1317                 else
1318                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1319                 if (hp->sw_bmsr & BMSR_100HALF)
1320                         hp->sw_advertise |= (ADVERTISE_100HALF);
1321                 else
1322                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1323                 if (hp->sw_bmsr & BMSR_100FULL)
1324                         hp->sw_advertise |= (ADVERTISE_100FULL);
1325                 else
1326                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1327                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1328
1329                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1330                  * XXX and this is because the DP83840 does not support it, changes
1331                  * XXX would need to be made to the tx/rx logic in the driver as well
1332                  * XXX so I completely skip checking for it in the BMSR for now.
1333                  */
1334
1335 #ifdef AUTO_SWITCH_DEBUG
1336                 ASD(("%s: Advertising [ ", hp->dev->name));
1337                 if (hp->sw_advertise & ADVERTISE_10HALF)
1338                         ASD(("10H "));
1339                 if (hp->sw_advertise & ADVERTISE_10FULL)
1340                         ASD(("10F "));
1341                 if (hp->sw_advertise & ADVERTISE_100HALF)
1342                         ASD(("100H "));
1343                 if (hp->sw_advertise & ADVERTISE_100FULL)
1344                         ASD(("100F "));
1345 #endif
1346
1347                 /* Enable Auto-Negotiation, this is usually on already... */
1348                 hp->sw_bmcr |= BMCR_ANENABLE;
1349                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1350
1351                 /* Restart it to make sure it is going. */
1352                 hp->sw_bmcr |= BMCR_ANRESTART;
1353                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1354
1355                 /* BMCR_ANRESTART self clears when the process has begun. */
1356
1357                 timeout = 64;  /* More than enough. */
1358                 while (--timeout) {
1359                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1360                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1361                                 break; /* got it. */
1362                         udelay(10);
1363                 }
1364                 if (!timeout) {
1365                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1366                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1367                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1368                                hp->dev->name);
1369                         goto force_link;
1370                 } else {
1371                         hp->timer_state = arbwait;
1372                 }
1373         } else {
1374 force_link:
1375                 /* Force the link up, trying first a particular mode.
1376                  * Either we are here at the request of ethtool or
1377                  * because the Happy Meal would not start to autoneg.
1378                  */
1379
1380                 /* Disable auto-negotiation in BMCR, enable the duplex and
1381                  * speed setting, init the timer state machine, and fire it off.
1382                  */
1383                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1384                         hp->sw_bmcr = BMCR_SPEED100;
1385                 } else {
1386                         if (ethtool_cmd_speed(ep) == SPEED_100)
1387                                 hp->sw_bmcr = BMCR_SPEED100;
1388                         else
1389                                 hp->sw_bmcr = 0;
1390                         if (ep->duplex == DUPLEX_FULL)
1391                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1392                 }
1393                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1394
1395                 if (!is_lucent_phy(hp)) {
1396                         /* OK, seems we need do disable the transceiver for the first
1397                          * tick to make sure we get an accurate link state at the
1398                          * second tick.
1399                          */
1400                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1401                                                                DP83840_CSCONFIG);
1402                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1403                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1404                                               hp->sw_csconfig);
1405                 }
1406                 hp->timer_state = ltrywait;
1407         }
1408
1409         hp->timer_ticks = 0;
1410         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1411         hp->happy_timer.data = (unsigned long) hp;
1412         hp->happy_timer.function = happy_meal_timer;
1413         add_timer(&hp->happy_timer);
1414 }
1415
1416 /* hp->happy_lock must be held */
1417 static int happy_meal_init(struct happy_meal *hp)
1418 {
1419         void __iomem *gregs        = hp->gregs;
1420         void __iomem *etxregs      = hp->etxregs;
1421         void __iomem *erxregs      = hp->erxregs;
1422         void __iomem *bregs        = hp->bigmacregs;
1423         void __iomem *tregs        = hp->tcvregs;
1424         u32 regtmp, rxcfg;
1425         unsigned char *e = &hp->dev->dev_addr[0];
1426
1427         /* If auto-negotiation timer is running, kill it. */
1428         del_timer(&hp->happy_timer);
1429
1430         HMD(("happy_meal_init: happy_flags[%08x] ",
1431              hp->happy_flags));
1432         if (!(hp->happy_flags & HFLAG_INIT)) {
1433                 HMD(("set HFLAG_INIT, "));
1434                 hp->happy_flags |= HFLAG_INIT;
1435                 happy_meal_get_counters(hp, bregs);
1436         }
1437
1438         /* Stop polling. */
1439         HMD(("to happy_meal_poll_stop\n"));
1440         happy_meal_poll_stop(hp, tregs);
1441
1442         /* Stop transmitter and receiver. */
1443         HMD(("happy_meal_init: to happy_meal_stop\n"));
1444         happy_meal_stop(hp, gregs);
1445
1446         /* Alloc and reset the tx/rx descriptor chains. */
1447         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1448         happy_meal_init_rings(hp);
1449
1450         /* Shut up the MIF. */
1451         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1452              hme_read32(hp, tregs + TCVR_IMASK)));
1453         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1454
1455         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1456         if (hp->happy_flags & HFLAG_FENABLE) {
1457                 HMD(("use frame old[%08x], ",
1458                      hme_read32(hp, tregs + TCVR_CFG)));
1459                 hme_write32(hp, tregs + TCVR_CFG,
1460                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1461         } else {
1462                 HMD(("use bitbang old[%08x], ",
1463                      hme_read32(hp, tregs + TCVR_CFG)));
1464                 hme_write32(hp, tregs + TCVR_CFG,
1465                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1466         }
1467
1468         /* Check the state of the transceiver. */
1469         HMD(("to happy_meal_transceiver_check\n"));
1470         happy_meal_transceiver_check(hp, tregs);
1471
1472         /* Put the Big Mac into a sane state. */
1473         HMD(("happy_meal_init: "));
1474         switch(hp->tcvr_type) {
1475         case none:
1476                 /* Cannot operate if we don't know the transceiver type! */
1477                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1478                 return -EAGAIN;
1479
1480         case internal:
1481                 /* Using the MII buffers. */
1482                 HMD(("internal, using MII, "));
1483                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1484                 break;
1485
1486         case external:
1487                 /* Not using the MII, disable it. */
1488                 HMD(("external, disable MII, "));
1489                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1490                 break;
1491         }
1492
1493         if (happy_meal_tcvr_reset(hp, tregs))
1494                 return -EAGAIN;
1495
1496         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1497         HMD(("tx/rx reset, "));
1498         happy_meal_tx_reset(hp, bregs);
1499         happy_meal_rx_reset(hp, bregs);
1500
1501         /* Set jam size and inter-packet gaps to reasonable defaults. */
1502         HMD(("jsize/ipg1/ipg2, "));
1503         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1504         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1505         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1506
1507         /* Load up the MAC address and random seed. */
1508         HMD(("rseed/macaddr, "));
1509
1510         /* The docs recommend to use the 10LSB of our MAC here. */
1511         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1512
1513         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1514         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1515         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1516
1517         HMD(("htable, "));
1518         if ((hp->dev->flags & IFF_ALLMULTI) ||
1519             (netdev_mc_count(hp->dev) > 64)) {
1520                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1521                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1522                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1523                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1524         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1525                 u16 hash_table[4];
1526                 struct netdev_hw_addr *ha;
1527                 u32 crc;
1528
1529                 memset(hash_table, 0, sizeof(hash_table));
1530                 netdev_for_each_mc_addr(ha, hp->dev) {
1531                         crc = ether_crc_le(6, ha->addr);
1532                         crc >>= 26;
1533                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1534                 }
1535                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1536                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1537                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1538                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1539         } else {
1540                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1541                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1542                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1543                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1544         }
1545
1546         /* Set the RX and TX ring ptrs. */
1547         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1548              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1549              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1550         hme_write32(hp, erxregs + ERX_RING,
1551                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1552         hme_write32(hp, etxregs + ETX_RING,
1553                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1554
1555         /* Parity issues in the ERX unit of some HME revisions can cause some
1556          * registers to not be written unless their parity is even.  Detect such
1557          * lost writes and simply rewrite with a low bit set (which will be ignored
1558          * since the rxring needs to be 2K aligned).
1559          */
1560         if (hme_read32(hp, erxregs + ERX_RING) !=
1561             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1562                 hme_write32(hp, erxregs + ERX_RING,
1563                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1564                             | 0x4);
1565
1566         /* Set the supported burst sizes. */
1567         HMD(("happy_meal_init: old[%08x] bursts<",
1568              hme_read32(hp, gregs + GREG_CFG)));
1569
1570 #ifndef CONFIG_SPARC
1571         /* It is always PCI and can handle 64byte bursts. */
1572         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1573 #else
1574         if ((hp->happy_bursts & DMA_BURST64) &&
1575             ((hp->happy_flags & HFLAG_PCI) != 0
1576 #ifdef CONFIG_SBUS
1577              || sbus_can_burst64()
1578 #endif
1579              || 0)) {
1580                 u32 gcfg = GREG_CFG_BURST64;
1581
1582                 /* I have no idea if I should set the extended
1583                  * transfer mode bit for Cheerio, so for now I
1584                  * do not.  -DaveM
1585                  */
1586 #ifdef CONFIG_SBUS
1587                 if ((hp->happy_flags & HFLAG_PCI) == 0) {
1588                         struct platform_device *op = hp->happy_dev;
1589                         if (sbus_can_dma_64bit()) {
1590                                 sbus_set_sbus64(&op->dev,
1591                                                 hp->happy_bursts);
1592                                 gcfg |= GREG_CFG_64BIT;
1593                         }
1594                 }
1595 #endif
1596
1597                 HMD(("64>"));
1598                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1599         } else if (hp->happy_bursts & DMA_BURST32) {
1600                 HMD(("32>"));
1601                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1602         } else if (hp->happy_bursts & DMA_BURST16) {
1603                 HMD(("16>"));
1604                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1605         } else {
1606                 HMD(("XXX>"));
1607                 hme_write32(hp, gregs + GREG_CFG, 0);
1608         }
1609 #endif /* CONFIG_SPARC */
1610
1611         /* Turn off interrupts we do not want to hear. */
1612         HMD((", enable global interrupts, "));
1613         hme_write32(hp, gregs + GREG_IMASK,
1614                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1615                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1616
1617         /* Set the transmit ring buffer size. */
1618         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1619              hme_read32(hp, etxregs + ETX_RSIZE)));
1620         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1621
1622         /* Enable transmitter DVMA. */
1623         HMD(("tx dma enable old[%08x], ",
1624              hme_read32(hp, etxregs + ETX_CFG)));
1625         hme_write32(hp, etxregs + ETX_CFG,
1626                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1627
1628         /* This chip really rots, for the receiver sometimes when you
1629          * write to its control registers not all the bits get there
1630          * properly.  I cannot think of a sane way to provide complete
1631          * coverage for this hardware bug yet.
1632          */
1633         HMD(("erx regs bug old[%08x]\n",
1634              hme_read32(hp, erxregs + ERX_CFG)));
1635         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1636         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1637         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1638         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1639                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1640                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1641                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1642                 /* XXX Should return failure here... */
1643         }
1644
1645         /* Enable Big Mac hash table filter. */
1646         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1647              hme_read32(hp, bregs + BMAC_RXCFG)));
1648         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1649         if (hp->dev->flags & IFF_PROMISC)
1650                 rxcfg |= BIGMAC_RXCFG_PMISC;
1651         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1652
1653         /* Let the bits settle in the chip. */
1654         udelay(10);
1655
1656         /* Ok, configure the Big Mac transmitter. */
1657         HMD(("BIGMAC init, "));
1658         regtmp = 0;
1659         if (hp->happy_flags & HFLAG_FULL)
1660                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1661
1662         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1663          * to deadlock with the PHY if a Jabber occurs.
1664          */
1665         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1666
1667         /* Give up after 16 TX attempts. */
1668         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1669
1670         /* Enable the output drivers no matter what. */
1671         regtmp = BIGMAC_XCFG_ODENABLE;
1672
1673         /* If card can do lance mode, enable it. */
1674         if (hp->happy_flags & HFLAG_LANCE)
1675                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1676
1677         /* Disable the MII buffers if using external transceiver. */
1678         if (hp->tcvr_type == external)
1679                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1680
1681         HMD(("XIF config old[%08x], ",
1682              hme_read32(hp, bregs + BMAC_XIFCFG)));
1683         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1684
1685         /* Start things up. */
1686         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1687              hme_read32(hp, bregs + BMAC_TXCFG),
1688              hme_read32(hp, bregs + BMAC_RXCFG)));
1689
1690         /* Set larger TX/RX size to allow for 802.1q */
1691         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1692         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1693
1694         hme_write32(hp, bregs + BMAC_TXCFG,
1695                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1696         hme_write32(hp, bregs + BMAC_RXCFG,
1697                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1698
1699         /* Get the autonegotiation started, and the watch timer ticking. */
1700         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1701
1702         /* Success. */
1703         return 0;
1704 }
1705
1706 /* hp->happy_lock must be held */
1707 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1708 {
1709         void __iomem *tregs     = hp->tcvregs;
1710         void __iomem *bregs     = hp->bigmacregs;
1711         void __iomem *gregs     = hp->gregs;
1712
1713         happy_meal_stop(hp, gregs);
1714         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1715         if (hp->happy_flags & HFLAG_FENABLE)
1716                 hme_write32(hp, tregs + TCVR_CFG,
1717                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1718         else
1719                 hme_write32(hp, tregs + TCVR_CFG,
1720                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1721         happy_meal_transceiver_check(hp, tregs);
1722         switch(hp->tcvr_type) {
1723         case none:
1724                 return;
1725         case internal:
1726                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1727                 break;
1728         case external:
1729                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1730                 break;
1731         }
1732         if (happy_meal_tcvr_reset(hp, tregs))
1733                 return;
1734
1735         /* Latch PHY registers as of now. */
1736         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1737         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1738
1739         /* Advertise everything we can support. */
1740         if (hp->sw_bmsr & BMSR_10HALF)
1741                 hp->sw_advertise |= (ADVERTISE_10HALF);
1742         else
1743                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1744
1745         if (hp->sw_bmsr & BMSR_10FULL)
1746                 hp->sw_advertise |= (ADVERTISE_10FULL);
1747         else
1748                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1749         if (hp->sw_bmsr & BMSR_100HALF)
1750                 hp->sw_advertise |= (ADVERTISE_100HALF);
1751         else
1752                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1753         if (hp->sw_bmsr & BMSR_100FULL)
1754                 hp->sw_advertise |= (ADVERTISE_100FULL);
1755         else
1756                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1757
1758         /* Update the PHY advertisement register. */
1759         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1760 }
1761
1762 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1763  * the hardware, so we cannot re-read it and get a correct value.
1764  *
1765  * hp->happy_lock must be held
1766  */
1767 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1768 {
1769         int reset = 0;
1770
1771         /* Only print messages for non-counter related interrupts. */
1772         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1773                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1774                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1775                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1776                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1777                       GREG_STAT_SLVPERR))
1778                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1779                        hp->dev->name, status);
1780
1781         if (status & GREG_STAT_RFIFOVF) {
1782                 /* Receive FIFO overflow is harmless and the hardware will take
1783                    care of it, just some packets are lost. Who cares. */
1784                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1785         }
1786
1787         if (status & GREG_STAT_STSTERR) {
1788                 /* BigMAC SQE link test failed. */
1789                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1790                 reset = 1;
1791         }
1792
1793         if (status & GREG_STAT_TFIFO_UND) {
1794                 /* Transmit FIFO underrun, again DMA error likely. */
1795                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1796                        hp->dev->name);
1797                 reset = 1;
1798         }
1799
1800         if (status & GREG_STAT_MAXPKTERR) {
1801                 /* Driver error, tried to transmit something larger
1802                  * than ethernet max mtu.
1803                  */
1804                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1805                 reset = 1;
1806         }
1807
1808         if (status & GREG_STAT_NORXD) {
1809                 /* This is harmless, it just means the system is
1810                  * quite loaded and the incoming packet rate was
1811                  * faster than the interrupt handler could keep up
1812                  * with.
1813                  */
1814                 printk(KERN_INFO "%s: Happy Meal out of receive "
1815                        "descriptors, packet dropped.\n",
1816                        hp->dev->name);
1817         }
1818
1819         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1820                 /* All sorts of DMA receive errors. */
1821                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1822                 if (status & GREG_STAT_RXERR)
1823                         printk("GenericError ");
1824                 if (status & GREG_STAT_RXPERR)
1825                         printk("ParityError ");
1826                 if (status & GREG_STAT_RXTERR)
1827                         printk("RxTagBotch ");
1828                 printk("]\n");
1829                 reset = 1;
1830         }
1831
1832         if (status & GREG_STAT_EOPERR) {
1833                 /* Driver bug, didn't set EOP bit in tx descriptor given
1834                  * to the happy meal.
1835                  */
1836                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1837                        hp->dev->name);
1838                 reset = 1;
1839         }
1840
1841         if (status & GREG_STAT_MIFIRQ) {
1842                 /* MIF signalled an interrupt, were we polling it? */
1843                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1844         }
1845
1846         if (status &
1847             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1848                 /* All sorts of transmit DMA errors. */
1849                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1850                 if (status & GREG_STAT_TXEACK)
1851                         printk("GenericError ");
1852                 if (status & GREG_STAT_TXLERR)
1853                         printk("LateError ");
1854                 if (status & GREG_STAT_TXPERR)
1855                         printk("ParityErro ");
1856                 if (status & GREG_STAT_TXTERR)
1857                         printk("TagBotch ");
1858                 printk("]\n");
1859                 reset = 1;
1860         }
1861
1862         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1863                 /* Bus or parity error when cpu accessed happy meal registers
1864                  * or it's internal FIFO's.  Should never see this.
1865                  */
1866                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1867                        hp->dev->name,
1868                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1869                 reset = 1;
1870         }
1871
1872         if (reset) {
1873                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1874                 happy_meal_init(hp);
1875                 return 1;
1876         }
1877         return 0;
1878 }
1879
1880 /* hp->happy_lock must be held */
1881 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1882 {
1883         void __iomem *tregs = hp->tcvregs;
1884
1885         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1886         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1887         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1888
1889         /* Use the fastest transmission protocol possible. */
1890         if (hp->sw_lpa & LPA_100FULL) {
1891                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1892                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1893         } else if (hp->sw_lpa & LPA_100HALF) {
1894                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1895                 hp->sw_bmcr |= BMCR_SPEED100;
1896         } else if (hp->sw_lpa & LPA_10FULL) {
1897                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1898                 hp->sw_bmcr |= BMCR_FULLDPLX;
1899         } else {
1900                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1901         }
1902         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1903
1904         /* Finally stop polling and shut up the MIF. */
1905         happy_meal_poll_stop(hp, tregs);
1906 }
1907
1908 #ifdef TXDEBUG
1909 #define TXD(x) printk x
1910 #else
1911 #define TXD(x)
1912 #endif
1913
1914 /* hp->happy_lock must be held */
1915 static void happy_meal_tx(struct happy_meal *hp)
1916 {
1917         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1918         struct happy_meal_txd *this;
1919         struct net_device *dev = hp->dev;
1920         int elem;
1921
1922         elem = hp->tx_old;
1923         TXD(("TX<"));
1924         while (elem != hp->tx_new) {
1925                 struct sk_buff *skb;
1926                 u32 flags, dma_addr, dma_len;
1927                 int frag;
1928
1929                 TXD(("[%d]", elem));
1930                 this = &txbase[elem];
1931                 flags = hme_read_desc32(hp, &this->tx_flags);
1932                 if (flags & TXFLAG_OWN)
1933                         break;
1934                 skb = hp->tx_skbs[elem];
1935                 if (skb_shinfo(skb)->nr_frags) {
1936                         int last;
1937
1938                         last = elem + skb_shinfo(skb)->nr_frags;
1939                         last &= (TX_RING_SIZE - 1);
1940                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1941                         if (flags & TXFLAG_OWN)
1942                                 break;
1943                 }
1944                 hp->tx_skbs[elem] = NULL;
1945                 hp->net_stats.tx_bytes += skb->len;
1946
1947                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1948                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1949                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1950
1951                         dma_len &= TXFLAG_SIZE;
1952                         if (!frag)
1953                                 dma_unmap_single(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1954                         else
1955                                 dma_unmap_page(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1956
1957                         elem = NEXT_TX(elem);
1958                         this = &txbase[elem];
1959                 }
1960
1961                 dev_kfree_skb_irq(skb);
1962                 hp->net_stats.tx_packets++;
1963         }
1964         hp->tx_old = elem;
1965         TXD((">"));
1966
1967         if (netif_queue_stopped(dev) &&
1968             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1969                 netif_wake_queue(dev);
1970 }
1971
1972 #ifdef RXDEBUG
1973 #define RXD(x) printk x
1974 #else
1975 #define RXD(x)
1976 #endif
1977
1978 /* Originally I used to handle the allocation failure by just giving back just
1979  * that one ring buffer to the happy meal.  Problem is that usually when that
1980  * condition is triggered, the happy meal expects you to do something reasonable
1981  * with all of the packets it has DMA'd in.  So now I just drop the entire
1982  * ring when we cannot get a new skb and give them all back to the happy meal,
1983  * maybe things will be "happier" now.
1984  *
1985  * hp->happy_lock must be held
1986  */
1987 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
1988 {
1989         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1990         struct happy_meal_rxd *this;
1991         int elem = hp->rx_new, drops = 0;
1992         u32 flags;
1993
1994         RXD(("RX<"));
1995         this = &rxbase[elem];
1996         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
1997                 struct sk_buff *skb;
1998                 int len = flags >> 16;
1999                 u16 csum = flags & RXFLAG_CSUM;
2000                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2001
2002                 RXD(("[%d ", elem));
2003
2004                 /* Check for errors. */
2005                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2006                         RXD(("ERR(%08x)]", flags));
2007                         hp->net_stats.rx_errors++;
2008                         if (len < ETH_ZLEN)
2009                                 hp->net_stats.rx_length_errors++;
2010                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2011                                 hp->net_stats.rx_over_errors++;
2012                                 hp->net_stats.rx_fifo_errors++;
2013                         }
2014
2015                         /* Return it to the Happy meal. */
2016         drop_it:
2017                         hp->net_stats.rx_dropped++;
2018                         hme_write_rxd(hp, this,
2019                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2020                                       dma_addr);
2021                         goto next;
2022                 }
2023                 skb = hp->rx_skbs[elem];
2024                 if (len > RX_COPY_THRESHOLD) {
2025                         struct sk_buff *new_skb;
2026
2027                         /* Now refill the entry, if we can. */
2028                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2029                         if (new_skb == NULL) {
2030                                 drops++;
2031                                 goto drop_it;
2032                         }
2033                         dma_unmap_single(hp->dma_dev, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
2034                         hp->rx_skbs[elem] = new_skb;
2035                         new_skb->dev = dev;
2036                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
2037                         hme_write_rxd(hp, this,
2038                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2039                                       dma_map_single(hp->dma_dev, new_skb->data, RX_BUF_ALLOC_SIZE,
2040                                                      DMA_FROM_DEVICE));
2041                         skb_reserve(new_skb, RX_OFFSET);
2042
2043                         /* Trim the original skb for the netif. */
2044                         skb_trim(skb, len);
2045                 } else {
2046                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2047
2048                         if (copy_skb == NULL) {
2049                                 drops++;
2050                                 goto drop_it;
2051                         }
2052
2053                         skb_reserve(copy_skb, 2);
2054                         skb_put(copy_skb, len);
2055                         dma_sync_single_for_cpu(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2056                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2057                         dma_sync_single_for_device(hp->dma_dev, dma_addr, len, DMA_FROM_DEVICE);
2058                         /* Reuse original ring buffer. */
2059                         hme_write_rxd(hp, this,
2060                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2061                                       dma_addr);
2062
2063                         skb = copy_skb;
2064                 }
2065
2066                 /* This card is _fucking_ hot... */
2067                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2068                 skb->ip_summed = CHECKSUM_COMPLETE;
2069
2070                 RXD(("len=%d csum=%4x]", len, csum));
2071                 skb->protocol = eth_type_trans(skb, dev);
2072                 netif_rx(skb);
2073
2074                 hp->net_stats.rx_packets++;
2075                 hp->net_stats.rx_bytes += len;
2076         next:
2077                 elem = NEXT_RX(elem);
2078                 this = &rxbase[elem];
2079         }
2080         hp->rx_new = elem;
2081         if (drops)
2082                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2083         RXD((">"));
2084 }
2085
2086 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2087 {
2088         struct net_device *dev = dev_id;
2089         struct happy_meal *hp  = netdev_priv(dev);
2090         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2091
2092         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2093
2094         spin_lock(&hp->happy_lock);
2095
2096         if (happy_status & GREG_STAT_ERRORS) {
2097                 HMD(("ERRORS "));
2098                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2099                         goto out;
2100         }
2101
2102         if (happy_status & GREG_STAT_MIFIRQ) {
2103                 HMD(("MIFIRQ "));
2104                 happy_meal_mif_interrupt(hp);
2105         }
2106
2107         if (happy_status & GREG_STAT_TXALL) {
2108                 HMD(("TXALL "));
2109                 happy_meal_tx(hp);
2110         }
2111
2112         if (happy_status & GREG_STAT_RXTOHOST) {
2113                 HMD(("RXTOHOST "));
2114                 happy_meal_rx(hp, dev);
2115         }
2116
2117         HMD(("done\n"));
2118 out:
2119         spin_unlock(&hp->happy_lock);
2120
2121         return IRQ_HANDLED;
2122 }
2123
2124 #ifdef CONFIG_SBUS
2125 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2126 {
2127         struct quattro *qp = (struct quattro *) cookie;
2128         int i;
2129
2130         for (i = 0; i < 4; i++) {
2131                 struct net_device *dev = qp->happy_meals[i];
2132                 struct happy_meal *hp  = netdev_priv(dev);
2133                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2134
2135                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2136
2137                 if (!(happy_status & (GREG_STAT_ERRORS |
2138                                       GREG_STAT_MIFIRQ |
2139                                       GREG_STAT_TXALL |
2140                                       GREG_STAT_RXTOHOST)))
2141                         continue;
2142
2143                 spin_lock(&hp->happy_lock);
2144
2145                 if (happy_status & GREG_STAT_ERRORS) {
2146                         HMD(("ERRORS "));
2147                         if (happy_meal_is_not_so_happy(hp, happy_status))
2148                                 goto next;
2149                 }
2150
2151                 if (happy_status & GREG_STAT_MIFIRQ) {
2152                         HMD(("MIFIRQ "));
2153                         happy_meal_mif_interrupt(hp);
2154                 }
2155
2156                 if (happy_status & GREG_STAT_TXALL) {
2157                         HMD(("TXALL "));
2158                         happy_meal_tx(hp);
2159                 }
2160
2161                 if (happy_status & GREG_STAT_RXTOHOST) {
2162                         HMD(("RXTOHOST "));
2163                         happy_meal_rx(hp, dev);
2164                 }
2165
2166         next:
2167                 spin_unlock(&hp->happy_lock);
2168         }
2169         HMD(("done\n"));
2170
2171         return IRQ_HANDLED;
2172 }
2173 #endif
2174
2175 static int happy_meal_open(struct net_device *dev)
2176 {
2177         struct happy_meal *hp = netdev_priv(dev);
2178         int res;
2179
2180         HMD(("happy_meal_open: "));
2181
2182         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2183          * into a single source which we register handling at probe time.
2184          */
2185         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2186                 if (request_irq(dev->irq, happy_meal_interrupt,
2187                                 IRQF_SHARED, dev->name, (void *)dev)) {
2188                         HMD(("EAGAIN\n"));
2189                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2190                                dev->irq);
2191
2192                         return -EAGAIN;
2193                 }
2194         }
2195
2196         HMD(("to happy_meal_init\n"));
2197
2198         spin_lock_irq(&hp->happy_lock);
2199         res = happy_meal_init(hp);
2200         spin_unlock_irq(&hp->happy_lock);
2201
2202         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2203                 free_irq(dev->irq, dev);
2204         return res;
2205 }
2206
2207 static int happy_meal_close(struct net_device *dev)
2208 {
2209         struct happy_meal *hp = netdev_priv(dev);
2210
2211         spin_lock_irq(&hp->happy_lock);
2212         happy_meal_stop(hp, hp->gregs);
2213         happy_meal_clean_rings(hp);
2214
2215         /* If auto-negotiation timer is running, kill it. */
2216         del_timer(&hp->happy_timer);
2217
2218         spin_unlock_irq(&hp->happy_lock);
2219
2220         /* On Quattro QFE cards, all hme interrupts are concentrated
2221          * into a single source which we register handling at probe
2222          * time and never unregister.
2223          */
2224         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2225                 free_irq(dev->irq, dev);
2226
2227         return 0;
2228 }
2229
2230 #ifdef SXDEBUG
2231 #define SXD(x) printk x
2232 #else
2233 #define SXD(x)
2234 #endif
2235
2236 static void happy_meal_tx_timeout(struct net_device *dev)
2237 {
2238         struct happy_meal *hp = netdev_priv(dev);
2239
2240         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2241         tx_dump_log();
2242         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2243                 hme_read32(hp, hp->gregs + GREG_STAT),
2244                 hme_read32(hp, hp->etxregs + ETX_CFG),
2245                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2246
2247         spin_lock_irq(&hp->happy_lock);
2248         happy_meal_init(hp);
2249         spin_unlock_irq(&hp->happy_lock);
2250
2251         netif_wake_queue(dev);
2252 }
2253
2254 static netdev_tx_t happy_meal_start_xmit(struct sk_buff *skb,
2255                                          struct net_device *dev)
2256 {
2257         struct happy_meal *hp = netdev_priv(dev);
2258         int entry;
2259         u32 tx_flags;
2260
2261         tx_flags = TXFLAG_OWN;
2262         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2263                 const u32 csum_start_off = skb_checksum_start_offset(skb);
2264                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2265
2266                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2267                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2268                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2269         }
2270
2271         spin_lock_irq(&hp->happy_lock);
2272
2273         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2274                 netif_stop_queue(dev);
2275                 spin_unlock_irq(&hp->happy_lock);
2276                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2277                        dev->name);
2278                 return NETDEV_TX_BUSY;
2279         }
2280
2281         entry = hp->tx_new;
2282         SXD(("SX<l[%d]e[%d]>", len, entry));
2283         hp->tx_skbs[entry] = skb;
2284
2285         if (skb_shinfo(skb)->nr_frags == 0) {
2286                 u32 mapping, len;
2287
2288                 len = skb->len;
2289                 mapping = dma_map_single(hp->dma_dev, skb->data, len, DMA_TO_DEVICE);
2290                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2291                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2292                               (tx_flags | (len & TXFLAG_SIZE)),
2293                               mapping);
2294                 entry = NEXT_TX(entry);
2295         } else {
2296                 u32 first_len, first_mapping;
2297                 int frag, first_entry = entry;
2298
2299                 /* We must give this initial chunk to the device last.
2300                  * Otherwise we could race with the device.
2301                  */
2302                 first_len = skb_headlen(skb);
2303                 first_mapping = dma_map_single(hp->dma_dev, skb->data, first_len,
2304                                                DMA_TO_DEVICE);
2305                 entry = NEXT_TX(entry);
2306
2307                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2308                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2309                         u32 len, mapping, this_txflags;
2310
2311                         len = this_frag->size;
2312                         mapping = dma_map_page(hp->dma_dev, this_frag->page,
2313                                                this_frag->page_offset, len,
2314                                                DMA_TO_DEVICE);
2315                         this_txflags = tx_flags;
2316                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2317                                 this_txflags |= TXFLAG_EOP;
2318                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2319                                       (this_txflags | (len & TXFLAG_SIZE)),
2320                                       mapping);
2321                         entry = NEXT_TX(entry);
2322                 }
2323                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2324                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2325                               first_mapping);
2326         }
2327
2328         hp->tx_new = entry;
2329
2330         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2331                 netif_stop_queue(dev);
2332
2333         /* Get it going. */
2334         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2335
2336         spin_unlock_irq(&hp->happy_lock);
2337
2338         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2339         return NETDEV_TX_OK;
2340 }
2341
2342 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2343 {
2344         struct happy_meal *hp = netdev_priv(dev);
2345
2346         spin_lock_irq(&hp->happy_lock);
2347         happy_meal_get_counters(hp, hp->bigmacregs);
2348         spin_unlock_irq(&hp->happy_lock);
2349
2350         return &hp->net_stats;
2351 }
2352
2353 static void happy_meal_set_multicast(struct net_device *dev)
2354 {
2355         struct happy_meal *hp = netdev_priv(dev);
2356         void __iomem *bregs = hp->bigmacregs;
2357         struct netdev_hw_addr *ha;
2358         u32 crc;
2359
2360         spin_lock_irq(&hp->happy_lock);
2361
2362         if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 64)) {
2363                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2364                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2365                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2366                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2367         } else if (dev->flags & IFF_PROMISC) {
2368                 hme_write32(hp, bregs + BMAC_RXCFG,
2369                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2370         } else {
2371                 u16 hash_table[4];
2372
2373                 memset(hash_table, 0, sizeof(hash_table));
2374                 netdev_for_each_mc_addr(ha, dev) {
2375                         crc = ether_crc_le(6, ha->addr);
2376                         crc >>= 26;
2377                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2378                 }
2379                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2380                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2381                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2382                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2383         }
2384
2385         spin_unlock_irq(&hp->happy_lock);
2386 }
2387
2388 /* Ethtool support... */
2389 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2390 {
2391         struct happy_meal *hp = netdev_priv(dev);
2392         u32 speed;
2393
2394         cmd->supported =
2395                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2396                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2397                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2398
2399         /* XXX hardcoded stuff for now */
2400         cmd->port = PORT_TP; /* XXX no MII support */
2401         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2402         cmd->phy_address = 0; /* XXX fixed PHYAD */
2403
2404         /* Record PHY settings. */
2405         spin_lock_irq(&hp->happy_lock);
2406         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2407         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2408         spin_unlock_irq(&hp->happy_lock);
2409
2410         if (hp->sw_bmcr & BMCR_ANENABLE) {
2411                 cmd->autoneg = AUTONEG_ENABLE;
2412                 speed = ((hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2413                          SPEED_100 : SPEED_10);
2414                 if (speed == SPEED_100)
2415                         cmd->duplex =
2416                                 (hp->sw_lpa & (LPA_100FULL)) ?
2417                                 DUPLEX_FULL : DUPLEX_HALF;
2418                 else
2419                         cmd->duplex =
2420                                 (hp->sw_lpa & (LPA_10FULL)) ?
2421                                 DUPLEX_FULL : DUPLEX_HALF;
2422         } else {
2423                 cmd->autoneg = AUTONEG_DISABLE;
2424                 speed = (hp->sw_bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
2425                 cmd->duplex =
2426                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2427                         DUPLEX_FULL : DUPLEX_HALF;
2428         }
2429         ethtool_cmd_speed_set(cmd, speed);
2430         return 0;
2431 }
2432
2433 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2434 {
2435         struct happy_meal *hp = netdev_priv(dev);
2436
2437         /* Verify the settings we care about. */
2438         if (cmd->autoneg != AUTONEG_ENABLE &&
2439             cmd->autoneg != AUTONEG_DISABLE)
2440                 return -EINVAL;
2441         if (cmd->autoneg == AUTONEG_DISABLE &&
2442             ((ethtool_cmd_speed(cmd) != SPEED_100 &&
2443               ethtool_cmd_speed(cmd) != SPEED_10) ||
2444              (cmd->duplex != DUPLEX_HALF &&
2445               cmd->duplex != DUPLEX_FULL)))
2446                 return -EINVAL;
2447
2448         /* Ok, do it to it. */
2449         spin_lock_irq(&hp->happy_lock);
2450         del_timer(&hp->happy_timer);
2451         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2452         spin_unlock_irq(&hp->happy_lock);
2453
2454         return 0;
2455 }
2456
2457 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2458 {
2459         struct happy_meal *hp = netdev_priv(dev);
2460
2461         strcpy(info->driver, "sunhme");
2462         strcpy(info->version, "2.02");
2463         if (hp->happy_flags & HFLAG_PCI) {
2464                 struct pci_dev *pdev = hp->happy_dev;
2465                 strcpy(info->bus_info, pci_name(pdev));
2466         }
2467 #ifdef CONFIG_SBUS
2468         else {
2469                 const struct linux_prom_registers *regs;
2470                 struct platform_device *op = hp->happy_dev;
2471                 regs = of_get_property(op->dev.of_node, "regs", NULL);
2472                 if (regs)
2473                         sprintf(info->bus_info, "SBUS:%d",
2474                                 regs->which_io);
2475         }
2476 #endif
2477 }
2478
2479 static u32 hme_get_link(struct net_device *dev)
2480 {
2481         struct happy_meal *hp = netdev_priv(dev);
2482
2483         spin_lock_irq(&hp->happy_lock);
2484         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2485         spin_unlock_irq(&hp->happy_lock);
2486
2487         return hp->sw_bmsr & BMSR_LSTATUS;
2488 }
2489
2490 static const struct ethtool_ops hme_ethtool_ops = {
2491         .get_settings           = hme_get_settings,
2492         .set_settings           = hme_set_settings,
2493         .get_drvinfo            = hme_get_drvinfo,
2494         .get_link               = hme_get_link,
2495 };
2496
2497 static int hme_version_printed;
2498
2499 #ifdef CONFIG_SBUS
2500 /* Given a happy meal sbus device, find it's quattro parent.
2501  * If none exist, allocate and return a new one.
2502  *
2503  * Return NULL on failure.
2504  */
2505 static struct quattro * __devinit quattro_sbus_find(struct platform_device *child)
2506 {
2507         struct device *parent = child->dev.parent;
2508         struct platform_device *op;
2509         struct quattro *qp;
2510
2511         op = to_platform_device(parent);
2512         qp = dev_get_drvdata(&op->dev);
2513         if (qp)
2514                 return qp;
2515
2516         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2517         if (qp != NULL) {
2518                 int i;
2519
2520                 for (i = 0; i < 4; i++)
2521                         qp->happy_meals[i] = NULL;
2522
2523                 qp->quattro_dev = child;
2524                 qp->next = qfe_sbus_list;
2525                 qfe_sbus_list = qp;
2526
2527                 dev_set_drvdata(&op->dev, qp);
2528         }
2529         return qp;
2530 }
2531
2532 /* After all quattro cards have been probed, we call these functions
2533  * to register the IRQ handlers for the cards that have been
2534  * successfully probed and skip the cards that failed to initialize
2535  */
2536 static int __init quattro_sbus_register_irqs(void)
2537 {
2538         struct quattro *qp;
2539
2540         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2541                 struct platform_device *op = qp->quattro_dev;
2542                 int err, qfe_slot, skip = 0;
2543
2544                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2545                         if (!qp->happy_meals[qfe_slot])
2546                                 skip = 1;
2547                 }
2548                 if (skip)
2549                         continue;
2550
2551                 err = request_irq(op->archdata.irqs[0],
2552                                   quattro_sbus_interrupt,
2553                                   IRQF_SHARED, "Quattro",
2554                                   qp);
2555                 if (err != 0) {
2556                         printk(KERN_ERR "Quattro HME: IRQ registration "
2557                                "error %d.\n", err);
2558                         return err;
2559                 }
2560         }
2561
2562         return 0;
2563 }
2564
2565 static void quattro_sbus_free_irqs(void)
2566 {
2567         struct quattro *qp;
2568
2569         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2570                 struct platform_device *op = qp->quattro_dev;
2571                 int qfe_slot, skip = 0;
2572
2573                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2574                         if (!qp->happy_meals[qfe_slot])
2575                                 skip = 1;
2576                 }
2577                 if (skip)
2578                         continue;
2579
2580                 free_irq(op->archdata.irqs[0], qp);
2581         }
2582 }
2583 #endif /* CONFIG_SBUS */
2584
2585 #ifdef CONFIG_PCI
2586 static struct quattro * __devinit quattro_pci_find(struct pci_dev *pdev)
2587 {
2588         struct pci_dev *bdev = pdev->bus->self;
2589         struct quattro *qp;
2590
2591         if (!bdev) return NULL;
2592         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2593                 struct pci_dev *qpdev = qp->quattro_dev;
2594
2595                 if (qpdev == bdev)
2596                         return qp;
2597         }
2598         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2599         if (qp != NULL) {
2600                 int i;
2601
2602                 for (i = 0; i < 4; i++)
2603                         qp->happy_meals[i] = NULL;
2604
2605                 qp->quattro_dev = bdev;
2606                 qp->next = qfe_pci_list;
2607                 qfe_pci_list = qp;
2608
2609                 /* No range tricks necessary on PCI. */
2610                 qp->nranges = 0;
2611         }
2612         return qp;
2613 }
2614 #endif /* CONFIG_PCI */
2615
2616 static const struct net_device_ops hme_netdev_ops = {
2617         .ndo_open               = happy_meal_open,
2618         .ndo_stop               = happy_meal_close,
2619         .ndo_start_xmit         = happy_meal_start_xmit,
2620         .ndo_tx_timeout         = happy_meal_tx_timeout,
2621         .ndo_get_stats          = happy_meal_get_stats,
2622         .ndo_set_multicast_list = happy_meal_set_multicast,
2623         .ndo_change_mtu         = eth_change_mtu,
2624         .ndo_set_mac_address    = eth_mac_addr,
2625         .ndo_validate_addr      = eth_validate_addr,
2626 };
2627
2628 #ifdef CONFIG_SBUS
2629 static int __devinit happy_meal_sbus_probe_one(struct platform_device *op, int is_qfe)
2630 {
2631         struct device_node *dp = op->dev.of_node, *sbus_dp;
2632         struct quattro *qp = NULL;
2633         struct happy_meal *hp;
2634         struct net_device *dev;
2635         int i, qfe_slot = -1;
2636         int err = -ENODEV;
2637
2638         sbus_dp = op->dev.parent->of_node;
2639
2640         /* We can match PCI devices too, do not accept those here. */
2641         if (strcmp(sbus_dp->name, "sbus"))
2642                 return err;
2643
2644         if (is_qfe) {
2645                 qp = quattro_sbus_find(op);
2646                 if (qp == NULL)
2647                         goto err_out;
2648                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2649                         if (qp->happy_meals[qfe_slot] == NULL)
2650                                 break;
2651                 if (qfe_slot == 4)
2652                         goto err_out;
2653         }
2654
2655         err = -ENOMEM;
2656         dev = alloc_etherdev(sizeof(struct happy_meal));
2657         if (!dev)
2658                 goto err_out;
2659         SET_NETDEV_DEV(dev, &op->dev);
2660
2661         if (hme_version_printed++ == 0)
2662                 printk(KERN_INFO "%s", version);
2663
2664         /* If user did not specify a MAC address specifically, use
2665          * the Quattro local-mac-address property...
2666          */
2667         for (i = 0; i < 6; i++) {
2668                 if (macaddr[i] != 0)
2669                         break;
2670         }
2671         if (i < 6) { /* a mac address was given */
2672                 for (i = 0; i < 6; i++)
2673                         dev->dev_addr[i] = macaddr[i];
2674                 macaddr[5]++;
2675         } else {
2676                 const unsigned char *addr;
2677                 int len;
2678
2679                 addr = of_get_property(dp, "local-mac-address", &len);
2680
2681                 if (qfe_slot != -1 && addr && len == 6)
2682                         memcpy(dev->dev_addr, addr, 6);
2683                 else
2684                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2685         }
2686
2687         hp = netdev_priv(dev);
2688
2689         hp->happy_dev = op;
2690         hp->dma_dev = &op->dev;
2691
2692         spin_lock_init(&hp->happy_lock);
2693
2694         err = -ENODEV;
2695         if (qp != NULL) {
2696                 hp->qfe_parent = qp;
2697                 hp->qfe_ent = qfe_slot;
2698                 qp->happy_meals[qfe_slot] = dev;
2699         }
2700
2701         hp->gregs = of_ioremap(&op->resource[0], 0,
2702                                GREG_REG_SIZE, "HME Global Regs");
2703         if (!hp->gregs) {
2704                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2705                 goto err_out_free_netdev;
2706         }
2707
2708         hp->etxregs = of_ioremap(&op->resource[1], 0,
2709                                  ETX_REG_SIZE, "HME TX Regs");
2710         if (!hp->etxregs) {
2711                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2712                 goto err_out_iounmap;
2713         }
2714
2715         hp->erxregs = of_ioremap(&op->resource[2], 0,
2716                                  ERX_REG_SIZE, "HME RX Regs");
2717         if (!hp->erxregs) {
2718                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2719                 goto err_out_iounmap;
2720         }
2721
2722         hp->bigmacregs = of_ioremap(&op->resource[3], 0,
2723                                     BMAC_REG_SIZE, "HME BIGMAC Regs");
2724         if (!hp->bigmacregs) {
2725                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2726                 goto err_out_iounmap;
2727         }
2728
2729         hp->tcvregs = of_ioremap(&op->resource[4], 0,
2730                                  TCVR_REG_SIZE, "HME Tranceiver Regs");
2731         if (!hp->tcvregs) {
2732                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2733                 goto err_out_iounmap;
2734         }
2735
2736         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2737         if (hp->hm_revision == 0xff)
2738                 hp->hm_revision = 0xa0;
2739
2740         /* Now enable the feature flags we can. */
2741         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2742                 hp->happy_flags = HFLAG_20_21;
2743         else if (hp->hm_revision != 0xa0)
2744                 hp->happy_flags = HFLAG_NOT_A0;
2745
2746         if (qp != NULL)
2747                 hp->happy_flags |= HFLAG_QUATTRO;
2748
2749         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2750         hp->happy_bursts = of_getintprop_default(sbus_dp,
2751                                                  "burst-sizes", 0x00);
2752
2753         hp->happy_block = dma_alloc_coherent(hp->dma_dev,
2754                                              PAGE_SIZE,
2755                                              &hp->hblock_dvma,
2756                                              GFP_ATOMIC);
2757         err = -ENOMEM;
2758         if (!hp->happy_block) {
2759                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2760                 goto err_out_iounmap;
2761         }
2762
2763         /* Force check of the link first time we are brought up. */
2764         hp->linkcheck = 0;
2765
2766         /* Force timer state to 'asleep' with count of zero. */
2767         hp->timer_state = asleep;
2768         hp->timer_ticks = 0;
2769
2770         init_timer(&hp->happy_timer);
2771
2772         hp->dev = dev;
2773         dev->netdev_ops = &hme_netdev_ops;
2774         dev->watchdog_timeo = 5*HZ;
2775         dev->ethtool_ops = &hme_ethtool_ops;
2776
2777         /* Happy Meal can do it all... */
2778         dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
2779         dev->features |= dev->hw_features | NETIF_F_RXCSUM;
2780
2781         dev->irq = op->archdata.irqs[0];
2782
2783 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2784         /* Hook up SBUS register/descriptor accessors. */
2785         hp->read_desc32 = sbus_hme_read_desc32;
2786         hp->write_txd = sbus_hme_write_txd;
2787         hp->write_rxd = sbus_hme_write_rxd;
2788         hp->read32 = sbus_hme_read32;
2789         hp->write32 = sbus_hme_write32;
2790 #endif
2791
2792         /* Grrr, Happy Meal comes up by default not advertising
2793          * full duplex 100baseT capabilities, fix this.
2794          */
2795         spin_lock_irq(&hp->happy_lock);
2796         happy_meal_set_initial_advertisement(hp);
2797         spin_unlock_irq(&hp->happy_lock);
2798
2799         err = register_netdev(hp->dev);
2800         if (err) {
2801                 printk(KERN_ERR "happymeal: Cannot register net device, "
2802                        "aborting.\n");
2803                 goto err_out_free_coherent;
2804         }
2805
2806         dev_set_drvdata(&op->dev, hp);
2807
2808         if (qfe_slot != -1)
2809                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2810                        dev->name, qfe_slot);
2811         else
2812                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2813                        dev->name);
2814
2815         printk("%pM\n", dev->dev_addr);
2816
2817         return 0;
2818
2819 err_out_free_coherent:
2820         dma_free_coherent(hp->dma_dev,
2821                           PAGE_SIZE,
2822                           hp->happy_block,
2823                           hp->hblock_dvma);
2824
2825 err_out_iounmap:
2826         if (hp->gregs)
2827                 of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
2828         if (hp->etxregs)
2829                 of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
2830         if (hp->erxregs)
2831                 of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
2832         if (hp->bigmacregs)
2833                 of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
2834         if (hp->tcvregs)
2835                 of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
2836
2837         if (qp)
2838                 qp->happy_meals[qfe_slot] = NULL;
2839
2840 err_out_free_netdev:
2841         free_netdev(dev);
2842
2843 err_out:
2844         return err;
2845 }
2846 #endif
2847
2848 #ifdef CONFIG_PCI
2849 #ifndef CONFIG_SPARC
2850 static int is_quattro_p(struct pci_dev *pdev)
2851 {
2852         struct pci_dev *busdev = pdev->bus->self;
2853         struct list_head *tmp;
2854         int n_hmes;
2855
2856         if (busdev == NULL ||
2857             busdev->vendor != PCI_VENDOR_ID_DEC ||
2858             busdev->device != PCI_DEVICE_ID_DEC_21153)
2859                 return 0;
2860
2861         n_hmes = 0;
2862         tmp = pdev->bus->devices.next;
2863         while (tmp != &pdev->bus->devices) {
2864                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2865
2866                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2867                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2868                         n_hmes++;
2869
2870                 tmp = tmp->next;
2871         }
2872
2873         if (n_hmes != 4)
2874                 return 0;
2875
2876         return 1;
2877 }
2878
2879 /* Fetch MAC address from vital product data of PCI ROM. */
2880 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2881 {
2882         int this_offset;
2883
2884         for (this_offset = 0x20; this_offset < len; this_offset++) {
2885                 void __iomem *p = rom_base + this_offset;
2886
2887                 if (readb(p + 0) != 0x90 ||
2888                     readb(p + 1) != 0x00 ||
2889                     readb(p + 2) != 0x09 ||
2890                     readb(p + 3) != 0x4e ||
2891                     readb(p + 4) != 0x41 ||
2892                     readb(p + 5) != 0x06)
2893                         continue;
2894
2895                 this_offset += 6;
2896                 p += 6;
2897
2898                 if (index == 0) {
2899                         int i;
2900
2901                         for (i = 0; i < 6; i++)
2902                                 dev_addr[i] = readb(p + i);
2903                         return 1;
2904                 }
2905                 index--;
2906         }
2907         return 0;
2908 }
2909
2910 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2911 {
2912         size_t size;
2913         void __iomem *p = pci_map_rom(pdev, &size);
2914
2915         if (p) {
2916                 int index = 0;
2917                 int found;
2918
2919                 if (is_quattro_p(pdev))
2920                         index = PCI_SLOT(pdev->devfn);
2921
2922                 found = readb(p) == 0x55 &&
2923                         readb(p + 1) == 0xaa &&
2924                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2925                 pci_unmap_rom(pdev, p);
2926                 if (found)
2927                         return;
2928         }
2929
2930         /* Sun MAC prefix then 3 random bytes. */
2931         dev_addr[0] = 0x08;
2932         dev_addr[1] = 0x00;
2933         dev_addr[2] = 0x20;
2934         get_random_bytes(&dev_addr[3], 3);
2935 }
2936 #endif /* !(CONFIG_SPARC) */
2937
2938 static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2939                                           const struct pci_device_id *ent)
2940 {
2941         struct quattro *qp = NULL;
2942 #ifdef CONFIG_SPARC
2943         struct device_node *dp;
2944 #endif
2945         struct happy_meal *hp;
2946         struct net_device *dev;
2947         void __iomem *hpreg_base;
2948         unsigned long hpreg_res;
2949         int i, qfe_slot = -1;
2950         char prom_name[64];
2951         int err;
2952
2953         /* Now make sure pci_dev cookie is there. */
2954 #ifdef CONFIG_SPARC
2955         dp = pci_device_to_OF_node(pdev);
2956         strcpy(prom_name, dp->name);
2957 #else
2958         if (is_quattro_p(pdev))
2959                 strcpy(prom_name, "SUNW,qfe");
2960         else
2961                 strcpy(prom_name, "SUNW,hme");
2962 #endif
2963
2964         err = -ENODEV;
2965
2966         if (pci_enable_device(pdev))
2967                 goto err_out;
2968         pci_set_master(pdev);
2969
2970         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
2971                 qp = quattro_pci_find(pdev);
2972                 if (qp == NULL)
2973                         goto err_out;
2974                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2975                         if (qp->happy_meals[qfe_slot] == NULL)
2976                                 break;
2977                 if (qfe_slot == 4)
2978                         goto err_out;
2979         }
2980
2981         dev = alloc_etherdev(sizeof(struct happy_meal));
2982         err = -ENOMEM;
2983         if (!dev)
2984                 goto err_out;
2985         SET_NETDEV_DEV(dev, &pdev->dev);
2986
2987         if (hme_version_printed++ == 0)
2988                 printk(KERN_INFO "%s", version);
2989
2990         dev->base_addr = (long) pdev;
2991
2992         hp = netdev_priv(dev);
2993
2994         hp->happy_dev = pdev;
2995         hp->dma_dev = &pdev->dev;
2996
2997         spin_lock_init(&hp->happy_lock);
2998
2999         if (qp != NULL) {
3000                 hp->qfe_parent = qp;
3001                 hp->qfe_ent = qfe_slot;
3002                 qp->happy_meals[qfe_slot] = dev;
3003         }
3004
3005         hpreg_res = pci_resource_start(pdev, 0);
3006         err = -ENODEV;
3007         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3008                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3009                 goto err_out_clear_quattro;
3010         }
3011         if (pci_request_regions(pdev, DRV_NAME)) {
3012                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3013                        "aborting.\n");
3014                 goto err_out_clear_quattro;
3015         }
3016
3017         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3018                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3019                 goto err_out_free_res;
3020         }
3021
3022         for (i = 0; i < 6; i++) {
3023                 if (macaddr[i] != 0)
3024                         break;
3025         }
3026         if (i < 6) { /* a mac address was given */
3027                 for (i = 0; i < 6; i++)
3028                         dev->dev_addr[i] = macaddr[i];
3029                 macaddr[5]++;
3030         } else {
3031 #ifdef CONFIG_SPARC
3032                 const unsigned char *addr;
3033                 int len;
3034
3035                 if (qfe_slot != -1 &&
3036                     (addr = of_get_property(dp, "local-mac-address", &len))
3037                         != NULL &&
3038                     len == 6) {
3039                         memcpy(dev->dev_addr, addr, 6);
3040                 } else {
3041                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3042                 }
3043 #else
3044                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3045 #endif
3046         }
3047
3048         /* Layout registers. */
3049         hp->gregs      = (hpreg_base + 0x0000UL);
3050         hp->etxregs    = (hpreg_base + 0x2000UL);
3051         hp->erxregs    = (hpreg_base + 0x4000UL);
3052         hp->bigmacregs = (hpreg_base + 0x6000UL);
3053         hp->tcvregs    = (hpreg_base + 0x7000UL);
3054
3055 #ifdef CONFIG_SPARC
3056         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3057         if (hp->hm_revision == 0xff)
3058                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3059 #else
3060         /* works with this on non-sparc hosts */
3061         hp->hm_revision = 0x20;
3062 #endif
3063
3064         /* Now enable the feature flags we can. */
3065         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3066                 hp->happy_flags = HFLAG_20_21;
3067         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3068                 hp->happy_flags = HFLAG_NOT_A0;
3069
3070         if (qp != NULL)
3071                 hp->happy_flags |= HFLAG_QUATTRO;
3072
3073         /* And of course, indicate this is PCI. */
3074         hp->happy_flags |= HFLAG_PCI;
3075
3076 #ifdef CONFIG_SPARC
3077         /* Assume PCI happy meals can handle all burst sizes. */
3078         hp->happy_bursts = DMA_BURSTBITS;
3079 #endif
3080
3081         hp->happy_block = (struct hmeal_init_block *)
3082                 dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &hp->hblock_dvma, GFP_KERNEL);
3083
3084         err = -ENODEV;
3085         if (!hp->happy_block) {
3086                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3087                 goto err_out_iounmap;
3088         }
3089
3090         hp->linkcheck = 0;
3091         hp->timer_state = asleep;
3092         hp->timer_ticks = 0;
3093
3094         init_timer(&hp->happy_timer);
3095
3096         hp->dev = dev;
3097         dev->netdev_ops = &hme_netdev_ops;
3098         dev->watchdog_timeo = 5*HZ;
3099         dev->ethtool_ops = &hme_ethtool_ops;
3100         dev->irq = pdev->irq;
3101         dev->dma = 0;
3102
3103         /* Happy Meal can do it all... */
3104         dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
3105         dev->features |= dev->hw_features | NETIF_F_RXCSUM;
3106
3107 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3108         /* Hook up PCI register/descriptor accessors. */
3109         hp->read_desc32 = pci_hme_read_desc32;
3110         hp->write_txd = pci_hme_write_txd;
3111         hp->write_rxd = pci_hme_write_rxd;
3112         hp->read32 = pci_hme_read32;
3113         hp->write32 = pci_hme_write32;
3114 #endif
3115
3116         /* Grrr, Happy Meal comes up by default not advertising
3117          * full duplex 100baseT capabilities, fix this.
3118          */
3119         spin_lock_irq(&hp->happy_lock);
3120         happy_meal_set_initial_advertisement(hp);
3121         spin_unlock_irq(&hp->happy_lock);
3122
3123         err = register_netdev(hp->dev);
3124         if (err) {
3125                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3126                        "aborting.\n");
3127                 goto err_out_iounmap;
3128         }
3129
3130         dev_set_drvdata(&pdev->dev, hp);
3131
3132         if (!qfe_slot) {
3133                 struct pci_dev *qpdev = qp->quattro_dev;
3134
3135                 prom_name[0] = 0;
3136                 if (!strncmp(dev->name, "eth", 3)) {
3137                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3138                         sprintf(prom_name, "-%d", i + 3);
3139                 }
3140                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3141                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3142                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3143                         printk("DEC 21153 PCI Bridge\n");
3144                 else
3145                         printk("unknown bridge %04x.%04x\n",
3146                                 qpdev->vendor, qpdev->device);
3147         }
3148
3149         if (qfe_slot != -1)
3150                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3151                        dev->name, qfe_slot);
3152         else
3153                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3154                        dev->name);
3155
3156         printk("%pM\n", dev->dev_addr);
3157
3158         return 0;
3159
3160 err_out_iounmap:
3161         iounmap(hp->gregs);
3162
3163 err_out_free_res:
3164         pci_release_regions(pdev);
3165
3166 err_out_clear_quattro:
3167         if (qp != NULL)
3168                 qp->happy_meals[qfe_slot] = NULL;
3169
3170         free_netdev(dev);
3171
3172 err_out:
3173         return err;
3174 }
3175
3176 static void __devexit happy_meal_pci_remove(struct pci_dev *pdev)
3177 {
3178         struct happy_meal *hp = dev_get_drvdata(&pdev->dev);
3179         struct net_device *net_dev = hp->dev;
3180
3181         unregister_netdev(net_dev);
3182
3183         dma_free_coherent(hp->dma_dev, PAGE_SIZE,
3184                           hp->happy_block, hp->hblock_dvma);
3185         iounmap(hp->gregs);
3186         pci_release_regions(hp->happy_dev);
3187
3188         free_netdev(net_dev);
3189
3190         dev_set_drvdata(&pdev->dev, NULL);
3191 }
3192
3193 static DEFINE_PCI_DEVICE_TABLE(happymeal_pci_ids) = {
3194         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3195         { }                     /* Terminating entry */
3196 };
3197
3198 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3199
3200 static struct pci_driver hme_pci_driver = {
3201         .name           = "hme",
3202         .id_table       = happymeal_pci_ids,
3203         .probe          = happy_meal_pci_probe,
3204         .remove         = __devexit_p(happy_meal_pci_remove),
3205 };
3206
3207 static int __init happy_meal_pci_init(void)
3208 {
3209         return pci_register_driver(&hme_pci_driver);
3210 }
3211
3212 static void happy_meal_pci_exit(void)
3213 {
3214         pci_unregister_driver(&hme_pci_driver);
3215
3216         while (qfe_pci_list) {
3217                 struct quattro *qfe = qfe_pci_list;
3218                 struct quattro *next = qfe->next;
3219
3220                 kfree(qfe);
3221
3222                 qfe_pci_list = next;
3223         }
3224 }
3225
3226 #endif
3227
3228 #ifdef CONFIG_SBUS
3229 static const struct of_device_id hme_sbus_match[];
3230 static int __devinit hme_sbus_probe(struct platform_device *op)
3231 {
3232         const struct of_device_id *match;
3233         struct device_node *dp = op->dev.of_node;
3234         const char *model = of_get_property(dp, "model", NULL);
3235         int is_qfe;
3236
3237         match = of_match_device(hme_sbus_match, &op->dev);
3238         if (!match)
3239                 return -EINVAL;
3240         is_qfe = (match->data != NULL);
3241
3242         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3243                 is_qfe = 1;
3244
3245         return happy_meal_sbus_probe_one(op, is_qfe);
3246 }
3247
3248 static int __devexit hme_sbus_remove(struct platform_device *op)
3249 {
3250         struct happy_meal *hp = dev_get_drvdata(&op->dev);
3251         struct net_device *net_dev = hp->dev;
3252
3253         unregister_netdev(net_dev);
3254
3255         /* XXX qfe parent interrupt... */
3256
3257         of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
3258         of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
3259         of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
3260         of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
3261         of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
3262         dma_free_coherent(hp->dma_dev,
3263                           PAGE_SIZE,
3264                           hp->happy_block,
3265                           hp->hblock_dvma);
3266
3267         free_netdev(net_dev);
3268
3269         dev_set_drvdata(&op->dev, NULL);
3270
3271         return 0;
3272 }
3273
3274 static const struct of_device_id hme_sbus_match[] = {
3275         {
3276                 .name = "SUNW,hme",
3277         },
3278         {
3279                 .name = "SUNW,qfe",
3280                 .data = (void *) 1,
3281         },
3282         {
3283                 .name = "qfe",
3284                 .data = (void *) 1,
3285         },
3286         {},
3287 };
3288
3289 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3290
3291 static struct platform_driver hme_sbus_driver = {
3292         .driver = {
3293                 .name = "hme",
3294                 .owner = THIS_MODULE,
3295                 .of_match_table = hme_sbus_match,
3296         },
3297         .probe          = hme_sbus_probe,
3298         .remove         = __devexit_p(hme_sbus_remove),
3299 };
3300
3301 static int __init happy_meal_sbus_init(void)
3302 {
3303         int err;
3304
3305         err = platform_driver_register(&hme_sbus_driver);
3306         if (!err)
3307                 err = quattro_sbus_register_irqs();
3308
3309         return err;
3310 }
3311
3312 static void happy_meal_sbus_exit(void)
3313 {
3314         platform_driver_unregister(&hme_sbus_driver);
3315         quattro_sbus_free_irqs();
3316
3317         while (qfe_sbus_list) {
3318                 struct quattro *qfe = qfe_sbus_list;
3319                 struct quattro *next = qfe->next;
3320
3321                 kfree(qfe);
3322
3323                 qfe_sbus_list = next;
3324         }
3325 }
3326 #endif
3327
3328 static int __init happy_meal_probe(void)
3329 {
3330         int err = 0;
3331
3332 #ifdef CONFIG_SBUS
3333         err = happy_meal_sbus_init();
3334 #endif
3335 #ifdef CONFIG_PCI
3336         if (!err) {
3337                 err = happy_meal_pci_init();
3338 #ifdef CONFIG_SBUS
3339                 if (err)
3340                         happy_meal_sbus_exit();
3341 #endif
3342         }
3343 #endif
3344
3345         return err;
3346 }
3347
3348
3349 static void __exit happy_meal_exit(void)
3350 {
3351 #ifdef CONFIG_SBUS
3352         happy_meal_sbus_exit();
3353 #endif
3354 #ifdef CONFIG_PCI
3355         happy_meal_pci_exit();
3356 #endif
3357 }
3358
3359 module_init(happy_meal_probe);
3360 module_exit(happy_meal_exit);