[netdrvr] pcnet32: Lindent
[linux-2.6.git] / drivers / net / pcnet32.c
1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
2 /*
3  *      Copyright 1996-1999 Thomas Bogendoerfer
4  *
5  *      Derived from the lance driver written 1993,1994,1995 by Donald Becker.
6  *
7  *      Copyright 1993 United States Government as represented by the
8  *      Director, National Security Agency.
9  *
10  *      This software may be used and distributed according to the terms
11  *      of the GNU General Public License, incorporated herein by reference.
12  *
13  *      This driver is for PCnet32 and PCnetPCI based ethercards
14  */
15 /**************************************************************************
16  *  23 Oct, 2000.
17  *  Fixed a few bugs, related to running the controller in 32bit mode.
18  *
19  *  Carsten Langgaard, carstenl@mips.com
20  *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
21  *
22  *************************************************************************/
23
24 #define DRV_NAME        "pcnet32"
25 #define DRV_VERSION     "1.32"
26 #define DRV_RELDATE     "18.Mar.2006"
27 #define PFX             DRV_NAME ": "
28
29 static const char *const version =
30     DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
31
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/string.h>
35 #include <linux/errno.h>
36 #include <linux/ioport.h>
37 #include <linux/slab.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
41 #include <linux/init.h>
42 #include <linux/ethtool.h>
43 #include <linux/mii.h>
44 #include <linux/crc32.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/spinlock.h>
49 #include <linux/moduleparam.h>
50 #include <linux/bitops.h>
51
52 #include <asm/dma.h>
53 #include <asm/io.h>
54 #include <asm/uaccess.h>
55 #include <asm/irq.h>
56
57 /*
58  * PCI device identifiers for "new style" Linux PCI Device Drivers
59  */
60 static struct pci_device_id pcnet32_pci_tbl[] = {
61         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME,
62           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
63         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
64           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
65
66         /*
67          * Adapters that were sold with IBM's RS/6000 or pSeries hardware have
68          * the incorrect vendor id.
69          */
70         { PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE,
71           PCI_ANY_ID, PCI_ANY_ID,
72           PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, 0},
73
74         { }     /* terminate list */
75 };
76
77 MODULE_DEVICE_TABLE(pci, pcnet32_pci_tbl);
78
79 static int cards_found;
80
81 /*
82  * VLB I/O addresses
83  */
84 static unsigned int pcnet32_portlist[] __initdata =
85     { 0x300, 0x320, 0x340, 0x360, 0 };
86
87 static int pcnet32_debug = 0;
88 static int tx_start = 1;        /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */
89 static int pcnet32vlb;          /* check for VLB cards ? */
90
91 static struct net_device *pcnet32_dev;
92
93 static int max_interrupt_work = 2;
94 static int rx_copybreak = 200;
95
96 #define PCNET32_PORT_AUI      0x00
97 #define PCNET32_PORT_10BT     0x01
98 #define PCNET32_PORT_GPSI     0x02
99 #define PCNET32_PORT_MII      0x03
100
101 #define PCNET32_PORT_PORTSEL  0x03
102 #define PCNET32_PORT_ASEL     0x04
103 #define PCNET32_PORT_100      0x40
104 #define PCNET32_PORT_FD       0x80
105
106 #define PCNET32_DMA_MASK 0xffffffff
107
108 #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ))
109 #define PCNET32_BLINK_TIMEOUT   (jiffies + (HZ/4))
110
111 /*
112  * table to translate option values from tulip
113  * to internal options
114  */
115 static const unsigned char options_mapping[] = {
116         PCNET32_PORT_ASEL,                      /*  0 Auto-select      */
117         PCNET32_PORT_AUI,                       /*  1 BNC/AUI          */
118         PCNET32_PORT_AUI,                       /*  2 AUI/BNC          */
119         PCNET32_PORT_ASEL,                      /*  3 not supported    */
120         PCNET32_PORT_10BT | PCNET32_PORT_FD,    /*  4 10baseT-FD       */
121         PCNET32_PORT_ASEL,                      /*  5 not supported    */
122         PCNET32_PORT_ASEL,                      /*  6 not supported    */
123         PCNET32_PORT_ASEL,                      /*  7 not supported    */
124         PCNET32_PORT_ASEL,                      /*  8 not supported    */
125         PCNET32_PORT_MII,                       /*  9 MII 10baseT      */
126         PCNET32_PORT_MII | PCNET32_PORT_FD,     /* 10 MII 10baseT-FD   */
127         PCNET32_PORT_MII,                       /* 11 MII (autosel)    */
128         PCNET32_PORT_10BT,                      /* 12 10BaseT          */
129         PCNET32_PORT_MII | PCNET32_PORT_100,    /* 13 MII 100BaseTx    */
130                                                 /* 14 MII 100BaseTx-FD */
131         PCNET32_PORT_MII | PCNET32_PORT_100 | PCNET32_PORT_FD,
132         PCNET32_PORT_ASEL                       /* 15 not supported    */
133 };
134
135 static const char pcnet32_gstrings_test[][ETH_GSTRING_LEN] = {
136         "Loopback test  (offline)"
137 };
138
139 #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN)
140
141 #define PCNET32_NUM_REGS 136
142
143 #define MAX_UNITS 8             /* More are supported, limit only on options */
144 static int options[MAX_UNITS];
145 static int full_duplex[MAX_UNITS];
146 static int homepna[MAX_UNITS];
147
148 /*
149  *                              Theory of Operation
150  *
151  * This driver uses the same software structure as the normal lance
152  * driver. So look for a verbose description in lance.c. The differences
153  * to the normal lance driver is the use of the 32bit mode of PCnet32
154  * and PCnetPCI chips. Because these chips are 32bit chips, there is no
155  * 16MB limitation and we don't need bounce buffers.
156  */
157
158 /*
159  * History:
160  * v0.01:  Initial version
161  *         only tested on Alpha Noname Board
162  * v0.02:  changed IRQ handling for new interrupt scheme (dev_id)
163  *         tested on a ASUS SP3G
164  * v0.10:  fixed an odd problem with the 79C974 in a Compaq Deskpro XL
165  *         looks like the 974 doesn't like stopping and restarting in a
166  *         short period of time; now we do a reinit of the lance; the
167  *         bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
168  *         and hangs the machine (thanks to Klaus Liedl for debugging)
169  * v0.12:  by suggestion from Donald Becker: Renamed driver to pcnet32,
170  *         made it standalone (no need for lance.c)
171  * v0.13:  added additional PCI detecting for special PCI devices (Compaq)
172  * v0.14:  stripped down additional PCI probe (thanks to David C Niemi
173  *         and sveneric@xs4all.nl for testing this on their Compaq boxes)
174  * v0.15:  added 79C965 (VLB) probe
175  *         added interrupt sharing for PCI chips
176  * v0.16:  fixed set_multicast_list on Alpha machines
177  * v0.17:  removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
178  * v0.19:  changed setting of autoselect bit
179  * v0.20:  removed additional Compaq PCI probe; there is now a working one
180  *         in arch/i386/bios32.c
181  * v0.21:  added endian conversion for ppc, from work by cort@cs.nmt.edu
182  * v0.22:  added printing of status to ring dump
183  * v0.23:  changed enet_statistics to net_devive_stats
184  * v0.90:  added multicast filter
185  *         added module support
186  *         changed irq probe to new style
187  *         added PCnetFast chip id
188  *         added fix for receive stalls with Intel saturn chipsets
189  *         added in-place rx skbs like in the tulip driver
190  *         minor cleanups
191  * v0.91:  added PCnetFast+ chip id
192  *         back port to 2.0.x
193  * v1.00:  added some stuff from Donald Becker's 2.0.34 version
194  *         added support for byte counters in net_dev_stats
195  * v1.01:  do ring dumps, only when debugging the driver
196  *         increased the transmit timeout
197  * v1.02:  fixed memory leak in pcnet32_init_ring()
198  * v1.10:  workaround for stopped transmitter
199  *         added port selection for modules
200  *         detect special T1/E1 WAN card and setup port selection
201  * v1.11:  fixed wrong checking of Tx errors
202  * v1.20:  added check of return value kmalloc (cpeterso@cs.washington.edu)
203  *         added save original kmalloc addr for freeing (mcr@solidum.com)
204  *         added support for PCnetHome chip (joe@MIT.EDU)
205  *         rewritten PCI card detection
206  *         added dwio mode to get driver working on some PPC machines
207  * v1.21:  added mii selection and mii ioctl
208  * v1.22:  changed pci scanning code to make PPC people happy
209  *         fixed switching to 32bit mode in pcnet32_open() (thanks
210  *         to Michael Richard <mcr@solidum.com> for noticing this one)
211  *         added sub vendor/device id matching (thanks again to
212  *         Michael Richard <mcr@solidum.com>)
213  *         added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
214  * v1.23   fixed small bug, when manual selecting MII speed/duplex
215  * v1.24   Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO
216  *         underflows.  Added tx_start_pt module parameter. Increased
217  *         TX_RING_SIZE from 16 to 32.  Added #ifdef'd code to use DXSUFLO
218  *         for FAST[+] chipsets. <kaf@fc.hp.com>
219  * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com>
220  * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com>
221  * v1.26   Converted to pci_alloc_consistent, Jamey Hicks / George France
222  *                                           <jamey@crl.dec.com>
223  * -       Fixed a few bugs, related to running the controller in 32bit mode.
224  *         23 Oct, 2000.  Carsten Langgaard, carstenl@mips.com
225  *         Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
226  * v1.26p  Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker
227  * v1.27   improved CSR/PROM address detection, lots of cleanups,
228  *         new pcnet32vlb module option, HP-PARISC support,
229  *         added module parameter descriptions,
230  *         initial ethtool support - Helge Deller <deller@gmx.de>
231  * v1.27a  Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp>
232  *         use alloc_etherdev and register_netdev
233  *         fix pci probe not increment cards_found
234  *         FD auto negotiate error workaround for xSeries250
235  *         clean up and using new mii module
236  * v1.27b  Sep 30 2002 Kent Yoder <yoder1@us.ibm.com>
237  *         Added timer for cable connection state changes.
238  * v1.28   20 Feb 2004 Don Fry <brazilnut@us.ibm.com>
239  *         Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com>
240  *         Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl.
241  *         Fixes bogus 'Bus master arbitration failure', pci_[un]map_single
242  *         length errors, and transmit hangs.  Cleans up after errors in open.
243  *         Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test.
244  *         Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections.
245  * v1.29   6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical
246  *         identification code (blink led's) and register dump.
247  *         Don Fry added timer for 971/972 so skbufs don't remain on tx ring
248  *         forever.
249  * v1.30   18 May 2004 Don Fry removed timer and Last Transmit Interrupt
250  *         (ltint) as they added complexity and didn't give good throughput.
251  * v1.30a  22 May 2004 Don Fry limit frames received during interrupt.
252  * v1.30b  24 May 2004 Don Fry fix bogus tx carrier errors with 79c973,
253  *         assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>.
254  * v1.30c  25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart.
255  * v1.30d  01 Jun 2004 Don Fry discard oversize rx packets.
256  * v1.30e  11 Jun 2004 Don Fry recover after fifo error and rx hang.
257  * v1.30f  16 Jun 2004 Don Fry cleanup IRQ to allow 0 and 1 for PCI,
258  *         expanding on suggestions from Ralf Baechle <ralf@linux-mips.org>,
259  *         and Brian Murphy <brian@murphy.dk>.
260  * v1.30g  22 Jun 2004 Patrick Simmons <psimmons@flash.net> added option
261  *         homepna for selecting HomePNA mode for PCNet/Home 79C978.
262  * v1.30h  24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32.
263  * v1.30i  28 Jun 2004 Don Fry change to use module_param.
264  * v1.30j  29 Apr 2005 Don Fry fix skb/map leak with loopback test.
265  * v1.31   02 Sep 2005 Hubert WS Lin <wslin@tw.ibm.c0m> added set_ringparam().
266  * v1.31a  12 Sep 2005 Hubert WS Lin <wslin@tw.ibm.c0m> set min ring size to 4
267  *         to allow loopback test to work unchanged.
268  * v1.31b  06 Oct 2005 Don Fry changed alloc_ring to show name of device
269  *         if allocation fails
270  * v1.31c  01 Nov 2005 Don Fry Allied Telesyn 2700/2701 FX are 100Mbit only.
271  *         Force 100Mbit FD if Auto (ASEL) is selected.
272  *         See Bugzilla 2669 and 4551.
273  * v1.32   18 Mar2006 Thomas Bogendoerfer and Don Fry added Multi-Phy
274  *         handling for supporting AT-270x FTX cards with FX and Tx PHYs.
275  *         Philippe Seewer assisted with auto negotiation and testing.
276  */
277
278 /*
279  * Set the number of Tx and Rx buffers, using Log_2(# buffers).
280  * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
281  * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
282  */
283 #ifndef PCNET32_LOG_TX_BUFFERS
284 #define PCNET32_LOG_TX_BUFFERS          4
285 #define PCNET32_LOG_RX_BUFFERS          5
286 #define PCNET32_LOG_MAX_TX_BUFFERS      9       /* 2^9 == 512 */
287 #define PCNET32_LOG_MAX_RX_BUFFERS      9
288 #endif
289
290 #define TX_RING_SIZE            (1 << (PCNET32_LOG_TX_BUFFERS))
291 #define TX_MAX_RING_SIZE        (1 << (PCNET32_LOG_MAX_TX_BUFFERS))
292
293 #define RX_RING_SIZE            (1 << (PCNET32_LOG_RX_BUFFERS))
294 #define RX_MAX_RING_SIZE        (1 << (PCNET32_LOG_MAX_RX_BUFFERS))
295
296 #define PKT_BUF_SZ              1544
297
298 /* Offsets from base I/O address. */
299 #define PCNET32_WIO_RDP         0x10
300 #define PCNET32_WIO_RAP         0x12
301 #define PCNET32_WIO_RESET       0x14
302 #define PCNET32_WIO_BDP         0x16
303
304 #define PCNET32_DWIO_RDP        0x10
305 #define PCNET32_DWIO_RAP        0x14
306 #define PCNET32_DWIO_RESET      0x18
307 #define PCNET32_DWIO_BDP        0x1C
308
309 #define PCNET32_TOTAL_SIZE      0x20
310
311 /* The PCNET32 Rx and Tx ring descriptors. */
312 struct pcnet32_rx_head {
313         u32 base;
314         s16 buf_length;
315         s16 status;
316         u32 msg_length;
317         u32 reserved;
318 };
319
320 struct pcnet32_tx_head {
321         u32 base;
322         s16 length;
323         s16 status;
324         u32 misc;
325         u32 reserved;
326 };
327
328 /* The PCNET32 32-Bit initialization block, described in databook. */
329 struct pcnet32_init_block {
330         u16 mode;
331         u16 tlen_rlen;
332         u8 phys_addr[6];
333         u16 reserved;
334         u32 filter[2];
335         /* Receive and transmit ring base, along with extra bits. */
336         u32 rx_ring;
337         u32 tx_ring;
338 };
339
340 /* PCnet32 access functions */
341 struct pcnet32_access {
342         u16     (*read_csr) (unsigned long, int);
343         void    (*write_csr) (unsigned long, int, u16);
344         u16     (*read_bcr) (unsigned long, int);
345         void    (*write_bcr) (unsigned long, int, u16);
346         u16     (*read_rap) (unsigned long);
347         void    (*write_rap) (unsigned long, u16);
348         void    (*reset) (unsigned long);
349 };
350
351 /*
352  * The first field of pcnet32_private is read by the ethernet device
353  * so the structure should be allocated using pci_alloc_consistent().
354  */
355 struct pcnet32_private {
356         struct pcnet32_init_block init_block;
357         /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
358         struct pcnet32_rx_head *rx_ring;
359         struct pcnet32_tx_head *tx_ring;
360         dma_addr_t dma_addr;    /* DMA address of beginning of this
361                                    object, returned by
362                                    pci_alloc_consistent */
363         struct pci_dev *pci_dev;        /* Pointer to the associated pci device
364                                            structure */
365         const char *name;
366         /* The saved address of a sent-in-place packet/buffer, for skfree(). */
367         struct sk_buff **tx_skbuff;
368         struct sk_buff **rx_skbuff;
369         dma_addr_t *tx_dma_addr;
370         dma_addr_t *rx_dma_addr;
371         struct pcnet32_access a;
372         spinlock_t lock;        /* Guard lock */
373         unsigned int cur_rx, cur_tx;    /* The next free ring entry */
374         unsigned int rx_ring_size;      /* current rx ring size */
375         unsigned int tx_ring_size;      /* current tx ring size */
376         unsigned int rx_mod_mask;       /* rx ring modular mask */
377         unsigned int tx_mod_mask;       /* tx ring modular mask */
378         unsigned short rx_len_bits;
379         unsigned short tx_len_bits;
380         dma_addr_t rx_ring_dma_addr;
381         dma_addr_t tx_ring_dma_addr;
382         unsigned int dirty_rx, dirty_tx;        /* The ring entries to be free()ed. */
383         struct net_device_stats stats;
384         char tx_full;
385         char phycount;                  /* number of phys found */
386         int options;
387         unsigned int shared_irq:1,      /* shared irq possible */
388          dxsuflo:1,                     /* disable transmit stop on uflo */
389          mii:1;                         /* mii port available */
390         struct net_device *next;
391         struct mii_if_info mii_if;
392         struct timer_list watchdog_timer;
393         struct timer_list blink_timer;
394         u32 msg_enable;                 /* debug message level */
395
396         /* each bit indicates an available PHY */
397         u32 phymask;
398 };
399
400 static void pcnet32_probe_vlbus(void);
401 static int pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *);
402 static int pcnet32_probe1(unsigned long, int, struct pci_dev *);
403 static int pcnet32_open(struct net_device *);
404 static int pcnet32_init_ring(struct net_device *);
405 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
406 static int pcnet32_rx(struct net_device *);
407 static void pcnet32_tx_timeout(struct net_device *dev);
408 static irqreturn_t pcnet32_interrupt(int, void *, struct pt_regs *);
409 static int pcnet32_close(struct net_device *);
410 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
411 static void pcnet32_load_multicast(struct net_device *dev);
412 static void pcnet32_set_multicast_list(struct net_device *);
413 static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);
414 static void pcnet32_watchdog(struct net_device *);
415 static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
416 static void mdio_write(struct net_device *dev, int phy_id, int reg_num,
417                        int val);
418 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits);
419 static void pcnet32_ethtool_test(struct net_device *dev,
420                                  struct ethtool_test *eth_test, u64 * data);
421 static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1);
422 static int pcnet32_phys_id(struct net_device *dev, u32 data);
423 static void pcnet32_led_blink_callback(struct net_device *dev);
424 static int pcnet32_get_regs_len(struct net_device *dev);
425 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
426                              void *ptr);
427 static void pcnet32_purge_tx_ring(struct net_device *dev);
428 static int pcnet32_alloc_ring(struct net_device *dev, char *name);
429 static void pcnet32_free_ring(struct net_device *dev);
430 static void pcnet32_check_media(struct net_device *dev, int verbose);
431
432 enum pci_flags_bit {
433         PCI_USES_IO = 1, PCI_USES_MEM = 2, PCI_USES_MASTER = 4,
434         PCI_ADDR0 = 0x10 << 0, PCI_ADDR1 = 0x10 << 1, PCI_ADDR2 =
435             0x10 << 2, PCI_ADDR3 = 0x10 << 3,
436 };
437
438 static u16 pcnet32_wio_read_csr(unsigned long addr, int index)
439 {
440         outw(index, addr + PCNET32_WIO_RAP);
441         return inw(addr + PCNET32_WIO_RDP);
442 }
443
444 static void pcnet32_wio_write_csr(unsigned long addr, int index, u16 val)
445 {
446         outw(index, addr + PCNET32_WIO_RAP);
447         outw(val, addr + PCNET32_WIO_RDP);
448 }
449
450 static u16 pcnet32_wio_read_bcr(unsigned long addr, int index)
451 {
452         outw(index, addr + PCNET32_WIO_RAP);
453         return inw(addr + PCNET32_WIO_BDP);
454 }
455
456 static void pcnet32_wio_write_bcr(unsigned long addr, int index, u16 val)
457 {
458         outw(index, addr + PCNET32_WIO_RAP);
459         outw(val, addr + PCNET32_WIO_BDP);
460 }
461
462 static u16 pcnet32_wio_read_rap(unsigned long addr)
463 {
464         return inw(addr + PCNET32_WIO_RAP);
465 }
466
467 static void pcnet32_wio_write_rap(unsigned long addr, u16 val)
468 {
469         outw(val, addr + PCNET32_WIO_RAP);
470 }
471
472 static void pcnet32_wio_reset(unsigned long addr)
473 {
474         inw(addr + PCNET32_WIO_RESET);
475 }
476
477 static int pcnet32_wio_check(unsigned long addr)
478 {
479         outw(88, addr + PCNET32_WIO_RAP);
480         return (inw(addr + PCNET32_WIO_RAP) == 88);
481 }
482
483 static struct pcnet32_access pcnet32_wio = {
484         .read_csr = pcnet32_wio_read_csr,
485         .write_csr = pcnet32_wio_write_csr,
486         .read_bcr = pcnet32_wio_read_bcr,
487         .write_bcr = pcnet32_wio_write_bcr,
488         .read_rap = pcnet32_wio_read_rap,
489         .write_rap = pcnet32_wio_write_rap,
490         .reset = pcnet32_wio_reset
491 };
492
493 static u16 pcnet32_dwio_read_csr(unsigned long addr, int index)
494 {
495         outl(index, addr + PCNET32_DWIO_RAP);
496         return (inl(addr + PCNET32_DWIO_RDP) & 0xffff);
497 }
498
499 static void pcnet32_dwio_write_csr(unsigned long addr, int index, u16 val)
500 {
501         outl(index, addr + PCNET32_DWIO_RAP);
502         outl(val, addr + PCNET32_DWIO_RDP);
503 }
504
505 static u16 pcnet32_dwio_read_bcr(unsigned long addr, int index)
506 {
507         outl(index, addr + PCNET32_DWIO_RAP);
508         return (inl(addr + PCNET32_DWIO_BDP) & 0xffff);
509 }
510
511 static void pcnet32_dwio_write_bcr(unsigned long addr, int index, u16 val)
512 {
513         outl(index, addr + PCNET32_DWIO_RAP);
514         outl(val, addr + PCNET32_DWIO_BDP);
515 }
516
517 static u16 pcnet32_dwio_read_rap(unsigned long addr)
518 {
519         return (inl(addr + PCNET32_DWIO_RAP) & 0xffff);
520 }
521
522 static void pcnet32_dwio_write_rap(unsigned long addr, u16 val)
523 {
524         outl(val, addr + PCNET32_DWIO_RAP);
525 }
526
527 static void pcnet32_dwio_reset(unsigned long addr)
528 {
529         inl(addr + PCNET32_DWIO_RESET);
530 }
531
532 static int pcnet32_dwio_check(unsigned long addr)
533 {
534         outl(88, addr + PCNET32_DWIO_RAP);
535         return ((inl(addr + PCNET32_DWIO_RAP) & 0xffff) == 88);
536 }
537
538 static struct pcnet32_access pcnet32_dwio = {
539         .read_csr = pcnet32_dwio_read_csr,
540         .write_csr = pcnet32_dwio_write_csr,
541         .read_bcr = pcnet32_dwio_read_bcr,
542         .write_bcr = pcnet32_dwio_write_bcr,
543         .read_rap = pcnet32_dwio_read_rap,
544         .write_rap = pcnet32_dwio_write_rap,
545         .reset = pcnet32_dwio_reset
546 };
547
548 #ifdef CONFIG_NET_POLL_CONTROLLER
549 static void pcnet32_poll_controller(struct net_device *dev)
550 {
551         disable_irq(dev->irq);
552         pcnet32_interrupt(0, dev, NULL);
553         enable_irq(dev->irq);
554 }
555 #endif
556
557 static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
558 {
559         struct pcnet32_private *lp = dev->priv;
560         unsigned long flags;
561         int r = -EOPNOTSUPP;
562
563         if (lp->mii) {
564                 spin_lock_irqsave(&lp->lock, flags);
565                 mii_ethtool_gset(&lp->mii_if, cmd);
566                 spin_unlock_irqrestore(&lp->lock, flags);
567                 r = 0;
568         }
569         return r;
570 }
571
572 static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
573 {
574         struct pcnet32_private *lp = dev->priv;
575         unsigned long flags;
576         int r = -EOPNOTSUPP;
577
578         if (lp->mii) {
579                 spin_lock_irqsave(&lp->lock, flags);
580                 r = mii_ethtool_sset(&lp->mii_if, cmd);
581                 spin_unlock_irqrestore(&lp->lock, flags);
582         }
583         return r;
584 }
585
586 static void pcnet32_get_drvinfo(struct net_device *dev,
587                                 struct ethtool_drvinfo *info)
588 {
589         struct pcnet32_private *lp = dev->priv;
590
591         strcpy(info->driver, DRV_NAME);
592         strcpy(info->version, DRV_VERSION);
593         if (lp->pci_dev)
594                 strcpy(info->bus_info, pci_name(lp->pci_dev));
595         else
596                 sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr);
597 }
598
599 static u32 pcnet32_get_link(struct net_device *dev)
600 {
601         struct pcnet32_private *lp = dev->priv;
602         unsigned long flags;
603         int r;
604
605         spin_lock_irqsave(&lp->lock, flags);
606         if (lp->mii) {
607                 r = mii_link_ok(&lp->mii_if);
608         } else {
609                 ulong ioaddr = dev->base_addr;  /* card base I/O address */
610                 r = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
611         }
612         spin_unlock_irqrestore(&lp->lock, flags);
613
614         return r;
615 }
616
617 static u32 pcnet32_get_msglevel(struct net_device *dev)
618 {
619         struct pcnet32_private *lp = dev->priv;
620         return lp->msg_enable;
621 }
622
623 static void pcnet32_set_msglevel(struct net_device *dev, u32 value)
624 {
625         struct pcnet32_private *lp = dev->priv;
626         lp->msg_enable = value;
627 }
628
629 static int pcnet32_nway_reset(struct net_device *dev)
630 {
631         struct pcnet32_private *lp = dev->priv;
632         unsigned long flags;
633         int r = -EOPNOTSUPP;
634
635         if (lp->mii) {
636                 spin_lock_irqsave(&lp->lock, flags);
637                 r = mii_nway_restart(&lp->mii_if);
638                 spin_unlock_irqrestore(&lp->lock, flags);
639         }
640         return r;
641 }
642
643 static void pcnet32_get_ringparam(struct net_device *dev,
644                                   struct ethtool_ringparam *ering)
645 {
646         struct pcnet32_private *lp = dev->priv;
647
648         ering->tx_max_pending = TX_MAX_RING_SIZE - 1;
649         ering->tx_pending = lp->tx_ring_size - 1;
650         ering->rx_max_pending = RX_MAX_RING_SIZE - 1;
651         ering->rx_pending = lp->rx_ring_size - 1;
652 }
653
654 static int pcnet32_set_ringparam(struct net_device *dev,
655                                  struct ethtool_ringparam *ering)
656 {
657         struct pcnet32_private *lp = dev->priv;
658         unsigned long flags;
659         int i;
660
661         if (ering->rx_mini_pending || ering->rx_jumbo_pending)
662                 return -EINVAL;
663
664         if (netif_running(dev))
665                 pcnet32_close(dev);
666
667         spin_lock_irqsave(&lp->lock, flags);
668         pcnet32_free_ring(dev);
669         lp->tx_ring_size =
670             min(ering->tx_pending, (unsigned int)TX_MAX_RING_SIZE);
671         lp->rx_ring_size =
672             min(ering->rx_pending, (unsigned int)RX_MAX_RING_SIZE);
673
674         /* set the minimum ring size to 4, to allow the loopback test to work
675          * unchanged.
676          */
677         for (i = 2; i <= PCNET32_LOG_MAX_TX_BUFFERS; i++) {
678                 if (lp->tx_ring_size <= (1 << i))
679                         break;
680         }
681         lp->tx_ring_size = (1 << i);
682         lp->tx_mod_mask = lp->tx_ring_size - 1;
683         lp->tx_len_bits = (i << 12);
684
685         for (i = 2; i <= PCNET32_LOG_MAX_RX_BUFFERS; i++) {
686                 if (lp->rx_ring_size <= (1 << i))
687                         break;
688         }
689         lp->rx_ring_size = (1 << i);
690         lp->rx_mod_mask = lp->rx_ring_size - 1;
691         lp->rx_len_bits = (i << 4);
692
693         if (pcnet32_alloc_ring(dev, dev->name)) {
694                 pcnet32_free_ring(dev);
695                 spin_unlock_irqrestore(&lp->lock, flags);
696                 return -ENOMEM;
697         }
698
699         spin_unlock_irqrestore(&lp->lock, flags);
700
701         if (pcnet32_debug & NETIF_MSG_DRV)
702                 printk(KERN_INFO PFX
703                        "%s: Ring Param Settings: RX: %d, TX: %d\n", dev->name,
704                        lp->rx_ring_size, lp->tx_ring_size);
705
706         if (netif_running(dev))
707                 pcnet32_open(dev);
708
709         return 0;
710 }
711
712 static void pcnet32_get_strings(struct net_device *dev, u32 stringset,
713                                 u8 * data)
714 {
715         memcpy(data, pcnet32_gstrings_test, sizeof(pcnet32_gstrings_test));
716 }
717
718 static int pcnet32_self_test_count(struct net_device *dev)
719 {
720         return PCNET32_TEST_LEN;
721 }
722
723 static void pcnet32_ethtool_test(struct net_device *dev,
724                                  struct ethtool_test *test, u64 * data)
725 {
726         struct pcnet32_private *lp = dev->priv;
727         int rc;
728
729         if (test->flags == ETH_TEST_FL_OFFLINE) {
730                 rc = pcnet32_loopback_test(dev, data);
731                 if (rc) {
732                         if (netif_msg_hw(lp))
733                                 printk(KERN_DEBUG "%s: Loopback test failed.\n",
734                                        dev->name);
735                         test->flags |= ETH_TEST_FL_FAILED;
736                 } else if (netif_msg_hw(lp))
737                         printk(KERN_DEBUG "%s: Loopback test passed.\n",
738                                dev->name);
739         } else if (netif_msg_hw(lp))
740                 printk(KERN_DEBUG
741                        "%s: No tests to run (specify 'Offline' on ethtool).",
742                        dev->name);
743 }                               /* end pcnet32_ethtool_test */
744
745 static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
746 {
747         struct pcnet32_private *lp = dev->priv;
748         struct pcnet32_access *a = &lp->a;      /* access to registers */
749         ulong ioaddr = dev->base_addr;  /* card base I/O address */
750         struct sk_buff *skb;    /* sk buff */
751         int x, i;               /* counters */
752         int numbuffs = 4;       /* number of TX/RX buffers and descs */
753         u16 status = 0x8300;    /* TX ring status */
754         u16 teststatus;         /* test of ring status */
755         int rc;                 /* return code */
756         int size;               /* size of packets */
757         unsigned char *packet;  /* source packet data */
758         static const int data_len = 60; /* length of source packets */
759         unsigned long flags;
760         unsigned long ticks;
761
762         *data1 = 1;             /* status of test, default to fail */
763         rc = 1;                 /* default to fail */
764
765         if (netif_running(dev))
766                 pcnet32_close(dev);
767
768         spin_lock_irqsave(&lp->lock, flags);
769
770         /* Reset the PCNET32 */
771         lp->a.reset(ioaddr);
772
773         /* switch pcnet32 to 32bit mode */
774         lp->a.write_bcr(ioaddr, 20, 2);
775
776         lp->init_block.mode =
777             le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
778         lp->init_block.filter[0] = 0;
779         lp->init_block.filter[1] = 0;
780
781         /* purge & init rings but don't actually restart */
782         pcnet32_restart(dev, 0x0000);
783
784         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Set STOP bit */
785
786         /* Initialize Transmit buffers. */
787         size = data_len + 15;
788         for (x = 0; x < numbuffs; x++) {
789                 if (!(skb = dev_alloc_skb(size))) {
790                         if (netif_msg_hw(lp))
791                                 printk(KERN_DEBUG
792                                        "%s: Cannot allocate skb at line: %d!\n",
793                                        dev->name, __LINE__);
794                         goto clean_up;
795                 } else {
796                         packet = skb->data;
797                         skb_put(skb, size);     /* create space for data */
798                         lp->tx_skbuff[x] = skb;
799                         lp->tx_ring[x].length = le16_to_cpu(-skb->len);
800                         lp->tx_ring[x].misc = 0;
801
802                         /* put DA and SA into the skb */
803                         for (i = 0; i < 6; i++)
804                                 *packet++ = dev->dev_addr[i];
805                         for (i = 0; i < 6; i++)
806                                 *packet++ = dev->dev_addr[i];
807                         /* type */
808                         *packet++ = 0x08;
809                         *packet++ = 0x06;
810                         /* packet number */
811                         *packet++ = x;
812                         /* fill packet with data */
813                         for (i = 0; i < data_len; i++)
814                                 *packet++ = i;
815
816                         lp->tx_dma_addr[x] =
817                             pci_map_single(lp->pci_dev, skb->data, skb->len,
818                                            PCI_DMA_TODEVICE);
819                         lp->tx_ring[x].base =
820                             (u32) le32_to_cpu(lp->tx_dma_addr[x]);
821                         wmb();  /* Make sure owner changes after all others are visible */
822                         lp->tx_ring[x].status = le16_to_cpu(status);
823                 }
824         }
825
826         x = a->read_bcr(ioaddr, 32);    /* set internal loopback in BSR32 */
827         x = x | 0x0002;
828         a->write_bcr(ioaddr, 32, x);
829
830         lp->a.write_csr(ioaddr, 15, 0x0044);    /* set int loopback in CSR15 */
831
832         teststatus = le16_to_cpu(0x8000);
833         lp->a.write_csr(ioaddr, 0, 0x0002);     /* Set STRT bit */
834
835         /* Check status of descriptors */
836         for (x = 0; x < numbuffs; x++) {
837                 ticks = 0;
838                 rmb();
839                 while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) {
840                         spin_unlock_irqrestore(&lp->lock, flags);
841                         mdelay(1);
842                         spin_lock_irqsave(&lp->lock, flags);
843                         rmb();
844                         ticks++;
845                 }
846                 if (ticks == 200) {
847                         if (netif_msg_hw(lp))
848                                 printk("%s: Desc %d failed to reset!\n",
849                                        dev->name, x);
850                         break;
851                 }
852         }
853
854         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Set STOP bit */
855         wmb();
856         if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) {
857                 printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name);
858
859                 for (x = 0; x < numbuffs; x++) {
860                         printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x);
861                         skb = lp->rx_skbuff[x];
862                         for (i = 0; i < size; i++) {
863                                 printk("%02x ", *(skb->data + i));
864                         }
865                         printk("\n");
866                 }
867         }
868
869         x = 0;
870         rc = 0;
871         while (x < numbuffs && !rc) {
872                 skb = lp->rx_skbuff[x];
873                 packet = lp->tx_skbuff[x]->data;
874                 for (i = 0; i < size; i++) {
875                         if (*(skb->data + i) != packet[i]) {
876                                 if (netif_msg_hw(lp))
877                                         printk(KERN_DEBUG
878                                                "%s: Error in compare! %2x - %02x %02x\n",
879                                                dev->name, i, *(skb->data + i),
880                                                packet[i]);
881                                 rc = 1;
882                                 break;
883                         }
884                 }
885                 x++;
886         }
887         if (!rc) {
888                 *data1 = 0;
889         }
890
891       clean_up:
892         pcnet32_purge_tx_ring(dev);
893         x = a->read_csr(ioaddr, 15) & 0xFFFF;
894         a->write_csr(ioaddr, 15, (x & ~0x0044));        /* reset bits 6 and 2 */
895
896         x = a->read_bcr(ioaddr, 32);    /* reset internal loopback */
897         x = x & ~0x0002;
898         a->write_bcr(ioaddr, 32, x);
899
900         spin_unlock_irqrestore(&lp->lock, flags);
901
902         if (netif_running(dev)) {
903                 pcnet32_open(dev);
904         } else {
905                 lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
906         }
907
908         return (rc);
909 }                               /* end pcnet32_loopback_test  */
910
911 static void pcnet32_led_blink_callback(struct net_device *dev)
912 {
913         struct pcnet32_private *lp = dev->priv;
914         struct pcnet32_access *a = &lp->a;
915         ulong ioaddr = dev->base_addr;
916         unsigned long flags;
917         int i;
918
919         spin_lock_irqsave(&lp->lock, flags);
920         for (i = 4; i < 8; i++) {
921                 a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000);
922         }
923         spin_unlock_irqrestore(&lp->lock, flags);
924
925         mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT);
926 }
927
928 static int pcnet32_phys_id(struct net_device *dev, u32 data)
929 {
930         struct pcnet32_private *lp = dev->priv;
931         struct pcnet32_access *a = &lp->a;
932         ulong ioaddr = dev->base_addr;
933         unsigned long flags;
934         int i, regs[4];
935
936         if (!lp->blink_timer.function) {
937                 init_timer(&lp->blink_timer);
938                 lp->blink_timer.function = (void *)pcnet32_led_blink_callback;
939                 lp->blink_timer.data = (unsigned long)dev;
940         }
941
942         /* Save the current value of the bcrs */
943         spin_lock_irqsave(&lp->lock, flags);
944         for (i = 4; i < 8; i++) {
945                 regs[i - 4] = a->read_bcr(ioaddr, i);
946         }
947         spin_unlock_irqrestore(&lp->lock, flags);
948
949         mod_timer(&lp->blink_timer, jiffies);
950         set_current_state(TASK_INTERRUPTIBLE);
951
952         if ((!data) || (data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ)))
953                 data = (u32) (MAX_SCHEDULE_TIMEOUT / HZ);
954
955         msleep_interruptible(data * 1000);
956         del_timer_sync(&lp->blink_timer);
957
958         /* Restore the original value of the bcrs */
959         spin_lock_irqsave(&lp->lock, flags);
960         for (i = 4; i < 8; i++) {
961                 a->write_bcr(ioaddr, i, regs[i - 4]);
962         }
963         spin_unlock_irqrestore(&lp->lock, flags);
964
965         return 0;
966 }
967
968 #define PCNET32_REGS_PER_PHY    32
969 #define PCNET32_MAX_PHYS        32
970 static int pcnet32_get_regs_len(struct net_device *dev)
971 {
972         struct pcnet32_private *lp = dev->priv;
973         int j = lp->phycount * PCNET32_REGS_PER_PHY;
974
975         return ((PCNET32_NUM_REGS + j) * sizeof(u16));
976 }
977
978 static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,
979                              void *ptr)
980 {
981         int i, csr0;
982         u16 *buff = ptr;
983         struct pcnet32_private *lp = dev->priv;
984         struct pcnet32_access *a = &lp->a;
985         ulong ioaddr = dev->base_addr;
986         int ticks;
987         unsigned long flags;
988
989         spin_lock_irqsave(&lp->lock, flags);
990
991         csr0 = a->read_csr(ioaddr, 0);
992         if (!(csr0 & 0x0004)) { /* If not stopped */
993                 /* set SUSPEND (SPND) - CSR5 bit 0 */
994                 a->write_csr(ioaddr, 5, 0x0001);
995
996                 /* poll waiting for bit to be set */
997                 ticks = 0;
998                 while (!(a->read_csr(ioaddr, 5) & 0x0001)) {
999                         spin_unlock_irqrestore(&lp->lock, flags);
1000                         mdelay(1);
1001                         spin_lock_irqsave(&lp->lock, flags);
1002                         ticks++;
1003                         if (ticks > 200) {
1004                                 if (netif_msg_hw(lp))
1005                                         printk(KERN_DEBUG
1006                                                "%s: Error getting into suspend!\n",
1007                                                dev->name);
1008                                 break;
1009                         }
1010                 }
1011         }
1012
1013         /* read address PROM */
1014         for (i = 0; i < 16; i += 2)
1015                 *buff++ = inw(ioaddr + i);
1016
1017         /* read control and status registers */
1018         for (i = 0; i < 90; i++) {
1019                 *buff++ = a->read_csr(ioaddr, i);
1020         }
1021
1022         *buff++ = a->read_csr(ioaddr, 112);
1023         *buff++ = a->read_csr(ioaddr, 114);
1024
1025         /* read bus configuration registers */
1026         for (i = 0; i < 30; i++) {
1027                 *buff++ = a->read_bcr(ioaddr, i);
1028         }
1029         *buff++ = 0;            /* skip bcr30 so as not to hang 79C976 */
1030         for (i = 31; i < 36; i++) {
1031                 *buff++ = a->read_bcr(ioaddr, i);
1032         }
1033
1034         /* read mii phy registers */
1035         if (lp->mii) {
1036                 int j;
1037                 for (j = 0; j < PCNET32_MAX_PHYS; j++) {
1038                         if (lp->phymask & (1 << j)) {
1039                                 for (i = 0; i < PCNET32_REGS_PER_PHY; i++) {
1040                                         lp->a.write_bcr(ioaddr, 33,
1041                                                         (j << 5) | i);
1042                                         *buff++ = lp->a.read_bcr(ioaddr, 34);
1043                                 }
1044                         }
1045                 }
1046         }
1047
1048         if (!(csr0 & 0x0004)) { /* If not stopped */
1049                 /* clear SUSPEND (SPND) - CSR5 bit 0 */
1050                 a->write_csr(ioaddr, 5, 0x0000);
1051         }
1052
1053         spin_unlock_irqrestore(&lp->lock, flags);
1054 }
1055
1056 static struct ethtool_ops pcnet32_ethtool_ops = {
1057         .get_settings           = pcnet32_get_settings,
1058         .set_settings           = pcnet32_set_settings,
1059         .get_drvinfo            = pcnet32_get_drvinfo,
1060         .get_msglevel           = pcnet32_get_msglevel,
1061         .set_msglevel           = pcnet32_set_msglevel,
1062         .nway_reset             = pcnet32_nway_reset,
1063         .get_link               = pcnet32_get_link,
1064         .get_ringparam          = pcnet32_get_ringparam,
1065         .set_ringparam          = pcnet32_set_ringparam,
1066         .get_tx_csum            = ethtool_op_get_tx_csum,
1067         .get_sg                 = ethtool_op_get_sg,
1068         .get_tso                = ethtool_op_get_tso,
1069         .get_strings            = pcnet32_get_strings,
1070         .self_test_count        = pcnet32_self_test_count,
1071         .self_test              = pcnet32_ethtool_test,
1072         .phys_id                = pcnet32_phys_id,
1073         .get_regs_len           = pcnet32_get_regs_len,
1074         .get_regs               = pcnet32_get_regs,
1075         .get_perm_addr          = ethtool_op_get_perm_addr,
1076 };
1077
1078 /* only probes for non-PCI devices, the rest are handled by
1079  * pci_register_driver via pcnet32_probe_pci */
1080
1081 static void __devinit pcnet32_probe_vlbus(void)
1082 {
1083         unsigned int *port, ioaddr;
1084
1085         /* search for PCnet32 VLB cards at known addresses */
1086         for (port = pcnet32_portlist; (ioaddr = *port); port++) {
1087                 if (request_region
1088                     (ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
1089                         /* check if there is really a pcnet chip on that ioaddr */
1090                         if ((inb(ioaddr + 14) == 0x57)
1091                             && (inb(ioaddr + 15) == 0x57)) {
1092                                 pcnet32_probe1(ioaddr, 0, NULL);
1093                         } else {
1094                                 release_region(ioaddr, PCNET32_TOTAL_SIZE);
1095                         }
1096                 }
1097         }
1098 }
1099
1100 static int __devinit
1101 pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)
1102 {
1103         unsigned long ioaddr;
1104         int err;
1105
1106         err = pci_enable_device(pdev);
1107         if (err < 0) {
1108                 if (pcnet32_debug & NETIF_MSG_PROBE)
1109                         printk(KERN_ERR PFX
1110                                "failed to enable device -- err=%d\n", err);
1111                 return err;
1112         }
1113         pci_set_master(pdev);
1114
1115         ioaddr = pci_resource_start(pdev, 0);
1116         if (!ioaddr) {
1117                 if (pcnet32_debug & NETIF_MSG_PROBE)
1118                         printk(KERN_ERR PFX
1119                                "card has no PCI IO resources, aborting\n");
1120                 return -ENODEV;
1121         }
1122
1123         if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {
1124                 if (pcnet32_debug & NETIF_MSG_PROBE)
1125                         printk(KERN_ERR PFX
1126                                "architecture does not support 32bit PCI busmaster DMA\n");
1127                 return -ENODEV;
1128         }
1129         if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") ==
1130             NULL) {
1131                 if (pcnet32_debug & NETIF_MSG_PROBE)
1132                         printk(KERN_ERR PFX
1133                                "io address range already allocated\n");
1134                 return -EBUSY;
1135         }
1136
1137         err = pcnet32_probe1(ioaddr, 1, pdev);
1138         if (err < 0) {
1139                 pci_disable_device(pdev);
1140         }
1141         return err;
1142 }
1143
1144 /* pcnet32_probe1
1145  *  Called from both pcnet32_probe_vlbus and pcnet_probe_pci.
1146  *  pdev will be NULL when called from pcnet32_probe_vlbus.
1147  */
1148 static int __devinit
1149 pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1150 {
1151         struct pcnet32_private *lp;
1152         dma_addr_t lp_dma_addr;
1153         int i, media;
1154         int fdx, mii, fset, dxsuflo;
1155         int chip_version;
1156         char *chipname;
1157         struct net_device *dev;
1158         struct pcnet32_access *a = NULL;
1159         u8 promaddr[6];
1160         int ret = -ENODEV;
1161
1162         /* reset the chip */
1163         pcnet32_wio_reset(ioaddr);
1164
1165         /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */
1166         if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) {
1167                 a = &pcnet32_wio;
1168         } else {
1169                 pcnet32_dwio_reset(ioaddr);
1170                 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4
1171                     && pcnet32_dwio_check(ioaddr)) {
1172                         a = &pcnet32_dwio;
1173                 } else
1174                         goto err_release_region;
1175         }
1176
1177         chip_version =
1178             a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr, 89) << 16);
1179         if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW))
1180                 printk(KERN_INFO "  PCnet chip version is %#x.\n",
1181                        chip_version);
1182         if ((chip_version & 0xfff) != 0x003) {
1183                 if (pcnet32_debug & NETIF_MSG_PROBE)
1184                         printk(KERN_INFO PFX "Unsupported chip version.\n");
1185                 goto err_release_region;
1186         }
1187
1188         /* initialize variables */
1189         fdx = mii = fset = dxsuflo = 0;
1190         chip_version = (chip_version >> 12) & 0xffff;
1191
1192         switch (chip_version) {
1193         case 0x2420:
1194                 chipname = "PCnet/PCI 79C970";  /* PCI */
1195                 break;
1196         case 0x2430:
1197                 if (shared)
1198                         chipname = "PCnet/PCI 79C970";  /* 970 gives the wrong chip id back */
1199                 else
1200                         chipname = "PCnet/32 79C965";   /* 486/VL bus */
1201                 break;
1202         case 0x2621:
1203                 chipname = "PCnet/PCI II 79C970A";      /* PCI */
1204                 fdx = 1;
1205                 break;
1206         case 0x2623:
1207                 chipname = "PCnet/FAST 79C971"; /* PCI */
1208                 fdx = 1;
1209                 mii = 1;
1210                 fset = 1;
1211                 break;
1212         case 0x2624:
1213                 chipname = "PCnet/FAST+ 79C972";        /* PCI */
1214                 fdx = 1;
1215                 mii = 1;
1216                 fset = 1;
1217                 break;
1218         case 0x2625:
1219                 chipname = "PCnet/FAST III 79C973";     /* PCI */
1220                 fdx = 1;
1221                 mii = 1;
1222                 break;
1223         case 0x2626:
1224                 chipname = "PCnet/Home 79C978"; /* PCI */
1225                 fdx = 1;
1226                 /*
1227                  * This is based on specs published at www.amd.com.  This section
1228                  * assumes that a card with a 79C978 wants to go into standard
1229                  * ethernet mode.  The 79C978 can also go into 1Mb HomePNA mode,
1230                  * and the module option homepna=1 can select this instead.
1231                  */
1232                 media = a->read_bcr(ioaddr, 49);
1233                 media &= ~3;    /* default to 10Mb ethernet */
1234                 if (cards_found < MAX_UNITS && homepna[cards_found])
1235                         media |= 1;     /* switch to home wiring mode */
1236                 if (pcnet32_debug & NETIF_MSG_PROBE)
1237                         printk(KERN_DEBUG PFX "media set to %sMbit mode.\n",
1238                                (media & 1) ? "1" : "10");
1239                 a->write_bcr(ioaddr, 49, media);
1240                 break;
1241         case 0x2627:
1242                 chipname = "PCnet/FAST III 79C975";     /* PCI */
1243                 fdx = 1;
1244                 mii = 1;
1245                 break;
1246         case 0x2628:
1247                 chipname = "PCnet/PRO 79C976";
1248                 fdx = 1;
1249                 mii = 1;
1250                 break;
1251         default:
1252                 if (pcnet32_debug & NETIF_MSG_PROBE)
1253                         printk(KERN_INFO PFX
1254                                "PCnet version %#x, no PCnet32 chip.\n",
1255                                chip_version);
1256                 goto err_release_region;
1257         }
1258
1259         /*
1260          *  On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
1261          *  starting until the packet is loaded. Strike one for reliability, lose
1262          *  one for latency - although on PCI this isnt a big loss. Older chips
1263          *  have FIFO's smaller than a packet, so you can't do this.
1264          *  Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
1265          */
1266
1267         if (fset) {
1268                 a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
1269                 a->write_csr(ioaddr, 80,
1270                              (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
1271                 dxsuflo = 1;
1272         }
1273
1274         dev = alloc_etherdev(0);
1275         if (!dev) {
1276                 if (pcnet32_debug & NETIF_MSG_PROBE)
1277                         printk(KERN_ERR PFX "Memory allocation failed.\n");
1278                 ret = -ENOMEM;
1279                 goto err_release_region;
1280         }
1281         SET_NETDEV_DEV(dev, &pdev->dev);
1282
1283         if (pcnet32_debug & NETIF_MSG_PROBE)
1284                 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
1285
1286         /* In most chips, after a chip reset, the ethernet address is read from the
1287          * station address PROM at the base address and programmed into the
1288          * "Physical Address Registers" CSR12-14.
1289          * As a precautionary measure, we read the PROM values and complain if
1290          * they disagree with the CSRs.  Either way, we use the CSR values, and
1291          * double check that they are valid.
1292          */
1293         for (i = 0; i < 3; i++) {
1294                 unsigned int val;
1295                 val = a->read_csr(ioaddr, i + 12) & 0x0ffff;
1296                 /* There may be endianness issues here. */
1297                 dev->dev_addr[2 * i] = val & 0x0ff;
1298                 dev->dev_addr[2 * i + 1] = (val >> 8) & 0x0ff;
1299         }
1300
1301         /* read PROM address and compare with CSR address */
1302         for (i = 0; i < 6; i++)
1303                 promaddr[i] = inb(ioaddr + i);
1304
1305         if (memcmp(promaddr, dev->dev_addr, 6)
1306             || !is_valid_ether_addr(dev->dev_addr)) {
1307                 if (is_valid_ether_addr(promaddr)) {
1308                         if (pcnet32_debug & NETIF_MSG_PROBE) {
1309                                 printk(" warning: CSR address invalid,\n");
1310                                 printk(KERN_INFO
1311                                        "    using instead PROM address of");
1312                         }
1313                         memcpy(dev->dev_addr, promaddr, 6);
1314                 }
1315         }
1316         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1317
1318         /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1319         if (!is_valid_ether_addr(dev->perm_addr))
1320                 memset(dev->dev_addr, 0, sizeof(dev->dev_addr));
1321
1322         if (pcnet32_debug & NETIF_MSG_PROBE) {
1323                 for (i = 0; i < 6; i++)
1324                         printk(" %2.2x", dev->dev_addr[i]);
1325
1326                 /* Version 0x2623 and 0x2624 */
1327                 if (((chip_version + 1) & 0xfffe) == 0x2624) {
1328                         i = a->read_csr(ioaddr, 80) & 0x0C00;   /* Check tx_start_pt */
1329                         printk("\n" KERN_INFO "    tx_start_pt(0x%04x):", i);
1330                         switch (i >> 10) {
1331                         case 0:
1332                                 printk("  20 bytes,");
1333                                 break;
1334                         case 1:
1335                                 printk("  64 bytes,");
1336                                 break;
1337                         case 2:
1338                                 printk(" 128 bytes,");
1339                                 break;
1340                         case 3:
1341                                 printk("~220 bytes,");
1342                                 break;
1343                         }
1344                         i = a->read_bcr(ioaddr, 18);    /* Check Burst/Bus control */
1345                         printk(" BCR18(%x):", i & 0xffff);
1346                         if (i & (1 << 5))
1347                                 printk("BurstWrEn ");
1348                         if (i & (1 << 6))
1349                                 printk("BurstRdEn ");
1350                         if (i & (1 << 7))
1351                                 printk("DWordIO ");
1352                         if (i & (1 << 11))
1353                                 printk("NoUFlow ");
1354                         i = a->read_bcr(ioaddr, 25);
1355                         printk("\n" KERN_INFO "    SRAMSIZE=0x%04x,", i << 8);
1356                         i = a->read_bcr(ioaddr, 26);
1357                         printk(" SRAM_BND=0x%04x,", i << 8);
1358                         i = a->read_bcr(ioaddr, 27);
1359                         if (i & (1 << 14))
1360                                 printk("LowLatRx");
1361                 }
1362         }
1363
1364         dev->base_addr = ioaddr;
1365         /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
1366         if ((lp =
1367              pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
1368                 if (pcnet32_debug & NETIF_MSG_PROBE)
1369                         printk(KERN_ERR PFX
1370                                "Consistent memory allocation failed.\n");
1371                 ret = -ENOMEM;
1372                 goto err_free_netdev;
1373         }
1374
1375         memset(lp, 0, sizeof(*lp));
1376         lp->dma_addr = lp_dma_addr;
1377         lp->pci_dev = pdev;
1378
1379         spin_lock_init(&lp->lock);
1380
1381         SET_MODULE_OWNER(dev);
1382         SET_NETDEV_DEV(dev, &pdev->dev);
1383         dev->priv = lp;
1384         lp->name = chipname;
1385         lp->shared_irq = shared;
1386         lp->tx_ring_size = TX_RING_SIZE;        /* default tx ring size */
1387         lp->rx_ring_size = RX_RING_SIZE;        /* default rx ring size */
1388         lp->tx_mod_mask = lp->tx_ring_size - 1;
1389         lp->rx_mod_mask = lp->rx_ring_size - 1;
1390         lp->tx_len_bits = (PCNET32_LOG_TX_BUFFERS << 12);
1391         lp->rx_len_bits = (PCNET32_LOG_RX_BUFFERS << 4);
1392         lp->mii_if.full_duplex = fdx;
1393         lp->mii_if.phy_id_mask = 0x1f;
1394         lp->mii_if.reg_num_mask = 0x1f;
1395         lp->dxsuflo = dxsuflo;
1396         lp->mii = mii;
1397         lp->msg_enable = pcnet32_debug;
1398         if ((cards_found >= MAX_UNITS)
1399             || (options[cards_found] > sizeof(options_mapping)))
1400                 lp->options = PCNET32_PORT_ASEL;
1401         else
1402                 lp->options = options_mapping[options[cards_found]];
1403         lp->mii_if.dev = dev;
1404         lp->mii_if.mdio_read = mdio_read;
1405         lp->mii_if.mdio_write = mdio_write;
1406
1407         if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
1408             ((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
1409                 lp->options |= PCNET32_PORT_FD;
1410
1411         if (!a) {
1412                 if (pcnet32_debug & NETIF_MSG_PROBE)
1413                         printk(KERN_ERR PFX "No access methods\n");
1414                 ret = -ENODEV;
1415                 goto err_free_consistent;
1416         }
1417         lp->a = *a;
1418
1419         /* prior to register_netdev, dev->name is not yet correct */
1420         if (pcnet32_alloc_ring(dev, pci_name(lp->pci_dev))) {
1421                 ret = -ENOMEM;
1422                 goto err_free_ring;
1423         }
1424         /* detect special T1/E1 WAN card by checking for MAC address */
1425         if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0
1426             && dev->dev_addr[2] == 0x75)
1427                 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1428
1429         lp->init_block.mode = le16_to_cpu(0x0003);      /* Disable Rx and Tx. */
1430         lp->init_block.tlen_rlen =
1431             le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1432         for (i = 0; i < 6; i++)
1433                 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1434         lp->init_block.filter[0] = 0x00000000;
1435         lp->init_block.filter[1] = 0x00000000;
1436         lp->init_block.rx_ring = (u32) le32_to_cpu(lp->rx_ring_dma_addr);
1437         lp->init_block.tx_ring = (u32) le32_to_cpu(lp->tx_ring_dma_addr);
1438
1439         /* switch pcnet32 to 32bit mode */
1440         a->write_bcr(ioaddr, 20, 2);
1441
1442         a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private,
1443                                                          init_block)) & 0xffff);
1444         a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private,
1445                                                          init_block)) >> 16);
1446
1447         if (pdev) {             /* use the IRQ provided by PCI */
1448                 dev->irq = pdev->irq;
1449                 if (pcnet32_debug & NETIF_MSG_PROBE)
1450                         printk(" assigned IRQ %d.\n", dev->irq);
1451         } else {
1452                 unsigned long irq_mask = probe_irq_on();
1453
1454                 /*
1455                  * To auto-IRQ we enable the initialization-done and DMA error
1456                  * interrupts. For ISA boards we get a DMA error, but VLB and PCI
1457                  * boards will work.
1458                  */
1459                 /* Trigger an initialization just for the interrupt. */
1460                 a->write_csr(ioaddr, 0, 0x41);
1461                 mdelay(1);
1462
1463                 dev->irq = probe_irq_off(irq_mask);
1464                 if (!dev->irq) {
1465                         if (pcnet32_debug & NETIF_MSG_PROBE)
1466                                 printk(", failed to detect IRQ line.\n");
1467                         ret = -ENODEV;
1468                         goto err_free_ring;
1469                 }
1470                 if (pcnet32_debug & NETIF_MSG_PROBE)
1471                         printk(", probed IRQ %d.\n", dev->irq);
1472         }
1473
1474         /* Set the mii phy_id so that we can query the link state */
1475         if (lp->mii) {
1476                 /* lp->phycount and lp->phymask are set to 0 by memset above */
1477
1478                 lp->mii_if.phy_id = ((lp->a.read_bcr(ioaddr, 33)) >> 5) & 0x1f;
1479                 /* scan for PHYs */
1480                 for (i = 0; i < PCNET32_MAX_PHYS; i++) {
1481                         unsigned short id1, id2;
1482
1483                         id1 = mdio_read(dev, i, MII_PHYSID1);
1484                         if (id1 == 0xffff)
1485                                 continue;
1486                         id2 = mdio_read(dev, i, MII_PHYSID2);
1487                         if (id2 == 0xffff)
1488                                 continue;
1489                         if (i == 31 && ((chip_version + 1) & 0xfffe) == 0x2624)
1490                                 continue;       /* 79C971 & 79C972 have phantom phy at id 31 */
1491                         lp->phycount++;
1492                         lp->phymask |= (1 << i);
1493                         lp->mii_if.phy_id = i;
1494                         if (pcnet32_debug & NETIF_MSG_PROBE)
1495                                 printk(KERN_INFO PFX
1496                                        "Found PHY %04x:%04x at address %d.\n",
1497                                        id1, id2, i);
1498                 }
1499                 lp->a.write_bcr(ioaddr, 33, (lp->mii_if.phy_id) << 5);
1500                 if (lp->phycount > 1) {
1501                         lp->options |= PCNET32_PORT_MII;
1502                 }
1503         }
1504
1505         init_timer(&lp->watchdog_timer);
1506         lp->watchdog_timer.data = (unsigned long)dev;
1507         lp->watchdog_timer.function = (void *)&pcnet32_watchdog;
1508
1509         /* The PCNET32-specific entries in the device structure. */
1510         dev->open = &pcnet32_open;
1511         dev->hard_start_xmit = &pcnet32_start_xmit;
1512         dev->stop = &pcnet32_close;
1513         dev->get_stats = &pcnet32_get_stats;
1514         dev->set_multicast_list = &pcnet32_set_multicast_list;
1515         dev->do_ioctl = &pcnet32_ioctl;
1516         dev->ethtool_ops = &pcnet32_ethtool_ops;
1517         dev->tx_timeout = pcnet32_tx_timeout;
1518         dev->watchdog_timeo = (5 * HZ);
1519
1520 #ifdef CONFIG_NET_POLL_CONTROLLER
1521         dev->poll_controller = pcnet32_poll_controller;
1522 #endif
1523
1524         /* Fill in the generic fields of the device structure. */
1525         if (register_netdev(dev))
1526                 goto err_free_ring;
1527
1528         if (pdev) {
1529                 pci_set_drvdata(pdev, dev);
1530         } else {
1531                 lp->next = pcnet32_dev;
1532                 pcnet32_dev = dev;
1533         }
1534
1535         if (pcnet32_debug & NETIF_MSG_PROBE)
1536                 printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name);
1537         cards_found++;
1538
1539         /* enable LED writes */
1540         a->write_bcr(ioaddr, 2, a->read_bcr(ioaddr, 2) | 0x1000);
1541
1542         return 0;
1543
1544       err_free_ring:
1545         pcnet32_free_ring(dev);
1546       err_free_consistent:
1547         pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
1548       err_free_netdev:
1549         free_netdev(dev);
1550       err_release_region:
1551         release_region(ioaddr, PCNET32_TOTAL_SIZE);
1552         return ret;
1553 }
1554
1555 /* if any allocation fails, caller must also call pcnet32_free_ring */
1556 static int pcnet32_alloc_ring(struct net_device *dev, char *name)
1557 {
1558         struct pcnet32_private *lp = dev->priv;
1559
1560         lp->tx_ring = pci_alloc_consistent(lp->pci_dev,
1561                                            sizeof(struct pcnet32_tx_head) *
1562                                            lp->tx_ring_size,
1563                                            &lp->tx_ring_dma_addr);
1564         if (lp->tx_ring == NULL) {
1565                 if (pcnet32_debug & NETIF_MSG_DRV)
1566                         printk("\n" KERN_ERR PFX
1567                                "%s: Consistent memory allocation failed.\n",
1568                                name);
1569                 return -ENOMEM;
1570         }
1571
1572         lp->rx_ring = pci_alloc_consistent(lp->pci_dev,
1573                                            sizeof(struct pcnet32_rx_head) *
1574                                            lp->rx_ring_size,
1575                                            &lp->rx_ring_dma_addr);
1576         if (lp->rx_ring == NULL) {
1577                 if (pcnet32_debug & NETIF_MSG_DRV)
1578                         printk("\n" KERN_ERR PFX
1579                                "%s: Consistent memory allocation failed.\n",
1580                                name);
1581                 return -ENOMEM;
1582         }
1583
1584         lp->tx_dma_addr = kmalloc(sizeof(dma_addr_t) * lp->tx_ring_size,
1585                                   GFP_ATOMIC);
1586         if (!lp->tx_dma_addr) {
1587                 if (pcnet32_debug & NETIF_MSG_DRV)
1588                         printk("\n" KERN_ERR PFX
1589                                "%s: Memory allocation failed.\n", name);
1590                 return -ENOMEM;
1591         }
1592         memset(lp->tx_dma_addr, 0, sizeof(dma_addr_t) * lp->tx_ring_size);
1593
1594         lp->rx_dma_addr = kmalloc(sizeof(dma_addr_t) * lp->rx_ring_size,
1595                                   GFP_ATOMIC);
1596         if (!lp->rx_dma_addr) {
1597                 if (pcnet32_debug & NETIF_MSG_DRV)
1598                         printk("\n" KERN_ERR PFX
1599                                "%s: Memory allocation failed.\n", name);
1600                 return -ENOMEM;
1601         }
1602         memset(lp->rx_dma_addr, 0, sizeof(dma_addr_t) * lp->rx_ring_size);
1603
1604         lp->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * lp->tx_ring_size,
1605                                 GFP_ATOMIC);
1606         if (!lp->tx_skbuff) {
1607                 if (pcnet32_debug & NETIF_MSG_DRV)
1608                         printk("\n" KERN_ERR PFX
1609                                "%s: Memory allocation failed.\n", name);
1610                 return -ENOMEM;
1611         }
1612         memset(lp->tx_skbuff, 0, sizeof(struct sk_buff *) * lp->tx_ring_size);
1613
1614         lp->rx_skbuff = kmalloc(sizeof(struct sk_buff *) * lp->rx_ring_size,
1615                                 GFP_ATOMIC);
1616         if (!lp->rx_skbuff) {
1617                 if (pcnet32_debug & NETIF_MSG_DRV)
1618                         printk("\n" KERN_ERR PFX
1619                                "%s: Memory allocation failed.\n", name);
1620                 return -ENOMEM;
1621         }
1622         memset(lp->rx_skbuff, 0, sizeof(struct sk_buff *) * lp->rx_ring_size);
1623
1624         return 0;
1625 }
1626
1627 static void pcnet32_free_ring(struct net_device *dev)
1628 {
1629         struct pcnet32_private *lp = dev->priv;
1630
1631         kfree(lp->tx_skbuff);
1632         lp->tx_skbuff = NULL;
1633
1634         kfree(lp->rx_skbuff);
1635         lp->rx_skbuff = NULL;
1636
1637         kfree(lp->tx_dma_addr);
1638         lp->tx_dma_addr = NULL;
1639
1640         kfree(lp->rx_dma_addr);
1641         lp->rx_dma_addr = NULL;
1642
1643         if (lp->tx_ring) {
1644                 pci_free_consistent(lp->pci_dev,
1645                                     sizeof(struct pcnet32_tx_head) *
1646                                     lp->tx_ring_size, lp->tx_ring,
1647                                     lp->tx_ring_dma_addr);
1648                 lp->tx_ring = NULL;
1649         }
1650
1651         if (lp->rx_ring) {
1652                 pci_free_consistent(lp->pci_dev,
1653                                     sizeof(struct pcnet32_rx_head) *
1654                                     lp->rx_ring_size, lp->rx_ring,
1655                                     lp->rx_ring_dma_addr);
1656                 lp->rx_ring = NULL;
1657         }
1658 }
1659
1660 static int pcnet32_open(struct net_device *dev)
1661 {
1662         struct pcnet32_private *lp = dev->priv;
1663         unsigned long ioaddr = dev->base_addr;
1664         u16 val;
1665         int i;
1666         int rc;
1667         unsigned long flags;
1668
1669         if (request_irq(dev->irq, &pcnet32_interrupt,
1670                         lp->shared_irq ? SA_SHIRQ : 0, dev->name,
1671                         (void *)dev)) {
1672                 return -EAGAIN;
1673         }
1674
1675         spin_lock_irqsave(&lp->lock, flags);
1676         /* Check for a valid station address */
1677         if (!is_valid_ether_addr(dev->dev_addr)) {
1678                 rc = -EINVAL;
1679                 goto err_free_irq;
1680         }
1681
1682         /* Reset the PCNET32 */
1683         lp->a.reset(ioaddr);
1684
1685         /* switch pcnet32 to 32bit mode */
1686         lp->a.write_bcr(ioaddr, 20, 2);
1687
1688         if (netif_msg_ifup(lp))
1689                 printk(KERN_DEBUG
1690                        "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
1691                        dev->name, dev->irq, (u32) (lp->tx_ring_dma_addr),
1692                        (u32) (lp->rx_ring_dma_addr),
1693                        (u32) (lp->dma_addr +
1694                               offsetof(struct pcnet32_private, init_block)));
1695
1696         /* set/reset autoselect bit */
1697         val = lp->a.read_bcr(ioaddr, 2) & ~2;
1698         if (lp->options & PCNET32_PORT_ASEL)
1699                 val |= 2;
1700         lp->a.write_bcr(ioaddr, 2, val);
1701
1702         /* handle full duplex setting */
1703         if (lp->mii_if.full_duplex) {
1704                 val = lp->a.read_bcr(ioaddr, 9) & ~3;
1705                 if (lp->options & PCNET32_PORT_FD) {
1706                         val |= 1;
1707                         if (lp->options == (PCNET32_PORT_FD | PCNET32_PORT_AUI))
1708                                 val |= 2;
1709                 } else if (lp->options & PCNET32_PORT_ASEL) {
1710                         /* workaround of xSeries250, turn on for 79C975 only */
1711                         i = ((lp->a.read_csr(ioaddr, 88) |
1712                               (lp->a.
1713                                read_csr(ioaddr, 89) << 16)) >> 12) & 0xffff;
1714                         if (i == 0x2627)
1715                                 val |= 3;
1716                 }
1717                 lp->a.write_bcr(ioaddr, 9, val);
1718         }
1719
1720         /* set/reset GPSI bit in test register */
1721         val = lp->a.read_csr(ioaddr, 124) & ~0x10;
1722         if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI)
1723                 val |= 0x10;
1724         lp->a.write_csr(ioaddr, 124, val);
1725
1726         /* Allied Telesyn AT 2700/2701 FX are 100Mbit only and do not negotiate */
1727         if (lp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_AT &&
1728             (lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX ||
1729              lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) {
1730                 if (lp->options & PCNET32_PORT_ASEL) {
1731                         lp->options = PCNET32_PORT_FD | PCNET32_PORT_100;
1732                         if (netif_msg_link(lp))
1733                                 printk(KERN_DEBUG
1734                                        "%s: Setting 100Mb-Full Duplex.\n",
1735                                        dev->name);
1736                 }
1737         }
1738         if (lp->phycount < 2) {
1739                 /*
1740                  * 24 Jun 2004 according AMD, in order to change the PHY,
1741                  * DANAS (or DISPM for 79C976) must be set; then select the speed,
1742                  * duplex, and/or enable auto negotiation, and clear DANAS
1743                  */
1744                 if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) {
1745                         lp->a.write_bcr(ioaddr, 32,
1746                                         lp->a.read_bcr(ioaddr, 32) | 0x0080);
1747                         /* disable Auto Negotiation, set 10Mpbs, HD */
1748                         val = lp->a.read_bcr(ioaddr, 32) & ~0xb8;
1749                         if (lp->options & PCNET32_PORT_FD)
1750                                 val |= 0x10;
1751                         if (lp->options & PCNET32_PORT_100)
1752                                 val |= 0x08;
1753                         lp->a.write_bcr(ioaddr, 32, val);
1754                 } else {
1755                         if (lp->options & PCNET32_PORT_ASEL) {
1756                                 lp->a.write_bcr(ioaddr, 32,
1757                                                 lp->a.read_bcr(ioaddr,
1758                                                                32) | 0x0080);
1759                                 /* enable auto negotiate, setup, disable fd */
1760                                 val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
1761                                 val |= 0x20;
1762                                 lp->a.write_bcr(ioaddr, 32, val);
1763                         }
1764                 }
1765         } else {
1766                 int first_phy = -1;
1767                 u16 bmcr;
1768                 u32 bcr9;
1769                 struct ethtool_cmd ecmd;
1770
1771                 /*
1772                  * There is really no good other way to handle multiple PHYs
1773                  * other than turning off all automatics
1774                  */
1775                 val = lp->a.read_bcr(ioaddr, 2);
1776                 lp->a.write_bcr(ioaddr, 2, val & ~2);
1777                 val = lp->a.read_bcr(ioaddr, 32);
1778                 lp->a.write_bcr(ioaddr, 32, val & ~(1 << 7));   /* stop MII manager */
1779
1780                 if (!(lp->options & PCNET32_PORT_ASEL)) {
1781                         /* setup ecmd */
1782                         ecmd.port = PORT_MII;
1783                         ecmd.transceiver = XCVR_INTERNAL;
1784                         ecmd.autoneg = AUTONEG_DISABLE;
1785                         ecmd.speed =
1786                             lp->
1787                             options & PCNET32_PORT_100 ? SPEED_100 : SPEED_10;
1788                         bcr9 = lp->a.read_bcr(ioaddr, 9);
1789
1790                         if (lp->options & PCNET32_PORT_FD) {
1791                                 ecmd.duplex = DUPLEX_FULL;
1792                                 bcr9 |= (1 << 0);
1793                         } else {
1794                                 ecmd.duplex = DUPLEX_HALF;
1795                                 bcr9 |= ~(1 << 0);
1796                         }
1797                         lp->a.write_bcr(ioaddr, 9, bcr9);
1798                 }
1799
1800                 for (i = 0; i < PCNET32_MAX_PHYS; i++) {
1801                         if (lp->phymask & (1 << i)) {
1802                                 /* isolate all but the first PHY */
1803                                 bmcr = mdio_read(dev, i, MII_BMCR);
1804                                 if (first_phy == -1) {
1805                                         first_phy = i;
1806                                         mdio_write(dev, i, MII_BMCR,
1807                                                    bmcr & ~BMCR_ISOLATE);
1808                                 } else {
1809                                         mdio_write(dev, i, MII_BMCR,
1810                                                    bmcr | BMCR_ISOLATE);
1811                                 }
1812                                 /* use mii_ethtool_sset to setup PHY */
1813                                 lp->mii_if.phy_id = i;
1814                                 ecmd.phy_address = i;
1815                                 if (lp->options & PCNET32_PORT_ASEL) {
1816                                         mii_ethtool_gset(&lp->mii_if, &ecmd);
1817                                         ecmd.autoneg = AUTONEG_ENABLE;
1818                                 }
1819                                 mii_ethtool_sset(&lp->mii_if, &ecmd);
1820                         }
1821                 }
1822                 lp->mii_if.phy_id = first_phy;
1823                 if (netif_msg_link(lp))
1824                         printk(KERN_INFO "%s: Using PHY number %d.\n",
1825                                dev->name, first_phy);
1826         }
1827
1828 #ifdef DO_DXSUFLO
1829         if (lp->dxsuflo) {      /* Disable transmit stop on underflow */
1830                 val = lp->a.read_csr(ioaddr, 3);
1831                 val |= 0x40;
1832                 lp->a.write_csr(ioaddr, 3, val);
1833         }
1834 #endif
1835
1836         lp->init_block.mode =
1837             le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
1838         pcnet32_load_multicast(dev);
1839
1840         if (pcnet32_init_ring(dev)) {
1841                 rc = -ENOMEM;
1842                 goto err_free_ring;
1843         }
1844
1845         /* Re-initialize the PCNET32, and start it when done. */
1846         lp->a.write_csr(ioaddr, 1, (lp->dma_addr +
1847                                     offsetof(struct pcnet32_private,
1848                                              init_block)) & 0xffff);
1849         lp->a.write_csr(ioaddr, 2,
1850                         (lp->dma_addr +
1851                          offsetof(struct pcnet32_private, init_block)) >> 16);
1852
1853         lp->a.write_csr(ioaddr, 4, 0x0915);
1854         lp->a.write_csr(ioaddr, 0, 0x0001);
1855
1856         netif_start_queue(dev);
1857
1858         /* Print the link status and start the watchdog */
1859         pcnet32_check_media(dev, 1);
1860         mod_timer(&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
1861
1862         i = 0;
1863         while (i++ < 100)
1864                 if (lp->a.read_csr(ioaddr, 0) & 0x0100)
1865                         break;
1866         /*
1867          * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
1868          * reports that doing so triggers a bug in the '974.
1869          */
1870         lp->a.write_csr(ioaddr, 0, 0x0042);
1871
1872         if (netif_msg_ifup(lp))
1873                 printk(KERN_DEBUG
1874                        "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n",
1875                        dev->name, i,
1876                        (u32) (lp->dma_addr +
1877                               offsetof(struct pcnet32_private, init_block)),
1878                        lp->a.read_csr(ioaddr, 0));
1879
1880         spin_unlock_irqrestore(&lp->lock, flags);
1881
1882         return 0;               /* Always succeed */
1883
1884       err_free_ring:
1885         /* free any allocated skbuffs */
1886         for (i = 0; i < lp->rx_ring_size; i++) {
1887                 lp->rx_ring[i].status = 0;
1888                 if (lp->rx_skbuff[i]) {
1889                         pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i],
1890                                          PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
1891                         dev_kfree_skb(lp->rx_skbuff[i]);
1892                 }
1893                 lp->rx_skbuff[i] = NULL;
1894                 lp->rx_dma_addr[i] = 0;
1895         }
1896
1897         pcnet32_free_ring(dev);
1898
1899         /*
1900          * Switch back to 16bit mode to avoid problems with dumb
1901          * DOS packet driver after a warm reboot
1902          */
1903         lp->a.write_bcr(ioaddr, 20, 4);
1904
1905       err_free_irq:
1906         spin_unlock_irqrestore(&lp->lock, flags);
1907         free_irq(dev->irq, dev);
1908         return rc;
1909 }
1910
1911 /*
1912  * The LANCE has been halted for one reason or another (busmaster memory
1913  * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
1914  * etc.).  Modern LANCE variants always reload their ring-buffer
1915  * configuration when restarted, so we must reinitialize our ring
1916  * context before restarting.  As part of this reinitialization,
1917  * find all packets still on the Tx ring and pretend that they had been
1918  * sent (in effect, drop the packets on the floor) - the higher-level
1919  * protocols will time out and retransmit.  It'd be better to shuffle
1920  * these skbs to a temp list and then actually re-Tx them after
1921  * restarting the chip, but I'm too lazy to do so right now.  dplatt@3do.com
1922  */
1923
1924 static void pcnet32_purge_tx_ring(struct net_device *dev)
1925 {
1926         struct pcnet32_private *lp = dev->priv;
1927         int i;
1928
1929         for (i = 0; i < lp->tx_ring_size; i++) {
1930                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
1931                 wmb();          /* Make sure adapter sees owner change */
1932                 if (lp->tx_skbuff[i]) {
1933                         pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
1934                                          lp->tx_skbuff[i]->len,
1935                                          PCI_DMA_TODEVICE);
1936                         dev_kfree_skb_any(lp->tx_skbuff[i]);
1937                 }
1938                 lp->tx_skbuff[i] = NULL;
1939                 lp->tx_dma_addr[i] = 0;
1940         }
1941 }
1942
1943 /* Initialize the PCNET32 Rx and Tx rings. */
1944 static int pcnet32_init_ring(struct net_device *dev)
1945 {
1946         struct pcnet32_private *lp = dev->priv;
1947         int i;
1948
1949         lp->tx_full = 0;
1950         lp->cur_rx = lp->cur_tx = 0;
1951         lp->dirty_rx = lp->dirty_tx = 0;
1952
1953         for (i = 0; i < lp->rx_ring_size; i++) {
1954                 struct sk_buff *rx_skbuff = lp->rx_skbuff[i];
1955                 if (rx_skbuff == NULL) {
1956                         if (!
1957                             (rx_skbuff = lp->rx_skbuff[i] =
1958                              dev_alloc_skb(PKT_BUF_SZ))) {
1959                                 /* there is not much, we can do at this point */
1960                                 if (pcnet32_debug & NETIF_MSG_DRV)
1961                                         printk(KERN_ERR
1962                                                "%s: pcnet32_init_ring dev_alloc_skb failed.\n",
1963                                                dev->name);
1964                                 return -1;
1965                         }
1966                         skb_reserve(rx_skbuff, 2);
1967                 }
1968
1969                 rmb();
1970                 if (lp->rx_dma_addr[i] == 0)
1971                         lp->rx_dma_addr[i] =
1972                             pci_map_single(lp->pci_dev, rx_skbuff->data,
1973                                            PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
1974                 lp->rx_ring[i].base = (u32) le32_to_cpu(lp->rx_dma_addr[i]);
1975                 lp->rx_ring[i].buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
1976                 wmb();          /* Make sure owner changes after all others are visible */
1977                 lp->rx_ring[i].status = le16_to_cpu(0x8000);
1978         }
1979         /* The Tx buffer address is filled in as needed, but we do need to clear
1980          * the upper ownership bit. */
1981         for (i = 0; i < lp->tx_ring_size; i++) {
1982                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
1983                 wmb();          /* Make sure adapter sees owner change */
1984                 lp->tx_ring[i].base = 0;
1985                 lp->tx_dma_addr[i] = 0;
1986         }
1987
1988         lp->init_block.tlen_rlen =
1989             le16_to_cpu(lp->tx_len_bits | lp->rx_len_bits);
1990         for (i = 0; i < 6; i++)
1991                 lp->init_block.phys_addr[i] = dev->dev_addr[i];
1992         lp->init_block.rx_ring = (u32) le32_to_cpu(lp->rx_ring_dma_addr);
1993         lp->init_block.tx_ring = (u32) le32_to_cpu(lp->tx_ring_dma_addr);
1994         wmb();                  /* Make sure all changes are visible */
1995         return 0;
1996 }
1997
1998 /* the pcnet32 has been issued a stop or reset.  Wait for the stop bit
1999  * then flush the pending transmit operations, re-initialize the ring,
2000  * and tell the chip to initialize.
2001  */
2002 static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
2003 {
2004         struct pcnet32_private *lp = dev->priv;
2005         unsigned long ioaddr = dev->base_addr;
2006         int i;
2007
2008         /* wait for stop */
2009         for (i = 0; i < 100; i++)
2010                 if (lp->a.read_csr(ioaddr, 0) & 0x0004)
2011                         break;
2012
2013         if (i >= 100 && netif_msg_drv(lp))
2014                 printk(KERN_ERR
2015                        "%s: pcnet32_restart timed out waiting for stop.\n",
2016                        dev->name);
2017
2018         pcnet32_purge_tx_ring(dev);
2019         if (pcnet32_init_ring(dev))
2020                 return;
2021
2022         /* ReInit Ring */
2023         lp->a.write_csr(ioaddr, 0, 1);
2024         i = 0;
2025         while (i++ < 1000)
2026                 if (lp->a.read_csr(ioaddr, 0) & 0x0100)
2027                         break;
2028
2029         lp->a.write_csr(ioaddr, 0, csr0_bits);
2030 }
2031
2032 static void pcnet32_tx_timeout(struct net_device *dev)
2033 {
2034         struct pcnet32_private *lp = dev->priv;
2035         unsigned long ioaddr = dev->base_addr, flags;
2036
2037         spin_lock_irqsave(&lp->lock, flags);
2038         /* Transmitter timeout, serious problems. */
2039         if (pcnet32_debug & NETIF_MSG_DRV)
2040                 printk(KERN_ERR
2041                        "%s: transmit timed out, status %4.4x, resetting.\n",
2042                        dev->name, lp->a.read_csr(ioaddr, 0));
2043         lp->a.write_csr(ioaddr, 0, 0x0004);
2044         lp->stats.tx_errors++;
2045         if (netif_msg_tx_err(lp)) {
2046                 int i;
2047                 printk(KERN_DEBUG
2048                        " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
2049                        lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
2050                        lp->cur_rx);
2051                 for (i = 0; i < lp->rx_ring_size; i++)
2052                         printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
2053                                le32_to_cpu(lp->rx_ring[i].base),
2054                                (-le16_to_cpu(lp->rx_ring[i].buf_length)) &
2055                                0xffff, le32_to_cpu(lp->rx_ring[i].msg_length),
2056                                le16_to_cpu(lp->rx_ring[i].status));
2057                 for (i = 0; i < lp->tx_ring_size; i++)
2058                         printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
2059                                le32_to_cpu(lp->tx_ring[i].base),
2060                                (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff,
2061                                le32_to_cpu(lp->tx_ring[i].misc),
2062                                le16_to_cpu(lp->tx_ring[i].status));
2063                 printk("\n");
2064         }
2065         pcnet32_restart(dev, 0x0042);
2066
2067         dev->trans_start = jiffies;
2068         netif_wake_queue(dev);
2069
2070         spin_unlock_irqrestore(&lp->lock, flags);
2071 }
2072
2073 static int pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
2074 {
2075         struct pcnet32_private *lp = dev->priv;
2076         unsigned long ioaddr = dev->base_addr;
2077         u16 status;
2078         int entry;
2079         unsigned long flags;
2080
2081         spin_lock_irqsave(&lp->lock, flags);
2082
2083         if (netif_msg_tx_queued(lp)) {
2084                 printk(KERN_DEBUG
2085                        "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
2086                        dev->name, lp->a.read_csr(ioaddr, 0));
2087         }
2088
2089         /* Default status -- will not enable Successful-TxDone
2090          * interrupt when that option is available to us.
2091          */
2092         status = 0x8300;
2093
2094         /* Fill in a Tx ring entry */
2095
2096         /* Mask to ring buffer boundary. */
2097         entry = lp->cur_tx & lp->tx_mod_mask;
2098
2099         /* Caution: the write order is important here, set the status
2100          * with the "ownership" bits last. */
2101
2102         lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
2103
2104         lp->tx_ring[entry].misc = 0x00000000;
2105
2106         lp->tx_skbuff[entry] = skb;
2107         lp->tx_dma_addr[entry] =
2108             pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
2109         lp->tx_ring[entry].base = (u32) le32_to_cpu(lp->tx_dma_addr[entry]);
2110         wmb();                  /* Make sure owner changes after all others are visible */
2111         lp->tx_ring[entry].status = le16_to_cpu(status);
2112
2113         lp->cur_tx++;
2114         lp->stats.tx_bytes += skb->len;
2115
2116         /* Trigger an immediate send poll. */
2117         lp->a.write_csr(ioaddr, 0, 0x0048);
2118
2119         dev->trans_start = jiffies;
2120
2121         if (lp->tx_ring[(entry + 1) & lp->tx_mod_mask].base != 0) {
2122                 lp->tx_full = 1;
2123                 netif_stop_queue(dev);
2124         }
2125         spin_unlock_irqrestore(&lp->lock, flags);
2126         return 0;
2127 }
2128
2129 /* The PCNET32 interrupt handler. */
2130 static irqreturn_t
2131 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2132 {
2133         struct net_device *dev = dev_id;
2134         struct pcnet32_private *lp;
2135         unsigned long ioaddr;
2136         u16 csr0, rap;
2137         int boguscnt = max_interrupt_work;
2138         int must_restart;
2139
2140         if (!dev) {
2141                 if (pcnet32_debug & NETIF_MSG_INTR)
2142                         printk(KERN_DEBUG "%s(): irq %d for unknown device\n",
2143                                __FUNCTION__, irq);
2144                 return IRQ_NONE;
2145         }
2146
2147         ioaddr = dev->base_addr;
2148         lp = dev->priv;
2149
2150         spin_lock(&lp->lock);
2151
2152         rap = lp->a.read_rap(ioaddr);
2153         while ((csr0 = lp->a.read_csr(ioaddr, 0)) & 0x8f00 && --boguscnt >= 0) {
2154                 if (csr0 == 0xffff) {
2155                         break;  /* PCMCIA remove happened */
2156                 }
2157                 /* Acknowledge all of the current interrupt sources ASAP. */
2158                 lp->a.write_csr(ioaddr, 0, csr0 & ~0x004f);
2159
2160                 must_restart = 0;
2161
2162                 if (netif_msg_intr(lp))
2163                         printk(KERN_DEBUG
2164                                "%s: interrupt  csr0=%#2.2x new csr=%#2.2x.\n",
2165                                dev->name, csr0, lp->a.read_csr(ioaddr, 0));
2166
2167                 if (csr0 & 0x0400)      /* Rx interrupt */
2168                         pcnet32_rx(dev);
2169
2170                 if (csr0 & 0x0200) {    /* Tx-done interrupt */
2171                         unsigned int dirty_tx = lp->dirty_tx;
2172                         int delta;
2173
2174                         while (dirty_tx != lp->cur_tx) {
2175                                 int entry = dirty_tx & lp->tx_mod_mask;
2176                                 int status =
2177                                     (short)le16_to_cpu(lp->tx_ring[entry].
2178                                                        status);
2179
2180                                 if (status < 0)
2181                                         break;  /* It still hasn't been Txed */
2182
2183                                 lp->tx_ring[entry].base = 0;
2184
2185                                 if (status & 0x4000) {
2186                                         /* There was an major error, log it. */
2187                                         int err_status =
2188                                             le32_to_cpu(lp->tx_ring[entry].
2189                                                         misc);
2190                                         lp->stats.tx_errors++;
2191                                         if (netif_msg_tx_err(lp))
2192                                                 printk(KERN_ERR
2193                                                        "%s: Tx error status=%04x err_status=%08x\n",
2194                                                        dev->name, status,
2195                                                        err_status);
2196                                         if (err_status & 0x04000000)
2197                                                 lp->stats.tx_aborted_errors++;
2198                                         if (err_status & 0x08000000)
2199                                                 lp->stats.tx_carrier_errors++;
2200                                         if (err_status & 0x10000000)
2201                                                 lp->stats.tx_window_errors++;
2202 #ifndef DO_DXSUFLO
2203                                         if (err_status & 0x40000000) {
2204                                                 lp->stats.tx_fifo_errors++;
2205                                                 /* Ackk!  On FIFO errors the Tx unit is turned off! */
2206                                                 /* Remove this verbosity later! */
2207                                                 if (netif_msg_tx_err(lp))
2208                                                         printk(KERN_ERR
2209                                                                "%s: Tx FIFO error! CSR0=%4.4x\n",
2210                                                                dev->name, csr0);
2211                                                 must_restart = 1;
2212                                         }
2213 #else
2214                                         if (err_status & 0x40000000) {
2215                                                 lp->stats.tx_fifo_errors++;
2216                                                 if (!lp->dxsuflo) {     /* If controller doesn't recover ... */
2217                                                         /* Ackk!  On FIFO errors the Tx unit is turned off! */
2218                                                         /* Remove this verbosity later! */
2219                                                         if (netif_msg_tx_err
2220                                                             (lp))
2221                                                                 printk(KERN_ERR
2222                                                                        "%s: Tx FIFO error! CSR0=%4.4x\n",
2223                                                                        dev->
2224                                                                        name,
2225                                                                        csr0);
2226                                                         must_restart = 1;
2227                                                 }
2228                                         }
2229 #endif
2230                                 } else {
2231                                         if (status & 0x1800)
2232                                                 lp->stats.collisions++;
2233                                         lp->stats.tx_packets++;
2234                                 }
2235
2236                                 /* We must free the original skb */
2237                                 if (lp->tx_skbuff[entry]) {
2238                                         pci_unmap_single(lp->pci_dev,
2239                                                          lp->tx_dma_addr[entry],
2240                                                          lp->tx_skbuff[entry]->
2241                                                          len, PCI_DMA_TODEVICE);
2242                                         dev_kfree_skb_irq(lp->tx_skbuff[entry]);
2243                                         lp->tx_skbuff[entry] = NULL;
2244                                         lp->tx_dma_addr[entry] = 0;
2245                                 }
2246                                 dirty_tx++;
2247                         }
2248
2249                         delta =
2250                             (lp->cur_tx - dirty_tx) & (lp->tx_mod_mask +
2251                                                        lp->tx_ring_size);
2252                         if (delta > lp->tx_ring_size) {
2253                                 if (netif_msg_drv(lp))
2254                                         printk(KERN_ERR
2255                                                "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
2256                                                dev->name, dirty_tx, lp->cur_tx,
2257                                                lp->tx_full);
2258                                 dirty_tx += lp->tx_ring_size;
2259                                 delta -= lp->tx_ring_size;
2260                         }
2261
2262                         if (lp->tx_full &&
2263                             netif_queue_stopped(dev) &&
2264                             delta < lp->tx_ring_size - 2) {
2265                                 /* The ring is no longer full, clear tbusy. */
2266                                 lp->tx_full = 0;
2267                                 netif_wake_queue(dev);
2268                         }
2269                         lp->dirty_tx = dirty_tx;
2270                 }
2271
2272                 /* Log misc errors. */
2273                 if (csr0 & 0x4000)
2274                         lp->stats.tx_errors++;  /* Tx babble. */
2275                 if (csr0 & 0x1000) {
2276                         /*
2277                          * this happens when our receive ring is full. This shouldn't
2278                          * be a problem as we will see normal rx interrupts for the frames
2279                          * in the receive ring. But there are some PCI chipsets (I can
2280                          * reproduce this on SP3G with Intel saturn chipset) which have
2281                          * sometimes problems and will fill up the receive ring with
2282                          * error descriptors. In this situation we don't get a rx
2283                          * interrupt, but a missed frame interrupt sooner or later.
2284                          * So we try to clean up our receive ring here.
2285                          */
2286                         pcnet32_rx(dev);
2287                         lp->stats.rx_errors++;  /* Missed a Rx frame. */
2288                 }
2289                 if (csr0 & 0x0800) {
2290                         if (netif_msg_drv(lp))
2291                                 printk(KERN_ERR
2292                                        "%s: Bus master arbitration failure, status %4.4x.\n",
2293                                        dev->name, csr0);
2294                         /* unlike for the lance, there is no restart needed */
2295                 }
2296
2297                 if (must_restart) {
2298                         /* reset the chip to clear the error condition, then restart */
2299                         lp->a.reset(ioaddr);
2300                         lp->a.write_csr(ioaddr, 4, 0x0915);
2301                         pcnet32_restart(dev, 0x0002);
2302                         netif_wake_queue(dev);
2303                 }
2304         }
2305
2306         /* Set interrupt enable. */
2307         lp->a.write_csr(ioaddr, 0, 0x0040);
2308         lp->a.write_rap(ioaddr, rap);
2309
2310         if (netif_msg_intr(lp))
2311                 printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
2312                        dev->name, lp->a.read_csr(ioaddr, 0));
2313
2314         spin_unlock(&lp->lock);
2315
2316         return IRQ_HANDLED;
2317 }
2318
2319 static int pcnet32_rx(struct net_device *dev)
2320 {
2321         struct pcnet32_private *lp = dev->priv;
2322         int entry = lp->cur_rx & lp->rx_mod_mask;
2323         int boguscnt = lp->rx_ring_size / 2;
2324
2325         /* If we own the next entry, it's a new packet. Send it up. */
2326         while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
2327                 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
2328
2329                 if (status != 0x03) {   /* There was an error. */
2330                         /*
2331                          * There is a tricky error noted by John Murphy,
2332                          * <murf@perftech.com> to Russ Nelson: Even with full-sized
2333                          * buffers it's possible for a jabber packet to use two
2334                          * buffers, with only the last correctly noting the error.
2335                          */
2336                         if (status & 0x01)      /* Only count a general error at the */
2337                                 lp->stats.rx_errors++;  /* end of a packet. */
2338                         if (status & 0x20)
2339                                 lp->stats.rx_frame_errors++;
2340                         if (status & 0x10)
2341                                 lp->stats.rx_over_errors++;
2342                         if (status & 0x08)
2343                                 lp->stats.rx_crc_errors++;
2344                         if (status & 0x04)
2345                                 lp->stats.rx_fifo_errors++;
2346                         lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
2347                 } else {
2348                         /* Malloc up new buffer, compatible with net-2e. */
2349                         short pkt_len =
2350                             (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)
2351                             - 4;
2352                         struct sk_buff *skb;
2353
2354                         /* Discard oversize frames. */
2355                         if (unlikely(pkt_len > PKT_BUF_SZ - 2)) {
2356                                 if (netif_msg_drv(lp))
2357                                         printk(KERN_ERR
2358                                                "%s: Impossible packet size %d!\n",
2359                                                dev->name, pkt_len);
2360                                 lp->stats.rx_errors++;
2361                         } else if (pkt_len < 60) {
2362                                 if (netif_msg_rx_err(lp))
2363                                         printk(KERN_ERR "%s: Runt packet!\n",
2364                                                dev->name);
2365                                 lp->stats.rx_errors++;
2366                         } else {
2367                                 int rx_in_place = 0;
2368
2369                                 if (pkt_len > rx_copybreak) {
2370                                         struct sk_buff *newskb;
2371
2372                                         if ((newskb =
2373                                              dev_alloc_skb(PKT_BUF_SZ))) {
2374                                                 skb_reserve(newskb, 2);
2375                                                 skb = lp->rx_skbuff[entry];
2376                                                 pci_unmap_single(lp->pci_dev,
2377                                                                  lp->
2378                                                                  rx_dma_addr
2379                                                                  [entry],
2380                                                                  PKT_BUF_SZ - 2,
2381                                                                  PCI_DMA_FROMDEVICE);
2382                                                 skb_put(skb, pkt_len);
2383                                                 lp->rx_skbuff[entry] = newskb;
2384                                                 newskb->dev = dev;
2385                                                 lp->rx_dma_addr[entry] =
2386                                                     pci_map_single(lp->pci_dev,
2387                                                                    newskb->data,
2388                                                                    PKT_BUF_SZ -
2389                                                                    2,
2390                                                                    PCI_DMA_FROMDEVICE);
2391                                                 lp->rx_ring[entry].base =
2392                                                     le32_to_cpu(lp->
2393                                                                 rx_dma_addr
2394                                                                 [entry]);
2395                                                 rx_in_place = 1;
2396                                         } else
2397                                                 skb = NULL;
2398                                 } else {
2399                                         skb = dev_alloc_skb(pkt_len + 2);
2400                                 }
2401
2402                                 if (skb == NULL) {
2403                                         int i;
2404                                         if (netif_msg_drv(lp))
2405                                                 printk(KERN_ERR
2406                                                        "%s: Memory squeeze, deferring packet.\n",
2407                                                        dev->name);
2408                                         for (i = 0; i < lp->rx_ring_size; i++)
2409                                                 if ((short)
2410                                                     le16_to_cpu(lp->
2411                                                                 rx_ring[(entry +
2412                                                                          i)
2413                                                                         & lp->
2414                                                                         rx_mod_mask].
2415                                                                 status) < 0)
2416                                                         break;
2417
2418                                         if (i > lp->rx_ring_size - 2) {
2419                                                 lp->stats.rx_dropped++;
2420                                                 lp->rx_ring[entry].status |=
2421                                                     le16_to_cpu(0x8000);
2422                                                 wmb();  /* Make sure adapter sees owner change */
2423                                                 lp->cur_rx++;
2424                                         }
2425                                         break;
2426                                 }
2427                                 skb->dev = dev;
2428                                 if (!rx_in_place) {
2429                                         skb_reserve(skb, 2);    /* 16 byte align */
2430                                         skb_put(skb, pkt_len);  /* Make room */
2431                                         pci_dma_sync_single_for_cpu(lp->pci_dev,
2432                                                                     lp->
2433                                                                     rx_dma_addr
2434                                                                     [entry],
2435                                                                     PKT_BUF_SZ -
2436                                                                     2,
2437                                                                     PCI_DMA_FROMDEVICE);
2438                                         eth_copy_and_sum(skb,
2439                                                          (unsigned char *)(lp->
2440                                                                            rx_skbuff
2441                                                                            [entry]->
2442                                                                            data),
2443                                                          pkt_len, 0);
2444                                         pci_dma_sync_single_for_device(lp->
2445                                                                        pci_dev,
2446                                                                        lp->
2447                                                                        rx_dma_addr
2448                                                                        [entry],
2449                                                                        PKT_BUF_SZ
2450                                                                        - 2,
2451                                                                        PCI_DMA_FROMDEVICE);
2452                                 }
2453                                 lp->stats.rx_bytes += skb->len;
2454                                 skb->protocol = eth_type_trans(skb, dev);
2455                                 netif_rx(skb);
2456                                 dev->last_rx = jiffies;
2457                                 lp->stats.rx_packets++;
2458                         }
2459                 }
2460                 /*
2461                  * The docs say that the buffer length isn't touched, but Andrew Boyd
2462                  * of QNX reports that some revs of the 79C965 clear it.
2463                  */
2464                 lp->rx_ring[entry].buf_length = le16_to_cpu(2 - PKT_BUF_SZ);
2465                 wmb();          /* Make sure owner changes after all others are visible */
2466                 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
2467                 entry = (++lp->cur_rx) & lp->rx_mod_mask;
2468                 if (--boguscnt <= 0)
2469                         break;  /* don't stay in loop forever */
2470         }
2471
2472         return 0;
2473 }
2474
2475 static int pcnet32_close(struct net_device *dev)
2476 {
2477         unsigned long ioaddr = dev->base_addr;
2478         struct pcnet32_private *lp = dev->priv;
2479         int i;
2480         unsigned long flags;
2481
2482         del_timer_sync(&lp->watchdog_timer);
2483
2484         netif_stop_queue(dev);
2485
2486         spin_lock_irqsave(&lp->lock, flags);
2487
2488         lp->stats.rx_missed_errors = lp->a.read_csr(ioaddr, 112);
2489
2490         if (netif_msg_ifdown(lp))
2491                 printk(KERN_DEBUG
2492                        "%s: Shutting down ethercard, status was %2.2x.\n",
2493                        dev->name, lp->a.read_csr(ioaddr, 0));
2494
2495         /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
2496         lp->a.write_csr(ioaddr, 0, 0x0004);
2497
2498         /*
2499          * Switch back to 16bit mode to avoid problems with dumb
2500          * DOS packet driver after a warm reboot
2501          */
2502         lp->a.write_bcr(ioaddr, 20, 4);
2503
2504         spin_unlock_irqrestore(&lp->lock, flags);
2505
2506         free_irq(dev->irq, dev);
2507
2508         spin_lock_irqsave(&lp->lock, flags);
2509
2510         /* free all allocated skbuffs */
2511         for (i = 0; i < lp->rx_ring_size; i++) {
2512                 lp->rx_ring[i].status = 0;
2513                 wmb();          /* Make sure adapter sees owner change */
2514                 if (lp->rx_skbuff[i]) {
2515                         pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i],
2516                                          PKT_BUF_SZ - 2, PCI_DMA_FROMDEVICE);
2517                         dev_kfree_skb(lp->rx_skbuff[i]);
2518                 }
2519                 lp->rx_skbuff[i] = NULL;
2520                 lp->rx_dma_addr[i] = 0;
2521         }
2522
2523         for (i = 0; i < lp->tx_ring_size; i++) {
2524                 lp->tx_ring[i].status = 0;      /* CPU owns buffer */
2525                 wmb();          /* Make sure adapter sees owner change */
2526                 if (lp->tx_skbuff[i]) {
2527                         pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i],
2528                                          lp->tx_skbuff[i]->len,
2529                                          PCI_DMA_TODEVICE);
2530                         dev_kfree_skb(lp->tx_skbuff[i]);
2531                 }
2532                 lp->tx_skbuff[i] = NULL;
2533                 lp->tx_dma_addr[i] = 0;
2534         }
2535
2536         spin_unlock_irqrestore(&lp->lock, flags);
2537
2538         return 0;
2539 }
2540
2541 static struct net_device_stats *pcnet32_get_stats(struct net_device *dev)
2542 {
2543         struct pcnet32_private *lp = dev->priv;
2544         unsigned long ioaddr = dev->base_addr;
2545         u16 saved_addr;
2546         unsigned long flags;
2547
2548         spin_lock_irqsave(&lp->lock, flags);
2549         saved_addr = lp->a.read_rap(ioaddr);
2550         lp->stats.rx_missed_errors = lp->a.read_csr(ioaddr, 112);
2551         lp->a.write_rap(ioaddr, saved_addr);
2552         spin_unlock_irqrestore(&lp->lock, flags);
2553
2554         return &lp->stats;
2555 }
2556
2557 /* taken from the sunlance driver, which it took from the depca driver */
2558 static void pcnet32_load_multicast(struct net_device *dev)
2559 {
2560         struct pcnet32_private *lp = dev->priv;
2561         volatile struct pcnet32_init_block *ib = &lp->init_block;
2562         volatile u16 *mcast_table = (u16 *) & ib->filter;
2563         struct dev_mc_list *dmi = dev->mc_list;
2564         char *addrs;
2565         int i;
2566         u32 crc;
2567
2568         /* set all multicast bits */
2569         if (dev->flags & IFF_ALLMULTI) {
2570                 ib->filter[0] = 0xffffffff;
2571                 ib->filter[1] = 0xffffffff;
2572                 return;
2573         }
2574         /* clear the multicast filter */
2575         ib->filter[0] = 0;
2576         ib->filter[1] = 0;
2577
2578         /* Add addresses */
2579         for (i = 0; i < dev->mc_count; i++) {
2580                 addrs = dmi->dmi_addr;
2581                 dmi = dmi->next;
2582
2583                 /* multicast address? */
2584                 if (!(*addrs & 1))
2585                         continue;
2586
2587                 crc = ether_crc_le(6, addrs);
2588                 crc = crc >> 26;
2589                 mcast_table[crc >> 4] =
2590                     le16_to_cpu(le16_to_cpu(mcast_table[crc >> 4]) |
2591                                 (1 << (crc & 0xf)));
2592         }
2593         return;
2594 }
2595
2596 /*
2597  * Set or clear the multicast filter for this adaptor.
2598  */
2599 static void pcnet32_set_multicast_list(struct net_device *dev)
2600 {
2601         unsigned long ioaddr = dev->base_addr, flags;
2602         struct pcnet32_private *lp = dev->priv;
2603
2604         spin_lock_irqsave(&lp->lock, flags);
2605         if (dev->flags & IFF_PROMISC) {
2606                 /* Log any net taps. */
2607                 if (netif_msg_hw(lp))
2608                         printk(KERN_INFO "%s: Promiscuous mode enabled.\n",
2609                                dev->name);
2610                 lp->init_block.mode =
2611                     le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) <<
2612                                 7);
2613         } else {
2614                 lp->init_block.mode =
2615                     le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7);
2616                 pcnet32_load_multicast(dev);
2617         }
2618
2619         lp->a.write_csr(ioaddr, 0, 0x0004);     /* Temporarily stop the lance. */
2620         pcnet32_restart(dev, 0x0042);   /*  Resume normal operation */
2621         netif_wake_queue(dev);
2622
2623         spin_unlock_irqrestore(&lp->lock, flags);
2624 }
2625
2626 /* This routine assumes that the lp->lock is held */
2627 static int mdio_read(struct net_device *dev, int phy_id, int reg_num)
2628 {
2629         struct pcnet32_private *lp = dev->priv;
2630         unsigned long ioaddr = dev->base_addr;
2631         u16 val_out;
2632
2633         if (!lp->mii)
2634                 return 0;
2635
2636         lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2637         val_out = lp->a.read_bcr(ioaddr, 34);
2638
2639         return val_out;
2640 }
2641
2642 /* This routine assumes that the lp->lock is held */
2643 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val)
2644 {
2645         struct pcnet32_private *lp = dev->priv;
2646         unsigned long ioaddr = dev->base_addr;
2647
2648         if (!lp->mii)
2649                 return;
2650
2651         lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2652         lp->a.write_bcr(ioaddr, 34, val);
2653 }
2654
2655 static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2656 {
2657         struct pcnet32_private *lp = dev->priv;
2658         int rc;
2659         unsigned long flags;
2660
2661         /* SIOC[GS]MIIxxx ioctls */
2662         if (lp->mii) {
2663                 spin_lock_irqsave(&lp->lock, flags);
2664                 rc = generic_mii_ioctl(&lp->mii_if, if_mii(rq), cmd, NULL);
2665                 spin_unlock_irqrestore(&lp->lock, flags);
2666         } else {
2667                 rc = -EOPNOTSUPP;
2668         }
2669
2670         return rc;
2671 }
2672
2673 static int pcnet32_check_otherphy(struct net_device *dev)
2674 {
2675         struct pcnet32_private *lp = dev->priv;
2676         struct mii_if_info mii = lp->mii_if;
2677         u16 bmcr;
2678         int i;
2679
2680         for (i = 0; i < PCNET32_MAX_PHYS; i++) {
2681                 if (i == lp->mii_if.phy_id)
2682                         continue;       /* skip active phy */
2683                 if (lp->phymask & (1 << i)) {
2684                         mii.phy_id = i;
2685                         if (mii_link_ok(&mii)) {
2686                                 /* found PHY with active link */
2687                                 if (netif_msg_link(lp))
2688                                         printk(KERN_INFO
2689                                                "%s: Using PHY number %d.\n",
2690                                                dev->name, i);
2691
2692                                 /* isolate inactive phy */
2693                                 bmcr =
2694                                     mdio_read(dev, lp->mii_if.phy_id, MII_BMCR);
2695                                 mdio_write(dev, lp->mii_if.phy_id, MII_BMCR,
2696                                            bmcr | BMCR_ISOLATE);
2697
2698                                 /* de-isolate new phy */
2699                                 bmcr = mdio_read(dev, i, MII_BMCR);
2700                                 mdio_write(dev, i, MII_BMCR,
2701                                            bmcr & ~BMCR_ISOLATE);
2702
2703                                 /* set new phy address */
2704                                 lp->mii_if.phy_id = i;
2705                                 return 1;
2706                         }
2707                 }
2708         }
2709         return 0;
2710 }
2711
2712 /*
2713  * Show the status of the media.  Similar to mii_check_media however it
2714  * correctly shows the link speed for all (tested) pcnet32 variants.
2715  * Devices with no mii just report link state without speed.
2716  *
2717  * Caller is assumed to hold and release the lp->lock.
2718  */
2719
2720 static void pcnet32_check_media(struct net_device *dev, int verbose)
2721 {
2722         struct pcnet32_private *lp = dev->priv;
2723         int curr_link;
2724         int prev_link = netif_carrier_ok(dev) ? 1 : 0;
2725         u32 bcr9;
2726
2727         if (lp->mii) {
2728                 curr_link = mii_link_ok(&lp->mii_if);
2729         } else {
2730                 ulong ioaddr = dev->base_addr;  /* card base I/O address */
2731                 curr_link = (lp->a.read_bcr(ioaddr, 4) != 0xc0);
2732         }
2733         if (!curr_link) {
2734                 if (prev_link || verbose) {
2735                         netif_carrier_off(dev);
2736                         if (netif_msg_link(lp))
2737                                 printk(KERN_INFO "%s: link down\n", dev->name);
2738                 }
2739                 if (lp->phycount > 1) {
2740                         curr_link = pcnet32_check_otherphy(dev);
2741                         prev_link = 0;
2742                 }
2743         } else if (verbose || !prev_link) {
2744                 netif_carrier_on(dev);
2745                 if (lp->mii) {
2746                         if (netif_msg_link(lp)) {
2747                                 struct ethtool_cmd ecmd;
2748                                 mii_ethtool_gset(&lp->mii_if, &ecmd);
2749                                 printk(KERN_INFO
2750                                        "%s: link up, %sMbps, %s-duplex\n",
2751                                        dev->name,
2752                                        (ecmd.speed == SPEED_100) ? "100" : "10",
2753                                        (ecmd.duplex ==
2754                                         DUPLEX_FULL) ? "full" : "half");
2755                         }
2756                         bcr9 = lp->a.read_bcr(dev->base_addr, 9);
2757                         if ((bcr9 & (1 << 0)) != lp->mii_if.full_duplex) {
2758                                 if (lp->mii_if.full_duplex)
2759                                         bcr9 |= (1 << 0);
2760                                 else
2761                                         bcr9 &= ~(1 << 0);
2762                                 lp->a.write_bcr(dev->base_addr, 9, bcr9);
2763                         }
2764                 } else {
2765                         if (netif_msg_link(lp))
2766                                 printk(KERN_INFO "%s: link up\n", dev->name);
2767                 }
2768         }
2769 }
2770
2771 /*
2772  * Check for loss of link and link establishment.
2773  * Can not use mii_check_media because it does nothing if mode is forced.
2774  */
2775
2776 static void pcnet32_watchdog(struct net_device *dev)
2777 {
2778         struct pcnet32_private *lp = dev->priv;
2779         unsigned long flags;
2780
2781         /* Print the link status if it has changed */
2782         spin_lock_irqsave(&lp->lock, flags);
2783         pcnet32_check_media(dev, 0);
2784         spin_unlock_irqrestore(&lp->lock, flags);
2785
2786         mod_timer(&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT);
2787 }
2788
2789 static void __devexit pcnet32_remove_one(struct pci_dev *pdev)
2790 {
2791         struct net_device *dev = pci_get_drvdata(pdev);
2792
2793         if (dev) {
2794                 struct pcnet32_private *lp = dev->priv;
2795
2796                 unregister_netdev(dev);
2797                 pcnet32_free_ring(dev);
2798                 release_region(dev->base_addr, PCNET32_TOTAL_SIZE);
2799                 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2800                 free_netdev(dev);
2801                 pci_disable_device(pdev);
2802                 pci_set_drvdata(pdev, NULL);
2803         }
2804 }
2805
2806 static struct pci_driver pcnet32_driver = {
2807         .name = DRV_NAME,
2808         .probe = pcnet32_probe_pci,
2809         .remove = __devexit_p(pcnet32_remove_one),
2810         .id_table = pcnet32_pci_tbl,
2811 };
2812
2813 /* An additional parameter that may be passed in... */
2814 static int debug = -1;
2815 static int tx_start_pt = -1;
2816 static int pcnet32_have_pci;
2817
2818 module_param(debug, int, 0);
2819 MODULE_PARM_DESC(debug, DRV_NAME " debug level");
2820 module_param(max_interrupt_work, int, 0);
2821 MODULE_PARM_DESC(max_interrupt_work,
2822                  DRV_NAME " maximum events handled per interrupt");
2823 module_param(rx_copybreak, int, 0);
2824 MODULE_PARM_DESC(rx_copybreak,
2825                  DRV_NAME " copy breakpoint for copy-only-tiny-frames");
2826 module_param(tx_start_pt, int, 0);
2827 MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)");
2828 module_param(pcnet32vlb, int, 0);
2829 MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)");
2830 module_param_array(options, int, NULL, 0);
2831 MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)");
2832 module_param_array(full_duplex, int, NULL, 0);
2833 MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)");
2834 /* Module Parameter for HomePNA cards added by Patrick Simmons, 2004 */
2835 module_param_array(homepna, int, NULL, 0);
2836 MODULE_PARM_DESC(homepna,
2837                  DRV_NAME
2838                  " mode for 79C978 cards (1 for HomePNA, 0 for Ethernet, default Ethernet");
2839
2840 MODULE_AUTHOR("Thomas Bogendoerfer");
2841 MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards");
2842 MODULE_LICENSE("GPL");
2843
2844 #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
2845
2846 static int __init pcnet32_init_module(void)
2847 {
2848         printk(KERN_INFO "%s", version);
2849
2850         pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);
2851
2852         if ((tx_start_pt >= 0) && (tx_start_pt <= 3))
2853                 tx_start = tx_start_pt;
2854
2855         /* find the PCI devices */
2856         if (!pci_module_init(&pcnet32_driver))
2857                 pcnet32_have_pci = 1;
2858
2859         /* should we find any remaining VLbus devices ? */
2860         if (pcnet32vlb)
2861                 pcnet32_probe_vlbus();
2862
2863         if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE))
2864                 printk(KERN_INFO PFX "%d cards_found.\n", cards_found);
2865
2866         return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV;
2867 }
2868
2869 static void __exit pcnet32_cleanup_module(void)
2870 {
2871         struct net_device *next_dev;
2872
2873         while (pcnet32_dev) {
2874                 struct pcnet32_private *lp = pcnet32_dev->priv;
2875                 next_dev = lp->next;
2876                 unregister_netdev(pcnet32_dev);
2877                 pcnet32_free_ring(pcnet32_dev);
2878                 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
2879                 pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
2880                 free_netdev(pcnet32_dev);
2881                 pcnet32_dev = next_dev;
2882         }
2883
2884         if (pcnet32_have_pci)
2885                 pci_unregister_driver(&pcnet32_driver);
2886 }
2887
2888 module_init(pcnet32_init_module);
2889 module_exit(pcnet32_cleanup_module);
2890
2891 /*
2892  * Local variables:
2893  *  c-indent-level: 4
2894  *  tab-width: 8
2895  * End:
2896  */