myri10ge: move data structures into a single slice
[linux-2.6.git] / drivers / net / myri10ge / myri10ge.c
1 /*************************************************************************
2  * myri10ge.c: Myricom Myri-10G Ethernet driver.
3  *
4  * Copyright (C) 2005 - 2007 Myricom, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  *
31  *
32  * If the eeprom on your board is not recent enough, you will need to get a
33  * newer firmware image at:
34  *   http://www.myri.com/scs/download-Myri10GE.html
35  *
36  * Contact Information:
37  *   <help@myri.com>
38  *   Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39  *************************************************************************/
40
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
52 #include <linux/ip.h>
53 #include <linux/inet.h>
54 #include <linux/in.h>
55 #include <linux/ethtool.h>
56 #include <linux/firmware.h>
57 #include <linux/delay.h>
58 #include <linux/version.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
63 #include <linux/io.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
66 #include <net/ip.h>
67 #include <net/tcp.h>
68 #include <asm/byteorder.h>
69 #include <asm/io.h>
70 #include <asm/processor.h>
71 #ifdef CONFIG_MTRR
72 #include <asm/mtrr.h>
73 #endif
74
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
77
78 #define MYRI10GE_VERSION_STR "1.3.2-1.287"
79
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR);
83 MODULE_LICENSE("Dual BSD/GPL");
84
85 #define MYRI10GE_MAX_ETHER_MTU 9014
86
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
92
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
97
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
100
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
104
105 struct myri10ge_rx_buffer_state {
106         struct page *page;
107         int page_offset;
108          DECLARE_PCI_UNMAP_ADDR(bus)
109          DECLARE_PCI_UNMAP_LEN(len)
110 };
111
112 struct myri10ge_tx_buffer_state {
113         struct sk_buff *skb;
114         int last;
115          DECLARE_PCI_UNMAP_ADDR(bus)
116          DECLARE_PCI_UNMAP_LEN(len)
117 };
118
119 struct myri10ge_cmd {
120         u32 data0;
121         u32 data1;
122         u32 data2;
123 };
124
125 struct myri10ge_rx_buf {
126         struct mcp_kreq_ether_recv __iomem *lanai;      /* lanai ptr for recv ring */
127         u8 __iomem *wc_fifo;    /* w/c rx dma addr fifo address */
128         struct mcp_kreq_ether_recv *shadow;     /* host shadow of recv ring */
129         struct myri10ge_rx_buffer_state *info;
130         struct page *page;
131         dma_addr_t bus;
132         int page_offset;
133         int cnt;
134         int fill_cnt;
135         int alloc_fail;
136         int mask;               /* number of rx slots -1 */
137         int watchdog_needed;
138 };
139
140 struct myri10ge_tx_buf {
141         struct mcp_kreq_ether_send __iomem *lanai;      /* lanai ptr for sendq */
142         u8 __iomem *wc_fifo;    /* w/c send fifo address */
143         struct mcp_kreq_ether_send *req_list;   /* host shadow of sendq */
144         char *req_bytes;
145         struct myri10ge_tx_buffer_state *info;
146         int mask;               /* number of transmit slots -1  */
147         int req ____cacheline_aligned;  /* transmit slots submitted     */
148         int pkt_start;          /* packets started */
149         int stop_queue;
150         int linearized;
151         int done ____cacheline_aligned; /* transmit slots completed     */
152         int pkt_done;           /* packets completed */
153         int wake_queue;
154 };
155
156 struct myri10ge_rx_done {
157         struct mcp_slot *entry;
158         dma_addr_t bus;
159         int cnt;
160         int idx;
161         struct net_lro_mgr lro_mgr;
162         struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
163 };
164
165 struct myri10ge_slice_netstats {
166         unsigned long rx_packets;
167         unsigned long tx_packets;
168         unsigned long rx_bytes;
169         unsigned long tx_bytes;
170         unsigned long rx_dropped;
171         unsigned long tx_dropped;
172 };
173
174 struct myri10ge_slice_state {
175         struct myri10ge_tx_buf tx;      /* transmit ring        */
176         struct myri10ge_rx_buf rx_small;
177         struct myri10ge_rx_buf rx_big;
178         struct myri10ge_rx_done rx_done;
179         struct net_device *dev;
180         struct napi_struct napi;
181         struct myri10ge_priv *mgp;
182         struct myri10ge_slice_netstats stats;
183         __be32 __iomem *irq_claim;
184         struct mcp_irq_data *fw_stats;
185         dma_addr_t fw_stats_bus;
186         int watchdog_tx_done;
187         int watchdog_tx_req;
188 };
189
190 struct myri10ge_priv {
191         struct myri10ge_slice_state ss;
192         int tx_boundary;        /* boundary transmits cannot cross */
193         int running;            /* running?             */
194         int csum_flag;          /* rx_csums?            */
195         int small_bytes;
196         int big_bytes;
197         struct net_device *dev;
198         struct net_device_stats stats;
199         spinlock_t stats_lock;
200         u8 __iomem *sram;
201         int sram_size;
202         unsigned long board_span;
203         unsigned long iomem_base;
204         __be32 __iomem *irq_deassert;
205         char *mac_addr_string;
206         struct mcp_cmd_response *cmd;
207         dma_addr_t cmd_bus;
208         struct pci_dev *pdev;
209         int msi_enabled;
210         u32 link_state;
211         unsigned int rdma_tags_available;
212         int intr_coal_delay;
213         __be32 __iomem *intr_coal_delay_ptr;
214         int mtrr;
215         int wc_enabled;
216         int down_cnt;
217         wait_queue_head_t down_wq;
218         struct work_struct watchdog_work;
219         struct timer_list watchdog_timer;
220         int watchdog_resets;
221         int watchdog_pause;
222         int pause;
223         char *fw_name;
224         char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
225         char *product_code_string;
226         char fw_version[128];
227         int fw_ver_major;
228         int fw_ver_minor;
229         int fw_ver_tiny;
230         int adopted_rx_filter_bug;
231         u8 mac_addr[6];         /* eeprom mac address */
232         unsigned long serial_number;
233         int vendor_specific_offset;
234         int fw_multicast_support;
235         unsigned long features;
236         u32 max_tso6;
237         u32 read_dma;
238         u32 write_dma;
239         u32 read_write_dma;
240         u32 link_changes;
241         u32 msg_enable;
242 };
243
244 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
245 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
246
247 static char *myri10ge_fw_name = NULL;
248 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
249 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
250
251 static int myri10ge_ecrc_enable = 1;
252 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
253 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
254
255 static int myri10ge_max_intr_slots = 1024;
256 module_param(myri10ge_max_intr_slots, int, S_IRUGO);
257 MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots");
258
259 static int myri10ge_small_bytes = -1;   /* -1 == auto */
260 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
261 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets");
262
263 static int myri10ge_msi = 1;    /* enable msi by default */
264 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
265 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts");
266
267 static int myri10ge_intr_coal_delay = 75;
268 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
269 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay");
270
271 static int myri10ge_flow_control = 1;
272 module_param(myri10ge_flow_control, int, S_IRUGO);
273 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter");
274
275 static int myri10ge_deassert_wait = 1;
276 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
277 MODULE_PARM_DESC(myri10ge_deassert_wait,
278                  "Wait when deasserting legacy interrupts");
279
280 static int myri10ge_force_firmware = 0;
281 module_param(myri10ge_force_firmware, int, S_IRUGO);
282 MODULE_PARM_DESC(myri10ge_force_firmware,
283                  "Force firmware to assume aligned completions");
284
285 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
286 module_param(myri10ge_initial_mtu, int, S_IRUGO);
287 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU");
288
289 static int myri10ge_napi_weight = 64;
290 module_param(myri10ge_napi_weight, int, S_IRUGO);
291 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight");
292
293 static int myri10ge_watchdog_timeout = 1;
294 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
295 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout");
296
297 static int myri10ge_max_irq_loops = 1048576;
298 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
299 MODULE_PARM_DESC(myri10ge_max_irq_loops,
300                  "Set stuck legacy IRQ detection threshold");
301
302 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
303
304 static int myri10ge_debug = -1; /* defaults above */
305 module_param(myri10ge_debug, int, 0);
306 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
307
308 static int myri10ge_lro = 1;
309 module_param(myri10ge_lro, int, S_IRUGO);
310 MODULE_PARM_DESC(myri10ge_lro, "Enable large receive offload");
311
312 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
313 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
314 MODULE_PARM_DESC(myri10ge_lro_max_pkts,
315                  "Number of LRO packets to be aggregated");
316
317 static int myri10ge_fill_thresh = 256;
318 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
319 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed");
320
321 static int myri10ge_reset_recover = 1;
322
323 static int myri10ge_wcfifo = 0;
324 module_param(myri10ge_wcfifo, int, S_IRUGO);
325 MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled");
326
327 #define MYRI10GE_FW_OFFSET 1024*1024
328 #define MYRI10GE_HIGHPART_TO_U32(X) \
329 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
330 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
331
332 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
333
334 static void myri10ge_set_multicast_list(struct net_device *dev);
335 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev);
336
337 static inline void put_be32(__be32 val, __be32 __iomem * p)
338 {
339         __raw_writel((__force __u32) val, (__force void __iomem *)p);
340 }
341
342 static int
343 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
344                   struct myri10ge_cmd *data, int atomic)
345 {
346         struct mcp_cmd *buf;
347         char buf_bytes[sizeof(*buf) + 8];
348         struct mcp_cmd_response *response = mgp->cmd;
349         char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
350         u32 dma_low, dma_high, result, value;
351         int sleep_total = 0;
352
353         /* ensure buf is aligned to 8 bytes */
354         buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
355
356         buf->data0 = htonl(data->data0);
357         buf->data1 = htonl(data->data1);
358         buf->data2 = htonl(data->data2);
359         buf->cmd = htonl(cmd);
360         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
361         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
362
363         buf->response_addr.low = htonl(dma_low);
364         buf->response_addr.high = htonl(dma_high);
365         response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
366         mb();
367         myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
368
369         /* wait up to 15ms. Longest command is the DMA benchmark,
370          * which is capped at 5ms, but runs from a timeout handler
371          * that runs every 7.8ms. So a 15ms timeout leaves us with
372          * a 2.2ms margin
373          */
374         if (atomic) {
375                 /* if atomic is set, do not sleep,
376                  * and try to get the completion quickly
377                  * (1ms will be enough for those commands) */
378                 for (sleep_total = 0;
379                      sleep_total < 1000
380                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
381                      sleep_total += 10) {
382                         udelay(10);
383                         mb();
384                 }
385         } else {
386                 /* use msleep for most command */
387                 for (sleep_total = 0;
388                      sleep_total < 15
389                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
390                      sleep_total++)
391                         msleep(1);
392         }
393
394         result = ntohl(response->result);
395         value = ntohl(response->data);
396         if (result != MYRI10GE_NO_RESPONSE_RESULT) {
397                 if (result == 0) {
398                         data->data0 = value;
399                         return 0;
400                 } else if (result == MXGEFW_CMD_UNKNOWN) {
401                         return -ENOSYS;
402                 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
403                         return -E2BIG;
404                 } else {
405                         dev_err(&mgp->pdev->dev,
406                                 "command %d failed, result = %d\n",
407                                 cmd, result);
408                         return -ENXIO;
409                 }
410         }
411
412         dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
413                 cmd, result);
414         return -EAGAIN;
415 }
416
417 /*
418  * The eeprom strings on the lanaiX have the format
419  * SN=x\0
420  * MAC=x:x:x:x:x:x\0
421  * PT:ddd mmm xx xx:xx:xx xx\0
422  * PV:ddd mmm xx xx:xx:xx xx\0
423  */
424 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
425 {
426         char *ptr, *limit;
427         int i;
428
429         ptr = mgp->eeprom_strings;
430         limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
431
432         while (*ptr != '\0' && ptr < limit) {
433                 if (memcmp(ptr, "MAC=", 4) == 0) {
434                         ptr += 4;
435                         mgp->mac_addr_string = ptr;
436                         for (i = 0; i < 6; i++) {
437                                 if ((ptr + 2) > limit)
438                                         goto abort;
439                                 mgp->mac_addr[i] =
440                                     simple_strtoul(ptr, &ptr, 16);
441                                 ptr += 1;
442                         }
443                 }
444                 if (memcmp(ptr, "PC=", 3) == 0) {
445                         ptr += 3;
446                         mgp->product_code_string = ptr;
447                 }
448                 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
449                         ptr += 3;
450                         mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
451                 }
452                 while (ptr < limit && *ptr++) ;
453         }
454
455         return 0;
456
457 abort:
458         dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
459         return -ENXIO;
460 }
461
462 /*
463  * Enable or disable periodic RDMAs from the host to make certain
464  * chipsets resend dropped PCIe messages
465  */
466
467 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
468 {
469         char __iomem *submit;
470         __be32 buf[16] __attribute__ ((__aligned__(8)));
471         u32 dma_low, dma_high;
472         int i;
473
474         /* clear confirmation addr */
475         mgp->cmd->data = 0;
476         mb();
477
478         /* send a rdma command to the PCIe engine, and wait for the
479          * response in the confirmation address.  The firmware should
480          * write a -1 there to indicate it is alive and well
481          */
482         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
483         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
484
485         buf[0] = htonl(dma_high);       /* confirm addr MSW */
486         buf[1] = htonl(dma_low);        /* confirm addr LSW */
487         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
488         buf[3] = htonl(dma_high);       /* dummy addr MSW */
489         buf[4] = htonl(dma_low);        /* dummy addr LSW */
490         buf[5] = htonl(enable); /* enable? */
491
492         submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
493
494         myri10ge_pio_copy(submit, &buf, sizeof(buf));
495         for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
496                 msleep(1);
497         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
498                 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
499                         (enable ? "enable" : "disable"));
500 }
501
502 static int
503 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
504                            struct mcp_gen_header *hdr)
505 {
506         struct device *dev = &mgp->pdev->dev;
507
508         /* check firmware type */
509         if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
510                 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
511                 return -EINVAL;
512         }
513
514         /* save firmware version for ethtool */
515         strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
516
517         sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
518                &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
519
520         if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
521               && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
522                 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
523                 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
524                         MXGEFW_VERSION_MINOR);
525                 return -EINVAL;
526         }
527         return 0;
528 }
529
530 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
531 {
532         unsigned crc, reread_crc;
533         const struct firmware *fw;
534         struct device *dev = &mgp->pdev->dev;
535         struct mcp_gen_header *hdr;
536         size_t hdr_offset;
537         int status;
538         unsigned i;
539
540         if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
541                 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
542                         mgp->fw_name);
543                 status = -EINVAL;
544                 goto abort_with_nothing;
545         }
546
547         /* check size */
548
549         if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
550             fw->size < MCP_HEADER_PTR_OFFSET + 4) {
551                 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
552                 status = -EINVAL;
553                 goto abort_with_fw;
554         }
555
556         /* check id */
557         hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
558         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
559                 dev_err(dev, "Bad firmware file\n");
560                 status = -EINVAL;
561                 goto abort_with_fw;
562         }
563         hdr = (void *)(fw->data + hdr_offset);
564
565         status = myri10ge_validate_firmware(mgp, hdr);
566         if (status != 0)
567                 goto abort_with_fw;
568
569         crc = crc32(~0, fw->data, fw->size);
570         for (i = 0; i < fw->size; i += 256) {
571                 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
572                                   fw->data + i,
573                                   min(256U, (unsigned)(fw->size - i)));
574                 mb();
575                 readb(mgp->sram);
576         }
577         /* corruption checking is good for parity recovery and buggy chipset */
578         memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
579         reread_crc = crc32(~0, fw->data, fw->size);
580         if (crc != reread_crc) {
581                 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
582                         (unsigned)fw->size, reread_crc, crc);
583                 status = -EIO;
584                 goto abort_with_fw;
585         }
586         *size = (u32) fw->size;
587
588 abort_with_fw:
589         release_firmware(fw);
590
591 abort_with_nothing:
592         return status;
593 }
594
595 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
596 {
597         struct mcp_gen_header *hdr;
598         struct device *dev = &mgp->pdev->dev;
599         const size_t bytes = sizeof(struct mcp_gen_header);
600         size_t hdr_offset;
601         int status;
602
603         /* find running firmware header */
604         hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
605
606         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
607                 dev_err(dev, "Running firmware has bad header offset (%d)\n",
608                         (int)hdr_offset);
609                 return -EIO;
610         }
611
612         /* copy header of running firmware from SRAM to host memory to
613          * validate firmware */
614         hdr = kmalloc(bytes, GFP_KERNEL);
615         if (hdr == NULL) {
616                 dev_err(dev, "could not malloc firmware hdr\n");
617                 return -ENOMEM;
618         }
619         memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
620         status = myri10ge_validate_firmware(mgp, hdr);
621         kfree(hdr);
622
623         /* check to see if adopted firmware has bug where adopting
624          * it will cause broadcasts to be filtered unless the NIC
625          * is kept in ALLMULTI mode */
626         if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
627             mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
628                 mgp->adopted_rx_filter_bug = 1;
629                 dev_warn(dev, "Adopting fw %d.%d.%d: "
630                          "working around rx filter bug\n",
631                          mgp->fw_ver_major, mgp->fw_ver_minor,
632                          mgp->fw_ver_tiny);
633         }
634         return status;
635 }
636
637 static int myri10ge_load_firmware(struct myri10ge_priv *mgp)
638 {
639         char __iomem *submit;
640         __be32 buf[16] __attribute__ ((__aligned__(8)));
641         u32 dma_low, dma_high, size;
642         int status, i;
643         struct myri10ge_cmd cmd;
644
645         size = 0;
646         status = myri10ge_load_hotplug_firmware(mgp, &size);
647         if (status) {
648                 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
649
650                 /* Do not attempt to adopt firmware if there
651                  * was a bad crc */
652                 if (status == -EIO)
653                         return status;
654
655                 status = myri10ge_adopt_running_firmware(mgp);
656                 if (status != 0) {
657                         dev_err(&mgp->pdev->dev,
658                                 "failed to adopt running firmware\n");
659                         return status;
660                 }
661                 dev_info(&mgp->pdev->dev,
662                          "Successfully adopted running firmware\n");
663                 if (mgp->tx_boundary == 4096) {
664                         dev_warn(&mgp->pdev->dev,
665                                  "Using firmware currently running on NIC"
666                                  ".  For optimal\n");
667                         dev_warn(&mgp->pdev->dev,
668                                  "performance consider loading optimized "
669                                  "firmware\n");
670                         dev_warn(&mgp->pdev->dev, "via hotplug\n");
671                 }
672
673                 mgp->fw_name = "adopted";
674                 mgp->tx_boundary = 2048;
675                 return status;
676         }
677
678         /* clear confirmation addr */
679         mgp->cmd->data = 0;
680         mb();
681
682         /* send a reload command to the bootstrap MCP, and wait for the
683          *  response in the confirmation address.  The firmware should
684          * write a -1 there to indicate it is alive and well
685          */
686         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
687         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
688
689         buf[0] = htonl(dma_high);       /* confirm addr MSW */
690         buf[1] = htonl(dma_low);        /* confirm addr LSW */
691         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
692
693         /* FIX: All newest firmware should un-protect the bottom of
694          * the sram before handoff. However, the very first interfaces
695          * do not. Therefore the handoff copy must skip the first 8 bytes
696          */
697         buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
698         buf[4] = htonl(size - 8);       /* length of code */
699         buf[5] = htonl(8);      /* where to copy to */
700         buf[6] = htonl(0);      /* where to jump to */
701
702         submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
703
704         myri10ge_pio_copy(submit, &buf, sizeof(buf));
705         mb();
706         msleep(1);
707         mb();
708         i = 0;
709         while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 9) {
710                 msleep(1 << i);
711                 i++;
712         }
713         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
714                 dev_err(&mgp->pdev->dev, "handoff failed\n");
715                 return -ENXIO;
716         }
717         dev_info(&mgp->pdev->dev, "handoff confirmed\n");
718         myri10ge_dummy_rdma(mgp, 1);
719
720         /* probe for IPv6 TSO support */
721         mgp->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
722         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
723                                    &cmd, 0);
724         if (status == 0) {
725                 mgp->max_tso6 = cmd.data0;
726                 mgp->features |= NETIF_F_TSO6;
727         }
728         return 0;
729 }
730
731 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
732 {
733         struct myri10ge_cmd cmd;
734         int status;
735
736         cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
737                      | (addr[2] << 8) | addr[3]);
738
739         cmd.data1 = ((addr[4] << 8) | (addr[5]));
740
741         status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
742         return status;
743 }
744
745 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
746 {
747         struct myri10ge_cmd cmd;
748         int status, ctl;
749
750         ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
751         status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
752
753         if (status) {
754                 printk(KERN_ERR
755                        "myri10ge: %s: Failed to set flow control mode\n",
756                        mgp->dev->name);
757                 return status;
758         }
759         mgp->pause = pause;
760         return 0;
761 }
762
763 static void
764 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
765 {
766         struct myri10ge_cmd cmd;
767         int status, ctl;
768
769         ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
770         status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
771         if (status)
772                 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
773                        mgp->dev->name);
774 }
775
776 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
777 {
778         struct myri10ge_cmd cmd;
779         int status;
780         u32 len;
781         struct page *dmatest_page;
782         dma_addr_t dmatest_bus;
783         char *test = " ";
784
785         dmatest_page = alloc_page(GFP_KERNEL);
786         if (!dmatest_page)
787                 return -ENOMEM;
788         dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
789                                    DMA_BIDIRECTIONAL);
790
791         /* Run a small DMA test.
792          * The magic multipliers to the length tell the firmware
793          * to do DMA read, write, or read+write tests.  The
794          * results are returned in cmd.data0.  The upper 16
795          * bits or the return is the number of transfers completed.
796          * The lower 16 bits is the time in 0.5us ticks that the
797          * transfers took to complete.
798          */
799
800         len = mgp->tx_boundary;
801
802         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
803         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
804         cmd.data2 = len * 0x10000;
805         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
806         if (status != 0) {
807                 test = "read";
808                 goto abort;
809         }
810         mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
811         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
812         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
813         cmd.data2 = len * 0x1;
814         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
815         if (status != 0) {
816                 test = "write";
817                 goto abort;
818         }
819         mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
820
821         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
822         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
823         cmd.data2 = len * 0x10001;
824         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
825         if (status != 0) {
826                 test = "read/write";
827                 goto abort;
828         }
829         mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
830             (cmd.data0 & 0xffff);
831
832 abort:
833         pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
834         put_page(dmatest_page);
835
836         if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
837                 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
838                          test, status);
839
840         return status;
841 }
842
843 static int myri10ge_reset(struct myri10ge_priv *mgp)
844 {
845         struct myri10ge_cmd cmd;
846         int status;
847         size_t bytes;
848
849         /* try to send a reset command to the card to see if it
850          * is alive */
851         memset(&cmd, 0, sizeof(cmd));
852         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
853         if (status != 0) {
854                 dev_err(&mgp->pdev->dev, "failed reset\n");
855                 return -ENXIO;
856         }
857
858         (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
859
860         /* Now exchange information about interrupts  */
861
862         bytes = myri10ge_max_intr_slots * sizeof(*mgp->ss.rx_done.entry);
863         memset(mgp->ss.rx_done.entry, 0, bytes);
864         cmd.data0 = (u32) bytes;
865         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
866         cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->ss.rx_done.bus);
867         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->ss.rx_done.bus);
868         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0);
869
870         status |=
871             myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
872         mgp->ss.irq_claim = (__iomem __be32 *) (mgp->sram + cmd.data0);
873         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
874                                     &cmd, 0);
875         mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
876
877         status |= myri10ge_send_cmd
878             (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
879         mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
880         if (status != 0) {
881                 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
882                 return status;
883         }
884         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
885
886         memset(mgp->ss.rx_done.entry, 0, bytes);
887
888         /* reset mcp/driver shared state back to 0 */
889         mgp->ss.tx.req = 0;
890         mgp->ss.tx.done = 0;
891         mgp->ss.tx.pkt_start = 0;
892         mgp->ss.tx.pkt_done = 0;
893         mgp->ss.rx_big.cnt = 0;
894         mgp->ss.rx_small.cnt = 0;
895         mgp->ss.rx_done.idx = 0;
896         mgp->ss.rx_done.cnt = 0;
897         mgp->link_changes = 0;
898         status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
899         myri10ge_change_pause(mgp, mgp->pause);
900         myri10ge_set_multicast_list(mgp->dev);
901         return status;
902 }
903
904 static inline void
905 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
906                     struct mcp_kreq_ether_recv *src)
907 {
908         __be32 low;
909
910         low = src->addr_low;
911         src->addr_low = htonl(DMA_32BIT_MASK);
912         myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
913         mb();
914         myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
915         mb();
916         src->addr_low = low;
917         put_be32(low, &dst->addr_low);
918         mb();
919 }
920
921 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
922 {
923         struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
924
925         if ((skb->protocol == htons(ETH_P_8021Q)) &&
926             (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
927              vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
928                 skb->csum = hw_csum;
929                 skb->ip_summed = CHECKSUM_COMPLETE;
930         }
931 }
932
933 static inline void
934 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
935                       struct skb_frag_struct *rx_frags, int len, int hlen)
936 {
937         struct skb_frag_struct *skb_frags;
938
939         skb->len = skb->data_len = len;
940         skb->truesize = len + sizeof(struct sk_buff);
941         /* attach the page(s) */
942
943         skb_frags = skb_shinfo(skb)->frags;
944         while (len > 0) {
945                 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
946                 len -= rx_frags->size;
947                 skb_frags++;
948                 rx_frags++;
949                 skb_shinfo(skb)->nr_frags++;
950         }
951
952         /* pskb_may_pull is not available in irq context, but
953          * skb_pull() (for ether_pad and eth_type_trans()) requires
954          * the beginning of the packet in skb_headlen(), move it
955          * manually */
956         skb_copy_to_linear_data(skb, va, hlen);
957         skb_shinfo(skb)->frags[0].page_offset += hlen;
958         skb_shinfo(skb)->frags[0].size -= hlen;
959         skb->data_len -= hlen;
960         skb->tail += hlen;
961         skb_pull(skb, MXGEFW_PAD);
962 }
963
964 static void
965 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
966                         int bytes, int watchdog)
967 {
968         struct page *page;
969         int idx;
970
971         if (unlikely(rx->watchdog_needed && !watchdog))
972                 return;
973
974         /* try to refill entire ring */
975         while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
976                 idx = rx->fill_cnt & rx->mask;
977                 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
978                         /* we can use part of previous page */
979                         get_page(rx->page);
980                 } else {
981                         /* we need a new page */
982                         page =
983                             alloc_pages(GFP_ATOMIC | __GFP_COMP,
984                                         MYRI10GE_ALLOC_ORDER);
985                         if (unlikely(page == NULL)) {
986                                 if (rx->fill_cnt - rx->cnt < 16)
987                                         rx->watchdog_needed = 1;
988                                 return;
989                         }
990                         rx->page = page;
991                         rx->page_offset = 0;
992                         rx->bus = pci_map_page(mgp->pdev, page, 0,
993                                                MYRI10GE_ALLOC_SIZE,
994                                                PCI_DMA_FROMDEVICE);
995                 }
996                 rx->info[idx].page = rx->page;
997                 rx->info[idx].page_offset = rx->page_offset;
998                 /* note that this is the address of the start of the
999                  * page */
1000                 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
1001                 rx->shadow[idx].addr_low =
1002                     htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
1003                 rx->shadow[idx].addr_high =
1004                     htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
1005
1006                 /* start next packet on a cacheline boundary */
1007                 rx->page_offset += SKB_DATA_ALIGN(bytes);
1008
1009 #if MYRI10GE_ALLOC_SIZE > 4096
1010                 /* don't cross a 4KB boundary */
1011                 if ((rx->page_offset >> 12) !=
1012                     ((rx->page_offset + bytes - 1) >> 12))
1013                         rx->page_offset = (rx->page_offset + 4096) & ~4095;
1014 #endif
1015                 rx->fill_cnt++;
1016
1017                 /* copy 8 descriptors to the firmware at a time */
1018                 if ((idx & 7) == 7) {
1019                         if (rx->wc_fifo == NULL)
1020                                 myri10ge_submit_8rx(&rx->lanai[idx - 7],
1021                                                     &rx->shadow[idx - 7]);
1022                         else {
1023                                 mb();
1024                                 myri10ge_pio_copy(rx->wc_fifo,
1025                                                   &rx->shadow[idx - 7], 64);
1026                         }
1027                 }
1028         }
1029 }
1030
1031 static inline void
1032 myri10ge_unmap_rx_page(struct pci_dev *pdev,
1033                        struct myri10ge_rx_buffer_state *info, int bytes)
1034 {
1035         /* unmap the recvd page if we're the only or last user of it */
1036         if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1037             (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1038                 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1039                                       & ~(MYRI10GE_ALLOC_SIZE - 1)),
1040                                MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1041         }
1042 }
1043
1044 #define MYRI10GE_HLEN 64        /* The number of bytes to copy from a
1045                                  * page into an skb */
1046
1047 static inline int
1048 myri10ge_rx_done(struct myri10ge_slice_state *ss, struct myri10ge_rx_buf *rx,
1049                  int bytes, int len, __wsum csum)
1050 {
1051         struct myri10ge_priv *mgp = ss->mgp;
1052         struct sk_buff *skb;
1053         struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1054         int i, idx, hlen, remainder;
1055         struct pci_dev *pdev = mgp->pdev;
1056         struct net_device *dev = mgp->dev;
1057         u8 *va;
1058
1059         len += MXGEFW_PAD;
1060         idx = rx->cnt & rx->mask;
1061         va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1062         prefetch(va);
1063         /* Fill skb_frag_struct(s) with data from our receive */
1064         for (i = 0, remainder = len; remainder > 0; i++) {
1065                 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1066                 rx_frags[i].page = rx->info[idx].page;
1067                 rx_frags[i].page_offset = rx->info[idx].page_offset;
1068                 if (remainder < MYRI10GE_ALLOC_SIZE)
1069                         rx_frags[i].size = remainder;
1070                 else
1071                         rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1072                 rx->cnt++;
1073                 idx = rx->cnt & rx->mask;
1074                 remainder -= MYRI10GE_ALLOC_SIZE;
1075         }
1076
1077         if (mgp->csum_flag && myri10ge_lro) {
1078                 rx_frags[0].page_offset += MXGEFW_PAD;
1079                 rx_frags[0].size -= MXGEFW_PAD;
1080                 len -= MXGEFW_PAD;
1081                 lro_receive_frags(&ss->rx_done.lro_mgr, rx_frags,
1082                                   len, len,
1083                                   /* opaque, will come back in get_frag_header */
1084                                   (void *)(__force unsigned long)csum, csum);
1085                 return 1;
1086         }
1087
1088         hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1089
1090         /* allocate an skb to attach the page(s) to. This is done
1091          * after trying LRO, so as to avoid skb allocation overheads */
1092
1093         skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1094         if (unlikely(skb == NULL)) {
1095                 mgp->stats.rx_dropped++;
1096                 do {
1097                         i--;
1098                         put_page(rx_frags[i].page);
1099                 } while (i != 0);
1100                 return 0;
1101         }
1102
1103         /* Attach the pages to the skb, and trim off any padding */
1104         myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1105         if (skb_shinfo(skb)->frags[0].size <= 0) {
1106                 put_page(skb_shinfo(skb)->frags[0].page);
1107                 skb_shinfo(skb)->nr_frags = 0;
1108         }
1109         skb->protocol = eth_type_trans(skb, dev);
1110
1111         if (mgp->csum_flag) {
1112                 if ((skb->protocol == htons(ETH_P_IP)) ||
1113                     (skb->protocol == htons(ETH_P_IPV6))) {
1114                         skb->csum = csum;
1115                         skb->ip_summed = CHECKSUM_COMPLETE;
1116                 } else
1117                         myri10ge_vlan_ip_csum(skb, csum);
1118         }
1119         netif_receive_skb(skb);
1120         dev->last_rx = jiffies;
1121         return 1;
1122 }
1123
1124 static inline void
1125 myri10ge_tx_done(struct myri10ge_slice_state *ss, int mcp_index)
1126 {
1127         struct pci_dev *pdev = ss->mgp->pdev;
1128         struct myri10ge_tx_buf *tx = &ss->tx;
1129         struct sk_buff *skb;
1130         int idx, len;
1131
1132         while (tx->pkt_done != mcp_index) {
1133                 idx = tx->done & tx->mask;
1134                 skb = tx->info[idx].skb;
1135
1136                 /* Mark as free */
1137                 tx->info[idx].skb = NULL;
1138                 if (tx->info[idx].last) {
1139                         tx->pkt_done++;
1140                         tx->info[idx].last = 0;
1141                 }
1142                 tx->done++;
1143                 len = pci_unmap_len(&tx->info[idx], len);
1144                 pci_unmap_len_set(&tx->info[idx], len, 0);
1145                 if (skb) {
1146                         ss->stats.tx_bytes += skb->len;
1147                         ss->stats.tx_packets++;
1148                         dev_kfree_skb_irq(skb);
1149                         if (len)
1150                                 pci_unmap_single(pdev,
1151                                                  pci_unmap_addr(&tx->info[idx],
1152                                                                 bus), len,
1153                                                  PCI_DMA_TODEVICE);
1154                 } else {
1155                         if (len)
1156                                 pci_unmap_page(pdev,
1157                                                pci_unmap_addr(&tx->info[idx],
1158                                                               bus), len,
1159                                                PCI_DMA_TODEVICE);
1160                 }
1161         }
1162         /* start the queue if we've stopped it */
1163         if (netif_queue_stopped(ss->dev)
1164             && tx->req - tx->done < (tx->mask >> 1)) {
1165                 tx->wake_queue++;
1166                 netif_wake_queue(ss->dev);
1167         }
1168 }
1169
1170 static inline int
1171 myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1172 {
1173         struct myri10ge_rx_done *rx_done = &ss->rx_done;
1174         struct myri10ge_priv *mgp = ss->mgp;
1175         unsigned long rx_bytes = 0;
1176         unsigned long rx_packets = 0;
1177         unsigned long rx_ok;
1178
1179         int idx = rx_done->idx;
1180         int cnt = rx_done->cnt;
1181         int work_done = 0;
1182         u16 length;
1183         __wsum checksum;
1184
1185         while (rx_done->entry[idx].length != 0 && work_done < budget) {
1186                 length = ntohs(rx_done->entry[idx].length);
1187                 rx_done->entry[idx].length = 0;
1188                 checksum = csum_unfold(rx_done->entry[idx].checksum);
1189                 if (length <= mgp->small_bytes)
1190                         rx_ok = myri10ge_rx_done(ss, &ss->rx_small,
1191                                                  mgp->small_bytes,
1192                                                  length, checksum);
1193                 else
1194                         rx_ok = myri10ge_rx_done(ss, &ss->rx_big,
1195                                                  mgp->big_bytes,
1196                                                  length, checksum);
1197                 rx_packets += rx_ok;
1198                 rx_bytes += rx_ok * (unsigned long)length;
1199                 cnt++;
1200                 idx = cnt & (myri10ge_max_intr_slots - 1);
1201                 work_done++;
1202         }
1203         rx_done->idx = idx;
1204         rx_done->cnt = cnt;
1205         ss->stats.rx_packets += rx_packets;
1206         ss->stats.rx_bytes += rx_bytes;
1207
1208         if (myri10ge_lro)
1209                 lro_flush_all(&rx_done->lro_mgr);
1210
1211         /* restock receive rings if needed */
1212         if (ss->rx_small.fill_cnt - ss->rx_small.cnt < myri10ge_fill_thresh)
1213                 myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1214                                         mgp->small_bytes + MXGEFW_PAD, 0);
1215         if (ss->rx_big.fill_cnt - ss->rx_big.cnt < myri10ge_fill_thresh)
1216                 myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1217
1218         return work_done;
1219 }
1220
1221 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1222 {
1223         struct mcp_irq_data *stats = mgp->ss.fw_stats;
1224
1225         if (unlikely(stats->stats_updated)) {
1226                 unsigned link_up = ntohl(stats->link_up);
1227                 if (mgp->link_state != link_up) {
1228                         mgp->link_state = link_up;
1229
1230                         if (mgp->link_state == MXGEFW_LINK_UP) {
1231                                 if (netif_msg_link(mgp))
1232                                         printk(KERN_INFO
1233                                                "myri10ge: %s: link up\n",
1234                                                mgp->dev->name);
1235                                 netif_carrier_on(mgp->dev);
1236                                 mgp->link_changes++;
1237                         } else {
1238                                 if (netif_msg_link(mgp))
1239                                         printk(KERN_INFO
1240                                                "myri10ge: %s: link %s\n",
1241                                                mgp->dev->name,
1242                                                (link_up == MXGEFW_LINK_MYRINET ?
1243                                                 "mismatch (Myrinet detected)" :
1244                                                 "down"));
1245                                 netif_carrier_off(mgp->dev);
1246                                 mgp->link_changes++;
1247                         }
1248                 }
1249                 if (mgp->rdma_tags_available !=
1250                     ntohl(stats->rdma_tags_available)) {
1251                         mgp->rdma_tags_available =
1252                             ntohl(stats->rdma_tags_available);
1253                         printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1254                                "%d tags left\n", mgp->dev->name,
1255                                mgp->rdma_tags_available);
1256                 }
1257                 mgp->down_cnt += stats->link_down;
1258                 if (stats->link_down)
1259                         wake_up(&mgp->down_wq);
1260         }
1261 }
1262
1263 static int myri10ge_poll(struct napi_struct *napi, int budget)
1264 {
1265         struct myri10ge_slice_state *ss =
1266             container_of(napi, struct myri10ge_slice_state, napi);
1267         struct net_device *netdev = ss->mgp->dev;
1268         int work_done;
1269
1270         /* process as many rx events as NAPI will allow */
1271         work_done = myri10ge_clean_rx_done(ss, budget);
1272
1273         if (work_done < budget) {
1274                 netif_rx_complete(netdev, napi);
1275                 put_be32(htonl(3), ss->irq_claim);
1276         }
1277         return work_done;
1278 }
1279
1280 static irqreturn_t myri10ge_intr(int irq, void *arg)
1281 {
1282         struct myri10ge_slice_state *ss = arg;
1283         struct myri10ge_priv *mgp = ss->mgp;
1284         struct mcp_irq_data *stats = ss->fw_stats;
1285         struct myri10ge_tx_buf *tx = &ss->tx;
1286         u32 send_done_count;
1287         int i;
1288
1289         /* make sure it is our IRQ, and that the DMA has finished */
1290         if (unlikely(!stats->valid))
1291                 return (IRQ_NONE);
1292
1293         /* low bit indicates receives are present, so schedule
1294          * napi poll handler */
1295         if (stats->valid & 1)
1296                 netif_rx_schedule(ss->dev, &ss->napi);
1297
1298         if (!mgp->msi_enabled) {
1299                 put_be32(0, mgp->irq_deassert);
1300                 if (!myri10ge_deassert_wait)
1301                         stats->valid = 0;
1302                 mb();
1303         } else
1304                 stats->valid = 0;
1305
1306         /* Wait for IRQ line to go low, if using INTx */
1307         i = 0;
1308         while (1) {
1309                 i++;
1310                 /* check for transmit completes and receives */
1311                 send_done_count = ntohl(stats->send_done_count);
1312                 if (send_done_count != tx->pkt_done)
1313                         myri10ge_tx_done(ss, (int)send_done_count);
1314                 if (unlikely(i > myri10ge_max_irq_loops)) {
1315                         printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1316                                mgp->dev->name);
1317                         stats->valid = 0;
1318                         schedule_work(&mgp->watchdog_work);
1319                 }
1320                 if (likely(stats->valid == 0))
1321                         break;
1322                 cpu_relax();
1323                 barrier();
1324         }
1325
1326         myri10ge_check_statblock(mgp);
1327
1328         put_be32(htonl(3), ss->irq_claim + 1);
1329         return (IRQ_HANDLED);
1330 }
1331
1332 static int
1333 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1334 {
1335         struct myri10ge_priv *mgp = netdev_priv(netdev);
1336         char *ptr;
1337         int i;
1338
1339         cmd->autoneg = AUTONEG_DISABLE;
1340         cmd->speed = SPEED_10000;
1341         cmd->duplex = DUPLEX_FULL;
1342
1343         /*
1344          * parse the product code to deterimine the interface type
1345          * (CX4, XFP, Quad Ribbon Fiber) by looking at the character
1346          * after the 3rd dash in the driver's cached copy of the
1347          * EEPROM's product code string.
1348          */
1349         ptr = mgp->product_code_string;
1350         if (ptr == NULL) {
1351                 printk(KERN_ERR "myri10ge: %s: Missing product code\n",
1352                        netdev->name);
1353                 return 0;
1354         }
1355         for (i = 0; i < 3; i++, ptr++) {
1356                 ptr = strchr(ptr, '-');
1357                 if (ptr == NULL) {
1358                         printk(KERN_ERR "myri10ge: %s: Invalid product "
1359                                "code %s\n", netdev->name,
1360                                mgp->product_code_string);
1361                         return 0;
1362                 }
1363         }
1364         if (*ptr == 'R' || *ptr == 'Q') {
1365                 /* We've found either an XFP or quad ribbon fiber */
1366                 cmd->port = PORT_FIBRE;
1367         }
1368         return 0;
1369 }
1370
1371 static void
1372 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1373 {
1374         struct myri10ge_priv *mgp = netdev_priv(netdev);
1375
1376         strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1377         strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1378         strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1379         strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1380 }
1381
1382 static int
1383 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1384 {
1385         struct myri10ge_priv *mgp = netdev_priv(netdev);
1386
1387         coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1388         return 0;
1389 }
1390
1391 static int
1392 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1393 {
1394         struct myri10ge_priv *mgp = netdev_priv(netdev);
1395
1396         mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1397         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1398         return 0;
1399 }
1400
1401 static void
1402 myri10ge_get_pauseparam(struct net_device *netdev,
1403                         struct ethtool_pauseparam *pause)
1404 {
1405         struct myri10ge_priv *mgp = netdev_priv(netdev);
1406
1407         pause->autoneg = 0;
1408         pause->rx_pause = mgp->pause;
1409         pause->tx_pause = mgp->pause;
1410 }
1411
1412 static int
1413 myri10ge_set_pauseparam(struct net_device *netdev,
1414                         struct ethtool_pauseparam *pause)
1415 {
1416         struct myri10ge_priv *mgp = netdev_priv(netdev);
1417
1418         if (pause->tx_pause != mgp->pause)
1419                 return myri10ge_change_pause(mgp, pause->tx_pause);
1420         if (pause->rx_pause != mgp->pause)
1421                 return myri10ge_change_pause(mgp, pause->tx_pause);
1422         if (pause->autoneg != 0)
1423                 return -EINVAL;
1424         return 0;
1425 }
1426
1427 static void
1428 myri10ge_get_ringparam(struct net_device *netdev,
1429                        struct ethtool_ringparam *ring)
1430 {
1431         struct myri10ge_priv *mgp = netdev_priv(netdev);
1432
1433         ring->rx_mini_max_pending = mgp->ss.rx_small.mask + 1;
1434         ring->rx_max_pending = mgp->ss.rx_big.mask + 1;
1435         ring->rx_jumbo_max_pending = 0;
1436         ring->tx_max_pending = mgp->ss.rx_small.mask + 1;
1437         ring->rx_mini_pending = ring->rx_mini_max_pending;
1438         ring->rx_pending = ring->rx_max_pending;
1439         ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1440         ring->tx_pending = ring->tx_max_pending;
1441 }
1442
1443 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1444 {
1445         struct myri10ge_priv *mgp = netdev_priv(netdev);
1446
1447         if (mgp->csum_flag)
1448                 return 1;
1449         else
1450                 return 0;
1451 }
1452
1453 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1454 {
1455         struct myri10ge_priv *mgp = netdev_priv(netdev);
1456
1457         if (csum_enabled)
1458                 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1459         else
1460                 mgp->csum_flag = 0;
1461         return 0;
1462 }
1463
1464 static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1465 {
1466         struct myri10ge_priv *mgp = netdev_priv(netdev);
1467         unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1468
1469         if (tso_enabled)
1470                 netdev->features |= flags;
1471         else
1472                 netdev->features &= ~flags;
1473         return 0;
1474 }
1475
1476 static const char myri10ge_gstrings_main_stats[][ETH_GSTRING_LEN] = {
1477         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1478         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1479         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1480         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1481         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1482         "tx_heartbeat_errors", "tx_window_errors",
1483         /* device-specific stats */
1484         "tx_boundary", "WC", "irq", "MSI",
1485         "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1486         "serial_number", "watchdog_resets",
1487         "link_changes", "link_up", "dropped_link_overflow",
1488         "dropped_link_error_or_filtered",
1489         "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1490         "dropped_unicast_filtered", "dropped_multicast_filtered",
1491         "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1492         "dropped_no_big_buffer"
1493 };
1494
1495 static const char myri10ge_gstrings_slice_stats[][ETH_GSTRING_LEN] = {
1496         "----------- slice ---------",
1497         "tx_pkt_start", "tx_pkt_done", "tx_req", "tx_done",
1498         "rx_small_cnt", "rx_big_cnt",
1499         "wake_queue", "stop_queue", "tx_linearized", "LRO aggregated",
1500             "LRO flushed",
1501         "LRO avg aggr", "LRO no_desc"
1502 };
1503
1504 #define MYRI10GE_NET_STATS_LEN      21
1505 #define MYRI10GE_MAIN_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_main_stats)
1506 #define MYRI10GE_SLICE_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_slice_stats)
1507
1508 static void
1509 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1510 {
1511         switch (stringset) {
1512         case ETH_SS_STATS:
1513                 memcpy(data, *myri10ge_gstrings_main_stats,
1514                        sizeof(myri10ge_gstrings_main_stats));
1515                 data += sizeof(myri10ge_gstrings_main_stats);
1516                 memcpy(data, *myri10ge_gstrings_slice_stats,
1517                        sizeof(myri10ge_gstrings_slice_stats));
1518                 data += sizeof(myri10ge_gstrings_slice_stats);
1519                 break;
1520         }
1521 }
1522
1523 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1524 {
1525         switch (sset) {
1526         case ETH_SS_STATS:
1527                 return MYRI10GE_MAIN_STATS_LEN + MYRI10GE_SLICE_STATS_LEN;
1528         default:
1529                 return -EOPNOTSUPP;
1530         }
1531 }
1532
1533 static void
1534 myri10ge_get_ethtool_stats(struct net_device *netdev,
1535                            struct ethtool_stats *stats, u64 * data)
1536 {
1537         struct myri10ge_priv *mgp = netdev_priv(netdev);
1538         struct myri10ge_slice_state *ss;
1539         int i;
1540
1541         for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1542                 data[i] = ((unsigned long *)&mgp->stats)[i];
1543
1544         data[i++] = (unsigned int)mgp->tx_boundary;
1545         data[i++] = (unsigned int)mgp->wc_enabled;
1546         data[i++] = (unsigned int)mgp->pdev->irq;
1547         data[i++] = (unsigned int)mgp->msi_enabled;
1548         data[i++] = (unsigned int)mgp->read_dma;
1549         data[i++] = (unsigned int)mgp->write_dma;
1550         data[i++] = (unsigned int)mgp->read_write_dma;
1551         data[i++] = (unsigned int)mgp->serial_number;
1552         data[i++] = (unsigned int)mgp->watchdog_resets;
1553         data[i++] = (unsigned int)mgp->link_changes;
1554
1555         /* firmware stats are useful only in the first slice */
1556         ss = &mgp->ss;
1557         data[i++] = (unsigned int)ntohl(ss->fw_stats->link_up);
1558         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_link_overflow);
1559         data[i++] =
1560             (unsigned int)ntohl(ss->fw_stats->dropped_link_error_or_filtered);
1561         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_pause);
1562         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_phy);
1563         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_crc32);
1564         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_unicast_filtered);
1565         data[i++] =
1566             (unsigned int)ntohl(ss->fw_stats->dropped_multicast_filtered);
1567         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_runt);
1568         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_overrun);
1569         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_small_buffer);
1570         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_big_buffer);
1571
1572         data[i++] = 0;
1573         data[i++] = (unsigned int)ss->tx.pkt_start;
1574         data[i++] = (unsigned int)ss->tx.pkt_done;
1575         data[i++] = (unsigned int)ss->tx.req;
1576         data[i++] = (unsigned int)ss->tx.done;
1577         data[i++] = (unsigned int)ss->rx_small.cnt;
1578         data[i++] = (unsigned int)ss->rx_big.cnt;
1579         data[i++] = (unsigned int)ss->tx.wake_queue;
1580         data[i++] = (unsigned int)ss->tx.stop_queue;
1581         data[i++] = (unsigned int)ss->tx.linearized;
1582         data[i++] = ss->rx_done.lro_mgr.stats.aggregated;
1583         data[i++] = ss->rx_done.lro_mgr.stats.flushed;
1584         if (ss->rx_done.lro_mgr.stats.flushed)
1585                 data[i++] = ss->rx_done.lro_mgr.stats.aggregated /
1586                     ss->rx_done.lro_mgr.stats.flushed;
1587         else
1588                 data[i++] = 0;
1589         data[i++] = ss->rx_done.lro_mgr.stats.no_desc;
1590 }
1591
1592 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1593 {
1594         struct myri10ge_priv *mgp = netdev_priv(netdev);
1595         mgp->msg_enable = value;
1596 }
1597
1598 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1599 {
1600         struct myri10ge_priv *mgp = netdev_priv(netdev);
1601         return mgp->msg_enable;
1602 }
1603
1604 static const struct ethtool_ops myri10ge_ethtool_ops = {
1605         .get_settings = myri10ge_get_settings,
1606         .get_drvinfo = myri10ge_get_drvinfo,
1607         .get_coalesce = myri10ge_get_coalesce,
1608         .set_coalesce = myri10ge_set_coalesce,
1609         .get_pauseparam = myri10ge_get_pauseparam,
1610         .set_pauseparam = myri10ge_set_pauseparam,
1611         .get_ringparam = myri10ge_get_ringparam,
1612         .get_rx_csum = myri10ge_get_rx_csum,
1613         .set_rx_csum = myri10ge_set_rx_csum,
1614         .set_tx_csum = ethtool_op_set_tx_hw_csum,
1615         .set_sg = ethtool_op_set_sg,
1616         .set_tso = myri10ge_set_tso,
1617         .get_link = ethtool_op_get_link,
1618         .get_strings = myri10ge_get_strings,
1619         .get_sset_count = myri10ge_get_sset_count,
1620         .get_ethtool_stats = myri10ge_get_ethtool_stats,
1621         .set_msglevel = myri10ge_set_msglevel,
1622         .get_msglevel = myri10ge_get_msglevel
1623 };
1624
1625 static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss)
1626 {
1627         struct myri10ge_priv *mgp = ss->mgp;
1628         struct myri10ge_cmd cmd;
1629         struct net_device *dev = mgp->dev;
1630         int tx_ring_size, rx_ring_size;
1631         int tx_ring_entries, rx_ring_entries;
1632         int i, status;
1633         size_t bytes;
1634
1635         /* get ring sizes */
1636         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1637         tx_ring_size = cmd.data0;
1638         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1639         if (status != 0)
1640                 return status;
1641         rx_ring_size = cmd.data0;
1642
1643         tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1644         rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1645         ss->tx.mask = tx_ring_entries - 1;
1646         ss->rx_small.mask = ss->rx_big.mask = rx_ring_entries - 1;
1647
1648         status = -ENOMEM;
1649
1650         /* allocate the host shadow rings */
1651
1652         bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1653             * sizeof(*ss->tx.req_list);
1654         ss->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1655         if (ss->tx.req_bytes == NULL)
1656                 goto abort_with_nothing;
1657
1658         /* ensure req_list entries are aligned to 8 bytes */
1659         ss->tx.req_list = (struct mcp_kreq_ether_send *)
1660             ALIGN((unsigned long)ss->tx.req_bytes, 8);
1661
1662         bytes = rx_ring_entries * sizeof(*ss->rx_small.shadow);
1663         ss->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1664         if (ss->rx_small.shadow == NULL)
1665                 goto abort_with_tx_req_bytes;
1666
1667         bytes = rx_ring_entries * sizeof(*ss->rx_big.shadow);
1668         ss->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1669         if (ss->rx_big.shadow == NULL)
1670                 goto abort_with_rx_small_shadow;
1671
1672         /* allocate the host info rings */
1673
1674         bytes = tx_ring_entries * sizeof(*ss->tx.info);
1675         ss->tx.info = kzalloc(bytes, GFP_KERNEL);
1676         if (ss->tx.info == NULL)
1677                 goto abort_with_rx_big_shadow;
1678
1679         bytes = rx_ring_entries * sizeof(*ss->rx_small.info);
1680         ss->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1681         if (ss->rx_small.info == NULL)
1682                 goto abort_with_tx_info;
1683
1684         bytes = rx_ring_entries * sizeof(*ss->rx_big.info);
1685         ss->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1686         if (ss->rx_big.info == NULL)
1687                 goto abort_with_rx_small_info;
1688
1689         /* Fill the receive rings */
1690         ss->rx_big.cnt = 0;
1691         ss->rx_small.cnt = 0;
1692         ss->rx_big.fill_cnt = 0;
1693         ss->rx_small.fill_cnt = 0;
1694         ss->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1695         ss->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1696         ss->rx_small.watchdog_needed = 0;
1697         ss->rx_big.watchdog_needed = 0;
1698         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1699                                 mgp->small_bytes + MXGEFW_PAD, 0);
1700
1701         if (ss->rx_small.fill_cnt < ss->rx_small.mask + 1) {
1702                 printk(KERN_ERR "myri10ge: %s: alloced only %d small bufs\n",
1703                        dev->name, ss->rx_small.fill_cnt);
1704                 goto abort_with_rx_small_ring;
1705         }
1706
1707         myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1708         if (ss->rx_big.fill_cnt < ss->rx_big.mask + 1) {
1709                 printk(KERN_ERR "myri10ge: %s: alloced only %d big bufs\n",
1710                        dev->name, ss->rx_big.fill_cnt);
1711                 goto abort_with_rx_big_ring;
1712         }
1713
1714         return 0;
1715
1716 abort_with_rx_big_ring:
1717         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
1718                 int idx = i & ss->rx_big.mask;
1719                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
1720                                        mgp->big_bytes);
1721                 put_page(ss->rx_big.info[idx].page);
1722         }
1723
1724 abort_with_rx_small_ring:
1725         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
1726                 int idx = i & ss->rx_small.mask;
1727                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
1728                                        mgp->small_bytes + MXGEFW_PAD);
1729                 put_page(ss->rx_small.info[idx].page);
1730         }
1731
1732         kfree(ss->rx_big.info);
1733
1734 abort_with_rx_small_info:
1735         kfree(ss->rx_small.info);
1736
1737 abort_with_tx_info:
1738         kfree(ss->tx.info);
1739
1740 abort_with_rx_big_shadow:
1741         kfree(ss->rx_big.shadow);
1742
1743 abort_with_rx_small_shadow:
1744         kfree(ss->rx_small.shadow);
1745
1746 abort_with_tx_req_bytes:
1747         kfree(ss->tx.req_bytes);
1748         ss->tx.req_bytes = NULL;
1749         ss->tx.req_list = NULL;
1750
1751 abort_with_nothing:
1752         return status;
1753 }
1754
1755 static void myri10ge_free_rings(struct myri10ge_slice_state *ss)
1756 {
1757         struct myri10ge_priv *mgp = ss->mgp;
1758         struct sk_buff *skb;
1759         struct myri10ge_tx_buf *tx;
1760         int i, len, idx;
1761
1762         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
1763                 idx = i & ss->rx_big.mask;
1764                 if (i == ss->rx_big.fill_cnt - 1)
1765                         ss->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1766                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
1767                                        mgp->big_bytes);
1768                 put_page(ss->rx_big.info[idx].page);
1769         }
1770
1771         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
1772                 idx = i & ss->rx_small.mask;
1773                 if (i == ss->rx_small.fill_cnt - 1)
1774                         ss->rx_small.info[idx].page_offset =
1775                             MYRI10GE_ALLOC_SIZE;
1776                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
1777                                        mgp->small_bytes + MXGEFW_PAD);
1778                 put_page(ss->rx_small.info[idx].page);
1779         }
1780         tx = &ss->tx;
1781         while (tx->done != tx->req) {
1782                 idx = tx->done & tx->mask;
1783                 skb = tx->info[idx].skb;
1784
1785                 /* Mark as free */
1786                 tx->info[idx].skb = NULL;
1787                 tx->done++;
1788                 len = pci_unmap_len(&tx->info[idx], len);
1789                 pci_unmap_len_set(&tx->info[idx], len, 0);
1790                 if (skb) {
1791                         ss->stats.tx_dropped++;
1792                         dev_kfree_skb_any(skb);
1793                         if (len)
1794                                 pci_unmap_single(mgp->pdev,
1795                                                  pci_unmap_addr(&tx->info[idx],
1796                                                                 bus), len,
1797                                                  PCI_DMA_TODEVICE);
1798                 } else {
1799                         if (len)
1800                                 pci_unmap_page(mgp->pdev,
1801                                                pci_unmap_addr(&tx->info[idx],
1802                                                               bus), len,
1803                                                PCI_DMA_TODEVICE);
1804                 }
1805         }
1806         kfree(ss->rx_big.info);
1807
1808         kfree(ss->rx_small.info);
1809
1810         kfree(ss->tx.info);
1811
1812         kfree(ss->rx_big.shadow);
1813
1814         kfree(ss->rx_small.shadow);
1815
1816         kfree(ss->tx.req_bytes);
1817         ss->tx.req_bytes = NULL;
1818         ss->tx.req_list = NULL;
1819 }
1820
1821 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
1822 {
1823         struct pci_dev *pdev = mgp->pdev;
1824         int status;
1825
1826         if (myri10ge_msi) {
1827                 status = pci_enable_msi(pdev);
1828                 if (status != 0)
1829                         dev_err(&pdev->dev,
1830                                 "Error %d setting up MSI; falling back to xPIC\n",
1831                                 status);
1832                 else
1833                         mgp->msi_enabled = 1;
1834         } else {
1835                 mgp->msi_enabled = 0;
1836         }
1837         status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
1838                              mgp->dev->name, mgp);
1839         if (status != 0) {
1840                 dev_err(&pdev->dev, "failed to allocate IRQ\n");
1841                 if (mgp->msi_enabled)
1842                         pci_disable_msi(pdev);
1843         }
1844         return status;
1845 }
1846
1847 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
1848 {
1849         struct pci_dev *pdev = mgp->pdev;
1850
1851         free_irq(pdev->irq, mgp);
1852         if (mgp->msi_enabled)
1853                 pci_disable_msi(pdev);
1854 }
1855
1856 static int
1857 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
1858                          void **ip_hdr, void **tcpudp_hdr,
1859                          u64 * hdr_flags, void *priv)
1860 {
1861         struct ethhdr *eh;
1862         struct vlan_ethhdr *veh;
1863         struct iphdr *iph;
1864         u8 *va = page_address(frag->page) + frag->page_offset;
1865         unsigned long ll_hlen;
1866         /* passed opaque through lro_receive_frags() */
1867         __wsum csum = (__force __wsum) (unsigned long)priv;
1868
1869         /* find the mac header, aborting if not IPv4 */
1870
1871         eh = (struct ethhdr *)va;
1872         *mac_hdr = eh;
1873         ll_hlen = ETH_HLEN;
1874         if (eh->h_proto != htons(ETH_P_IP)) {
1875                 if (eh->h_proto == htons(ETH_P_8021Q)) {
1876                         veh = (struct vlan_ethhdr *)va;
1877                         if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
1878                                 return -1;
1879
1880                         ll_hlen += VLAN_HLEN;
1881
1882                         /*
1883                          *  HW checksum starts ETH_HLEN bytes into
1884                          *  frame, so we must subtract off the VLAN
1885                          *  header's checksum before csum can be used
1886                          */
1887                         csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
1888                                                            VLAN_HLEN, 0));
1889                 } else {
1890                         return -1;
1891                 }
1892         }
1893         *hdr_flags = LRO_IPV4;
1894
1895         iph = (struct iphdr *)(va + ll_hlen);
1896         *ip_hdr = iph;
1897         if (iph->protocol != IPPROTO_TCP)
1898                 return -1;
1899         *hdr_flags |= LRO_TCP;
1900         *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
1901
1902         /* verify the IP checksum */
1903         if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
1904                 return -1;
1905
1906         /* verify the  checksum */
1907         if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
1908                                        ntohs(iph->tot_len) - (iph->ihl << 2),
1909                                        IPPROTO_TCP, csum)))
1910                 return -1;
1911
1912         return 0;
1913 }
1914
1915 static int myri10ge_open(struct net_device *dev)
1916 {
1917         struct myri10ge_priv *mgp = netdev_priv(dev);
1918         struct myri10ge_cmd cmd;
1919         struct net_lro_mgr *lro_mgr;
1920         int status, big_pow2;
1921
1922         if (mgp->running != MYRI10GE_ETH_STOPPED)
1923                 return -EBUSY;
1924
1925         mgp->running = MYRI10GE_ETH_STARTING;
1926         status = myri10ge_reset(mgp);
1927         if (status != 0) {
1928                 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
1929                 goto abort_with_nothing;
1930         }
1931
1932         status = myri10ge_request_irq(mgp);
1933         if (status != 0)
1934                 goto abort_with_nothing;
1935
1936         /* decide what small buffer size to use.  For good TCP rx
1937          * performance, it is important to not receive 1514 byte
1938          * frames into jumbo buffers, as it confuses the socket buffer
1939          * accounting code, leading to drops and erratic performance.
1940          */
1941
1942         if (dev->mtu <= ETH_DATA_LEN)
1943                 /* enough for a TCP header */
1944                 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
1945                     ? (128 - MXGEFW_PAD)
1946                     : (SMP_CACHE_BYTES - MXGEFW_PAD);
1947         else
1948                 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1949                 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
1950
1951         /* Override the small buffer size? */
1952         if (myri10ge_small_bytes > 0)
1953                 mgp->small_bytes = myri10ge_small_bytes;
1954
1955         /* get the lanai pointers to the send and receive rings */
1956
1957         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
1958         mgp->ss.tx.lanai =
1959             (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0);
1960
1961         status |=
1962             myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0);
1963         mgp->ss.rx_small.lanai =
1964             (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1965
1966         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
1967         mgp->ss.rx_big.lanai =
1968             (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1969
1970         if (status != 0) {
1971                 printk(KERN_ERR
1972                        "myri10ge: %s: failed to get ring sizes or locations\n",
1973                        dev->name);
1974                 mgp->running = MYRI10GE_ETH_STOPPED;
1975                 goto abort_with_irq;
1976         }
1977
1978         if (myri10ge_wcfifo && mgp->wc_enabled) {
1979                 mgp->ss.tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1980                 mgp->ss.rx_small.wc_fifo =
1981                     (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
1982                 mgp->ss.rx_big.wc_fifo =
1983                     (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_BIG;
1984         } else {
1985                 mgp->ss.tx.wc_fifo = NULL;
1986                 mgp->ss.rx_small.wc_fifo = NULL;
1987                 mgp->ss.rx_big.wc_fifo = NULL;
1988         }
1989
1990         /* Firmware needs the big buff size as a power of 2.  Lie and
1991          * tell him the buffer is larger, because we only use 1
1992          * buffer/pkt, and the mtu will prevent overruns.
1993          */
1994         big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1995         if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
1996                 while (!is_power_of_2(big_pow2))
1997                         big_pow2++;
1998                 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1999         } else {
2000                 big_pow2 = MYRI10GE_ALLOC_SIZE;
2001                 mgp->big_bytes = big_pow2;
2002         }
2003
2004         status = myri10ge_allocate_rings(&mgp->ss);
2005         if (status != 0)
2006                 goto abort_with_irq;
2007
2008         /* now give firmware buffers sizes, and MTU */
2009         cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
2010         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
2011         cmd.data0 = mgp->small_bytes;
2012         status |=
2013             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
2014         cmd.data0 = big_pow2;
2015         status |=
2016             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
2017         if (status) {
2018                 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
2019                        dev->name);
2020                 goto abort_with_rings;
2021         }
2022
2023         cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->ss.fw_stats_bus);
2024         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->ss.fw_stats_bus);
2025         cmd.data2 = sizeof(struct mcp_irq_data);
2026         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
2027         if (status == -ENOSYS) {
2028                 dma_addr_t bus = mgp->ss.fw_stats_bus;
2029                 bus += offsetof(struct mcp_irq_data, send_done_count);
2030                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
2031                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
2032                 status = myri10ge_send_cmd(mgp,
2033                                            MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
2034                                            &cmd, 0);
2035                 /* Firmware cannot support multicast without STATS_DMA_V2 */
2036                 mgp->fw_multicast_support = 0;
2037         } else {
2038                 mgp->fw_multicast_support = 1;
2039         }
2040         if (status) {
2041                 printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n",
2042                        dev->name);
2043                 goto abort_with_rings;
2044         }
2045
2046         mgp->link_state = ~0U;
2047         mgp->rdma_tags_available = 15;
2048
2049         lro_mgr = &mgp->ss.rx_done.lro_mgr;
2050         lro_mgr->dev = dev;
2051         lro_mgr->features = LRO_F_NAPI;
2052         lro_mgr->ip_summed = CHECKSUM_COMPLETE;
2053         lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
2054         lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
2055         lro_mgr->lro_arr = mgp->ss.rx_done.lro_desc;
2056         lro_mgr->get_frag_header = myri10ge_get_frag_header;
2057         lro_mgr->max_aggr = myri10ge_lro_max_pkts;
2058         lro_mgr->frag_align_pad = 2;
2059         if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
2060                 lro_mgr->max_aggr = MAX_SKB_FRAGS;
2061
2062         napi_enable(&mgp->ss.napi);     /* must happen prior to any irq */
2063
2064         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
2065         if (status) {
2066                 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
2067                        dev->name);
2068                 goto abort_with_rings;
2069         }
2070
2071         mgp->ss.tx.wake_queue = 0;
2072         mgp->ss.tx.stop_queue = 0;
2073         mgp->running = MYRI10GE_ETH_RUNNING;
2074         mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
2075         add_timer(&mgp->watchdog_timer);
2076         netif_wake_queue(dev);
2077         return 0;
2078
2079 abort_with_rings:
2080         myri10ge_free_rings(&mgp->ss);
2081
2082 abort_with_irq:
2083         myri10ge_free_irq(mgp);
2084
2085 abort_with_nothing:
2086         mgp->running = MYRI10GE_ETH_STOPPED;
2087         return -ENOMEM;
2088 }
2089
2090 static int myri10ge_close(struct net_device *dev)
2091 {
2092         struct myri10ge_priv *mgp = netdev_priv(dev);
2093         struct myri10ge_cmd cmd;
2094         int status, old_down_cnt;
2095
2096         if (mgp->running != MYRI10GE_ETH_RUNNING)
2097                 return 0;
2098
2099         if (mgp->ss.tx.req_bytes == NULL)
2100                 return 0;
2101
2102         del_timer_sync(&mgp->watchdog_timer);
2103         mgp->running = MYRI10GE_ETH_STOPPING;
2104         napi_disable(&mgp->ss.napi);
2105         netif_carrier_off(dev);
2106         netif_stop_queue(dev);
2107         old_down_cnt = mgp->down_cnt;
2108         mb();
2109         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2110         if (status)
2111                 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
2112                        dev->name);
2113
2114         wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
2115         if (old_down_cnt == mgp->down_cnt)
2116                 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
2117
2118         netif_tx_disable(dev);
2119         myri10ge_free_irq(mgp);
2120         myri10ge_free_rings(&mgp->ss);
2121
2122         mgp->running = MYRI10GE_ETH_STOPPED;
2123         return 0;
2124 }
2125
2126 /* copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2127  * backwards one at a time and handle ring wraps */
2128
2129 static inline void
2130 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2131                               struct mcp_kreq_ether_send *src, int cnt)
2132 {
2133         int idx, starting_slot;
2134         starting_slot = tx->req;
2135         while (cnt > 1) {
2136                 cnt--;
2137                 idx = (starting_slot + cnt) & tx->mask;
2138                 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2139                 mb();
2140         }
2141 }
2142
2143 /*
2144  * copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2145  * at most 32 bytes at a time, so as to avoid involving the software
2146  * pio handler in the nic.   We re-write the first segment's flags
2147  * to mark them valid only after writing the entire chain.
2148  */
2149
2150 static inline void
2151 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2152                     int cnt)
2153 {
2154         int idx, i;
2155         struct mcp_kreq_ether_send __iomem *dstp, *dst;
2156         struct mcp_kreq_ether_send *srcp;
2157         u8 last_flags;
2158
2159         idx = tx->req & tx->mask;
2160
2161         last_flags = src->flags;
2162         src->flags = 0;
2163         mb();
2164         dst = dstp = &tx->lanai[idx];
2165         srcp = src;
2166
2167         if ((idx + cnt) < tx->mask) {
2168                 for (i = 0; i < (cnt - 1); i += 2) {
2169                         myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2170                         mb();   /* force write every 32 bytes */
2171                         srcp += 2;
2172                         dstp += 2;
2173                 }
2174         } else {
2175                 /* submit all but the first request, and ensure
2176                  * that it is submitted below */
2177                 myri10ge_submit_req_backwards(tx, src, cnt);
2178                 i = 0;
2179         }
2180         if (i < cnt) {
2181                 /* submit the first request */
2182                 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2183                 mb();           /* barrier before setting valid flag */
2184         }
2185
2186         /* re-write the last 32-bits with the valid flags */
2187         src->flags = last_flags;
2188         put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2189         tx->req += cnt;
2190         mb();
2191 }
2192
2193 static inline void
2194 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
2195                        struct mcp_kreq_ether_send *src, int cnt)
2196 {
2197         tx->req += cnt;
2198         mb();
2199         while (cnt >= 4) {
2200                 myri10ge_pio_copy(tx->wc_fifo, src, 64);
2201                 mb();
2202                 src += 4;
2203                 cnt -= 4;
2204         }
2205         if (cnt > 0) {
2206                 /* pad it to 64 bytes.  The src is 64 bytes bigger than it
2207                  * needs to be so that we don't overrun it */
2208                 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
2209                                   src, 64);
2210                 mb();
2211         }
2212 }
2213
2214 /*
2215  * Transmit a packet.  We need to split the packet so that a single
2216  * segment does not cross myri10ge->tx_boundary, so this makes segment
2217  * counting tricky.  So rather than try to count segments up front, we
2218  * just give up if there are too few segments to hold a reasonably
2219  * fragmented packet currently available.  If we run
2220  * out of segments while preparing a packet for DMA, we just linearize
2221  * it and try again.
2222  */
2223
2224 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
2225 {
2226         struct myri10ge_priv *mgp = netdev_priv(dev);
2227         struct myri10ge_slice_state *ss;
2228         struct mcp_kreq_ether_send *req;
2229         struct myri10ge_tx_buf *tx;
2230         struct skb_frag_struct *frag;
2231         dma_addr_t bus;
2232         u32 low;
2233         __be32 high_swapped;
2234         unsigned int len;
2235         int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2236         u16 pseudo_hdr_offset, cksum_offset;
2237         int cum_len, seglen, boundary, rdma_count;
2238         u8 flags, odd_flag;
2239
2240         /* always transmit through slot 0 */
2241         ss = &mgp->ss;
2242         tx = &ss->tx;
2243 again:
2244         req = tx->req_list;
2245         avail = tx->mask - 1 - (tx->req - tx->done);
2246
2247         mss = 0;
2248         max_segments = MXGEFW_MAX_SEND_DESC;
2249
2250         if (skb_is_gso(skb)) {
2251                 mss = skb_shinfo(skb)->gso_size;
2252                 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2253         }
2254
2255         if ((unlikely(avail < max_segments))) {
2256                 /* we are out of transmit resources */
2257                 tx->stop_queue++;
2258                 netif_stop_queue(dev);
2259                 return 1;
2260         }
2261
2262         /* Setup checksum offloading, if needed */
2263         cksum_offset = 0;
2264         pseudo_hdr_offset = 0;
2265         odd_flag = 0;
2266         flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2267         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2268                 cksum_offset = skb_transport_offset(skb);
2269                 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2270                 /* If the headers are excessively large, then we must
2271                  * fall back to a software checksum */
2272                 if (unlikely(!mss && (cksum_offset > 255 ||
2273                                       pseudo_hdr_offset > 127))) {
2274                         if (skb_checksum_help(skb))
2275                                 goto drop;
2276                         cksum_offset = 0;
2277                         pseudo_hdr_offset = 0;
2278                 } else {
2279                         odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2280                         flags |= MXGEFW_FLAGS_CKSUM;
2281                 }
2282         }
2283
2284         cum_len = 0;
2285
2286         if (mss) {              /* TSO */
2287                 /* this removes any CKSUM flag from before */
2288                 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2289
2290                 /* negative cum_len signifies to the
2291                  * send loop that we are still in the
2292                  * header portion of the TSO packet.
2293                  * TSO header can be at most 1KB long */
2294                 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2295
2296                 /* for IPv6 TSO, the checksum offset stores the
2297                  * TCP header length, to save the firmware from
2298                  * the need to parse the headers */
2299                 if (skb_is_gso_v6(skb)) {
2300                         cksum_offset = tcp_hdrlen(skb);
2301                         /* Can only handle headers <= max_tso6 long */
2302                         if (unlikely(-cum_len > mgp->max_tso6))
2303                                 return myri10ge_sw_tso(skb, dev);
2304                 }
2305                 /* for TSO, pseudo_hdr_offset holds mss.
2306                  * The firmware figures out where to put
2307                  * the checksum by parsing the header. */
2308                 pseudo_hdr_offset = mss;
2309         } else
2310                 /* Mark small packets, and pad out tiny packets */
2311         if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2312                 flags |= MXGEFW_FLAGS_SMALL;
2313
2314                 /* pad frames to at least ETH_ZLEN bytes */
2315                 if (unlikely(skb->len < ETH_ZLEN)) {
2316                         if (skb_padto(skb, ETH_ZLEN)) {
2317                                 /* The packet is gone, so we must
2318                                  * return 0 */
2319                                 ss->stats.tx_dropped += 1;
2320                                 return 0;
2321                         }
2322                         /* adjust the len to account for the zero pad
2323                          * so that the nic can know how long it is */
2324                         skb->len = ETH_ZLEN;
2325                 }
2326         }
2327
2328         /* map the skb for DMA */
2329         len = skb->len - skb->data_len;
2330         idx = tx->req & tx->mask;
2331         tx->info[idx].skb = skb;
2332         bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2333         pci_unmap_addr_set(&tx->info[idx], bus, bus);
2334         pci_unmap_len_set(&tx->info[idx], len, len);
2335
2336         frag_cnt = skb_shinfo(skb)->nr_frags;
2337         frag_idx = 0;
2338         count = 0;
2339         rdma_count = 0;
2340
2341         /* "rdma_count" is the number of RDMAs belonging to the
2342          * current packet BEFORE the current send request. For
2343          * non-TSO packets, this is equal to "count".
2344          * For TSO packets, rdma_count needs to be reset
2345          * to 0 after a segment cut.
2346          *
2347          * The rdma_count field of the send request is
2348          * the number of RDMAs of the packet starting at
2349          * that request. For TSO send requests with one ore more cuts
2350          * in the middle, this is the number of RDMAs starting
2351          * after the last cut in the request. All previous
2352          * segments before the last cut implicitly have 1 RDMA.
2353          *
2354          * Since the number of RDMAs is not known beforehand,
2355          * it must be filled-in retroactively - after each
2356          * segmentation cut or at the end of the entire packet.
2357          */
2358
2359         while (1) {
2360                 /* Break the SKB or Fragment up into pieces which
2361                  * do not cross mgp->tx_boundary */
2362                 low = MYRI10GE_LOWPART_TO_U32(bus);
2363                 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2364                 while (len) {
2365                         u8 flags_next;
2366                         int cum_len_next;
2367
2368                         if (unlikely(count == max_segments))
2369                                 goto abort_linearize;
2370
2371                         boundary =
2372                             (low + mgp->tx_boundary) & ~(mgp->tx_boundary - 1);
2373                         seglen = boundary - low;
2374                         if (seglen > len)
2375                                 seglen = len;
2376                         flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2377                         cum_len_next = cum_len + seglen;
2378                         if (mss) {      /* TSO */
2379                                 (req - rdma_count)->rdma_count = rdma_count + 1;
2380
2381                                 if (likely(cum_len >= 0)) {     /* payload */
2382                                         int next_is_first, chop;
2383
2384                                         chop = (cum_len_next > mss);
2385                                         cum_len_next = cum_len_next % mss;
2386                                         next_is_first = (cum_len_next == 0);
2387                                         flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2388                                         flags_next |= next_is_first *
2389                                             MXGEFW_FLAGS_FIRST;
2390                                         rdma_count |= -(chop | next_is_first);
2391                                         rdma_count += chop & !next_is_first;
2392                                 } else if (likely(cum_len_next >= 0)) { /* header ends */
2393                                         int small;
2394
2395                                         rdma_count = -1;
2396                                         cum_len_next = 0;
2397                                         seglen = -cum_len;
2398                                         small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2399                                         flags_next = MXGEFW_FLAGS_TSO_PLD |
2400                                             MXGEFW_FLAGS_FIRST |
2401                                             (small * MXGEFW_FLAGS_SMALL);
2402                                 }
2403                         }
2404                         req->addr_high = high_swapped;
2405                         req->addr_low = htonl(low);
2406                         req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2407                         req->pad = 0;   /* complete solid 16-byte block; does this matter? */
2408                         req->rdma_count = 1;
2409                         req->length = htons(seglen);
2410                         req->cksum_offset = cksum_offset;
2411                         req->flags = flags | ((cum_len & 1) * odd_flag);
2412
2413                         low += seglen;
2414                         len -= seglen;
2415                         cum_len = cum_len_next;
2416                         flags = flags_next;
2417                         req++;
2418                         count++;
2419                         rdma_count++;
2420                         if (cksum_offset != 0 && !(mss && skb_is_gso_v6(skb))) {
2421                                 if (unlikely(cksum_offset > seglen))
2422                                         cksum_offset -= seglen;
2423                                 else
2424                                         cksum_offset = 0;
2425                         }
2426                 }
2427                 if (frag_idx == frag_cnt)
2428                         break;
2429
2430                 /* map next fragment for DMA */
2431                 idx = (count + tx->req) & tx->mask;
2432                 frag = &skb_shinfo(skb)->frags[frag_idx];
2433                 frag_idx++;
2434                 len = frag->size;
2435                 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2436                                    len, PCI_DMA_TODEVICE);
2437                 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2438                 pci_unmap_len_set(&tx->info[idx], len, len);
2439         }
2440
2441         (req - rdma_count)->rdma_count = rdma_count;
2442         if (mss)
2443                 do {
2444                         req--;
2445                         req->flags |= MXGEFW_FLAGS_TSO_LAST;
2446                 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2447                                          MXGEFW_FLAGS_FIRST)));
2448         idx = ((count - 1) + tx->req) & tx->mask;
2449         tx->info[idx].last = 1;
2450         if (tx->wc_fifo == NULL)
2451                 myri10ge_submit_req(tx, tx->req_list, count);
2452         else
2453                 myri10ge_submit_req_wc(tx, tx->req_list, count);
2454         tx->pkt_start++;
2455         if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2456                 tx->stop_queue++;
2457                 netif_stop_queue(dev);
2458         }
2459         dev->trans_start = jiffies;
2460         return 0;
2461
2462 abort_linearize:
2463         /* Free any DMA resources we've alloced and clear out the skb
2464          * slot so as to not trip up assertions, and to avoid a
2465          * double-free if linearizing fails */
2466
2467         last_idx = (idx + 1) & tx->mask;
2468         idx = tx->req & tx->mask;
2469         tx->info[idx].skb = NULL;
2470         do {
2471                 len = pci_unmap_len(&tx->info[idx], len);
2472                 if (len) {
2473                         if (tx->info[idx].skb != NULL)
2474                                 pci_unmap_single(mgp->pdev,
2475                                                  pci_unmap_addr(&tx->info[idx],
2476                                                                 bus), len,
2477                                                  PCI_DMA_TODEVICE);
2478                         else
2479                                 pci_unmap_page(mgp->pdev,
2480                                                pci_unmap_addr(&tx->info[idx],
2481                                                               bus), len,
2482                                                PCI_DMA_TODEVICE);
2483                         pci_unmap_len_set(&tx->info[idx], len, 0);
2484                         tx->info[idx].skb = NULL;
2485                 }
2486                 idx = (idx + 1) & tx->mask;
2487         } while (idx != last_idx);
2488         if (skb_is_gso(skb)) {
2489                 printk(KERN_ERR
2490                        "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2491                        mgp->dev->name);
2492                 goto drop;
2493         }
2494
2495         if (skb_linearize(skb))
2496                 goto drop;
2497
2498         tx->linearized++;
2499         goto again;
2500
2501 drop:
2502         dev_kfree_skb_any(skb);
2503         ss->stats.tx_dropped += 1;
2504         return 0;
2505
2506 }
2507
2508 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev)
2509 {
2510         struct sk_buff *segs, *curr;
2511         struct myri10ge_priv *mgp = netdev_priv(dev);
2512         int status;
2513
2514         segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO6);
2515         if (IS_ERR(segs))
2516                 goto drop;
2517
2518         while (segs) {
2519                 curr = segs;
2520                 segs = segs->next;
2521                 curr->next = NULL;
2522                 status = myri10ge_xmit(curr, dev);
2523                 if (status != 0) {
2524                         dev_kfree_skb_any(curr);
2525                         if (segs != NULL) {
2526                                 curr = segs;
2527                                 segs = segs->next;
2528                                 curr->next = NULL;
2529                                 dev_kfree_skb_any(segs);
2530                         }
2531                         goto drop;
2532                 }
2533         }
2534         dev_kfree_skb_any(skb);
2535         return 0;
2536
2537 drop:
2538         dev_kfree_skb_any(skb);
2539         mgp->stats.tx_dropped += 1;
2540         return 0;
2541 }
2542
2543 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2544 {
2545         struct myri10ge_priv *mgp = netdev_priv(dev);
2546         return &mgp->stats;
2547 }
2548
2549 static void myri10ge_set_multicast_list(struct net_device *dev)
2550 {
2551         struct myri10ge_priv *mgp = netdev_priv(dev);
2552         struct myri10ge_cmd cmd;
2553         struct dev_mc_list *mc_list;
2554         __be32 data[2] = { 0, 0 };
2555         int err;
2556         DECLARE_MAC_BUF(mac);
2557
2558         /* can be called from atomic contexts,
2559          * pass 1 to force atomicity in myri10ge_send_cmd() */
2560         myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2561
2562         /* This firmware is known to not support multicast */
2563         if (!mgp->fw_multicast_support)
2564                 return;
2565
2566         /* Disable multicast filtering */
2567
2568         err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2569         if (err != 0) {
2570                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2571                        " error status: %d\n", dev->name, err);
2572                 goto abort;
2573         }
2574
2575         if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
2576                 /* request to disable multicast filtering, so quit here */
2577                 return;
2578         }
2579
2580         /* Flush the filters */
2581
2582         err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2583                                 &cmd, 1);
2584         if (err != 0) {
2585                 printk(KERN_ERR
2586                        "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2587                        ", error status: %d\n", dev->name, err);
2588                 goto abort;
2589         }
2590
2591         /* Walk the multicast list, and add each address */
2592         for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2593                 memcpy(data, &mc_list->dmi_addr, 6);
2594                 cmd.data0 = ntohl(data[0]);
2595                 cmd.data1 = ntohl(data[1]);
2596                 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2597                                         &cmd, 1);
2598
2599                 if (err != 0) {
2600                         printk(KERN_ERR "myri10ge: %s: Failed "
2601                                "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2602                                "%d\t", dev->name, err);
2603                         printk(KERN_ERR "MAC %s\n",
2604                                print_mac(mac, mc_list->dmi_addr));
2605                         goto abort;
2606                 }
2607         }
2608         /* Enable multicast filtering */
2609         err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2610         if (err != 0) {
2611                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2612                        "error status: %d\n", dev->name, err);
2613                 goto abort;
2614         }
2615
2616         return;
2617
2618 abort:
2619         return;
2620 }
2621
2622 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2623 {
2624         struct sockaddr *sa = addr;
2625         struct myri10ge_priv *mgp = netdev_priv(dev);
2626         int status;
2627
2628         if (!is_valid_ether_addr(sa->sa_data))
2629                 return -EADDRNOTAVAIL;
2630
2631         status = myri10ge_update_mac_address(mgp, sa->sa_data);
2632         if (status != 0) {
2633                 printk(KERN_ERR
2634                        "myri10ge: %s: changing mac address failed with %d\n",
2635                        dev->name, status);
2636                 return status;
2637         }
2638
2639         /* change the dev structure */
2640         memcpy(dev->dev_addr, sa->sa_data, 6);
2641         return 0;
2642 }
2643
2644 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2645 {
2646         struct myri10ge_priv *mgp = netdev_priv(dev);
2647         int error = 0;
2648
2649         if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2650                 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2651                        dev->name, new_mtu);
2652                 return -EINVAL;
2653         }
2654         printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2655                dev->name, dev->mtu, new_mtu);
2656         if (mgp->running) {
2657                 /* if we change the mtu on an active device, we must
2658                  * reset the device so the firmware sees the change */
2659                 myri10ge_close(dev);
2660                 dev->mtu = new_mtu;
2661                 myri10ge_open(dev);
2662         } else
2663                 dev->mtu = new_mtu;
2664
2665         return error;
2666 }
2667
2668 /*
2669  * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2670  * Only do it if the bridge is a root port since we don't want to disturb
2671  * any other device, except if forced with myri10ge_ecrc_enable > 1.
2672  */
2673
2674 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2675 {
2676         struct pci_dev *bridge = mgp->pdev->bus->self;
2677         struct device *dev = &mgp->pdev->dev;
2678         unsigned cap;
2679         unsigned err_cap;
2680         u16 val;
2681         u8 ext_type;
2682         int ret;
2683
2684         if (!myri10ge_ecrc_enable || !bridge)
2685                 return;
2686
2687         /* check that the bridge is a root port */
2688         cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2689         pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2690         ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2691         if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2692                 if (myri10ge_ecrc_enable > 1) {
2693                         struct pci_dev *prev_bridge, *old_bridge = bridge;
2694
2695                         /* Walk the hierarchy up to the root port
2696                          * where ECRC has to be enabled */
2697                         do {
2698                                 prev_bridge = bridge;
2699                                 bridge = bridge->bus->self;
2700                                 if (!bridge || prev_bridge == bridge) {
2701                                         dev_err(dev,
2702                                                 "Failed to find root port"
2703                                                 " to force ECRC\n");
2704                                         return;
2705                                 }
2706                                 cap =
2707                                     pci_find_capability(bridge, PCI_CAP_ID_EXP);
2708                                 pci_read_config_word(bridge,
2709                                                      cap + PCI_CAP_FLAGS, &val);
2710                                 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2711                         } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2712
2713                         dev_info(dev,
2714                                  "Forcing ECRC on non-root port %s"
2715                                  " (enabling on root port %s)\n",
2716                                  pci_name(old_bridge), pci_name(bridge));
2717                 } else {
2718                         dev_err(dev,
2719                                 "Not enabling ECRC on non-root port %s\n",
2720                                 pci_name(bridge));
2721                         return;
2722                 }
2723         }
2724
2725         cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
2726         if (!cap)
2727                 return;
2728
2729         ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
2730         if (ret) {
2731                 dev_err(dev, "failed reading ext-conf-space of %s\n",
2732                         pci_name(bridge));
2733                 dev_err(dev, "\t pci=nommconf in use? "
2734                         "or buggy/incomplete/absent ACPI MCFG attr?\n");
2735                 return;
2736         }
2737         if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
2738                 return;
2739
2740         err_cap |= PCI_ERR_CAP_ECRC_GENE;
2741         pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
2742         dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
2743 }
2744
2745 /*
2746  * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2747  * when the PCI-E Completion packets are aligned on an 8-byte
2748  * boundary.  Some PCI-E chip sets always align Completion packets; on
2749  * the ones that do not, the alignment can be enforced by enabling
2750  * ECRC generation (if supported).
2751  *
2752  * When PCI-E Completion packets are not aligned, it is actually more
2753  * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2754  *
2755  * If the driver can neither enable ECRC nor verify that it has
2756  * already been enabled, then it must use a firmware image which works
2757  * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2758  * should also ensure that it never gives the device a Read-DMA which is
2759  * larger than 2KB by setting the tx_boundary to 2KB.  If ECRC is
2760  * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2761  * firmware image, and set tx_boundary to 4KB.
2762  */
2763
2764 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
2765 {
2766         struct pci_dev *pdev = mgp->pdev;
2767         struct device *dev = &pdev->dev;
2768         int status;
2769
2770         mgp->tx_boundary = 4096;
2771         /*
2772          * Verify the max read request size was set to 4KB
2773          * before trying the test with 4KB.
2774          */
2775         status = pcie_get_readrq(pdev);
2776         if (status < 0) {
2777                 dev_err(dev, "Couldn't read max read req size: %d\n", status);
2778                 goto abort;
2779         }
2780         if (status != 4096) {
2781                 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
2782                 mgp->tx_boundary = 2048;
2783         }
2784         /*
2785          * load the optimized firmware (which assumes aligned PCIe
2786          * completions) in order to see if it works on this host.
2787          */
2788         mgp->fw_name = myri10ge_fw_aligned;
2789         status = myri10ge_load_firmware(mgp);
2790         if (status != 0) {
2791                 goto abort;
2792         }
2793
2794         /*
2795          * Enable ECRC if possible
2796          */
2797         myri10ge_enable_ecrc(mgp);
2798
2799         /*
2800          * Run a DMA test which watches for unaligned completions and
2801          * aborts on the first one seen.
2802          */
2803
2804         status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
2805         if (status == 0)
2806                 return;         /* keep the aligned firmware */
2807
2808         if (status != -E2BIG)
2809                 dev_warn(dev, "DMA test failed: %d\n", status);
2810         if (status == -ENOSYS)
2811                 dev_warn(dev, "Falling back to ethp! "
2812                          "Please install up to date fw\n");
2813 abort:
2814         /* fall back to using the unaligned firmware */
2815         mgp->tx_boundary = 2048;
2816         mgp->fw_name = myri10ge_fw_unaligned;
2817
2818 }
2819
2820 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2821 {
2822         if (myri10ge_force_firmware == 0) {
2823                 int link_width, exp_cap;
2824                 u16 lnk;
2825
2826                 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
2827                 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
2828                 link_width = (lnk >> 4) & 0x3f;
2829
2830                 /* Check to see if Link is less than 8 or if the
2831                  * upstream bridge is known to provide aligned
2832                  * completions */
2833                 if (link_width < 8) {
2834                         dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
2835                                  link_width);
2836                         mgp->tx_boundary = 4096;
2837                         mgp->fw_name = myri10ge_fw_aligned;
2838                 } else {
2839                         myri10ge_firmware_probe(mgp);
2840                 }
2841         } else {
2842                 if (myri10ge_force_firmware == 1) {
2843                         dev_info(&mgp->pdev->dev,
2844                                  "Assuming aligned completions (forced)\n");
2845                         mgp->tx_boundary = 4096;
2846                         mgp->fw_name = myri10ge_fw_aligned;
2847                 } else {
2848                         dev_info(&mgp->pdev->dev,
2849                                  "Assuming unaligned completions (forced)\n");
2850                         mgp->tx_boundary = 2048;
2851                         mgp->fw_name = myri10ge_fw_unaligned;
2852                 }
2853         }
2854         if (myri10ge_fw_name != NULL) {
2855                 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
2856                          myri10ge_fw_name);
2857                 mgp->fw_name = myri10ge_fw_name;
2858         }
2859 }
2860
2861 #ifdef CONFIG_PM
2862 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
2863 {
2864         struct myri10ge_priv *mgp;
2865         struct net_device *netdev;
2866
2867         mgp = pci_get_drvdata(pdev);
2868         if (mgp == NULL)
2869                 return -EINVAL;
2870         netdev = mgp->dev;
2871
2872         netif_device_detach(netdev);
2873         if (netif_running(netdev)) {
2874                 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
2875                 rtnl_lock();
2876                 myri10ge_close(netdev);
2877                 rtnl_unlock();
2878         }
2879         myri10ge_dummy_rdma(mgp, 0);
2880         pci_save_state(pdev);
2881         pci_disable_device(pdev);
2882
2883         return pci_set_power_state(pdev, pci_choose_state(pdev, state));
2884 }
2885
2886 static int myri10ge_resume(struct pci_dev *pdev)
2887 {
2888         struct myri10ge_priv *mgp;
2889         struct net_device *netdev;
2890         int status;
2891         u16 vendor;
2892
2893         mgp = pci_get_drvdata(pdev);
2894         if (mgp == NULL)
2895                 return -EINVAL;
2896         netdev = mgp->dev;
2897         pci_set_power_state(pdev, 0);   /* zeros conf space as a side effect */
2898         msleep(5);              /* give card time to respond */
2899         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2900         if (vendor == 0xffff) {
2901                 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
2902                        mgp->dev->name);
2903                 return -EIO;
2904         }
2905
2906         status = pci_restore_state(pdev);
2907         if (status)
2908                 return status;
2909
2910         status = pci_enable_device(pdev);
2911         if (status) {
2912                 dev_err(&pdev->dev, "failed to enable device\n");
2913                 return status;
2914         }
2915
2916         pci_set_master(pdev);
2917
2918         myri10ge_reset(mgp);
2919         myri10ge_dummy_rdma(mgp, 1);
2920
2921         /* Save configuration space to be restored if the
2922          * nic resets due to a parity error */
2923         pci_save_state(pdev);
2924
2925         if (netif_running(netdev)) {
2926                 rtnl_lock();
2927                 status = myri10ge_open(netdev);
2928                 rtnl_unlock();
2929                 if (status != 0)
2930                         goto abort_with_enabled;
2931
2932         }
2933         netif_device_attach(netdev);
2934
2935         return 0;
2936
2937 abort_with_enabled:
2938         pci_disable_device(pdev);
2939         return -EIO;
2940
2941 }
2942 #endif                          /* CONFIG_PM */
2943
2944 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
2945 {
2946         struct pci_dev *pdev = mgp->pdev;
2947         int vs = mgp->vendor_specific_offset;
2948         u32 reboot;
2949
2950         /*enter read32 mode */
2951         pci_write_config_byte(pdev, vs + 0x10, 0x3);
2952
2953         /*read REBOOT_STATUS (0xfffffff0) */
2954         pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
2955         pci_read_config_dword(pdev, vs + 0x14, &reboot);
2956         return reboot;
2957 }
2958
2959 /*
2960  * This watchdog is used to check whether the board has suffered
2961  * from a parity error and needs to be recovered.
2962  */
2963 static void myri10ge_watchdog(struct work_struct *work)
2964 {
2965         struct myri10ge_priv *mgp =
2966             container_of(work, struct myri10ge_priv, watchdog_work);
2967         struct myri10ge_tx_buf *tx;
2968         u32 reboot;
2969         int status;
2970         u16 cmd, vendor;
2971
2972         mgp->watchdog_resets++;
2973         pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
2974         if ((cmd & PCI_COMMAND_MASTER) == 0) {
2975                 /* Bus master DMA disabled?  Check to see
2976                  * if the card rebooted due to a parity error
2977                  * For now, just report it */
2978                 reboot = myri10ge_read_reboot(mgp);
2979                 printk(KERN_ERR
2980                        "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
2981                        mgp->dev->name, reboot,
2982                        myri10ge_reset_recover ? " " : " not");
2983                 if (myri10ge_reset_recover == 0)
2984                         return;
2985
2986                 myri10ge_reset_recover--;
2987
2988                 /*
2989                  * A rebooted nic will come back with config space as
2990                  * it was after power was applied to PCIe bus.
2991                  * Attempt to restore config space which was saved
2992                  * when the driver was loaded, or the last time the
2993                  * nic was resumed from power saving mode.
2994                  */
2995                 pci_restore_state(mgp->pdev);
2996
2997                 /* save state again for accounting reasons */
2998                 pci_save_state(mgp->pdev);
2999
3000         } else {
3001                 /* if we get back -1's from our slot, perhaps somebody
3002                  * powered off our card.  Don't try to reset it in
3003                  * this case */
3004                 if (cmd == 0xffff) {
3005                         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3006                         if (vendor == 0xffff) {
3007                                 printk(KERN_ERR
3008                                        "myri10ge: %s: device disappeared!\n",
3009                                        mgp->dev->name);
3010                                 return;
3011                         }
3012                 }
3013                 /* Perhaps it is a software error.  Try to reset */
3014
3015                 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
3016                        mgp->dev->name);
3017                 tx = &mgp->ss.tx;
3018                 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
3019                        mgp->dev->name, tx->req, tx->done,
3020                        tx->pkt_start, tx->pkt_done,
3021                        (int)ntohl(mgp->ss.fw_stats->send_done_count));
3022                 msleep(2000);
3023                 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
3024                        mgp->dev->name, tx->req, tx->done,
3025                        tx->pkt_start, tx->pkt_done,
3026                        (int)ntohl(mgp->ss.fw_stats->send_done_count));
3027         }
3028         rtnl_lock();
3029         myri10ge_close(mgp->dev);
3030         status = myri10ge_load_firmware(mgp);
3031         if (status != 0)
3032                 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
3033                        mgp->dev->name);
3034         else
3035                 myri10ge_open(mgp->dev);
3036         rtnl_unlock();
3037 }
3038
3039 /*
3040  * We use our own timer routine rather than relying upon
3041  * netdev->tx_timeout because we have a very large hardware transmit
3042  * queue.  Due to the large queue, the netdev->tx_timeout function
3043  * cannot detect a NIC with a parity error in a timely fashion if the
3044  * NIC is lightly loaded.
3045  */
3046 static void myri10ge_watchdog_timer(unsigned long arg)
3047 {
3048         struct myri10ge_priv *mgp;
3049         struct myri10ge_slice_state *ss;
3050         u32 rx_pause_cnt;
3051
3052         mgp = (struct myri10ge_priv *)arg;
3053
3054         rx_pause_cnt = ntohl(mgp->ss.fw_stats->dropped_pause);
3055
3056         ss = &mgp->ss;
3057         if (ss->rx_small.watchdog_needed) {
3058                 myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
3059                                         mgp->small_bytes + MXGEFW_PAD, 1);
3060                 if (ss->rx_small.fill_cnt - ss->rx_small.cnt >=
3061                     myri10ge_fill_thresh)
3062                         ss->rx_small.watchdog_needed = 0;
3063         }
3064         if (ss->rx_big.watchdog_needed) {
3065                 myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 1);
3066                 if (ss->rx_big.fill_cnt - ss->rx_big.cnt >=
3067                     myri10ge_fill_thresh)
3068                         ss->rx_big.watchdog_needed = 0;
3069         }
3070
3071         if (ss->tx.req != ss->tx.done &&
3072             ss->tx.done == ss->watchdog_tx_done &&
3073             ss->watchdog_tx_req != ss->watchdog_tx_done) {
3074                 /* nic seems like it might be stuck.. */
3075                 if (rx_pause_cnt != mgp->watchdog_pause) {
3076                         if (net_ratelimit())
3077                                 printk(KERN_WARNING "myri10ge %s:"
3078                                        "TX paused, check link partner\n",
3079                                        mgp->dev->name);
3080                 } else {
3081                         schedule_work(&mgp->watchdog_work);
3082                         return;
3083                 }
3084         }
3085         /* rearm timer */
3086         mod_timer(&mgp->watchdog_timer,
3087                   jiffies + myri10ge_watchdog_timeout * HZ);
3088         ss->watchdog_tx_done = ss->tx.done;
3089         ss->watchdog_tx_req = ss->tx.req;
3090         mgp->watchdog_pause = rx_pause_cnt;
3091 }
3092
3093 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3094 {
3095         struct net_device *netdev;
3096         struct myri10ge_priv *mgp;
3097         struct device *dev = &pdev->dev;
3098         size_t bytes;
3099         int i;
3100         int status = -ENXIO;
3101         int dac_enabled;
3102
3103         netdev = alloc_etherdev(sizeof(*mgp));
3104         if (netdev == NULL) {
3105                 dev_err(dev, "Could not allocate ethernet device\n");
3106                 return -ENOMEM;
3107         }
3108
3109         SET_NETDEV_DEV(netdev, &pdev->dev);
3110
3111         mgp = netdev_priv(netdev);
3112         mgp->dev = netdev;
3113         netif_napi_add(netdev, &mgp->ss.napi, myri10ge_poll, myri10ge_napi_weight);
3114         mgp->pdev = pdev;
3115         mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
3116         mgp->pause = myri10ge_flow_control;
3117         mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3118         mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3119         init_waitqueue_head(&mgp->down_wq);
3120
3121         if (pci_enable_device(pdev)) {
3122                 dev_err(&pdev->dev, "pci_enable_device call failed\n");
3123                 status = -ENODEV;
3124                 goto abort_with_netdev;
3125         }
3126
3127         /* Find the vendor-specific cap so we can check
3128          * the reboot register later on */
3129         mgp->vendor_specific_offset
3130             = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
3131
3132         /* Set our max read request to 4KB */
3133         status = pcie_set_readrq(pdev, 4096);
3134         if (status != 0) {
3135                 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
3136                         status);
3137                 goto abort_with_netdev;
3138         }
3139
3140         pci_set_master(pdev);
3141         dac_enabled = 1;
3142         status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
3143         if (status != 0) {
3144                 dac_enabled = 0;
3145                 dev_err(&pdev->dev,
3146                         "64-bit pci address mask was refused, "
3147                         "trying 32-bit\n");
3148                 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3149         }
3150         if (status != 0) {
3151                 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
3152                 goto abort_with_netdev;
3153         }
3154         mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
3155                                       &mgp->cmd_bus, GFP_KERNEL);
3156         if (mgp->cmd == NULL)
3157                 goto abort_with_netdev;
3158
3159         mgp->ss.fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->ss.fw_stats),
3160                                            &mgp->ss.fw_stats_bus, GFP_KERNEL);
3161         if (mgp->ss.fw_stats == NULL)
3162                 goto abort_with_cmd;
3163
3164         mgp->board_span = pci_resource_len(pdev, 0);
3165         mgp->iomem_base = pci_resource_start(pdev, 0);
3166         mgp->mtrr = -1;
3167         mgp->wc_enabled = 0;
3168 #ifdef CONFIG_MTRR
3169         mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3170                              MTRR_TYPE_WRCOMB, 1);
3171         if (mgp->mtrr >= 0)
3172                 mgp->wc_enabled = 1;
3173 #endif
3174         /* Hack.  need to get rid of these magic numbers */
3175         mgp->sram_size =
3176             2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
3177         if (mgp->sram_size > mgp->board_span) {
3178                 dev_err(&pdev->dev, "board span %ld bytes too small\n",
3179                         mgp->board_span);
3180                 goto abort_with_wc;
3181         }
3182         mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
3183         if (mgp->sram == NULL) {
3184                 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3185                         mgp->board_span, mgp->iomem_base);
3186                 status = -ENXIO;
3187                 goto abort_with_wc;
3188         }
3189         memcpy_fromio(mgp->eeprom_strings,
3190                       mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
3191                       MYRI10GE_EEPROM_STRINGS_SIZE);
3192         memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3193         status = myri10ge_read_mac_addr(mgp);
3194         if (status)
3195                 goto abort_with_ioremap;
3196
3197         for (i = 0; i < ETH_ALEN; i++)
3198                 netdev->dev_addr[i] = mgp->mac_addr[i];
3199
3200         /* allocate rx done ring */
3201         bytes = myri10ge_max_intr_slots * sizeof(*mgp->ss.rx_done.entry);
3202         mgp->ss.rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3203                                                 &mgp->ss.rx_done.bus, GFP_KERNEL);
3204         if (mgp->ss.rx_done.entry == NULL)
3205                 goto abort_with_ioremap;
3206         memset(mgp->ss.rx_done.entry, 0, bytes);
3207
3208         myri10ge_select_firmware(mgp);
3209
3210         status = myri10ge_load_firmware(mgp);
3211         if (status != 0) {
3212                 dev_err(&pdev->dev, "failed to load firmware\n");
3213                 goto abort_with_rx_done;
3214         }
3215
3216         status = myri10ge_reset(mgp);
3217         if (status != 0) {
3218                 dev_err(&pdev->dev, "failed reset\n");
3219                 goto abort_with_firmware;
3220         }
3221
3222         pci_set_drvdata(pdev, mgp);
3223         if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3224                 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3225         if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3226                 myri10ge_initial_mtu = 68;
3227         netdev->mtu = myri10ge_initial_mtu;
3228         netdev->open = myri10ge_open;
3229         netdev->stop = myri10ge_close;
3230         netdev->hard_start_xmit = myri10ge_xmit;
3231         netdev->get_stats = myri10ge_get_stats;
3232         netdev->base_addr = mgp->iomem_base;
3233         netdev->change_mtu = myri10ge_change_mtu;
3234         netdev->set_multicast_list = myri10ge_set_multicast_list;
3235         netdev->set_mac_address = myri10ge_set_mac_address;
3236         netdev->features = mgp->features;
3237         if (dac_enabled)
3238                 netdev->features |= NETIF_F_HIGHDMA;
3239
3240         /* make sure we can get an irq, and that MSI can be
3241          * setup (if available).  Also ensure netdev->irq
3242          * is set to correct value if MSI is enabled */
3243         status = myri10ge_request_irq(mgp);
3244         if (status != 0)
3245                 goto abort_with_firmware;
3246         netdev->irq = pdev->irq;
3247         myri10ge_free_irq(mgp);
3248
3249         /* Save configuration space to be restored if the
3250          * nic resets due to a parity error */
3251         pci_save_state(pdev);
3252
3253         /* Setup the watchdog timer */
3254         setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3255                     (unsigned long)mgp);
3256
3257         SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3258         INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3259         status = register_netdev(netdev);
3260         if (status != 0) {
3261                 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3262                 goto abort_with_state;
3263         }
3264         dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3265                  (mgp->msi_enabled ? "MSI" : "xPIC"),
3266                  netdev->irq, mgp->tx_boundary, mgp->fw_name,
3267                  (mgp->wc_enabled ? "Enabled" : "Disabled"));
3268
3269         return 0;
3270
3271 abort_with_state:
3272         pci_restore_state(pdev);
3273
3274 abort_with_firmware:
3275         myri10ge_dummy_rdma(mgp, 0);
3276
3277 abort_with_rx_done:
3278         bytes = myri10ge_max_intr_slots * sizeof(*mgp->ss.rx_done.entry);
3279         dma_free_coherent(&pdev->dev, bytes,
3280                           mgp->ss.rx_done.entry, mgp->ss.rx_done.bus);
3281
3282 abort_with_ioremap:
3283         iounmap(mgp->sram);
3284
3285 abort_with_wc:
3286 #ifdef CONFIG_MTRR
3287         if (mgp->mtrr >= 0)
3288                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3289 #endif
3290         dma_free_coherent(&pdev->dev, sizeof(*mgp->ss.fw_stats),
3291                           mgp->ss.fw_stats, mgp->ss.fw_stats_bus);
3292
3293 abort_with_cmd:
3294         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3295                           mgp->cmd, mgp->cmd_bus);
3296
3297 abort_with_netdev:
3298
3299         free_netdev(netdev);
3300         return status;
3301 }
3302
3303 /*
3304  * myri10ge_remove
3305  *
3306  * Does what is necessary to shutdown one Myrinet device. Called
3307  *   once for each Myrinet card by the kernel when a module is
3308  *   unloaded.
3309  */
3310 static void myri10ge_remove(struct pci_dev *pdev)
3311 {
3312         struct myri10ge_priv *mgp;
3313         struct net_device *netdev;
3314         size_t bytes;
3315
3316         mgp = pci_get_drvdata(pdev);
3317         if (mgp == NULL)
3318                 return;
3319
3320         flush_scheduled_work();
3321         netdev = mgp->dev;
3322         unregister_netdev(netdev);
3323
3324         myri10ge_dummy_rdma(mgp, 0);
3325
3326         /* avoid a memory leak */
3327         pci_restore_state(pdev);
3328
3329         bytes = myri10ge_max_intr_slots * sizeof(*mgp->ss.rx_done.entry);
3330         dma_free_coherent(&pdev->dev, bytes,
3331                           mgp->ss.rx_done.entry, mgp->ss.rx_done.bus);
3332
3333         iounmap(mgp->sram);
3334
3335 #ifdef CONFIG_MTRR
3336         if (mgp->mtrr >= 0)
3337                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3338 #endif
3339         dma_free_coherent(&pdev->dev, sizeof(*mgp->ss.fw_stats),
3340                           mgp->ss.fw_stats, mgp->ss.fw_stats_bus);
3341
3342         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3343                           mgp->cmd, mgp->cmd_bus);
3344
3345         free_netdev(netdev);
3346         pci_set_drvdata(pdev, NULL);
3347 }
3348
3349 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E      0x0008
3350 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9    0x0009
3351
3352 static struct pci_device_id myri10ge_pci_tbl[] = {
3353         {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3354         {PCI_DEVICE
3355          (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
3356         {0},
3357 };
3358
3359 static struct pci_driver myri10ge_driver = {
3360         .name = "myri10ge",
3361         .probe = myri10ge_probe,
3362         .remove = myri10ge_remove,
3363         .id_table = myri10ge_pci_tbl,
3364 #ifdef CONFIG_PM
3365         .suspend = myri10ge_suspend,
3366         .resume = myri10ge_resume,
3367 #endif
3368 };
3369
3370 static __init int myri10ge_init_module(void)
3371 {
3372         printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3373                MYRI10GE_VERSION_STR);
3374         return pci_register_driver(&myri10ge_driver);
3375 }
3376
3377 module_init(myri10ge_init_module);
3378
3379 static __exit void myri10ge_cleanup_module(void)
3380 {
3381         pci_unregister_driver(&myri10ge_driver);
3382 }
3383
3384 module_exit(myri10ge_cleanup_module);