myri10ge: Use the instance of net_device_stats from net_device.
[linux-2.6.git] / drivers / net / myri10ge / myri10ge.c
1 /*************************************************************************
2  * myri10ge.c: Myricom Myri-10G Ethernet driver.
3  *
4  * Copyright (C) 2005 - 2009 Myricom, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  *
31  *
32  * If the eeprom on your board is not recent enough, you will need to get a
33  * newer firmware image at:
34  *   http://www.myri.com/scs/download-Myri10GE.html
35  *
36  * Contact Information:
37  *   <help@myri.com>
38  *   Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39  *************************************************************************/
40
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
52 #include <linux/dca.h>
53 #include <linux/ip.h>
54 #include <linux/inet.h>
55 #include <linux/in.h>
56 #include <linux/ethtool.h>
57 #include <linux/firmware.h>
58 #include <linux/delay.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
63 #include <linux/io.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
66 #include <net/ip.h>
67 #include <net/tcp.h>
68 #include <asm/byteorder.h>
69 #include <asm/io.h>
70 #include <asm/processor.h>
71 #ifdef CONFIG_MTRR
72 #include <asm/mtrr.h>
73 #endif
74
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
77
78 #define MYRI10GE_VERSION_STR "1.5.0-1.432"
79
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR);
83 MODULE_LICENSE("Dual BSD/GPL");
84
85 #define MYRI10GE_MAX_ETHER_MTU 9014
86
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
92
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
97
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
100
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
104
105 #define MYRI10GE_MAX_SLICES 32
106
107 struct myri10ge_rx_buffer_state {
108         struct page *page;
109         int page_offset;
110          DECLARE_PCI_UNMAP_ADDR(bus)
111          DECLARE_PCI_UNMAP_LEN(len)
112 };
113
114 struct myri10ge_tx_buffer_state {
115         struct sk_buff *skb;
116         int last;
117          DECLARE_PCI_UNMAP_ADDR(bus)
118          DECLARE_PCI_UNMAP_LEN(len)
119 };
120
121 struct myri10ge_cmd {
122         u32 data0;
123         u32 data1;
124         u32 data2;
125 };
126
127 struct myri10ge_rx_buf {
128         struct mcp_kreq_ether_recv __iomem *lanai;      /* lanai ptr for recv ring */
129         struct mcp_kreq_ether_recv *shadow;     /* host shadow of recv ring */
130         struct myri10ge_rx_buffer_state *info;
131         struct page *page;
132         dma_addr_t bus;
133         int page_offset;
134         int cnt;
135         int fill_cnt;
136         int alloc_fail;
137         int mask;               /* number of rx slots -1 */
138         int watchdog_needed;
139 };
140
141 struct myri10ge_tx_buf {
142         struct mcp_kreq_ether_send __iomem *lanai;      /* lanai ptr for sendq */
143         __be32 __iomem *send_go;        /* "go" doorbell ptr */
144         __be32 __iomem *send_stop;      /* "stop" doorbell ptr */
145         struct mcp_kreq_ether_send *req_list;   /* host shadow of sendq */
146         char *req_bytes;
147         struct myri10ge_tx_buffer_state *info;
148         int mask;               /* number of transmit slots -1  */
149         int req ____cacheline_aligned;  /* transmit slots submitted     */
150         int pkt_start;          /* packets started */
151         int stop_queue;
152         int linearized;
153         int done ____cacheline_aligned; /* transmit slots completed     */
154         int pkt_done;           /* packets completed */
155         int wake_queue;
156         int queue_active;
157 };
158
159 struct myri10ge_rx_done {
160         struct mcp_slot *entry;
161         dma_addr_t bus;
162         int cnt;
163         int idx;
164         struct net_lro_mgr lro_mgr;
165         struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
166 };
167
168 struct myri10ge_slice_netstats {
169         unsigned long rx_packets;
170         unsigned long tx_packets;
171         unsigned long rx_bytes;
172         unsigned long tx_bytes;
173         unsigned long rx_dropped;
174         unsigned long tx_dropped;
175 };
176
177 struct myri10ge_slice_state {
178         struct myri10ge_tx_buf tx;      /* transmit ring        */
179         struct myri10ge_rx_buf rx_small;
180         struct myri10ge_rx_buf rx_big;
181         struct myri10ge_rx_done rx_done;
182         struct net_device *dev;
183         struct napi_struct napi;
184         struct myri10ge_priv *mgp;
185         struct myri10ge_slice_netstats stats;
186         __be32 __iomem *irq_claim;
187         struct mcp_irq_data *fw_stats;
188         dma_addr_t fw_stats_bus;
189         int watchdog_tx_done;
190         int watchdog_tx_req;
191         int watchdog_rx_done;
192 #ifdef CONFIG_MYRI10GE_DCA
193         int cached_dca_tag;
194         int cpu;
195         __be32 __iomem *dca_tag;
196 #endif
197         char irq_desc[32];
198 };
199
200 struct myri10ge_priv {
201         struct myri10ge_slice_state *ss;
202         int tx_boundary;        /* boundary transmits cannot cross */
203         int num_slices;
204         int running;            /* running?             */
205         int csum_flag;          /* rx_csums?            */
206         int small_bytes;
207         int big_bytes;
208         int max_intr_slots;
209         struct net_device *dev;
210         spinlock_t stats_lock;
211         u8 __iomem *sram;
212         int sram_size;
213         unsigned long board_span;
214         unsigned long iomem_base;
215         __be32 __iomem *irq_deassert;
216         char *mac_addr_string;
217         struct mcp_cmd_response *cmd;
218         dma_addr_t cmd_bus;
219         struct pci_dev *pdev;
220         int msi_enabled;
221         int msix_enabled;
222         struct msix_entry *msix_vectors;
223 #ifdef CONFIG_MYRI10GE_DCA
224         int dca_enabled;
225 #endif
226         u32 link_state;
227         unsigned int rdma_tags_available;
228         int intr_coal_delay;
229         __be32 __iomem *intr_coal_delay_ptr;
230         int mtrr;
231         int wc_enabled;
232         int down_cnt;
233         wait_queue_head_t down_wq;
234         struct work_struct watchdog_work;
235         struct timer_list watchdog_timer;
236         int watchdog_resets;
237         int watchdog_pause;
238         int pause;
239         char *fw_name;
240         char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
241         char *product_code_string;
242         char fw_version[128];
243         int fw_ver_major;
244         int fw_ver_minor;
245         int fw_ver_tiny;
246         int adopted_rx_filter_bug;
247         u8 mac_addr[6];         /* eeprom mac address */
248         unsigned long serial_number;
249         int vendor_specific_offset;
250         int fw_multicast_support;
251         unsigned long features;
252         u32 max_tso6;
253         u32 read_dma;
254         u32 write_dma;
255         u32 read_write_dma;
256         u32 link_changes;
257         u32 msg_enable;
258         unsigned int board_number;
259         int rebooted;
260 };
261
262 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
263 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
264 static char *myri10ge_fw_rss_unaligned = "myri10ge_rss_ethp_z8e.dat";
265 static char *myri10ge_fw_rss_aligned = "myri10ge_rss_eth_z8e.dat";
266
267 static char *myri10ge_fw_name = NULL;
268 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
269 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
270
271 #define MYRI10GE_MAX_BOARDS 8
272 static char *myri10ge_fw_names[MYRI10GE_MAX_BOARDS] =
273     {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
274 module_param_array_named(myri10ge_fw_names, myri10ge_fw_names, charp, NULL,
275                          0444);
276 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image names per board");
277
278 static int myri10ge_ecrc_enable = 1;
279 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
280 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
281
282 static int myri10ge_small_bytes = -1;   /* -1 == auto */
283 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
284 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets");
285
286 static int myri10ge_msi = 1;    /* enable msi by default */
287 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
288 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts");
289
290 static int myri10ge_intr_coal_delay = 75;
291 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
292 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay");
293
294 static int myri10ge_flow_control = 1;
295 module_param(myri10ge_flow_control, int, S_IRUGO);
296 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter");
297
298 static int myri10ge_deassert_wait = 1;
299 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
300 MODULE_PARM_DESC(myri10ge_deassert_wait,
301                  "Wait when deasserting legacy interrupts");
302
303 static int myri10ge_force_firmware = 0;
304 module_param(myri10ge_force_firmware, int, S_IRUGO);
305 MODULE_PARM_DESC(myri10ge_force_firmware,
306                  "Force firmware to assume aligned completions");
307
308 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
309 module_param(myri10ge_initial_mtu, int, S_IRUGO);
310 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU");
311
312 static int myri10ge_napi_weight = 64;
313 module_param(myri10ge_napi_weight, int, S_IRUGO);
314 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight");
315
316 static int myri10ge_watchdog_timeout = 1;
317 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
318 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout");
319
320 static int myri10ge_max_irq_loops = 1048576;
321 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
322 MODULE_PARM_DESC(myri10ge_max_irq_loops,
323                  "Set stuck legacy IRQ detection threshold");
324
325 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
326
327 static int myri10ge_debug = -1; /* defaults above */
328 module_param(myri10ge_debug, int, 0);
329 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
330
331 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
332 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
333 MODULE_PARM_DESC(myri10ge_lro_max_pkts,
334                  "Number of LRO packets to be aggregated");
335
336 static int myri10ge_fill_thresh = 256;
337 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
338 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed");
339
340 static int myri10ge_reset_recover = 1;
341
342 static int myri10ge_max_slices = 1;
343 module_param(myri10ge_max_slices, int, S_IRUGO);
344 MODULE_PARM_DESC(myri10ge_max_slices, "Max tx/rx queues");
345
346 static int myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
347 module_param(myri10ge_rss_hash, int, S_IRUGO);
348 MODULE_PARM_DESC(myri10ge_rss_hash, "Type of RSS hashing to do");
349
350 static int myri10ge_dca = 1;
351 module_param(myri10ge_dca, int, S_IRUGO);
352 MODULE_PARM_DESC(myri10ge_dca, "Enable DCA if possible");
353
354 #define MYRI10GE_FW_OFFSET 1024*1024
355 #define MYRI10GE_HIGHPART_TO_U32(X) \
356 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
357 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
358
359 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
360
361 static void myri10ge_set_multicast_list(struct net_device *dev);
362 static netdev_tx_t myri10ge_sw_tso(struct sk_buff *skb,
363                                          struct net_device *dev);
364
365 static inline void put_be32(__be32 val, __be32 __iomem * p)
366 {
367         __raw_writel((__force __u32) val, (__force void __iomem *)p);
368 }
369
370 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev);
371
372 static int
373 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
374                   struct myri10ge_cmd *data, int atomic)
375 {
376         struct mcp_cmd *buf;
377         char buf_bytes[sizeof(*buf) + 8];
378         struct mcp_cmd_response *response = mgp->cmd;
379         char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
380         u32 dma_low, dma_high, result, value;
381         int sleep_total = 0;
382
383         /* ensure buf is aligned to 8 bytes */
384         buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
385
386         buf->data0 = htonl(data->data0);
387         buf->data1 = htonl(data->data1);
388         buf->data2 = htonl(data->data2);
389         buf->cmd = htonl(cmd);
390         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
391         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
392
393         buf->response_addr.low = htonl(dma_low);
394         buf->response_addr.high = htonl(dma_high);
395         response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
396         mb();
397         myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
398
399         /* wait up to 15ms. Longest command is the DMA benchmark,
400          * which is capped at 5ms, but runs from a timeout handler
401          * that runs every 7.8ms. So a 15ms timeout leaves us with
402          * a 2.2ms margin
403          */
404         if (atomic) {
405                 /* if atomic is set, do not sleep,
406                  * and try to get the completion quickly
407                  * (1ms will be enough for those commands) */
408                 for (sleep_total = 0;
409                      sleep_total < 1000
410                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
411                      sleep_total += 10) {
412                         udelay(10);
413                         mb();
414                 }
415         } else {
416                 /* use msleep for most command */
417                 for (sleep_total = 0;
418                      sleep_total < 15
419                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
420                      sleep_total++)
421                         msleep(1);
422         }
423
424         result = ntohl(response->result);
425         value = ntohl(response->data);
426         if (result != MYRI10GE_NO_RESPONSE_RESULT) {
427                 if (result == 0) {
428                         data->data0 = value;
429                         return 0;
430                 } else if (result == MXGEFW_CMD_UNKNOWN) {
431                         return -ENOSYS;
432                 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
433                         return -E2BIG;
434                 } else if (result == MXGEFW_CMD_ERROR_RANGE &&
435                            cmd == MXGEFW_CMD_ENABLE_RSS_QUEUES &&
436                            (data->
437                             data1 & MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES) !=
438                            0) {
439                         return -ERANGE;
440                 } else {
441                         dev_err(&mgp->pdev->dev,
442                                 "command %d failed, result = %d\n",
443                                 cmd, result);
444                         return -ENXIO;
445                 }
446         }
447
448         dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
449                 cmd, result);
450         return -EAGAIN;
451 }
452
453 /*
454  * The eeprom strings on the lanaiX have the format
455  * SN=x\0
456  * MAC=x:x:x:x:x:x\0
457  * PT:ddd mmm xx xx:xx:xx xx\0
458  * PV:ddd mmm xx xx:xx:xx xx\0
459  */
460 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
461 {
462         char *ptr, *limit;
463         int i;
464
465         ptr = mgp->eeprom_strings;
466         limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
467
468         while (*ptr != '\0' && ptr < limit) {
469                 if (memcmp(ptr, "MAC=", 4) == 0) {
470                         ptr += 4;
471                         mgp->mac_addr_string = ptr;
472                         for (i = 0; i < 6; i++) {
473                                 if ((ptr + 2) > limit)
474                                         goto abort;
475                                 mgp->mac_addr[i] =
476                                     simple_strtoul(ptr, &ptr, 16);
477                                 ptr += 1;
478                         }
479                 }
480                 if (memcmp(ptr, "PC=", 3) == 0) {
481                         ptr += 3;
482                         mgp->product_code_string = ptr;
483                 }
484                 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
485                         ptr += 3;
486                         mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
487                 }
488                 while (ptr < limit && *ptr++) ;
489         }
490
491         return 0;
492
493 abort:
494         dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
495         return -ENXIO;
496 }
497
498 /*
499  * Enable or disable periodic RDMAs from the host to make certain
500  * chipsets resend dropped PCIe messages
501  */
502
503 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
504 {
505         char __iomem *submit;
506         __be32 buf[16] __attribute__ ((__aligned__(8)));
507         u32 dma_low, dma_high;
508         int i;
509
510         /* clear confirmation addr */
511         mgp->cmd->data = 0;
512         mb();
513
514         /* send a rdma command to the PCIe engine, and wait for the
515          * response in the confirmation address.  The firmware should
516          * write a -1 there to indicate it is alive and well
517          */
518         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
519         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
520
521         buf[0] = htonl(dma_high);       /* confirm addr MSW */
522         buf[1] = htonl(dma_low);        /* confirm addr LSW */
523         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
524         buf[3] = htonl(dma_high);       /* dummy addr MSW */
525         buf[4] = htonl(dma_low);        /* dummy addr LSW */
526         buf[5] = htonl(enable); /* enable? */
527
528         submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
529
530         myri10ge_pio_copy(submit, &buf, sizeof(buf));
531         for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
532                 msleep(1);
533         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
534                 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
535                         (enable ? "enable" : "disable"));
536 }
537
538 static int
539 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
540                            struct mcp_gen_header *hdr)
541 {
542         struct device *dev = &mgp->pdev->dev;
543
544         /* check firmware type */
545         if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
546                 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
547                 return -EINVAL;
548         }
549
550         /* save firmware version for ethtool */
551         strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
552
553         sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
554                &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
555
556         if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
557               && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
558                 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
559                 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
560                         MXGEFW_VERSION_MINOR);
561                 return -EINVAL;
562         }
563         return 0;
564 }
565
566 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
567 {
568         unsigned crc, reread_crc;
569         const struct firmware *fw;
570         struct device *dev = &mgp->pdev->dev;
571         unsigned char *fw_readback;
572         struct mcp_gen_header *hdr;
573         size_t hdr_offset;
574         int status;
575         unsigned i;
576
577         if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
578                 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
579                         mgp->fw_name);
580                 status = -EINVAL;
581                 goto abort_with_nothing;
582         }
583
584         /* check size */
585
586         if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
587             fw->size < MCP_HEADER_PTR_OFFSET + 4) {
588                 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
589                 status = -EINVAL;
590                 goto abort_with_fw;
591         }
592
593         /* check id */
594         hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
595         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
596                 dev_err(dev, "Bad firmware file\n");
597                 status = -EINVAL;
598                 goto abort_with_fw;
599         }
600         hdr = (void *)(fw->data + hdr_offset);
601
602         status = myri10ge_validate_firmware(mgp, hdr);
603         if (status != 0)
604                 goto abort_with_fw;
605
606         crc = crc32(~0, fw->data, fw->size);
607         for (i = 0; i < fw->size; i += 256) {
608                 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
609                                   fw->data + i,
610                                   min(256U, (unsigned)(fw->size - i)));
611                 mb();
612                 readb(mgp->sram);
613         }
614         fw_readback = vmalloc(fw->size);
615         if (!fw_readback) {
616                 status = -ENOMEM;
617                 goto abort_with_fw;
618         }
619         /* corruption checking is good for parity recovery and buggy chipset */
620         memcpy_fromio(fw_readback, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
621         reread_crc = crc32(~0, fw_readback, fw->size);
622         vfree(fw_readback);
623         if (crc != reread_crc) {
624                 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
625                         (unsigned)fw->size, reread_crc, crc);
626                 status = -EIO;
627                 goto abort_with_fw;
628         }
629         *size = (u32) fw->size;
630
631 abort_with_fw:
632         release_firmware(fw);
633
634 abort_with_nothing:
635         return status;
636 }
637
638 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
639 {
640         struct mcp_gen_header *hdr;
641         struct device *dev = &mgp->pdev->dev;
642         const size_t bytes = sizeof(struct mcp_gen_header);
643         size_t hdr_offset;
644         int status;
645
646         /* find running firmware header */
647         hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
648
649         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
650                 dev_err(dev, "Running firmware has bad header offset (%d)\n",
651                         (int)hdr_offset);
652                 return -EIO;
653         }
654
655         /* copy header of running firmware from SRAM to host memory to
656          * validate firmware */
657         hdr = kmalloc(bytes, GFP_KERNEL);
658         if (hdr == NULL) {
659                 dev_err(dev, "could not malloc firmware hdr\n");
660                 return -ENOMEM;
661         }
662         memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
663         status = myri10ge_validate_firmware(mgp, hdr);
664         kfree(hdr);
665
666         /* check to see if adopted firmware has bug where adopting
667          * it will cause broadcasts to be filtered unless the NIC
668          * is kept in ALLMULTI mode */
669         if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
670             mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
671                 mgp->adopted_rx_filter_bug = 1;
672                 dev_warn(dev, "Adopting fw %d.%d.%d: "
673                          "working around rx filter bug\n",
674                          mgp->fw_ver_major, mgp->fw_ver_minor,
675                          mgp->fw_ver_tiny);
676         }
677         return status;
678 }
679
680 static int myri10ge_get_firmware_capabilities(struct myri10ge_priv *mgp)
681 {
682         struct myri10ge_cmd cmd;
683         int status;
684
685         /* probe for IPv6 TSO support */
686         mgp->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
687         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
688                                    &cmd, 0);
689         if (status == 0) {
690                 mgp->max_tso6 = cmd.data0;
691                 mgp->features |= NETIF_F_TSO6;
692         }
693
694         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
695         if (status != 0) {
696                 dev_err(&mgp->pdev->dev,
697                         "failed MXGEFW_CMD_GET_RX_RING_SIZE\n");
698                 return -ENXIO;
699         }
700
701         mgp->max_intr_slots = 2 * (cmd.data0 / sizeof(struct mcp_dma_addr));
702
703         return 0;
704 }
705
706 static int myri10ge_load_firmware(struct myri10ge_priv *mgp, int adopt)
707 {
708         char __iomem *submit;
709         __be32 buf[16] __attribute__ ((__aligned__(8)));
710         u32 dma_low, dma_high, size;
711         int status, i;
712
713         size = 0;
714         status = myri10ge_load_hotplug_firmware(mgp, &size);
715         if (status) {
716                 if (!adopt)
717                         return status;
718                 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
719
720                 /* Do not attempt to adopt firmware if there
721                  * was a bad crc */
722                 if (status == -EIO)
723                         return status;
724
725                 status = myri10ge_adopt_running_firmware(mgp);
726                 if (status != 0) {
727                         dev_err(&mgp->pdev->dev,
728                                 "failed to adopt running firmware\n");
729                         return status;
730                 }
731                 dev_info(&mgp->pdev->dev,
732                          "Successfully adopted running firmware\n");
733                 if (mgp->tx_boundary == 4096) {
734                         dev_warn(&mgp->pdev->dev,
735                                  "Using firmware currently running on NIC"
736                                  ".  For optimal\n");
737                         dev_warn(&mgp->pdev->dev,
738                                  "performance consider loading optimized "
739                                  "firmware\n");
740                         dev_warn(&mgp->pdev->dev, "via hotplug\n");
741                 }
742
743                 mgp->fw_name = "adopted";
744                 mgp->tx_boundary = 2048;
745                 myri10ge_dummy_rdma(mgp, 1);
746                 status = myri10ge_get_firmware_capabilities(mgp);
747                 return status;
748         }
749
750         /* clear confirmation addr */
751         mgp->cmd->data = 0;
752         mb();
753
754         /* send a reload command to the bootstrap MCP, and wait for the
755          *  response in the confirmation address.  The firmware should
756          * write a -1 there to indicate it is alive and well
757          */
758         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
759         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
760
761         buf[0] = htonl(dma_high);       /* confirm addr MSW */
762         buf[1] = htonl(dma_low);        /* confirm addr LSW */
763         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
764
765         /* FIX: All newest firmware should un-protect the bottom of
766          * the sram before handoff. However, the very first interfaces
767          * do not. Therefore the handoff copy must skip the first 8 bytes
768          */
769         buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
770         buf[4] = htonl(size - 8);       /* length of code */
771         buf[5] = htonl(8);      /* where to copy to */
772         buf[6] = htonl(0);      /* where to jump to */
773
774         submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
775
776         myri10ge_pio_copy(submit, &buf, sizeof(buf));
777         mb();
778         msleep(1);
779         mb();
780         i = 0;
781         while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 9) {
782                 msleep(1 << i);
783                 i++;
784         }
785         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
786                 dev_err(&mgp->pdev->dev, "handoff failed\n");
787                 return -ENXIO;
788         }
789         myri10ge_dummy_rdma(mgp, 1);
790         status = myri10ge_get_firmware_capabilities(mgp);
791
792         return status;
793 }
794
795 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
796 {
797         struct myri10ge_cmd cmd;
798         int status;
799
800         cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
801                      | (addr[2] << 8) | addr[3]);
802
803         cmd.data1 = ((addr[4] << 8) | (addr[5]));
804
805         status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
806         return status;
807 }
808
809 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
810 {
811         struct myri10ge_cmd cmd;
812         int status, ctl;
813
814         ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
815         status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
816
817         if (status) {
818                 printk(KERN_ERR
819                        "myri10ge: %s: Failed to set flow control mode\n",
820                        mgp->dev->name);
821                 return status;
822         }
823         mgp->pause = pause;
824         return 0;
825 }
826
827 static void
828 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
829 {
830         struct myri10ge_cmd cmd;
831         int status, ctl;
832
833         ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
834         status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
835         if (status)
836                 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
837                        mgp->dev->name);
838 }
839
840 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
841 {
842         struct myri10ge_cmd cmd;
843         int status;
844         u32 len;
845         struct page *dmatest_page;
846         dma_addr_t dmatest_bus;
847         char *test = " ";
848
849         dmatest_page = alloc_page(GFP_KERNEL);
850         if (!dmatest_page)
851                 return -ENOMEM;
852         dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
853                                    DMA_BIDIRECTIONAL);
854
855         /* Run a small DMA test.
856          * The magic multipliers to the length tell the firmware
857          * to do DMA read, write, or read+write tests.  The
858          * results are returned in cmd.data0.  The upper 16
859          * bits or the return is the number of transfers completed.
860          * The lower 16 bits is the time in 0.5us ticks that the
861          * transfers took to complete.
862          */
863
864         len = mgp->tx_boundary;
865
866         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
867         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
868         cmd.data2 = len * 0x10000;
869         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
870         if (status != 0) {
871                 test = "read";
872                 goto abort;
873         }
874         mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
875         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
876         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
877         cmd.data2 = len * 0x1;
878         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
879         if (status != 0) {
880                 test = "write";
881                 goto abort;
882         }
883         mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
884
885         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
886         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
887         cmd.data2 = len * 0x10001;
888         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
889         if (status != 0) {
890                 test = "read/write";
891                 goto abort;
892         }
893         mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
894             (cmd.data0 & 0xffff);
895
896 abort:
897         pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
898         put_page(dmatest_page);
899
900         if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
901                 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
902                          test, status);
903
904         return status;
905 }
906
907 static int myri10ge_reset(struct myri10ge_priv *mgp)
908 {
909         struct myri10ge_cmd cmd;
910         struct myri10ge_slice_state *ss;
911         int i, status;
912         size_t bytes;
913 #ifdef CONFIG_MYRI10GE_DCA
914         unsigned long dca_tag_off;
915 #endif
916
917         /* try to send a reset command to the card to see if it
918          * is alive */
919         memset(&cmd, 0, sizeof(cmd));
920         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
921         if (status != 0) {
922                 dev_err(&mgp->pdev->dev, "failed reset\n");
923                 return -ENXIO;
924         }
925
926         (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
927         /*
928          * Use non-ndis mcp_slot (eg, 4 bytes total,
929          * no toeplitz hash value returned.  Older firmware will
930          * not understand this command, but will use the correct
931          * sized mcp_slot, so we ignore error returns
932          */
933         cmd.data0 = MXGEFW_RSS_MCP_SLOT_TYPE_MIN;
934         (void)myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_MCP_SLOT_TYPE, &cmd, 0);
935
936         /* Now exchange information about interrupts  */
937
938         bytes = mgp->max_intr_slots * sizeof(*mgp->ss[0].rx_done.entry);
939         cmd.data0 = (u32) bytes;
940         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
941
942         /*
943          * Even though we already know how many slices are supported
944          * via myri10ge_probe_slices() MXGEFW_CMD_GET_MAX_RSS_QUEUES
945          * has magic side effects, and must be called after a reset.
946          * It must be called prior to calling any RSS related cmds,
947          * including assigning an interrupt queue for anything but
948          * slice 0.  It must also be called *after*
949          * MXGEFW_CMD_SET_INTRQ_SIZE, since the intrq size is used by
950          * the firmware to compute offsets.
951          */
952
953         if (mgp->num_slices > 1) {
954
955                 /* ask the maximum number of slices it supports */
956                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
957                                            &cmd, 0);
958                 if (status != 0) {
959                         dev_err(&mgp->pdev->dev,
960                                 "failed to get number of slices\n");
961                 }
962
963                 /*
964                  * MXGEFW_CMD_ENABLE_RSS_QUEUES must be called prior
965                  * to setting up the interrupt queue DMA
966                  */
967
968                 cmd.data0 = mgp->num_slices;
969                 cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
970                 if (mgp->dev->real_num_tx_queues > 1)
971                         cmd.data1 |= MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES;
972                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
973                                            &cmd, 0);
974
975                 /* Firmware older than 1.4.32 only supports multiple
976                  * RX queues, so if we get an error, first retry using a
977                  * single TX queue before giving up */
978                 if (status != 0 && mgp->dev->real_num_tx_queues > 1) {
979                         mgp->dev->real_num_tx_queues = 1;
980                         cmd.data0 = mgp->num_slices;
981                         cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
982                         status = myri10ge_send_cmd(mgp,
983                                                    MXGEFW_CMD_ENABLE_RSS_QUEUES,
984                                                    &cmd, 0);
985                 }
986
987                 if (status != 0) {
988                         dev_err(&mgp->pdev->dev,
989                                 "failed to set number of slices\n");
990
991                         return status;
992                 }
993         }
994         for (i = 0; i < mgp->num_slices; i++) {
995                 ss = &mgp->ss[i];
996                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->rx_done.bus);
997                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->rx_done.bus);
998                 cmd.data2 = i;
999                 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA,
1000                                             &cmd, 0);
1001         };
1002
1003         status |=
1004             myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
1005         for (i = 0; i < mgp->num_slices; i++) {
1006                 ss = &mgp->ss[i];
1007                 ss->irq_claim =
1008                     (__iomem __be32 *) (mgp->sram + cmd.data0 + 8 * i);
1009         }
1010         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
1011                                     &cmd, 0);
1012         mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
1013
1014         status |= myri10ge_send_cmd
1015             (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
1016         mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
1017         if (status != 0) {
1018                 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
1019                 return status;
1020         }
1021         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1022
1023 #ifdef CONFIG_MYRI10GE_DCA
1024         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_DCA_OFFSET, &cmd, 0);
1025         dca_tag_off = cmd.data0;
1026         for (i = 0; i < mgp->num_slices; i++) {
1027                 ss = &mgp->ss[i];
1028                 if (status == 0) {
1029                         ss->dca_tag = (__iomem __be32 *)
1030                             (mgp->sram + dca_tag_off + 4 * i);
1031                 } else {
1032                         ss->dca_tag = NULL;
1033                 }
1034         }
1035 #endif                          /* CONFIG_MYRI10GE_DCA */
1036
1037         /* reset mcp/driver shared state back to 0 */
1038
1039         mgp->link_changes = 0;
1040         for (i = 0; i < mgp->num_slices; i++) {
1041                 ss = &mgp->ss[i];
1042
1043                 memset(ss->rx_done.entry, 0, bytes);
1044                 ss->tx.req = 0;
1045                 ss->tx.done = 0;
1046                 ss->tx.pkt_start = 0;
1047                 ss->tx.pkt_done = 0;
1048                 ss->rx_big.cnt = 0;
1049                 ss->rx_small.cnt = 0;
1050                 ss->rx_done.idx = 0;
1051                 ss->rx_done.cnt = 0;
1052                 ss->tx.wake_queue = 0;
1053                 ss->tx.stop_queue = 0;
1054         }
1055
1056         status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
1057         myri10ge_change_pause(mgp, mgp->pause);
1058         myri10ge_set_multicast_list(mgp->dev);
1059         return status;
1060 }
1061
1062 #ifdef CONFIG_MYRI10GE_DCA
1063 static void
1064 myri10ge_write_dca(struct myri10ge_slice_state *ss, int cpu, int tag)
1065 {
1066         ss->cpu = cpu;
1067         ss->cached_dca_tag = tag;
1068         put_be32(htonl(tag), ss->dca_tag);
1069 }
1070
1071 static inline void myri10ge_update_dca(struct myri10ge_slice_state *ss)
1072 {
1073         int cpu = get_cpu();
1074         int tag;
1075
1076         if (cpu != ss->cpu) {
1077                 tag = dca_get_tag(cpu);
1078                 if (ss->cached_dca_tag != tag)
1079                         myri10ge_write_dca(ss, cpu, tag);
1080         }
1081         put_cpu();
1082 }
1083
1084 static void myri10ge_setup_dca(struct myri10ge_priv *mgp)
1085 {
1086         int err, i;
1087         struct pci_dev *pdev = mgp->pdev;
1088
1089         if (mgp->ss[0].dca_tag == NULL || mgp->dca_enabled)
1090                 return;
1091         if (!myri10ge_dca) {
1092                 dev_err(&pdev->dev, "dca disabled by administrator\n");
1093                 return;
1094         }
1095         err = dca_add_requester(&pdev->dev);
1096         if (err) {
1097                 if (err != -ENODEV)
1098                         dev_err(&pdev->dev,
1099                                 "dca_add_requester() failed, err=%d\n", err);
1100                 return;
1101         }
1102         mgp->dca_enabled = 1;
1103         for (i = 0; i < mgp->num_slices; i++)
1104                 myri10ge_write_dca(&mgp->ss[i], -1, 0);
1105 }
1106
1107 static void myri10ge_teardown_dca(struct myri10ge_priv *mgp)
1108 {
1109         struct pci_dev *pdev = mgp->pdev;
1110         int err;
1111
1112         if (!mgp->dca_enabled)
1113                 return;
1114         mgp->dca_enabled = 0;
1115         err = dca_remove_requester(&pdev->dev);
1116 }
1117
1118 static int myri10ge_notify_dca_device(struct device *dev, void *data)
1119 {
1120         struct myri10ge_priv *mgp;
1121         unsigned long event;
1122
1123         mgp = dev_get_drvdata(dev);
1124         event = *(unsigned long *)data;
1125
1126         if (event == DCA_PROVIDER_ADD)
1127                 myri10ge_setup_dca(mgp);
1128         else if (event == DCA_PROVIDER_REMOVE)
1129                 myri10ge_teardown_dca(mgp);
1130         return 0;
1131 }
1132 #endif                          /* CONFIG_MYRI10GE_DCA */
1133
1134 static inline void
1135 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
1136                     struct mcp_kreq_ether_recv *src)
1137 {
1138         __be32 low;
1139
1140         low = src->addr_low;
1141         src->addr_low = htonl(DMA_BIT_MASK(32));
1142         myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
1143         mb();
1144         myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
1145         mb();
1146         src->addr_low = low;
1147         put_be32(low, &dst->addr_low);
1148         mb();
1149 }
1150
1151 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
1152 {
1153         struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
1154
1155         if ((skb->protocol == htons(ETH_P_8021Q)) &&
1156             (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
1157              vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
1158                 skb->csum = hw_csum;
1159                 skb->ip_summed = CHECKSUM_COMPLETE;
1160         }
1161 }
1162
1163 static inline void
1164 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
1165                       struct skb_frag_struct *rx_frags, int len, int hlen)
1166 {
1167         struct skb_frag_struct *skb_frags;
1168
1169         skb->len = skb->data_len = len;
1170         skb->truesize = len + sizeof(struct sk_buff);
1171         /* attach the page(s) */
1172
1173         skb_frags = skb_shinfo(skb)->frags;
1174         while (len > 0) {
1175                 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
1176                 len -= rx_frags->size;
1177                 skb_frags++;
1178                 rx_frags++;
1179                 skb_shinfo(skb)->nr_frags++;
1180         }
1181
1182         /* pskb_may_pull is not available in irq context, but
1183          * skb_pull() (for ether_pad and eth_type_trans()) requires
1184          * the beginning of the packet in skb_headlen(), move it
1185          * manually */
1186         skb_copy_to_linear_data(skb, va, hlen);
1187         skb_shinfo(skb)->frags[0].page_offset += hlen;
1188         skb_shinfo(skb)->frags[0].size -= hlen;
1189         skb->data_len -= hlen;
1190         skb->tail += hlen;
1191         skb_pull(skb, MXGEFW_PAD);
1192 }
1193
1194 static void
1195 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
1196                         int bytes, int watchdog)
1197 {
1198         struct page *page;
1199         int idx;
1200
1201         if (unlikely(rx->watchdog_needed && !watchdog))
1202                 return;
1203
1204         /* try to refill entire ring */
1205         while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
1206                 idx = rx->fill_cnt & rx->mask;
1207                 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
1208                         /* we can use part of previous page */
1209                         get_page(rx->page);
1210                 } else {
1211                         /* we need a new page */
1212                         page =
1213                             alloc_pages(GFP_ATOMIC | __GFP_COMP,
1214                                         MYRI10GE_ALLOC_ORDER);
1215                         if (unlikely(page == NULL)) {
1216                                 if (rx->fill_cnt - rx->cnt < 16)
1217                                         rx->watchdog_needed = 1;
1218                                 return;
1219                         }
1220                         rx->page = page;
1221                         rx->page_offset = 0;
1222                         rx->bus = pci_map_page(mgp->pdev, page, 0,
1223                                                MYRI10GE_ALLOC_SIZE,
1224                                                PCI_DMA_FROMDEVICE);
1225                 }
1226                 rx->info[idx].page = rx->page;
1227                 rx->info[idx].page_offset = rx->page_offset;
1228                 /* note that this is the address of the start of the
1229                  * page */
1230                 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
1231                 rx->shadow[idx].addr_low =
1232                     htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
1233                 rx->shadow[idx].addr_high =
1234                     htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
1235
1236                 /* start next packet on a cacheline boundary */
1237                 rx->page_offset += SKB_DATA_ALIGN(bytes);
1238
1239 #if MYRI10GE_ALLOC_SIZE > 4096
1240                 /* don't cross a 4KB boundary */
1241                 if ((rx->page_offset >> 12) !=
1242                     ((rx->page_offset + bytes - 1) >> 12))
1243                         rx->page_offset = (rx->page_offset + 4096) & ~4095;
1244 #endif
1245                 rx->fill_cnt++;
1246
1247                 /* copy 8 descriptors to the firmware at a time */
1248                 if ((idx & 7) == 7) {
1249                         myri10ge_submit_8rx(&rx->lanai[idx - 7],
1250                                             &rx->shadow[idx - 7]);
1251                 }
1252         }
1253 }
1254
1255 static inline void
1256 myri10ge_unmap_rx_page(struct pci_dev *pdev,
1257                        struct myri10ge_rx_buffer_state *info, int bytes)
1258 {
1259         /* unmap the recvd page if we're the only or last user of it */
1260         if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1261             (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1262                 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1263                                       & ~(MYRI10GE_ALLOC_SIZE - 1)),
1264                                MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1265         }
1266 }
1267
1268 #define MYRI10GE_HLEN 64        /* The number of bytes to copy from a
1269                                  * page into an skb */
1270
1271 static inline int
1272 myri10ge_rx_done(struct myri10ge_slice_state *ss, struct myri10ge_rx_buf *rx,
1273                  int bytes, int len, __wsum csum)
1274 {
1275         struct myri10ge_priv *mgp = ss->mgp;
1276         struct sk_buff *skb;
1277         struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1278         int i, idx, hlen, remainder;
1279         struct pci_dev *pdev = mgp->pdev;
1280         struct net_device *dev = mgp->dev;
1281         u8 *va;
1282
1283         len += MXGEFW_PAD;
1284         idx = rx->cnt & rx->mask;
1285         va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1286         prefetch(va);
1287         /* Fill skb_frag_struct(s) with data from our receive */
1288         for (i = 0, remainder = len; remainder > 0; i++) {
1289                 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1290                 rx_frags[i].page = rx->info[idx].page;
1291                 rx_frags[i].page_offset = rx->info[idx].page_offset;
1292                 if (remainder < MYRI10GE_ALLOC_SIZE)
1293                         rx_frags[i].size = remainder;
1294                 else
1295                         rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1296                 rx->cnt++;
1297                 idx = rx->cnt & rx->mask;
1298                 remainder -= MYRI10GE_ALLOC_SIZE;
1299         }
1300
1301         if (dev->features & NETIF_F_LRO) {
1302                 rx_frags[0].page_offset += MXGEFW_PAD;
1303                 rx_frags[0].size -= MXGEFW_PAD;
1304                 len -= MXGEFW_PAD;
1305                 lro_receive_frags(&ss->rx_done.lro_mgr, rx_frags,
1306                                   /* opaque, will come back in get_frag_header */
1307                                   len, len,
1308                                   (void *)(__force unsigned long)csum, csum);
1309
1310                 return 1;
1311         }
1312
1313         hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1314
1315         /* allocate an skb to attach the page(s) to. This is done
1316          * after trying LRO, so as to avoid skb allocation overheads */
1317
1318         skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1319         if (unlikely(skb == NULL)) {
1320                 ss->stats.rx_dropped++;
1321                 do {
1322                         i--;
1323                         put_page(rx_frags[i].page);
1324                 } while (i != 0);
1325                 return 0;
1326         }
1327
1328         /* Attach the pages to the skb, and trim off any padding */
1329         myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1330         if (skb_shinfo(skb)->frags[0].size <= 0) {
1331                 put_page(skb_shinfo(skb)->frags[0].page);
1332                 skb_shinfo(skb)->nr_frags = 0;
1333         }
1334         skb->protocol = eth_type_trans(skb, dev);
1335         skb_record_rx_queue(skb, ss - &mgp->ss[0]);
1336
1337         if (mgp->csum_flag) {
1338                 if ((skb->protocol == htons(ETH_P_IP)) ||
1339                     (skb->protocol == htons(ETH_P_IPV6))) {
1340                         skb->csum = csum;
1341                         skb->ip_summed = CHECKSUM_COMPLETE;
1342                 } else
1343                         myri10ge_vlan_ip_csum(skb, csum);
1344         }
1345         netif_receive_skb(skb);
1346         return 1;
1347 }
1348
1349 static inline void
1350 myri10ge_tx_done(struct myri10ge_slice_state *ss, int mcp_index)
1351 {
1352         struct pci_dev *pdev = ss->mgp->pdev;
1353         struct myri10ge_tx_buf *tx = &ss->tx;
1354         struct netdev_queue *dev_queue;
1355         struct sk_buff *skb;
1356         int idx, len;
1357
1358         while (tx->pkt_done != mcp_index) {
1359                 idx = tx->done & tx->mask;
1360                 skb = tx->info[idx].skb;
1361
1362                 /* Mark as free */
1363                 tx->info[idx].skb = NULL;
1364                 if (tx->info[idx].last) {
1365                         tx->pkt_done++;
1366                         tx->info[idx].last = 0;
1367                 }
1368                 tx->done++;
1369                 len = pci_unmap_len(&tx->info[idx], len);
1370                 pci_unmap_len_set(&tx->info[idx], len, 0);
1371                 if (skb) {
1372                         ss->stats.tx_bytes += skb->len;
1373                         ss->stats.tx_packets++;
1374                         dev_kfree_skb_irq(skb);
1375                         if (len)
1376                                 pci_unmap_single(pdev,
1377                                                  pci_unmap_addr(&tx->info[idx],
1378                                                                 bus), len,
1379                                                  PCI_DMA_TODEVICE);
1380                 } else {
1381                         if (len)
1382                                 pci_unmap_page(pdev,
1383                                                pci_unmap_addr(&tx->info[idx],
1384                                                               bus), len,
1385                                                PCI_DMA_TODEVICE);
1386                 }
1387         }
1388
1389         dev_queue = netdev_get_tx_queue(ss->dev, ss - ss->mgp->ss);
1390         /*
1391          * Make a minimal effort to prevent the NIC from polling an
1392          * idle tx queue.  If we can't get the lock we leave the queue
1393          * active. In this case, either a thread was about to start
1394          * using the queue anyway, or we lost a race and the NIC will
1395          * waste some of its resources polling an inactive queue for a
1396          * while.
1397          */
1398
1399         if ((ss->mgp->dev->real_num_tx_queues > 1) &&
1400             __netif_tx_trylock(dev_queue)) {
1401                 if (tx->req == tx->done) {
1402                         tx->queue_active = 0;
1403                         put_be32(htonl(1), tx->send_stop);
1404                         mb();
1405                         mmiowb();
1406                 }
1407                 __netif_tx_unlock(dev_queue);
1408         }
1409
1410         /* start the queue if we've stopped it */
1411         if (netif_tx_queue_stopped(dev_queue)
1412             && tx->req - tx->done < (tx->mask >> 1)) {
1413                 tx->wake_queue++;
1414                 netif_tx_wake_queue(dev_queue);
1415         }
1416 }
1417
1418 static inline int
1419 myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1420 {
1421         struct myri10ge_rx_done *rx_done = &ss->rx_done;
1422         struct myri10ge_priv *mgp = ss->mgp;
1423         struct net_device *netdev = mgp->dev;
1424         unsigned long rx_bytes = 0;
1425         unsigned long rx_packets = 0;
1426         unsigned long rx_ok;
1427
1428         int idx = rx_done->idx;
1429         int cnt = rx_done->cnt;
1430         int work_done = 0;
1431         u16 length;
1432         __wsum checksum;
1433
1434         while (rx_done->entry[idx].length != 0 && work_done < budget) {
1435                 length = ntohs(rx_done->entry[idx].length);
1436                 rx_done->entry[idx].length = 0;
1437                 checksum = csum_unfold(rx_done->entry[idx].checksum);
1438                 if (length <= mgp->small_bytes)
1439                         rx_ok = myri10ge_rx_done(ss, &ss->rx_small,
1440                                                  mgp->small_bytes,
1441                                                  length, checksum);
1442                 else
1443                         rx_ok = myri10ge_rx_done(ss, &ss->rx_big,
1444                                                  mgp->big_bytes,
1445                                                  length, checksum);
1446                 rx_packets += rx_ok;
1447                 rx_bytes += rx_ok * (unsigned long)length;
1448                 cnt++;
1449                 idx = cnt & (mgp->max_intr_slots - 1);
1450                 work_done++;
1451         }
1452         rx_done->idx = idx;
1453         rx_done->cnt = cnt;
1454         ss->stats.rx_packets += rx_packets;
1455         ss->stats.rx_bytes += rx_bytes;
1456
1457         if (netdev->features & NETIF_F_LRO)
1458                 lro_flush_all(&rx_done->lro_mgr);
1459
1460         /* restock receive rings if needed */
1461         if (ss->rx_small.fill_cnt - ss->rx_small.cnt < myri10ge_fill_thresh)
1462                 myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1463                                         mgp->small_bytes + MXGEFW_PAD, 0);
1464         if (ss->rx_big.fill_cnt - ss->rx_big.cnt < myri10ge_fill_thresh)
1465                 myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1466
1467         return work_done;
1468 }
1469
1470 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1471 {
1472         struct mcp_irq_data *stats = mgp->ss[0].fw_stats;
1473
1474         if (unlikely(stats->stats_updated)) {
1475                 unsigned link_up = ntohl(stats->link_up);
1476                 if (mgp->link_state != link_up) {
1477                         mgp->link_state = link_up;
1478
1479                         if (mgp->link_state == MXGEFW_LINK_UP) {
1480                                 if (netif_msg_link(mgp))
1481                                         printk(KERN_INFO
1482                                                "myri10ge: %s: link up\n",
1483                                                mgp->dev->name);
1484                                 netif_carrier_on(mgp->dev);
1485                                 mgp->link_changes++;
1486                         } else {
1487                                 if (netif_msg_link(mgp))
1488                                         printk(KERN_INFO
1489                                                "myri10ge: %s: link %s\n",
1490                                                mgp->dev->name,
1491                                                (link_up == MXGEFW_LINK_MYRINET ?
1492                                                 "mismatch (Myrinet detected)" :
1493                                                 "down"));
1494                                 netif_carrier_off(mgp->dev);
1495                                 mgp->link_changes++;
1496                         }
1497                 }
1498                 if (mgp->rdma_tags_available !=
1499                     ntohl(stats->rdma_tags_available)) {
1500                         mgp->rdma_tags_available =
1501                             ntohl(stats->rdma_tags_available);
1502                         printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1503                                "%d tags left\n", mgp->dev->name,
1504                                mgp->rdma_tags_available);
1505                 }
1506                 mgp->down_cnt += stats->link_down;
1507                 if (stats->link_down)
1508                         wake_up(&mgp->down_wq);
1509         }
1510 }
1511
1512 static int myri10ge_poll(struct napi_struct *napi, int budget)
1513 {
1514         struct myri10ge_slice_state *ss =
1515             container_of(napi, struct myri10ge_slice_state, napi);
1516         int work_done;
1517
1518 #ifdef CONFIG_MYRI10GE_DCA
1519         if (ss->mgp->dca_enabled)
1520                 myri10ge_update_dca(ss);
1521 #endif
1522
1523         /* process as many rx events as NAPI will allow */
1524         work_done = myri10ge_clean_rx_done(ss, budget);
1525
1526         if (work_done < budget) {
1527                 napi_complete(napi);
1528                 put_be32(htonl(3), ss->irq_claim);
1529         }
1530         return work_done;
1531 }
1532
1533 static irqreturn_t myri10ge_intr(int irq, void *arg)
1534 {
1535         struct myri10ge_slice_state *ss = arg;
1536         struct myri10ge_priv *mgp = ss->mgp;
1537         struct mcp_irq_data *stats = ss->fw_stats;
1538         struct myri10ge_tx_buf *tx = &ss->tx;
1539         u32 send_done_count;
1540         int i;
1541
1542         /* an interrupt on a non-zero receive-only slice is implicitly
1543          * valid  since MSI-X irqs are not shared */
1544         if ((mgp->dev->real_num_tx_queues == 1) && (ss != mgp->ss)) {
1545                 napi_schedule(&ss->napi);
1546                 return (IRQ_HANDLED);
1547         }
1548
1549         /* make sure it is our IRQ, and that the DMA has finished */
1550         if (unlikely(!stats->valid))
1551                 return (IRQ_NONE);
1552
1553         /* low bit indicates receives are present, so schedule
1554          * napi poll handler */
1555         if (stats->valid & 1)
1556                 napi_schedule(&ss->napi);
1557
1558         if (!mgp->msi_enabled && !mgp->msix_enabled) {
1559                 put_be32(0, mgp->irq_deassert);
1560                 if (!myri10ge_deassert_wait)
1561                         stats->valid = 0;
1562                 mb();
1563         } else
1564                 stats->valid = 0;
1565
1566         /* Wait for IRQ line to go low, if using INTx */
1567         i = 0;
1568         while (1) {
1569                 i++;
1570                 /* check for transmit completes and receives */
1571                 send_done_count = ntohl(stats->send_done_count);
1572                 if (send_done_count != tx->pkt_done)
1573                         myri10ge_tx_done(ss, (int)send_done_count);
1574                 if (unlikely(i > myri10ge_max_irq_loops)) {
1575                         printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1576                                mgp->dev->name);
1577                         stats->valid = 0;
1578                         schedule_work(&mgp->watchdog_work);
1579                 }
1580                 if (likely(stats->valid == 0))
1581                         break;
1582                 cpu_relax();
1583                 barrier();
1584         }
1585
1586         /* Only slice 0 updates stats */
1587         if (ss == mgp->ss)
1588                 myri10ge_check_statblock(mgp);
1589
1590         put_be32(htonl(3), ss->irq_claim + 1);
1591         return (IRQ_HANDLED);
1592 }
1593
1594 static int
1595 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1596 {
1597         struct myri10ge_priv *mgp = netdev_priv(netdev);
1598         char *ptr;
1599         int i;
1600
1601         cmd->autoneg = AUTONEG_DISABLE;
1602         cmd->speed = SPEED_10000;
1603         cmd->duplex = DUPLEX_FULL;
1604
1605         /*
1606          * parse the product code to deterimine the interface type
1607          * (CX4, XFP, Quad Ribbon Fiber) by looking at the character
1608          * after the 3rd dash in the driver's cached copy of the
1609          * EEPROM's product code string.
1610          */
1611         ptr = mgp->product_code_string;
1612         if (ptr == NULL) {
1613                 printk(KERN_ERR "myri10ge: %s: Missing product code\n",
1614                        netdev->name);
1615                 return 0;
1616         }
1617         for (i = 0; i < 3; i++, ptr++) {
1618                 ptr = strchr(ptr, '-');
1619                 if (ptr == NULL) {
1620                         printk(KERN_ERR "myri10ge: %s: Invalid product "
1621                                "code %s\n", netdev->name,
1622                                mgp->product_code_string);
1623                         return 0;
1624                 }
1625         }
1626         if (*ptr == 'R' || *ptr == 'Q') {
1627                 /* We've found either an XFP or quad ribbon fiber */
1628                 cmd->port = PORT_FIBRE;
1629         }
1630         return 0;
1631 }
1632
1633 static void
1634 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1635 {
1636         struct myri10ge_priv *mgp = netdev_priv(netdev);
1637
1638         strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1639         strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1640         strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1641         strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1642 }
1643
1644 static int
1645 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1646 {
1647         struct myri10ge_priv *mgp = netdev_priv(netdev);
1648
1649         coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1650         return 0;
1651 }
1652
1653 static int
1654 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1655 {
1656         struct myri10ge_priv *mgp = netdev_priv(netdev);
1657
1658         mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1659         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1660         return 0;
1661 }
1662
1663 static void
1664 myri10ge_get_pauseparam(struct net_device *netdev,
1665                         struct ethtool_pauseparam *pause)
1666 {
1667         struct myri10ge_priv *mgp = netdev_priv(netdev);
1668
1669         pause->autoneg = 0;
1670         pause->rx_pause = mgp->pause;
1671         pause->tx_pause = mgp->pause;
1672 }
1673
1674 static int
1675 myri10ge_set_pauseparam(struct net_device *netdev,
1676                         struct ethtool_pauseparam *pause)
1677 {
1678         struct myri10ge_priv *mgp = netdev_priv(netdev);
1679
1680         if (pause->tx_pause != mgp->pause)
1681                 return myri10ge_change_pause(mgp, pause->tx_pause);
1682         if (pause->rx_pause != mgp->pause)
1683                 return myri10ge_change_pause(mgp, pause->tx_pause);
1684         if (pause->autoneg != 0)
1685                 return -EINVAL;
1686         return 0;
1687 }
1688
1689 static void
1690 myri10ge_get_ringparam(struct net_device *netdev,
1691                        struct ethtool_ringparam *ring)
1692 {
1693         struct myri10ge_priv *mgp = netdev_priv(netdev);
1694
1695         ring->rx_mini_max_pending = mgp->ss[0].rx_small.mask + 1;
1696         ring->rx_max_pending = mgp->ss[0].rx_big.mask + 1;
1697         ring->rx_jumbo_max_pending = 0;
1698         ring->tx_max_pending = mgp->ss[0].tx.mask + 1;
1699         ring->rx_mini_pending = ring->rx_mini_max_pending;
1700         ring->rx_pending = ring->rx_max_pending;
1701         ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1702         ring->tx_pending = ring->tx_max_pending;
1703 }
1704
1705 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1706 {
1707         struct myri10ge_priv *mgp = netdev_priv(netdev);
1708
1709         if (mgp->csum_flag)
1710                 return 1;
1711         else
1712                 return 0;
1713 }
1714
1715 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1716 {
1717         struct myri10ge_priv *mgp = netdev_priv(netdev);
1718         int err = 0;
1719
1720         if (csum_enabled)
1721                 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1722         else {
1723                 u32 flags = ethtool_op_get_flags(netdev);
1724                 err = ethtool_op_set_flags(netdev, (flags & ~ETH_FLAG_LRO));
1725                 mgp->csum_flag = 0;
1726
1727         }
1728         return err;
1729 }
1730
1731 static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1732 {
1733         struct myri10ge_priv *mgp = netdev_priv(netdev);
1734         unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1735
1736         if (tso_enabled)
1737                 netdev->features |= flags;
1738         else
1739                 netdev->features &= ~flags;
1740         return 0;
1741 }
1742
1743 static const char myri10ge_gstrings_main_stats[][ETH_GSTRING_LEN] = {
1744         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1745         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1746         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1747         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1748         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1749         "tx_heartbeat_errors", "tx_window_errors",
1750         /* device-specific stats */
1751         "tx_boundary", "WC", "irq", "MSI", "MSIX",
1752         "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1753         "serial_number", "watchdog_resets",
1754 #ifdef CONFIG_MYRI10GE_DCA
1755         "dca_capable_firmware", "dca_device_present",
1756 #endif
1757         "link_changes", "link_up", "dropped_link_overflow",
1758         "dropped_link_error_or_filtered",
1759         "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1760         "dropped_unicast_filtered", "dropped_multicast_filtered",
1761         "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1762         "dropped_no_big_buffer"
1763 };
1764
1765 static const char myri10ge_gstrings_slice_stats[][ETH_GSTRING_LEN] = {
1766         "----------- slice ---------",
1767         "tx_pkt_start", "tx_pkt_done", "tx_req", "tx_done",
1768         "rx_small_cnt", "rx_big_cnt",
1769         "wake_queue", "stop_queue", "tx_linearized", "LRO aggregated",
1770             "LRO flushed",
1771         "LRO avg aggr", "LRO no_desc"
1772 };
1773
1774 #define MYRI10GE_NET_STATS_LEN      21
1775 #define MYRI10GE_MAIN_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_main_stats)
1776 #define MYRI10GE_SLICE_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_slice_stats)
1777
1778 static void
1779 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1780 {
1781         struct myri10ge_priv *mgp = netdev_priv(netdev);
1782         int i;
1783
1784         switch (stringset) {
1785         case ETH_SS_STATS:
1786                 memcpy(data, *myri10ge_gstrings_main_stats,
1787                        sizeof(myri10ge_gstrings_main_stats));
1788                 data += sizeof(myri10ge_gstrings_main_stats);
1789                 for (i = 0; i < mgp->num_slices; i++) {
1790                         memcpy(data, *myri10ge_gstrings_slice_stats,
1791                                sizeof(myri10ge_gstrings_slice_stats));
1792                         data += sizeof(myri10ge_gstrings_slice_stats);
1793                 }
1794                 break;
1795         }
1796 }
1797
1798 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1799 {
1800         struct myri10ge_priv *mgp = netdev_priv(netdev);
1801
1802         switch (sset) {
1803         case ETH_SS_STATS:
1804                 return MYRI10GE_MAIN_STATS_LEN +
1805                     mgp->num_slices * MYRI10GE_SLICE_STATS_LEN;
1806         default:
1807                 return -EOPNOTSUPP;
1808         }
1809 }
1810
1811 static void
1812 myri10ge_get_ethtool_stats(struct net_device *netdev,
1813                            struct ethtool_stats *stats, u64 * data)
1814 {
1815         struct myri10ge_priv *mgp = netdev_priv(netdev);
1816         struct myri10ge_slice_state *ss;
1817         int slice;
1818         int i;
1819
1820         /* force stats update */
1821         (void)myri10ge_get_stats(netdev);
1822         for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1823                 data[i] = ((unsigned long *)&netdev->stats)[i];
1824
1825         data[i++] = (unsigned int)mgp->tx_boundary;
1826         data[i++] = (unsigned int)mgp->wc_enabled;
1827         data[i++] = (unsigned int)mgp->pdev->irq;
1828         data[i++] = (unsigned int)mgp->msi_enabled;
1829         data[i++] = (unsigned int)mgp->msix_enabled;
1830         data[i++] = (unsigned int)mgp->read_dma;
1831         data[i++] = (unsigned int)mgp->write_dma;
1832         data[i++] = (unsigned int)mgp->read_write_dma;
1833         data[i++] = (unsigned int)mgp->serial_number;
1834         data[i++] = (unsigned int)mgp->watchdog_resets;
1835 #ifdef CONFIG_MYRI10GE_DCA
1836         data[i++] = (unsigned int)(mgp->ss[0].dca_tag != NULL);
1837         data[i++] = (unsigned int)(mgp->dca_enabled);
1838 #endif
1839         data[i++] = (unsigned int)mgp->link_changes;
1840
1841         /* firmware stats are useful only in the first slice */
1842         ss = &mgp->ss[0];
1843         data[i++] = (unsigned int)ntohl(ss->fw_stats->link_up);
1844         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_link_overflow);
1845         data[i++] =
1846             (unsigned int)ntohl(ss->fw_stats->dropped_link_error_or_filtered);
1847         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_pause);
1848         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_phy);
1849         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_crc32);
1850         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_unicast_filtered);
1851         data[i++] =
1852             (unsigned int)ntohl(ss->fw_stats->dropped_multicast_filtered);
1853         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_runt);
1854         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_overrun);
1855         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_small_buffer);
1856         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_big_buffer);
1857
1858         for (slice = 0; slice < mgp->num_slices; slice++) {
1859                 ss = &mgp->ss[slice];
1860                 data[i++] = slice;
1861                 data[i++] = (unsigned int)ss->tx.pkt_start;
1862                 data[i++] = (unsigned int)ss->tx.pkt_done;
1863                 data[i++] = (unsigned int)ss->tx.req;
1864                 data[i++] = (unsigned int)ss->tx.done;
1865                 data[i++] = (unsigned int)ss->rx_small.cnt;
1866                 data[i++] = (unsigned int)ss->rx_big.cnt;
1867                 data[i++] = (unsigned int)ss->tx.wake_queue;
1868                 data[i++] = (unsigned int)ss->tx.stop_queue;
1869                 data[i++] = (unsigned int)ss->tx.linearized;
1870                 data[i++] = ss->rx_done.lro_mgr.stats.aggregated;
1871                 data[i++] = ss->rx_done.lro_mgr.stats.flushed;
1872                 if (ss->rx_done.lro_mgr.stats.flushed)
1873                         data[i++] = ss->rx_done.lro_mgr.stats.aggregated /
1874                             ss->rx_done.lro_mgr.stats.flushed;
1875                 else
1876                         data[i++] = 0;
1877                 data[i++] = ss->rx_done.lro_mgr.stats.no_desc;
1878         }
1879 }
1880
1881 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1882 {
1883         struct myri10ge_priv *mgp = netdev_priv(netdev);
1884         mgp->msg_enable = value;
1885 }
1886
1887 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1888 {
1889         struct myri10ge_priv *mgp = netdev_priv(netdev);
1890         return mgp->msg_enable;
1891 }
1892
1893 static const struct ethtool_ops myri10ge_ethtool_ops = {
1894         .get_settings = myri10ge_get_settings,
1895         .get_drvinfo = myri10ge_get_drvinfo,
1896         .get_coalesce = myri10ge_get_coalesce,
1897         .set_coalesce = myri10ge_set_coalesce,
1898         .get_pauseparam = myri10ge_get_pauseparam,
1899         .set_pauseparam = myri10ge_set_pauseparam,
1900         .get_ringparam = myri10ge_get_ringparam,
1901         .get_rx_csum = myri10ge_get_rx_csum,
1902         .set_rx_csum = myri10ge_set_rx_csum,
1903         .set_tx_csum = ethtool_op_set_tx_hw_csum,
1904         .set_sg = ethtool_op_set_sg,
1905         .set_tso = myri10ge_set_tso,
1906         .get_link = ethtool_op_get_link,
1907         .get_strings = myri10ge_get_strings,
1908         .get_sset_count = myri10ge_get_sset_count,
1909         .get_ethtool_stats = myri10ge_get_ethtool_stats,
1910         .set_msglevel = myri10ge_set_msglevel,
1911         .get_msglevel = myri10ge_get_msglevel,
1912         .get_flags = ethtool_op_get_flags,
1913         .set_flags = ethtool_op_set_flags
1914 };
1915
1916 static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss)
1917 {
1918         struct myri10ge_priv *mgp = ss->mgp;
1919         struct myri10ge_cmd cmd;
1920         struct net_device *dev = mgp->dev;
1921         int tx_ring_size, rx_ring_size;
1922         int tx_ring_entries, rx_ring_entries;
1923         int i, slice, status;
1924         size_t bytes;
1925
1926         /* get ring sizes */
1927         slice = ss - mgp->ss;
1928         cmd.data0 = slice;
1929         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1930         tx_ring_size = cmd.data0;
1931         cmd.data0 = slice;
1932         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1933         if (status != 0)
1934                 return status;
1935         rx_ring_size = cmd.data0;
1936
1937         tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1938         rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1939         ss->tx.mask = tx_ring_entries - 1;
1940         ss->rx_small.mask = ss->rx_big.mask = rx_ring_entries - 1;
1941
1942         status = -ENOMEM;
1943
1944         /* allocate the host shadow rings */
1945
1946         bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1947             * sizeof(*ss->tx.req_list);
1948         ss->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1949         if (ss->tx.req_bytes == NULL)
1950                 goto abort_with_nothing;
1951
1952         /* ensure req_list entries are aligned to 8 bytes */
1953         ss->tx.req_list = (struct mcp_kreq_ether_send *)
1954             ALIGN((unsigned long)ss->tx.req_bytes, 8);
1955         ss->tx.queue_active = 0;
1956
1957         bytes = rx_ring_entries * sizeof(*ss->rx_small.shadow);
1958         ss->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1959         if (ss->rx_small.shadow == NULL)
1960                 goto abort_with_tx_req_bytes;
1961
1962         bytes = rx_ring_entries * sizeof(*ss->rx_big.shadow);
1963         ss->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1964         if (ss->rx_big.shadow == NULL)
1965                 goto abort_with_rx_small_shadow;
1966
1967         /* allocate the host info rings */
1968
1969         bytes = tx_ring_entries * sizeof(*ss->tx.info);
1970         ss->tx.info = kzalloc(bytes, GFP_KERNEL);
1971         if (ss->tx.info == NULL)
1972                 goto abort_with_rx_big_shadow;
1973
1974         bytes = rx_ring_entries * sizeof(*ss->rx_small.info);
1975         ss->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1976         if (ss->rx_small.info == NULL)
1977                 goto abort_with_tx_info;
1978
1979         bytes = rx_ring_entries * sizeof(*ss->rx_big.info);
1980         ss->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1981         if (ss->rx_big.info == NULL)
1982                 goto abort_with_rx_small_info;
1983
1984         /* Fill the receive rings */
1985         ss->rx_big.cnt = 0;
1986         ss->rx_small.cnt = 0;
1987         ss->rx_big.fill_cnt = 0;
1988         ss->rx_small.fill_cnt = 0;
1989         ss->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1990         ss->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1991         ss->rx_small.watchdog_needed = 0;
1992         ss->rx_big.watchdog_needed = 0;
1993         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1994                                 mgp->small_bytes + MXGEFW_PAD, 0);
1995
1996         if (ss->rx_small.fill_cnt < ss->rx_small.mask + 1) {
1997                 printk(KERN_ERR
1998                        "myri10ge: %s:slice-%d: alloced only %d small bufs\n",
1999                        dev->name, slice, ss->rx_small.fill_cnt);
2000                 goto abort_with_rx_small_ring;
2001         }
2002
2003         myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
2004         if (ss->rx_big.fill_cnt < ss->rx_big.mask + 1) {
2005                 printk(KERN_ERR
2006                        "myri10ge: %s:slice-%d: alloced only %d big bufs\n",
2007                        dev->name, slice, ss->rx_big.fill_cnt);
2008                 goto abort_with_rx_big_ring;
2009         }
2010
2011         return 0;
2012
2013 abort_with_rx_big_ring:
2014         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
2015                 int idx = i & ss->rx_big.mask;
2016                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
2017                                        mgp->big_bytes);
2018                 put_page(ss->rx_big.info[idx].page);
2019         }
2020
2021 abort_with_rx_small_ring:
2022         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
2023                 int idx = i & ss->rx_small.mask;
2024                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
2025                                        mgp->small_bytes + MXGEFW_PAD);
2026                 put_page(ss->rx_small.info[idx].page);
2027         }
2028
2029         kfree(ss->rx_big.info);
2030
2031 abort_with_rx_small_info:
2032         kfree(ss->rx_small.info);
2033
2034 abort_with_tx_info:
2035         kfree(ss->tx.info);
2036
2037 abort_with_rx_big_shadow:
2038         kfree(ss->rx_big.shadow);
2039
2040 abort_with_rx_small_shadow:
2041         kfree(ss->rx_small.shadow);
2042
2043 abort_with_tx_req_bytes:
2044         kfree(ss->tx.req_bytes);
2045         ss->tx.req_bytes = NULL;
2046         ss->tx.req_list = NULL;
2047
2048 abort_with_nothing:
2049         return status;
2050 }
2051
2052 static void myri10ge_free_rings(struct myri10ge_slice_state *ss)
2053 {
2054         struct myri10ge_priv *mgp = ss->mgp;
2055         struct sk_buff *skb;
2056         struct myri10ge_tx_buf *tx;
2057         int i, len, idx;
2058
2059         /* If not allocated, skip it */
2060         if (ss->tx.req_list == NULL)
2061                 return;
2062
2063         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
2064                 idx = i & ss->rx_big.mask;
2065                 if (i == ss->rx_big.fill_cnt - 1)
2066                         ss->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
2067                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
2068                                        mgp->big_bytes);
2069                 put_page(ss->rx_big.info[idx].page);
2070         }
2071
2072         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
2073                 idx = i & ss->rx_small.mask;
2074                 if (i == ss->rx_small.fill_cnt - 1)
2075                         ss->rx_small.info[idx].page_offset =
2076                             MYRI10GE_ALLOC_SIZE;
2077                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
2078                                        mgp->small_bytes + MXGEFW_PAD);
2079                 put_page(ss->rx_small.info[idx].page);
2080         }
2081         tx = &ss->tx;
2082         while (tx->done != tx->req) {
2083                 idx = tx->done & tx->mask;
2084                 skb = tx->info[idx].skb;
2085
2086                 /* Mark as free */
2087                 tx->info[idx].skb = NULL;
2088                 tx->done++;
2089                 len = pci_unmap_len(&tx->info[idx], len);
2090                 pci_unmap_len_set(&tx->info[idx], len, 0);
2091                 if (skb) {
2092                         ss->stats.tx_dropped++;
2093                         dev_kfree_skb_any(skb);
2094                         if (len)
2095                                 pci_unmap_single(mgp->pdev,
2096                                                  pci_unmap_addr(&tx->info[idx],
2097                                                                 bus), len,
2098                                                  PCI_DMA_TODEVICE);
2099                 } else {
2100                         if (len)
2101                                 pci_unmap_page(mgp->pdev,
2102                                                pci_unmap_addr(&tx->info[idx],
2103                                                               bus), len,
2104                                                PCI_DMA_TODEVICE);
2105                 }
2106         }
2107         kfree(ss->rx_big.info);
2108
2109         kfree(ss->rx_small.info);
2110
2111         kfree(ss->tx.info);
2112
2113         kfree(ss->rx_big.shadow);
2114
2115         kfree(ss->rx_small.shadow);
2116
2117         kfree(ss->tx.req_bytes);
2118         ss->tx.req_bytes = NULL;
2119         ss->tx.req_list = NULL;
2120 }
2121
2122 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
2123 {
2124         struct pci_dev *pdev = mgp->pdev;
2125         struct myri10ge_slice_state *ss;
2126         struct net_device *netdev = mgp->dev;
2127         int i;
2128         int status;
2129
2130         mgp->msi_enabled = 0;
2131         mgp->msix_enabled = 0;
2132         status = 0;
2133         if (myri10ge_msi) {
2134                 if (mgp->num_slices > 1) {
2135                         status =
2136                             pci_enable_msix(pdev, mgp->msix_vectors,
2137                                             mgp->num_slices);
2138                         if (status == 0) {
2139                                 mgp->msix_enabled = 1;
2140                         } else {
2141                                 dev_err(&pdev->dev,
2142                                         "Error %d setting up MSI-X\n", status);
2143                                 return status;
2144                         }
2145                 }
2146                 if (mgp->msix_enabled == 0) {
2147                         status = pci_enable_msi(pdev);
2148                         if (status != 0) {
2149                                 dev_err(&pdev->dev,
2150                                         "Error %d setting up MSI; falling back to xPIC\n",
2151                                         status);
2152                         } else {
2153                                 mgp->msi_enabled = 1;
2154                         }
2155                 }
2156         }
2157         if (mgp->msix_enabled) {
2158                 for (i = 0; i < mgp->num_slices; i++) {
2159                         ss = &mgp->ss[i];
2160                         snprintf(ss->irq_desc, sizeof(ss->irq_desc),
2161                                  "%s:slice-%d", netdev->name, i);
2162                         status = request_irq(mgp->msix_vectors[i].vector,
2163                                              myri10ge_intr, 0, ss->irq_desc,
2164                                              ss);
2165                         if (status != 0) {
2166                                 dev_err(&pdev->dev,
2167                                         "slice %d failed to allocate IRQ\n", i);
2168                                 i--;
2169                                 while (i >= 0) {
2170                                         free_irq(mgp->msix_vectors[i].vector,
2171                                                  &mgp->ss[i]);
2172                                         i--;
2173                                 }
2174                                 pci_disable_msix(pdev);
2175                                 return status;
2176                         }
2177                 }
2178         } else {
2179                 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
2180                                      mgp->dev->name, &mgp->ss[0]);
2181                 if (status != 0) {
2182                         dev_err(&pdev->dev, "failed to allocate IRQ\n");
2183                         if (mgp->msi_enabled)
2184                                 pci_disable_msi(pdev);
2185                 }
2186         }
2187         return status;
2188 }
2189
2190 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
2191 {
2192         struct pci_dev *pdev = mgp->pdev;
2193         int i;
2194
2195         if (mgp->msix_enabled) {
2196                 for (i = 0; i < mgp->num_slices; i++)
2197                         free_irq(mgp->msix_vectors[i].vector, &mgp->ss[i]);
2198         } else {
2199                 free_irq(pdev->irq, &mgp->ss[0]);
2200         }
2201         if (mgp->msi_enabled)
2202                 pci_disable_msi(pdev);
2203         if (mgp->msix_enabled)
2204                 pci_disable_msix(pdev);
2205 }
2206
2207 static int
2208 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
2209                          void **ip_hdr, void **tcpudp_hdr,
2210                          u64 * hdr_flags, void *priv)
2211 {
2212         struct ethhdr *eh;
2213         struct vlan_ethhdr *veh;
2214         struct iphdr *iph;
2215         u8 *va = page_address(frag->page) + frag->page_offset;
2216         unsigned long ll_hlen;
2217         /* passed opaque through lro_receive_frags() */
2218         __wsum csum = (__force __wsum) (unsigned long)priv;
2219
2220         /* find the mac header, aborting if not IPv4 */
2221
2222         eh = (struct ethhdr *)va;
2223         *mac_hdr = eh;
2224         ll_hlen = ETH_HLEN;
2225         if (eh->h_proto != htons(ETH_P_IP)) {
2226                 if (eh->h_proto == htons(ETH_P_8021Q)) {
2227                         veh = (struct vlan_ethhdr *)va;
2228                         if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
2229                                 return -1;
2230
2231                         ll_hlen += VLAN_HLEN;
2232
2233                         /*
2234                          *  HW checksum starts ETH_HLEN bytes into
2235                          *  frame, so we must subtract off the VLAN
2236                          *  header's checksum before csum can be used
2237                          */
2238                         csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
2239                                                            VLAN_HLEN, 0));
2240                 } else {
2241                         return -1;
2242                 }
2243         }
2244         *hdr_flags = LRO_IPV4;
2245
2246         iph = (struct iphdr *)(va + ll_hlen);
2247         *ip_hdr = iph;
2248         if (iph->protocol != IPPROTO_TCP)
2249                 return -1;
2250         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
2251                 return -1;
2252         *hdr_flags |= LRO_TCP;
2253         *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
2254
2255         /* verify the IP checksum */
2256         if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
2257                 return -1;
2258
2259         /* verify the  checksum */
2260         if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
2261                                        ntohs(iph->tot_len) - (iph->ihl << 2),
2262                                        IPPROTO_TCP, csum)))
2263                 return -1;
2264
2265         return 0;
2266 }
2267
2268 static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice)
2269 {
2270         struct myri10ge_cmd cmd;
2271         struct myri10ge_slice_state *ss;
2272         int status;
2273
2274         ss = &mgp->ss[slice];
2275         status = 0;
2276         if (slice == 0 || (mgp->dev->real_num_tx_queues > 1)) {
2277                 cmd.data0 = slice;
2278                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET,
2279                                            &cmd, 0);
2280                 ss->tx.lanai = (struct mcp_kreq_ether_send __iomem *)
2281                     (mgp->sram + cmd.data0);
2282         }
2283         cmd.data0 = slice;
2284         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET,
2285                                     &cmd, 0);
2286         ss->rx_small.lanai = (struct mcp_kreq_ether_recv __iomem *)
2287             (mgp->sram + cmd.data0);
2288
2289         cmd.data0 = slice;
2290         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
2291         ss->rx_big.lanai = (struct mcp_kreq_ether_recv __iomem *)
2292             (mgp->sram + cmd.data0);
2293
2294         ss->tx.send_go = (__iomem __be32 *)
2295             (mgp->sram + MXGEFW_ETH_SEND_GO + 64 * slice);
2296         ss->tx.send_stop = (__iomem __be32 *)
2297             (mgp->sram + MXGEFW_ETH_SEND_STOP + 64 * slice);
2298         return status;
2299
2300 }
2301
2302 static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice)
2303 {
2304         struct myri10ge_cmd cmd;
2305         struct myri10ge_slice_state *ss;
2306         int status;
2307
2308         ss = &mgp->ss[slice];
2309         cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->fw_stats_bus);
2310         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->fw_stats_bus);
2311         cmd.data2 = sizeof(struct mcp_irq_data) | (slice << 16);
2312         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
2313         if (status == -ENOSYS) {
2314                 dma_addr_t bus = ss->fw_stats_bus;
2315                 if (slice != 0)
2316                         return -EINVAL;
2317                 bus += offsetof(struct mcp_irq_data, send_done_count);
2318                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
2319                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
2320                 status = myri10ge_send_cmd(mgp,
2321                                            MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
2322                                            &cmd, 0);
2323                 /* Firmware cannot support multicast without STATS_DMA_V2 */
2324                 mgp->fw_multicast_support = 0;
2325         } else {
2326                 mgp->fw_multicast_support = 1;
2327         }
2328         return 0;
2329 }
2330
2331 static int myri10ge_open(struct net_device *dev)
2332 {
2333         struct myri10ge_slice_state *ss;
2334         struct myri10ge_priv *mgp = netdev_priv(dev);
2335         struct myri10ge_cmd cmd;
2336         int i, status, big_pow2, slice;
2337         u8 *itable;
2338         struct net_lro_mgr *lro_mgr;
2339
2340         if (mgp->running != MYRI10GE_ETH_STOPPED)
2341                 return -EBUSY;
2342
2343         mgp->running = MYRI10GE_ETH_STARTING;
2344         status = myri10ge_reset(mgp);
2345         if (status != 0) {
2346                 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
2347                 goto abort_with_nothing;
2348         }
2349
2350         if (mgp->num_slices > 1) {
2351                 cmd.data0 = mgp->num_slices;
2352                 cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
2353                 if (mgp->dev->real_num_tx_queues > 1)
2354                         cmd.data1 |= MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES;
2355                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
2356                                            &cmd, 0);
2357                 if (status != 0) {
2358                         printk(KERN_ERR
2359                                "myri10ge: %s: failed to set number of slices\n",
2360                                dev->name);
2361                         goto abort_with_nothing;
2362                 }
2363                 /* setup the indirection table */
2364                 cmd.data0 = mgp->num_slices;
2365                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_TABLE_SIZE,
2366                                            &cmd, 0);
2367
2368                 status |= myri10ge_send_cmd(mgp,
2369                                             MXGEFW_CMD_GET_RSS_TABLE_OFFSET,
2370                                             &cmd, 0);
2371                 if (status != 0) {
2372                         printk(KERN_ERR
2373                                "myri10ge: %s: failed to setup rss tables\n",
2374                                dev->name);
2375                         goto abort_with_nothing;
2376                 }
2377
2378                 /* just enable an identity mapping */
2379                 itable = mgp->sram + cmd.data0;
2380                 for (i = 0; i < mgp->num_slices; i++)
2381                         __raw_writeb(i, &itable[i]);
2382
2383                 cmd.data0 = 1;
2384                 cmd.data1 = myri10ge_rss_hash;
2385                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_ENABLE,
2386                                            &cmd, 0);
2387                 if (status != 0) {
2388                         printk(KERN_ERR
2389                                "myri10ge: %s: failed to enable slices\n",
2390                                dev->name);
2391                         goto abort_with_nothing;
2392                 }
2393         }
2394
2395         status = myri10ge_request_irq(mgp);
2396         if (status != 0)
2397                 goto abort_with_nothing;
2398
2399         /* decide what small buffer size to use.  For good TCP rx
2400          * performance, it is important to not receive 1514 byte
2401          * frames into jumbo buffers, as it confuses the socket buffer
2402          * accounting code, leading to drops and erratic performance.
2403          */
2404
2405         if (dev->mtu <= ETH_DATA_LEN)
2406                 /* enough for a TCP header */
2407                 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
2408                     ? (128 - MXGEFW_PAD)
2409                     : (SMP_CACHE_BYTES - MXGEFW_PAD);
2410         else
2411                 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
2412                 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
2413
2414         /* Override the small buffer size? */
2415         if (myri10ge_small_bytes > 0)
2416                 mgp->small_bytes = myri10ge_small_bytes;
2417
2418         /* Firmware needs the big buff size as a power of 2.  Lie and
2419          * tell him the buffer is larger, because we only use 1
2420          * buffer/pkt, and the mtu will prevent overruns.
2421          */
2422         big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2423         if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
2424                 while (!is_power_of_2(big_pow2))
2425                         big_pow2++;
2426                 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2427         } else {
2428                 big_pow2 = MYRI10GE_ALLOC_SIZE;
2429                 mgp->big_bytes = big_pow2;
2430         }
2431
2432         /* setup the per-slice data structures */
2433         for (slice = 0; slice < mgp->num_slices; slice++) {
2434                 ss = &mgp->ss[slice];
2435
2436                 status = myri10ge_get_txrx(mgp, slice);
2437                 if (status != 0) {
2438                         printk(KERN_ERR
2439                                "myri10ge: %s: failed to get ring sizes or locations\n",
2440                                dev->name);
2441                         goto abort_with_rings;
2442                 }
2443                 status = myri10ge_allocate_rings(ss);
2444                 if (status != 0)
2445                         goto abort_with_rings;
2446
2447                 /* only firmware which supports multiple TX queues
2448                  * supports setting up the tx stats on non-zero
2449                  * slices */
2450                 if (slice == 0 || mgp->dev->real_num_tx_queues > 1)
2451                         status = myri10ge_set_stats(mgp, slice);
2452                 if (status) {
2453                         printk(KERN_ERR
2454                                "myri10ge: %s: Couldn't set stats DMA\n",
2455                                dev->name);
2456                         goto abort_with_rings;
2457                 }
2458
2459                 lro_mgr = &ss->rx_done.lro_mgr;
2460                 lro_mgr->dev = dev;
2461                 lro_mgr->features = LRO_F_NAPI;
2462                 lro_mgr->ip_summed = CHECKSUM_COMPLETE;
2463                 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
2464                 lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
2465                 lro_mgr->lro_arr = ss->rx_done.lro_desc;
2466                 lro_mgr->get_frag_header = myri10ge_get_frag_header;
2467                 lro_mgr->max_aggr = myri10ge_lro_max_pkts;
2468                 lro_mgr->frag_align_pad = 2;
2469                 if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
2470                         lro_mgr->max_aggr = MAX_SKB_FRAGS;
2471
2472                 /* must happen prior to any irq */
2473                 napi_enable(&(ss)->napi);
2474         }
2475
2476         /* now give firmware buffers sizes, and MTU */
2477         cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
2478         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
2479         cmd.data0 = mgp->small_bytes;
2480         status |=
2481             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
2482         cmd.data0 = big_pow2;
2483         status |=
2484             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
2485         if (status) {
2486                 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
2487                        dev->name);
2488                 goto abort_with_rings;
2489         }
2490
2491         /*
2492          * Set Linux style TSO mode; this is needed only on newer
2493          *  firmware versions.  Older versions default to Linux
2494          *  style TSO
2495          */
2496         cmd.data0 = 0;
2497         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_TSO_MODE, &cmd, 0);
2498         if (status && status != -ENOSYS) {
2499                 printk(KERN_ERR "myri10ge: %s: Couldn't set TSO mode\n",
2500                        dev->name);
2501                 goto abort_with_rings;
2502         }
2503
2504         mgp->link_state = ~0U;
2505         mgp->rdma_tags_available = 15;
2506
2507         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
2508         if (status) {
2509                 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
2510                        dev->name);
2511                 goto abort_with_rings;
2512         }
2513
2514         mgp->running = MYRI10GE_ETH_RUNNING;
2515         mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
2516         add_timer(&mgp->watchdog_timer);
2517         netif_tx_wake_all_queues(dev);
2518
2519         return 0;
2520
2521 abort_with_rings:
2522         while (slice) {
2523                 slice--;
2524                 napi_disable(&mgp->ss[slice].napi);
2525         }
2526         for (i = 0; i < mgp->num_slices; i++)
2527                 myri10ge_free_rings(&mgp->ss[i]);
2528
2529         myri10ge_free_irq(mgp);
2530
2531 abort_with_nothing:
2532         mgp->running = MYRI10GE_ETH_STOPPED;
2533         return -ENOMEM;
2534 }
2535
2536 static int myri10ge_close(struct net_device *dev)
2537 {
2538         struct myri10ge_priv *mgp = netdev_priv(dev);
2539         struct myri10ge_cmd cmd;
2540         int status, old_down_cnt;
2541         int i;
2542
2543         if (mgp->running != MYRI10GE_ETH_RUNNING)
2544                 return 0;
2545
2546         if (mgp->ss[0].tx.req_bytes == NULL)
2547                 return 0;
2548
2549         del_timer_sync(&mgp->watchdog_timer);
2550         mgp->running = MYRI10GE_ETH_STOPPING;
2551         for (i = 0; i < mgp->num_slices; i++) {
2552                 napi_disable(&mgp->ss[i].napi);
2553         }
2554         netif_carrier_off(dev);
2555
2556         netif_tx_stop_all_queues(dev);
2557         if (mgp->rebooted == 0) {
2558                 old_down_cnt = mgp->down_cnt;
2559                 mb();
2560                 status =
2561                     myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2562                 if (status)
2563                         printk(KERN_ERR
2564                                "myri10ge: %s: Couldn't bring down link\n",
2565                                dev->name);
2566
2567                 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt,
2568                                    HZ);
2569                 if (old_down_cnt == mgp->down_cnt)
2570                         printk(KERN_ERR "myri10ge: %s never got down irq\n",
2571                                dev->name);
2572         }
2573         netif_tx_disable(dev);
2574         myri10ge_free_irq(mgp);
2575         for (i = 0; i < mgp->num_slices; i++)
2576                 myri10ge_free_rings(&mgp->ss[i]);
2577
2578         mgp->running = MYRI10GE_ETH_STOPPED;
2579         return 0;
2580 }
2581
2582 /* copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2583  * backwards one at a time and handle ring wraps */
2584
2585 static inline void
2586 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2587                               struct mcp_kreq_ether_send *src, int cnt)
2588 {
2589         int idx, starting_slot;
2590         starting_slot = tx->req;
2591         while (cnt > 1) {
2592                 cnt--;
2593                 idx = (starting_slot + cnt) & tx->mask;
2594                 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2595                 mb();
2596         }
2597 }
2598
2599 /*
2600  * copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2601  * at most 32 bytes at a time, so as to avoid involving the software
2602  * pio handler in the nic.   We re-write the first segment's flags
2603  * to mark them valid only after writing the entire chain.
2604  */
2605
2606 static inline void
2607 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2608                     int cnt)
2609 {
2610         int idx, i;
2611         struct mcp_kreq_ether_send __iomem *dstp, *dst;
2612         struct mcp_kreq_ether_send *srcp;
2613         u8 last_flags;
2614
2615         idx = tx->req & tx->mask;
2616
2617         last_flags = src->flags;
2618         src->flags = 0;
2619         mb();
2620         dst = dstp = &tx->lanai[idx];
2621         srcp = src;
2622
2623         if ((idx + cnt) < tx->mask) {
2624                 for (i = 0; i < (cnt - 1); i += 2) {
2625                         myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2626                         mb();   /* force write every 32 bytes */
2627                         srcp += 2;
2628                         dstp += 2;
2629                 }
2630         } else {
2631                 /* submit all but the first request, and ensure
2632                  * that it is submitted below */
2633                 myri10ge_submit_req_backwards(tx, src, cnt);
2634                 i = 0;
2635         }
2636         if (i < cnt) {
2637                 /* submit the first request */
2638                 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2639                 mb();           /* barrier before setting valid flag */
2640         }
2641
2642         /* re-write the last 32-bits with the valid flags */
2643         src->flags = last_flags;
2644         put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2645         tx->req += cnt;
2646         mb();
2647 }
2648
2649 /*
2650  * Transmit a packet.  We need to split the packet so that a single
2651  * segment does not cross myri10ge->tx_boundary, so this makes segment
2652  * counting tricky.  So rather than try to count segments up front, we
2653  * just give up if there are too few segments to hold a reasonably
2654  * fragmented packet currently available.  If we run
2655  * out of segments while preparing a packet for DMA, we just linearize
2656  * it and try again.
2657  */
2658
2659 static netdev_tx_t myri10ge_xmit(struct sk_buff *skb,
2660                                        struct net_device *dev)
2661 {
2662         struct myri10ge_priv *mgp = netdev_priv(dev);
2663         struct myri10ge_slice_state *ss;
2664         struct mcp_kreq_ether_send *req;
2665         struct myri10ge_tx_buf *tx;
2666         struct skb_frag_struct *frag;
2667         struct netdev_queue *netdev_queue;
2668         dma_addr_t bus;
2669         u32 low;
2670         __be32 high_swapped;
2671         unsigned int len;
2672         int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2673         u16 pseudo_hdr_offset, cksum_offset, queue;
2674         int cum_len, seglen, boundary, rdma_count;
2675         u8 flags, odd_flag;
2676
2677         queue = skb_get_queue_mapping(skb);
2678         ss = &mgp->ss[queue];
2679         netdev_queue = netdev_get_tx_queue(mgp->dev, queue);
2680         tx = &ss->tx;
2681
2682 again:
2683         req = tx->req_list;
2684         avail = tx->mask - 1 - (tx->req - tx->done);
2685
2686         mss = 0;
2687         max_segments = MXGEFW_MAX_SEND_DESC;
2688
2689         if (skb_is_gso(skb)) {
2690                 mss = skb_shinfo(skb)->gso_size;
2691                 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2692         }
2693
2694         if ((unlikely(avail < max_segments))) {
2695                 /* we are out of transmit resources */
2696                 tx->stop_queue++;
2697                 netif_tx_stop_queue(netdev_queue);
2698                 return NETDEV_TX_BUSY;
2699         }
2700
2701         /* Setup checksum offloading, if needed */
2702         cksum_offset = 0;
2703         pseudo_hdr_offset = 0;
2704         odd_flag = 0;
2705         flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2706         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2707                 cksum_offset = skb_transport_offset(skb);
2708                 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2709                 /* If the headers are excessively large, then we must
2710                  * fall back to a software checksum */
2711                 if (unlikely(!mss && (cksum_offset > 255 ||
2712                                       pseudo_hdr_offset > 127))) {
2713                         if (skb_checksum_help(skb))
2714                                 goto drop;
2715                         cksum_offset = 0;
2716                         pseudo_hdr_offset = 0;
2717                 } else {
2718                         odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2719                         flags |= MXGEFW_FLAGS_CKSUM;
2720                 }
2721         }
2722
2723         cum_len = 0;
2724
2725         if (mss) {              /* TSO */
2726                 /* this removes any CKSUM flag from before */
2727                 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2728
2729                 /* negative cum_len signifies to the
2730                  * send loop that we are still in the
2731                  * header portion of the TSO packet.
2732                  * TSO header can be at most 1KB long */
2733                 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2734
2735                 /* for IPv6 TSO, the checksum offset stores the
2736                  * TCP header length, to save the firmware from
2737                  * the need to parse the headers */
2738                 if (skb_is_gso_v6(skb)) {
2739                         cksum_offset = tcp_hdrlen(skb);
2740                         /* Can only handle headers <= max_tso6 long */
2741                         if (unlikely(-cum_len > mgp->max_tso6))
2742                                 return myri10ge_sw_tso(skb, dev);
2743                 }
2744                 /* for TSO, pseudo_hdr_offset holds mss.
2745                  * The firmware figures out where to put
2746                  * the checksum by parsing the header. */
2747                 pseudo_hdr_offset = mss;
2748         } else
2749                 /* Mark small packets, and pad out tiny packets */
2750         if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2751                 flags |= MXGEFW_FLAGS_SMALL;
2752
2753                 /* pad frames to at least ETH_ZLEN bytes */
2754                 if (unlikely(skb->len < ETH_ZLEN)) {
2755                         if (skb_padto(skb, ETH_ZLEN)) {
2756                                 /* The packet is gone, so we must
2757                                  * return 0 */
2758                                 ss->stats.tx_dropped += 1;
2759                                 return NETDEV_TX_OK;
2760                         }
2761                         /* adjust the len to account for the zero pad
2762                          * so that the nic can know how long it is */
2763                         skb->len = ETH_ZLEN;
2764                 }
2765         }
2766
2767         /* map the skb for DMA */
2768         len = skb->len - skb->data_len;
2769         idx = tx->req & tx->mask;
2770         tx->info[idx].skb = skb;
2771         bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2772         pci_unmap_addr_set(&tx->info[idx], bus, bus);
2773         pci_unmap_len_set(&tx->info[idx], len, len);
2774
2775         frag_cnt = skb_shinfo(skb)->nr_frags;
2776         frag_idx = 0;
2777         count = 0;
2778         rdma_count = 0;
2779
2780         /* "rdma_count" is the number of RDMAs belonging to the
2781          * current packet BEFORE the current send request. For
2782          * non-TSO packets, this is equal to "count".
2783          * For TSO packets, rdma_count needs to be reset
2784          * to 0 after a segment cut.
2785          *
2786          * The rdma_count field of the send request is
2787          * the number of RDMAs of the packet starting at
2788          * that request. For TSO send requests with one ore more cuts
2789          * in the middle, this is the number of RDMAs starting
2790          * after the last cut in the request. All previous
2791          * segments before the last cut implicitly have 1 RDMA.
2792          *
2793          * Since the number of RDMAs is not known beforehand,
2794          * it must be filled-in retroactively - after each
2795          * segmentation cut or at the end of the entire packet.
2796          */
2797
2798         while (1) {
2799                 /* Break the SKB or Fragment up into pieces which
2800                  * do not cross mgp->tx_boundary */
2801                 low = MYRI10GE_LOWPART_TO_U32(bus);
2802                 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2803                 while (len) {
2804                         u8 flags_next;
2805                         int cum_len_next;
2806
2807                         if (unlikely(count == max_segments))
2808                                 goto abort_linearize;
2809
2810                         boundary =
2811                             (low + mgp->tx_boundary) & ~(mgp->tx_boundary - 1);
2812                         seglen = boundary - low;
2813                         if (seglen > len)
2814                                 seglen = len;
2815                         flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2816                         cum_len_next = cum_len + seglen;
2817                         if (mss) {      /* TSO */
2818                                 (req - rdma_count)->rdma_count = rdma_count + 1;
2819
2820                                 if (likely(cum_len >= 0)) {     /* payload */
2821                                         int next_is_first, chop;
2822
2823                                         chop = (cum_len_next > mss);
2824                                         cum_len_next = cum_len_next % mss;
2825                                         next_is_first = (cum_len_next == 0);
2826                                         flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2827                                         flags_next |= next_is_first *
2828                                             MXGEFW_FLAGS_FIRST;
2829                                         rdma_count |= -(chop | next_is_first);
2830                                         rdma_count += chop & !next_is_first;
2831                                 } else if (likely(cum_len_next >= 0)) { /* header ends */
2832                                         int small;
2833
2834                                         rdma_count = -1;
2835                                         cum_len_next = 0;
2836                                         seglen = -cum_len;
2837                                         small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2838                                         flags_next = MXGEFW_FLAGS_TSO_PLD |
2839                                             MXGEFW_FLAGS_FIRST |
2840                                             (small * MXGEFW_FLAGS_SMALL);
2841                                 }
2842                         }
2843                         req->addr_high = high_swapped;
2844                         req->addr_low = htonl(low);
2845                         req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2846                         req->pad = 0;   /* complete solid 16-byte block; does this matter? */
2847                         req->rdma_count = 1;
2848                         req->length = htons(seglen);
2849                         req->cksum_offset = cksum_offset;
2850                         req->flags = flags | ((cum_len & 1) * odd_flag);
2851
2852                         low += seglen;
2853                         len -= seglen;
2854                         cum_len = cum_len_next;
2855                         flags = flags_next;
2856                         req++;
2857                         count++;
2858                         rdma_count++;
2859                         if (cksum_offset != 0 && !(mss && skb_is_gso_v6(skb))) {
2860                                 if (unlikely(cksum_offset > seglen))
2861                                         cksum_offset -= seglen;
2862                                 else
2863                                         cksum_offset = 0;
2864                         }
2865                 }
2866                 if (frag_idx == frag_cnt)
2867                         break;
2868
2869                 /* map next fragment for DMA */
2870                 idx = (count + tx->req) & tx->mask;
2871                 frag = &skb_shinfo(skb)->frags[frag_idx];
2872                 frag_idx++;
2873                 len = frag->size;
2874                 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2875                                    len, PCI_DMA_TODEVICE);
2876                 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2877                 pci_unmap_len_set(&tx->info[idx], len, len);
2878         }
2879
2880         (req - rdma_count)->rdma_count = rdma_count;
2881         if (mss)
2882                 do {
2883                         req--;
2884                         req->flags |= MXGEFW_FLAGS_TSO_LAST;
2885                 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2886                                          MXGEFW_FLAGS_FIRST)));
2887         idx = ((count - 1) + tx->req) & tx->mask;
2888         tx->info[idx].last = 1;
2889         myri10ge_submit_req(tx, tx->req_list, count);
2890         /* if using multiple tx queues, make sure NIC polls the
2891          * current slice */
2892         if ((mgp->dev->real_num_tx_queues > 1) && tx->queue_active == 0) {
2893                 tx->queue_active = 1;
2894                 put_be32(htonl(1), tx->send_go);
2895                 mb();
2896                 mmiowb();
2897         }
2898         tx->pkt_start++;
2899         if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2900                 tx->stop_queue++;
2901                 netif_tx_stop_queue(netdev_queue);
2902         }
2903         return NETDEV_TX_OK;
2904
2905 abort_linearize:
2906         /* Free any DMA resources we've alloced and clear out the skb
2907          * slot so as to not trip up assertions, and to avoid a
2908          * double-free if linearizing fails */
2909
2910         last_idx = (idx + 1) & tx->mask;
2911         idx = tx->req & tx->mask;
2912         tx->info[idx].skb = NULL;
2913         do {
2914                 len = pci_unmap_len(&tx->info[idx], len);
2915                 if (len) {
2916                         if (tx->info[idx].skb != NULL)
2917                                 pci_unmap_single(mgp->pdev,
2918                                                  pci_unmap_addr(&tx->info[idx],
2919                                                                 bus), len,
2920                                                  PCI_DMA_TODEVICE);
2921                         else
2922                                 pci_unmap_page(mgp->pdev,
2923                                                pci_unmap_addr(&tx->info[idx],
2924                                                               bus), len,
2925                                                PCI_DMA_TODEVICE);
2926                         pci_unmap_len_set(&tx->info[idx], len, 0);
2927                         tx->info[idx].skb = NULL;
2928                 }
2929                 idx = (idx + 1) & tx->mask;
2930         } while (idx != last_idx);
2931         if (skb_is_gso(skb)) {
2932                 printk(KERN_ERR
2933                        "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2934                        mgp->dev->name);
2935                 goto drop;
2936         }
2937
2938         if (skb_linearize(skb))
2939                 goto drop;
2940
2941         tx->linearized++;
2942         goto again;
2943
2944 drop:
2945         dev_kfree_skb_any(skb);
2946         ss->stats.tx_dropped += 1;
2947         return NETDEV_TX_OK;
2948
2949 }
2950
2951 static netdev_tx_t myri10ge_sw_tso(struct sk_buff *skb,
2952                                          struct net_device *dev)
2953 {
2954         struct sk_buff *segs, *curr;
2955         struct myri10ge_priv *mgp = netdev_priv(dev);
2956         struct myri10ge_slice_state *ss;
2957         netdev_tx_t status;
2958
2959         segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO6);
2960         if (IS_ERR(segs))
2961                 goto drop;
2962
2963         while (segs) {
2964                 curr = segs;
2965                 segs = segs->next;
2966                 curr->next = NULL;
2967                 status = myri10ge_xmit(curr, dev);
2968                 if (status != 0) {
2969                         dev_kfree_skb_any(curr);
2970                         if (segs != NULL) {
2971                                 curr = segs;
2972                                 segs = segs->next;
2973                                 curr->next = NULL;
2974                                 dev_kfree_skb_any(segs);
2975                         }
2976                         goto drop;
2977                 }
2978         }
2979         dev_kfree_skb_any(skb);
2980         return NETDEV_TX_OK;
2981
2982 drop:
2983         ss = &mgp->ss[skb_get_queue_mapping(skb)];
2984         dev_kfree_skb_any(skb);
2985         ss->stats.tx_dropped += 1;
2986         return NETDEV_TX_OK;
2987 }
2988
2989 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2990 {
2991         struct myri10ge_priv *mgp = netdev_priv(dev);
2992         struct myri10ge_slice_netstats *slice_stats;
2993         struct net_device_stats *stats = &dev->stats;
2994         int i;
2995
2996         spin_lock(&mgp->stats_lock);
2997         memset(stats, 0, sizeof(*stats));
2998         for (i = 0; i < mgp->num_slices; i++) {
2999                 slice_stats = &mgp->ss[i].stats;
3000                 stats->rx_packets += slice_stats->rx_packets;
3001                 stats->tx_packets += slice_stats->tx_packets;
3002                 stats->rx_bytes += slice_stats->rx_bytes;
3003                 stats->tx_bytes += slice_stats->tx_bytes;
3004                 stats->rx_dropped += slice_stats->rx_dropped;
3005                 stats->tx_dropped += slice_stats->tx_dropped;
3006         }
3007         spin_unlock(&mgp->stats_lock);
3008         return stats;
3009 }
3010
3011 static void myri10ge_set_multicast_list(struct net_device *dev)
3012 {
3013         struct myri10ge_priv *mgp = netdev_priv(dev);
3014         struct myri10ge_cmd cmd;
3015         struct dev_mc_list *mc_list;
3016         __be32 data[2] = { 0, 0 };
3017         int err;
3018
3019         /* can be called from atomic contexts,
3020          * pass 1 to force atomicity in myri10ge_send_cmd() */
3021         myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
3022
3023         /* This firmware is known to not support multicast */
3024         if (!mgp->fw_multicast_support)
3025                 return;
3026
3027         /* Disable multicast filtering */
3028
3029         err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
3030         if (err != 0) {
3031                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
3032                        " error status: %d\n", dev->name, err);
3033                 goto abort;
3034         }
3035
3036         if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
3037                 /* request to disable multicast filtering, so quit here */
3038                 return;
3039         }
3040
3041         /* Flush the filters */
3042
3043         err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
3044                                 &cmd, 1);
3045         if (err != 0) {
3046                 printk(KERN_ERR
3047                        "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
3048                        ", error status: %d\n", dev->name, err);
3049                 goto abort;
3050         }
3051
3052         /* Walk the multicast list, and add each address */
3053         for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
3054                 memcpy(data, &mc_list->dmi_addr, 6);
3055                 cmd.data0 = ntohl(data[0]);
3056                 cmd.data1 = ntohl(data[1]);
3057                 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
3058                                         &cmd, 1);
3059
3060                 if (err != 0) {
3061                         printk(KERN_ERR "myri10ge: %s: Failed "
3062                                "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
3063                                "%d\t", dev->name, err);
3064                         printk(KERN_ERR "MAC %pM\n", mc_list->dmi_addr);
3065                         goto abort;
3066                 }
3067         }
3068         /* Enable multicast filtering */
3069         err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
3070         if (err != 0) {
3071                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
3072                        "error status: %d\n", dev->name, err);
3073                 goto abort;
3074         }
3075
3076         return;
3077
3078 abort:
3079         return;
3080 }
3081
3082 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
3083 {
3084         struct sockaddr *sa = addr;
3085         struct myri10ge_priv *mgp = netdev_priv(dev);
3086         int status;
3087
3088         if (!is_valid_ether_addr(sa->sa_data))
3089                 return -EADDRNOTAVAIL;
3090
3091         status = myri10ge_update_mac_address(mgp, sa->sa_data);
3092         if (status != 0) {
3093                 printk(KERN_ERR
3094                        "myri10ge: %s: changing mac address failed with %d\n",
3095                        dev->name, status);
3096                 return status;
3097         }
3098
3099         /* change the dev structure */
3100         memcpy(dev->dev_addr, sa->sa_data, 6);
3101         return 0;
3102 }
3103
3104 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
3105 {
3106         struct myri10ge_priv *mgp = netdev_priv(dev);
3107         int error = 0;
3108
3109         if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
3110                 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
3111                        dev->name, new_mtu);
3112                 return -EINVAL;
3113         }
3114         printk(KERN_INFO "%s: changing mtu from %d to %d\n",
3115                dev->name, dev->mtu, new_mtu);
3116         if (mgp->running) {
3117                 /* if we change the mtu on an active device, we must
3118                  * reset the device so the firmware sees the change */
3119                 myri10ge_close(dev);
3120                 dev->mtu = new_mtu;
3121                 myri10ge_open(dev);
3122         } else
3123                 dev->mtu = new_mtu;
3124
3125         return error;
3126 }
3127
3128 /*
3129  * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
3130  * Only do it if the bridge is a root port since we don't want to disturb
3131  * any other device, except if forced with myri10ge_ecrc_enable > 1.
3132  */
3133
3134 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
3135 {
3136         struct pci_dev *bridge = mgp->pdev->bus->self;
3137         struct device *dev = &mgp->pdev->dev;
3138         unsigned cap;
3139         unsigned err_cap;
3140         u16 val;
3141         u8 ext_type;
3142         int ret;
3143
3144         if (!myri10ge_ecrc_enable || !bridge)
3145                 return;
3146
3147         /* check that the bridge is a root port */
3148         cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
3149         pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
3150         ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3151         if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
3152                 if (myri10ge_ecrc_enable > 1) {
3153                         struct pci_dev *prev_bridge, *old_bridge = bridge;
3154
3155                         /* Walk the hierarchy up to the root port
3156                          * where ECRC has to be enabled */
3157                         do {
3158                                 prev_bridge = bridge;
3159                                 bridge = bridge->bus->self;
3160                                 if (!bridge || prev_bridge == bridge) {
3161                                         dev_err(dev,
3162                                                 "Failed to find root port"
3163                                                 " to force ECRC\n");
3164                                         return;
3165                                 }
3166                                 cap =
3167                                     pci_find_capability(bridge, PCI_CAP_ID_EXP);
3168                                 pci_read_config_word(bridge,
3169                                                      cap + PCI_CAP_FLAGS, &val);
3170                                 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3171                         } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
3172
3173                         dev_info(dev,
3174                                  "Forcing ECRC on non-root port %s"
3175                                  " (enabling on root port %s)\n",
3176                                  pci_name(old_bridge), pci_name(bridge));
3177                 } else {
3178                         dev_err(dev,
3179                                 "Not enabling ECRC on non-root port %s\n",
3180                                 pci_name(bridge));
3181                         return;
3182                 }
3183         }
3184
3185         cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
3186         if (!cap)
3187                 return;
3188
3189         ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
3190         if (ret) {
3191                 dev_err(dev, "failed reading ext-conf-space of %s\n",
3192                         pci_name(bridge));
3193                 dev_err(dev, "\t pci=nommconf in use? "
3194                         "or buggy/incomplete/absent ACPI MCFG attr?\n");
3195                 return;
3196         }
3197         if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
3198                 return;
3199
3200         err_cap |= PCI_ERR_CAP_ECRC_GENE;
3201         pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
3202         dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
3203 }
3204
3205 /*
3206  * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
3207  * when the PCI-E Completion packets are aligned on an 8-byte
3208  * boundary.  Some PCI-E chip sets always align Completion packets; on
3209  * the ones that do not, the alignment can be enforced by enabling
3210  * ECRC generation (if supported).
3211  *
3212  * When PCI-E Completion packets are not aligned, it is actually more
3213  * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
3214  *
3215  * If the driver can neither enable ECRC nor verify that it has
3216  * already been enabled, then it must use a firmware image which works
3217  * around unaligned completion packets (myri10ge_rss_ethp_z8e.dat), and it
3218  * should also ensure that it never gives the device a Read-DMA which is
3219  * larger than 2KB by setting the tx_boundary to 2KB.  If ECRC is
3220  * enabled, then the driver should use the aligned (myri10ge_rss_eth_z8e.dat)
3221  * firmware image, and set tx_boundary to 4KB.
3222  */
3223
3224 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
3225 {
3226         struct pci_dev *pdev = mgp->pdev;
3227         struct device *dev = &pdev->dev;
3228         int status;
3229
3230         mgp->tx_boundary = 4096;
3231         /*
3232          * Verify the max read request size was set to 4KB
3233          * before trying the test with 4KB.
3234          */
3235         status = pcie_get_readrq(pdev);
3236         if (status < 0) {
3237                 dev_err(dev, "Couldn't read max read req size: %d\n", status);
3238                 goto abort;
3239         }
3240         if (status != 4096) {
3241                 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
3242                 mgp->tx_boundary = 2048;
3243         }
3244         /*
3245          * load the optimized firmware (which assumes aligned PCIe
3246          * completions) in order to see if it works on this host.
3247          */
3248         mgp->fw_name = myri10ge_fw_aligned;
3249         status = myri10ge_load_firmware(mgp, 1);
3250         if (status != 0) {
3251                 goto abort;
3252         }
3253
3254         /*
3255          * Enable ECRC if possible
3256          */
3257         myri10ge_enable_ecrc(mgp);
3258
3259         /*
3260          * Run a DMA test which watches for unaligned completions and
3261          * aborts on the first one seen.
3262          */
3263
3264         status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
3265         if (status == 0)
3266                 return;         /* keep the aligned firmware */
3267
3268         if (status != -E2BIG)
3269                 dev_warn(dev, "DMA test failed: %d\n", status);
3270         if (status == -ENOSYS)
3271                 dev_warn(dev, "Falling back to ethp! "
3272                          "Please install up to date fw\n");
3273 abort:
3274         /* fall back to using the unaligned firmware */
3275         mgp->tx_boundary = 2048;
3276         mgp->fw_name = myri10ge_fw_unaligned;
3277
3278 }
3279
3280 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3281 {
3282         int overridden = 0;
3283
3284         if (myri10ge_force_firmware == 0) {
3285                 int link_width, exp_cap;
3286                 u16 lnk;
3287
3288                 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
3289                 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
3290                 link_width = (lnk >> 4) & 0x3f;
3291
3292                 /* Check to see if Link is less than 8 or if the
3293                  * upstream bridge is known to provide aligned
3294                  * completions */
3295                 if (link_width < 8) {
3296                         dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
3297                                  link_width);
3298                         mgp->tx_boundary = 4096;
3299                         mgp->fw_name = myri10ge_fw_aligned;
3300                 } else {
3301                         myri10ge_firmware_probe(mgp);
3302                 }
3303         } else {
3304                 if (myri10ge_force_firmware == 1) {
3305                         dev_info(&mgp->pdev->dev,
3306                                  "Assuming aligned completions (forced)\n");
3307                         mgp->tx_boundary = 4096;
3308                         mgp->fw_name = myri10ge_fw_aligned;
3309                 } else {
3310                         dev_info(&mgp->pdev->dev,
3311                                  "Assuming unaligned completions (forced)\n");
3312                         mgp->tx_boundary = 2048;
3313                         mgp->fw_name = myri10ge_fw_unaligned;
3314                 }
3315         }
3316         if (myri10ge_fw_name != NULL) {
3317                 overridden = 1;
3318                 mgp->fw_name = myri10ge_fw_name;
3319         }
3320         if (mgp->board_number < MYRI10GE_MAX_BOARDS &&
3321             myri10ge_fw_names[mgp->board_number] != NULL &&
3322             strlen(myri10ge_fw_names[mgp->board_number])) {
3323                 mgp->fw_name = myri10ge_fw_names[mgp->board_number];
3324                 overridden = 1;
3325         }
3326         if (overridden)
3327                 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
3328                          mgp->fw_name);
3329 }
3330
3331 #ifdef CONFIG_PM
3332 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
3333 {
3334         struct myri10ge_priv *mgp;
3335         struct net_device *netdev;
3336
3337         mgp = pci_get_drvdata(pdev);
3338         if (mgp == NULL)
3339                 return -EINVAL;
3340         netdev = mgp->dev;
3341
3342         netif_device_detach(netdev);
3343         if (netif_running(netdev)) {
3344                 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
3345                 rtnl_lock();
3346                 myri10ge_close(netdev);
3347                 rtnl_unlock();
3348         }
3349         myri10ge_dummy_rdma(mgp, 0);
3350         pci_save_state(pdev);
3351         pci_disable_device(pdev);
3352
3353         return pci_set_power_state(pdev, pci_choose_state(pdev, state));
3354 }
3355
3356 static int myri10ge_resume(struct pci_dev *pdev)
3357 {
3358         struct myri10ge_priv *mgp;
3359         struct net_device *netdev;
3360         int status;
3361         u16 vendor;
3362
3363         mgp = pci_get_drvdata(pdev);
3364         if (mgp == NULL)
3365                 return -EINVAL;
3366         netdev = mgp->dev;
3367         pci_set_power_state(pdev, 0);   /* zeros conf space as a side effect */
3368         msleep(5);              /* give card time to respond */
3369         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3370         if (vendor == 0xffff) {
3371                 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
3372                        mgp->dev->name);
3373                 return -EIO;
3374         }
3375
3376         status = pci_restore_state(pdev);
3377         if (status)
3378                 return status;
3379
3380         status = pci_enable_device(pdev);
3381         if (status) {
3382                 dev_err(&pdev->dev, "failed to enable device\n");
3383                 return status;
3384         }
3385
3386         pci_set_master(pdev);
3387
3388         myri10ge_reset(mgp);
3389         myri10ge_dummy_rdma(mgp, 1);
3390
3391         /* Save configuration space to be restored if the
3392          * nic resets due to a parity error */
3393         pci_save_state(pdev);
3394
3395         if (netif_running(netdev)) {
3396                 rtnl_lock();
3397                 status = myri10ge_open(netdev);
3398                 rtnl_unlock();
3399                 if (status != 0)
3400                         goto abort_with_enabled;
3401
3402         }
3403         netif_device_attach(netdev);
3404
3405         return 0;
3406
3407 abort_with_enabled:
3408         pci_disable_device(pdev);
3409         return -EIO;
3410
3411 }
3412 #endif                          /* CONFIG_PM */
3413
3414 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
3415 {
3416         struct pci_dev *pdev = mgp->pdev;
3417         int vs = mgp->vendor_specific_offset;
3418         u32 reboot;
3419
3420         /*enter read32 mode */
3421         pci_write_config_byte(pdev, vs + 0x10, 0x3);
3422
3423         /*read REBOOT_STATUS (0xfffffff0) */
3424         pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
3425         pci_read_config_dword(pdev, vs + 0x14, &reboot);
3426         return reboot;
3427 }
3428
3429 /*
3430  * This watchdog is used to check whether the board has suffered
3431  * from a parity error and needs to be recovered.
3432  */
3433 static void myri10ge_watchdog(struct work_struct *work)
3434 {
3435         struct myri10ge_priv *mgp =
3436             container_of(work, struct myri10ge_priv, watchdog_work);
3437         struct myri10ge_tx_buf *tx;
3438         u32 reboot;
3439         int status, rebooted;
3440         int i;
3441         u16 cmd, vendor;
3442
3443         mgp->watchdog_resets++;
3444         pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
3445         rebooted = 0;
3446         if ((cmd & PCI_COMMAND_MASTER) == 0) {
3447                 /* Bus master DMA disabled?  Check to see
3448                  * if the card rebooted due to a parity error
3449                  * For now, just report it */
3450                 reboot = myri10ge_read_reboot(mgp);
3451                 printk(KERN_ERR
3452                        "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
3453                        mgp->dev->name, reboot,
3454                        myri10ge_reset_recover ? " " : " not");
3455                 if (myri10ge_reset_recover == 0)
3456                         return;
3457                 rtnl_lock();
3458                 mgp->rebooted = 1;
3459                 rebooted = 1;
3460                 myri10ge_close(mgp->dev);
3461                 myri10ge_reset_recover--;
3462                 mgp->rebooted = 0;
3463                 /*
3464                  * A rebooted nic will come back with config space as
3465                  * it was after power was applied to PCIe bus.
3466                  * Attempt to restore config space which was saved
3467                  * when the driver was loaded, or the last time the
3468                  * nic was resumed from power saving mode.
3469                  */
3470                 pci_restore_state(mgp->pdev);
3471
3472                 /* save state again for accounting reasons */
3473                 pci_save_state(mgp->pdev);
3474
3475         } else {
3476                 /* if we get back -1's from our slot, perhaps somebody
3477                  * powered off our card.  Don't try to reset it in
3478                  * this case */
3479                 if (cmd == 0xffff) {
3480                         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3481                         if (vendor == 0xffff) {
3482                                 printk(KERN_ERR
3483                                        "myri10ge: %s: device disappeared!\n",
3484                                        mgp->dev->name);
3485                                 return;
3486                         }
3487                 }
3488                 /* Perhaps it is a software error.  Try to reset */
3489
3490                 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
3491                        mgp->dev->name);
3492                 for (i = 0; i < mgp->num_slices; i++) {
3493                         tx = &mgp->ss[i].tx;
3494                         printk(KERN_INFO
3495                                "myri10ge: %s: (%d): %d %d %d %d %d %d\n",
3496                                mgp->dev->name, i, tx->queue_active, tx->req,
3497                                tx->done, tx->pkt_start, tx->pkt_done,
3498                                (int)ntohl(mgp->ss[i].fw_stats->
3499                                           send_done_count));
3500                         msleep(2000);
3501                         printk(KERN_INFO
3502                                "myri10ge: %s: (%d): %d %d %d %d %d %d\n",
3503                                mgp->dev->name, i, tx->queue_active, tx->req,
3504                                tx->done, tx->pkt_start, tx->pkt_done,
3505                                (int)ntohl(mgp->ss[i].fw_stats->
3506                                           send_done_count));
3507                 }
3508         }
3509
3510         if (!rebooted) {
3511                 rtnl_lock();
3512                 myri10ge_close(mgp->dev);
3513         }
3514         status = myri10ge_load_firmware(mgp, 1);
3515         if (status != 0)
3516                 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
3517                        mgp->dev->name);
3518         else
3519                 myri10ge_open(mgp->dev);
3520         rtnl_unlock();
3521 }
3522
3523 /*
3524  * We use our own timer routine rather than relying upon
3525  * netdev->tx_timeout because we have a very large hardware transmit
3526  * queue.  Due to the large queue, the netdev->tx_timeout function
3527  * cannot detect a NIC with a parity error in a timely fashion if the
3528  * NIC is lightly loaded.
3529  */
3530 static void myri10ge_watchdog_timer(unsigned long arg)
3531 {
3532         struct myri10ge_priv *mgp;
3533         struct myri10ge_slice_state *ss;
3534         int i, reset_needed, busy_slice_cnt;
3535         u32 rx_pause_cnt;
3536         u16 cmd;
3537
3538         mgp = (struct myri10ge_priv *)arg;
3539
3540         rx_pause_cnt = ntohl(mgp->ss[0].fw_stats->dropped_pause);
3541         busy_slice_cnt = 0;
3542         for (i = 0, reset_needed = 0;
3543              i < mgp->num_slices && reset_needed == 0; ++i) {
3544
3545                 ss = &mgp->ss[i];
3546                 if (ss->rx_small.watchdog_needed) {
3547                         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
3548                                                 mgp->small_bytes + MXGEFW_PAD,
3549                                                 1);
3550                         if (ss->rx_small.fill_cnt - ss->rx_small.cnt >=
3551                             myri10ge_fill_thresh)
3552                                 ss->rx_small.watchdog_needed = 0;
3553                 }
3554                 if (ss->rx_big.watchdog_needed) {
3555                         myri10ge_alloc_rx_pages(mgp, &ss->rx_big,
3556                                                 mgp->big_bytes, 1);
3557                         if (ss->rx_big.fill_cnt - ss->rx_big.cnt >=
3558                             myri10ge_fill_thresh)
3559                                 ss->rx_big.watchdog_needed = 0;
3560                 }
3561
3562                 if (ss->tx.req != ss->tx.done &&
3563                     ss->tx.done == ss->watchdog_tx_done &&
3564                     ss->watchdog_tx_req != ss->watchdog_tx_done) {
3565                         /* nic seems like it might be stuck.. */
3566                         if (rx_pause_cnt != mgp->watchdog_pause) {
3567                                 if (net_ratelimit())
3568                                         printk(KERN_WARNING
3569                                                "myri10ge %s slice %d:"
3570                                                "TX paused, check link partner\n",
3571                                                mgp->dev->name, i);
3572                         } else {
3573                                 printk(KERN_WARNING
3574                                        "myri10ge %s slice %d stuck:",
3575                                        mgp->dev->name, i);
3576                                 reset_needed = 1;
3577                         }
3578                 }
3579                 if (ss->watchdog_tx_done != ss->tx.done ||
3580                     ss->watchdog_rx_done != ss->rx_done.cnt) {
3581                         busy_slice_cnt++;
3582                 }
3583                 ss->watchdog_tx_done = ss->tx.done;
3584                 ss->watchdog_tx_req = ss->tx.req;
3585                 ss->watchdog_rx_done = ss->rx_done.cnt;
3586         }
3587         /* if we've sent or received no traffic, poll the NIC to
3588          * ensure it is still there.  Otherwise, we risk not noticing
3589          * an error in a timely fashion */
3590         if (busy_slice_cnt == 0) {
3591                 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
3592                 if ((cmd & PCI_COMMAND_MASTER) == 0) {
3593                         reset_needed = 1;
3594                 }
3595         }
3596         mgp->watchdog_pause = rx_pause_cnt;
3597
3598         if (reset_needed) {
3599                 schedule_work(&mgp->watchdog_work);
3600         } else {
3601                 /* rearm timer */
3602                 mod_timer(&mgp->watchdog_timer,
3603                           jiffies + myri10ge_watchdog_timeout * HZ);
3604         }
3605 }
3606
3607 static void myri10ge_free_slices(struct myri10ge_priv *mgp)
3608 {
3609         struct myri10ge_slice_state *ss;
3610         struct pci_dev *pdev = mgp->pdev;
3611         size_t bytes;
3612         int i;
3613
3614         if (mgp->ss == NULL)
3615                 return;
3616
3617         for (i = 0; i < mgp->num_slices; i++) {
3618                 ss = &mgp->ss[i];
3619                 if (ss->rx_done.entry != NULL) {
3620                         bytes = mgp->max_intr_slots *
3621                             sizeof(*ss->rx_done.entry);
3622                         dma_free_coherent(&pdev->dev, bytes,
3623                                           ss->rx_done.entry, ss->rx_done.bus);
3624                         ss->rx_done.entry = NULL;
3625                 }
3626                 if (ss->fw_stats != NULL) {
3627                         bytes = sizeof(*ss->fw_stats);
3628                         dma_free_coherent(&pdev->dev, bytes,
3629                                           ss->fw_stats, ss->fw_stats_bus);
3630                         ss->fw_stats = NULL;
3631                 }
3632         }
3633         kfree(mgp->ss);
3634         mgp->ss = NULL;
3635 }
3636
3637 static int myri10ge_alloc_slices(struct myri10ge_priv *mgp)
3638 {
3639         struct myri10ge_slice_state *ss;
3640         struct pci_dev *pdev = mgp->pdev;
3641         size_t bytes;
3642         int i;
3643
3644         bytes = sizeof(*mgp->ss) * mgp->num_slices;
3645         mgp->ss = kzalloc(bytes, GFP_KERNEL);
3646         if (mgp->ss == NULL) {
3647                 return -ENOMEM;
3648         }
3649
3650         for (i = 0; i < mgp->num_slices; i++) {
3651                 ss = &mgp->ss[i];
3652                 bytes = mgp->max_intr_slots * sizeof(*ss->rx_done.entry);
3653                 ss->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3654                                                        &ss->rx_done.bus,
3655                                                        GFP_KERNEL);
3656                 if (ss->rx_done.entry == NULL)
3657                         goto abort;
3658                 memset(ss->rx_done.entry, 0, bytes);
3659                 bytes = sizeof(*ss->fw_stats);
3660                 ss->fw_stats = dma_alloc_coherent(&pdev->dev, bytes,
3661                                                   &ss->fw_stats_bus,
3662                                                   GFP_KERNEL);
3663                 if (ss->fw_stats == NULL)
3664                         goto abort;
3665                 ss->mgp = mgp;
3666                 ss->dev = mgp->dev;
3667                 netif_napi_add(ss->dev, &ss->napi, myri10ge_poll,
3668                                myri10ge_napi_weight);
3669         }
3670         return 0;
3671 abort:
3672         myri10ge_free_slices(mgp);
3673         return -ENOMEM;
3674 }
3675
3676 /*
3677  * This function determines the number of slices supported.
3678  * The number slices is the minumum of the number of CPUS,
3679  * the number of MSI-X irqs supported, the number of slices
3680  * supported by the firmware
3681  */
3682 static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
3683 {
3684         struct myri10ge_cmd cmd;
3685         struct pci_dev *pdev = mgp->pdev;
3686         char *old_fw;
3687         int i, status, ncpus, msix_cap;
3688
3689         mgp->num_slices = 1;
3690         msix_cap = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3691         ncpus = num_online_cpus();
3692
3693         if (myri10ge_max_slices == 1 || msix_cap == 0 ||
3694             (myri10ge_max_slices == -1 && ncpus < 2))
3695                 return;
3696
3697         /* try to load the slice aware rss firmware */
3698         old_fw = mgp->fw_name;
3699         if (myri10ge_fw_name != NULL) {
3700                 dev_info(&mgp->pdev->dev, "overriding rss firmware to %s\n",
3701                          myri10ge_fw_name);
3702                 mgp->fw_name = myri10ge_fw_name;
3703         } else if (old_fw == myri10ge_fw_aligned)
3704                 mgp->fw_name = myri10ge_fw_rss_aligned;
3705         else
3706                 mgp->fw_name = myri10ge_fw_rss_unaligned;
3707         status = myri10ge_load_firmware(mgp, 0);
3708         if (status != 0) {
3709                 dev_info(&pdev->dev, "Rss firmware not found\n");
3710                 return;
3711         }
3712
3713         /* hit the board with a reset to ensure it is alive */
3714         memset(&cmd, 0, sizeof(cmd));
3715         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
3716         if (status != 0) {
3717                 dev_err(&mgp->pdev->dev, "failed reset\n");
3718                 goto abort_with_fw;
3719                 return;
3720         }
3721
3722         mgp->max_intr_slots = cmd.data0 / sizeof(struct mcp_slot);
3723
3724         /* tell it the size of the interrupt queues */
3725         cmd.data0 = mgp->max_intr_slots * sizeof(struct mcp_slot);
3726         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
3727         if (status != 0) {
3728                 dev_err(&mgp->pdev->dev, "failed MXGEFW_CMD_SET_INTRQ_SIZE\n");
3729                 goto abort_with_fw;
3730         }
3731
3732         /* ask the maximum number of slices it supports */
3733         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES, &cmd, 0);
3734         if (status != 0)
3735                 goto abort_with_fw;
3736         else
3737                 mgp->num_slices = cmd.data0;
3738
3739         /* Only allow multiple slices if MSI-X is usable */
3740         if (!myri10ge_msi) {
3741                 goto abort_with_fw;
3742         }
3743
3744         /* if the admin did not specify a limit to how many
3745          * slices we should use, cap it automatically to the
3746          * number of CPUs currently online */
3747         if (myri10ge_max_slices == -1)
3748                 myri10ge_max_slices = ncpus;
3749
3750         if (mgp->num_slices > myri10ge_max_slices)
3751                 mgp->num_slices = myri10ge_max_slices;
3752
3753         /* Now try to allocate as many MSI-X vectors as we have
3754          * slices. We give up on MSI-X if we can only get a single
3755          * vector. */
3756
3757         mgp->msix_vectors = kzalloc(mgp->num_slices *
3758                                     sizeof(*mgp->msix_vectors), GFP_KERNEL);
3759         if (mgp->msix_vectors == NULL)
3760                 goto disable_msix;
3761         for (i = 0; i < mgp->num_slices; i++) {
3762                 mgp->msix_vectors[i].entry = i;
3763         }
3764
3765         while (mgp->num_slices > 1) {
3766                 /* make sure it is a power of two */
3767                 while (!is_power_of_2(mgp->num_slices))
3768                         mgp->num_slices--;
3769                 if (mgp->num_slices == 1)
3770                         goto disable_msix;
3771                 status = pci_enable_msix(pdev, mgp->msix_vectors,
3772                                          mgp->num_slices);
3773                 if (status == 0) {
3774                         pci_disable_msix(pdev);
3775                         return;
3776                 }
3777                 if (status > 0)
3778                         mgp->num_slices = status;
3779                 else
3780                         goto disable_msix;
3781         }
3782
3783 disable_msix:
3784         if (mgp->msix_vectors != NULL) {
3785                 kfree(mgp->msix_vectors);
3786                 mgp->msix_vectors = NULL;
3787         }
3788
3789 abort_with_fw:
3790         mgp->num_slices = 1;
3791         mgp->fw_name = old_fw;
3792         myri10ge_load_firmware(mgp, 0);
3793 }
3794
3795 static const struct net_device_ops myri10ge_netdev_ops = {
3796         .ndo_open               = myri10ge_open,
3797         .ndo_stop               = myri10ge_close,
3798         .ndo_start_xmit         = myri10ge_xmit,
3799         .ndo_get_stats          = myri10ge_get_stats,
3800         .ndo_validate_addr      = eth_validate_addr,
3801         .ndo_change_mtu         = myri10ge_change_mtu,
3802         .ndo_set_multicast_list = myri10ge_set_multicast_list,
3803         .ndo_set_mac_address    = myri10ge_set_mac_address,
3804 };
3805
3806 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3807 {
3808         struct net_device *netdev;
3809         struct myri10ge_priv *mgp;
3810         struct device *dev = &pdev->dev;
3811         int i;
3812         int status = -ENXIO;
3813         int dac_enabled;
3814         unsigned hdr_offset, ss_offset;
3815         static int board_number;
3816
3817         netdev = alloc_etherdev_mq(sizeof(*mgp), MYRI10GE_MAX_SLICES);
3818         if (netdev == NULL) {
3819                 dev_err(dev, "Could not allocate ethernet device\n");
3820                 return -ENOMEM;
3821         }
3822
3823         SET_NETDEV_DEV(netdev, &pdev->dev);
3824
3825         mgp = netdev_priv(netdev);
3826         mgp->dev = netdev;
3827         mgp->pdev = pdev;
3828         mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
3829         mgp->pause = myri10ge_flow_control;
3830         mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3831         mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3832         mgp->board_number = board_number;
3833         init_waitqueue_head(&mgp->down_wq);
3834
3835         if (pci_enable_device(pdev)) {
3836                 dev_err(&pdev->dev, "pci_enable_device call failed\n");
3837                 status = -ENODEV;
3838                 goto abort_with_netdev;
3839         }
3840
3841         /* Find the vendor-specific cap so we can check
3842          * the reboot register later on */
3843         mgp->vendor_specific_offset
3844             = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
3845
3846         /* Set our max read request to 4KB */
3847         status = pcie_set_readrq(pdev, 4096);
3848         if (status != 0) {
3849                 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
3850                         status);
3851                 goto abort_with_enabled;
3852         }
3853
3854         pci_set_master(pdev);
3855         dac_enabled = 1;
3856         status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3857         if (status != 0) {
3858                 dac_enabled = 0;
3859                 dev_err(&pdev->dev,
3860                         "64-bit pci address mask was refused, "
3861                         "trying 32-bit\n");
3862                 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3863         }
3864         if (status != 0) {
3865                 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
3866                 goto abort_with_enabled;
3867         }
3868         (void)pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3869         mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
3870                                       &mgp->cmd_bus, GFP_KERNEL);
3871         if (mgp->cmd == NULL)
3872                 goto abort_with_enabled;
3873
3874         mgp->board_span = pci_resource_len(pdev, 0);
3875         mgp->iomem_base = pci_resource_start(pdev, 0);
3876         mgp->mtrr = -1;
3877         mgp->wc_enabled = 0;
3878 #ifdef CONFIG_MTRR
3879         mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3880                              MTRR_TYPE_WRCOMB, 1);
3881         if (mgp->mtrr >= 0)
3882                 mgp->wc_enabled = 1;
3883 #endif
3884         mgp->sram = ioremap_wc(mgp->iomem_base, mgp->board_span);
3885         if (mgp->sram == NULL) {
3886                 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3887                         mgp->board_span, mgp->iomem_base);
3888                 status = -ENXIO;
3889                 goto abort_with_mtrr;
3890         }
3891         hdr_offset =
3892             ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET)) & 0xffffc;
3893         ss_offset = hdr_offset + offsetof(struct mcp_gen_header, string_specs);
3894         mgp->sram_size = ntohl(__raw_readl(mgp->sram + ss_offset));
3895         if (mgp->sram_size > mgp->board_span ||
3896             mgp->sram_size <= MYRI10GE_FW_OFFSET) {
3897                 dev_err(&pdev->dev,
3898                         "invalid sram_size %dB or board span %ldB\n",
3899                         mgp->sram_size, mgp->board_span);
3900                 goto abort_with_ioremap;
3901         }
3902         memcpy_fromio(mgp->eeprom_strings,
3903                       mgp->sram + mgp->sram_size, MYRI10GE_EEPROM_STRINGS_SIZE);
3904         memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3905         status = myri10ge_read_mac_addr(mgp);
3906         if (status)
3907                 goto abort_with_ioremap;
3908
3909         for (i = 0; i < ETH_ALEN; i++)
3910                 netdev->dev_addr[i] = mgp->mac_addr[i];
3911
3912         myri10ge_select_firmware(mgp);
3913
3914         status = myri10ge_load_firmware(mgp, 1);
3915         if (status != 0) {
3916                 dev_err(&pdev->dev, "failed to load firmware\n");
3917                 goto abort_with_ioremap;
3918         }
3919         myri10ge_probe_slices(mgp);
3920         status = myri10ge_alloc_slices(mgp);
3921         if (status != 0) {
3922                 dev_err(&pdev->dev, "failed to alloc slice state\n");
3923                 goto abort_with_firmware;
3924         }
3925         netdev->real_num_tx_queues = mgp->num_slices;
3926         status = myri10ge_reset(mgp);
3927         if (status != 0) {
3928                 dev_err(&pdev->dev, "failed reset\n");
3929                 goto abort_with_slices;
3930         }
3931 #ifdef CONFIG_MYRI10GE_DCA
3932         myri10ge_setup_dca(mgp);
3933 #endif
3934         pci_set_drvdata(pdev, mgp);
3935         if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3936                 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3937         if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3938                 myri10ge_initial_mtu = 68;
3939
3940         netdev->netdev_ops = &myri10ge_netdev_ops;
3941         netdev->mtu = myri10ge_initial_mtu;
3942         netdev->base_addr = mgp->iomem_base;
3943         netdev->features = mgp->features;
3944
3945         if (dac_enabled)
3946                 netdev->features |= NETIF_F_HIGHDMA;
3947         netdev->features |= NETIF_F_LRO;
3948
3949         netdev->vlan_features |= mgp->features;
3950         if (mgp->fw_ver_tiny < 37)
3951                 netdev->vlan_features &= ~NETIF_F_TSO6;
3952         if (mgp->fw_ver_tiny < 32)
3953                 netdev->vlan_features &= ~NETIF_F_TSO;
3954
3955         /* make sure we can get an irq, and that MSI can be
3956          * setup (if available).  Also ensure netdev->irq
3957          * is set to correct value if MSI is enabled */
3958         status = myri10ge_request_irq(mgp);
3959         if (status != 0)
3960                 goto abort_with_firmware;
3961         netdev->irq = pdev->irq;
3962         myri10ge_free_irq(mgp);
3963
3964         /* Save configuration space to be restored if the
3965          * nic resets due to a parity error */
3966         pci_save_state(pdev);
3967
3968         /* Setup the watchdog timer */
3969         setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3970                     (unsigned long)mgp);
3971
3972         spin_lock_init(&mgp->stats_lock);
3973         SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3974         INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3975         status = register_netdev(netdev);
3976         if (status != 0) {
3977                 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3978                 goto abort_with_state;
3979         }
3980         if (mgp->msix_enabled)
3981                 dev_info(dev, "%d MSI-X IRQs, tx bndry %d, fw %s, WC %s\n",
3982                          mgp->num_slices, mgp->tx_boundary, mgp->fw_name,
3983                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
3984         else
3985                 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3986                          mgp->msi_enabled ? "MSI" : "xPIC",
3987                          netdev->irq, mgp->tx_boundary, mgp->fw_name,
3988                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
3989
3990         board_number++;
3991         return 0;
3992
3993 abort_with_state:
3994         pci_restore_state(pdev);
3995
3996 abort_with_slices:
3997         myri10ge_free_slices(mgp);
3998
3999 abort_with_firmware:
4000         myri10ge_dummy_rdma(mgp, 0);
4001
4002 abort_with_ioremap:
4003         if (mgp->mac_addr_string != NULL)
4004                 dev_err(&pdev->dev,
4005                         "myri10ge_probe() failed: MAC=%s, SN=%ld\n",
4006                         mgp->mac_addr_string, mgp->serial_number);
4007         iounmap(mgp->sram);
4008
4009 abort_with_mtrr:
4010 #ifdef CONFIG_MTRR
4011         if (mgp->mtrr >= 0)
4012                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
4013 #endif
4014         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
4015                           mgp->cmd, mgp->cmd_bus);
4016
4017 abort_with_enabled:
4018         pci_disable_device(pdev);
4019
4020 abort_with_netdev:
4021         free_netdev(netdev);
4022         return status;
4023 }
4024
4025 /*
4026  * myri10ge_remove
4027  *
4028  * Does what is necessary to shutdown one Myrinet device. Called
4029  *   once for each Myrinet card by the kernel when a module is
4030  *   unloaded.
4031  */
4032 static void myri10ge_remove(struct pci_dev *pdev)
4033 {
4034         struct myri10ge_priv *mgp;
4035         struct net_device *netdev;
4036
4037         mgp = pci_get_drvdata(pdev);
4038         if (mgp == NULL)
4039                 return;
4040
4041         flush_scheduled_work();
4042         netdev = mgp->dev;
4043         unregister_netdev(netdev);
4044
4045 #ifdef CONFIG_MYRI10GE_DCA
4046         myri10ge_teardown_dca(mgp);
4047 #endif
4048         myri10ge_dummy_rdma(mgp, 0);
4049
4050         /* avoid a memory leak */
4051         pci_restore_state(pdev);
4052
4053         iounmap(mgp->sram);
4054
4055 #ifdef CONFIG_MTRR
4056         if (mgp->mtrr >= 0)
4057                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
4058 #endif
4059         myri10ge_free_slices(mgp);
4060         if (mgp->msix_vectors != NULL)
4061                 kfree(mgp->msix_vectors);
4062         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
4063                           mgp->cmd, mgp->cmd_bus);
4064
4065         free_netdev(netdev);
4066         pci_disable_device(pdev);
4067         pci_set_drvdata(pdev, NULL);
4068 }
4069
4070 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E      0x0008
4071 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9    0x0009
4072
4073 static struct pci_device_id myri10ge_pci_tbl[] = {
4074         {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
4075         {PCI_DEVICE
4076          (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
4077         {0},
4078 };
4079
4080 MODULE_DEVICE_TABLE(pci, myri10ge_pci_tbl);
4081
4082 static struct pci_driver myri10ge_driver = {
4083         .name = "myri10ge",
4084         .probe = myri10ge_probe,
4085         .remove = myri10ge_remove,
4086         .id_table = myri10ge_pci_tbl,
4087 #ifdef CONFIG_PM
4088         .suspend = myri10ge_suspend,
4089         .resume = myri10ge_resume,
4090 #endif
4091 };
4092
4093 #ifdef CONFIG_MYRI10GE_DCA
4094 static int
4095 myri10ge_notify_dca(struct notifier_block *nb, unsigned long event, void *p)
4096 {
4097         int err = driver_for_each_device(&myri10ge_driver.driver,
4098                                          NULL, &event,
4099                                          myri10ge_notify_dca_device);
4100
4101         if (err)
4102                 return NOTIFY_BAD;
4103         return NOTIFY_DONE;
4104 }
4105
4106 static struct notifier_block myri10ge_dca_notifier = {
4107         .notifier_call = myri10ge_notify_dca,
4108         .next = NULL,
4109         .priority = 0,
4110 };
4111 #endif                          /* CONFIG_MYRI10GE_DCA */
4112
4113 static __init int myri10ge_init_module(void)
4114 {
4115         printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
4116                MYRI10GE_VERSION_STR);
4117
4118         if (myri10ge_rss_hash > MXGEFW_RSS_HASH_TYPE_MAX) {
4119                 printk(KERN_ERR
4120                        "%s: Illegal rssh hash type %d, defaulting to source port\n",
4121                        myri10ge_driver.name, myri10ge_rss_hash);
4122                 myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
4123         }
4124 #ifdef CONFIG_MYRI10GE_DCA
4125         dca_register_notify(&myri10ge_dca_notifier);
4126 #endif
4127         if (myri10ge_max_slices > MYRI10GE_MAX_SLICES)
4128                 myri10ge_max_slices = MYRI10GE_MAX_SLICES;
4129
4130         return pci_register_driver(&myri10ge_driver);
4131 }
4132
4133 module_init(myri10ge_init_module);
4134
4135 static __exit void myri10ge_cleanup_module(void)
4136 {
4137 #ifdef CONFIG_MYRI10GE_DCA
4138         dca_unregister_notify(&myri10ge_dca_notifier);
4139 #endif
4140         pci_unregister_driver(&myri10ge_driver);
4141 }
4142
4143 module_exit(myri10ge_cleanup_module);