Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / myri10ge / myri10ge.c
1 /*************************************************************************
2  * myri10ge.c: Myricom Myri-10G Ethernet driver.
3  *
4  * Copyright (C) 2005 - 2009 Myricom, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  *
31  *
32  * If the eeprom on your board is not recent enough, you will need to get a
33  * newer firmware image at:
34  *   http://www.myri.com/scs/download-Myri10GE.html
35  *
36  * Contact Information:
37  *   <help@myri.com>
38  *   Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39  *************************************************************************/
40
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
52 #include <linux/dca.h>
53 #include <linux/ip.h>
54 #include <linux/inet.h>
55 #include <linux/in.h>
56 #include <linux/ethtool.h>
57 #include <linux/firmware.h>
58 #include <linux/delay.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
63 #include <linux/io.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
66 #include <net/ip.h>
67 #include <net/tcp.h>
68 #include <asm/byteorder.h>
69 #include <asm/io.h>
70 #include <asm/processor.h>
71 #ifdef CONFIG_MTRR
72 #include <asm/mtrr.h>
73 #endif
74
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
77
78 #define MYRI10GE_VERSION_STR "1.5.1-1.451"
79
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR);
83 MODULE_LICENSE("Dual BSD/GPL");
84
85 #define MYRI10GE_MAX_ETHER_MTU 9014
86
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
92
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
97
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
100
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
104
105 #define MYRI10GE_MAX_SLICES 32
106
107 struct myri10ge_rx_buffer_state {
108         struct page *page;
109         int page_offset;
110          DECLARE_PCI_UNMAP_ADDR(bus)
111          DECLARE_PCI_UNMAP_LEN(len)
112 };
113
114 struct myri10ge_tx_buffer_state {
115         struct sk_buff *skb;
116         int last;
117          DECLARE_PCI_UNMAP_ADDR(bus)
118          DECLARE_PCI_UNMAP_LEN(len)
119 };
120
121 struct myri10ge_cmd {
122         u32 data0;
123         u32 data1;
124         u32 data2;
125 };
126
127 struct myri10ge_rx_buf {
128         struct mcp_kreq_ether_recv __iomem *lanai;      /* lanai ptr for recv ring */
129         struct mcp_kreq_ether_recv *shadow;     /* host shadow of recv ring */
130         struct myri10ge_rx_buffer_state *info;
131         struct page *page;
132         dma_addr_t bus;
133         int page_offset;
134         int cnt;
135         int fill_cnt;
136         int alloc_fail;
137         int mask;               /* number of rx slots -1 */
138         int watchdog_needed;
139 };
140
141 struct myri10ge_tx_buf {
142         struct mcp_kreq_ether_send __iomem *lanai;      /* lanai ptr for sendq */
143         __be32 __iomem *send_go;        /* "go" doorbell ptr */
144         __be32 __iomem *send_stop;      /* "stop" doorbell ptr */
145         struct mcp_kreq_ether_send *req_list;   /* host shadow of sendq */
146         char *req_bytes;
147         struct myri10ge_tx_buffer_state *info;
148         int mask;               /* number of transmit slots -1  */
149         int req ____cacheline_aligned;  /* transmit slots submitted     */
150         int pkt_start;          /* packets started */
151         int stop_queue;
152         int linearized;
153         int done ____cacheline_aligned; /* transmit slots completed     */
154         int pkt_done;           /* packets completed */
155         int wake_queue;
156         int queue_active;
157 };
158
159 struct myri10ge_rx_done {
160         struct mcp_slot *entry;
161         dma_addr_t bus;
162         int cnt;
163         int idx;
164         struct net_lro_mgr lro_mgr;
165         struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
166 };
167
168 struct myri10ge_slice_netstats {
169         unsigned long rx_packets;
170         unsigned long tx_packets;
171         unsigned long rx_bytes;
172         unsigned long tx_bytes;
173         unsigned long rx_dropped;
174         unsigned long tx_dropped;
175 };
176
177 struct myri10ge_slice_state {
178         struct myri10ge_tx_buf tx;      /* transmit ring        */
179         struct myri10ge_rx_buf rx_small;
180         struct myri10ge_rx_buf rx_big;
181         struct myri10ge_rx_done rx_done;
182         struct net_device *dev;
183         struct napi_struct napi;
184         struct myri10ge_priv *mgp;
185         struct myri10ge_slice_netstats stats;
186         __be32 __iomem *irq_claim;
187         struct mcp_irq_data *fw_stats;
188         dma_addr_t fw_stats_bus;
189         int watchdog_tx_done;
190         int watchdog_tx_req;
191         int watchdog_rx_done;
192 #ifdef CONFIG_MYRI10GE_DCA
193         int cached_dca_tag;
194         int cpu;
195         __be32 __iomem *dca_tag;
196 #endif
197         char irq_desc[32];
198 };
199
200 struct myri10ge_priv {
201         struct myri10ge_slice_state *ss;
202         int tx_boundary;        /* boundary transmits cannot cross */
203         int num_slices;
204         int running;            /* running?             */
205         int csum_flag;          /* rx_csums?            */
206         int small_bytes;
207         int big_bytes;
208         int max_intr_slots;
209         struct net_device *dev;
210         spinlock_t stats_lock;
211         u8 __iomem *sram;
212         int sram_size;
213         unsigned long board_span;
214         unsigned long iomem_base;
215         __be32 __iomem *irq_deassert;
216         char *mac_addr_string;
217         struct mcp_cmd_response *cmd;
218         dma_addr_t cmd_bus;
219         struct pci_dev *pdev;
220         int msi_enabled;
221         int msix_enabled;
222         struct msix_entry *msix_vectors;
223 #ifdef CONFIG_MYRI10GE_DCA
224         int dca_enabled;
225 #endif
226         u32 link_state;
227         unsigned int rdma_tags_available;
228         int intr_coal_delay;
229         __be32 __iomem *intr_coal_delay_ptr;
230         int mtrr;
231         int wc_enabled;
232         int down_cnt;
233         wait_queue_head_t down_wq;
234         struct work_struct watchdog_work;
235         struct timer_list watchdog_timer;
236         int watchdog_resets;
237         int watchdog_pause;
238         int pause;
239         char *fw_name;
240         char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
241         char *product_code_string;
242         char fw_version[128];
243         int fw_ver_major;
244         int fw_ver_minor;
245         int fw_ver_tiny;
246         int adopted_rx_filter_bug;
247         u8 mac_addr[6];         /* eeprom mac address */
248         unsigned long serial_number;
249         int vendor_specific_offset;
250         int fw_multicast_support;
251         unsigned long features;
252         u32 max_tso6;
253         u32 read_dma;
254         u32 write_dma;
255         u32 read_write_dma;
256         u32 link_changes;
257         u32 msg_enable;
258         unsigned int board_number;
259         int rebooted;
260 };
261
262 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
263 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
264 static char *myri10ge_fw_rss_unaligned = "myri10ge_rss_ethp_z8e.dat";
265 static char *myri10ge_fw_rss_aligned = "myri10ge_rss_eth_z8e.dat";
266
267 static char *myri10ge_fw_name = NULL;
268 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
269 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
270
271 #define MYRI10GE_MAX_BOARDS 8
272 static char *myri10ge_fw_names[MYRI10GE_MAX_BOARDS] =
273     {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
274 module_param_array_named(myri10ge_fw_names, myri10ge_fw_names, charp, NULL,
275                          0444);
276 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image names per board");
277
278 static int myri10ge_ecrc_enable = 1;
279 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
280 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
281
282 static int myri10ge_small_bytes = -1;   /* -1 == auto */
283 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
284 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets");
285
286 static int myri10ge_msi = 1;    /* enable msi by default */
287 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
288 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts");
289
290 static int myri10ge_intr_coal_delay = 75;
291 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
292 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay");
293
294 static int myri10ge_flow_control = 1;
295 module_param(myri10ge_flow_control, int, S_IRUGO);
296 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter");
297
298 static int myri10ge_deassert_wait = 1;
299 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
300 MODULE_PARM_DESC(myri10ge_deassert_wait,
301                  "Wait when deasserting legacy interrupts");
302
303 static int myri10ge_force_firmware = 0;
304 module_param(myri10ge_force_firmware, int, S_IRUGO);
305 MODULE_PARM_DESC(myri10ge_force_firmware,
306                  "Force firmware to assume aligned completions");
307
308 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
309 module_param(myri10ge_initial_mtu, int, S_IRUGO);
310 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU");
311
312 static int myri10ge_napi_weight = 64;
313 module_param(myri10ge_napi_weight, int, S_IRUGO);
314 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight");
315
316 static int myri10ge_watchdog_timeout = 1;
317 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
318 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout");
319
320 static int myri10ge_max_irq_loops = 1048576;
321 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
322 MODULE_PARM_DESC(myri10ge_max_irq_loops,
323                  "Set stuck legacy IRQ detection threshold");
324
325 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
326
327 static int myri10ge_debug = -1; /* defaults above */
328 module_param(myri10ge_debug, int, 0);
329 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
330
331 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
332 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
333 MODULE_PARM_DESC(myri10ge_lro_max_pkts,
334                  "Number of LRO packets to be aggregated");
335
336 static int myri10ge_fill_thresh = 256;
337 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
338 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed");
339
340 static int myri10ge_reset_recover = 1;
341
342 static int myri10ge_max_slices = 1;
343 module_param(myri10ge_max_slices, int, S_IRUGO);
344 MODULE_PARM_DESC(myri10ge_max_slices, "Max tx/rx queues");
345
346 static int myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
347 module_param(myri10ge_rss_hash, int, S_IRUGO);
348 MODULE_PARM_DESC(myri10ge_rss_hash, "Type of RSS hashing to do");
349
350 static int myri10ge_dca = 1;
351 module_param(myri10ge_dca, int, S_IRUGO);
352 MODULE_PARM_DESC(myri10ge_dca, "Enable DCA if possible");
353
354 #define MYRI10GE_FW_OFFSET 1024*1024
355 #define MYRI10GE_HIGHPART_TO_U32(X) \
356 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
357 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
358
359 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
360
361 static void myri10ge_set_multicast_list(struct net_device *dev);
362 static netdev_tx_t myri10ge_sw_tso(struct sk_buff *skb,
363                                          struct net_device *dev);
364
365 static inline void put_be32(__be32 val, __be32 __iomem * p)
366 {
367         __raw_writel((__force __u32) val, (__force void __iomem *)p);
368 }
369
370 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev);
371
372 static int
373 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
374                   struct myri10ge_cmd *data, int atomic)
375 {
376         struct mcp_cmd *buf;
377         char buf_bytes[sizeof(*buf) + 8];
378         struct mcp_cmd_response *response = mgp->cmd;
379         char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
380         u32 dma_low, dma_high, result, value;
381         int sleep_total = 0;
382
383         /* ensure buf is aligned to 8 bytes */
384         buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
385
386         buf->data0 = htonl(data->data0);
387         buf->data1 = htonl(data->data1);
388         buf->data2 = htonl(data->data2);
389         buf->cmd = htonl(cmd);
390         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
391         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
392
393         buf->response_addr.low = htonl(dma_low);
394         buf->response_addr.high = htonl(dma_high);
395         response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
396         mb();
397         myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
398
399         /* wait up to 15ms. Longest command is the DMA benchmark,
400          * which is capped at 5ms, but runs from a timeout handler
401          * that runs every 7.8ms. So a 15ms timeout leaves us with
402          * a 2.2ms margin
403          */
404         if (atomic) {
405                 /* if atomic is set, do not sleep,
406                  * and try to get the completion quickly
407                  * (1ms will be enough for those commands) */
408                 for (sleep_total = 0;
409                      sleep_total < 1000
410                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
411                      sleep_total += 10) {
412                         udelay(10);
413                         mb();
414                 }
415         } else {
416                 /* use msleep for most command */
417                 for (sleep_total = 0;
418                      sleep_total < 15
419                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
420                      sleep_total++)
421                         msleep(1);
422         }
423
424         result = ntohl(response->result);
425         value = ntohl(response->data);
426         if (result != MYRI10GE_NO_RESPONSE_RESULT) {
427                 if (result == 0) {
428                         data->data0 = value;
429                         return 0;
430                 } else if (result == MXGEFW_CMD_UNKNOWN) {
431                         return -ENOSYS;
432                 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
433                         return -E2BIG;
434                 } else if (result == MXGEFW_CMD_ERROR_RANGE &&
435                            cmd == MXGEFW_CMD_ENABLE_RSS_QUEUES &&
436                            (data->
437                             data1 & MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES) !=
438                            0) {
439                         return -ERANGE;
440                 } else {
441                         dev_err(&mgp->pdev->dev,
442                                 "command %d failed, result = %d\n",
443                                 cmd, result);
444                         return -ENXIO;
445                 }
446         }
447
448         dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
449                 cmd, result);
450         return -EAGAIN;
451 }
452
453 /*
454  * The eeprom strings on the lanaiX have the format
455  * SN=x\0
456  * MAC=x:x:x:x:x:x\0
457  * PT:ddd mmm xx xx:xx:xx xx\0
458  * PV:ddd mmm xx xx:xx:xx xx\0
459  */
460 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
461 {
462         char *ptr, *limit;
463         int i;
464
465         ptr = mgp->eeprom_strings;
466         limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
467
468         while (*ptr != '\0' && ptr < limit) {
469                 if (memcmp(ptr, "MAC=", 4) == 0) {
470                         ptr += 4;
471                         mgp->mac_addr_string = ptr;
472                         for (i = 0; i < 6; i++) {
473                                 if ((ptr + 2) > limit)
474                                         goto abort;
475                                 mgp->mac_addr[i] =
476                                     simple_strtoul(ptr, &ptr, 16);
477                                 ptr += 1;
478                         }
479                 }
480                 if (memcmp(ptr, "PC=", 3) == 0) {
481                         ptr += 3;
482                         mgp->product_code_string = ptr;
483                 }
484                 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
485                         ptr += 3;
486                         mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
487                 }
488                 while (ptr < limit && *ptr++) ;
489         }
490
491         return 0;
492
493 abort:
494         dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
495         return -ENXIO;
496 }
497
498 /*
499  * Enable or disable periodic RDMAs from the host to make certain
500  * chipsets resend dropped PCIe messages
501  */
502
503 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
504 {
505         char __iomem *submit;
506         __be32 buf[16] __attribute__ ((__aligned__(8)));
507         u32 dma_low, dma_high;
508         int i;
509
510         /* clear confirmation addr */
511         mgp->cmd->data = 0;
512         mb();
513
514         /* send a rdma command to the PCIe engine, and wait for the
515          * response in the confirmation address.  The firmware should
516          * write a -1 there to indicate it is alive and well
517          */
518         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
519         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
520
521         buf[0] = htonl(dma_high);       /* confirm addr MSW */
522         buf[1] = htonl(dma_low);        /* confirm addr LSW */
523         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
524         buf[3] = htonl(dma_high);       /* dummy addr MSW */
525         buf[4] = htonl(dma_low);        /* dummy addr LSW */
526         buf[5] = htonl(enable); /* enable? */
527
528         submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
529
530         myri10ge_pio_copy(submit, &buf, sizeof(buf));
531         for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
532                 msleep(1);
533         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
534                 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
535                         (enable ? "enable" : "disable"));
536 }
537
538 static int
539 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
540                            struct mcp_gen_header *hdr)
541 {
542         struct device *dev = &mgp->pdev->dev;
543
544         /* check firmware type */
545         if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
546                 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
547                 return -EINVAL;
548         }
549
550         /* save firmware version for ethtool */
551         strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
552
553         sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
554                &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
555
556         if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
557               && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
558                 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
559                 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
560                         MXGEFW_VERSION_MINOR);
561                 return -EINVAL;
562         }
563         return 0;
564 }
565
566 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
567 {
568         unsigned crc, reread_crc;
569         const struct firmware *fw;
570         struct device *dev = &mgp->pdev->dev;
571         unsigned char *fw_readback;
572         struct mcp_gen_header *hdr;
573         size_t hdr_offset;
574         int status;
575         unsigned i;
576
577         if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
578                 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
579                         mgp->fw_name);
580                 status = -EINVAL;
581                 goto abort_with_nothing;
582         }
583
584         /* check size */
585
586         if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
587             fw->size < MCP_HEADER_PTR_OFFSET + 4) {
588                 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
589                 status = -EINVAL;
590                 goto abort_with_fw;
591         }
592
593         /* check id */
594         hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
595         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
596                 dev_err(dev, "Bad firmware file\n");
597                 status = -EINVAL;
598                 goto abort_with_fw;
599         }
600         hdr = (void *)(fw->data + hdr_offset);
601
602         status = myri10ge_validate_firmware(mgp, hdr);
603         if (status != 0)
604                 goto abort_with_fw;
605
606         crc = crc32(~0, fw->data, fw->size);
607         for (i = 0; i < fw->size; i += 256) {
608                 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
609                                   fw->data + i,
610                                   min(256U, (unsigned)(fw->size - i)));
611                 mb();
612                 readb(mgp->sram);
613         }
614         fw_readback = vmalloc(fw->size);
615         if (!fw_readback) {
616                 status = -ENOMEM;
617                 goto abort_with_fw;
618         }
619         /* corruption checking is good for parity recovery and buggy chipset */
620         memcpy_fromio(fw_readback, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
621         reread_crc = crc32(~0, fw_readback, fw->size);
622         vfree(fw_readback);
623         if (crc != reread_crc) {
624                 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
625                         (unsigned)fw->size, reread_crc, crc);
626                 status = -EIO;
627                 goto abort_with_fw;
628         }
629         *size = (u32) fw->size;
630
631 abort_with_fw:
632         release_firmware(fw);
633
634 abort_with_nothing:
635         return status;
636 }
637
638 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
639 {
640         struct mcp_gen_header *hdr;
641         struct device *dev = &mgp->pdev->dev;
642         const size_t bytes = sizeof(struct mcp_gen_header);
643         size_t hdr_offset;
644         int status;
645
646         /* find running firmware header */
647         hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
648
649         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
650                 dev_err(dev, "Running firmware has bad header offset (%d)\n",
651                         (int)hdr_offset);
652                 return -EIO;
653         }
654
655         /* copy header of running firmware from SRAM to host memory to
656          * validate firmware */
657         hdr = kmalloc(bytes, GFP_KERNEL);
658         if (hdr == NULL) {
659                 dev_err(dev, "could not malloc firmware hdr\n");
660                 return -ENOMEM;
661         }
662         memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
663         status = myri10ge_validate_firmware(mgp, hdr);
664         kfree(hdr);
665
666         /* check to see if adopted firmware has bug where adopting
667          * it will cause broadcasts to be filtered unless the NIC
668          * is kept in ALLMULTI mode */
669         if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
670             mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
671                 mgp->adopted_rx_filter_bug = 1;
672                 dev_warn(dev, "Adopting fw %d.%d.%d: "
673                          "working around rx filter bug\n",
674                          mgp->fw_ver_major, mgp->fw_ver_minor,
675                          mgp->fw_ver_tiny);
676         }
677         return status;
678 }
679
680 static int myri10ge_get_firmware_capabilities(struct myri10ge_priv *mgp)
681 {
682         struct myri10ge_cmd cmd;
683         int status;
684
685         /* probe for IPv6 TSO support */
686         mgp->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
687         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
688                                    &cmd, 0);
689         if (status == 0) {
690                 mgp->max_tso6 = cmd.data0;
691                 mgp->features |= NETIF_F_TSO6;
692         }
693
694         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
695         if (status != 0) {
696                 dev_err(&mgp->pdev->dev,
697                         "failed MXGEFW_CMD_GET_RX_RING_SIZE\n");
698                 return -ENXIO;
699         }
700
701         mgp->max_intr_slots = 2 * (cmd.data0 / sizeof(struct mcp_dma_addr));
702
703         return 0;
704 }
705
706 static int myri10ge_load_firmware(struct myri10ge_priv *mgp, int adopt)
707 {
708         char __iomem *submit;
709         __be32 buf[16] __attribute__ ((__aligned__(8)));
710         u32 dma_low, dma_high, size;
711         int status, i;
712
713         size = 0;
714         status = myri10ge_load_hotplug_firmware(mgp, &size);
715         if (status) {
716                 if (!adopt)
717                         return status;
718                 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
719
720                 /* Do not attempt to adopt firmware if there
721                  * was a bad crc */
722                 if (status == -EIO)
723                         return status;
724
725                 status = myri10ge_adopt_running_firmware(mgp);
726                 if (status != 0) {
727                         dev_err(&mgp->pdev->dev,
728                                 "failed to adopt running firmware\n");
729                         return status;
730                 }
731                 dev_info(&mgp->pdev->dev,
732                          "Successfully adopted running firmware\n");
733                 if (mgp->tx_boundary == 4096) {
734                         dev_warn(&mgp->pdev->dev,
735                                  "Using firmware currently running on NIC"
736                                  ".  For optimal\n");
737                         dev_warn(&mgp->pdev->dev,
738                                  "performance consider loading optimized "
739                                  "firmware\n");
740                         dev_warn(&mgp->pdev->dev, "via hotplug\n");
741                 }
742
743                 mgp->fw_name = "adopted";
744                 mgp->tx_boundary = 2048;
745                 myri10ge_dummy_rdma(mgp, 1);
746                 status = myri10ge_get_firmware_capabilities(mgp);
747                 return status;
748         }
749
750         /* clear confirmation addr */
751         mgp->cmd->data = 0;
752         mb();
753
754         /* send a reload command to the bootstrap MCP, and wait for the
755          *  response in the confirmation address.  The firmware should
756          * write a -1 there to indicate it is alive and well
757          */
758         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
759         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
760
761         buf[0] = htonl(dma_high);       /* confirm addr MSW */
762         buf[1] = htonl(dma_low);        /* confirm addr LSW */
763         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
764
765         /* FIX: All newest firmware should un-protect the bottom of
766          * the sram before handoff. However, the very first interfaces
767          * do not. Therefore the handoff copy must skip the first 8 bytes
768          */
769         buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
770         buf[4] = htonl(size - 8);       /* length of code */
771         buf[5] = htonl(8);      /* where to copy to */
772         buf[6] = htonl(0);      /* where to jump to */
773
774         submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
775
776         myri10ge_pio_copy(submit, &buf, sizeof(buf));
777         mb();
778         msleep(1);
779         mb();
780         i = 0;
781         while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 9) {
782                 msleep(1 << i);
783                 i++;
784         }
785         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
786                 dev_err(&mgp->pdev->dev, "handoff failed\n");
787                 return -ENXIO;
788         }
789         myri10ge_dummy_rdma(mgp, 1);
790         status = myri10ge_get_firmware_capabilities(mgp);
791
792         return status;
793 }
794
795 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
796 {
797         struct myri10ge_cmd cmd;
798         int status;
799
800         cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
801                      | (addr[2] << 8) | addr[3]);
802
803         cmd.data1 = ((addr[4] << 8) | (addr[5]));
804
805         status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
806         return status;
807 }
808
809 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
810 {
811         struct myri10ge_cmd cmd;
812         int status, ctl;
813
814         ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
815         status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
816
817         if (status) {
818                 printk(KERN_ERR
819                        "myri10ge: %s: Failed to set flow control mode\n",
820                        mgp->dev->name);
821                 return status;
822         }
823         mgp->pause = pause;
824         return 0;
825 }
826
827 static void
828 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
829 {
830         struct myri10ge_cmd cmd;
831         int status, ctl;
832
833         ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
834         status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
835         if (status)
836                 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
837                        mgp->dev->name);
838 }
839
840 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
841 {
842         struct myri10ge_cmd cmd;
843         int status;
844         u32 len;
845         struct page *dmatest_page;
846         dma_addr_t dmatest_bus;
847         char *test = " ";
848
849         dmatest_page = alloc_page(GFP_KERNEL);
850         if (!dmatest_page)
851                 return -ENOMEM;
852         dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
853                                    DMA_BIDIRECTIONAL);
854
855         /* Run a small DMA test.
856          * The magic multipliers to the length tell the firmware
857          * to do DMA read, write, or read+write tests.  The
858          * results are returned in cmd.data0.  The upper 16
859          * bits or the return is the number of transfers completed.
860          * The lower 16 bits is the time in 0.5us ticks that the
861          * transfers took to complete.
862          */
863
864         len = mgp->tx_boundary;
865
866         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
867         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
868         cmd.data2 = len * 0x10000;
869         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
870         if (status != 0) {
871                 test = "read";
872                 goto abort;
873         }
874         mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
875         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
876         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
877         cmd.data2 = len * 0x1;
878         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
879         if (status != 0) {
880                 test = "write";
881                 goto abort;
882         }
883         mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
884
885         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
886         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
887         cmd.data2 = len * 0x10001;
888         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
889         if (status != 0) {
890                 test = "read/write";
891                 goto abort;
892         }
893         mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
894             (cmd.data0 & 0xffff);
895
896 abort:
897         pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
898         put_page(dmatest_page);
899
900         if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
901                 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
902                          test, status);
903
904         return status;
905 }
906
907 static int myri10ge_reset(struct myri10ge_priv *mgp)
908 {
909         struct myri10ge_cmd cmd;
910         struct myri10ge_slice_state *ss;
911         int i, status;
912         size_t bytes;
913 #ifdef CONFIG_MYRI10GE_DCA
914         unsigned long dca_tag_off;
915 #endif
916
917         /* try to send a reset command to the card to see if it
918          * is alive */
919         memset(&cmd, 0, sizeof(cmd));
920         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
921         if (status != 0) {
922                 dev_err(&mgp->pdev->dev, "failed reset\n");
923                 return -ENXIO;
924         }
925
926         (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
927         /*
928          * Use non-ndis mcp_slot (eg, 4 bytes total,
929          * no toeplitz hash value returned.  Older firmware will
930          * not understand this command, but will use the correct
931          * sized mcp_slot, so we ignore error returns
932          */
933         cmd.data0 = MXGEFW_RSS_MCP_SLOT_TYPE_MIN;
934         (void)myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_MCP_SLOT_TYPE, &cmd, 0);
935
936         /* Now exchange information about interrupts  */
937
938         bytes = mgp->max_intr_slots * sizeof(*mgp->ss[0].rx_done.entry);
939         cmd.data0 = (u32) bytes;
940         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
941
942         /*
943          * Even though we already know how many slices are supported
944          * via myri10ge_probe_slices() MXGEFW_CMD_GET_MAX_RSS_QUEUES
945          * has magic side effects, and must be called after a reset.
946          * It must be called prior to calling any RSS related cmds,
947          * including assigning an interrupt queue for anything but
948          * slice 0.  It must also be called *after*
949          * MXGEFW_CMD_SET_INTRQ_SIZE, since the intrq size is used by
950          * the firmware to compute offsets.
951          */
952
953         if (mgp->num_slices > 1) {
954
955                 /* ask the maximum number of slices it supports */
956                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
957                                            &cmd, 0);
958                 if (status != 0) {
959                         dev_err(&mgp->pdev->dev,
960                                 "failed to get number of slices\n");
961                 }
962
963                 /*
964                  * MXGEFW_CMD_ENABLE_RSS_QUEUES must be called prior
965                  * to setting up the interrupt queue DMA
966                  */
967
968                 cmd.data0 = mgp->num_slices;
969                 cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
970                 if (mgp->dev->real_num_tx_queues > 1)
971                         cmd.data1 |= MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES;
972                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
973                                            &cmd, 0);
974
975                 /* Firmware older than 1.4.32 only supports multiple
976                  * RX queues, so if we get an error, first retry using a
977                  * single TX queue before giving up */
978                 if (status != 0 && mgp->dev->real_num_tx_queues > 1) {
979                         mgp->dev->real_num_tx_queues = 1;
980                         cmd.data0 = mgp->num_slices;
981                         cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
982                         status = myri10ge_send_cmd(mgp,
983                                                    MXGEFW_CMD_ENABLE_RSS_QUEUES,
984                                                    &cmd, 0);
985                 }
986
987                 if (status != 0) {
988                         dev_err(&mgp->pdev->dev,
989                                 "failed to set number of slices\n");
990
991                         return status;
992                 }
993         }
994         for (i = 0; i < mgp->num_slices; i++) {
995                 ss = &mgp->ss[i];
996                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->rx_done.bus);
997                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->rx_done.bus);
998                 cmd.data2 = i;
999                 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA,
1000                                             &cmd, 0);
1001         };
1002
1003         status |=
1004             myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
1005         for (i = 0; i < mgp->num_slices; i++) {
1006                 ss = &mgp->ss[i];
1007                 ss->irq_claim =
1008                     (__iomem __be32 *) (mgp->sram + cmd.data0 + 8 * i);
1009         }
1010         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
1011                                     &cmd, 0);
1012         mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
1013
1014         status |= myri10ge_send_cmd
1015             (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
1016         mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
1017         if (status != 0) {
1018                 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
1019                 return status;
1020         }
1021         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1022
1023 #ifdef CONFIG_MYRI10GE_DCA
1024         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_DCA_OFFSET, &cmd, 0);
1025         dca_tag_off = cmd.data0;
1026         for (i = 0; i < mgp->num_slices; i++) {
1027                 ss = &mgp->ss[i];
1028                 if (status == 0) {
1029                         ss->dca_tag = (__iomem __be32 *)
1030                             (mgp->sram + dca_tag_off + 4 * i);
1031                 } else {
1032                         ss->dca_tag = NULL;
1033                 }
1034         }
1035 #endif                          /* CONFIG_MYRI10GE_DCA */
1036
1037         /* reset mcp/driver shared state back to 0 */
1038
1039         mgp->link_changes = 0;
1040         for (i = 0; i < mgp->num_slices; i++) {
1041                 ss = &mgp->ss[i];
1042
1043                 memset(ss->rx_done.entry, 0, bytes);
1044                 ss->tx.req = 0;
1045                 ss->tx.done = 0;
1046                 ss->tx.pkt_start = 0;
1047                 ss->tx.pkt_done = 0;
1048                 ss->rx_big.cnt = 0;
1049                 ss->rx_small.cnt = 0;
1050                 ss->rx_done.idx = 0;
1051                 ss->rx_done.cnt = 0;
1052                 ss->tx.wake_queue = 0;
1053                 ss->tx.stop_queue = 0;
1054         }
1055
1056         status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
1057         myri10ge_change_pause(mgp, mgp->pause);
1058         myri10ge_set_multicast_list(mgp->dev);
1059         return status;
1060 }
1061
1062 #ifdef CONFIG_MYRI10GE_DCA
1063 static void
1064 myri10ge_write_dca(struct myri10ge_slice_state *ss, int cpu, int tag)
1065 {
1066         ss->cpu = cpu;
1067         ss->cached_dca_tag = tag;
1068         put_be32(htonl(tag), ss->dca_tag);
1069 }
1070
1071 static inline void myri10ge_update_dca(struct myri10ge_slice_state *ss)
1072 {
1073         int cpu = get_cpu();
1074         int tag;
1075
1076         if (cpu != ss->cpu) {
1077                 tag = dca_get_tag(cpu);
1078                 if (ss->cached_dca_tag != tag)
1079                         myri10ge_write_dca(ss, cpu, tag);
1080         }
1081         put_cpu();
1082 }
1083
1084 static void myri10ge_setup_dca(struct myri10ge_priv *mgp)
1085 {
1086         int err, i;
1087         struct pci_dev *pdev = mgp->pdev;
1088
1089         if (mgp->ss[0].dca_tag == NULL || mgp->dca_enabled)
1090                 return;
1091         if (!myri10ge_dca) {
1092                 dev_err(&pdev->dev, "dca disabled by administrator\n");
1093                 return;
1094         }
1095         err = dca_add_requester(&pdev->dev);
1096         if (err) {
1097                 if (err != -ENODEV)
1098                         dev_err(&pdev->dev,
1099                                 "dca_add_requester() failed, err=%d\n", err);
1100                 return;
1101         }
1102         mgp->dca_enabled = 1;
1103         for (i = 0; i < mgp->num_slices; i++)
1104                 myri10ge_write_dca(&mgp->ss[i], -1, 0);
1105 }
1106
1107 static void myri10ge_teardown_dca(struct myri10ge_priv *mgp)
1108 {
1109         struct pci_dev *pdev = mgp->pdev;
1110         int err;
1111
1112         if (!mgp->dca_enabled)
1113                 return;
1114         mgp->dca_enabled = 0;
1115         err = dca_remove_requester(&pdev->dev);
1116 }
1117
1118 static int myri10ge_notify_dca_device(struct device *dev, void *data)
1119 {
1120         struct myri10ge_priv *mgp;
1121         unsigned long event;
1122
1123         mgp = dev_get_drvdata(dev);
1124         event = *(unsigned long *)data;
1125
1126         if (event == DCA_PROVIDER_ADD)
1127                 myri10ge_setup_dca(mgp);
1128         else if (event == DCA_PROVIDER_REMOVE)
1129                 myri10ge_teardown_dca(mgp);
1130         return 0;
1131 }
1132 #endif                          /* CONFIG_MYRI10GE_DCA */
1133
1134 static inline void
1135 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
1136                     struct mcp_kreq_ether_recv *src)
1137 {
1138         __be32 low;
1139
1140         low = src->addr_low;
1141         src->addr_low = htonl(DMA_BIT_MASK(32));
1142         myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
1143         mb();
1144         myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
1145         mb();
1146         src->addr_low = low;
1147         put_be32(low, &dst->addr_low);
1148         mb();
1149 }
1150
1151 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
1152 {
1153         struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
1154
1155         if ((skb->protocol == htons(ETH_P_8021Q)) &&
1156             (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
1157              vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
1158                 skb->csum = hw_csum;
1159                 skb->ip_summed = CHECKSUM_COMPLETE;
1160         }
1161 }
1162
1163 static inline void
1164 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
1165                       struct skb_frag_struct *rx_frags, int len, int hlen)
1166 {
1167         struct skb_frag_struct *skb_frags;
1168
1169         skb->len = skb->data_len = len;
1170         skb->truesize = len + sizeof(struct sk_buff);
1171         /* attach the page(s) */
1172
1173         skb_frags = skb_shinfo(skb)->frags;
1174         while (len > 0) {
1175                 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
1176                 len -= rx_frags->size;
1177                 skb_frags++;
1178                 rx_frags++;
1179                 skb_shinfo(skb)->nr_frags++;
1180         }
1181
1182         /* pskb_may_pull is not available in irq context, but
1183          * skb_pull() (for ether_pad and eth_type_trans()) requires
1184          * the beginning of the packet in skb_headlen(), move it
1185          * manually */
1186         skb_copy_to_linear_data(skb, va, hlen);
1187         skb_shinfo(skb)->frags[0].page_offset += hlen;
1188         skb_shinfo(skb)->frags[0].size -= hlen;
1189         skb->data_len -= hlen;
1190         skb->tail += hlen;
1191         skb_pull(skb, MXGEFW_PAD);
1192 }
1193
1194 static void
1195 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
1196                         int bytes, int watchdog)
1197 {
1198         struct page *page;
1199         int idx;
1200
1201         if (unlikely(rx->watchdog_needed && !watchdog))
1202                 return;
1203
1204         /* try to refill entire ring */
1205         while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
1206                 idx = rx->fill_cnt & rx->mask;
1207                 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
1208                         /* we can use part of previous page */
1209                         get_page(rx->page);
1210                 } else {
1211                         /* we need a new page */
1212                         page =
1213                             alloc_pages(GFP_ATOMIC | __GFP_COMP,
1214                                         MYRI10GE_ALLOC_ORDER);
1215                         if (unlikely(page == NULL)) {
1216                                 if (rx->fill_cnt - rx->cnt < 16)
1217                                         rx->watchdog_needed = 1;
1218                                 return;
1219                         }
1220                         rx->page = page;
1221                         rx->page_offset = 0;
1222                         rx->bus = pci_map_page(mgp->pdev, page, 0,
1223                                                MYRI10GE_ALLOC_SIZE,
1224                                                PCI_DMA_FROMDEVICE);
1225                 }
1226                 rx->info[idx].page = rx->page;
1227                 rx->info[idx].page_offset = rx->page_offset;
1228                 /* note that this is the address of the start of the
1229                  * page */
1230                 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
1231                 rx->shadow[idx].addr_low =
1232                     htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
1233                 rx->shadow[idx].addr_high =
1234                     htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
1235
1236                 /* start next packet on a cacheline boundary */
1237                 rx->page_offset += SKB_DATA_ALIGN(bytes);
1238
1239 #if MYRI10GE_ALLOC_SIZE > 4096
1240                 /* don't cross a 4KB boundary */
1241                 if ((rx->page_offset >> 12) !=
1242                     ((rx->page_offset + bytes - 1) >> 12))
1243                         rx->page_offset = (rx->page_offset + 4096) & ~4095;
1244 #endif
1245                 rx->fill_cnt++;
1246
1247                 /* copy 8 descriptors to the firmware at a time */
1248                 if ((idx & 7) == 7) {
1249                         myri10ge_submit_8rx(&rx->lanai[idx - 7],
1250                                             &rx->shadow[idx - 7]);
1251                 }
1252         }
1253 }
1254
1255 static inline void
1256 myri10ge_unmap_rx_page(struct pci_dev *pdev,
1257                        struct myri10ge_rx_buffer_state *info, int bytes)
1258 {
1259         /* unmap the recvd page if we're the only or last user of it */
1260         if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1261             (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1262                 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1263                                       & ~(MYRI10GE_ALLOC_SIZE - 1)),
1264                                MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1265         }
1266 }
1267
1268 #define MYRI10GE_HLEN 64        /* The number of bytes to copy from a
1269                                  * page into an skb */
1270
1271 static inline int
1272 myri10ge_rx_done(struct myri10ge_slice_state *ss, struct myri10ge_rx_buf *rx,
1273                  int bytes, int len, __wsum csum)
1274 {
1275         struct myri10ge_priv *mgp = ss->mgp;
1276         struct sk_buff *skb;
1277         struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1278         int i, idx, hlen, remainder;
1279         struct pci_dev *pdev = mgp->pdev;
1280         struct net_device *dev = mgp->dev;
1281         u8 *va;
1282
1283         len += MXGEFW_PAD;
1284         idx = rx->cnt & rx->mask;
1285         va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1286         prefetch(va);
1287         /* Fill skb_frag_struct(s) with data from our receive */
1288         for (i = 0, remainder = len; remainder > 0; i++) {
1289                 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1290                 rx_frags[i].page = rx->info[idx].page;
1291                 rx_frags[i].page_offset = rx->info[idx].page_offset;
1292                 if (remainder < MYRI10GE_ALLOC_SIZE)
1293                         rx_frags[i].size = remainder;
1294                 else
1295                         rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1296                 rx->cnt++;
1297                 idx = rx->cnt & rx->mask;
1298                 remainder -= MYRI10GE_ALLOC_SIZE;
1299         }
1300
1301         if (dev->features & NETIF_F_LRO) {
1302                 rx_frags[0].page_offset += MXGEFW_PAD;
1303                 rx_frags[0].size -= MXGEFW_PAD;
1304                 len -= MXGEFW_PAD;
1305                 lro_receive_frags(&ss->rx_done.lro_mgr, rx_frags,
1306                                   /* opaque, will come back in get_frag_header */
1307                                   len, len,
1308                                   (void *)(__force unsigned long)csum, csum);
1309
1310                 return 1;
1311         }
1312
1313         hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1314
1315         /* allocate an skb to attach the page(s) to. This is done
1316          * after trying LRO, so as to avoid skb allocation overheads */
1317
1318         skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1319         if (unlikely(skb == NULL)) {
1320                 ss->stats.rx_dropped++;
1321                 do {
1322                         i--;
1323                         put_page(rx_frags[i].page);
1324                 } while (i != 0);
1325                 return 0;
1326         }
1327
1328         /* Attach the pages to the skb, and trim off any padding */
1329         myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1330         if (skb_shinfo(skb)->frags[0].size <= 0) {
1331                 put_page(skb_shinfo(skb)->frags[0].page);
1332                 skb_shinfo(skb)->nr_frags = 0;
1333         }
1334         skb->protocol = eth_type_trans(skb, dev);
1335         skb_record_rx_queue(skb, ss - &mgp->ss[0]);
1336
1337         if (mgp->csum_flag) {
1338                 if ((skb->protocol == htons(ETH_P_IP)) ||
1339                     (skb->protocol == htons(ETH_P_IPV6))) {
1340                         skb->csum = csum;
1341                         skb->ip_summed = CHECKSUM_COMPLETE;
1342                 } else
1343                         myri10ge_vlan_ip_csum(skb, csum);
1344         }
1345         netif_receive_skb(skb);
1346         return 1;
1347 }
1348
1349 static inline void
1350 myri10ge_tx_done(struct myri10ge_slice_state *ss, int mcp_index)
1351 {
1352         struct pci_dev *pdev = ss->mgp->pdev;
1353         struct myri10ge_tx_buf *tx = &ss->tx;
1354         struct netdev_queue *dev_queue;
1355         struct sk_buff *skb;
1356         int idx, len;
1357
1358         while (tx->pkt_done != mcp_index) {
1359                 idx = tx->done & tx->mask;
1360                 skb = tx->info[idx].skb;
1361
1362                 /* Mark as free */
1363                 tx->info[idx].skb = NULL;
1364                 if (tx->info[idx].last) {
1365                         tx->pkt_done++;
1366                         tx->info[idx].last = 0;
1367                 }
1368                 tx->done++;
1369                 len = pci_unmap_len(&tx->info[idx], len);
1370                 pci_unmap_len_set(&tx->info[idx], len, 0);
1371                 if (skb) {
1372                         ss->stats.tx_bytes += skb->len;
1373                         ss->stats.tx_packets++;
1374                         dev_kfree_skb_irq(skb);
1375                         if (len)
1376                                 pci_unmap_single(pdev,
1377                                                  pci_unmap_addr(&tx->info[idx],
1378                                                                 bus), len,
1379                                                  PCI_DMA_TODEVICE);
1380                 } else {
1381                         if (len)
1382                                 pci_unmap_page(pdev,
1383                                                pci_unmap_addr(&tx->info[idx],
1384                                                               bus), len,
1385                                                PCI_DMA_TODEVICE);
1386                 }
1387         }
1388
1389         dev_queue = netdev_get_tx_queue(ss->dev, ss - ss->mgp->ss);
1390         /*
1391          * Make a minimal effort to prevent the NIC from polling an
1392          * idle tx queue.  If we can't get the lock we leave the queue
1393          * active. In this case, either a thread was about to start
1394          * using the queue anyway, or we lost a race and the NIC will
1395          * waste some of its resources polling an inactive queue for a
1396          * while.
1397          */
1398
1399         if ((ss->mgp->dev->real_num_tx_queues > 1) &&
1400             __netif_tx_trylock(dev_queue)) {
1401                 if (tx->req == tx->done) {
1402                         tx->queue_active = 0;
1403                         put_be32(htonl(1), tx->send_stop);
1404                         mb();
1405                         mmiowb();
1406                 }
1407                 __netif_tx_unlock(dev_queue);
1408         }
1409
1410         /* start the queue if we've stopped it */
1411         if (netif_tx_queue_stopped(dev_queue)
1412             && tx->req - tx->done < (tx->mask >> 1)) {
1413                 tx->wake_queue++;
1414                 netif_tx_wake_queue(dev_queue);
1415         }
1416 }
1417
1418 static inline int
1419 myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1420 {
1421         struct myri10ge_rx_done *rx_done = &ss->rx_done;
1422         struct myri10ge_priv *mgp = ss->mgp;
1423         struct net_device *netdev = mgp->dev;
1424         unsigned long rx_bytes = 0;
1425         unsigned long rx_packets = 0;
1426         unsigned long rx_ok;
1427
1428         int idx = rx_done->idx;
1429         int cnt = rx_done->cnt;
1430         int work_done = 0;
1431         u16 length;
1432         __wsum checksum;
1433
1434         while (rx_done->entry[idx].length != 0 && work_done < budget) {
1435                 length = ntohs(rx_done->entry[idx].length);
1436                 rx_done->entry[idx].length = 0;
1437                 checksum = csum_unfold(rx_done->entry[idx].checksum);
1438                 if (length <= mgp->small_bytes)
1439                         rx_ok = myri10ge_rx_done(ss, &ss->rx_small,
1440                                                  mgp->small_bytes,
1441                                                  length, checksum);
1442                 else
1443                         rx_ok = myri10ge_rx_done(ss, &ss->rx_big,
1444                                                  mgp->big_bytes,
1445                                                  length, checksum);
1446                 rx_packets += rx_ok;
1447                 rx_bytes += rx_ok * (unsigned long)length;
1448                 cnt++;
1449                 idx = cnt & (mgp->max_intr_slots - 1);
1450                 work_done++;
1451         }
1452         rx_done->idx = idx;
1453         rx_done->cnt = cnt;
1454         ss->stats.rx_packets += rx_packets;
1455         ss->stats.rx_bytes += rx_bytes;
1456
1457         if (netdev->features & NETIF_F_LRO)
1458                 lro_flush_all(&rx_done->lro_mgr);
1459
1460         /* restock receive rings if needed */
1461         if (ss->rx_small.fill_cnt - ss->rx_small.cnt < myri10ge_fill_thresh)
1462                 myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1463                                         mgp->small_bytes + MXGEFW_PAD, 0);
1464         if (ss->rx_big.fill_cnt - ss->rx_big.cnt < myri10ge_fill_thresh)
1465                 myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1466
1467         return work_done;
1468 }
1469
1470 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1471 {
1472         struct mcp_irq_data *stats = mgp->ss[0].fw_stats;
1473
1474         if (unlikely(stats->stats_updated)) {
1475                 unsigned link_up = ntohl(stats->link_up);
1476                 if (mgp->link_state != link_up) {
1477                         mgp->link_state = link_up;
1478
1479                         if (mgp->link_state == MXGEFW_LINK_UP) {
1480                                 if (netif_msg_link(mgp))
1481                                         printk(KERN_INFO
1482                                                "myri10ge: %s: link up\n",
1483                                                mgp->dev->name);
1484                                 netif_carrier_on(mgp->dev);
1485                                 mgp->link_changes++;
1486                         } else {
1487                                 if (netif_msg_link(mgp))
1488                                         printk(KERN_INFO
1489                                                "myri10ge: %s: link %s\n",
1490                                                mgp->dev->name,
1491                                                (link_up == MXGEFW_LINK_MYRINET ?
1492                                                 "mismatch (Myrinet detected)" :
1493                                                 "down"));
1494                                 netif_carrier_off(mgp->dev);
1495                                 mgp->link_changes++;
1496                         }
1497                 }
1498                 if (mgp->rdma_tags_available !=
1499                     ntohl(stats->rdma_tags_available)) {
1500                         mgp->rdma_tags_available =
1501                             ntohl(stats->rdma_tags_available);
1502                         printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1503                                "%d tags left\n", mgp->dev->name,
1504                                mgp->rdma_tags_available);
1505                 }
1506                 mgp->down_cnt += stats->link_down;
1507                 if (stats->link_down)
1508                         wake_up(&mgp->down_wq);
1509         }
1510 }
1511
1512 static int myri10ge_poll(struct napi_struct *napi, int budget)
1513 {
1514         struct myri10ge_slice_state *ss =
1515             container_of(napi, struct myri10ge_slice_state, napi);
1516         int work_done;
1517
1518 #ifdef CONFIG_MYRI10GE_DCA
1519         if (ss->mgp->dca_enabled)
1520                 myri10ge_update_dca(ss);
1521 #endif
1522
1523         /* process as many rx events as NAPI will allow */
1524         work_done = myri10ge_clean_rx_done(ss, budget);
1525
1526         if (work_done < budget) {
1527                 napi_complete(napi);
1528                 put_be32(htonl(3), ss->irq_claim);
1529         }
1530         return work_done;
1531 }
1532
1533 static irqreturn_t myri10ge_intr(int irq, void *arg)
1534 {
1535         struct myri10ge_slice_state *ss = arg;
1536         struct myri10ge_priv *mgp = ss->mgp;
1537         struct mcp_irq_data *stats = ss->fw_stats;
1538         struct myri10ge_tx_buf *tx = &ss->tx;
1539         u32 send_done_count;
1540         int i;
1541
1542         /* an interrupt on a non-zero receive-only slice is implicitly
1543          * valid  since MSI-X irqs are not shared */
1544         if ((mgp->dev->real_num_tx_queues == 1) && (ss != mgp->ss)) {
1545                 napi_schedule(&ss->napi);
1546                 return (IRQ_HANDLED);
1547         }
1548
1549         /* make sure it is our IRQ, and that the DMA has finished */
1550         if (unlikely(!stats->valid))
1551                 return (IRQ_NONE);
1552
1553         /* low bit indicates receives are present, so schedule
1554          * napi poll handler */
1555         if (stats->valid & 1)
1556                 napi_schedule(&ss->napi);
1557
1558         if (!mgp->msi_enabled && !mgp->msix_enabled) {
1559                 put_be32(0, mgp->irq_deassert);
1560                 if (!myri10ge_deassert_wait)
1561                         stats->valid = 0;
1562                 mb();
1563         } else
1564                 stats->valid = 0;
1565
1566         /* Wait for IRQ line to go low, if using INTx */
1567         i = 0;
1568         while (1) {
1569                 i++;
1570                 /* check for transmit completes and receives */
1571                 send_done_count = ntohl(stats->send_done_count);
1572                 if (send_done_count != tx->pkt_done)
1573                         myri10ge_tx_done(ss, (int)send_done_count);
1574                 if (unlikely(i > myri10ge_max_irq_loops)) {
1575                         printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1576                                mgp->dev->name);
1577                         stats->valid = 0;
1578                         schedule_work(&mgp->watchdog_work);
1579                 }
1580                 if (likely(stats->valid == 0))
1581                         break;
1582                 cpu_relax();
1583                 barrier();
1584         }
1585
1586         /* Only slice 0 updates stats */
1587         if (ss == mgp->ss)
1588                 myri10ge_check_statblock(mgp);
1589
1590         put_be32(htonl(3), ss->irq_claim + 1);
1591         return (IRQ_HANDLED);
1592 }
1593
1594 static int
1595 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1596 {
1597         struct myri10ge_priv *mgp = netdev_priv(netdev);
1598         char *ptr;
1599         int i;
1600
1601         cmd->autoneg = AUTONEG_DISABLE;
1602         cmd->speed = SPEED_10000;
1603         cmd->duplex = DUPLEX_FULL;
1604
1605         /*
1606          * parse the product code to deterimine the interface type
1607          * (CX4, XFP, Quad Ribbon Fiber) by looking at the character
1608          * after the 3rd dash in the driver's cached copy of the
1609          * EEPROM's product code string.
1610          */
1611         ptr = mgp->product_code_string;
1612         if (ptr == NULL) {
1613                 printk(KERN_ERR "myri10ge: %s: Missing product code\n",
1614                        netdev->name);
1615                 return 0;
1616         }
1617         for (i = 0; i < 3; i++, ptr++) {
1618                 ptr = strchr(ptr, '-');
1619                 if (ptr == NULL) {
1620                         printk(KERN_ERR "myri10ge: %s: Invalid product "
1621                                "code %s\n", netdev->name,
1622                                mgp->product_code_string);
1623                         return 0;
1624                 }
1625         }
1626         if (*ptr == '2')
1627                 ptr++;
1628         if (*ptr == 'R' || *ptr == 'Q' || *ptr == 'S') {
1629                 /* We've found either an XFP, quad ribbon fiber, or SFP+ */
1630                 cmd->port = PORT_FIBRE;
1631                 cmd->supported |= SUPPORTED_FIBRE;
1632                 cmd->advertising |= ADVERTISED_FIBRE;
1633         } else {
1634                 cmd->port = PORT_OTHER;
1635         }
1636         if (*ptr == 'R' || *ptr == 'S')
1637                 cmd->transceiver = XCVR_EXTERNAL;
1638         else
1639                 cmd->transceiver = XCVR_INTERNAL;
1640
1641         return 0;
1642 }
1643
1644 static void
1645 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1646 {
1647         struct myri10ge_priv *mgp = netdev_priv(netdev);
1648
1649         strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1650         strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1651         strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1652         strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1653 }
1654
1655 static int
1656 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1657 {
1658         struct myri10ge_priv *mgp = netdev_priv(netdev);
1659
1660         coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1661         return 0;
1662 }
1663
1664 static int
1665 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1666 {
1667         struct myri10ge_priv *mgp = netdev_priv(netdev);
1668
1669         mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1670         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1671         return 0;
1672 }
1673
1674 static void
1675 myri10ge_get_pauseparam(struct net_device *netdev,
1676                         struct ethtool_pauseparam *pause)
1677 {
1678         struct myri10ge_priv *mgp = netdev_priv(netdev);
1679
1680         pause->autoneg = 0;
1681         pause->rx_pause = mgp->pause;
1682         pause->tx_pause = mgp->pause;
1683 }
1684
1685 static int
1686 myri10ge_set_pauseparam(struct net_device *netdev,
1687                         struct ethtool_pauseparam *pause)
1688 {
1689         struct myri10ge_priv *mgp = netdev_priv(netdev);
1690
1691         if (pause->tx_pause != mgp->pause)
1692                 return myri10ge_change_pause(mgp, pause->tx_pause);
1693         if (pause->rx_pause != mgp->pause)
1694                 return myri10ge_change_pause(mgp, pause->tx_pause);
1695         if (pause->autoneg != 0)
1696                 return -EINVAL;
1697         return 0;
1698 }
1699
1700 static void
1701 myri10ge_get_ringparam(struct net_device *netdev,
1702                        struct ethtool_ringparam *ring)
1703 {
1704         struct myri10ge_priv *mgp = netdev_priv(netdev);
1705
1706         ring->rx_mini_max_pending = mgp->ss[0].rx_small.mask + 1;
1707         ring->rx_max_pending = mgp->ss[0].rx_big.mask + 1;
1708         ring->rx_jumbo_max_pending = 0;
1709         ring->tx_max_pending = mgp->ss[0].tx.mask + 1;
1710         ring->rx_mini_pending = ring->rx_mini_max_pending;
1711         ring->rx_pending = ring->rx_max_pending;
1712         ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1713         ring->tx_pending = ring->tx_max_pending;
1714 }
1715
1716 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1717 {
1718         struct myri10ge_priv *mgp = netdev_priv(netdev);
1719
1720         if (mgp->csum_flag)
1721                 return 1;
1722         else
1723                 return 0;
1724 }
1725
1726 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1727 {
1728         struct myri10ge_priv *mgp = netdev_priv(netdev);
1729         int err = 0;
1730
1731         if (csum_enabled)
1732                 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1733         else {
1734                 u32 flags = ethtool_op_get_flags(netdev);
1735                 err = ethtool_op_set_flags(netdev, (flags & ~ETH_FLAG_LRO));
1736                 mgp->csum_flag = 0;
1737
1738         }
1739         return err;
1740 }
1741
1742 static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1743 {
1744         struct myri10ge_priv *mgp = netdev_priv(netdev);
1745         unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1746
1747         if (tso_enabled)
1748                 netdev->features |= flags;
1749         else
1750                 netdev->features &= ~flags;
1751         return 0;
1752 }
1753
1754 static const char myri10ge_gstrings_main_stats[][ETH_GSTRING_LEN] = {
1755         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1756         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1757         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1758         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1759         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1760         "tx_heartbeat_errors", "tx_window_errors",
1761         /* device-specific stats */
1762         "tx_boundary", "WC", "irq", "MSI", "MSIX",
1763         "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1764         "serial_number", "watchdog_resets",
1765 #ifdef CONFIG_MYRI10GE_DCA
1766         "dca_capable_firmware", "dca_device_present",
1767 #endif
1768         "link_changes", "link_up", "dropped_link_overflow",
1769         "dropped_link_error_or_filtered",
1770         "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1771         "dropped_unicast_filtered", "dropped_multicast_filtered",
1772         "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1773         "dropped_no_big_buffer"
1774 };
1775
1776 static const char myri10ge_gstrings_slice_stats[][ETH_GSTRING_LEN] = {
1777         "----------- slice ---------",
1778         "tx_pkt_start", "tx_pkt_done", "tx_req", "tx_done",
1779         "rx_small_cnt", "rx_big_cnt",
1780         "wake_queue", "stop_queue", "tx_linearized", "LRO aggregated",
1781             "LRO flushed",
1782         "LRO avg aggr", "LRO no_desc"
1783 };
1784
1785 #define MYRI10GE_NET_STATS_LEN      21
1786 #define MYRI10GE_MAIN_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_main_stats)
1787 #define MYRI10GE_SLICE_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_slice_stats)
1788
1789 static void
1790 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1791 {
1792         struct myri10ge_priv *mgp = netdev_priv(netdev);
1793         int i;
1794
1795         switch (stringset) {
1796         case ETH_SS_STATS:
1797                 memcpy(data, *myri10ge_gstrings_main_stats,
1798                        sizeof(myri10ge_gstrings_main_stats));
1799                 data += sizeof(myri10ge_gstrings_main_stats);
1800                 for (i = 0; i < mgp->num_slices; i++) {
1801                         memcpy(data, *myri10ge_gstrings_slice_stats,
1802                                sizeof(myri10ge_gstrings_slice_stats));
1803                         data += sizeof(myri10ge_gstrings_slice_stats);
1804                 }
1805                 break;
1806         }
1807 }
1808
1809 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1810 {
1811         struct myri10ge_priv *mgp = netdev_priv(netdev);
1812
1813         switch (sset) {
1814         case ETH_SS_STATS:
1815                 return MYRI10GE_MAIN_STATS_LEN +
1816                     mgp->num_slices * MYRI10GE_SLICE_STATS_LEN;
1817         default:
1818                 return -EOPNOTSUPP;
1819         }
1820 }
1821
1822 static void
1823 myri10ge_get_ethtool_stats(struct net_device *netdev,
1824                            struct ethtool_stats *stats, u64 * data)
1825 {
1826         struct myri10ge_priv *mgp = netdev_priv(netdev);
1827         struct myri10ge_slice_state *ss;
1828         int slice;
1829         int i;
1830
1831         /* force stats update */
1832         (void)myri10ge_get_stats(netdev);
1833         for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1834                 data[i] = ((unsigned long *)&netdev->stats)[i];
1835
1836         data[i++] = (unsigned int)mgp->tx_boundary;
1837         data[i++] = (unsigned int)mgp->wc_enabled;
1838         data[i++] = (unsigned int)mgp->pdev->irq;
1839         data[i++] = (unsigned int)mgp->msi_enabled;
1840         data[i++] = (unsigned int)mgp->msix_enabled;
1841         data[i++] = (unsigned int)mgp->read_dma;
1842         data[i++] = (unsigned int)mgp->write_dma;
1843         data[i++] = (unsigned int)mgp->read_write_dma;
1844         data[i++] = (unsigned int)mgp->serial_number;
1845         data[i++] = (unsigned int)mgp->watchdog_resets;
1846 #ifdef CONFIG_MYRI10GE_DCA
1847         data[i++] = (unsigned int)(mgp->ss[0].dca_tag != NULL);
1848         data[i++] = (unsigned int)(mgp->dca_enabled);
1849 #endif
1850         data[i++] = (unsigned int)mgp->link_changes;
1851
1852         /* firmware stats are useful only in the first slice */
1853         ss = &mgp->ss[0];
1854         data[i++] = (unsigned int)ntohl(ss->fw_stats->link_up);
1855         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_link_overflow);
1856         data[i++] =
1857             (unsigned int)ntohl(ss->fw_stats->dropped_link_error_or_filtered);
1858         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_pause);
1859         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_phy);
1860         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_crc32);
1861         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_unicast_filtered);
1862         data[i++] =
1863             (unsigned int)ntohl(ss->fw_stats->dropped_multicast_filtered);
1864         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_runt);
1865         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_overrun);
1866         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_small_buffer);
1867         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_big_buffer);
1868
1869         for (slice = 0; slice < mgp->num_slices; slice++) {
1870                 ss = &mgp->ss[slice];
1871                 data[i++] = slice;
1872                 data[i++] = (unsigned int)ss->tx.pkt_start;
1873                 data[i++] = (unsigned int)ss->tx.pkt_done;
1874                 data[i++] = (unsigned int)ss->tx.req;
1875                 data[i++] = (unsigned int)ss->tx.done;
1876                 data[i++] = (unsigned int)ss->rx_small.cnt;
1877                 data[i++] = (unsigned int)ss->rx_big.cnt;
1878                 data[i++] = (unsigned int)ss->tx.wake_queue;
1879                 data[i++] = (unsigned int)ss->tx.stop_queue;
1880                 data[i++] = (unsigned int)ss->tx.linearized;
1881                 data[i++] = ss->rx_done.lro_mgr.stats.aggregated;
1882                 data[i++] = ss->rx_done.lro_mgr.stats.flushed;
1883                 if (ss->rx_done.lro_mgr.stats.flushed)
1884                         data[i++] = ss->rx_done.lro_mgr.stats.aggregated /
1885                             ss->rx_done.lro_mgr.stats.flushed;
1886                 else
1887                         data[i++] = 0;
1888                 data[i++] = ss->rx_done.lro_mgr.stats.no_desc;
1889         }
1890 }
1891
1892 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1893 {
1894         struct myri10ge_priv *mgp = netdev_priv(netdev);
1895         mgp->msg_enable = value;
1896 }
1897
1898 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1899 {
1900         struct myri10ge_priv *mgp = netdev_priv(netdev);
1901         return mgp->msg_enable;
1902 }
1903
1904 static const struct ethtool_ops myri10ge_ethtool_ops = {
1905         .get_settings = myri10ge_get_settings,
1906         .get_drvinfo = myri10ge_get_drvinfo,
1907         .get_coalesce = myri10ge_get_coalesce,
1908         .set_coalesce = myri10ge_set_coalesce,
1909         .get_pauseparam = myri10ge_get_pauseparam,
1910         .set_pauseparam = myri10ge_set_pauseparam,
1911         .get_ringparam = myri10ge_get_ringparam,
1912         .get_rx_csum = myri10ge_get_rx_csum,
1913         .set_rx_csum = myri10ge_set_rx_csum,
1914         .set_tx_csum = ethtool_op_set_tx_hw_csum,
1915         .set_sg = ethtool_op_set_sg,
1916         .set_tso = myri10ge_set_tso,
1917         .get_link = ethtool_op_get_link,
1918         .get_strings = myri10ge_get_strings,
1919         .get_sset_count = myri10ge_get_sset_count,
1920         .get_ethtool_stats = myri10ge_get_ethtool_stats,
1921         .set_msglevel = myri10ge_set_msglevel,
1922         .get_msglevel = myri10ge_get_msglevel,
1923         .get_flags = ethtool_op_get_flags,
1924         .set_flags = ethtool_op_set_flags
1925 };
1926
1927 static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss)
1928 {
1929         struct myri10ge_priv *mgp = ss->mgp;
1930         struct myri10ge_cmd cmd;
1931         struct net_device *dev = mgp->dev;
1932         int tx_ring_size, rx_ring_size;
1933         int tx_ring_entries, rx_ring_entries;
1934         int i, slice, status;
1935         size_t bytes;
1936
1937         /* get ring sizes */
1938         slice = ss - mgp->ss;
1939         cmd.data0 = slice;
1940         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1941         tx_ring_size = cmd.data0;
1942         cmd.data0 = slice;
1943         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1944         if (status != 0)
1945                 return status;
1946         rx_ring_size = cmd.data0;
1947
1948         tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1949         rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1950         ss->tx.mask = tx_ring_entries - 1;
1951         ss->rx_small.mask = ss->rx_big.mask = rx_ring_entries - 1;
1952
1953         status = -ENOMEM;
1954
1955         /* allocate the host shadow rings */
1956
1957         bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1958             * sizeof(*ss->tx.req_list);
1959         ss->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1960         if (ss->tx.req_bytes == NULL)
1961                 goto abort_with_nothing;
1962
1963         /* ensure req_list entries are aligned to 8 bytes */
1964         ss->tx.req_list = (struct mcp_kreq_ether_send *)
1965             ALIGN((unsigned long)ss->tx.req_bytes, 8);
1966         ss->tx.queue_active = 0;
1967
1968         bytes = rx_ring_entries * sizeof(*ss->rx_small.shadow);
1969         ss->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1970         if (ss->rx_small.shadow == NULL)
1971                 goto abort_with_tx_req_bytes;
1972
1973         bytes = rx_ring_entries * sizeof(*ss->rx_big.shadow);
1974         ss->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1975         if (ss->rx_big.shadow == NULL)
1976                 goto abort_with_rx_small_shadow;
1977
1978         /* allocate the host info rings */
1979
1980         bytes = tx_ring_entries * sizeof(*ss->tx.info);
1981         ss->tx.info = kzalloc(bytes, GFP_KERNEL);
1982         if (ss->tx.info == NULL)
1983                 goto abort_with_rx_big_shadow;
1984
1985         bytes = rx_ring_entries * sizeof(*ss->rx_small.info);
1986         ss->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1987         if (ss->rx_small.info == NULL)
1988                 goto abort_with_tx_info;
1989
1990         bytes = rx_ring_entries * sizeof(*ss->rx_big.info);
1991         ss->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1992         if (ss->rx_big.info == NULL)
1993                 goto abort_with_rx_small_info;
1994
1995         /* Fill the receive rings */
1996         ss->rx_big.cnt = 0;
1997         ss->rx_small.cnt = 0;
1998         ss->rx_big.fill_cnt = 0;
1999         ss->rx_small.fill_cnt = 0;
2000         ss->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
2001         ss->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
2002         ss->rx_small.watchdog_needed = 0;
2003         ss->rx_big.watchdog_needed = 0;
2004         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
2005                                 mgp->small_bytes + MXGEFW_PAD, 0);
2006
2007         if (ss->rx_small.fill_cnt < ss->rx_small.mask + 1) {
2008                 printk(KERN_ERR
2009                        "myri10ge: %s:slice-%d: alloced only %d small bufs\n",
2010                        dev->name, slice, ss->rx_small.fill_cnt);
2011                 goto abort_with_rx_small_ring;
2012         }
2013
2014         myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
2015         if (ss->rx_big.fill_cnt < ss->rx_big.mask + 1) {
2016                 printk(KERN_ERR
2017                        "myri10ge: %s:slice-%d: alloced only %d big bufs\n",
2018                        dev->name, slice, ss->rx_big.fill_cnt);
2019                 goto abort_with_rx_big_ring;
2020         }
2021
2022         return 0;
2023
2024 abort_with_rx_big_ring:
2025         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
2026                 int idx = i & ss->rx_big.mask;
2027                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
2028                                        mgp->big_bytes);
2029                 put_page(ss->rx_big.info[idx].page);
2030         }
2031
2032 abort_with_rx_small_ring:
2033         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
2034                 int idx = i & ss->rx_small.mask;
2035                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
2036                                        mgp->small_bytes + MXGEFW_PAD);
2037                 put_page(ss->rx_small.info[idx].page);
2038         }
2039
2040         kfree(ss->rx_big.info);
2041
2042 abort_with_rx_small_info:
2043         kfree(ss->rx_small.info);
2044
2045 abort_with_tx_info:
2046         kfree(ss->tx.info);
2047
2048 abort_with_rx_big_shadow:
2049         kfree(ss->rx_big.shadow);
2050
2051 abort_with_rx_small_shadow:
2052         kfree(ss->rx_small.shadow);
2053
2054 abort_with_tx_req_bytes:
2055         kfree(ss->tx.req_bytes);
2056         ss->tx.req_bytes = NULL;
2057         ss->tx.req_list = NULL;
2058
2059 abort_with_nothing:
2060         return status;
2061 }
2062
2063 static void myri10ge_free_rings(struct myri10ge_slice_state *ss)
2064 {
2065         struct myri10ge_priv *mgp = ss->mgp;
2066         struct sk_buff *skb;
2067         struct myri10ge_tx_buf *tx;
2068         int i, len, idx;
2069
2070         /* If not allocated, skip it */
2071         if (ss->tx.req_list == NULL)
2072                 return;
2073
2074         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
2075                 idx = i & ss->rx_big.mask;
2076                 if (i == ss->rx_big.fill_cnt - 1)
2077                         ss->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
2078                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
2079                                        mgp->big_bytes);
2080                 put_page(ss->rx_big.info[idx].page);
2081         }
2082
2083         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
2084                 idx = i & ss->rx_small.mask;
2085                 if (i == ss->rx_small.fill_cnt - 1)
2086                         ss->rx_small.info[idx].page_offset =
2087                             MYRI10GE_ALLOC_SIZE;
2088                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
2089                                        mgp->small_bytes + MXGEFW_PAD);
2090                 put_page(ss->rx_small.info[idx].page);
2091         }
2092         tx = &ss->tx;
2093         while (tx->done != tx->req) {
2094                 idx = tx->done & tx->mask;
2095                 skb = tx->info[idx].skb;
2096
2097                 /* Mark as free */
2098                 tx->info[idx].skb = NULL;
2099                 tx->done++;
2100                 len = pci_unmap_len(&tx->info[idx], len);
2101                 pci_unmap_len_set(&tx->info[idx], len, 0);
2102                 if (skb) {
2103                         ss->stats.tx_dropped++;
2104                         dev_kfree_skb_any(skb);
2105                         if (len)
2106                                 pci_unmap_single(mgp->pdev,
2107                                                  pci_unmap_addr(&tx->info[idx],
2108                                                                 bus), len,
2109                                                  PCI_DMA_TODEVICE);
2110                 } else {
2111                         if (len)
2112                                 pci_unmap_page(mgp->pdev,
2113                                                pci_unmap_addr(&tx->info[idx],
2114                                                               bus), len,
2115                                                PCI_DMA_TODEVICE);
2116                 }
2117         }
2118         kfree(ss->rx_big.info);
2119
2120         kfree(ss->rx_small.info);
2121
2122         kfree(ss->tx.info);
2123
2124         kfree(ss->rx_big.shadow);
2125
2126         kfree(ss->rx_small.shadow);
2127
2128         kfree(ss->tx.req_bytes);
2129         ss->tx.req_bytes = NULL;
2130         ss->tx.req_list = NULL;
2131 }
2132
2133 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
2134 {
2135         struct pci_dev *pdev = mgp->pdev;
2136         struct myri10ge_slice_state *ss;
2137         struct net_device *netdev = mgp->dev;
2138         int i;
2139         int status;
2140
2141         mgp->msi_enabled = 0;
2142         mgp->msix_enabled = 0;
2143         status = 0;
2144         if (myri10ge_msi) {
2145                 if (mgp->num_slices > 1) {
2146                         status =
2147                             pci_enable_msix(pdev, mgp->msix_vectors,
2148                                             mgp->num_slices);
2149                         if (status == 0) {
2150                                 mgp->msix_enabled = 1;
2151                         } else {
2152                                 dev_err(&pdev->dev,
2153                                         "Error %d setting up MSI-X\n", status);
2154                                 return status;
2155                         }
2156                 }
2157                 if (mgp->msix_enabled == 0) {
2158                         status = pci_enable_msi(pdev);
2159                         if (status != 0) {
2160                                 dev_err(&pdev->dev,
2161                                         "Error %d setting up MSI; falling back to xPIC\n",
2162                                         status);
2163                         } else {
2164                                 mgp->msi_enabled = 1;
2165                         }
2166                 }
2167         }
2168         if (mgp->msix_enabled) {
2169                 for (i = 0; i < mgp->num_slices; i++) {
2170                         ss = &mgp->ss[i];
2171                         snprintf(ss->irq_desc, sizeof(ss->irq_desc),
2172                                  "%s:slice-%d", netdev->name, i);
2173                         status = request_irq(mgp->msix_vectors[i].vector,
2174                                              myri10ge_intr, 0, ss->irq_desc,
2175                                              ss);
2176                         if (status != 0) {
2177                                 dev_err(&pdev->dev,
2178                                         "slice %d failed to allocate IRQ\n", i);
2179                                 i--;
2180                                 while (i >= 0) {
2181                                         free_irq(mgp->msix_vectors[i].vector,
2182                                                  &mgp->ss[i]);
2183                                         i--;
2184                                 }
2185                                 pci_disable_msix(pdev);
2186                                 return status;
2187                         }
2188                 }
2189         } else {
2190                 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
2191                                      mgp->dev->name, &mgp->ss[0]);
2192                 if (status != 0) {
2193                         dev_err(&pdev->dev, "failed to allocate IRQ\n");
2194                         if (mgp->msi_enabled)
2195                                 pci_disable_msi(pdev);
2196                 }
2197         }
2198         return status;
2199 }
2200
2201 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
2202 {
2203         struct pci_dev *pdev = mgp->pdev;
2204         int i;
2205
2206         if (mgp->msix_enabled) {
2207                 for (i = 0; i < mgp->num_slices; i++)
2208                         free_irq(mgp->msix_vectors[i].vector, &mgp->ss[i]);
2209         } else {
2210                 free_irq(pdev->irq, &mgp->ss[0]);
2211         }
2212         if (mgp->msi_enabled)
2213                 pci_disable_msi(pdev);
2214         if (mgp->msix_enabled)
2215                 pci_disable_msix(pdev);
2216 }
2217
2218 static int
2219 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
2220                          void **ip_hdr, void **tcpudp_hdr,
2221                          u64 * hdr_flags, void *priv)
2222 {
2223         struct ethhdr *eh;
2224         struct vlan_ethhdr *veh;
2225         struct iphdr *iph;
2226         u8 *va = page_address(frag->page) + frag->page_offset;
2227         unsigned long ll_hlen;
2228         /* passed opaque through lro_receive_frags() */
2229         __wsum csum = (__force __wsum) (unsigned long)priv;
2230
2231         /* find the mac header, aborting if not IPv4 */
2232
2233         eh = (struct ethhdr *)va;
2234         *mac_hdr = eh;
2235         ll_hlen = ETH_HLEN;
2236         if (eh->h_proto != htons(ETH_P_IP)) {
2237                 if (eh->h_proto == htons(ETH_P_8021Q)) {
2238                         veh = (struct vlan_ethhdr *)va;
2239                         if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
2240                                 return -1;
2241
2242                         ll_hlen += VLAN_HLEN;
2243
2244                         /*
2245                          *  HW checksum starts ETH_HLEN bytes into
2246                          *  frame, so we must subtract off the VLAN
2247                          *  header's checksum before csum can be used
2248                          */
2249                         csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
2250                                                            VLAN_HLEN, 0));
2251                 } else {
2252                         return -1;
2253                 }
2254         }
2255         *hdr_flags = LRO_IPV4;
2256
2257         iph = (struct iphdr *)(va + ll_hlen);
2258         *ip_hdr = iph;
2259         if (iph->protocol != IPPROTO_TCP)
2260                 return -1;
2261         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
2262                 return -1;
2263         *hdr_flags |= LRO_TCP;
2264         *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
2265
2266         /* verify the IP checksum */
2267         if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
2268                 return -1;
2269
2270         /* verify the  checksum */
2271         if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
2272                                        ntohs(iph->tot_len) - (iph->ihl << 2),
2273                                        IPPROTO_TCP, csum)))
2274                 return -1;
2275
2276         return 0;
2277 }
2278
2279 static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice)
2280 {
2281         struct myri10ge_cmd cmd;
2282         struct myri10ge_slice_state *ss;
2283         int status;
2284
2285         ss = &mgp->ss[slice];
2286         status = 0;
2287         if (slice == 0 || (mgp->dev->real_num_tx_queues > 1)) {
2288                 cmd.data0 = slice;
2289                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET,
2290                                            &cmd, 0);
2291                 ss->tx.lanai = (struct mcp_kreq_ether_send __iomem *)
2292                     (mgp->sram + cmd.data0);
2293         }
2294         cmd.data0 = slice;
2295         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET,
2296                                     &cmd, 0);
2297         ss->rx_small.lanai = (struct mcp_kreq_ether_recv __iomem *)
2298             (mgp->sram + cmd.data0);
2299
2300         cmd.data0 = slice;
2301         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
2302         ss->rx_big.lanai = (struct mcp_kreq_ether_recv __iomem *)
2303             (mgp->sram + cmd.data0);
2304
2305         ss->tx.send_go = (__iomem __be32 *)
2306             (mgp->sram + MXGEFW_ETH_SEND_GO + 64 * slice);
2307         ss->tx.send_stop = (__iomem __be32 *)
2308             (mgp->sram + MXGEFW_ETH_SEND_STOP + 64 * slice);
2309         return status;
2310
2311 }
2312
2313 static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice)
2314 {
2315         struct myri10ge_cmd cmd;
2316         struct myri10ge_slice_state *ss;
2317         int status;
2318
2319         ss = &mgp->ss[slice];
2320         cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->fw_stats_bus);
2321         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->fw_stats_bus);
2322         cmd.data2 = sizeof(struct mcp_irq_data) | (slice << 16);
2323         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
2324         if (status == -ENOSYS) {
2325                 dma_addr_t bus = ss->fw_stats_bus;
2326                 if (slice != 0)
2327                         return -EINVAL;
2328                 bus += offsetof(struct mcp_irq_data, send_done_count);
2329                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
2330                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
2331                 status = myri10ge_send_cmd(mgp,
2332                                            MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
2333                                            &cmd, 0);
2334                 /* Firmware cannot support multicast without STATS_DMA_V2 */
2335                 mgp->fw_multicast_support = 0;
2336         } else {
2337                 mgp->fw_multicast_support = 1;
2338         }
2339         return 0;
2340 }
2341
2342 static int myri10ge_open(struct net_device *dev)
2343 {
2344         struct myri10ge_slice_state *ss;
2345         struct myri10ge_priv *mgp = netdev_priv(dev);
2346         struct myri10ge_cmd cmd;
2347         int i, status, big_pow2, slice;
2348         u8 *itable;
2349         struct net_lro_mgr *lro_mgr;
2350
2351         if (mgp->running != MYRI10GE_ETH_STOPPED)
2352                 return -EBUSY;
2353
2354         mgp->running = MYRI10GE_ETH_STARTING;
2355         status = myri10ge_reset(mgp);
2356         if (status != 0) {
2357                 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
2358                 goto abort_with_nothing;
2359         }
2360
2361         if (mgp->num_slices > 1) {
2362                 cmd.data0 = mgp->num_slices;
2363                 cmd.data1 = MXGEFW_SLICE_INTR_MODE_ONE_PER_SLICE;
2364                 if (mgp->dev->real_num_tx_queues > 1)
2365                         cmd.data1 |= MXGEFW_SLICE_ENABLE_MULTIPLE_TX_QUEUES;
2366                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
2367                                            &cmd, 0);
2368                 if (status != 0) {
2369                         printk(KERN_ERR
2370                                "myri10ge: %s: failed to set number of slices\n",
2371                                dev->name);
2372                         goto abort_with_nothing;
2373                 }
2374                 /* setup the indirection table */
2375                 cmd.data0 = mgp->num_slices;
2376                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_TABLE_SIZE,
2377                                            &cmd, 0);
2378
2379                 status |= myri10ge_send_cmd(mgp,
2380                                             MXGEFW_CMD_GET_RSS_TABLE_OFFSET,
2381                                             &cmd, 0);
2382                 if (status != 0) {
2383                         printk(KERN_ERR
2384                                "myri10ge: %s: failed to setup rss tables\n",
2385                                dev->name);
2386                         goto abort_with_nothing;
2387                 }
2388
2389                 /* just enable an identity mapping */
2390                 itable = mgp->sram + cmd.data0;
2391                 for (i = 0; i < mgp->num_slices; i++)
2392                         __raw_writeb(i, &itable[i]);
2393
2394                 cmd.data0 = 1;
2395                 cmd.data1 = myri10ge_rss_hash;
2396                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_ENABLE,
2397                                            &cmd, 0);
2398                 if (status != 0) {
2399                         printk(KERN_ERR
2400                                "myri10ge: %s: failed to enable slices\n",
2401                                dev->name);
2402                         goto abort_with_nothing;
2403                 }
2404         }
2405
2406         status = myri10ge_request_irq(mgp);
2407         if (status != 0)
2408                 goto abort_with_nothing;
2409
2410         /* decide what small buffer size to use.  For good TCP rx
2411          * performance, it is important to not receive 1514 byte
2412          * frames into jumbo buffers, as it confuses the socket buffer
2413          * accounting code, leading to drops and erratic performance.
2414          */
2415
2416         if (dev->mtu <= ETH_DATA_LEN)
2417                 /* enough for a TCP header */
2418                 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
2419                     ? (128 - MXGEFW_PAD)
2420                     : (SMP_CACHE_BYTES - MXGEFW_PAD);
2421         else
2422                 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
2423                 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
2424
2425         /* Override the small buffer size? */
2426         if (myri10ge_small_bytes > 0)
2427                 mgp->small_bytes = myri10ge_small_bytes;
2428
2429         /* Firmware needs the big buff size as a power of 2.  Lie and
2430          * tell him the buffer is larger, because we only use 1
2431          * buffer/pkt, and the mtu will prevent overruns.
2432          */
2433         big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2434         if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
2435                 while (!is_power_of_2(big_pow2))
2436                         big_pow2++;
2437                 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2438         } else {
2439                 big_pow2 = MYRI10GE_ALLOC_SIZE;
2440                 mgp->big_bytes = big_pow2;
2441         }
2442
2443         /* setup the per-slice data structures */
2444         for (slice = 0; slice < mgp->num_slices; slice++) {
2445                 ss = &mgp->ss[slice];
2446
2447                 status = myri10ge_get_txrx(mgp, slice);
2448                 if (status != 0) {
2449                         printk(KERN_ERR
2450                                "myri10ge: %s: failed to get ring sizes or locations\n",
2451                                dev->name);
2452                         goto abort_with_rings;
2453                 }
2454                 status = myri10ge_allocate_rings(ss);
2455                 if (status != 0)
2456                         goto abort_with_rings;
2457
2458                 /* only firmware which supports multiple TX queues
2459                  * supports setting up the tx stats on non-zero
2460                  * slices */
2461                 if (slice == 0 || mgp->dev->real_num_tx_queues > 1)
2462                         status = myri10ge_set_stats(mgp, slice);
2463                 if (status) {
2464                         printk(KERN_ERR
2465                                "myri10ge: %s: Couldn't set stats DMA\n",
2466                                dev->name);
2467                         goto abort_with_rings;
2468                 }
2469
2470                 lro_mgr = &ss->rx_done.lro_mgr;
2471                 lro_mgr->dev = dev;
2472                 lro_mgr->features = LRO_F_NAPI;
2473                 lro_mgr->ip_summed = CHECKSUM_COMPLETE;
2474                 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
2475                 lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
2476                 lro_mgr->lro_arr = ss->rx_done.lro_desc;
2477                 lro_mgr->get_frag_header = myri10ge_get_frag_header;
2478                 lro_mgr->max_aggr = myri10ge_lro_max_pkts;
2479                 lro_mgr->frag_align_pad = 2;
2480                 if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
2481                         lro_mgr->max_aggr = MAX_SKB_FRAGS;
2482
2483                 /* must happen prior to any irq */
2484                 napi_enable(&(ss)->napi);
2485         }
2486
2487         /* now give firmware buffers sizes, and MTU */
2488         cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
2489         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
2490         cmd.data0 = mgp->small_bytes;
2491         status |=
2492             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
2493         cmd.data0 = big_pow2;
2494         status |=
2495             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
2496         if (status) {
2497                 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
2498                        dev->name);
2499                 goto abort_with_rings;
2500         }
2501
2502         /*
2503          * Set Linux style TSO mode; this is needed only on newer
2504          *  firmware versions.  Older versions default to Linux
2505          *  style TSO
2506          */
2507         cmd.data0 = 0;
2508         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_TSO_MODE, &cmd, 0);
2509         if (status && status != -ENOSYS) {
2510                 printk(KERN_ERR "myri10ge: %s: Couldn't set TSO mode\n",
2511                        dev->name);
2512                 goto abort_with_rings;
2513         }
2514
2515         mgp->link_state = ~0U;
2516         mgp->rdma_tags_available = 15;
2517
2518         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
2519         if (status) {
2520                 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
2521                        dev->name);
2522                 goto abort_with_rings;
2523         }
2524
2525         mgp->running = MYRI10GE_ETH_RUNNING;
2526         mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
2527         add_timer(&mgp->watchdog_timer);
2528         netif_tx_wake_all_queues(dev);
2529
2530         return 0;
2531
2532 abort_with_rings:
2533         while (slice) {
2534                 slice--;
2535                 napi_disable(&mgp->ss[slice].napi);
2536         }
2537         for (i = 0; i < mgp->num_slices; i++)
2538                 myri10ge_free_rings(&mgp->ss[i]);
2539
2540         myri10ge_free_irq(mgp);
2541
2542 abort_with_nothing:
2543         mgp->running = MYRI10GE_ETH_STOPPED;
2544         return -ENOMEM;
2545 }
2546
2547 static int myri10ge_close(struct net_device *dev)
2548 {
2549         struct myri10ge_priv *mgp = netdev_priv(dev);
2550         struct myri10ge_cmd cmd;
2551         int status, old_down_cnt;
2552         int i;
2553
2554         if (mgp->running != MYRI10GE_ETH_RUNNING)
2555                 return 0;
2556
2557         if (mgp->ss[0].tx.req_bytes == NULL)
2558                 return 0;
2559
2560         del_timer_sync(&mgp->watchdog_timer);
2561         mgp->running = MYRI10GE_ETH_STOPPING;
2562         for (i = 0; i < mgp->num_slices; i++) {
2563                 napi_disable(&mgp->ss[i].napi);
2564         }
2565         netif_carrier_off(dev);
2566
2567         netif_tx_stop_all_queues(dev);
2568         if (mgp->rebooted == 0) {
2569                 old_down_cnt = mgp->down_cnt;
2570                 mb();
2571                 status =
2572                     myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2573                 if (status)
2574                         printk(KERN_ERR
2575                                "myri10ge: %s: Couldn't bring down link\n",
2576                                dev->name);
2577
2578                 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt,
2579                                    HZ);
2580                 if (old_down_cnt == mgp->down_cnt)
2581                         printk(KERN_ERR "myri10ge: %s never got down irq\n",
2582                                dev->name);
2583         }
2584         netif_tx_disable(dev);
2585         myri10ge_free_irq(mgp);
2586         for (i = 0; i < mgp->num_slices; i++)
2587                 myri10ge_free_rings(&mgp->ss[i]);
2588
2589         mgp->running = MYRI10GE_ETH_STOPPED;
2590         return 0;
2591 }
2592
2593 /* copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2594  * backwards one at a time and handle ring wraps */
2595
2596 static inline void
2597 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2598                               struct mcp_kreq_ether_send *src, int cnt)
2599 {
2600         int idx, starting_slot;
2601         starting_slot = tx->req;
2602         while (cnt > 1) {
2603                 cnt--;
2604                 idx = (starting_slot + cnt) & tx->mask;
2605                 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2606                 mb();
2607         }
2608 }
2609
2610 /*
2611  * copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2612  * at most 32 bytes at a time, so as to avoid involving the software
2613  * pio handler in the nic.   We re-write the first segment's flags
2614  * to mark them valid only after writing the entire chain.
2615  */
2616
2617 static inline void
2618 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2619                     int cnt)
2620 {
2621         int idx, i;
2622         struct mcp_kreq_ether_send __iomem *dstp, *dst;
2623         struct mcp_kreq_ether_send *srcp;
2624         u8 last_flags;
2625
2626         idx = tx->req & tx->mask;
2627
2628         last_flags = src->flags;
2629         src->flags = 0;
2630         mb();
2631         dst = dstp = &tx->lanai[idx];
2632         srcp = src;
2633
2634         if ((idx + cnt) < tx->mask) {
2635                 for (i = 0; i < (cnt - 1); i += 2) {
2636                         myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2637                         mb();   /* force write every 32 bytes */
2638                         srcp += 2;
2639                         dstp += 2;
2640                 }
2641         } else {
2642                 /* submit all but the first request, and ensure
2643                  * that it is submitted below */
2644                 myri10ge_submit_req_backwards(tx, src, cnt);
2645                 i = 0;
2646         }
2647         if (i < cnt) {
2648                 /* submit the first request */
2649                 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2650                 mb();           /* barrier before setting valid flag */
2651         }
2652
2653         /* re-write the last 32-bits with the valid flags */
2654         src->flags = last_flags;
2655         put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2656         tx->req += cnt;
2657         mb();
2658 }
2659
2660 /*
2661  * Transmit a packet.  We need to split the packet so that a single
2662  * segment does not cross myri10ge->tx_boundary, so this makes segment
2663  * counting tricky.  So rather than try to count segments up front, we
2664  * just give up if there are too few segments to hold a reasonably
2665  * fragmented packet currently available.  If we run
2666  * out of segments while preparing a packet for DMA, we just linearize
2667  * it and try again.
2668  */
2669
2670 static netdev_tx_t myri10ge_xmit(struct sk_buff *skb,
2671                                        struct net_device *dev)
2672 {
2673         struct myri10ge_priv *mgp = netdev_priv(dev);
2674         struct myri10ge_slice_state *ss;
2675         struct mcp_kreq_ether_send *req;
2676         struct myri10ge_tx_buf *tx;
2677         struct skb_frag_struct *frag;
2678         struct netdev_queue *netdev_queue;
2679         dma_addr_t bus;
2680         u32 low;
2681         __be32 high_swapped;
2682         unsigned int len;
2683         int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2684         u16 pseudo_hdr_offset, cksum_offset, queue;
2685         int cum_len, seglen, boundary, rdma_count;
2686         u8 flags, odd_flag;
2687
2688         queue = skb_get_queue_mapping(skb);
2689         ss = &mgp->ss[queue];
2690         netdev_queue = netdev_get_tx_queue(mgp->dev, queue);
2691         tx = &ss->tx;
2692
2693 again:
2694         req = tx->req_list;
2695         avail = tx->mask - 1 - (tx->req - tx->done);
2696
2697         mss = 0;
2698         max_segments = MXGEFW_MAX_SEND_DESC;
2699
2700         if (skb_is_gso(skb)) {
2701                 mss = skb_shinfo(skb)->gso_size;
2702                 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2703         }
2704
2705         if ((unlikely(avail < max_segments))) {
2706                 /* we are out of transmit resources */
2707                 tx->stop_queue++;
2708                 netif_tx_stop_queue(netdev_queue);
2709                 return NETDEV_TX_BUSY;
2710         }
2711
2712         /* Setup checksum offloading, if needed */
2713         cksum_offset = 0;
2714         pseudo_hdr_offset = 0;
2715         odd_flag = 0;
2716         flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2717         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2718                 cksum_offset = skb_transport_offset(skb);
2719                 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2720                 /* If the headers are excessively large, then we must
2721                  * fall back to a software checksum */
2722                 if (unlikely(!mss && (cksum_offset > 255 ||
2723                                       pseudo_hdr_offset > 127))) {
2724                         if (skb_checksum_help(skb))
2725                                 goto drop;
2726                         cksum_offset = 0;
2727                         pseudo_hdr_offset = 0;
2728                 } else {
2729                         odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2730                         flags |= MXGEFW_FLAGS_CKSUM;
2731                 }
2732         }
2733
2734         cum_len = 0;
2735
2736         if (mss) {              /* TSO */
2737                 /* this removes any CKSUM flag from before */
2738                 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2739
2740                 /* negative cum_len signifies to the
2741                  * send loop that we are still in the
2742                  * header portion of the TSO packet.
2743                  * TSO header can be at most 1KB long */
2744                 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2745
2746                 /* for IPv6 TSO, the checksum offset stores the
2747                  * TCP header length, to save the firmware from
2748                  * the need to parse the headers */
2749                 if (skb_is_gso_v6(skb)) {
2750                         cksum_offset = tcp_hdrlen(skb);
2751                         /* Can only handle headers <= max_tso6 long */
2752                         if (unlikely(-cum_len > mgp->max_tso6))
2753                                 return myri10ge_sw_tso(skb, dev);
2754                 }
2755                 /* for TSO, pseudo_hdr_offset holds mss.
2756                  * The firmware figures out where to put
2757                  * the checksum by parsing the header. */
2758                 pseudo_hdr_offset = mss;
2759         } else
2760                 /* Mark small packets, and pad out tiny packets */
2761         if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2762                 flags |= MXGEFW_FLAGS_SMALL;
2763
2764                 /* pad frames to at least ETH_ZLEN bytes */
2765                 if (unlikely(skb->len < ETH_ZLEN)) {
2766                         if (skb_padto(skb, ETH_ZLEN)) {
2767                                 /* The packet is gone, so we must
2768                                  * return 0 */
2769                                 ss->stats.tx_dropped += 1;
2770                                 return NETDEV_TX_OK;
2771                         }
2772                         /* adjust the len to account for the zero pad
2773                          * so that the nic can know how long it is */
2774                         skb->len = ETH_ZLEN;
2775                 }
2776         }
2777
2778         /* map the skb for DMA */
2779         len = skb->len - skb->data_len;
2780         idx = tx->req & tx->mask;
2781         tx->info[idx].skb = skb;
2782         bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2783         pci_unmap_addr_set(&tx->info[idx], bus, bus);
2784         pci_unmap_len_set(&tx->info[idx], len, len);
2785
2786         frag_cnt = skb_shinfo(skb)->nr_frags;
2787         frag_idx = 0;
2788         count = 0;
2789         rdma_count = 0;
2790
2791         /* "rdma_count" is the number of RDMAs belonging to the
2792          * current packet BEFORE the current send request. For
2793          * non-TSO packets, this is equal to "count".
2794          * For TSO packets, rdma_count needs to be reset
2795          * to 0 after a segment cut.
2796          *
2797          * The rdma_count field of the send request is
2798          * the number of RDMAs of the packet starting at
2799          * that request. For TSO send requests with one ore more cuts
2800          * in the middle, this is the number of RDMAs starting
2801          * after the last cut in the request. All previous
2802          * segments before the last cut implicitly have 1 RDMA.
2803          *
2804          * Since the number of RDMAs is not known beforehand,
2805          * it must be filled-in retroactively - after each
2806          * segmentation cut or at the end of the entire packet.
2807          */
2808
2809         while (1) {
2810                 /* Break the SKB or Fragment up into pieces which
2811                  * do not cross mgp->tx_boundary */
2812                 low = MYRI10GE_LOWPART_TO_U32(bus);
2813                 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2814                 while (len) {
2815                         u8 flags_next;
2816                         int cum_len_next;
2817
2818                         if (unlikely(count == max_segments))
2819                                 goto abort_linearize;
2820
2821                         boundary =
2822                             (low + mgp->tx_boundary) & ~(mgp->tx_boundary - 1);
2823                         seglen = boundary - low;
2824                         if (seglen > len)
2825                                 seglen = len;
2826                         flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2827                         cum_len_next = cum_len + seglen;
2828                         if (mss) {      /* TSO */
2829                                 (req - rdma_count)->rdma_count = rdma_count + 1;
2830
2831                                 if (likely(cum_len >= 0)) {     /* payload */
2832                                         int next_is_first, chop;
2833
2834                                         chop = (cum_len_next > mss);
2835                                         cum_len_next = cum_len_next % mss;
2836                                         next_is_first = (cum_len_next == 0);
2837                                         flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2838                                         flags_next |= next_is_first *
2839                                             MXGEFW_FLAGS_FIRST;
2840                                         rdma_count |= -(chop | next_is_first);
2841                                         rdma_count += chop & !next_is_first;
2842                                 } else if (likely(cum_len_next >= 0)) { /* header ends */
2843                                         int small;
2844
2845                                         rdma_count = -1;
2846                                         cum_len_next = 0;
2847                                         seglen = -cum_len;
2848                                         small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2849                                         flags_next = MXGEFW_FLAGS_TSO_PLD |
2850                                             MXGEFW_FLAGS_FIRST |
2851                                             (small * MXGEFW_FLAGS_SMALL);
2852                                 }
2853                         }
2854                         req->addr_high = high_swapped;
2855                         req->addr_low = htonl(low);
2856                         req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2857                         req->pad = 0;   /* complete solid 16-byte block; does this matter? */
2858                         req->rdma_count = 1;
2859                         req->length = htons(seglen);
2860                         req->cksum_offset = cksum_offset;
2861                         req->flags = flags | ((cum_len & 1) * odd_flag);
2862
2863                         low += seglen;
2864                         len -= seglen;
2865                         cum_len = cum_len_next;
2866                         flags = flags_next;
2867                         req++;
2868                         count++;
2869                         rdma_count++;
2870                         if (cksum_offset != 0 && !(mss && skb_is_gso_v6(skb))) {
2871                                 if (unlikely(cksum_offset > seglen))
2872                                         cksum_offset -= seglen;
2873                                 else
2874                                         cksum_offset = 0;
2875                         }
2876                 }
2877                 if (frag_idx == frag_cnt)
2878                         break;
2879
2880                 /* map next fragment for DMA */
2881                 idx = (count + tx->req) & tx->mask;
2882                 frag = &skb_shinfo(skb)->frags[frag_idx];
2883                 frag_idx++;
2884                 len = frag->size;
2885                 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2886                                    len, PCI_DMA_TODEVICE);
2887                 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2888                 pci_unmap_len_set(&tx->info[idx], len, len);
2889         }
2890
2891         (req - rdma_count)->rdma_count = rdma_count;
2892         if (mss)
2893                 do {
2894                         req--;
2895                         req->flags |= MXGEFW_FLAGS_TSO_LAST;
2896                 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2897                                          MXGEFW_FLAGS_FIRST)));
2898         idx = ((count - 1) + tx->req) & tx->mask;
2899         tx->info[idx].last = 1;
2900         myri10ge_submit_req(tx, tx->req_list, count);
2901         /* if using multiple tx queues, make sure NIC polls the
2902          * current slice */
2903         if ((mgp->dev->real_num_tx_queues > 1) && tx->queue_active == 0) {
2904                 tx->queue_active = 1;
2905                 put_be32(htonl(1), tx->send_go);
2906                 mb();
2907                 mmiowb();
2908         }
2909         tx->pkt_start++;
2910         if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2911                 tx->stop_queue++;
2912                 netif_tx_stop_queue(netdev_queue);
2913         }
2914         return NETDEV_TX_OK;
2915
2916 abort_linearize:
2917         /* Free any DMA resources we've alloced and clear out the skb
2918          * slot so as to not trip up assertions, and to avoid a
2919          * double-free if linearizing fails */
2920
2921         last_idx = (idx + 1) & tx->mask;
2922         idx = tx->req & tx->mask;
2923         tx->info[idx].skb = NULL;
2924         do {
2925                 len = pci_unmap_len(&tx->info[idx], len);
2926                 if (len) {
2927                         if (tx->info[idx].skb != NULL)
2928                                 pci_unmap_single(mgp->pdev,
2929                                                  pci_unmap_addr(&tx->info[idx],
2930                                                                 bus), len,
2931                                                  PCI_DMA_TODEVICE);
2932                         else
2933                                 pci_unmap_page(mgp->pdev,
2934                                                pci_unmap_addr(&tx->info[idx],
2935                                                               bus), len,
2936                                                PCI_DMA_TODEVICE);
2937                         pci_unmap_len_set(&tx->info[idx], len, 0);
2938                         tx->info[idx].skb = NULL;
2939                 }
2940                 idx = (idx + 1) & tx->mask;
2941         } while (idx != last_idx);
2942         if (skb_is_gso(skb)) {
2943                 printk(KERN_ERR
2944                        "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2945                        mgp->dev->name);
2946                 goto drop;
2947         }
2948
2949         if (skb_linearize(skb))
2950                 goto drop;
2951
2952         tx->linearized++;
2953         goto again;
2954
2955 drop:
2956         dev_kfree_skb_any(skb);
2957         ss->stats.tx_dropped += 1;
2958         return NETDEV_TX_OK;
2959
2960 }
2961
2962 static netdev_tx_t myri10ge_sw_tso(struct sk_buff *skb,
2963                                          struct net_device *dev)
2964 {
2965         struct sk_buff *segs, *curr;
2966         struct myri10ge_priv *mgp = netdev_priv(dev);
2967         struct myri10ge_slice_state *ss;
2968         netdev_tx_t status;
2969
2970         segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO6);
2971         if (IS_ERR(segs))
2972                 goto drop;
2973
2974         while (segs) {
2975                 curr = segs;
2976                 segs = segs->next;
2977                 curr->next = NULL;
2978                 status = myri10ge_xmit(curr, dev);
2979                 if (status != 0) {
2980                         dev_kfree_skb_any(curr);
2981                         if (segs != NULL) {
2982                                 curr = segs;
2983                                 segs = segs->next;
2984                                 curr->next = NULL;
2985                                 dev_kfree_skb_any(segs);
2986                         }
2987                         goto drop;
2988                 }
2989         }
2990         dev_kfree_skb_any(skb);
2991         return NETDEV_TX_OK;
2992
2993 drop:
2994         ss = &mgp->ss[skb_get_queue_mapping(skb)];
2995         dev_kfree_skb_any(skb);
2996         ss->stats.tx_dropped += 1;
2997         return NETDEV_TX_OK;
2998 }
2999
3000 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
3001 {
3002         struct myri10ge_priv *mgp = netdev_priv(dev);
3003         struct myri10ge_slice_netstats *slice_stats;
3004         struct net_device_stats *stats = &dev->stats;
3005         int i;
3006
3007         spin_lock(&mgp->stats_lock);
3008         memset(stats, 0, sizeof(*stats));
3009         for (i = 0; i < mgp->num_slices; i++) {
3010                 slice_stats = &mgp->ss[i].stats;
3011                 stats->rx_packets += slice_stats->rx_packets;
3012                 stats->tx_packets += slice_stats->tx_packets;
3013                 stats->rx_bytes += slice_stats->rx_bytes;
3014                 stats->tx_bytes += slice_stats->tx_bytes;
3015                 stats->rx_dropped += slice_stats->rx_dropped;
3016                 stats->tx_dropped += slice_stats->tx_dropped;
3017         }
3018         spin_unlock(&mgp->stats_lock);
3019         return stats;
3020 }
3021
3022 static void myri10ge_set_multicast_list(struct net_device *dev)
3023 {
3024         struct myri10ge_priv *mgp = netdev_priv(dev);
3025         struct myri10ge_cmd cmd;
3026         struct dev_mc_list *mc_list;
3027         __be32 data[2] = { 0, 0 };
3028         int err;
3029
3030         /* can be called from atomic contexts,
3031          * pass 1 to force atomicity in myri10ge_send_cmd() */
3032         myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
3033
3034         /* This firmware is known to not support multicast */
3035         if (!mgp->fw_multicast_support)
3036                 return;
3037
3038         /* Disable multicast filtering */
3039
3040         err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
3041         if (err != 0) {
3042                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
3043                        " error status: %d\n", dev->name, err);
3044                 goto abort;
3045         }
3046
3047         if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
3048                 /* request to disable multicast filtering, so quit here */
3049                 return;
3050         }
3051
3052         /* Flush the filters */
3053
3054         err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
3055                                 &cmd, 1);
3056         if (err != 0) {
3057                 printk(KERN_ERR
3058                        "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
3059                        ", error status: %d\n", dev->name, err);
3060                 goto abort;
3061         }
3062
3063         /* Walk the multicast list, and add each address */
3064         for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
3065                 memcpy(data, &mc_list->dmi_addr, 6);
3066                 cmd.data0 = ntohl(data[0]);
3067                 cmd.data1 = ntohl(data[1]);
3068                 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
3069                                         &cmd, 1);
3070
3071                 if (err != 0) {
3072                         printk(KERN_ERR "myri10ge: %s: Failed "
3073                                "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
3074                                "%d\t", dev->name, err);
3075                         printk(KERN_ERR "MAC %pM\n", mc_list->dmi_addr);
3076                         goto abort;
3077                 }
3078         }
3079         /* Enable multicast filtering */
3080         err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
3081         if (err != 0) {
3082                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
3083                        "error status: %d\n", dev->name, err);
3084                 goto abort;
3085         }
3086
3087         return;
3088
3089 abort:
3090         return;
3091 }
3092
3093 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
3094 {
3095         struct sockaddr *sa = addr;
3096         struct myri10ge_priv *mgp = netdev_priv(dev);
3097         int status;
3098
3099         if (!is_valid_ether_addr(sa->sa_data))
3100                 return -EADDRNOTAVAIL;
3101
3102         status = myri10ge_update_mac_address(mgp, sa->sa_data);
3103         if (status != 0) {
3104                 printk(KERN_ERR
3105                        "myri10ge: %s: changing mac address failed with %d\n",
3106                        dev->name, status);
3107                 return status;
3108         }
3109
3110         /* change the dev structure */
3111         memcpy(dev->dev_addr, sa->sa_data, 6);
3112         return 0;
3113 }
3114
3115 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
3116 {
3117         struct myri10ge_priv *mgp = netdev_priv(dev);
3118         int error = 0;
3119
3120         if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
3121                 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
3122                        dev->name, new_mtu);
3123                 return -EINVAL;
3124         }
3125         printk(KERN_INFO "%s: changing mtu from %d to %d\n",
3126                dev->name, dev->mtu, new_mtu);
3127         if (mgp->running) {
3128                 /* if we change the mtu on an active device, we must
3129                  * reset the device so the firmware sees the change */
3130                 myri10ge_close(dev);
3131                 dev->mtu = new_mtu;
3132                 myri10ge_open(dev);
3133         } else
3134                 dev->mtu = new_mtu;
3135
3136         return error;
3137 }
3138
3139 /*
3140  * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
3141  * Only do it if the bridge is a root port since we don't want to disturb
3142  * any other device, except if forced with myri10ge_ecrc_enable > 1.
3143  */
3144
3145 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
3146 {
3147         struct pci_dev *bridge = mgp->pdev->bus->self;
3148         struct device *dev = &mgp->pdev->dev;
3149         unsigned cap;
3150         unsigned err_cap;
3151         u16 val;
3152         u8 ext_type;
3153         int ret;
3154
3155         if (!myri10ge_ecrc_enable || !bridge)
3156                 return;
3157
3158         /* check that the bridge is a root port */
3159         cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
3160         pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
3161         ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3162         if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
3163                 if (myri10ge_ecrc_enable > 1) {
3164                         struct pci_dev *prev_bridge, *old_bridge = bridge;
3165
3166                         /* Walk the hierarchy up to the root port
3167                          * where ECRC has to be enabled */
3168                         do {
3169                                 prev_bridge = bridge;
3170                                 bridge = bridge->bus->self;
3171                                 if (!bridge || prev_bridge == bridge) {
3172                                         dev_err(dev,
3173                                                 "Failed to find root port"
3174                                                 " to force ECRC\n");
3175                                         return;
3176                                 }
3177                                 cap =
3178                                     pci_find_capability(bridge, PCI_CAP_ID_EXP);
3179                                 pci_read_config_word(bridge,
3180                                                      cap + PCI_CAP_FLAGS, &val);
3181                                 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
3182                         } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
3183
3184                         dev_info(dev,
3185                                  "Forcing ECRC on non-root port %s"
3186                                  " (enabling on root port %s)\n",
3187                                  pci_name(old_bridge), pci_name(bridge));
3188                 } else {
3189                         dev_err(dev,
3190                                 "Not enabling ECRC on non-root port %s\n",
3191                                 pci_name(bridge));
3192                         return;
3193                 }
3194         }
3195
3196         cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
3197         if (!cap)
3198                 return;
3199
3200         ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
3201         if (ret) {
3202                 dev_err(dev, "failed reading ext-conf-space of %s\n",
3203                         pci_name(bridge));
3204                 dev_err(dev, "\t pci=nommconf in use? "
3205                         "or buggy/incomplete/absent ACPI MCFG attr?\n");
3206                 return;
3207         }
3208         if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
3209                 return;
3210
3211         err_cap |= PCI_ERR_CAP_ECRC_GENE;
3212         pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
3213         dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
3214 }
3215
3216 /*
3217  * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
3218  * when the PCI-E Completion packets are aligned on an 8-byte
3219  * boundary.  Some PCI-E chip sets always align Completion packets; on
3220  * the ones that do not, the alignment can be enforced by enabling
3221  * ECRC generation (if supported).
3222  *
3223  * When PCI-E Completion packets are not aligned, it is actually more
3224  * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
3225  *
3226  * If the driver can neither enable ECRC nor verify that it has
3227  * already been enabled, then it must use a firmware image which works
3228  * around unaligned completion packets (myri10ge_rss_ethp_z8e.dat), and it
3229  * should also ensure that it never gives the device a Read-DMA which is
3230  * larger than 2KB by setting the tx_boundary to 2KB.  If ECRC is
3231  * enabled, then the driver should use the aligned (myri10ge_rss_eth_z8e.dat)
3232  * firmware image, and set tx_boundary to 4KB.
3233  */
3234
3235 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
3236 {
3237         struct pci_dev *pdev = mgp->pdev;
3238         struct device *dev = &pdev->dev;
3239         int status;
3240
3241         mgp->tx_boundary = 4096;
3242         /*
3243          * Verify the max read request size was set to 4KB
3244          * before trying the test with 4KB.
3245          */
3246         status = pcie_get_readrq(pdev);
3247         if (status < 0) {
3248                 dev_err(dev, "Couldn't read max read req size: %d\n", status);
3249                 goto abort;
3250         }
3251         if (status != 4096) {
3252                 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
3253                 mgp->tx_boundary = 2048;
3254         }
3255         /*
3256          * load the optimized firmware (which assumes aligned PCIe
3257          * completions) in order to see if it works on this host.
3258          */
3259         mgp->fw_name = myri10ge_fw_aligned;
3260         status = myri10ge_load_firmware(mgp, 1);
3261         if (status != 0) {
3262                 goto abort;
3263         }
3264
3265         /*
3266          * Enable ECRC if possible
3267          */
3268         myri10ge_enable_ecrc(mgp);
3269
3270         /*
3271          * Run a DMA test which watches for unaligned completions and
3272          * aborts on the first one seen.
3273          */
3274
3275         status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
3276         if (status == 0)
3277                 return;         /* keep the aligned firmware */
3278
3279         if (status != -E2BIG)
3280                 dev_warn(dev, "DMA test failed: %d\n", status);
3281         if (status == -ENOSYS)
3282                 dev_warn(dev, "Falling back to ethp! "
3283                          "Please install up to date fw\n");
3284 abort:
3285         /* fall back to using the unaligned firmware */
3286         mgp->tx_boundary = 2048;
3287         mgp->fw_name = myri10ge_fw_unaligned;
3288
3289 }
3290
3291 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3292 {
3293         int overridden = 0;
3294
3295         if (myri10ge_force_firmware == 0) {
3296                 int link_width, exp_cap;
3297                 u16 lnk;
3298
3299                 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
3300                 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
3301                 link_width = (lnk >> 4) & 0x3f;
3302
3303                 /* Check to see if Link is less than 8 or if the
3304                  * upstream bridge is known to provide aligned
3305                  * completions */
3306                 if (link_width < 8) {
3307                         dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
3308                                  link_width);
3309                         mgp->tx_boundary = 4096;
3310                         mgp->fw_name = myri10ge_fw_aligned;
3311                 } else {
3312                         myri10ge_firmware_probe(mgp);
3313                 }
3314         } else {
3315                 if (myri10ge_force_firmware == 1) {
3316                         dev_info(&mgp->pdev->dev,
3317                                  "Assuming aligned completions (forced)\n");
3318                         mgp->tx_boundary = 4096;
3319                         mgp->fw_name = myri10ge_fw_aligned;
3320                 } else {
3321                         dev_info(&mgp->pdev->dev,
3322                                  "Assuming unaligned completions (forced)\n");
3323                         mgp->tx_boundary = 2048;
3324                         mgp->fw_name = myri10ge_fw_unaligned;
3325                 }
3326         }
3327         if (myri10ge_fw_name != NULL) {
3328                 overridden = 1;
3329                 mgp->fw_name = myri10ge_fw_name;
3330         }
3331         if (mgp->board_number < MYRI10GE_MAX_BOARDS &&
3332             myri10ge_fw_names[mgp->board_number] != NULL &&
3333             strlen(myri10ge_fw_names[mgp->board_number])) {
3334                 mgp->fw_name = myri10ge_fw_names[mgp->board_number];
3335                 overridden = 1;
3336         }
3337         if (overridden)
3338                 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
3339                          mgp->fw_name);
3340 }
3341
3342 #ifdef CONFIG_PM
3343 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
3344 {
3345         struct myri10ge_priv *mgp;
3346         struct net_device *netdev;
3347
3348         mgp = pci_get_drvdata(pdev);
3349         if (mgp == NULL)
3350                 return -EINVAL;
3351         netdev = mgp->dev;
3352
3353         netif_device_detach(netdev);
3354         if (netif_running(netdev)) {
3355                 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
3356                 rtnl_lock();
3357                 myri10ge_close(netdev);
3358                 rtnl_unlock();
3359         }
3360         myri10ge_dummy_rdma(mgp, 0);
3361         pci_save_state(pdev);
3362         pci_disable_device(pdev);
3363
3364         return pci_set_power_state(pdev, pci_choose_state(pdev, state));
3365 }
3366
3367 static int myri10ge_resume(struct pci_dev *pdev)
3368 {
3369         struct myri10ge_priv *mgp;
3370         struct net_device *netdev;
3371         int status;
3372         u16 vendor;
3373
3374         mgp = pci_get_drvdata(pdev);
3375         if (mgp == NULL)
3376                 return -EINVAL;
3377         netdev = mgp->dev;
3378         pci_set_power_state(pdev, 0);   /* zeros conf space as a side effect */
3379         msleep(5);              /* give card time to respond */
3380         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3381         if (vendor == 0xffff) {
3382                 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
3383                        mgp->dev->name);
3384                 return -EIO;
3385         }
3386
3387         status = pci_restore_state(pdev);
3388         if (status)
3389                 return status;
3390
3391         status = pci_enable_device(pdev);
3392         if (status) {
3393                 dev_err(&pdev->dev, "failed to enable device\n");
3394                 return status;
3395         }
3396
3397         pci_set_master(pdev);
3398
3399         myri10ge_reset(mgp);
3400         myri10ge_dummy_rdma(mgp, 1);
3401
3402         /* Save configuration space to be restored if the
3403          * nic resets due to a parity error */
3404         pci_save_state(pdev);
3405
3406         if (netif_running(netdev)) {
3407                 rtnl_lock();
3408                 status = myri10ge_open(netdev);
3409                 rtnl_unlock();
3410                 if (status != 0)
3411                         goto abort_with_enabled;
3412
3413         }
3414         netif_device_attach(netdev);
3415
3416         return 0;
3417
3418 abort_with_enabled:
3419         pci_disable_device(pdev);
3420         return -EIO;
3421
3422 }
3423 #endif                          /* CONFIG_PM */
3424
3425 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
3426 {
3427         struct pci_dev *pdev = mgp->pdev;
3428         int vs = mgp->vendor_specific_offset;
3429         u32 reboot;
3430
3431         /*enter read32 mode */
3432         pci_write_config_byte(pdev, vs + 0x10, 0x3);
3433
3434         /*read REBOOT_STATUS (0xfffffff0) */
3435         pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
3436         pci_read_config_dword(pdev, vs + 0x14, &reboot);
3437         return reboot;
3438 }
3439
3440 /*
3441  * This watchdog is used to check whether the board has suffered
3442  * from a parity error and needs to be recovered.
3443  */
3444 static void myri10ge_watchdog(struct work_struct *work)
3445 {
3446         struct myri10ge_priv *mgp =
3447             container_of(work, struct myri10ge_priv, watchdog_work);
3448         struct myri10ge_tx_buf *tx;
3449         u32 reboot;
3450         int status, rebooted;
3451         int i;
3452         u16 cmd, vendor;
3453
3454         mgp->watchdog_resets++;
3455         pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
3456         rebooted = 0;
3457         if ((cmd & PCI_COMMAND_MASTER) == 0) {
3458                 /* Bus master DMA disabled?  Check to see
3459                  * if the card rebooted due to a parity error
3460                  * For now, just report it */
3461                 reboot = myri10ge_read_reboot(mgp);
3462                 printk(KERN_ERR
3463                        "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
3464                        mgp->dev->name, reboot,
3465                        myri10ge_reset_recover ? " " : " not");
3466                 if (myri10ge_reset_recover == 0)
3467                         return;
3468                 rtnl_lock();
3469                 mgp->rebooted = 1;
3470                 rebooted = 1;
3471                 myri10ge_close(mgp->dev);
3472                 myri10ge_reset_recover--;
3473                 mgp->rebooted = 0;
3474                 /*
3475                  * A rebooted nic will come back with config space as
3476                  * it was after power was applied to PCIe bus.
3477                  * Attempt to restore config space which was saved
3478                  * when the driver was loaded, or the last time the
3479                  * nic was resumed from power saving mode.
3480                  */
3481                 pci_restore_state(mgp->pdev);
3482
3483                 /* save state again for accounting reasons */
3484                 pci_save_state(mgp->pdev);
3485
3486         } else {
3487                 /* if we get back -1's from our slot, perhaps somebody
3488                  * powered off our card.  Don't try to reset it in
3489                  * this case */
3490                 if (cmd == 0xffff) {
3491                         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3492                         if (vendor == 0xffff) {
3493                                 printk(KERN_ERR
3494                                        "myri10ge: %s: device disappeared!\n",
3495                                        mgp->dev->name);
3496                                 return;
3497                         }
3498                 }
3499                 /* Perhaps it is a software error.  Try to reset */
3500
3501                 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
3502                        mgp->dev->name);
3503                 for (i = 0; i < mgp->num_slices; i++) {
3504                         tx = &mgp->ss[i].tx;
3505                         printk(KERN_INFO
3506                                "myri10ge: %s: (%d): %d %d %d %d %d %d\n",
3507                                mgp->dev->name, i, tx->queue_active, tx->req,
3508                                tx->done, tx->pkt_start, tx->pkt_done,
3509                                (int)ntohl(mgp->ss[i].fw_stats->
3510                                           send_done_count));
3511                         msleep(2000);
3512                         printk(KERN_INFO
3513                                "myri10ge: %s: (%d): %d %d %d %d %d %d\n",
3514                                mgp->dev->name, i, tx->queue_active, tx->req,
3515                                tx->done, tx->pkt_start, tx->pkt_done,
3516                                (int)ntohl(mgp->ss[i].fw_stats->
3517                                           send_done_count));
3518                 }
3519         }
3520
3521         if (!rebooted) {
3522                 rtnl_lock();
3523                 myri10ge_close(mgp->dev);
3524         }
3525         status = myri10ge_load_firmware(mgp, 1);
3526         if (status != 0)
3527                 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
3528                        mgp->dev->name);
3529         else
3530                 myri10ge_open(mgp->dev);
3531         rtnl_unlock();
3532 }
3533
3534 /*
3535  * We use our own timer routine rather than relying upon
3536  * netdev->tx_timeout because we have a very large hardware transmit
3537  * queue.  Due to the large queue, the netdev->tx_timeout function
3538  * cannot detect a NIC with a parity error in a timely fashion if the
3539  * NIC is lightly loaded.
3540  */
3541 static void myri10ge_watchdog_timer(unsigned long arg)
3542 {
3543         struct myri10ge_priv *mgp;
3544         struct myri10ge_slice_state *ss;
3545         int i, reset_needed, busy_slice_cnt;
3546         u32 rx_pause_cnt;
3547         u16 cmd;
3548
3549         mgp = (struct myri10ge_priv *)arg;
3550
3551         rx_pause_cnt = ntohl(mgp->ss[0].fw_stats->dropped_pause);
3552         busy_slice_cnt = 0;
3553         for (i = 0, reset_needed = 0;
3554              i < mgp->num_slices && reset_needed == 0; ++i) {
3555
3556                 ss = &mgp->ss[i];
3557                 if (ss->rx_small.watchdog_needed) {
3558                         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
3559                                                 mgp->small_bytes + MXGEFW_PAD,
3560                                                 1);
3561                         if (ss->rx_small.fill_cnt - ss->rx_small.cnt >=
3562                             myri10ge_fill_thresh)
3563                                 ss->rx_small.watchdog_needed = 0;
3564                 }
3565                 if (ss->rx_big.watchdog_needed) {
3566                         myri10ge_alloc_rx_pages(mgp, &ss->rx_big,
3567                                                 mgp->big_bytes, 1);
3568                         if (ss->rx_big.fill_cnt - ss->rx_big.cnt >=
3569                             myri10ge_fill_thresh)
3570                                 ss->rx_big.watchdog_needed = 0;
3571                 }
3572
3573                 if (ss->tx.req != ss->tx.done &&
3574                     ss->tx.done == ss->watchdog_tx_done &&
3575                     ss->watchdog_tx_req != ss->watchdog_tx_done) {
3576                         /* nic seems like it might be stuck.. */
3577                         if (rx_pause_cnt != mgp->watchdog_pause) {
3578                                 if (net_ratelimit())
3579                                         printk(KERN_WARNING
3580                                                "myri10ge %s slice %d:"
3581                                                "TX paused, check link partner\n",
3582                                                mgp->dev->name, i);
3583                         } else {
3584                                 printk(KERN_WARNING
3585                                        "myri10ge %s slice %d stuck:",
3586                                        mgp->dev->name, i);
3587                                 reset_needed = 1;
3588                         }
3589                 }
3590                 if (ss->watchdog_tx_done != ss->tx.done ||
3591                     ss->watchdog_rx_done != ss->rx_done.cnt) {
3592                         busy_slice_cnt++;
3593                 }
3594                 ss->watchdog_tx_done = ss->tx.done;
3595                 ss->watchdog_tx_req = ss->tx.req;
3596                 ss->watchdog_rx_done = ss->rx_done.cnt;
3597         }
3598         /* if we've sent or received no traffic, poll the NIC to
3599          * ensure it is still there.  Otherwise, we risk not noticing
3600          * an error in a timely fashion */
3601         if (busy_slice_cnt == 0) {
3602                 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
3603                 if ((cmd & PCI_COMMAND_MASTER) == 0) {
3604                         reset_needed = 1;
3605                 }
3606         }
3607         mgp->watchdog_pause = rx_pause_cnt;
3608
3609         if (reset_needed) {
3610                 schedule_work(&mgp->watchdog_work);
3611         } else {
3612                 /* rearm timer */
3613                 mod_timer(&mgp->watchdog_timer,
3614                           jiffies + myri10ge_watchdog_timeout * HZ);
3615         }
3616 }
3617
3618 static void myri10ge_free_slices(struct myri10ge_priv *mgp)
3619 {
3620         struct myri10ge_slice_state *ss;
3621         struct pci_dev *pdev = mgp->pdev;
3622         size_t bytes;
3623         int i;
3624
3625         if (mgp->ss == NULL)
3626                 return;
3627
3628         for (i = 0; i < mgp->num_slices; i++) {
3629                 ss = &mgp->ss[i];
3630                 if (ss->rx_done.entry != NULL) {
3631                         bytes = mgp->max_intr_slots *
3632                             sizeof(*ss->rx_done.entry);
3633                         dma_free_coherent(&pdev->dev, bytes,
3634                                           ss->rx_done.entry, ss->rx_done.bus);
3635                         ss->rx_done.entry = NULL;
3636                 }
3637                 if (ss->fw_stats != NULL) {
3638                         bytes = sizeof(*ss->fw_stats);
3639                         dma_free_coherent(&pdev->dev, bytes,
3640                                           ss->fw_stats, ss->fw_stats_bus);
3641                         ss->fw_stats = NULL;
3642                 }
3643         }
3644         kfree(mgp->ss);
3645         mgp->ss = NULL;
3646 }
3647
3648 static int myri10ge_alloc_slices(struct myri10ge_priv *mgp)
3649 {
3650         struct myri10ge_slice_state *ss;
3651         struct pci_dev *pdev = mgp->pdev;
3652         size_t bytes;
3653         int i;
3654
3655         bytes = sizeof(*mgp->ss) * mgp->num_slices;
3656         mgp->ss = kzalloc(bytes, GFP_KERNEL);
3657         if (mgp->ss == NULL) {
3658                 return -ENOMEM;
3659         }
3660
3661         for (i = 0; i < mgp->num_slices; i++) {
3662                 ss = &mgp->ss[i];
3663                 bytes = mgp->max_intr_slots * sizeof(*ss->rx_done.entry);
3664                 ss->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3665                                                        &ss->rx_done.bus,
3666                                                        GFP_KERNEL);
3667                 if (ss->rx_done.entry == NULL)
3668                         goto abort;
3669                 memset(ss->rx_done.entry, 0, bytes);
3670                 bytes = sizeof(*ss->fw_stats);
3671                 ss->fw_stats = dma_alloc_coherent(&pdev->dev, bytes,
3672                                                   &ss->fw_stats_bus,
3673                                                   GFP_KERNEL);
3674                 if (ss->fw_stats == NULL)
3675                         goto abort;
3676                 ss->mgp = mgp;
3677                 ss->dev = mgp->dev;
3678                 netif_napi_add(ss->dev, &ss->napi, myri10ge_poll,
3679                                myri10ge_napi_weight);
3680         }
3681         return 0;
3682 abort:
3683         myri10ge_free_slices(mgp);
3684         return -ENOMEM;
3685 }
3686
3687 /*
3688  * This function determines the number of slices supported.
3689  * The number slices is the minumum of the number of CPUS,
3690  * the number of MSI-X irqs supported, the number of slices
3691  * supported by the firmware
3692  */
3693 static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
3694 {
3695         struct myri10ge_cmd cmd;
3696         struct pci_dev *pdev = mgp->pdev;
3697         char *old_fw;
3698         int i, status, ncpus, msix_cap;
3699
3700         mgp->num_slices = 1;
3701         msix_cap = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3702         ncpus = num_online_cpus();
3703
3704         if (myri10ge_max_slices == 1 || msix_cap == 0 ||
3705             (myri10ge_max_slices == -1 && ncpus < 2))
3706                 return;
3707
3708         /* try to load the slice aware rss firmware */
3709         old_fw = mgp->fw_name;
3710         if (myri10ge_fw_name != NULL) {
3711                 dev_info(&mgp->pdev->dev, "overriding rss firmware to %s\n",
3712                          myri10ge_fw_name);
3713                 mgp->fw_name = myri10ge_fw_name;
3714         } else if (old_fw == myri10ge_fw_aligned)
3715                 mgp->fw_name = myri10ge_fw_rss_aligned;
3716         else
3717                 mgp->fw_name = myri10ge_fw_rss_unaligned;
3718         status = myri10ge_load_firmware(mgp, 0);
3719         if (status != 0) {
3720                 dev_info(&pdev->dev, "Rss firmware not found\n");
3721                 return;
3722         }
3723
3724         /* hit the board with a reset to ensure it is alive */
3725         memset(&cmd, 0, sizeof(cmd));
3726         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
3727         if (status != 0) {
3728                 dev_err(&mgp->pdev->dev, "failed reset\n");
3729                 goto abort_with_fw;
3730                 return;
3731         }
3732
3733         mgp->max_intr_slots = cmd.data0 / sizeof(struct mcp_slot);
3734
3735         /* tell it the size of the interrupt queues */
3736         cmd.data0 = mgp->max_intr_slots * sizeof(struct mcp_slot);
3737         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
3738         if (status != 0) {
3739                 dev_err(&mgp->pdev->dev, "failed MXGEFW_CMD_SET_INTRQ_SIZE\n");
3740                 goto abort_with_fw;
3741         }
3742
3743         /* ask the maximum number of slices it supports */
3744         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES, &cmd, 0);
3745         if (status != 0)
3746                 goto abort_with_fw;
3747         else
3748                 mgp->num_slices = cmd.data0;
3749
3750         /* Only allow multiple slices if MSI-X is usable */
3751         if (!myri10ge_msi) {
3752                 goto abort_with_fw;
3753         }
3754
3755         /* if the admin did not specify a limit to how many
3756          * slices we should use, cap it automatically to the
3757          * number of CPUs currently online */
3758         if (myri10ge_max_slices == -1)
3759                 myri10ge_max_slices = ncpus;
3760
3761         if (mgp->num_slices > myri10ge_max_slices)
3762                 mgp->num_slices = myri10ge_max_slices;
3763
3764         /* Now try to allocate as many MSI-X vectors as we have
3765          * slices. We give up on MSI-X if we can only get a single
3766          * vector. */
3767
3768         mgp->msix_vectors = kzalloc(mgp->num_slices *
3769                                     sizeof(*mgp->msix_vectors), GFP_KERNEL);
3770         if (mgp->msix_vectors == NULL)
3771                 goto disable_msix;
3772         for (i = 0; i < mgp->num_slices; i++) {
3773                 mgp->msix_vectors[i].entry = i;
3774         }
3775
3776         while (mgp->num_slices > 1) {
3777                 /* make sure it is a power of two */
3778                 while (!is_power_of_2(mgp->num_slices))
3779                         mgp->num_slices--;
3780                 if (mgp->num_slices == 1)
3781                         goto disable_msix;
3782                 status = pci_enable_msix(pdev, mgp->msix_vectors,
3783                                          mgp->num_slices);
3784                 if (status == 0) {
3785                         pci_disable_msix(pdev);
3786                         return;
3787                 }
3788                 if (status > 0)
3789                         mgp->num_slices = status;
3790                 else
3791                         goto disable_msix;
3792         }
3793
3794 disable_msix:
3795         if (mgp->msix_vectors != NULL) {
3796                 kfree(mgp->msix_vectors);
3797                 mgp->msix_vectors = NULL;
3798         }
3799
3800 abort_with_fw:
3801         mgp->num_slices = 1;
3802         mgp->fw_name = old_fw;
3803         myri10ge_load_firmware(mgp, 0);
3804 }
3805
3806 static const struct net_device_ops myri10ge_netdev_ops = {
3807         .ndo_open               = myri10ge_open,
3808         .ndo_stop               = myri10ge_close,
3809         .ndo_start_xmit         = myri10ge_xmit,
3810         .ndo_get_stats          = myri10ge_get_stats,
3811         .ndo_validate_addr      = eth_validate_addr,
3812         .ndo_change_mtu         = myri10ge_change_mtu,
3813         .ndo_set_multicast_list = myri10ge_set_multicast_list,
3814         .ndo_set_mac_address    = myri10ge_set_mac_address,
3815 };
3816
3817 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3818 {
3819         struct net_device *netdev;
3820         struct myri10ge_priv *mgp;
3821         struct device *dev = &pdev->dev;
3822         int i;
3823         int status = -ENXIO;
3824         int dac_enabled;
3825         unsigned hdr_offset, ss_offset;
3826         static int board_number;
3827
3828         netdev = alloc_etherdev_mq(sizeof(*mgp), MYRI10GE_MAX_SLICES);
3829         if (netdev == NULL) {
3830                 dev_err(dev, "Could not allocate ethernet device\n");
3831                 return -ENOMEM;
3832         }
3833
3834         SET_NETDEV_DEV(netdev, &pdev->dev);
3835
3836         mgp = netdev_priv(netdev);
3837         mgp->dev = netdev;
3838         mgp->pdev = pdev;
3839         mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
3840         mgp->pause = myri10ge_flow_control;
3841         mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3842         mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3843         mgp->board_number = board_number;
3844         init_waitqueue_head(&mgp->down_wq);
3845
3846         if (pci_enable_device(pdev)) {
3847                 dev_err(&pdev->dev, "pci_enable_device call failed\n");
3848                 status = -ENODEV;
3849                 goto abort_with_netdev;
3850         }
3851
3852         /* Find the vendor-specific cap so we can check
3853          * the reboot register later on */
3854         mgp->vendor_specific_offset
3855             = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
3856
3857         /* Set our max read request to 4KB */
3858         status = pcie_set_readrq(pdev, 4096);
3859         if (status != 0) {
3860                 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
3861                         status);
3862                 goto abort_with_enabled;
3863         }
3864
3865         pci_set_master(pdev);
3866         dac_enabled = 1;
3867         status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3868         if (status != 0) {
3869                 dac_enabled = 0;
3870                 dev_err(&pdev->dev,
3871                         "64-bit pci address mask was refused, "
3872                         "trying 32-bit\n");
3873                 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3874         }
3875         if (status != 0) {
3876                 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
3877                 goto abort_with_enabled;
3878         }
3879         (void)pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3880         mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
3881                                       &mgp->cmd_bus, GFP_KERNEL);
3882         if (mgp->cmd == NULL)
3883                 goto abort_with_enabled;
3884
3885         mgp->board_span = pci_resource_len(pdev, 0);
3886         mgp->iomem_base = pci_resource_start(pdev, 0);
3887         mgp->mtrr = -1;
3888         mgp->wc_enabled = 0;
3889 #ifdef CONFIG_MTRR
3890         mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3891                              MTRR_TYPE_WRCOMB, 1);
3892         if (mgp->mtrr >= 0)
3893                 mgp->wc_enabled = 1;
3894 #endif
3895         mgp->sram = ioremap_wc(mgp->iomem_base, mgp->board_span);
3896         if (mgp->sram == NULL) {
3897                 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3898                         mgp->board_span, mgp->iomem_base);
3899                 status = -ENXIO;
3900                 goto abort_with_mtrr;
3901         }
3902         hdr_offset =
3903             ntohl(__raw_readl(mgp->sram + MCP_HEADER_PTR_OFFSET)) & 0xffffc;
3904         ss_offset = hdr_offset + offsetof(struct mcp_gen_header, string_specs);
3905         mgp->sram_size = ntohl(__raw_readl(mgp->sram + ss_offset));
3906         if (mgp->sram_size > mgp->board_span ||
3907             mgp->sram_size <= MYRI10GE_FW_OFFSET) {
3908                 dev_err(&pdev->dev,
3909                         "invalid sram_size %dB or board span %ldB\n",
3910                         mgp->sram_size, mgp->board_span);
3911                 goto abort_with_ioremap;
3912         }
3913         memcpy_fromio(mgp->eeprom_strings,
3914                       mgp->sram + mgp->sram_size, MYRI10GE_EEPROM_STRINGS_SIZE);
3915         memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3916         status = myri10ge_read_mac_addr(mgp);
3917         if (status)
3918                 goto abort_with_ioremap;
3919
3920         for (i = 0; i < ETH_ALEN; i++)
3921                 netdev->dev_addr[i] = mgp->mac_addr[i];
3922
3923         myri10ge_select_firmware(mgp);
3924
3925         status = myri10ge_load_firmware(mgp, 1);
3926         if (status != 0) {
3927                 dev_err(&pdev->dev, "failed to load firmware\n");
3928                 goto abort_with_ioremap;
3929         }
3930         myri10ge_probe_slices(mgp);
3931         status = myri10ge_alloc_slices(mgp);
3932         if (status != 0) {
3933                 dev_err(&pdev->dev, "failed to alloc slice state\n");
3934                 goto abort_with_firmware;
3935         }
3936         netdev->real_num_tx_queues = mgp->num_slices;
3937         status = myri10ge_reset(mgp);
3938         if (status != 0) {
3939                 dev_err(&pdev->dev, "failed reset\n");
3940                 goto abort_with_slices;
3941         }
3942 #ifdef CONFIG_MYRI10GE_DCA
3943         myri10ge_setup_dca(mgp);
3944 #endif
3945         pci_set_drvdata(pdev, mgp);
3946         if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3947                 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3948         if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3949                 myri10ge_initial_mtu = 68;
3950
3951         netdev->netdev_ops = &myri10ge_netdev_ops;
3952         netdev->mtu = myri10ge_initial_mtu;
3953         netdev->base_addr = mgp->iomem_base;
3954         netdev->features = mgp->features;
3955
3956         if (dac_enabled)
3957                 netdev->features |= NETIF_F_HIGHDMA;
3958         netdev->features |= NETIF_F_LRO;
3959
3960         netdev->vlan_features |= mgp->features;
3961         if (mgp->fw_ver_tiny < 37)
3962                 netdev->vlan_features &= ~NETIF_F_TSO6;
3963         if (mgp->fw_ver_tiny < 32)
3964                 netdev->vlan_features &= ~NETIF_F_TSO;
3965
3966         /* make sure we can get an irq, and that MSI can be
3967          * setup (if available).  Also ensure netdev->irq
3968          * is set to correct value if MSI is enabled */
3969         status = myri10ge_request_irq(mgp);
3970         if (status != 0)
3971                 goto abort_with_firmware;
3972         netdev->irq = pdev->irq;
3973         myri10ge_free_irq(mgp);
3974
3975         /* Save configuration space to be restored if the
3976          * nic resets due to a parity error */
3977         pci_save_state(pdev);
3978
3979         /* Setup the watchdog timer */
3980         setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3981                     (unsigned long)mgp);
3982
3983         spin_lock_init(&mgp->stats_lock);
3984         SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3985         INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3986         status = register_netdev(netdev);
3987         if (status != 0) {
3988                 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3989                 goto abort_with_state;
3990         }
3991         if (mgp->msix_enabled)
3992                 dev_info(dev, "%d MSI-X IRQs, tx bndry %d, fw %s, WC %s\n",
3993                          mgp->num_slices, mgp->tx_boundary, mgp->fw_name,
3994                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
3995         else
3996                 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3997                          mgp->msi_enabled ? "MSI" : "xPIC",
3998                          netdev->irq, mgp->tx_boundary, mgp->fw_name,
3999                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
4000
4001         board_number++;
4002         return 0;
4003
4004 abort_with_state:
4005         pci_restore_state(pdev);
4006
4007 abort_with_slices:
4008         myri10ge_free_slices(mgp);
4009
4010 abort_with_firmware:
4011         myri10ge_dummy_rdma(mgp, 0);
4012
4013 abort_with_ioremap:
4014         if (mgp->mac_addr_string != NULL)
4015                 dev_err(&pdev->dev,
4016                         "myri10ge_probe() failed: MAC=%s, SN=%ld\n",
4017                         mgp->mac_addr_string, mgp->serial_number);
4018         iounmap(mgp->sram);
4019
4020 abort_with_mtrr:
4021 #ifdef CONFIG_MTRR
4022         if (mgp->mtrr >= 0)
4023                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
4024 #endif
4025         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
4026                           mgp->cmd, mgp->cmd_bus);
4027
4028 abort_with_enabled:
4029         pci_disable_device(pdev);
4030
4031 abort_with_netdev:
4032         free_netdev(netdev);
4033         return status;
4034 }
4035
4036 /*
4037  * myri10ge_remove
4038  *
4039  * Does what is necessary to shutdown one Myrinet device. Called
4040  *   once for each Myrinet card by the kernel when a module is
4041  *   unloaded.
4042  */
4043 static void myri10ge_remove(struct pci_dev *pdev)
4044 {
4045         struct myri10ge_priv *mgp;
4046         struct net_device *netdev;
4047
4048         mgp = pci_get_drvdata(pdev);
4049         if (mgp == NULL)
4050                 return;
4051
4052         flush_scheduled_work();
4053         netdev = mgp->dev;
4054         unregister_netdev(netdev);
4055
4056 #ifdef CONFIG_MYRI10GE_DCA
4057         myri10ge_teardown_dca(mgp);
4058 #endif
4059         myri10ge_dummy_rdma(mgp, 0);
4060
4061         /* avoid a memory leak */
4062         pci_restore_state(pdev);
4063
4064         iounmap(mgp->sram);
4065
4066 #ifdef CONFIG_MTRR
4067         if (mgp->mtrr >= 0)
4068                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
4069 #endif
4070         myri10ge_free_slices(mgp);
4071         if (mgp->msix_vectors != NULL)
4072                 kfree(mgp->msix_vectors);
4073         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
4074                           mgp->cmd, mgp->cmd_bus);
4075
4076         free_netdev(netdev);
4077         pci_disable_device(pdev);
4078         pci_set_drvdata(pdev, NULL);
4079 }
4080
4081 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E      0x0008
4082 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9    0x0009
4083
4084 static struct pci_device_id myri10ge_pci_tbl[] = {
4085         {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
4086         {PCI_DEVICE
4087          (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
4088         {0},
4089 };
4090
4091 MODULE_DEVICE_TABLE(pci, myri10ge_pci_tbl);
4092
4093 static struct pci_driver myri10ge_driver = {
4094         .name = "myri10ge",
4095         .probe = myri10ge_probe,
4096         .remove = myri10ge_remove,
4097         .id_table = myri10ge_pci_tbl,
4098 #ifdef CONFIG_PM
4099         .suspend = myri10ge_suspend,
4100         .resume = myri10ge_resume,
4101 #endif
4102 };
4103
4104 #ifdef CONFIG_MYRI10GE_DCA
4105 static int
4106 myri10ge_notify_dca(struct notifier_block *nb, unsigned long event, void *p)
4107 {
4108         int err = driver_for_each_device(&myri10ge_driver.driver,
4109                                          NULL, &event,
4110                                          myri10ge_notify_dca_device);
4111
4112         if (err)
4113                 return NOTIFY_BAD;
4114         return NOTIFY_DONE;
4115 }
4116
4117 static struct notifier_block myri10ge_dca_notifier = {
4118         .notifier_call = myri10ge_notify_dca,
4119         .next = NULL,
4120         .priority = 0,
4121 };
4122 #endif                          /* CONFIG_MYRI10GE_DCA */
4123
4124 static __init int myri10ge_init_module(void)
4125 {
4126         printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
4127                MYRI10GE_VERSION_STR);
4128
4129         if (myri10ge_rss_hash > MXGEFW_RSS_HASH_TYPE_MAX) {
4130                 printk(KERN_ERR
4131                        "%s: Illegal rssh hash type %d, defaulting to source port\n",
4132                        myri10ge_driver.name, myri10ge_rss_hash);
4133                 myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
4134         }
4135 #ifdef CONFIG_MYRI10GE_DCA
4136         dca_register_notify(&myri10ge_dca_notifier);
4137 #endif
4138         if (myri10ge_max_slices > MYRI10GE_MAX_SLICES)
4139                 myri10ge_max_slices = MYRI10GE_MAX_SLICES;
4140
4141         return pci_register_driver(&myri10ge_driver);
4142 }
4143
4144 module_init(myri10ge_init_module);
4145
4146 static __exit void myri10ge_cleanup_module(void)
4147 {
4148 #ifdef CONFIG_MYRI10GE_DCA
4149         dca_unregister_notify(&myri10ge_dca_notifier);
4150 #endif
4151         pci_unregister_driver(&myri10ge_driver);
4152 }
4153
4154 module_exit(myri10ge_cleanup_module);