mlx4_en: Using real number of rings as RSS map size
[linux-2.6.git] / drivers / net / mlx4 / en_rx.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/skbuff.h>
37 #include <linux/if_ether.h>
38 #include <linux/if_vlan.h>
39 #include <linux/vmalloc.h>
40
41 #include "mlx4_en.h"
42
43 static void *get_wqe(struct mlx4_en_rx_ring *ring, int n)
44 {
45         int offset = n << ring->srq.wqe_shift;
46         return ring->buf + offset;
47 }
48
49 static void mlx4_en_srq_event(struct mlx4_srq *srq, enum mlx4_event type)
50 {
51         return;
52 }
53
54 static int mlx4_en_get_frag_header(struct skb_frag_struct *frags, void **mac_hdr,
55                                    void **ip_hdr, void **tcpudp_hdr,
56                                    u64 *hdr_flags, void *priv)
57 {
58         *mac_hdr = page_address(frags->page) + frags->page_offset;
59         *ip_hdr = *mac_hdr + ETH_HLEN;
60         *tcpudp_hdr = (struct tcphdr *)(*ip_hdr + sizeof(struct iphdr));
61         *hdr_flags = LRO_IPV4 | LRO_TCP;
62
63         return 0;
64 }
65
66 static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv,
67                               struct mlx4_en_rx_desc *rx_desc,
68                               struct skb_frag_struct *skb_frags,
69                               struct mlx4_en_rx_alloc *ring_alloc,
70                               int i)
71 {
72         struct mlx4_en_dev *mdev = priv->mdev;
73         struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
74         struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i];
75         struct page *page;
76         dma_addr_t dma;
77
78         if (page_alloc->offset == frag_info->last_offset) {
79                 /* Allocate new page */
80                 page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER);
81                 if (!page)
82                         return -ENOMEM;
83
84                 skb_frags[i].page = page_alloc->page;
85                 skb_frags[i].page_offset = page_alloc->offset;
86                 page_alloc->page = page;
87                 page_alloc->offset = frag_info->frag_align;
88         } else {
89                 page = page_alloc->page;
90                 get_page(page);
91
92                 skb_frags[i].page = page;
93                 skb_frags[i].page_offset = page_alloc->offset;
94                 page_alloc->offset += frag_info->frag_stride;
95         }
96         dma = pci_map_single(mdev->pdev, page_address(skb_frags[i].page) +
97                              skb_frags[i].page_offset, frag_info->frag_size,
98                              PCI_DMA_FROMDEVICE);
99         rx_desc->data[i].addr = cpu_to_be64(dma);
100         return 0;
101 }
102
103 static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
104                                   struct mlx4_en_rx_ring *ring)
105 {
106         struct mlx4_en_rx_alloc *page_alloc;
107         int i;
108
109         for (i = 0; i < priv->num_frags; i++) {
110                 page_alloc = &ring->page_alloc[i];
111                 page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
112                                                MLX4_EN_ALLOC_ORDER);
113                 if (!page_alloc->page)
114                         goto out;
115
116                 page_alloc->offset = priv->frag_info[i].frag_align;
117                 en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
118                        i, page_alloc->page);
119         }
120         return 0;
121
122 out:
123         while (i--) {
124                 page_alloc = &ring->page_alloc[i];
125                 put_page(page_alloc->page);
126                 page_alloc->page = NULL;
127         }
128         return -ENOMEM;
129 }
130
131 static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
132                                       struct mlx4_en_rx_ring *ring)
133 {
134         struct mlx4_en_rx_alloc *page_alloc;
135         int i;
136
137         for (i = 0; i < priv->num_frags; i++) {
138                 page_alloc = &ring->page_alloc[i];
139                 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
140                        i, page_count(page_alloc->page));
141
142                 put_page(page_alloc->page);
143                 page_alloc->page = NULL;
144         }
145 }
146
147
148 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
149                                  struct mlx4_en_rx_ring *ring, int index)
150 {
151         struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
152         struct skb_frag_struct *skb_frags = ring->rx_info +
153                                             (index << priv->log_rx_info);
154         int possible_frags;
155         int i;
156
157         /* Pre-link descriptor */
158         rx_desc->next.next_wqe_index = cpu_to_be16((index + 1) & ring->size_mask);
159
160         /* Set size and memtype fields */
161         for (i = 0; i < priv->num_frags; i++) {
162                 skb_frags[i].size = priv->frag_info[i].frag_size;
163                 rx_desc->data[i].byte_count =
164                         cpu_to_be32(priv->frag_info[i].frag_size);
165                 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
166         }
167
168         /* If the number of used fragments does not fill up the ring stride,
169          * remaining (unused) fragments must be padded with null address/size
170          * and a special memory key */
171         possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
172         for (i = priv->num_frags; i < possible_frags; i++) {
173                 rx_desc->data[i].byte_count = 0;
174                 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
175                 rx_desc->data[i].addr = 0;
176         }
177 }
178
179
180 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
181                                    struct mlx4_en_rx_ring *ring, int index)
182 {
183         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
184         struct skb_frag_struct *skb_frags = ring->rx_info +
185                                             (index << priv->log_rx_info);
186         int i;
187
188         for (i = 0; i < priv->num_frags; i++)
189                 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, ring->page_alloc, i))
190                         goto err;
191
192         return 0;
193
194 err:
195         while (i--)
196                 put_page(skb_frags[i].page);
197         return -ENOMEM;
198 }
199
200 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
201 {
202         *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
203 }
204
205 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
206                                  struct mlx4_en_rx_ring *ring,
207                                  int index)
208 {
209         struct mlx4_en_dev *mdev = priv->mdev;
210         struct skb_frag_struct *skb_frags;
211         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
212         dma_addr_t dma;
213         int nr;
214
215         skb_frags = ring->rx_info + (index << priv->log_rx_info);
216         for (nr = 0; nr < priv->num_frags; nr++) {
217                 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
218                 dma = be64_to_cpu(rx_desc->data[nr].addr);
219
220                 en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
221                 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
222                                  PCI_DMA_FROMDEVICE);
223                 put_page(skb_frags[nr].page);
224         }
225 }
226
227 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
228 {
229         struct mlx4_en_rx_ring *ring;
230         int ring_ind;
231         int buf_ind;
232         int new_size;
233
234         for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
235                 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
236                         ring = &priv->rx_ring[ring_ind];
237
238                         if (mlx4_en_prepare_rx_desc(priv, ring,
239                                                     ring->actual_size)) {
240                                 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
241                                         en_err(priv, "Failed to allocate "
242                                                      "enough rx buffers\n");
243                                         return -ENOMEM;
244                                 } else {
245                                         new_size = rounddown_pow_of_two(ring->actual_size);
246                                         en_warn(priv, "Only %d buffers allocated "
247                                                       "reducing ring size to %d",
248                                                 ring->actual_size, new_size);
249                                         goto reduce_rings;
250                                 }
251                         }
252                         ring->actual_size++;
253                         ring->prod++;
254                 }
255         }
256         return 0;
257
258 reduce_rings:
259         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
260                 ring = &priv->rx_ring[ring_ind];
261                 while (ring->actual_size > new_size) {
262                         ring->actual_size--;
263                         ring->prod--;
264                         mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
265                 }
266                 ring->size_mask = ring->actual_size - 1;
267         }
268
269         return 0;
270 }
271
272 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
273                                 struct mlx4_en_rx_ring *ring)
274 {
275         int index;
276
277         en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
278                ring->cons, ring->prod);
279
280         /* Unmap and free Rx buffers */
281         BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
282         while (ring->cons != ring->prod) {
283                 index = ring->cons & ring->size_mask;
284                 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
285                 mlx4_en_free_rx_desc(priv, ring, index);
286                 ++ring->cons;
287         }
288 }
289
290 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
291                            struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
292 {
293         struct mlx4_en_dev *mdev = priv->mdev;
294         int err;
295         int tmp;
296
297         /* Sanity check SRQ size before proceeding */
298         if (size >= mdev->dev->caps.max_srq_wqes)
299                 return -EINVAL;
300
301         ring->prod = 0;
302         ring->cons = 0;
303         ring->size = size;
304         ring->size_mask = size - 1;
305         ring->stride = stride;
306         ring->log_stride = ffs(ring->stride) - 1;
307         ring->buf_size = ring->size * ring->stride;
308
309         tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
310                                         sizeof(struct skb_frag_struct));
311         ring->rx_info = vmalloc(tmp);
312         if (!ring->rx_info) {
313                 en_err(priv, "Failed allocating rx_info ring\n");
314                 return -ENOMEM;
315         }
316         en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
317                  ring->rx_info, tmp);
318
319         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
320                                  ring->buf_size, 2 * PAGE_SIZE);
321         if (err)
322                 goto err_ring;
323
324         err = mlx4_en_map_buffer(&ring->wqres.buf);
325         if (err) {
326                 en_err(priv, "Failed to map RX buffer\n");
327                 goto err_hwq;
328         }
329         ring->buf = ring->wqres.buf.direct.buf;
330
331         /* Configure lro mngr */
332         memset(&ring->lro, 0, sizeof(struct net_lro_mgr));
333         ring->lro.dev = priv->dev;
334         ring->lro.features = LRO_F_NAPI;
335         ring->lro.frag_align_pad = NET_IP_ALIGN;
336         ring->lro.ip_summed = CHECKSUM_UNNECESSARY;
337         ring->lro.ip_summed_aggr = CHECKSUM_UNNECESSARY;
338         ring->lro.max_desc = mdev->profile.num_lro;
339         ring->lro.max_aggr = MAX_SKB_FRAGS;
340         ring->lro.lro_arr = kzalloc(mdev->profile.num_lro *
341                                     sizeof(struct net_lro_desc),
342                                     GFP_KERNEL);
343         if (!ring->lro.lro_arr) {
344                 en_err(priv, "Failed to allocate lro array\n");
345                 goto err_map;
346         }
347         ring->lro.get_frag_header = mlx4_en_get_frag_header;
348
349         return 0;
350
351 err_map:
352         mlx4_en_unmap_buffer(&ring->wqres.buf);
353 err_hwq:
354         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
355 err_ring:
356         vfree(ring->rx_info);
357         ring->rx_info = NULL;
358         return err;
359 }
360
361 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
362 {
363         struct mlx4_en_dev *mdev = priv->mdev;
364         struct mlx4_wqe_srq_next_seg *next;
365         struct mlx4_en_rx_ring *ring;
366         int i;
367         int ring_ind;
368         int err;
369         int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
370                                         DS_SIZE * priv->num_frags);
371         int max_gs = (stride - sizeof(struct mlx4_wqe_srq_next_seg)) / DS_SIZE;
372
373         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
374                 ring = &priv->rx_ring[ring_ind];
375
376                 ring->prod = 0;
377                 ring->cons = 0;
378                 ring->actual_size = 0;
379                 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
380
381                 ring->stride = stride;
382                 ring->log_stride = ffs(ring->stride) - 1;
383                 ring->buf_size = ring->size * ring->stride;
384
385                 memset(ring->buf, 0, ring->buf_size);
386                 mlx4_en_update_rx_prod_db(ring);
387
388                 /* Initailize all descriptors */
389                 for (i = 0; i < ring->size; i++)
390                         mlx4_en_init_rx_desc(priv, ring, i);
391
392                 /* Initialize page allocators */
393                 err = mlx4_en_init_allocator(priv, ring);
394                 if (err) {
395                         en_err(priv, "Failed initializing ring allocator\n");
396                         ring_ind--;
397                         goto err_allocator;
398                 }
399         }
400         err = mlx4_en_fill_rx_buffers(priv);
401         if (err)
402                 goto err_buffers;
403
404         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
405                 ring = &priv->rx_ring[ring_ind];
406
407                 mlx4_en_update_rx_prod_db(ring);
408
409                 /* Configure SRQ representing the ring */
410                 ring->srq.max    = ring->actual_size;
411                 ring->srq.max_gs = max_gs;
412                 ring->srq.wqe_shift = ilog2(ring->stride);
413
414                 for (i = 0; i < ring->srq.max; ++i) {
415                         next = get_wqe(ring, i);
416                         next->next_wqe_index =
417                         cpu_to_be16((i + 1) & (ring->srq.max - 1));
418                 }
419
420                 err = mlx4_srq_alloc(mdev->dev, mdev->priv_pdn, &ring->wqres.mtt,
421                                      ring->wqres.db.dma, &ring->srq);
422                 if (err){
423                         en_err(priv, "Failed to allocate srq\n");
424                         ring_ind--;
425                         goto err_srq;
426                 }
427                 ring->srq.event = mlx4_en_srq_event;
428         }
429
430         return 0;
431
432 err_srq:
433         while (ring_ind >= 0) {
434                 ring = &priv->rx_ring[ring_ind];
435                 mlx4_srq_free(mdev->dev, &ring->srq);
436                 ring_ind--;
437         }
438
439 err_buffers:
440         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
441                 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
442
443         ring_ind = priv->rx_ring_num - 1;
444 err_allocator:
445         while (ring_ind >= 0) {
446                 mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
447                 ring_ind--;
448         }
449         return err;
450 }
451
452 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
453                              struct mlx4_en_rx_ring *ring)
454 {
455         struct mlx4_en_dev *mdev = priv->mdev;
456
457         kfree(ring->lro.lro_arr);
458         mlx4_en_unmap_buffer(&ring->wqres.buf);
459         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
460         vfree(ring->rx_info);
461         ring->rx_info = NULL;
462 }
463
464 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
465                                 struct mlx4_en_rx_ring *ring)
466 {
467         struct mlx4_en_dev *mdev = priv->mdev;
468
469         mlx4_srq_free(mdev->dev, &ring->srq);
470         mlx4_en_free_rx_buf(priv, ring);
471         mlx4_en_destroy_allocator(priv, ring);
472 }
473
474
475 /* Unmap a completed descriptor and free unused pages */
476 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
477                                     struct mlx4_en_rx_desc *rx_desc,
478                                     struct skb_frag_struct *skb_frags,
479                                     struct skb_frag_struct *skb_frags_rx,
480                                     struct mlx4_en_rx_alloc *page_alloc,
481                                     int length)
482 {
483         struct mlx4_en_dev *mdev = priv->mdev;
484         struct mlx4_en_frag_info *frag_info;
485         int nr;
486         dma_addr_t dma;
487
488         /* Collect used fragments while replacing them in the HW descirptors */
489         for (nr = 0; nr < priv->num_frags; nr++) {
490                 frag_info = &priv->frag_info[nr];
491                 if (length <= frag_info->frag_prefix_size)
492                         break;
493
494                 /* Save page reference in skb */
495                 skb_frags_rx[nr].page = skb_frags[nr].page;
496                 skb_frags_rx[nr].size = skb_frags[nr].size;
497                 skb_frags_rx[nr].page_offset = skb_frags[nr].page_offset;
498                 dma = be64_to_cpu(rx_desc->data[nr].addr);
499
500                 /* Allocate a replacement page */
501                 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, page_alloc, nr))
502                         goto fail;
503
504                 /* Unmap buffer */
505                 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
506                                  PCI_DMA_FROMDEVICE);
507         }
508         /* Adjust size of last fragment to match actual length */
509         skb_frags_rx[nr - 1].size = length -
510                 priv->frag_info[nr - 1].frag_prefix_size;
511         return nr;
512
513 fail:
514         /* Drop all accumulated fragments (which have already been replaced in
515          * the descriptor) of this packet; remaining fragments are reused... */
516         while (nr > 0) {
517                 nr--;
518                 put_page(skb_frags_rx[nr].page);
519         }
520         return 0;
521 }
522
523
524 static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
525                                       struct mlx4_en_rx_desc *rx_desc,
526                                       struct skb_frag_struct *skb_frags,
527                                       struct mlx4_en_rx_alloc *page_alloc,
528                                       unsigned int length)
529 {
530         struct mlx4_en_dev *mdev = priv->mdev;
531         struct sk_buff *skb;
532         void *va;
533         int used_frags;
534         dma_addr_t dma;
535
536         skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN);
537         if (!skb) {
538                 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
539                 return NULL;
540         }
541         skb->dev = priv->dev;
542         skb_reserve(skb, NET_IP_ALIGN);
543         skb->len = length;
544         skb->truesize = length + sizeof(struct sk_buff);
545
546         /* Get pointer to first fragment so we could copy the headers into the
547          * (linear part of the) skb */
548         va = page_address(skb_frags[0].page) + skb_frags[0].page_offset;
549
550         if (length <= SMALL_PACKET_SIZE) {
551                 /* We are copying all relevant data to the skb - temporarily
552                  * synch buffers for the copy */
553                 dma = be64_to_cpu(rx_desc->data[0].addr);
554                 dma_sync_single_range_for_cpu(&mdev->pdev->dev, dma, 0,
555                                               length, DMA_FROM_DEVICE);
556                 skb_copy_to_linear_data(skb, va, length);
557                 dma_sync_single_range_for_device(&mdev->pdev->dev, dma, 0,
558                                                  length, DMA_FROM_DEVICE);
559                 skb->tail += length;
560         } else {
561
562                 /* Move relevant fragments to skb */
563                 used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, skb_frags,
564                                                       skb_shinfo(skb)->frags,
565                                                       page_alloc, length);
566                 if (unlikely(!used_frags)) {
567                         kfree_skb(skb);
568                         return NULL;
569                 }
570                 skb_shinfo(skb)->nr_frags = used_frags;
571
572                 /* Copy headers into the skb linear buffer */
573                 memcpy(skb->data, va, HEADER_COPY_SIZE);
574                 skb->tail += HEADER_COPY_SIZE;
575
576                 /* Skip headers in first fragment */
577                 skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
578
579                 /* Adjust size of first fragment */
580                 skb_shinfo(skb)->frags[0].size -= HEADER_COPY_SIZE;
581                 skb->data_len = length - HEADER_COPY_SIZE;
582         }
583         return skb;
584 }
585
586
587 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
588 {
589         struct mlx4_en_priv *priv = netdev_priv(dev);
590         struct mlx4_cqe *cqe;
591         struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
592         struct skb_frag_struct *skb_frags;
593         struct skb_frag_struct lro_frags[MLX4_EN_MAX_RX_FRAGS];
594         struct mlx4_en_rx_desc *rx_desc;
595         struct sk_buff *skb;
596         int index;
597         int nr;
598         unsigned int length;
599         int polled = 0;
600         int ip_summed;
601
602         if (!priv->port_up)
603                 return 0;
604
605         /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
606          * descriptor offset can be deduced from the CQE index instead of
607          * reading 'cqe->index' */
608         index = cq->mcq.cons_index & ring->size_mask;
609         cqe = &cq->buf[index];
610
611         /* Process all completed CQEs */
612         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
613                     cq->mcq.cons_index & cq->size)) {
614
615                 skb_frags = ring->rx_info + (index << priv->log_rx_info);
616                 rx_desc = ring->buf + (index << ring->log_stride);
617
618                 /*
619                  * make sure we read the CQE after we read the ownership bit
620                  */
621                 rmb();
622
623                 /* Drop packet on bad receive or bad checksum */
624                 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
625                                                 MLX4_CQE_OPCODE_ERROR)) {
626                         en_err(priv, "CQE completed in error - vendor "
627                                   "syndrom:%d syndrom:%d\n",
628                                   ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
629                                   ((struct mlx4_err_cqe *) cqe)->syndrome);
630                         goto next;
631                 }
632                 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
633                         en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
634                         goto next;
635                 }
636
637                 /*
638                  * Packet is OK - process it.
639                  */
640                 length = be32_to_cpu(cqe->byte_cnt);
641                 ring->bytes += length;
642                 ring->packets++;
643
644                 if (likely(priv->rx_csum)) {
645                         if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
646                             (cqe->checksum == cpu_to_be16(0xffff))) {
647                                 priv->port_stats.rx_chksum_good++;
648                                 /* This packet is eligible for LRO if it is:
649                                  * - DIX Ethernet (type interpretation)
650                                  * - TCP/IP (v4)
651                                  * - without IP options
652                                  * - not an IP fragment */
653                                 if (mlx4_en_can_lro(cqe->status) &&
654                                     dev->features & NETIF_F_LRO) {
655
656                                         nr = mlx4_en_complete_rx_desc(
657                                                 priv, rx_desc,
658                                                 skb_frags, lro_frags,
659                                                 ring->page_alloc, length);
660                                         if (!nr)
661                                                 goto next;
662
663                                         if (priv->vlgrp && (cqe->vlan_my_qpn &
664                                                             cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK))) {
665                                                 lro_vlan_hwaccel_receive_frags(
666                                                        &ring->lro, lro_frags,
667                                                        length, length,
668                                                        priv->vlgrp,
669                                                        be16_to_cpu(cqe->sl_vid),
670                                                        NULL, 0);
671                                         } else
672                                                 lro_receive_frags(&ring->lro,
673                                                                   lro_frags,
674                                                                   length,
675                                                                   length,
676                                                                   NULL, 0);
677
678                                         goto next;
679                                 }
680
681                                 /* LRO not possible, complete processing here */
682                                 ip_summed = CHECKSUM_UNNECESSARY;
683                                 INC_PERF_COUNTER(priv->pstats.lro_misses);
684                         } else {
685                                 ip_summed = CHECKSUM_NONE;
686                                 priv->port_stats.rx_chksum_none++;
687                         }
688                 } else {
689                         ip_summed = CHECKSUM_NONE;
690                         priv->port_stats.rx_chksum_none++;
691                 }
692
693                 skb = mlx4_en_rx_skb(priv, rx_desc, skb_frags,
694                                      ring->page_alloc, length);
695                 if (!skb) {
696                         priv->stats.rx_dropped++;
697                         goto next;
698                 }
699
700                 skb->ip_summed = ip_summed;
701                 skb->protocol = eth_type_trans(skb, dev);
702                 skb_record_rx_queue(skb, cq->ring);
703
704                 /* Push it up the stack */
705                 if (priv->vlgrp && (be32_to_cpu(cqe->vlan_my_qpn) &
706                                     MLX4_CQE_VLAN_PRESENT_MASK)) {
707                         vlan_hwaccel_receive_skb(skb, priv->vlgrp,
708                                                 be16_to_cpu(cqe->sl_vid));
709                 } else
710                         netif_receive_skb(skb);
711
712 next:
713                 ++cq->mcq.cons_index;
714                 index = (cq->mcq.cons_index) & ring->size_mask;
715                 cqe = &cq->buf[index];
716                 if (++polled == budget) {
717                         /* We are here because we reached the NAPI budget -
718                          * flush only pending LRO sessions */
719                         lro_flush_all(&ring->lro);
720                         goto out;
721                 }
722         }
723
724         /* If CQ is empty flush all LRO sessions unconditionally */
725         lro_flush_all(&ring->lro);
726
727 out:
728         AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
729         mlx4_cq_set_ci(&cq->mcq);
730         wmb(); /* ensure HW sees CQ consumer before we post new buffers */
731         ring->cons = cq->mcq.cons_index;
732         ring->prod += polled; /* Polled descriptors were realocated in place */
733         mlx4_en_update_rx_prod_db(ring);
734         return polled;
735 }
736
737
738 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
739 {
740         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
741         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
742
743         if (priv->port_up)
744                 napi_schedule(&cq->napi);
745         else
746                 mlx4_en_arm_cq(priv, cq);
747 }
748
749 /* Rx CQ polling - called by NAPI */
750 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
751 {
752         struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
753         struct net_device *dev = cq->dev;
754         struct mlx4_en_priv *priv = netdev_priv(dev);
755         int done;
756
757         done = mlx4_en_process_rx_cq(dev, cq, budget);
758
759         /* If we used up all the quota - we're probably not done yet... */
760         if (done == budget)
761                 INC_PERF_COUNTER(priv->pstats.napi_quota);
762         else {
763                 /* Done for now */
764                 napi_complete(napi);
765                 mlx4_en_arm_cq(priv, cq);
766         }
767         return done;
768 }
769
770
771 /* Calculate the last offset position that accomodates a full fragment
772  * (assuming fagment size = stride-align) */
773 static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align)
774 {
775         u16 res = MLX4_EN_ALLOC_SIZE % stride;
776         u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
777
778         en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
779                             "res:%d offset:%d\n", stride, align, res, offset);
780         return offset;
781 }
782
783
784 static int frag_sizes[] = {
785         FRAG_SZ0,
786         FRAG_SZ1,
787         FRAG_SZ2,
788         FRAG_SZ3
789 };
790
791 void mlx4_en_calc_rx_buf(struct net_device *dev)
792 {
793         struct mlx4_en_priv *priv = netdev_priv(dev);
794         int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
795         int buf_size = 0;
796         int i = 0;
797
798         while (buf_size < eff_mtu) {
799                 priv->frag_info[i].frag_size =
800                         (eff_mtu > buf_size + frag_sizes[i]) ?
801                                 frag_sizes[i] : eff_mtu - buf_size;
802                 priv->frag_info[i].frag_prefix_size = buf_size;
803                 if (!i) {
804                         priv->frag_info[i].frag_align = NET_IP_ALIGN;
805                         priv->frag_info[i].frag_stride =
806                                 ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
807                 } else {
808                         priv->frag_info[i].frag_align = 0;
809                         priv->frag_info[i].frag_stride =
810                                 ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
811                 }
812                 priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset(
813                                                 priv, priv->frag_info[i].frag_stride,
814                                                 priv->frag_info[i].frag_align);
815                 buf_size += priv->frag_info[i].frag_size;
816                 i++;
817         }
818
819         priv->num_frags = i;
820         priv->rx_skb_size = eff_mtu;
821         priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct));
822
823         en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
824                   "num_frags:%d):\n", eff_mtu, priv->num_frags);
825         for (i = 0; i < priv->num_frags; i++) {
826                 en_dbg(DRV, priv, "  frag:%d - size:%d prefix:%d align:%d "
827                                 "stride:%d last_offset:%d\n", i,
828                                 priv->frag_info[i].frag_size,
829                                 priv->frag_info[i].frag_prefix_size,
830                                 priv->frag_info[i].frag_align,
831                                 priv->frag_info[i].frag_stride,
832                                 priv->frag_info[i].last_offset);
833         }
834 }
835
836 /* RSS related functions */
837
838 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv,
839                                  int qpn, int srqn, int cqn,
840                                  enum mlx4_qp_state *state,
841                                  struct mlx4_qp *qp)
842 {
843         struct mlx4_en_dev *mdev = priv->mdev;
844         struct mlx4_qp_context *context;
845         int err = 0;
846
847         context = kmalloc(sizeof *context , GFP_KERNEL);
848         if (!context) {
849                 en_err(priv, "Failed to allocate qp context\n");
850                 return -ENOMEM;
851         }
852
853         err = mlx4_qp_alloc(mdev->dev, qpn, qp);
854         if (err) {
855                 en_err(priv, "Failed to allocate qp #%x\n", qpn);
856                 goto out;
857         }
858         qp->event = mlx4_en_sqp_event;
859
860         memset(context, 0, sizeof *context);
861         mlx4_en_fill_qp_context(priv, 0, 0, 0, 0, qpn, cqn, srqn, context);
862
863         err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, context, qp, state);
864         if (err) {
865                 mlx4_qp_remove(mdev->dev, qp);
866                 mlx4_qp_free(mdev->dev, qp);
867         }
868 out:
869         kfree(context);
870         return err;
871 }
872
873 /* Allocate rx qp's and configure them according to rss map */
874 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
875 {
876         struct mlx4_en_dev *mdev = priv->mdev;
877         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
878         struct mlx4_qp_context context;
879         struct mlx4_en_rss_context *rss_context;
880         void *ptr;
881         int rss_xor = mdev->profile.rss_xor;
882         u8 rss_mask = mdev->profile.rss_mask;
883         int i, srqn, qpn, cqn;
884         int err = 0;
885         int good_qps = 0;
886
887         en_dbg(DRV, priv, "Configuring rss steering\n");
888         err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
889                                     priv->rx_ring_num,
890                                     &rss_map->base_qpn);
891         if (err) {
892                 en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
893                 return err;
894         }
895
896         for (i = 0; i < priv->rx_ring_num; i++) {
897                 cqn = priv->rx_ring[i].cqn;
898                 srqn = priv->rx_ring[i].srq.srqn;
899                 qpn = rss_map->base_qpn + i;
900                 err = mlx4_en_config_rss_qp(priv, qpn, srqn, cqn,
901                                             &rss_map->state[i],
902                                             &rss_map->qps[i]);
903                 if (err)
904                         goto rss_err;
905
906                 ++good_qps;
907         }
908
909         /* Configure RSS indirection qp */
910         err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn);
911         if (err) {
912                 en_err(priv, "Failed to reserve range for RSS "
913                              "indirection qp\n");
914                 goto rss_err;
915         }
916         err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
917         if (err) {
918                 en_err(priv, "Failed to allocate RSS indirection QP\n");
919                 goto reserve_err;
920         }
921         rss_map->indir_qp.event = mlx4_en_sqp_event;
922         mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
923                                 priv->rx_ring[0].cqn, 0, &context);
924
925         ptr = ((void *) &context) + 0x3c;
926         rss_context = (struct mlx4_en_rss_context *) ptr;
927         rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 |
928                                             (rss_map->base_qpn));
929         rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
930         rss_context->hash_fn = rss_xor & 0x3;
931         rss_context->flags = rss_mask << 2;
932
933         err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
934                                &rss_map->indir_qp, &rss_map->indir_state);
935         if (err)
936                 goto indir_err;
937
938         return 0;
939
940 indir_err:
941         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
942                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
943         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
944         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
945 reserve_err:
946         mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
947 rss_err:
948         for (i = 0; i < good_qps; i++) {
949                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
950                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
951                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
952                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
953         }
954         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
955         return err;
956 }
957
958 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
959 {
960         struct mlx4_en_dev *mdev = priv->mdev;
961         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
962         int i;
963
964         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
965                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
966         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
967         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
968         mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
969
970         for (i = 0; i < priv->rx_ring_num; i++) {
971                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
972                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
973                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
974                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
975         }
976         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
977 }
978
979
980
981
982