05998ee297c950b74a6a1da4d583dc43f4d5ee0d
[linux-2.6.git] / drivers / net / mlx4 / en_rx.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux/mlx4/cq.h>
35 #include <linux/slab.h>
36 #include <linux/mlx4/qp.h>
37 #include <linux/skbuff.h>
38 #include <linux/if_ether.h>
39 #include <linux/if_vlan.h>
40 #include <linux/vmalloc.h>
41
42 #include "mlx4_en.h"
43
44
45 static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv,
46                               struct mlx4_en_rx_desc *rx_desc,
47                               struct skb_frag_struct *skb_frags,
48                               struct mlx4_en_rx_alloc *ring_alloc,
49                               int i)
50 {
51         struct mlx4_en_dev *mdev = priv->mdev;
52         struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
53         struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i];
54         struct page *page;
55         dma_addr_t dma;
56
57         if (page_alloc->offset == frag_info->last_offset) {
58                 /* Allocate new page */
59                 page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER);
60                 if (!page)
61                         return -ENOMEM;
62
63                 skb_frags[i].page = page_alloc->page;
64                 skb_frags[i].page_offset = page_alloc->offset;
65                 page_alloc->page = page;
66                 page_alloc->offset = frag_info->frag_align;
67         } else {
68                 page = page_alloc->page;
69                 get_page(page);
70
71                 skb_frags[i].page = page;
72                 skb_frags[i].page_offset = page_alloc->offset;
73                 page_alloc->offset += frag_info->frag_stride;
74         }
75         dma = pci_map_single(mdev->pdev, page_address(skb_frags[i].page) +
76                              skb_frags[i].page_offset, frag_info->frag_size,
77                              PCI_DMA_FROMDEVICE);
78         rx_desc->data[i].addr = cpu_to_be64(dma);
79         return 0;
80 }
81
82 static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
83                                   struct mlx4_en_rx_ring *ring)
84 {
85         struct mlx4_en_rx_alloc *page_alloc;
86         int i;
87
88         for (i = 0; i < priv->num_frags; i++) {
89                 page_alloc = &ring->page_alloc[i];
90                 page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
91                                                MLX4_EN_ALLOC_ORDER);
92                 if (!page_alloc->page)
93                         goto out;
94
95                 page_alloc->offset = priv->frag_info[i].frag_align;
96                 en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
97                        i, page_alloc->page);
98         }
99         return 0;
100
101 out:
102         while (i--) {
103                 page_alloc = &ring->page_alloc[i];
104                 put_page(page_alloc->page);
105                 page_alloc->page = NULL;
106         }
107         return -ENOMEM;
108 }
109
110 static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
111                                       struct mlx4_en_rx_ring *ring)
112 {
113         struct mlx4_en_rx_alloc *page_alloc;
114         int i;
115
116         for (i = 0; i < priv->num_frags; i++) {
117                 page_alloc = &ring->page_alloc[i];
118                 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
119                        i, page_count(page_alloc->page));
120
121                 put_page(page_alloc->page);
122                 page_alloc->page = NULL;
123         }
124 }
125
126
127 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
128                                  struct mlx4_en_rx_ring *ring, int index)
129 {
130         struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
131         struct skb_frag_struct *skb_frags = ring->rx_info +
132                                             (index << priv->log_rx_info);
133         int possible_frags;
134         int i;
135
136         /* Set size and memtype fields */
137         for (i = 0; i < priv->num_frags; i++) {
138                 skb_frags[i].size = priv->frag_info[i].frag_size;
139                 rx_desc->data[i].byte_count =
140                         cpu_to_be32(priv->frag_info[i].frag_size);
141                 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
142         }
143
144         /* If the number of used fragments does not fill up the ring stride,
145          * remaining (unused) fragments must be padded with null address/size
146          * and a special memory key */
147         possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
148         for (i = priv->num_frags; i < possible_frags; i++) {
149                 rx_desc->data[i].byte_count = 0;
150                 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
151                 rx_desc->data[i].addr = 0;
152         }
153 }
154
155
156 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
157                                    struct mlx4_en_rx_ring *ring, int index)
158 {
159         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
160         struct skb_frag_struct *skb_frags = ring->rx_info +
161                                             (index << priv->log_rx_info);
162         int i;
163
164         for (i = 0; i < priv->num_frags; i++)
165                 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, ring->page_alloc, i))
166                         goto err;
167
168         return 0;
169
170 err:
171         while (i--)
172                 put_page(skb_frags[i].page);
173         return -ENOMEM;
174 }
175
176 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
177 {
178         *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
179 }
180
181 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
182                                  struct mlx4_en_rx_ring *ring,
183                                  int index)
184 {
185         struct mlx4_en_dev *mdev = priv->mdev;
186         struct skb_frag_struct *skb_frags;
187         struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
188         dma_addr_t dma;
189         int nr;
190
191         skb_frags = ring->rx_info + (index << priv->log_rx_info);
192         for (nr = 0; nr < priv->num_frags; nr++) {
193                 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
194                 dma = be64_to_cpu(rx_desc->data[nr].addr);
195
196                 en_dbg(DRV, priv, "Unmapping buffer at dma:0x%llx\n", (u64) dma);
197                 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
198                                  PCI_DMA_FROMDEVICE);
199                 put_page(skb_frags[nr].page);
200         }
201 }
202
203 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
204 {
205         struct mlx4_en_rx_ring *ring;
206         int ring_ind;
207         int buf_ind;
208         int new_size;
209
210         for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
211                 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
212                         ring = &priv->rx_ring[ring_ind];
213
214                         if (mlx4_en_prepare_rx_desc(priv, ring,
215                                                     ring->actual_size)) {
216                                 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
217                                         en_err(priv, "Failed to allocate "
218                                                      "enough rx buffers\n");
219                                         return -ENOMEM;
220                                 } else {
221                                         new_size = rounddown_pow_of_two(ring->actual_size);
222                                         en_warn(priv, "Only %d buffers allocated "
223                                                       "reducing ring size to %d",
224                                                 ring->actual_size, new_size);
225                                         goto reduce_rings;
226                                 }
227                         }
228                         ring->actual_size++;
229                         ring->prod++;
230                 }
231         }
232         return 0;
233
234 reduce_rings:
235         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
236                 ring = &priv->rx_ring[ring_ind];
237                 while (ring->actual_size > new_size) {
238                         ring->actual_size--;
239                         ring->prod--;
240                         mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
241                 }
242         }
243
244         return 0;
245 }
246
247 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
248                                 struct mlx4_en_rx_ring *ring)
249 {
250         int index;
251
252         en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
253                ring->cons, ring->prod);
254
255         /* Unmap and free Rx buffers */
256         BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
257         while (ring->cons != ring->prod) {
258                 index = ring->cons & ring->size_mask;
259                 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
260                 mlx4_en_free_rx_desc(priv, ring, index);
261                 ++ring->cons;
262         }
263 }
264
265 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
266                            struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
267 {
268         struct mlx4_en_dev *mdev = priv->mdev;
269         int err;
270         int tmp;
271
272
273         ring->prod = 0;
274         ring->cons = 0;
275         ring->size = size;
276         ring->size_mask = size - 1;
277         ring->stride = stride;
278         ring->log_stride = ffs(ring->stride) - 1;
279         ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
280
281         tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
282                                         sizeof(struct skb_frag_struct));
283         ring->rx_info = vmalloc(tmp);
284         if (!ring->rx_info) {
285                 en_err(priv, "Failed allocating rx_info ring\n");
286                 return -ENOMEM;
287         }
288         en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
289                  ring->rx_info, tmp);
290
291         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
292                                  ring->buf_size, 2 * PAGE_SIZE);
293         if (err)
294                 goto err_ring;
295
296         err = mlx4_en_map_buffer(&ring->wqres.buf);
297         if (err) {
298                 en_err(priv, "Failed to map RX buffer\n");
299                 goto err_hwq;
300         }
301         ring->buf = ring->wqres.buf.direct.buf;
302
303         return 0;
304
305 err_hwq:
306         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
307 err_ring:
308         vfree(ring->rx_info);
309         ring->rx_info = NULL;
310         return err;
311 }
312
313 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
314 {
315         struct mlx4_en_rx_ring *ring;
316         int i;
317         int ring_ind;
318         int err;
319         int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
320                                         DS_SIZE * priv->num_frags);
321
322         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
323                 ring = &priv->rx_ring[ring_ind];
324
325                 ring->prod = 0;
326                 ring->cons = 0;
327                 ring->actual_size = 0;
328                 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
329
330                 ring->stride = stride;
331                 if (ring->stride <= TXBB_SIZE)
332                         ring->buf += TXBB_SIZE;
333
334                 ring->log_stride = ffs(ring->stride) - 1;
335                 ring->buf_size = ring->size * ring->stride;
336
337                 memset(ring->buf, 0, ring->buf_size);
338                 mlx4_en_update_rx_prod_db(ring);
339
340                 /* Initailize all descriptors */
341                 for (i = 0; i < ring->size; i++)
342                         mlx4_en_init_rx_desc(priv, ring, i);
343
344                 /* Initialize page allocators */
345                 err = mlx4_en_init_allocator(priv, ring);
346                 if (err) {
347                         en_err(priv, "Failed initializing ring allocator\n");
348                         ring_ind--;
349                         goto err_allocator;
350                 }
351         }
352         err = mlx4_en_fill_rx_buffers(priv);
353         if (err)
354                 goto err_buffers;
355
356         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
357                 ring = &priv->rx_ring[ring_ind];
358
359                 ring->size_mask = ring->actual_size - 1;
360                 mlx4_en_update_rx_prod_db(ring);
361         }
362
363         return 0;
364
365 err_buffers:
366         for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
367                 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
368
369         ring_ind = priv->rx_ring_num - 1;
370 err_allocator:
371         while (ring_ind >= 0) {
372                 mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
373                 ring_ind--;
374         }
375         return err;
376 }
377
378 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
379                              struct mlx4_en_rx_ring *ring)
380 {
381         struct mlx4_en_dev *mdev = priv->mdev;
382
383         mlx4_en_unmap_buffer(&ring->wqres.buf);
384         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size + TXBB_SIZE);
385         vfree(ring->rx_info);
386         ring->rx_info = NULL;
387 }
388
389 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
390                                 struct mlx4_en_rx_ring *ring)
391 {
392         mlx4_en_free_rx_buf(priv, ring);
393         if (ring->stride <= TXBB_SIZE)
394                 ring->buf -= TXBB_SIZE;
395         mlx4_en_destroy_allocator(priv, ring);
396 }
397
398
399 /* Unmap a completed descriptor and free unused pages */
400 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
401                                     struct mlx4_en_rx_desc *rx_desc,
402                                     struct skb_frag_struct *skb_frags,
403                                     struct skb_frag_struct *skb_frags_rx,
404                                     struct mlx4_en_rx_alloc *page_alloc,
405                                     int length)
406 {
407         struct mlx4_en_dev *mdev = priv->mdev;
408         struct mlx4_en_frag_info *frag_info;
409         int nr;
410         dma_addr_t dma;
411
412         /* Collect used fragments while replacing them in the HW descirptors */
413         for (nr = 0; nr < priv->num_frags; nr++) {
414                 frag_info = &priv->frag_info[nr];
415                 if (length <= frag_info->frag_prefix_size)
416                         break;
417
418                 /* Save page reference in skb */
419                 skb_frags_rx[nr].page = skb_frags[nr].page;
420                 skb_frags_rx[nr].size = skb_frags[nr].size;
421                 skb_frags_rx[nr].page_offset = skb_frags[nr].page_offset;
422                 dma = be64_to_cpu(rx_desc->data[nr].addr);
423
424                 /* Allocate a replacement page */
425                 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, page_alloc, nr))
426                         goto fail;
427
428                 /* Unmap buffer */
429                 pci_unmap_single(mdev->pdev, dma, skb_frags_rx[nr].size,
430                                  PCI_DMA_FROMDEVICE);
431         }
432         /* Adjust size of last fragment to match actual length */
433         if (nr > 0)
434                 skb_frags_rx[nr - 1].size = length -
435                         priv->frag_info[nr - 1].frag_prefix_size;
436         return nr;
437
438 fail:
439         /* Drop all accumulated fragments (which have already been replaced in
440          * the descriptor) of this packet; remaining fragments are reused... */
441         while (nr > 0) {
442                 nr--;
443                 put_page(skb_frags_rx[nr].page);
444         }
445         return 0;
446 }
447
448
449 static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
450                                       struct mlx4_en_rx_desc *rx_desc,
451                                       struct skb_frag_struct *skb_frags,
452                                       struct mlx4_en_rx_alloc *page_alloc,
453                                       unsigned int length)
454 {
455         struct mlx4_en_dev *mdev = priv->mdev;
456         struct sk_buff *skb;
457         void *va;
458         int used_frags;
459         dma_addr_t dma;
460
461         skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN);
462         if (!skb) {
463                 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
464                 return NULL;
465         }
466         skb->dev = priv->dev;
467         skb_reserve(skb, NET_IP_ALIGN);
468         skb->len = length;
469         skb->truesize = length + sizeof(struct sk_buff);
470
471         /* Get pointer to first fragment so we could copy the headers into the
472          * (linear part of the) skb */
473         va = page_address(skb_frags[0].page) + skb_frags[0].page_offset;
474
475         if (length <= SMALL_PACKET_SIZE) {
476                 /* We are copying all relevant data to the skb - temporarily
477                  * synch buffers for the copy */
478                 dma = be64_to_cpu(rx_desc->data[0].addr);
479                 dma_sync_single_for_cpu(&mdev->pdev->dev, dma, length,
480                                         DMA_FROM_DEVICE);
481                 skb_copy_to_linear_data(skb, va, length);
482                 dma_sync_single_for_device(&mdev->pdev->dev, dma, length,
483                                            DMA_FROM_DEVICE);
484                 skb->tail += length;
485         } else {
486
487                 /* Move relevant fragments to skb */
488                 used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, skb_frags,
489                                                       skb_shinfo(skb)->frags,
490                                                       page_alloc, length);
491                 if (unlikely(!used_frags)) {
492                         kfree_skb(skb);
493                         return NULL;
494                 }
495                 skb_shinfo(skb)->nr_frags = used_frags;
496
497                 /* Copy headers into the skb linear buffer */
498                 memcpy(skb->data, va, HEADER_COPY_SIZE);
499                 skb->tail += HEADER_COPY_SIZE;
500
501                 /* Skip headers in first fragment */
502                 skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
503
504                 /* Adjust size of first fragment */
505                 skb_shinfo(skb)->frags[0].size -= HEADER_COPY_SIZE;
506                 skb->data_len = length - HEADER_COPY_SIZE;
507         }
508         return skb;
509 }
510
511 static void validate_loopback(struct mlx4_en_priv *priv, struct sk_buff *skb)
512 {
513         int i;
514         int offset = ETH_HLEN;
515
516         for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) {
517                 if (*(skb->data + offset) != (unsigned char) (i & 0xff))
518                         goto out_loopback;
519         }
520         /* Loopback found */
521         priv->loopback_ok = 1;
522
523 out_loopback:
524         dev_kfree_skb_any(skb);
525 }
526
527 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
528 {
529         struct mlx4_en_priv *priv = netdev_priv(dev);
530         struct mlx4_cqe *cqe;
531         struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
532         struct skb_frag_struct *skb_frags;
533         struct mlx4_en_rx_desc *rx_desc;
534         struct sk_buff *skb;
535         int index;
536         int nr;
537         unsigned int length;
538         int polled = 0;
539         int ip_summed;
540
541         if (!priv->port_up)
542                 return 0;
543
544         /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
545          * descriptor offset can be deduced from the CQE index instead of
546          * reading 'cqe->index' */
547         index = cq->mcq.cons_index & ring->size_mask;
548         cqe = &cq->buf[index];
549
550         /* Process all completed CQEs */
551         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
552                     cq->mcq.cons_index & cq->size)) {
553
554                 skb_frags = ring->rx_info + (index << priv->log_rx_info);
555                 rx_desc = ring->buf + (index << ring->log_stride);
556
557                 /*
558                  * make sure we read the CQE after we read the ownership bit
559                  */
560                 rmb();
561
562                 /* Drop packet on bad receive or bad checksum */
563                 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
564                                                 MLX4_CQE_OPCODE_ERROR)) {
565                         en_err(priv, "CQE completed in error - vendor "
566                                   "syndrom:%d syndrom:%d\n",
567                                   ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
568                                   ((struct mlx4_err_cqe *) cqe)->syndrome);
569                         goto next;
570                 }
571                 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
572                         en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
573                         goto next;
574                 }
575
576                 /*
577                  * Packet is OK - process it.
578                  */
579                 length = be32_to_cpu(cqe->byte_cnt);
580                 ring->bytes += length;
581                 ring->packets++;
582
583                 if (likely(priv->rx_csum)) {
584                         if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
585                             (cqe->checksum == cpu_to_be16(0xffff))) {
586                                 priv->port_stats.rx_chksum_good++;
587                                 /* This packet is eligible for LRO if it is:
588                                  * - DIX Ethernet (type interpretation)
589                                  * - TCP/IP (v4)
590                                  * - without IP options
591                                  * - not an IP fragment */
592                                 if (dev->features & NETIF_F_GRO) {
593                                         struct sk_buff *gro_skb = napi_get_frags(&cq->napi);
594                                         if (!gro_skb)
595                                                 goto next;
596
597                                         nr = mlx4_en_complete_rx_desc(
598                                                 priv, rx_desc,
599                                                 skb_frags, skb_shinfo(gro_skb)->frags,
600                                                 ring->page_alloc, length);
601                                         if (!nr)
602                                                 goto next;
603
604                                         skb_shinfo(gro_skb)->nr_frags = nr;
605                                         gro_skb->len = length;
606                                         gro_skb->data_len = length;
607                                         gro_skb->truesize += length;
608                                         gro_skb->ip_summed = CHECKSUM_UNNECESSARY;
609
610                                         if (priv->vlgrp && (cqe->vlan_my_qpn &
611                                                             cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)))
612                                                 vlan_gro_frags(&cq->napi, priv->vlgrp, be16_to_cpu(cqe->sl_vid));
613                                         else
614                                                 napi_gro_frags(&cq->napi);
615
616                                         goto next;
617                                 }
618
619                                 /* LRO not possible, complete processing here */
620                                 ip_summed = CHECKSUM_UNNECESSARY;
621                         } else {
622                                 ip_summed = CHECKSUM_NONE;
623                                 priv->port_stats.rx_chksum_none++;
624                         }
625                 } else {
626                         ip_summed = CHECKSUM_NONE;
627                         priv->port_stats.rx_chksum_none++;
628                 }
629
630                 skb = mlx4_en_rx_skb(priv, rx_desc, skb_frags,
631                                      ring->page_alloc, length);
632                 if (!skb) {
633                         priv->stats.rx_dropped++;
634                         goto next;
635                 }
636
637                 if (unlikely(priv->validate_loopback)) {
638                         validate_loopback(priv, skb);
639                         goto next;
640                 }
641
642                 skb->ip_summed = ip_summed;
643                 skb->protocol = eth_type_trans(skb, dev);
644                 skb_record_rx_queue(skb, cq->ring);
645
646                 /* Push it up the stack */
647                 if (priv->vlgrp && (be32_to_cpu(cqe->vlan_my_qpn) &
648                                     MLX4_CQE_VLAN_PRESENT_MASK)) {
649                         vlan_hwaccel_receive_skb(skb, priv->vlgrp,
650                                                 be16_to_cpu(cqe->sl_vid));
651                 } else
652                         netif_receive_skb(skb);
653
654 next:
655                 ++cq->mcq.cons_index;
656                 index = (cq->mcq.cons_index) & ring->size_mask;
657                 cqe = &cq->buf[index];
658                 if (++polled == budget) {
659                         /* We are here because we reached the NAPI budget -
660                          * flush only pending LRO sessions */
661                         goto out;
662                 }
663         }
664
665 out:
666         AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
667         mlx4_cq_set_ci(&cq->mcq);
668         wmb(); /* ensure HW sees CQ consumer before we post new buffers */
669         ring->cons = cq->mcq.cons_index;
670         ring->prod += polled; /* Polled descriptors were realocated in place */
671         mlx4_en_update_rx_prod_db(ring);
672         return polled;
673 }
674
675
676 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
677 {
678         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
679         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
680
681         if (priv->port_up)
682                 napi_schedule(&cq->napi);
683         else
684                 mlx4_en_arm_cq(priv, cq);
685 }
686
687 /* Rx CQ polling - called by NAPI */
688 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
689 {
690         struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
691         struct net_device *dev = cq->dev;
692         struct mlx4_en_priv *priv = netdev_priv(dev);
693         int done;
694
695         done = mlx4_en_process_rx_cq(dev, cq, budget);
696
697         /* If we used up all the quota - we're probably not done yet... */
698         if (done == budget)
699                 INC_PERF_COUNTER(priv->pstats.napi_quota);
700         else {
701                 /* Done for now */
702                 napi_complete(napi);
703                 mlx4_en_arm_cq(priv, cq);
704         }
705         return done;
706 }
707
708
709 /* Calculate the last offset position that accomodates a full fragment
710  * (assuming fagment size = stride-align) */
711 static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align)
712 {
713         u16 res = MLX4_EN_ALLOC_SIZE % stride;
714         u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
715
716         en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
717                             "res:%d offset:%d\n", stride, align, res, offset);
718         return offset;
719 }
720
721
722 static int frag_sizes[] = {
723         FRAG_SZ0,
724         FRAG_SZ1,
725         FRAG_SZ2,
726         FRAG_SZ3
727 };
728
729 void mlx4_en_calc_rx_buf(struct net_device *dev)
730 {
731         struct mlx4_en_priv *priv = netdev_priv(dev);
732         int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
733         int buf_size = 0;
734         int i = 0;
735
736         while (buf_size < eff_mtu) {
737                 priv->frag_info[i].frag_size =
738                         (eff_mtu > buf_size + frag_sizes[i]) ?
739                                 frag_sizes[i] : eff_mtu - buf_size;
740                 priv->frag_info[i].frag_prefix_size = buf_size;
741                 if (!i) {
742                         priv->frag_info[i].frag_align = NET_IP_ALIGN;
743                         priv->frag_info[i].frag_stride =
744                                 ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
745                 } else {
746                         priv->frag_info[i].frag_align = 0;
747                         priv->frag_info[i].frag_stride =
748                                 ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
749                 }
750                 priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset(
751                                                 priv, priv->frag_info[i].frag_stride,
752                                                 priv->frag_info[i].frag_align);
753                 buf_size += priv->frag_info[i].frag_size;
754                 i++;
755         }
756
757         priv->num_frags = i;
758         priv->rx_skb_size = eff_mtu;
759         priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct));
760
761         en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
762                   "num_frags:%d):\n", eff_mtu, priv->num_frags);
763         for (i = 0; i < priv->num_frags; i++) {
764                 en_dbg(DRV, priv, "  frag:%d - size:%d prefix:%d align:%d "
765                                 "stride:%d last_offset:%d\n", i,
766                                 priv->frag_info[i].frag_size,
767                                 priv->frag_info[i].frag_prefix_size,
768                                 priv->frag_info[i].frag_align,
769                                 priv->frag_info[i].frag_stride,
770                                 priv->frag_info[i].last_offset);
771         }
772 }
773
774 /* RSS related functions */
775
776 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
777                                  struct mlx4_en_rx_ring *ring,
778                                  enum mlx4_qp_state *state,
779                                  struct mlx4_qp *qp)
780 {
781         struct mlx4_en_dev *mdev = priv->mdev;
782         struct mlx4_qp_context *context;
783         int err = 0;
784
785         context = kmalloc(sizeof *context , GFP_KERNEL);
786         if (!context) {
787                 en_err(priv, "Failed to allocate qp context\n");
788                 return -ENOMEM;
789         }
790
791         err = mlx4_qp_alloc(mdev->dev, qpn, qp);
792         if (err) {
793                 en_err(priv, "Failed to allocate qp #%x\n", qpn);
794                 goto out;
795         }
796         qp->event = mlx4_en_sqp_event;
797
798         memset(context, 0, sizeof *context);
799         mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0,
800                                 qpn, ring->cqn, context);
801         context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
802
803         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
804         if (err) {
805                 mlx4_qp_remove(mdev->dev, qp);
806                 mlx4_qp_free(mdev->dev, qp);
807         }
808         mlx4_en_update_rx_prod_db(ring);
809 out:
810         kfree(context);
811         return err;
812 }
813
814 /* Allocate rx qp's and configure them according to rss map */
815 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
816 {
817         struct mlx4_en_dev *mdev = priv->mdev;
818         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
819         struct mlx4_qp_context context;
820         struct mlx4_en_rss_context *rss_context;
821         void *ptr;
822         u8 rss_mask = 0x3f;
823         int i, qpn;
824         int err = 0;
825         int good_qps = 0;
826
827         en_dbg(DRV, priv, "Configuring rss steering\n");
828         err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
829                                     priv->rx_ring_num,
830                                     &rss_map->base_qpn);
831         if (err) {
832                 en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
833                 return err;
834         }
835
836         for (i = 0; i < priv->rx_ring_num; i++) {
837                 qpn = rss_map->base_qpn + i;
838                 err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i],
839                                             &rss_map->state[i],
840                                             &rss_map->qps[i]);
841                 if (err)
842                         goto rss_err;
843
844                 ++good_qps;
845         }
846
847         /* Configure RSS indirection qp */
848         err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
849         if (err) {
850                 en_err(priv, "Failed to allocate RSS indirection QP\n");
851                 goto rss_err;
852         }
853         rss_map->indir_qp.event = mlx4_en_sqp_event;
854         mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
855                                 priv->rx_ring[0].cqn, &context);
856
857         ptr = ((void *) &context) + 0x3c;
858         rss_context = (struct mlx4_en_rss_context *) ptr;
859         rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 |
860                                             (rss_map->base_qpn));
861         rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
862         rss_context->flags = rss_mask;
863
864         if (priv->mdev->profile.udp_rss)
865                 rss_context->base_qpn_udp = rss_context->default_qpn;
866         err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
867                                &rss_map->indir_qp, &rss_map->indir_state);
868         if (err)
869                 goto indir_err;
870
871         return 0;
872
873 indir_err:
874         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
875                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
876         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
877         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
878 rss_err:
879         for (i = 0; i < good_qps; i++) {
880                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
881                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
882                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
883                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
884         }
885         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
886         return err;
887 }
888
889 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
890 {
891         struct mlx4_en_dev *mdev = priv->mdev;
892         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
893         int i;
894
895         mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
896                        MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
897         mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
898         mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
899
900         for (i = 0; i < priv->rx_ring_num; i++) {
901                 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
902                                MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
903                 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
904                 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
905         }
906         mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
907 }
908
909
910
911
912