b3be579b47ed90a89565d39b125453620fbaf99d
[linux-2.6.git] / drivers / net / ixgbe / ixgbe_main.c
1 /*******************************************************************************
2
3   Intel 10 Gigabit PCI Express Linux driver
4   Copyright(c) 1999 - 2008 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
34 #include <linux/in.h>
35 #include <linux/ip.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42
43 #include "ixgbe.h"
44 #include "ixgbe_common.h"
45
46 char ixgbe_driver_name[] = "ixgbe";
47 static const char ixgbe_driver_string[] =
48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
49
50 #define DRV_VERSION "1.3.30-k2"
51 const char ixgbe_driver_version[] = DRV_VERSION;
52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
53
54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
55         [board_82598] = &ixgbe_82598_info,
56 };
57
58 /* ixgbe_pci_tbl - PCI Device ID Table
59  *
60  * Wildcard entries (PCI_ANY_ID) should come last
61  * Last entry must be all 0s
62  *
63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64  *   Class, Class Mask, private data (not used) }
65  */
66 static struct pci_device_id ixgbe_pci_tbl[] = {
67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
68          board_82598 },
69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
70          board_82598 },
71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
72          board_82598 },
73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
74          board_82598 },
75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
76          board_82598 },
77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
78          board_82598 },
79
80         /* required last entry */
81         {0, }
82 };
83 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
84
85 #ifdef CONFIG_IXGBE_DCA
86 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
87                             void *p);
88 static struct notifier_block dca_notifier = {
89         .notifier_call = ixgbe_notify_dca,
90         .next          = NULL,
91         .priority      = 0
92 };
93 #endif
94
95 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
96 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
99
100 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
101
102 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
103 {
104         u32 ctrl_ext;
105
106         /* Let firmware take over control of h/w */
107         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
108         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
109                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
110 }
111
112 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
113 {
114         u32 ctrl_ext;
115
116         /* Let firmware know the driver has taken over */
117         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
118         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
119                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
120 }
121
122 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
123                            u8 msix_vector)
124 {
125         u32 ivar, index;
126
127         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
128         index = (int_alloc_entry >> 2) & 0x1F;
129         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
130         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
131         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
132         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
133 }
134
135 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
136                                              struct ixgbe_tx_buffer
137                                              *tx_buffer_info)
138 {
139         if (tx_buffer_info->dma) {
140                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
141                                tx_buffer_info->length, PCI_DMA_TODEVICE);
142                 tx_buffer_info->dma = 0;
143         }
144         if (tx_buffer_info->skb) {
145                 dev_kfree_skb_any(tx_buffer_info->skb);
146                 tx_buffer_info->skb = NULL;
147         }
148         /* tx_buffer_info must be completely set up in the transmit path */
149 }
150
151 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
152                                        struct ixgbe_ring *tx_ring,
153                                        unsigned int eop)
154 {
155         struct ixgbe_hw *hw = &adapter->hw;
156         u32 head, tail;
157
158         /* Detect a transmit hang in hardware, this serializes the
159          * check with the clearing of time_stamp and movement of eop */
160         head = IXGBE_READ_REG(hw, tx_ring->head);
161         tail = IXGBE_READ_REG(hw, tx_ring->tail);
162         adapter->detect_tx_hung = false;
163         if ((head != tail) &&
164             tx_ring->tx_buffer_info[eop].time_stamp &&
165             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
166             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
167                 /* detected Tx unit hang */
168                 union ixgbe_adv_tx_desc *tx_desc;
169                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
170                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
171                         "  Tx Queue             <%d>\n"
172                         "  TDH, TDT             <%x>, <%x>\n"
173                         "  next_to_use          <%x>\n"
174                         "  next_to_clean        <%x>\n"
175                         "tx_buffer_info[next_to_clean]\n"
176                         "  time_stamp           <%lx>\n"
177                         "  jiffies              <%lx>\n",
178                         tx_ring->queue_index,
179                         head, tail,
180                         tx_ring->next_to_use, eop,
181                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
182                 return true;
183         }
184
185         return false;
186 }
187
188 #define IXGBE_MAX_TXD_PWR       14
189 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
190
191 /* Tx Descriptors needed, worst case */
192 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
193                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
194 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
195         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
196
197 #define GET_TX_HEAD_FROM_RING(ring) (\
198         *(volatile u32 *) \
199         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
200 static void ixgbe_tx_timeout(struct net_device *netdev);
201
202 /**
203  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
204  * @adapter: board private structure
205  * @tx_ring: tx ring to clean
206  **/
207 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
208                                struct ixgbe_ring *tx_ring)
209 {
210         union ixgbe_adv_tx_desc *tx_desc;
211         struct ixgbe_tx_buffer *tx_buffer_info;
212         struct net_device *netdev = adapter->netdev;
213         struct sk_buff *skb;
214         unsigned int i;
215         u32 head, oldhead;
216         unsigned int count = 0;
217         unsigned int total_bytes = 0, total_packets = 0;
218
219         rmb();
220         head = GET_TX_HEAD_FROM_RING(tx_ring);
221         head = le32_to_cpu(head);
222         i = tx_ring->next_to_clean;
223         while (1) {
224                 while (i != head) {
225                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
226                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
227                         skb = tx_buffer_info->skb;
228
229                         if (skb) {
230                                 unsigned int segs, bytecount;
231
232                                 /* gso_segs is currently only valid for tcp */
233                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
234                                 /* multiply data chunks by size of headers */
235                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
236                                             skb->len;
237                                 total_packets += segs;
238                                 total_bytes += bytecount;
239                         }
240
241                         ixgbe_unmap_and_free_tx_resource(adapter,
242                                                          tx_buffer_info);
243
244                         i++;
245                         if (i == tx_ring->count)
246                                 i = 0;
247
248                         count++;
249                         if (count == tx_ring->count)
250                                 goto done_cleaning;
251                 }
252                 oldhead = head;
253                 rmb();
254                 head = GET_TX_HEAD_FROM_RING(tx_ring);
255                 head = le32_to_cpu(head);
256                 if (head == oldhead)
257                         goto done_cleaning;
258         } /* while (1) */
259
260 done_cleaning:
261         tx_ring->next_to_clean = i;
262
263 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
264         if (unlikely(count && netif_carrier_ok(netdev) &&
265                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
266                 /* Make sure that anybody stopping the queue after this
267                  * sees the new next_to_clean.
268                  */
269                 smp_mb();
270                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
271                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
272                         netif_wake_subqueue(netdev, tx_ring->queue_index);
273                         ++adapter->restart_queue;
274                 }
275         }
276
277         if (adapter->detect_tx_hung) {
278                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
279                         /* schedule immediate reset if we believe we hung */
280                         DPRINTK(PROBE, INFO,
281                                 "tx hang %d detected, resetting adapter\n",
282                                 adapter->tx_timeout_count + 1);
283                         ixgbe_tx_timeout(adapter->netdev);
284                 }
285         }
286
287         /* re-arm the interrupt */
288         if ((total_packets >= tx_ring->work_limit) ||
289             (count == tx_ring->count))
290                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
291
292         tx_ring->total_bytes += total_bytes;
293         tx_ring->total_packets += total_packets;
294         tx_ring->stats.bytes += total_bytes;
295         tx_ring->stats.packets += total_packets;
296         adapter->net_stats.tx_bytes += total_bytes;
297         adapter->net_stats.tx_packets += total_packets;
298         return (total_packets ? true : false);
299 }
300
301 #ifdef CONFIG_IXGBE_DCA
302 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
303                                 struct ixgbe_ring *rx_ring)
304 {
305         u32 rxctrl;
306         int cpu = get_cpu();
307         int q = rx_ring - adapter->rx_ring;
308
309         if (rx_ring->cpu != cpu) {
310                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
311                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
312                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
313                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
314                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
315                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
316                 rx_ring->cpu = cpu;
317         }
318         put_cpu();
319 }
320
321 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
322                                 struct ixgbe_ring *tx_ring)
323 {
324         u32 txctrl;
325         int cpu = get_cpu();
326         int q = tx_ring - adapter->tx_ring;
327
328         if (tx_ring->cpu != cpu) {
329                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
330                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
331                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
332                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
333                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
334                 tx_ring->cpu = cpu;
335         }
336         put_cpu();
337 }
338
339 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
340 {
341         int i;
342
343         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
344                 return;
345
346         for (i = 0; i < adapter->num_tx_queues; i++) {
347                 adapter->tx_ring[i].cpu = -1;
348                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
349         }
350         for (i = 0; i < adapter->num_rx_queues; i++) {
351                 adapter->rx_ring[i].cpu = -1;
352                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
353         }
354 }
355
356 static int __ixgbe_notify_dca(struct device *dev, void *data)
357 {
358         struct net_device *netdev = dev_get_drvdata(dev);
359         struct ixgbe_adapter *adapter = netdev_priv(netdev);
360         unsigned long event = *(unsigned long *)data;
361
362         switch (event) {
363         case DCA_PROVIDER_ADD:
364                 /* if we're already enabled, don't do it again */
365                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
366                         break;
367                 /* Always use CB2 mode, difference is masked
368                  * in the CB driver. */
369                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
370                 if (dca_add_requester(dev) == 0) {
371                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
372                         ixgbe_setup_dca(adapter);
373                         break;
374                 }
375                 /* Fall Through since DCA is disabled. */
376         case DCA_PROVIDER_REMOVE:
377                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
378                         dca_remove_requester(dev);
379                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
380                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
381                 }
382                 break;
383         }
384
385         return 0;
386 }
387
388 #endif /* CONFIG_IXGBE_DCA */
389 /**
390  * ixgbe_receive_skb - Send a completed packet up the stack
391  * @adapter: board private structure
392  * @skb: packet to send up
393  * @status: hardware indication of status of receive
394  * @rx_ring: rx descriptor ring (for a specific queue) to setup
395  * @rx_desc: rx descriptor
396  **/
397 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
398                               struct sk_buff *skb, u8 status,
399                               struct ixgbe_ring *ring,
400                               union ixgbe_adv_rx_desc *rx_desc)
401 {
402         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
403         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
404
405         if (adapter->netdev->features & NETIF_F_LRO &&
406             skb->ip_summed == CHECKSUM_UNNECESSARY) {
407                 if (adapter->vlgrp && is_vlan)
408                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
409                                                      adapter->vlgrp, tag,
410                                                      rx_desc);
411                 else
412                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
413                 ring->lro_used = true;
414         } else {
415                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
416                         if (adapter->vlgrp && is_vlan)
417                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
418                         else
419                                 netif_receive_skb(skb);
420                 } else {
421                         if (adapter->vlgrp && is_vlan)
422                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
423                         else
424                                 netif_rx(skb);
425                 }
426         }
427 }
428
429 /**
430  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
431  * @adapter: address of board private structure
432  * @status_err: hardware indication of status of receive
433  * @skb: skb currently being received and modified
434  **/
435 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
436                                      u32 status_err, struct sk_buff *skb)
437 {
438         skb->ip_summed = CHECKSUM_NONE;
439
440         /* Rx csum disabled */
441         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
442                 return;
443
444         /* if IP and error */
445         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
446             (status_err & IXGBE_RXDADV_ERR_IPE)) {
447                 adapter->hw_csum_rx_error++;
448                 return;
449         }
450
451         if (!(status_err & IXGBE_RXD_STAT_L4CS))
452                 return;
453
454         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
455                 adapter->hw_csum_rx_error++;
456                 return;
457         }
458
459         /* It must be a TCP or UDP packet with a valid checksum */
460         skb->ip_summed = CHECKSUM_UNNECESSARY;
461         adapter->hw_csum_rx_good++;
462 }
463
464 /**
465  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
466  * @adapter: address of board private structure
467  **/
468 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
469                                    struct ixgbe_ring *rx_ring,
470                                    int cleaned_count)
471 {
472         struct pci_dev *pdev = adapter->pdev;
473         union ixgbe_adv_rx_desc *rx_desc;
474         struct ixgbe_rx_buffer *bi;
475         unsigned int i;
476         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
477
478         i = rx_ring->next_to_use;
479         bi = &rx_ring->rx_buffer_info[i];
480
481         while (cleaned_count--) {
482                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
483
484                 if (!bi->page_dma &&
485                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
486                         if (!bi->page) {
487                                 bi->page = alloc_page(GFP_ATOMIC);
488                                 if (!bi->page) {
489                                         adapter->alloc_rx_page_failed++;
490                                         goto no_buffers;
491                                 }
492                                 bi->page_offset = 0;
493                         } else {
494                                 /* use a half page if we're re-using */
495                                 bi->page_offset ^= (PAGE_SIZE / 2);
496                         }
497
498                         bi->page_dma = pci_map_page(pdev, bi->page,
499                                                     bi->page_offset,
500                                                     (PAGE_SIZE / 2),
501                                                     PCI_DMA_FROMDEVICE);
502                 }
503
504                 if (!bi->skb) {
505                         struct sk_buff *skb = netdev_alloc_skb(adapter->netdev,
506                                                                bufsz);
507
508                         if (!skb) {
509                                 adapter->alloc_rx_buff_failed++;
510                                 goto no_buffers;
511                         }
512
513                         /*
514                          * Make buffer alignment 2 beyond a 16 byte boundary
515                          * this will result in a 16 byte aligned IP header after
516                          * the 14 byte MAC header is removed
517                          */
518                         skb_reserve(skb, NET_IP_ALIGN);
519
520                         bi->skb = skb;
521                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
522                                                  PCI_DMA_FROMDEVICE);
523                 }
524                 /* Refresh the desc even if buffer_addrs didn't change because
525                  * each write-back erases this info. */
526                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
527                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
528                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
529                 } else {
530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
531                 }
532
533                 i++;
534                 if (i == rx_ring->count)
535                         i = 0;
536                 bi = &rx_ring->rx_buffer_info[i];
537         }
538
539 no_buffers:
540         if (rx_ring->next_to_use != i) {
541                 rx_ring->next_to_use = i;
542                 if (i-- == 0)
543                         i = (rx_ring->count - 1);
544
545                 /*
546                  * Force memory writes to complete before letting h/w
547                  * know there are new descriptors to fetch.  (Only
548                  * applicable for weak-ordered memory model archs,
549                  * such as IA-64).
550                  */
551                 wmb();
552                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
553         }
554 }
555
556 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
557 {
558         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
559 }
560
561 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
562 {
563         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
564 }
565
566 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
567                                struct ixgbe_ring *rx_ring,
568                                int *work_done, int work_to_do)
569 {
570         struct pci_dev *pdev = adapter->pdev;
571         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
572         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
573         struct sk_buff *skb;
574         unsigned int i;
575         u32 len, staterr;
576         u16 hdr_info;
577         bool cleaned = false;
578         int cleaned_count = 0;
579         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
580
581         i = rx_ring->next_to_clean;
582         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
583         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
584         rx_buffer_info = &rx_ring->rx_buffer_info[i];
585
586         while (staterr & IXGBE_RXD_STAT_DD) {
587                 u32 upper_len = 0;
588                 if (*work_done >= work_to_do)
589                         break;
590                 (*work_done)++;
591
592                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
593                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
594                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
595                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
596                         if (hdr_info & IXGBE_RXDADV_SPH)
597                                 adapter->rx_hdr_split++;
598                         if (len > IXGBE_RX_HDR_SIZE)
599                                 len = IXGBE_RX_HDR_SIZE;
600                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
601                 } else {
602                         len = le16_to_cpu(rx_desc->wb.upper.length);
603                 }
604
605                 cleaned = true;
606                 skb = rx_buffer_info->skb;
607                 prefetch(skb->data - NET_IP_ALIGN);
608                 rx_buffer_info->skb = NULL;
609
610                 if (len && !skb_shinfo(skb)->nr_frags) {
611                         pci_unmap_single(pdev, rx_buffer_info->dma,
612                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
613                                          PCI_DMA_FROMDEVICE);
614                         skb_put(skb, len);
615                 }
616
617                 if (upper_len) {
618                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
619                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
620                         rx_buffer_info->page_dma = 0;
621                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
622                                            rx_buffer_info->page,
623                                            rx_buffer_info->page_offset,
624                                            upper_len);
625
626                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
627                             (page_count(rx_buffer_info->page) != 1))
628                                 rx_buffer_info->page = NULL;
629                         else
630                                 get_page(rx_buffer_info->page);
631
632                         skb->len += upper_len;
633                         skb->data_len += upper_len;
634                         skb->truesize += upper_len;
635                 }
636
637                 i++;
638                 if (i == rx_ring->count)
639                         i = 0;
640                 next_buffer = &rx_ring->rx_buffer_info[i];
641
642                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
643                 prefetch(next_rxd);
644
645                 cleaned_count++;
646                 if (staterr & IXGBE_RXD_STAT_EOP) {
647                         rx_ring->stats.packets++;
648                         rx_ring->stats.bytes += skb->len;
649                 } else {
650                         rx_buffer_info->skb = next_buffer->skb;
651                         rx_buffer_info->dma = next_buffer->dma;
652                         next_buffer->skb = skb;
653                         next_buffer->dma = 0;
654                         adapter->non_eop_descs++;
655                         goto next_desc;
656                 }
657
658                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
659                         dev_kfree_skb_irq(skb);
660                         goto next_desc;
661                 }
662
663                 ixgbe_rx_checksum(adapter, staterr, skb);
664
665                 /* probably a little skewed due to removing CRC */
666                 total_rx_bytes += skb->len;
667                 total_rx_packets++;
668
669                 skb->protocol = eth_type_trans(skb, adapter->netdev);
670                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
671
672 next_desc:
673                 rx_desc->wb.upper.status_error = 0;
674
675                 /* return some buffers to hardware, one at a time is too slow */
676                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
677                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
678                         cleaned_count = 0;
679                 }
680
681                 /* use prefetched values */
682                 rx_desc = next_rxd;
683                 rx_buffer_info = next_buffer;
684
685                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
686         }
687
688         if (rx_ring->lro_used) {
689                 lro_flush_all(&rx_ring->lro_mgr);
690                 rx_ring->lro_used = false;
691         }
692
693         rx_ring->next_to_clean = i;
694         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
695
696         if (cleaned_count)
697                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
698
699         rx_ring->total_packets += total_rx_packets;
700         rx_ring->total_bytes += total_rx_bytes;
701         adapter->net_stats.rx_bytes += total_rx_bytes;
702         adapter->net_stats.rx_packets += total_rx_packets;
703
704         return cleaned;
705 }
706
707 static int ixgbe_clean_rxonly(struct napi_struct *, int);
708 /**
709  * ixgbe_configure_msix - Configure MSI-X hardware
710  * @adapter: board private structure
711  *
712  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
713  * interrupts.
714  **/
715 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
716 {
717         struct ixgbe_q_vector *q_vector;
718         int i, j, q_vectors, v_idx, r_idx;
719         u32 mask;
720
721         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
722
723         /* Populate the IVAR table and set the ITR values to the
724          * corresponding register.
725          */
726         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
727                 q_vector = &adapter->q_vector[v_idx];
728                 /* XXX for_each_bit(...) */
729                 r_idx = find_first_bit(q_vector->rxr_idx,
730                                        adapter->num_rx_queues);
731
732                 for (i = 0; i < q_vector->rxr_count; i++) {
733                         j = adapter->rx_ring[r_idx].reg_idx;
734                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
735                         r_idx = find_next_bit(q_vector->rxr_idx,
736                                               adapter->num_rx_queues,
737                                               r_idx + 1);
738                 }
739                 r_idx = find_first_bit(q_vector->txr_idx,
740                                        adapter->num_tx_queues);
741
742                 for (i = 0; i < q_vector->txr_count; i++) {
743                         j = adapter->tx_ring[r_idx].reg_idx;
744                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
745                         r_idx = find_next_bit(q_vector->txr_idx,
746                                               adapter->num_tx_queues,
747                                               r_idx + 1);
748                 }
749
750                 /* if this is a tx only vector halve the interrupt rate */
751                 if (q_vector->txr_count && !q_vector->rxr_count)
752                         q_vector->eitr = (adapter->eitr_param >> 1);
753                 else
754                         /* rx only */
755                         q_vector->eitr = adapter->eitr_param;
756
757                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
758                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
759         }
760
761         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
762         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
763
764         /* set up to autoclear timer, and the vectors */
765         mask = IXGBE_EIMS_ENABLE_MASK;
766         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
767         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
768 }
769
770 enum latency_range {
771         lowest_latency = 0,
772         low_latency = 1,
773         bulk_latency = 2,
774         latency_invalid = 255
775 };
776
777 /**
778  * ixgbe_update_itr - update the dynamic ITR value based on statistics
779  * @adapter: pointer to adapter
780  * @eitr: eitr setting (ints per sec) to give last timeslice
781  * @itr_setting: current throttle rate in ints/second
782  * @packets: the number of packets during this measurement interval
783  * @bytes: the number of bytes during this measurement interval
784  *
785  *      Stores a new ITR value based on packets and byte
786  *      counts during the last interrupt.  The advantage of per interrupt
787  *      computation is faster updates and more accurate ITR for the current
788  *      traffic pattern.  Constants in this function were computed
789  *      based on theoretical maximum wire speed and thresholds were set based
790  *      on testing data as well as attempting to minimize response time
791  *      while increasing bulk throughput.
792  *      this functionality is controlled by the InterruptThrottleRate module
793  *      parameter (see ixgbe_param.c)
794  **/
795 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
796                            u32 eitr, u8 itr_setting,
797                            int packets, int bytes)
798 {
799         unsigned int retval = itr_setting;
800         u32 timepassed_us;
801         u64 bytes_perint;
802
803         if (packets == 0)
804                 goto update_itr_done;
805
806
807         /* simple throttlerate management
808          *    0-20MB/s lowest (100000 ints/s)
809          *   20-100MB/s low   (20000 ints/s)
810          *  100-1249MB/s bulk (8000 ints/s)
811          */
812         /* what was last interrupt timeslice? */
813         timepassed_us = 1000000/eitr;
814         bytes_perint = bytes / timepassed_us; /* bytes/usec */
815
816         switch (itr_setting) {
817         case lowest_latency:
818                 if (bytes_perint > adapter->eitr_low)
819                         retval = low_latency;
820                 break;
821         case low_latency:
822                 if (bytes_perint > adapter->eitr_high)
823                         retval = bulk_latency;
824                 else if (bytes_perint <= adapter->eitr_low)
825                         retval = lowest_latency;
826                 break;
827         case bulk_latency:
828                 if (bytes_perint <= adapter->eitr_high)
829                         retval = low_latency;
830                 break;
831         }
832
833 update_itr_done:
834         return retval;
835 }
836
837 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
838 {
839         struct ixgbe_adapter *adapter = q_vector->adapter;
840         struct ixgbe_hw *hw = &adapter->hw;
841         u32 new_itr;
842         u8 current_itr, ret_itr;
843         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
844                                sizeof(struct ixgbe_q_vector);
845         struct ixgbe_ring *rx_ring, *tx_ring;
846
847         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
848         for (i = 0; i < q_vector->txr_count; i++) {
849                 tx_ring = &(adapter->tx_ring[r_idx]);
850                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
851                                            q_vector->tx_itr,
852                                            tx_ring->total_packets,
853                                            tx_ring->total_bytes);
854                 /* if the result for this queue would decrease interrupt
855                  * rate for this vector then use that result */
856                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
857                                     q_vector->tx_itr - 1 : ret_itr);
858                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
859                                       r_idx + 1);
860         }
861
862         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
863         for (i = 0; i < q_vector->rxr_count; i++) {
864                 rx_ring = &(adapter->rx_ring[r_idx]);
865                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
866                                            q_vector->rx_itr,
867                                            rx_ring->total_packets,
868                                            rx_ring->total_bytes);
869                 /* if the result for this queue would decrease interrupt
870                  * rate for this vector then use that result */
871                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
872                                     q_vector->rx_itr - 1 : ret_itr);
873                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
874                                       r_idx + 1);
875         }
876
877         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
878
879         switch (current_itr) {
880         /* counts and packets in update_itr are dependent on these numbers */
881         case lowest_latency:
882                 new_itr = 100000;
883                 break;
884         case low_latency:
885                 new_itr = 20000; /* aka hwitr = ~200 */
886                 break;
887         case bulk_latency:
888         default:
889                 new_itr = 8000;
890                 break;
891         }
892
893         if (new_itr != q_vector->eitr) {
894                 u32 itr_reg;
895                 /* do an exponential smoothing */
896                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
897                 q_vector->eitr = new_itr;
898                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
899                 /* must write high and low 16 bits to reset counter */
900                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
901                         itr_reg);
902                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
903         }
904
905         return;
906 }
907
908 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
909 {
910         struct ixgbe_hw *hw = &adapter->hw;
911
912         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
913             (eicr & IXGBE_EICR_GPI_SDP1)) {
914                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
915                 /* write to clear the interrupt */
916                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
917         }
918 }
919
920 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
921 {
922         struct ixgbe_hw *hw = &adapter->hw;
923
924         adapter->lsc_int++;
925         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
926         adapter->link_check_timeout = jiffies;
927         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
928                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
929                 schedule_work(&adapter->watchdog_task);
930         }
931 }
932
933 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
934 {
935         struct net_device *netdev = data;
936         struct ixgbe_adapter *adapter = netdev_priv(netdev);
937         struct ixgbe_hw *hw = &adapter->hw;
938         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
939
940         if (eicr & IXGBE_EICR_LSC)
941                 ixgbe_check_lsc(adapter);
942
943         ixgbe_check_fan_failure(adapter, eicr);
944
945         if (!test_bit(__IXGBE_DOWN, &adapter->state))
946                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
947
948         return IRQ_HANDLED;
949 }
950
951 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
952 {
953         struct ixgbe_q_vector *q_vector = data;
954         struct ixgbe_adapter  *adapter = q_vector->adapter;
955         struct ixgbe_ring     *tx_ring;
956         int i, r_idx;
957
958         if (!q_vector->txr_count)
959                 return IRQ_HANDLED;
960
961         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
962         for (i = 0; i < q_vector->txr_count; i++) {
963                 tx_ring = &(adapter->tx_ring[r_idx]);
964 #ifdef CONFIG_IXGBE_DCA
965                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
966                         ixgbe_update_tx_dca(adapter, tx_ring);
967 #endif
968                 tx_ring->total_bytes = 0;
969                 tx_ring->total_packets = 0;
970                 ixgbe_clean_tx_irq(adapter, tx_ring);
971                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
972                                       r_idx + 1);
973         }
974
975         return IRQ_HANDLED;
976 }
977
978 /**
979  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
980  * @irq: unused
981  * @data: pointer to our q_vector struct for this interrupt vector
982  **/
983 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
984 {
985         struct ixgbe_q_vector *q_vector = data;
986         struct ixgbe_adapter  *adapter = q_vector->adapter;
987         struct ixgbe_ring  *rx_ring;
988         int r_idx;
989         int i;
990
991         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
992         for (i = 0;  i < q_vector->rxr_count; i++) {
993                 rx_ring = &(adapter->rx_ring[r_idx]);
994                 rx_ring->total_bytes = 0;
995                 rx_ring->total_packets = 0;
996                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
997                                       r_idx + 1);
998         }
999
1000         if (!q_vector->rxr_count)
1001                 return IRQ_HANDLED;
1002
1003         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1004         rx_ring = &(adapter->rx_ring[r_idx]);
1005         /* disable interrupts on this vector only */
1006         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1007         netif_rx_schedule(adapter->netdev, &q_vector->napi);
1008
1009         return IRQ_HANDLED;
1010 }
1011
1012 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1013 {
1014         ixgbe_msix_clean_rx(irq, data);
1015         ixgbe_msix_clean_tx(irq, data);
1016
1017         return IRQ_HANDLED;
1018 }
1019
1020 /**
1021  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1022  * @napi: napi struct with our devices info in it
1023  * @budget: amount of work driver is allowed to do this pass, in packets
1024  *
1025  * This function is optimized for cleaning one queue only on a single
1026  * q_vector!!!
1027  **/
1028 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1029 {
1030         struct ixgbe_q_vector *q_vector =
1031                                container_of(napi, struct ixgbe_q_vector, napi);
1032         struct ixgbe_adapter *adapter = q_vector->adapter;
1033         struct ixgbe_ring *rx_ring = NULL;
1034         int work_done = 0;
1035         long r_idx;
1036
1037         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1038         rx_ring = &(adapter->rx_ring[r_idx]);
1039 #ifdef CONFIG_IXGBE_DCA
1040         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1041                 ixgbe_update_rx_dca(adapter, rx_ring);
1042 #endif
1043
1044         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1045
1046         /* If all Rx work done, exit the polling mode */
1047         if (work_done < budget) {
1048                 netif_rx_complete(adapter->netdev, napi);
1049                 if (adapter->itr_setting & 3)
1050                         ixgbe_set_itr_msix(q_vector);
1051                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1052                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1053         }
1054
1055         return work_done;
1056 }
1057
1058 /**
1059  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1060  * @napi: napi struct with our devices info in it
1061  * @budget: amount of work driver is allowed to do this pass, in packets
1062  *
1063  * This function will clean more than one rx queue associated with a
1064  * q_vector.
1065  **/
1066 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1067 {
1068         struct ixgbe_q_vector *q_vector =
1069                                container_of(napi, struct ixgbe_q_vector, napi);
1070         struct ixgbe_adapter *adapter = q_vector->adapter;
1071         struct ixgbe_ring *rx_ring = NULL;
1072         int work_done = 0, i;
1073         long r_idx;
1074         u16 enable_mask = 0;
1075
1076         /* attempt to distribute budget to each queue fairly, but don't allow
1077          * the budget to go below 1 because we'll exit polling */
1078         budget /= (q_vector->rxr_count ?: 1);
1079         budget = max(budget, 1);
1080         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1081         for (i = 0; i < q_vector->rxr_count; i++) {
1082                 rx_ring = &(adapter->rx_ring[r_idx]);
1083 #ifdef CONFIG_IXGBE_DCA
1084                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1085                         ixgbe_update_rx_dca(adapter, rx_ring);
1086 #endif
1087                 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1088                 enable_mask |= rx_ring->v_idx;
1089                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1090                                       r_idx + 1);
1091         }
1092
1093         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1094         rx_ring = &(adapter->rx_ring[r_idx]);
1095         /* If all Rx work done, exit the polling mode */
1096         if (work_done < budget) {
1097                 netif_rx_complete(adapter->netdev, napi);
1098                 if (adapter->itr_setting & 3)
1099                         ixgbe_set_itr_msix(q_vector);
1100                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1101                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1102                 return 0;
1103         }
1104
1105         return work_done;
1106 }
1107 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1108                                      int r_idx)
1109 {
1110         a->q_vector[v_idx].adapter = a;
1111         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1112         a->q_vector[v_idx].rxr_count++;
1113         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1114 }
1115
1116 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1117                                      int r_idx)
1118 {
1119         a->q_vector[v_idx].adapter = a;
1120         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1121         a->q_vector[v_idx].txr_count++;
1122         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1123 }
1124
1125 /**
1126  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1127  * @adapter: board private structure to initialize
1128  * @vectors: allotted vector count for descriptor rings
1129  *
1130  * This function maps descriptor rings to the queue-specific vectors
1131  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1132  * one vector per ring/queue, but on a constrained vector budget, we
1133  * group the rings as "efficiently" as possible.  You would add new
1134  * mapping configurations in here.
1135  **/
1136 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1137                                       int vectors)
1138 {
1139         int v_start = 0;
1140         int rxr_idx = 0, txr_idx = 0;
1141         int rxr_remaining = adapter->num_rx_queues;
1142         int txr_remaining = adapter->num_tx_queues;
1143         int i, j;
1144         int rqpv, tqpv;
1145         int err = 0;
1146
1147         /* No mapping required if MSI-X is disabled. */
1148         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1149                 goto out;
1150
1151         /*
1152          * The ideal configuration...
1153          * We have enough vectors to map one per queue.
1154          */
1155         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1156                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1157                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1158
1159                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1160                         map_vector_to_txq(adapter, v_start, txr_idx);
1161
1162                 goto out;
1163         }
1164
1165         /*
1166          * If we don't have enough vectors for a 1-to-1
1167          * mapping, we'll have to group them so there are
1168          * multiple queues per vector.
1169          */
1170         /* Re-adjusting *qpv takes care of the remainder. */
1171         for (i = v_start; i < vectors; i++) {
1172                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1173                 for (j = 0; j < rqpv; j++) {
1174                         map_vector_to_rxq(adapter, i, rxr_idx);
1175                         rxr_idx++;
1176                         rxr_remaining--;
1177                 }
1178         }
1179         for (i = v_start; i < vectors; i++) {
1180                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1181                 for (j = 0; j < tqpv; j++) {
1182                         map_vector_to_txq(adapter, i, txr_idx);
1183                         txr_idx++;
1184                         txr_remaining--;
1185                 }
1186         }
1187
1188 out:
1189         return err;
1190 }
1191
1192 /**
1193  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1194  * @adapter: board private structure
1195  *
1196  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1197  * interrupts from the kernel.
1198  **/
1199 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1200 {
1201         struct net_device *netdev = adapter->netdev;
1202         irqreturn_t (*handler)(int, void *);
1203         int i, vector, q_vectors, err;
1204
1205         /* Decrement for Other and TCP Timer vectors */
1206         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1207
1208         /* Map the Tx/Rx rings to the vectors we were allotted. */
1209         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1210         if (err)
1211                 goto out;
1212
1213 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1214                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1215                          &ixgbe_msix_clean_many)
1216         for (vector = 0; vector < q_vectors; vector++) {
1217                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1218                 sprintf(adapter->name[vector], "%s:v%d-%s",
1219                         netdev->name, vector,
1220                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1221                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1222                 err = request_irq(adapter->msix_entries[vector].vector,
1223                                   handler, 0, adapter->name[vector],
1224                                   &(adapter->q_vector[vector]));
1225                 if (err) {
1226                         DPRINTK(PROBE, ERR,
1227                                 "request_irq failed for MSIX interrupt "
1228                                 "Error: %d\n", err);
1229                         goto free_queue_irqs;
1230                 }
1231         }
1232
1233         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1234         err = request_irq(adapter->msix_entries[vector].vector,
1235                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1236         if (err) {
1237                 DPRINTK(PROBE, ERR,
1238                         "request_irq for msix_lsc failed: %d\n", err);
1239                 goto free_queue_irqs;
1240         }
1241
1242         return 0;
1243
1244 free_queue_irqs:
1245         for (i = vector - 1; i >= 0; i--)
1246                 free_irq(adapter->msix_entries[--vector].vector,
1247                          &(adapter->q_vector[i]));
1248         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1249         pci_disable_msix(adapter->pdev);
1250         kfree(adapter->msix_entries);
1251         adapter->msix_entries = NULL;
1252 out:
1253         return err;
1254 }
1255
1256 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1257 {
1258         struct ixgbe_hw *hw = &adapter->hw;
1259         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1260         u8 current_itr;
1261         u32 new_itr = q_vector->eitr;
1262         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1263         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1264
1265         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1266                                             q_vector->tx_itr,
1267                                             tx_ring->total_packets,
1268                                             tx_ring->total_bytes);
1269         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1270                                             q_vector->rx_itr,
1271                                             rx_ring->total_packets,
1272                                             rx_ring->total_bytes);
1273
1274         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1275
1276         switch (current_itr) {
1277         /* counts and packets in update_itr are dependent on these numbers */
1278         case lowest_latency:
1279                 new_itr = 100000;
1280                 break;
1281         case low_latency:
1282                 new_itr = 20000; /* aka hwitr = ~200 */
1283                 break;
1284         case bulk_latency:
1285                 new_itr = 8000;
1286                 break;
1287         default:
1288                 break;
1289         }
1290
1291         if (new_itr != q_vector->eitr) {
1292                 u32 itr_reg;
1293                 /* do an exponential smoothing */
1294                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1295                 q_vector->eitr = new_itr;
1296                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1297                 /* must write high and low 16 bits to reset counter */
1298                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1299         }
1300
1301         return;
1302 }
1303
1304 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1305
1306 /**
1307  * ixgbe_intr - legacy mode Interrupt Handler
1308  * @irq: interrupt number
1309  * @data: pointer to a network interface device structure
1310  * @pt_regs: CPU registers structure
1311  **/
1312 static irqreturn_t ixgbe_intr(int irq, void *data)
1313 {
1314         struct net_device *netdev = data;
1315         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1316         struct ixgbe_hw *hw = &adapter->hw;
1317         u32 eicr;
1318
1319         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1320          * therefore no explict interrupt disable is necessary */
1321         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1322         if (!eicr) {
1323                 /* shared interrupt alert!
1324                  * make sure interrupts are enabled because the read will
1325                  * have disabled interrupts due to EIAM */
1326                 ixgbe_irq_enable(adapter);
1327                 return IRQ_NONE;        /* Not our interrupt */
1328         }
1329
1330         if (eicr & IXGBE_EICR_LSC)
1331                 ixgbe_check_lsc(adapter);
1332
1333         ixgbe_check_fan_failure(adapter, eicr);
1334
1335         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1336                 adapter->tx_ring[0].total_packets = 0;
1337                 adapter->tx_ring[0].total_bytes = 0;
1338                 adapter->rx_ring[0].total_packets = 0;
1339                 adapter->rx_ring[0].total_bytes = 0;
1340                 /* would disable interrupts here but EIAM disabled it */
1341                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1342         }
1343
1344         return IRQ_HANDLED;
1345 }
1346
1347 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1348 {
1349         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1350
1351         for (i = 0; i < q_vectors; i++) {
1352                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1353                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1354                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1355                 q_vector->rxr_count = 0;
1356                 q_vector->txr_count = 0;
1357         }
1358 }
1359
1360 /**
1361  * ixgbe_request_irq - initialize interrupts
1362  * @adapter: board private structure
1363  *
1364  * Attempts to configure interrupts using the best available
1365  * capabilities of the hardware and kernel.
1366  **/
1367 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1368 {
1369         struct net_device *netdev = adapter->netdev;
1370         int err;
1371
1372         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1373                 err = ixgbe_request_msix_irqs(adapter);
1374         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1375                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1376                                   netdev->name, netdev);
1377         } else {
1378                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1379                                   netdev->name, netdev);
1380         }
1381
1382         if (err)
1383                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1384
1385         return err;
1386 }
1387
1388 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1389 {
1390         struct net_device *netdev = adapter->netdev;
1391
1392         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1393                 int i, q_vectors;
1394
1395                 q_vectors = adapter->num_msix_vectors;
1396
1397                 i = q_vectors - 1;
1398                 free_irq(adapter->msix_entries[i].vector, netdev);
1399
1400                 i--;
1401                 for (; i >= 0; i--) {
1402                         free_irq(adapter->msix_entries[i].vector,
1403                                  &(adapter->q_vector[i]));
1404                 }
1405
1406                 ixgbe_reset_q_vectors(adapter);
1407         } else {
1408                 free_irq(adapter->pdev->irq, netdev);
1409         }
1410 }
1411
1412 /**
1413  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1414  * @adapter: board private structure
1415  **/
1416 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1417 {
1418         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1419         IXGBE_WRITE_FLUSH(&adapter->hw);
1420         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1421                 int i;
1422                 for (i = 0; i < adapter->num_msix_vectors; i++)
1423                         synchronize_irq(adapter->msix_entries[i].vector);
1424         } else {
1425                 synchronize_irq(adapter->pdev->irq);
1426         }
1427 }
1428
1429 /**
1430  * ixgbe_irq_enable - Enable default interrupt generation settings
1431  * @adapter: board private structure
1432  **/
1433 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1434 {
1435         u32 mask;
1436         mask = IXGBE_EIMS_ENABLE_MASK;
1437         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1438                 mask |= IXGBE_EIMS_GPI_SDP1;
1439         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1440         IXGBE_WRITE_FLUSH(&adapter->hw);
1441 }
1442
1443 /**
1444  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1445  *
1446  **/
1447 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1448 {
1449         struct ixgbe_hw *hw = &adapter->hw;
1450
1451         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1452                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1453
1454         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1455         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1456
1457         map_vector_to_rxq(adapter, 0, 0);
1458         map_vector_to_txq(adapter, 0, 0);
1459
1460         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1461 }
1462
1463 /**
1464  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1465  * @adapter: board private structure
1466  *
1467  * Configure the Tx unit of the MAC after a reset.
1468  **/
1469 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1470 {
1471         u64 tdba, tdwba;
1472         struct ixgbe_hw *hw = &adapter->hw;
1473         u32 i, j, tdlen, txctrl;
1474
1475         /* Setup the HW Tx Head and Tail descriptor pointers */
1476         for (i = 0; i < adapter->num_tx_queues; i++) {
1477                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1478                 j = ring->reg_idx;
1479                 tdba = ring->dma;
1480                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1481                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1482                                 (tdba & DMA_32BIT_MASK));
1483                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1484                 tdwba = ring->dma +
1485                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1486                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1487                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1488                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1489                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1490                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1491                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1492                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1493                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1494                 /* Disable Tx Head Writeback RO bit, since this hoses
1495                  * bookkeeping if things aren't delivered in order.
1496                  */
1497                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1498                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1499                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1500         }
1501 }
1502
1503 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1504
1505 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1506 {
1507         struct ixgbe_ring *rx_ring;
1508         u32 srrctl;
1509         int queue0;
1510         unsigned long mask;
1511
1512         /* program one srrctl register per VMDq index */
1513         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1514                 long shift, len;
1515                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1516                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1517                 shift = find_first_bit(&mask, len);
1518                 queue0 = index & mask;
1519                 index = (index & mask) >> shift;
1520         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1521         } else {
1522                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1523                 queue0 = index & mask;
1524                 index = index & mask;
1525         }
1526
1527         rx_ring = &adapter->rx_ring[queue0];
1528
1529         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1530
1531         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1532         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1533
1534         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1535                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1536                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1537                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1538                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1539                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1540         } else {
1541                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1542
1543                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1544                         srrctl |= IXGBE_RXBUFFER_2048 >>
1545                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1546                 else
1547                         srrctl |= rx_ring->rx_buf_len >>
1548                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1549         }
1550         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1551 }
1552
1553 /**
1554  * ixgbe_get_skb_hdr - helper function for LRO header processing
1555  * @skb: pointer to sk_buff to be added to LRO packet
1556  * @iphdr: pointer to ip header structure
1557  * @tcph: pointer to tcp header structure
1558  * @hdr_flags: pointer to header flags
1559  * @priv: private data
1560  **/
1561 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1562                              u64 *hdr_flags, void *priv)
1563 {
1564         union ixgbe_adv_rx_desc *rx_desc = priv;
1565
1566         /* Verify that this is a valid IPv4 TCP packet */
1567         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1568              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1569                 return -1;
1570
1571         /* Set network headers */
1572         skb_reset_network_header(skb);
1573         skb_set_transport_header(skb, ip_hdrlen(skb));
1574         *iphdr = ip_hdr(skb);
1575         *tcph = tcp_hdr(skb);
1576         *hdr_flags = LRO_IPV4 | LRO_TCP;
1577         return 0;
1578 }
1579
1580 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1581                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1582
1583 /**
1584  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1585  * @adapter: board private structure
1586  *
1587  * Configure the Rx unit of the MAC after a reset.
1588  **/
1589 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1590 {
1591         u64 rdba;
1592         struct ixgbe_hw *hw = &adapter->hw;
1593         struct net_device *netdev = adapter->netdev;
1594         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1595         int i, j;
1596         u32 rdlen, rxctrl, rxcsum;
1597         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1598                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1599                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1600         u32 fctrl, hlreg0;
1601         u32 pages;
1602         u32 reta = 0, mrqc;
1603         u32 rdrxctl;
1604         int rx_buf_len;
1605
1606         /* Decide whether to use packet split mode or not */
1607         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1608
1609         /* Set the RX buffer length according to the mode */
1610         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1611                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1612         } else {
1613                 if (netdev->mtu <= ETH_DATA_LEN)
1614                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1615                 else
1616                         rx_buf_len = ALIGN(max_frame, 1024);
1617         }
1618
1619         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1620         fctrl |= IXGBE_FCTRL_BAM;
1621         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1622         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1623
1624         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1625         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1626                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1627         else
1628                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1629         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1630
1631         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1632
1633         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1634         /* disable receives while setting up the descriptors */
1635         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1636         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1637
1638         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1639          * the Base and Length of the Rx Descriptor Ring */
1640         for (i = 0; i < adapter->num_rx_queues; i++) {
1641                 rdba = adapter->rx_ring[i].dma;
1642                 j = adapter->rx_ring[i].reg_idx;
1643                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1644                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1645                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1646                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1647                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1648                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1649                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1650                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1651                 /* Intitial LRO Settings */
1652                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1653                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1654                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1655                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1656                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1657                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1658                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1659                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1660                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1661
1662                 ixgbe_configure_srrctl(adapter, j);
1663         }
1664
1665         /*
1666          * For VMDq support of different descriptor types or
1667          * buffer sizes through the use of multiple SRRCTL
1668          * registers, RDRXCTL.MVMEN must be set to 1
1669          *
1670          * also, the manual doesn't mention it clearly but DCA hints
1671          * will only use queue 0's tags unless this bit is set.  Side
1672          * effects of setting this bit are only that SRRCTL must be
1673          * fully programmed [0..15]
1674          */
1675         rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1676         rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1677         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1678
1679
1680         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1681                 /* Fill out redirection table */
1682                 for (i = 0, j = 0; i < 128; i++, j++) {
1683                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1684                                 j = 0;
1685                         /* reta = 4-byte sliding window of
1686                          * 0x00..(indices-1)(indices-1)00..etc. */
1687                         reta = (reta << 8) | (j * 0x11);
1688                         if ((i & 3) == 3)
1689                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1690                 }
1691
1692                 /* Fill out hash function seeds */
1693                 for (i = 0; i < 10; i++)
1694                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1695
1696                 mrqc = IXGBE_MRQC_RSSEN
1697                     /* Perform hash on these packet types */
1698                        | IXGBE_MRQC_RSS_FIELD_IPV4
1699                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1700                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1701                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1702                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1703                        | IXGBE_MRQC_RSS_FIELD_IPV6
1704                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1705                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1706                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1707                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1708         }
1709
1710         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1711
1712         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1713             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1714                 /* Disable indicating checksum in descriptor, enables
1715                  * RSS hash */
1716                 rxcsum |= IXGBE_RXCSUM_PCSD;
1717         }
1718         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1719                 /* Enable IPv4 payload checksum for UDP fragments
1720                  * if PCSD is not set */
1721                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1722         }
1723
1724         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1725 }
1726
1727 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1728                                    struct vlan_group *grp)
1729 {
1730         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1731         u32 ctrl;
1732
1733         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1734                 ixgbe_irq_disable(adapter);
1735         adapter->vlgrp = grp;
1736
1737         if (grp) {
1738                 /* enable VLAN tag insert/strip */
1739                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1740                 ctrl |= IXGBE_VLNCTRL_VME;
1741                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1742                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1743         }
1744
1745         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1746                 ixgbe_irq_enable(adapter);
1747 }
1748
1749 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1750 {
1751         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1752         struct ixgbe_hw *hw = &adapter->hw;
1753
1754         /* add VID to filter table */
1755         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1756 }
1757
1758 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1759 {
1760         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1761         struct ixgbe_hw *hw = &adapter->hw;
1762
1763         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1764                 ixgbe_irq_disable(adapter);
1765
1766         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1767
1768         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1769                 ixgbe_irq_enable(adapter);
1770
1771         /* remove VID from filter table */
1772         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1773 }
1774
1775 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1776 {
1777         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1778
1779         if (adapter->vlgrp) {
1780                 u16 vid;
1781                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1782                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1783                                 continue;
1784                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1785                 }
1786         }
1787 }
1788
1789 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1790 {
1791         struct dev_mc_list *mc_ptr;
1792         u8 *addr = *mc_addr_ptr;
1793         *vmdq = 0;
1794
1795         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1796         if (mc_ptr->next)
1797                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1798         else
1799                 *mc_addr_ptr = NULL;
1800
1801         return addr;
1802 }
1803
1804 /**
1805  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1806  * @netdev: network interface device structure
1807  *
1808  * The set_rx_method entry point is called whenever the unicast/multicast
1809  * address list or the network interface flags are updated.  This routine is
1810  * responsible for configuring the hardware for proper unicast, multicast and
1811  * promiscuous mode.
1812  **/
1813 static void ixgbe_set_rx_mode(struct net_device *netdev)
1814 {
1815         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1816         struct ixgbe_hw *hw = &adapter->hw;
1817         u32 fctrl, vlnctrl;
1818         u8 *addr_list = NULL;
1819         int addr_count = 0;
1820
1821         /* Check for Promiscuous and All Multicast modes */
1822
1823         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1824         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1825
1826         if (netdev->flags & IFF_PROMISC) {
1827                 hw->addr_ctrl.user_set_promisc = 1;
1828                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1829                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1830         } else {
1831                 if (netdev->flags & IFF_ALLMULTI) {
1832                         fctrl |= IXGBE_FCTRL_MPE;
1833                         fctrl &= ~IXGBE_FCTRL_UPE;
1834                 } else {
1835                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1836                 }
1837                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1838                 hw->addr_ctrl.user_set_promisc = 0;
1839         }
1840
1841         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1842         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1843
1844         /* reprogram secondary unicast list */
1845         addr_count = netdev->uc_count;
1846         if (addr_count)
1847                 addr_list = netdev->uc_list->dmi_addr;
1848         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1849                                           ixgbe_addr_list_itr);
1850
1851         /* reprogram multicast list */
1852         addr_count = netdev->mc_count;
1853         if (addr_count)
1854                 addr_list = netdev->mc_list->dmi_addr;
1855         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1856                                         ixgbe_addr_list_itr);
1857 }
1858
1859 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1860 {
1861         int q_idx;
1862         struct ixgbe_q_vector *q_vector;
1863         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1864
1865         /* legacy and MSI only use one vector */
1866         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1867                 q_vectors = 1;
1868
1869         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1870                 struct napi_struct *napi;
1871                 q_vector = &adapter->q_vector[q_idx];
1872                 if (!q_vector->rxr_count)
1873                         continue;
1874                 napi = &q_vector->napi;
1875                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1876                     (q_vector->rxr_count > 1))
1877                         napi->poll = &ixgbe_clean_rxonly_many;
1878
1879                 napi_enable(napi);
1880         }
1881 }
1882
1883 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1884 {
1885         int q_idx;
1886         struct ixgbe_q_vector *q_vector;
1887         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1888
1889         /* legacy and MSI only use one vector */
1890         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1891                 q_vectors = 1;
1892
1893         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1894                 q_vector = &adapter->q_vector[q_idx];
1895                 if (!q_vector->rxr_count)
1896                         continue;
1897                 napi_disable(&q_vector->napi);
1898         }
1899 }
1900
1901 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1902 {
1903         struct net_device *netdev = adapter->netdev;
1904         int i;
1905
1906         ixgbe_set_rx_mode(netdev);
1907
1908         ixgbe_restore_vlan(adapter);
1909
1910         ixgbe_configure_tx(adapter);
1911         ixgbe_configure_rx(adapter);
1912         for (i = 0; i < adapter->num_rx_queues; i++)
1913                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1914                                        (adapter->rx_ring[i].count - 1));
1915 }
1916
1917 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1918 {
1919         struct net_device *netdev = adapter->netdev;
1920         struct ixgbe_hw *hw = &adapter->hw;
1921         int i, j = 0;
1922         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1923         u32 txdctl, rxdctl, mhadd;
1924         u32 gpie;
1925
1926         ixgbe_get_hw_control(adapter);
1927
1928         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1929             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1930                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1931                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1932                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1933                 } else {
1934                         /* MSI only */
1935                         gpie = 0;
1936                 }
1937                 /* XXX: to interrupt immediately for EICS writes, enable this */
1938                 /* gpie |= IXGBE_GPIE_EIMEN; */
1939                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1940         }
1941
1942         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1943                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1944                  * specifically only auto mask tx and rx interrupts */
1945                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1946         }
1947
1948         /* Enable fan failure interrupt if media type is copper */
1949         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
1950                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
1951                 gpie |= IXGBE_SDP1_GPIEN;
1952                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1953         }
1954
1955         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1956         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1957                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1958                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1959
1960                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1961         }
1962
1963         for (i = 0; i < adapter->num_tx_queues; i++) {
1964                 j = adapter->tx_ring[i].reg_idx;
1965                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1966                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1967                 txdctl |= (8 << 16);
1968                 txdctl |= IXGBE_TXDCTL_ENABLE;
1969                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1970         }
1971
1972         for (i = 0; i < adapter->num_rx_queues; i++) {
1973                 j = adapter->rx_ring[i].reg_idx;
1974                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1975                 /* enable PTHRESH=32 descriptors (half the internal cache)
1976                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1977                  * this also removes a pesky rx_no_buffer_count increment */
1978                 rxdctl |= 0x0020;
1979                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1980                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1981         }
1982         /* enable all receives */
1983         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1984         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1985         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1986
1987         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1988                 ixgbe_configure_msix(adapter);
1989         else
1990                 ixgbe_configure_msi_and_legacy(adapter);
1991
1992         clear_bit(__IXGBE_DOWN, &adapter->state);
1993         ixgbe_napi_enable_all(adapter);
1994
1995         /* clear any pending interrupts, may auto mask */
1996         IXGBE_READ_REG(hw, IXGBE_EICR);
1997
1998         ixgbe_irq_enable(adapter);
1999
2000         /* bring the link up in the watchdog, this could race with our first
2001          * link up interrupt but shouldn't be a problem */
2002         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2003         adapter->link_check_timeout = jiffies;
2004         mod_timer(&adapter->watchdog_timer, jiffies);
2005         return 0;
2006 }
2007
2008 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2009 {
2010         WARN_ON(in_interrupt());
2011         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2012                 msleep(1);
2013         ixgbe_down(adapter);
2014         ixgbe_up(adapter);
2015         clear_bit(__IXGBE_RESETTING, &adapter->state);
2016 }
2017
2018 int ixgbe_up(struct ixgbe_adapter *adapter)
2019 {
2020         /* hardware has been reset, we need to reload some things */
2021         ixgbe_configure(adapter);
2022
2023         return ixgbe_up_complete(adapter);
2024 }
2025
2026 void ixgbe_reset(struct ixgbe_adapter *adapter)
2027 {
2028         struct ixgbe_hw *hw = &adapter->hw;
2029         if (hw->mac.ops.init_hw(hw))
2030                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2031
2032         /* reprogram the RAR[0] in case user changed it. */
2033         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2034
2035 }
2036
2037 /**
2038  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2039  * @adapter: board private structure
2040  * @rx_ring: ring to free buffers from
2041  **/
2042 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2043                                 struct ixgbe_ring *rx_ring)
2044 {
2045         struct pci_dev *pdev = adapter->pdev;
2046         unsigned long size;
2047         unsigned int i;
2048
2049         /* Free all the Rx ring sk_buffs */
2050
2051         for (i = 0; i < rx_ring->count; i++) {
2052                 struct ixgbe_rx_buffer *rx_buffer_info;
2053
2054                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2055                 if (rx_buffer_info->dma) {
2056                         pci_unmap_single(pdev, rx_buffer_info->dma,
2057                                          rx_ring->rx_buf_len,
2058                                          PCI_DMA_FROMDEVICE);
2059                         rx_buffer_info->dma = 0;
2060                 }
2061                 if (rx_buffer_info->skb) {
2062                         dev_kfree_skb(rx_buffer_info->skb);
2063                         rx_buffer_info->skb = NULL;
2064                 }
2065                 if (!rx_buffer_info->page)
2066                         continue;
2067                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2068                                PCI_DMA_FROMDEVICE);
2069                 rx_buffer_info->page_dma = 0;
2070                 put_page(rx_buffer_info->page);
2071                 rx_buffer_info->page = NULL;
2072                 rx_buffer_info->page_offset = 0;
2073         }
2074
2075         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2076         memset(rx_ring->rx_buffer_info, 0, size);
2077
2078         /* Zero out the descriptor ring */
2079         memset(rx_ring->desc, 0, rx_ring->size);
2080
2081         rx_ring->next_to_clean = 0;
2082         rx_ring->next_to_use = 0;
2083
2084         writel(0, adapter->hw.hw_addr + rx_ring->head);
2085         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2086 }
2087
2088 /**
2089  * ixgbe_clean_tx_ring - Free Tx Buffers
2090  * @adapter: board private structure
2091  * @tx_ring: ring to be cleaned
2092  **/
2093 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2094                                 struct ixgbe_ring *tx_ring)
2095 {
2096         struct ixgbe_tx_buffer *tx_buffer_info;
2097         unsigned long size;
2098         unsigned int i;
2099
2100         /* Free all the Tx ring sk_buffs */
2101
2102         for (i = 0; i < tx_ring->count; i++) {
2103                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2104                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2105         }
2106
2107         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2108         memset(tx_ring->tx_buffer_info, 0, size);
2109
2110         /* Zero out the descriptor ring */
2111         memset(tx_ring->desc, 0, tx_ring->size);
2112
2113         tx_ring->next_to_use = 0;
2114         tx_ring->next_to_clean = 0;
2115
2116         writel(0, adapter->hw.hw_addr + tx_ring->head);
2117         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2118 }
2119
2120 /**
2121  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2122  * @adapter: board private structure
2123  **/
2124 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2125 {
2126         int i;
2127
2128         for (i = 0; i < adapter->num_rx_queues; i++)
2129                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2130 }
2131
2132 /**
2133  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2134  * @adapter: board private structure
2135  **/
2136 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2137 {
2138         int i;
2139
2140         for (i = 0; i < adapter->num_tx_queues; i++)
2141                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2142 }
2143
2144 void ixgbe_down(struct ixgbe_adapter *adapter)
2145 {
2146         struct net_device *netdev = adapter->netdev;
2147         struct ixgbe_hw *hw = &adapter->hw;
2148         u32 rxctrl;
2149         u32 txdctl;
2150         int i, j;
2151
2152         /* signal that we are down to the interrupt handler */
2153         set_bit(__IXGBE_DOWN, &adapter->state);
2154
2155         /* disable receives */
2156         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2157         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2158
2159         netif_tx_disable(netdev);
2160
2161         IXGBE_WRITE_FLUSH(hw);
2162         msleep(10);
2163
2164         netif_tx_stop_all_queues(netdev);
2165
2166         ixgbe_irq_disable(adapter);
2167
2168         ixgbe_napi_disable_all(adapter);
2169
2170         del_timer_sync(&adapter->watchdog_timer);
2171         cancel_work_sync(&adapter->watchdog_task);
2172
2173         /* disable transmits in the hardware now that interrupts are off */
2174         for (i = 0; i < adapter->num_tx_queues; i++) {
2175                 j = adapter->tx_ring[i].reg_idx;
2176                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2177                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2178                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2179         }
2180
2181         netif_carrier_off(netdev);
2182
2183 #ifdef CONFIG_IXGBE_DCA
2184         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2185                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2186                 dca_remove_requester(&adapter->pdev->dev);
2187         }
2188
2189 #endif
2190         if (!pci_channel_offline(adapter->pdev))
2191                 ixgbe_reset(adapter);
2192         ixgbe_clean_all_tx_rings(adapter);
2193         ixgbe_clean_all_rx_rings(adapter);
2194
2195 #ifdef CONFIG_IXGBE_DCA
2196         /* since we reset the hardware DCA settings were cleared */
2197         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2198                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2199                 /* always use CB2 mode, difference is masked
2200                  * in the CB driver */
2201                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2202                 ixgbe_setup_dca(adapter);
2203         }
2204 #endif
2205 }
2206
2207 /**
2208  * ixgbe_poll - NAPI Rx polling callback
2209  * @napi: structure for representing this polling device
2210  * @budget: how many packets driver is allowed to clean
2211  *
2212  * This function is used for legacy and MSI, NAPI mode
2213  **/
2214 static int ixgbe_poll(struct napi_struct *napi, int budget)
2215 {
2216         struct ixgbe_q_vector *q_vector = container_of(napi,
2217                                                   struct ixgbe_q_vector, napi);
2218         struct ixgbe_adapter *adapter = q_vector->adapter;
2219         int tx_cleaned, work_done = 0;
2220
2221 #ifdef CONFIG_IXGBE_DCA
2222         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2223                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2224                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2225         }
2226 #endif
2227
2228         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2229         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2230
2231         if (tx_cleaned)
2232                 work_done = budget;
2233
2234         /* If budget not fully consumed, exit the polling mode */
2235         if (work_done < budget) {
2236                 netif_rx_complete(adapter->netdev, napi);
2237                 if (adapter->itr_setting & 3)
2238                         ixgbe_set_itr(adapter);
2239                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2240                         ixgbe_irq_enable(adapter);
2241         }
2242         return work_done;
2243 }
2244
2245 /**
2246  * ixgbe_tx_timeout - Respond to a Tx Hang
2247  * @netdev: network interface device structure
2248  **/
2249 static void ixgbe_tx_timeout(struct net_device *netdev)
2250 {
2251         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2252
2253         /* Do the reset outside of interrupt context */
2254         schedule_work(&adapter->reset_task);
2255 }
2256
2257 static void ixgbe_reset_task(struct work_struct *work)
2258 {
2259         struct ixgbe_adapter *adapter;
2260         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2261
2262         adapter->tx_timeout_count++;
2263
2264         ixgbe_reinit_locked(adapter);
2265 }
2266
2267 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2268 {
2269         int nrq = 1, ntq = 1;
2270         int feature_mask = 0, rss_i, rss_m;
2271
2272         /* Number of supported queues */
2273         switch (adapter->hw.mac.type) {
2274         case ixgbe_mac_82598EB:
2275                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2276                 rss_m = 0;
2277                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2278
2279                 switch (adapter->flags & feature_mask) {
2280                 case (IXGBE_FLAG_RSS_ENABLED):
2281                         rss_m = 0xF;
2282                         nrq = rss_i;
2283                         ntq = rss_i;
2284                         break;
2285                 case 0:
2286                 default:
2287                         rss_i = 0;
2288                         rss_m = 0;
2289                         nrq = 1;
2290                         ntq = 1;
2291                         break;
2292                 }
2293
2294                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2295                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2296                 break;
2297         default:
2298                 nrq = 1;
2299                 ntq = 1;
2300                 break;
2301         }
2302
2303         adapter->num_rx_queues = nrq;
2304         adapter->num_tx_queues = ntq;
2305 }
2306
2307 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2308                                        int vectors)
2309 {
2310         int err, vector_threshold;
2311
2312         /* We'll want at least 3 (vector_threshold):
2313          * 1) TxQ[0] Cleanup
2314          * 2) RxQ[0] Cleanup
2315          * 3) Other (Link Status Change, etc.)
2316          * 4) TCP Timer (optional)
2317          */
2318         vector_threshold = MIN_MSIX_COUNT;
2319
2320         /* The more we get, the more we will assign to Tx/Rx Cleanup
2321          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2322          * Right now, we simply care about how many we'll get; we'll
2323          * set them up later while requesting irq's.
2324          */
2325         while (vectors >= vector_threshold) {
2326                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2327                                       vectors);
2328                 if (!err) /* Success in acquiring all requested vectors. */
2329                         break;
2330                 else if (err < 0)
2331                         vectors = 0; /* Nasty failure, quit now */
2332                 else /* err == number of vectors we should try again with */
2333                         vectors = err;
2334         }
2335
2336         if (vectors < vector_threshold) {
2337                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2338                  * This just means we'll go with either a single MSI
2339                  * vector or fall back to legacy interrupts.
2340                  */
2341                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2342                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2343                 kfree(adapter->msix_entries);
2344                 adapter->msix_entries = NULL;
2345                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2346                 ixgbe_set_num_queues(adapter);
2347         } else {
2348                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2349                 adapter->num_msix_vectors = vectors;
2350         }
2351 }
2352
2353 /**
2354  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2355  * @adapter: board private structure to initialize
2356  *
2357  * Once we know the feature-set enabled for the device, we'll cache
2358  * the register offset the descriptor ring is assigned to.
2359  **/
2360 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2361 {
2362         int feature_mask = 0, rss_i;
2363         int i, txr_idx, rxr_idx;
2364
2365         /* Number of supported queues */
2366         switch (adapter->hw.mac.type) {
2367         case ixgbe_mac_82598EB:
2368                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2369                 txr_idx = 0;
2370                 rxr_idx = 0;
2371                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2372                 switch (adapter->flags & feature_mask) {
2373                 case (IXGBE_FLAG_RSS_ENABLED):
2374                         for (i = 0; i < adapter->num_rx_queues; i++)
2375                                 adapter->rx_ring[i].reg_idx = i;
2376                         for (i = 0; i < adapter->num_tx_queues; i++)
2377                                 adapter->tx_ring[i].reg_idx = i;
2378                         break;
2379                 case 0:
2380                 default:
2381                         break;
2382                 }
2383                 break;
2384         default:
2385                 break;
2386         }
2387 }
2388
2389 /**
2390  * ixgbe_alloc_queues - Allocate memory for all rings
2391  * @adapter: board private structure to initialize
2392  *
2393  * We allocate one ring per queue at run-time since we don't know the
2394  * number of queues at compile-time.  The polling_netdev array is
2395  * intended for Multiqueue, but should work fine with a single queue.
2396  **/
2397 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2398 {
2399         int i;
2400
2401         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2402                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2403         if (!adapter->tx_ring)
2404                 goto err_tx_ring_allocation;
2405
2406         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2407                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2408         if (!adapter->rx_ring)
2409                 goto err_rx_ring_allocation;
2410
2411         for (i = 0; i < adapter->num_tx_queues; i++) {
2412                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2413                 adapter->tx_ring[i].queue_index = i;
2414         }
2415
2416         for (i = 0; i < adapter->num_rx_queues; i++) {
2417                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2418                 adapter->rx_ring[i].queue_index = i;
2419         }
2420
2421         ixgbe_cache_ring_register(adapter);
2422
2423         return 0;
2424
2425 err_rx_ring_allocation:
2426         kfree(adapter->tx_ring);
2427 err_tx_ring_allocation:
2428         return -ENOMEM;
2429 }
2430
2431 /**
2432  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2433  * @adapter: board private structure to initialize
2434  *
2435  * Attempt to configure the interrupts using the best available
2436  * capabilities of the hardware and the kernel.
2437  **/
2438 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2439                                                     *adapter)
2440 {
2441         int err = 0;
2442         int vector, v_budget;
2443
2444         /*
2445          * It's easy to be greedy for MSI-X vectors, but it really
2446          * doesn't do us much good if we have a lot more vectors
2447          * than CPU's.  So let's be conservative and only ask for
2448          * (roughly) twice the number of vectors as there are CPU's.
2449          */
2450         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2451                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2452
2453         /*
2454          * At the same time, hardware can only support a maximum of
2455          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2456          * we can easily reach upwards of 64 Rx descriptor queues and
2457          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2458          * the cpu count also exceeds our vector limit.
2459          */
2460         v_budget = min(v_budget, MAX_MSIX_COUNT);
2461
2462         /* A failure in MSI-X entry allocation isn't fatal, but it does
2463          * mean we disable MSI-X capabilities of the adapter. */
2464         adapter->msix_entries = kcalloc(v_budget,
2465                                         sizeof(struct msix_entry), GFP_KERNEL);
2466         if (!adapter->msix_entries) {
2467                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2468                 ixgbe_set_num_queues(adapter);
2469                 kfree(adapter->tx_ring);
2470                 kfree(adapter->rx_ring);
2471                 err = ixgbe_alloc_queues(adapter);
2472                 if (err) {
2473                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2474                                 "for queues\n");
2475                         goto out;
2476                 }
2477
2478                 goto try_msi;
2479         }
2480
2481         for (vector = 0; vector < v_budget; vector++)
2482                 adapter->msix_entries[vector].entry = vector;
2483
2484         ixgbe_acquire_msix_vectors(adapter, v_budget);
2485
2486         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2487                 goto out;
2488
2489 try_msi:
2490         err = pci_enable_msi(adapter->pdev);
2491         if (!err) {
2492                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2493         } else {
2494                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2495                         "falling back to legacy.  Error: %d\n", err);
2496                 /* reset err */
2497                 err = 0;
2498         }
2499
2500 out:
2501         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2502         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2503
2504         return err;
2505 }
2506
2507 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2508 {
2509         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2510                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2511                 pci_disable_msix(adapter->pdev);
2512                 kfree(adapter->msix_entries);
2513                 adapter->msix_entries = NULL;
2514         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2515                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2516                 pci_disable_msi(adapter->pdev);
2517         }
2518         return;
2519 }
2520
2521 /**
2522  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2523  * @adapter: board private structure to initialize
2524  *
2525  * We determine which interrupt scheme to use based on...
2526  * - Kernel support (MSI, MSI-X)
2527  *   - which can be user-defined (via MODULE_PARAM)
2528  * - Hardware queue count (num_*_queues)
2529  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2530  **/
2531 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2532 {
2533         int err;
2534
2535         /* Number of supported queues */
2536         ixgbe_set_num_queues(adapter);
2537
2538         err = ixgbe_alloc_queues(adapter);
2539         if (err) {
2540                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2541                 goto err_alloc_queues;
2542         }
2543
2544         err = ixgbe_set_interrupt_capability(adapter);
2545         if (err) {
2546                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2547                 goto err_set_interrupt;
2548         }
2549
2550         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2551                 "Tx Queue count = %u\n",
2552                 (adapter->num_rx_queues > 1) ? "Enabled" :
2553                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2554
2555         set_bit(__IXGBE_DOWN, &adapter->state);
2556
2557         return 0;
2558
2559 err_set_interrupt:
2560         kfree(adapter->tx_ring);
2561         kfree(adapter->rx_ring);
2562 err_alloc_queues:
2563         return err;
2564 }
2565
2566 /**
2567  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2568  * @adapter: board private structure to initialize
2569  *
2570  * ixgbe_sw_init initializes the Adapter private data structure.
2571  * Fields are initialized based on PCI device information and
2572  * OS network device settings (MTU size).
2573  **/
2574 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2575 {
2576         struct ixgbe_hw *hw = &adapter->hw;
2577         struct pci_dev *pdev = adapter->pdev;
2578         unsigned int rss;
2579
2580         /* PCI config space info */
2581
2582         hw->vendor_id = pdev->vendor;
2583         hw->device_id = pdev->device;
2584         hw->revision_id = pdev->revision;
2585         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2586         hw->subsystem_device_id = pdev->subsystem_device;
2587
2588         /* Set capability flags */
2589         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2590         adapter->ring_feature[RING_F_RSS].indices = rss;
2591         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2592         if (hw->mac.ops.get_media_type &&
2593             (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2594                 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2595
2596         /* default flow control settings */
2597         hw->fc.original_type = ixgbe_fc_none;
2598         hw->fc.type = ixgbe_fc_none;
2599         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2600         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2601         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2602         hw->fc.send_xon = true;
2603
2604         /* select 10G link by default */
2605         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2606
2607         /* enable itr by default in dynamic mode */
2608         adapter->itr_setting = 1;
2609         adapter->eitr_param = 20000;
2610
2611         /* set defaults for eitr in MegaBytes */
2612         adapter->eitr_low = 10;
2613         adapter->eitr_high = 20;
2614
2615         /* set default ring sizes */
2616         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2617         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2618
2619         /* initialize eeprom parameters */
2620         if (ixgbe_init_eeprom_params_generic(hw)) {
2621                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2622                 return -EIO;
2623         }
2624
2625         /* enable rx csum by default */
2626         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2627
2628         set_bit(__IXGBE_DOWN, &adapter->state);
2629
2630         return 0;
2631 }
2632
2633 /**
2634  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2635  * @adapter: board private structure
2636  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2637  *
2638  * Return 0 on success, negative on failure
2639  **/
2640 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2641                              struct ixgbe_ring *tx_ring)
2642 {
2643         struct pci_dev *pdev = adapter->pdev;
2644         int size;
2645
2646         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2647         tx_ring->tx_buffer_info = vmalloc(size);
2648         if (!tx_ring->tx_buffer_info)
2649                 goto err;
2650         memset(tx_ring->tx_buffer_info, 0, size);
2651
2652         /* round up to nearest 4K */
2653         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2654                         sizeof(u32);
2655         tx_ring->size = ALIGN(tx_ring->size, 4096);
2656
2657         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2658                                              &tx_ring->dma);
2659         if (!tx_ring->desc)
2660                 goto err;
2661
2662         tx_ring->next_to_use = 0;
2663         tx_ring->next_to_clean = 0;
2664         tx_ring->work_limit = tx_ring->count;
2665         return 0;
2666
2667 err:
2668         vfree(tx_ring->tx_buffer_info);
2669         tx_ring->tx_buffer_info = NULL;
2670         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2671                             "descriptor ring\n");
2672         return -ENOMEM;
2673 }
2674
2675 /**
2676  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2677  * @adapter: board private structure
2678  *
2679  * If this function returns with an error, then it's possible one or
2680  * more of the rings is populated (while the rest are not).  It is the
2681  * callers duty to clean those orphaned rings.
2682  *
2683  * Return 0 on success, negative on failure
2684  **/
2685 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2686 {
2687         int i, err = 0;
2688
2689         for (i = 0; i < adapter->num_tx_queues; i++) {
2690                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2691                 if (!err)
2692                         continue;
2693                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2694                 break;
2695         }
2696
2697         return err;
2698 }
2699
2700 /**
2701  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2702  * @adapter: board private structure
2703  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2704  *
2705  * Returns 0 on success, negative on failure
2706  **/
2707 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2708                              struct ixgbe_ring *rx_ring)
2709 {
2710         struct pci_dev *pdev = adapter->pdev;
2711         int size;
2712
2713         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2714         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2715         if (!rx_ring->lro_mgr.lro_arr)
2716                 return -ENOMEM;
2717         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2718
2719         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2720         rx_ring->rx_buffer_info = vmalloc(size);
2721         if (!rx_ring->rx_buffer_info) {
2722                 DPRINTK(PROBE, ERR,
2723                         "vmalloc allocation failed for the rx desc ring\n");
2724                 goto alloc_failed;
2725         }
2726         memset(rx_ring->rx_buffer_info, 0, size);
2727
2728         /* Round up to nearest 4K */
2729         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2730         rx_ring->size = ALIGN(rx_ring->size, 4096);
2731
2732         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2733
2734         if (!rx_ring->desc) {
2735                 DPRINTK(PROBE, ERR,
2736                         "Memory allocation failed for the rx desc ring\n");
2737                 vfree(rx_ring->rx_buffer_info);
2738                 goto alloc_failed;
2739         }
2740
2741         rx_ring->next_to_clean = 0;
2742         rx_ring->next_to_use = 0;
2743
2744         return 0;
2745
2746 alloc_failed:
2747         vfree(rx_ring->lro_mgr.lro_arr);
2748         rx_ring->lro_mgr.lro_arr = NULL;
2749         return -ENOMEM;
2750 }
2751
2752 /**
2753  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2754  * @adapter: board private structure
2755  *
2756  * If this function returns with an error, then it's possible one or
2757  * more of the rings is populated (while the rest are not).  It is the
2758  * callers duty to clean those orphaned rings.
2759  *
2760  * Return 0 on success, negative on failure
2761  **/
2762
2763 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2764 {
2765         int i, err = 0;
2766
2767         for (i = 0; i < adapter->num_rx_queues; i++) {
2768                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2769                 if (!err)
2770                         continue;
2771                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2772                 break;
2773         }
2774
2775         return err;
2776 }
2777
2778 /**
2779  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2780  * @adapter: board private structure
2781  * @tx_ring: Tx descriptor ring for a specific queue
2782  *
2783  * Free all transmit software resources
2784  **/
2785 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2786                              struct ixgbe_ring *tx_ring)
2787 {
2788         struct pci_dev *pdev = adapter->pdev;
2789
2790         ixgbe_clean_tx_ring(adapter, tx_ring);
2791
2792         vfree(tx_ring->tx_buffer_info);
2793         tx_ring->tx_buffer_info = NULL;
2794
2795         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2796
2797         tx_ring->desc = NULL;
2798 }
2799
2800 /**
2801  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2802  * @adapter: board private structure
2803  *
2804  * Free all transmit software resources
2805  **/
2806 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2807 {
2808         int i;
2809
2810         for (i = 0; i < adapter->num_tx_queues; i++)
2811                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2812 }
2813
2814 /**
2815  * ixgbe_free_rx_resources - Free Rx Resources
2816  * @adapter: board private structure
2817  * @rx_ring: ring to clean the resources from
2818  *
2819  * Free all receive software resources
2820  **/
2821 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2822                              struct ixgbe_ring *rx_ring)
2823 {
2824         struct pci_dev *pdev = adapter->pdev;
2825
2826         vfree(rx_ring->lro_mgr.lro_arr);
2827         rx_ring->lro_mgr.lro_arr = NULL;
2828
2829         ixgbe_clean_rx_ring(adapter, rx_ring);
2830
2831         vfree(rx_ring->rx_buffer_info);
2832         rx_ring->rx_buffer_info = NULL;
2833
2834         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2835
2836         rx_ring->desc = NULL;
2837 }
2838
2839 /**
2840  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2841  * @adapter: board private structure
2842  *
2843  * Free all receive software resources
2844  **/
2845 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2846 {
2847         int i;
2848
2849         for (i = 0; i < adapter->num_rx_queues; i++)
2850                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2851 }
2852
2853 /**
2854  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2855  * @netdev: network interface device structure
2856  * @new_mtu: new value for maximum frame size
2857  *
2858  * Returns 0 on success, negative on failure
2859  **/
2860 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2861 {
2862         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2863         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2864
2865         /* MTU < 68 is an error and causes problems on some kernels */
2866         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2867                 return -EINVAL;
2868
2869         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2870                 netdev->mtu, new_mtu);
2871         /* must set new MTU before calling down or up */
2872         netdev->mtu = new_mtu;
2873
2874         if (netif_running(netdev))
2875                 ixgbe_reinit_locked(adapter);
2876
2877         return 0;
2878 }
2879
2880 /**
2881  * ixgbe_open - Called when a network interface is made active
2882  * @netdev: network interface device structure
2883  *
2884  * Returns 0 on success, negative value on failure
2885  *
2886  * The open entry point is called when a network interface is made
2887  * active by the system (IFF_UP).  At this point all resources needed
2888  * for transmit and receive operations are allocated, the interrupt
2889  * handler is registered with the OS, the watchdog timer is started,
2890  * and the stack is notified that the interface is ready.
2891  **/
2892 static int ixgbe_open(struct net_device *netdev)
2893 {
2894         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2895         int err;
2896
2897         /* disallow open during test */
2898         if (test_bit(__IXGBE_TESTING, &adapter->state))
2899                 return -EBUSY;
2900
2901         /* allocate transmit descriptors */
2902         err = ixgbe_setup_all_tx_resources(adapter);
2903         if (err)
2904                 goto err_setup_tx;
2905
2906         /* allocate receive descriptors */
2907         err = ixgbe_setup_all_rx_resources(adapter);
2908         if (err)
2909                 goto err_setup_rx;
2910
2911         ixgbe_configure(adapter);
2912
2913         err = ixgbe_request_irq(adapter);
2914         if (err)
2915                 goto err_req_irq;
2916
2917         err = ixgbe_up_complete(adapter);
2918         if (err)
2919                 goto err_up;
2920
2921         netif_tx_start_all_queues(netdev);
2922
2923         return 0;
2924
2925 err_up:
2926         ixgbe_release_hw_control(adapter);
2927         ixgbe_free_irq(adapter);
2928 err_req_irq:
2929         ixgbe_free_all_rx_resources(adapter);
2930 err_setup_rx:
2931         ixgbe_free_all_tx_resources(adapter);
2932 err_setup_tx:
2933         ixgbe_reset(adapter);
2934
2935         return err;
2936 }
2937
2938 /**
2939  * ixgbe_close - Disables a network interface
2940  * @netdev: network interface device structure
2941  *
2942  * Returns 0, this is not allowed to fail
2943  *
2944  * The close entry point is called when an interface is de-activated
2945  * by the OS.  The hardware is still under the drivers control, but
2946  * needs to be disabled.  A global MAC reset is issued to stop the
2947  * hardware, and all transmit and receive resources are freed.
2948  **/
2949 static int ixgbe_close(struct net_device *netdev)
2950 {
2951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2952
2953         ixgbe_down(adapter);
2954         ixgbe_free_irq(adapter);
2955
2956         ixgbe_free_all_tx_resources(adapter);
2957         ixgbe_free_all_rx_resources(adapter);
2958
2959         ixgbe_release_hw_control(adapter);
2960
2961         return 0;
2962 }
2963
2964 /**
2965  * ixgbe_napi_add_all - prep napi structs for use
2966  * @adapter: private struct
2967  * helper function to napi_add each possible q_vector->napi
2968  */
2969 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
2970 {
2971         int q_idx, q_vectors;
2972         int (*poll)(struct napi_struct *, int);
2973
2974         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2975                 poll = &ixgbe_clean_rxonly;
2976                 /* Only enable as many vectors as we have rx queues. */
2977                 q_vectors = adapter->num_rx_queues;
2978         } else {
2979                 poll = &ixgbe_poll;
2980                 /* only one q_vector for legacy modes */
2981                 q_vectors = 1;
2982         }
2983
2984         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2985                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
2986                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
2987         }
2988 }
2989
2990 static void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
2991 {
2992         int q_idx;
2993         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2994
2995         /* legacy and MSI only use one vector */
2996         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2997                 q_vectors = 1;
2998
2999         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3000                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3001                 if (!q_vector->rxr_count)
3002                         continue;
3003                 netif_napi_del(&q_vector->napi);
3004         }
3005 }
3006
3007 #ifdef CONFIG_PM
3008 static int ixgbe_resume(struct pci_dev *pdev)
3009 {
3010         struct net_device *netdev = pci_get_drvdata(pdev);
3011         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3012         u32 err;
3013
3014         pci_set_power_state(pdev, PCI_D0);
3015         pci_restore_state(pdev);
3016         err = pci_enable_device(pdev);
3017         if (err) {
3018                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3019                                 "suspend\n");
3020                 return err;
3021         }
3022         pci_set_master(pdev);
3023
3024         pci_enable_wake(pdev, PCI_D3hot, 0);
3025         pci_enable_wake(pdev, PCI_D3cold, 0);
3026
3027         err = ixgbe_init_interrupt_scheme(adapter);
3028         if (err) {
3029                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3030                                 "device\n");
3031                 return err;
3032         }
3033
3034         ixgbe_napi_add_all(adapter);
3035         ixgbe_reset(adapter);
3036
3037         if (netif_running(netdev)) {
3038                 err = ixgbe_open(adapter->netdev);
3039                 if (err)
3040                         return err;
3041         }
3042
3043         netif_device_attach(netdev);
3044
3045         return 0;
3046 }
3047
3048 #endif /* CONFIG_PM */
3049 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3050 {
3051         struct net_device *netdev = pci_get_drvdata(pdev);
3052         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3053 #ifdef CONFIG_PM
3054         int retval = 0;
3055 #endif
3056
3057         netif_device_detach(netdev);
3058
3059         if (netif_running(netdev)) {
3060                 ixgbe_down(adapter);
3061                 ixgbe_free_irq(adapter);
3062                 ixgbe_free_all_tx_resources(adapter);
3063                 ixgbe_free_all_rx_resources(adapter);
3064         }
3065         ixgbe_reset_interrupt_capability(adapter);
3066         ixgbe_napi_del_all(adapter);
3067         kfree(adapter->tx_ring);
3068         kfree(adapter->rx_ring);
3069
3070 #ifdef CONFIG_PM
3071         retval = pci_save_state(pdev);
3072         if (retval)
3073                 return retval;
3074 #endif
3075
3076         pci_enable_wake(pdev, PCI_D3hot, 0);
3077         pci_enable_wake(pdev, PCI_D3cold, 0);
3078
3079         ixgbe_release_hw_control(adapter);
3080
3081         pci_disable_device(pdev);
3082
3083         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3084
3085         return 0;
3086 }
3087
3088 static void ixgbe_shutdown(struct pci_dev *pdev)
3089 {
3090         ixgbe_suspend(pdev, PMSG_SUSPEND);
3091 }
3092
3093 /**
3094  * ixgbe_update_stats - Update the board statistics counters.
3095  * @adapter: board private structure
3096  **/
3097 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3098 {
3099         struct ixgbe_hw *hw = &adapter->hw;
3100         u64 total_mpc = 0;
3101         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3102
3103         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3104         for (i = 0; i < 8; i++) {
3105                 /* for packet buffers not used, the register should read 0 */
3106                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3107                 missed_rx += mpc;
3108                 adapter->stats.mpc[i] += mpc;
3109                 total_mpc += adapter->stats.mpc[i];
3110                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3111         }
3112         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3113         /* work around hardware counting issue */
3114         adapter->stats.gprc -= missed_rx;
3115
3116         /* 82598 hardware only has a 32 bit counter in the high register */
3117         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3118         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3119         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3120         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3121         adapter->stats.bprc += bprc;
3122         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3123         adapter->stats.mprc -= bprc;
3124         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3125         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3126         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3127         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3128         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3129         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3130         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3131         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3132         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3133         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3134         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3135         adapter->stats.lxontxc += lxon;
3136         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3137         adapter->stats.lxofftxc += lxoff;
3138         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3139         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3140         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3141         /*
3142          * 82598 errata - tx of flow control packets is included in tx counters
3143          */
3144         xon_off_tot = lxon + lxoff;
3145         adapter->stats.gptc -= xon_off_tot;
3146         adapter->stats.mptc -= xon_off_tot;
3147         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3148         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3149         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3150         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3151         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3152         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3153         adapter->stats.ptc64 -= xon_off_tot;
3154         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3155         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3156         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3157         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3158         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3159         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3160
3161         /* Fill out the OS statistics structure */
3162         adapter->net_stats.multicast = adapter->stats.mprc;
3163
3164         /* Rx Errors */
3165         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3166                                        adapter->stats.rlec;
3167         adapter->net_stats.rx_dropped = 0;
3168         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3169         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3170         adapter->net_stats.rx_missed_errors = total_mpc;
3171 }
3172
3173 /**
3174  * ixgbe_watchdog - Timer Call-back
3175  * @data: pointer to adapter cast into an unsigned long
3176  **/
3177 static void ixgbe_watchdog(unsigned long data)
3178 {
3179         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3180         struct ixgbe_hw *hw = &adapter->hw;
3181
3182         /* Do the watchdog outside of interrupt context due to the lovely
3183          * delays that some of the newer hardware requires */
3184         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3185                 /* Cause software interrupt to ensure rx rings are cleaned */
3186                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3187                         u32 eics =
3188                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3189                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3190                 } else {
3191                         /* For legacy and MSI interrupts don't set any bits that
3192                          * are enabled for EIAM, because this operation would
3193                          * set *both* EIMS and EICS for any bit in EIAM */
3194                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3195                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3196                 }
3197                 /* Reset the timer */
3198                 mod_timer(&adapter->watchdog_timer,
3199                           round_jiffies(jiffies + 2 * HZ));
3200         }
3201
3202         schedule_work(&adapter->watchdog_task);
3203 }
3204
3205 /**
3206  * ixgbe_watchdog_task - worker thread to bring link up
3207  * @work: pointer to work_struct containing our data
3208  **/
3209 static void ixgbe_watchdog_task(struct work_struct *work)
3210 {
3211         struct ixgbe_adapter *adapter = container_of(work,
3212                                                      struct ixgbe_adapter,
3213                                                      watchdog_task);
3214         struct net_device *netdev = adapter->netdev;
3215         struct ixgbe_hw *hw = &adapter->hw;
3216         u32 link_speed = adapter->link_speed;
3217         bool link_up = adapter->link_up;
3218
3219         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3220
3221         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3222                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3223                 if (link_up ||
3224                     time_after(jiffies, (adapter->link_check_timeout +
3225                                          IXGBE_TRY_LINK_TIMEOUT))) {
3226                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3227                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3228                 }
3229                 adapter->link_up = link_up;
3230                 adapter->link_speed = link_speed;
3231         }
3232
3233         if (link_up) {
3234                 if (!netif_carrier_ok(netdev)) {
3235                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3236                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3237 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3238 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3239                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
3240                                 "Flow Control: %s\n",
3241                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3242                                  "10 Gbps" :
3243                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3244                                   "1 Gbps" : "unknown speed")),
3245                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3246                                  (FLOW_RX ? "RX" :
3247                                  (FLOW_TX ? "TX" : "None"))));
3248
3249                         netif_carrier_on(netdev);
3250                         netif_tx_wake_all_queues(netdev);
3251                 } else {
3252                         /* Force detection of hung controller */
3253                         adapter->detect_tx_hung = true;
3254                 }
3255         } else {
3256                 adapter->link_up = false;
3257                 adapter->link_speed = 0;
3258                 if (netif_carrier_ok(netdev)) {
3259                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
3260                         netif_carrier_off(netdev);
3261                         netif_tx_stop_all_queues(netdev);
3262                 }
3263         }
3264
3265         ixgbe_update_stats(adapter);
3266         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3267 }
3268
3269 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3270                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3271                      u32 tx_flags, u8 *hdr_len)
3272 {
3273         struct ixgbe_adv_tx_context_desc *context_desc;
3274         unsigned int i;
3275         int err;
3276         struct ixgbe_tx_buffer *tx_buffer_info;
3277         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3278         u32 mss_l4len_idx, l4len;
3279
3280         if (skb_is_gso(skb)) {
3281                 if (skb_header_cloned(skb)) {
3282                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3283                         if (err)
3284                                 return err;
3285                 }
3286                 l4len = tcp_hdrlen(skb);
3287                 *hdr_len += l4len;
3288
3289                 if (skb->protocol == htons(ETH_P_IP)) {
3290                         struct iphdr *iph = ip_hdr(skb);
3291                         iph->tot_len = 0;
3292                         iph->check = 0;
3293                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3294                                                                  iph->daddr, 0,
3295                                                                  IPPROTO_TCP,
3296                                                                  0);
3297                         adapter->hw_tso_ctxt++;
3298                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3299                         ipv6_hdr(skb)->payload_len = 0;
3300                         tcp_hdr(skb)->check =
3301                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3302                                              &ipv6_hdr(skb)->daddr,
3303                                              0, IPPROTO_TCP, 0);
3304                         adapter->hw_tso6_ctxt++;
3305                 }
3306
3307                 i = tx_ring->next_to_use;
3308
3309                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3310                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3311
3312                 /* VLAN MACLEN IPLEN */
3313                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3314                         vlan_macip_lens |=
3315                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3316                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3317                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3318                 *hdr_len += skb_network_offset(skb);
3319                 vlan_macip_lens |=
3320                     (skb_transport_header(skb) - skb_network_header(skb));
3321                 *hdr_len +=
3322                     (skb_transport_header(skb) - skb_network_header(skb));
3323                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3324                 context_desc->seqnum_seed = 0;
3325
3326                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3327                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3328                                    IXGBE_ADVTXD_DTYP_CTXT);
3329
3330                 if (skb->protocol == htons(ETH_P_IP))
3331                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3332                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3333                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3334
3335                 /* MSS L4LEN IDX */
3336                 mss_l4len_idx =
3337                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3338                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3339                 /* use index 1 for TSO */
3340                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3341                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3342
3343                 tx_buffer_info->time_stamp = jiffies;
3344                 tx_buffer_info->next_to_watch = i;
3345
3346                 i++;
3347                 if (i == tx_ring->count)
3348                         i = 0;
3349                 tx_ring->next_to_use = i;
3350
3351                 return true;
3352         }
3353         return false;
3354 }
3355
3356 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3357                           struct ixgbe_ring *tx_ring,
3358                           struct sk_buff *skb, u32 tx_flags)
3359 {
3360         struct ixgbe_adv_tx_context_desc *context_desc;
3361         unsigned int i;
3362         struct ixgbe_tx_buffer *tx_buffer_info;
3363         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3364
3365         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3366             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3367                 i = tx_ring->next_to_use;
3368                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3369                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3370
3371                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3372                         vlan_macip_lens |=
3373                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3374                 vlan_macip_lens |= (skb_network_offset(skb) <<
3375                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3376                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3377                         vlan_macip_lens |= (skb_transport_header(skb) -
3378                                             skb_network_header(skb));
3379
3380                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3381                 context_desc->seqnum_seed = 0;
3382
3383                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3384                                     IXGBE_ADVTXD_DTYP_CTXT);
3385
3386                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3387                         switch (skb->protocol) {
3388                         case __constant_htons(ETH_P_IP):
3389                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3390                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3391                                         type_tucmd_mlhl |=
3392                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3393                                 break;
3394                         case __constant_htons(ETH_P_IPV6):
3395                                 /* XXX what about other V6 headers?? */
3396                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3397                                         type_tucmd_mlhl |=
3398                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3399                                 break;
3400                         default:
3401                                 if (unlikely(net_ratelimit())) {
3402                                         DPRINTK(PROBE, WARNING,
3403                                          "partial checksum but proto=%x!\n",
3404                                          skb->protocol);
3405                                 }
3406                                 break;
3407                         }
3408                 }
3409
3410                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3411                 /* use index zero for tx checksum offload */
3412                 context_desc->mss_l4len_idx = 0;
3413
3414                 tx_buffer_info->time_stamp = jiffies;
3415                 tx_buffer_info->next_to_watch = i;
3416
3417                 adapter->hw_csum_tx_good++;
3418                 i++;
3419                 if (i == tx_ring->count)
3420                         i = 0;
3421                 tx_ring->next_to_use = i;
3422
3423                 return true;
3424         }
3425
3426         return false;
3427 }
3428
3429 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3430                         struct ixgbe_ring *tx_ring,
3431                         struct sk_buff *skb, unsigned int first)
3432 {
3433         struct ixgbe_tx_buffer *tx_buffer_info;
3434         unsigned int len = skb->len;
3435         unsigned int offset = 0, size, count = 0, i;
3436         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3437         unsigned int f;
3438
3439         len -= skb->data_len;
3440
3441         i = tx_ring->next_to_use;
3442
3443         while (len) {
3444                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3445                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3446
3447                 tx_buffer_info->length = size;
3448                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3449                                                      skb->data + offset,
3450                                                      size, PCI_DMA_TODEVICE);
3451                 tx_buffer_info->time_stamp = jiffies;
3452                 tx_buffer_info->next_to_watch = i;
3453
3454                 len -= size;
3455                 offset += size;
3456                 count++;
3457                 i++;
3458                 if (i == tx_ring->count)
3459                         i = 0;
3460         }
3461
3462         for (f = 0; f < nr_frags; f++) {
3463                 struct skb_frag_struct *frag;
3464
3465                 frag = &skb_shinfo(skb)->frags[f];
3466                 len = frag->size;
3467                 offset = frag->page_offset;
3468
3469                 while (len) {
3470                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3471                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3472
3473                         tx_buffer_info->length = size;
3474                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3475                                                            frag->page,
3476                                                            offset,
3477                                                            size,
3478                                                            PCI_DMA_TODEVICE);
3479                         tx_buffer_info->time_stamp = jiffies;
3480                         tx_buffer_info->next_to_watch = i;
3481
3482                         len -= size;
3483                         offset += size;
3484                         count++;
3485                         i++;
3486                         if (i == tx_ring->count)
3487                                 i = 0;
3488                 }
3489         }
3490         if (i == 0)
3491                 i = tx_ring->count - 1;
3492         else
3493                 i = i - 1;
3494         tx_ring->tx_buffer_info[i].skb = skb;
3495         tx_ring->tx_buffer_info[first].next_to_watch = i;
3496
3497         return count;
3498 }
3499
3500 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3501                            struct ixgbe_ring *tx_ring,
3502                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3503 {
3504         union ixgbe_adv_tx_desc *tx_desc = NULL;
3505         struct ixgbe_tx_buffer *tx_buffer_info;
3506         u32 olinfo_status = 0, cmd_type_len = 0;
3507         unsigned int i;
3508         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3509
3510         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3511
3512         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3513
3514         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3515                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3516
3517         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3518                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3519
3520                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3521                                  IXGBE_ADVTXD_POPTS_SHIFT;
3522
3523                 /* use index 1 context for tso */
3524                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3525                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3526                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3527                                          IXGBE_ADVTXD_POPTS_SHIFT;
3528
3529         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3530                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3531                                  IXGBE_ADVTXD_POPTS_SHIFT;
3532
3533         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3534
3535         i = tx_ring->next_to_use;
3536         while (count--) {
3537                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3538                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3539                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3540                 tx_desc->read.cmd_type_len =
3541                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3542                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3543                 i++;
3544                 if (i == tx_ring->count)
3545                         i = 0;
3546         }
3547
3548         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3549
3550         /*
3551          * Force memory writes to complete before letting h/w
3552          * know there are new descriptors to fetch.  (Only
3553          * applicable for weak-ordered memory model archs,
3554          * such as IA-64).
3555          */
3556         wmb();
3557
3558         tx_ring->next_to_use = i;
3559         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3560 }
3561
3562 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3563                                  struct ixgbe_ring *tx_ring, int size)
3564 {
3565         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3566
3567         netif_stop_subqueue(netdev, tx_ring->queue_index);
3568         /* Herbert's original patch had:
3569          *  smp_mb__after_netif_stop_queue();
3570          * but since that doesn't exist yet, just open code it. */
3571         smp_mb();
3572
3573         /* We need to check again in a case another CPU has just
3574          * made room available. */
3575         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3576                 return -EBUSY;
3577
3578         /* A reprieve! - use start_queue because it doesn't call schedule */
3579         netif_start_subqueue(netdev, tx_ring->queue_index);
3580         ++adapter->restart_queue;
3581         return 0;
3582 }
3583
3584 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3585                               struct ixgbe_ring *tx_ring, int size)
3586 {
3587         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3588                 return 0;
3589         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3590 }
3591
3592 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3593 {
3594         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3595         struct ixgbe_ring *tx_ring;
3596         unsigned int first;
3597         unsigned int tx_flags = 0;
3598         u8 hdr_len = 0;
3599         int r_idx = 0, tso;
3600         int count = 0;
3601         unsigned int f;
3602
3603         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3604         tx_ring = &adapter->tx_ring[r_idx];
3605
3606         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3607                 tx_flags |= vlan_tx_tag_get(skb);
3608                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3609                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3610         }
3611         /* three things can cause us to need a context descriptor */
3612         if (skb_is_gso(skb) ||
3613             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3614             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3615                 count++;
3616
3617         count += TXD_USE_COUNT(skb_headlen(skb));
3618         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3619                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3620
3621         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3622                 adapter->tx_busy++;
3623                 return NETDEV_TX_BUSY;
3624         }
3625
3626         if (skb->protocol == htons(ETH_P_IP))
3627                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3628         first = tx_ring->next_to_use;
3629         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3630         if (tso < 0) {
3631                 dev_kfree_skb_any(skb);
3632                 return NETDEV_TX_OK;
3633         }
3634
3635         if (tso)
3636                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3637         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3638                  (skb->ip_summed == CHECKSUM_PARTIAL))
3639                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3640
3641         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3642                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3643                        skb->len, hdr_len);
3644
3645         netdev->trans_start = jiffies;
3646
3647         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3648
3649         return NETDEV_TX_OK;
3650 }
3651
3652 /**
3653  * ixgbe_get_stats - Get System Network Statistics
3654  * @netdev: network interface device structure
3655  *
3656  * Returns the address of the device statistics structure.
3657  * The statistics are actually updated from the timer callback.
3658  **/
3659 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3660 {
3661         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3662
3663         /* only return the current stats */
3664         return &adapter->net_stats;
3665 }
3666
3667 /**
3668  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3669  * @netdev: network interface device structure
3670  * @p: pointer to an address structure
3671  *
3672  * Returns 0 on success, negative on failure
3673  **/
3674 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3675 {
3676         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3677         struct ixgbe_hw *hw = &adapter->hw;
3678         struct sockaddr *addr = p;
3679
3680         if (!is_valid_ether_addr(addr->sa_data))
3681                 return -EADDRNOTAVAIL;
3682
3683         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3684         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3685
3686         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3687
3688         return 0;
3689 }
3690
3691 #ifdef CONFIG_NET_POLL_CONTROLLER
3692 /*
3693  * Polling 'interrupt' - used by things like netconsole to send skbs
3694  * without having to re-enable interrupts. It's not called while
3695  * the interrupt routine is executing.
3696  */
3697 static void ixgbe_netpoll(struct net_device *netdev)
3698 {
3699         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3700
3701         disable_irq(adapter->pdev->irq);
3702         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3703         ixgbe_intr(adapter->pdev->irq, netdev);
3704         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3705         enable_irq(adapter->pdev->irq);
3706 }
3707 #endif
3708
3709 /**
3710  * ixgbe_link_config - set up initial link with default speed and duplex
3711  * @hw: pointer to private hardware struct
3712  *
3713  * Returns 0 on success, negative on failure
3714  **/
3715 static int ixgbe_link_config(struct ixgbe_hw *hw)
3716 {
3717         u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3718
3719         /* must always autoneg for both 1G and 10G link */
3720         hw->mac.autoneg = true;
3721
3722         if ((hw->mac.type == ixgbe_mac_82598EB) &&
3723             (hw->phy.media_type == ixgbe_media_type_copper))
3724                 autoneg = IXGBE_LINK_SPEED_82598_AUTONEG;
3725
3726         return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3727 }
3728
3729 /**
3730  * ixgbe_probe - Device Initialization Routine
3731  * @pdev: PCI device information struct
3732  * @ent: entry in ixgbe_pci_tbl
3733  *
3734  * Returns 0 on success, negative on failure
3735  *
3736  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3737  * The OS initialization, configuring of the adapter private structure,
3738  * and a hardware reset occur.
3739  **/
3740 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3741                                  const struct pci_device_id *ent)
3742 {
3743         struct net_device *netdev;
3744         struct ixgbe_adapter *adapter = NULL;
3745         struct ixgbe_hw *hw;
3746         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3747         static int cards_found;
3748         int i, err, pci_using_dac;
3749         u16 link_status, link_speed, link_width;
3750         u32 part_num, eec;
3751
3752         err = pci_enable_device(pdev);
3753         if (err)
3754                 return err;
3755
3756         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3757             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3758                 pci_using_dac = 1;
3759         } else {
3760                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3761                 if (err) {
3762                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3763                         if (err) {
3764                                 dev_err(&pdev->dev, "No usable DMA "
3765                                         "configuration, aborting\n");
3766                                 goto err_dma;
3767                         }
3768                 }
3769                 pci_using_dac = 0;
3770         }
3771
3772         err = pci_request_regions(pdev, ixgbe_driver_name);
3773         if (err) {
3774                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3775                 goto err_pci_reg;
3776         }
3777
3778         pci_set_master(pdev);
3779         pci_save_state(pdev);
3780
3781         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3782         if (!netdev) {
3783                 err = -ENOMEM;
3784                 goto err_alloc_etherdev;
3785         }
3786
3787         SET_NETDEV_DEV(netdev, &pdev->dev);
3788
3789         pci_set_drvdata(pdev, netdev);
3790         adapter = netdev_priv(netdev);
3791
3792         adapter->netdev = netdev;
3793         adapter->pdev = pdev;
3794         hw = &adapter->hw;
3795         hw->back = adapter;
3796         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3797
3798         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3799                               pci_resource_len(pdev, 0));
3800         if (!hw->hw_addr) {
3801                 err = -EIO;
3802                 goto err_ioremap;
3803         }
3804
3805         for (i = 1; i <= 5; i++) {
3806                 if (pci_resource_len(pdev, i) == 0)
3807                         continue;
3808         }
3809
3810         netdev->open = &ixgbe_open;
3811         netdev->stop = &ixgbe_close;
3812         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3813         netdev->get_stats = &ixgbe_get_stats;
3814         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3815         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3816         netdev->set_mac_address = &ixgbe_set_mac;
3817         netdev->change_mtu = &ixgbe_change_mtu;
3818         ixgbe_set_ethtool_ops(netdev);
3819         netdev->tx_timeout = &ixgbe_tx_timeout;
3820         netdev->watchdog_timeo = 5 * HZ;
3821         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3822         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3823         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3824 #ifdef CONFIG_NET_POLL_CONTROLLER
3825         netdev->poll_controller = ixgbe_netpoll;
3826 #endif
3827         strcpy(netdev->name, pci_name(pdev));
3828
3829         adapter->bd_number = cards_found;
3830
3831         /* Setup hw api */
3832         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3833         hw->mac.type  = ii->mac;
3834
3835         /* EEPROM */
3836         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
3837         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
3838         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3839         if (!(eec & (1 << 8)))
3840                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
3841
3842         /* PHY */
3843         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
3844         /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3845
3846         err = ii->get_invariants(hw);
3847         if (err)
3848                 goto err_hw_init;
3849
3850         /* setup the private structure */
3851         err = ixgbe_sw_init(adapter);
3852         if (err)
3853                 goto err_sw_init;
3854
3855         /* reset_hw fills in the perm_addr as well */
3856         err = hw->mac.ops.reset_hw(hw);
3857         if (err) {
3858                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
3859                 goto err_sw_init;
3860         }
3861
3862         netdev->features = NETIF_F_SG |
3863                            NETIF_F_IP_CSUM |
3864                            NETIF_F_HW_VLAN_TX |
3865                            NETIF_F_HW_VLAN_RX |
3866                            NETIF_F_HW_VLAN_FILTER;
3867
3868         netdev->features |= NETIF_F_IPV6_CSUM;
3869         netdev->features |= NETIF_F_TSO;
3870         netdev->features |= NETIF_F_TSO6;
3871         netdev->features |= NETIF_F_LRO;
3872
3873         netdev->vlan_features |= NETIF_F_TSO;
3874         netdev->vlan_features |= NETIF_F_TSO6;
3875         netdev->vlan_features |= NETIF_F_IP_CSUM;
3876         netdev->vlan_features |= NETIF_F_SG;
3877
3878         if (pci_using_dac)
3879                 netdev->features |= NETIF_F_HIGHDMA;
3880
3881         /* make sure the EEPROM is good */
3882         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
3883                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3884                 err = -EIO;
3885                 goto err_eeprom;
3886         }
3887
3888         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3889         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3890
3891         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
3892                 dev_err(&pdev->dev, "invalid MAC address\n");
3893                 err = -EIO;
3894                 goto err_eeprom;
3895         }
3896
3897         init_timer(&adapter->watchdog_timer);
3898         adapter->watchdog_timer.function = &ixgbe_watchdog;
3899         adapter->watchdog_timer.data = (unsigned long)adapter;
3900
3901         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3902         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
3903
3904         err = ixgbe_init_interrupt_scheme(adapter);
3905         if (err)
3906                 goto err_sw_init;
3907
3908         /* print bus type/speed/width info */
3909         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3910         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3911         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3912         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
3913                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3914                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3915                  "Unknown"),
3916                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3917                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3918                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3919                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3920                  "Unknown"),
3921                 netdev->dev_addr);
3922         ixgbe_read_pba_num_generic(hw, &part_num);
3923         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3924                  hw->mac.type, hw->phy.type,
3925                  (part_num >> 8), (part_num & 0xff));
3926
3927         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3928                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3929                          "this card is not sufficient for optimal "
3930                          "performance.\n");
3931                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3932                          "PCI-Express slot is required.\n");
3933         }
3934
3935         /* reset the hardware with the new settings */
3936         hw->mac.ops.start_hw(hw);
3937
3938         /* link_config depends on start_hw being called at least once */
3939         err = ixgbe_link_config(hw);
3940         if (err) {
3941                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
3942                 goto err_register;
3943         }
3944
3945         netif_carrier_off(netdev);
3946         netif_tx_stop_all_queues(netdev);
3947
3948         ixgbe_napi_add_all(adapter);
3949
3950         strcpy(netdev->name, "eth%d");
3951         err = register_netdev(netdev);
3952         if (err)
3953                 goto err_register;
3954
3955 #ifdef CONFIG_IXGBE_DCA
3956         if (dca_add_requester(&pdev->dev) == 0) {
3957                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3958                 /* always use CB2 mode, difference is masked
3959                  * in the CB driver */
3960                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3961                 ixgbe_setup_dca(adapter);
3962         }
3963 #endif
3964
3965         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3966         cards_found++;
3967         return 0;
3968
3969 err_register:
3970         ixgbe_release_hw_control(adapter);
3971 err_hw_init:
3972 err_sw_init:
3973         ixgbe_reset_interrupt_capability(adapter);
3974 err_eeprom:
3975         iounmap(hw->hw_addr);
3976 err_ioremap:
3977         free_netdev(netdev);
3978 err_alloc_etherdev:
3979         pci_release_regions(pdev);
3980 err_pci_reg:
3981 err_dma:
3982         pci_disable_device(pdev);
3983         return err;
3984 }
3985
3986 /**
3987  * ixgbe_remove - Device Removal Routine
3988  * @pdev: PCI device information struct
3989  *
3990  * ixgbe_remove is called by the PCI subsystem to alert the driver
3991  * that it should release a PCI device.  The could be caused by a
3992  * Hot-Plug event, or because the driver is going to be removed from
3993  * memory.
3994  **/
3995 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3996 {
3997         struct net_device *netdev = pci_get_drvdata(pdev);
3998         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3999
4000         set_bit(__IXGBE_DOWN, &adapter->state);
4001         del_timer_sync(&adapter->watchdog_timer);
4002
4003         flush_scheduled_work();
4004
4005 #ifdef CONFIG_IXGBE_DCA
4006         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4007                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4008                 dca_remove_requester(&pdev->dev);
4009                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4010         }
4011
4012 #endif
4013         unregister_netdev(netdev);
4014
4015         ixgbe_reset_interrupt_capability(adapter);
4016
4017         ixgbe_release_hw_control(adapter);
4018
4019         iounmap(adapter->hw.hw_addr);
4020         pci_release_regions(pdev);
4021
4022         DPRINTK(PROBE, INFO, "complete\n");
4023         ixgbe_napi_del_all(adapter);
4024         kfree(adapter->tx_ring);
4025         kfree(adapter->rx_ring);
4026
4027         free_netdev(netdev);
4028
4029         pci_disable_device(pdev);
4030 }
4031
4032 /**
4033  * ixgbe_io_error_detected - called when PCI error is detected
4034  * @pdev: Pointer to PCI device
4035  * @state: The current pci connection state
4036  *
4037  * This function is called after a PCI bus error affecting
4038  * this device has been detected.
4039  */
4040 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4041                                                 pci_channel_state_t state)
4042 {
4043         struct net_device *netdev = pci_get_drvdata(pdev);
4044         struct ixgbe_adapter *adapter = netdev->priv;
4045
4046         netif_device_detach(netdev);
4047
4048         if (netif_running(netdev))
4049                 ixgbe_down(adapter);
4050         pci_disable_device(pdev);
4051
4052         /* Request a slot reset. */
4053         return PCI_ERS_RESULT_NEED_RESET;
4054 }
4055
4056 /**
4057  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4058  * @pdev: Pointer to PCI device
4059  *
4060  * Restart the card from scratch, as if from a cold-boot.
4061  */
4062 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4063 {
4064         struct net_device *netdev = pci_get_drvdata(pdev);
4065         struct ixgbe_adapter *adapter = netdev->priv;
4066
4067         if (pci_enable_device(pdev)) {
4068                 DPRINTK(PROBE, ERR,
4069                         "Cannot re-enable PCI device after reset.\n");
4070                 return PCI_ERS_RESULT_DISCONNECT;
4071         }
4072         pci_set_master(pdev);
4073         pci_restore_state(pdev);
4074
4075         pci_enable_wake(pdev, PCI_D3hot, 0);
4076         pci_enable_wake(pdev, PCI_D3cold, 0);
4077
4078         ixgbe_reset(adapter);
4079
4080         return PCI_ERS_RESULT_RECOVERED;
4081 }
4082
4083 /**
4084  * ixgbe_io_resume - called when traffic can start flowing again.
4085  * @pdev: Pointer to PCI device
4086  *
4087  * This callback is called when the error recovery driver tells us that
4088  * its OK to resume normal operation.
4089  */
4090 static void ixgbe_io_resume(struct pci_dev *pdev)
4091 {
4092         struct net_device *netdev = pci_get_drvdata(pdev);
4093         struct ixgbe_adapter *adapter = netdev->priv;
4094
4095         if (netif_running(netdev)) {
4096                 if (ixgbe_up(adapter)) {
4097                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4098                         return;
4099                 }
4100         }
4101
4102         netif_device_attach(netdev);
4103 }
4104
4105 static struct pci_error_handlers ixgbe_err_handler = {
4106         .error_detected = ixgbe_io_error_detected,
4107         .slot_reset = ixgbe_io_slot_reset,
4108         .resume = ixgbe_io_resume,
4109 };
4110
4111 static struct pci_driver ixgbe_driver = {
4112         .name     = ixgbe_driver_name,
4113         .id_table = ixgbe_pci_tbl,
4114         .probe    = ixgbe_probe,
4115         .remove   = __devexit_p(ixgbe_remove),
4116 #ifdef CONFIG_PM
4117         .suspend  = ixgbe_suspend,
4118         .resume   = ixgbe_resume,
4119 #endif
4120         .shutdown = ixgbe_shutdown,
4121         .err_handler = &ixgbe_err_handler
4122 };
4123
4124 /**
4125  * ixgbe_init_module - Driver Registration Routine
4126  *
4127  * ixgbe_init_module is the first routine called when the driver is
4128  * loaded. All it does is register with the PCI subsystem.
4129  **/
4130 static int __init ixgbe_init_module(void)
4131 {
4132         int ret;
4133         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4134                ixgbe_driver_string, ixgbe_driver_version);
4135
4136         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4137
4138 #ifdef CONFIG_IXGBE_DCA
4139         dca_register_notify(&dca_notifier);
4140 #endif
4141
4142         ret = pci_register_driver(&ixgbe_driver);
4143         return ret;
4144 }
4145
4146 module_init(ixgbe_init_module);
4147
4148 /**
4149  * ixgbe_exit_module - Driver Exit Cleanup Routine
4150  *
4151  * ixgbe_exit_module is called just before the driver is removed
4152  * from memory.
4153  **/
4154 static void __exit ixgbe_exit_module(void)
4155 {
4156 #ifdef CONFIG_IXGBE_DCA
4157         dca_unregister_notify(&dca_notifier);
4158 #endif
4159         pci_unregister_driver(&ixgbe_driver);
4160 }
4161
4162 #ifdef CONFIG_IXGBE_DCA
4163 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4164                             void *p)
4165 {
4166         int ret_val;
4167
4168         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4169                                          __ixgbe_notify_dca);
4170
4171         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4172 }
4173 #endif /* CONFIG_IXGBE_DCA */
4174
4175 module_exit(ixgbe_exit_module);
4176
4177 /* ixgbe_main.c */