ixgbe: remove obsolete irq_sem, add driver state checking code
[linux-2.6.git] / drivers / net / ixgbe / ixgbe_ethtool.c
1 /*******************************************************************************
2
3   Intel 10 Gigabit PCI Express Linux driver
4   Copyright(c) 1999 - 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   Linux NICS <linux.nics@intel.com>
24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for ixgbe */
30
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
38
39 #include "ixgbe.h"
40
41
42 #define IXGBE_ALL_RAR_ENTRIES 16
43
44 struct ixgbe_stats {
45         char stat_string[ETH_GSTRING_LEN];
46         int sizeof_stat;
47         int stat_offset;
48 };
49
50 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
51                       offsetof(struct ixgbe_adapter, m)
52 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
53         {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
54         {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
55         {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
56         {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
57         {"lsc_int", IXGBE_STAT(lsc_int)},
58         {"tx_busy", IXGBE_STAT(tx_busy)},
59         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
60         {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
61         {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
62         {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
63         {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
64         {"multicast", IXGBE_STAT(net_stats.multicast)},
65         {"broadcast", IXGBE_STAT(stats.bprc)},
66         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
67         {"collisions", IXGBE_STAT(net_stats.collisions)},
68         {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
69         {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
70         {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
71         {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
72         {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
73         {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
74         {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
75         {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
76         {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
77         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
78         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
79         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
80         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
81         {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
82         {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
83         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
84         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
85         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
86         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
87         {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
88         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
89         {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
90         {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
91         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
92         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
93 };
94
95 #define IXGBE_QUEUE_STATS_LEN \
96                 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
97                  ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
98                  (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
99 #define IXGBE_GLOBAL_STATS_LEN  ARRAY_SIZE(ixgbe_gstrings_stats)
100 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
101
102 static int ixgbe_get_settings(struct net_device *netdev,
103                               struct ethtool_cmd *ecmd)
104 {
105         struct ixgbe_adapter *adapter = netdev_priv(netdev);
106
107         ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
108         ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
109         ecmd->port = PORT_FIBRE;
110         ecmd->transceiver = XCVR_EXTERNAL;
111
112         if (netif_carrier_ok(adapter->netdev)) {
113                 ecmd->speed = SPEED_10000;
114                 ecmd->duplex = DUPLEX_FULL;
115         } else {
116                 ecmd->speed = -1;
117                 ecmd->duplex = -1;
118         }
119
120         ecmd->autoneg = AUTONEG_DISABLE;
121         return 0;
122 }
123
124 static int ixgbe_set_settings(struct net_device *netdev,
125                               struct ethtool_cmd *ecmd)
126 {
127         struct ixgbe_adapter *adapter = netdev_priv(netdev);
128
129         if (ecmd->autoneg == AUTONEG_ENABLE ||
130             ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)
131                 return -EINVAL;
132
133         if (netif_running(adapter->netdev)) {
134                 ixgbe_down(adapter);
135                 ixgbe_reset(adapter);
136                 ixgbe_up(adapter);
137         } else {
138                 ixgbe_reset(adapter);
139         }
140
141         return 0;
142 }
143
144 static void ixgbe_get_pauseparam(struct net_device *netdev,
145                                  struct ethtool_pauseparam *pause)
146 {
147         struct ixgbe_adapter *adapter = netdev_priv(netdev);
148         struct ixgbe_hw *hw = &adapter->hw;
149
150         pause->autoneg = AUTONEG_DISABLE;
151
152         if (hw->fc.type == ixgbe_fc_rx_pause) {
153                 pause->rx_pause = 1;
154         } else if (hw->fc.type == ixgbe_fc_tx_pause) {
155                 pause->tx_pause = 1;
156         } else if (hw->fc.type == ixgbe_fc_full) {
157                 pause->rx_pause = 1;
158                 pause->tx_pause = 1;
159         }
160 }
161
162 static int ixgbe_set_pauseparam(struct net_device *netdev,
163                                 struct ethtool_pauseparam *pause)
164 {
165         struct ixgbe_adapter *adapter = netdev_priv(netdev);
166         struct ixgbe_hw *hw = &adapter->hw;
167
168         if (pause->autoneg == AUTONEG_ENABLE)
169                 return -EINVAL;
170
171         if (pause->rx_pause && pause->tx_pause)
172                 hw->fc.type = ixgbe_fc_full;
173         else if (pause->rx_pause && !pause->tx_pause)
174                 hw->fc.type = ixgbe_fc_rx_pause;
175         else if (!pause->rx_pause && pause->tx_pause)
176                 hw->fc.type = ixgbe_fc_tx_pause;
177         else if (!pause->rx_pause && !pause->tx_pause)
178                 hw->fc.type = ixgbe_fc_none;
179
180         hw->fc.original_type = hw->fc.type;
181
182         if (netif_running(netdev))
183                 ixgbe_reinit_locked(adapter);
184         else
185                 ixgbe_reset(adapter);
186
187         return 0;
188 }
189
190 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
191 {
192         struct ixgbe_adapter *adapter = netdev_priv(netdev);
193         return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
194 }
195
196 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
197 {
198         struct ixgbe_adapter *adapter = netdev_priv(netdev);
199         if (data)
200                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
201         else
202                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
203
204         if (netif_running(netdev))
205                 ixgbe_reinit_locked(adapter);
206         else
207                 ixgbe_reset(adapter);
208
209         return 0;
210 }
211
212 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
213 {
214         return (netdev->features & NETIF_F_HW_CSUM) != 0;
215 }
216
217 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
218 {
219         if (data)
220                 netdev->features |= NETIF_F_HW_CSUM;
221         else
222                 netdev->features &= ~NETIF_F_HW_CSUM;
223
224         return 0;
225 }
226
227 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
228 {
229
230         if (data) {
231                 netdev->features |= NETIF_F_TSO;
232                 netdev->features |= NETIF_F_TSO6;
233         } else {
234                 netdev->features &= ~NETIF_F_TSO;
235                 netdev->features &= ~NETIF_F_TSO6;
236         }
237         return 0;
238 }
239
240 static u32 ixgbe_get_msglevel(struct net_device *netdev)
241 {
242         struct ixgbe_adapter *adapter = netdev_priv(netdev);
243         return adapter->msg_enable;
244 }
245
246 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
247 {
248         struct ixgbe_adapter *adapter = netdev_priv(netdev);
249         adapter->msg_enable = data;
250 }
251
252 static int ixgbe_get_regs_len(struct net_device *netdev)
253 {
254 #define IXGBE_REGS_LEN  1128
255         return IXGBE_REGS_LEN * sizeof(u32);
256 }
257
258 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
259
260 static void ixgbe_get_regs(struct net_device *netdev,
261                            struct ethtool_regs *regs, void *p)
262 {
263         struct ixgbe_adapter *adapter = netdev_priv(netdev);
264         struct ixgbe_hw *hw = &adapter->hw;
265         u32 *regs_buff = p;
266         u8 i;
267
268         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
269
270         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
271
272         /* General Registers */
273         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
274         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
275         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
276         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
277         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
278         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
279         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
280         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
281
282         /* NVM Register */
283         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
284         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
285         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
286         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
287         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
288         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
289         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
290         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
291         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
292         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
293
294         /* Interrupt */
295         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
296         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
297         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
298         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
299         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
300         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
301         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
302         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
303         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
304         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
305         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL);
306         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
307
308         /* Flow Control */
309         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
310         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
311         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
312         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
313         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
314         for (i = 0; i < 8; i++)
315                 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
316         for (i = 0; i < 8; i++)
317                 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
318         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
319         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
320
321         /* Receive DMA */
322         for (i = 0; i < 64; i++)
323                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
324         for (i = 0; i < 64; i++)
325                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
326         for (i = 0; i < 64; i++)
327                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
328         for (i = 0; i < 64; i++)
329                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
330         for (i = 0; i < 64; i++)
331                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
332         for (i = 0; i < 64; i++)
333                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
334         for (i = 0; i < 16; i++)
335                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
336         for (i = 0; i < 16; i++)
337                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
338         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
339         for (i = 0; i < 8; i++)
340                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
341         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
342         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
343
344         /* Receive */
345         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
346         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
347         for (i = 0; i < 16; i++)
348                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
349         for (i = 0; i < 16; i++)
350                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
351         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE);
352         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
353         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
354         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
355         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
356         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
357         for (i = 0; i < 8; i++)
358                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
359         for (i = 0; i < 8; i++)
360                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
361         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
362
363         /* Transmit */
364         for (i = 0; i < 32; i++)
365                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
366         for (i = 0; i < 32; i++)
367                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
368         for (i = 0; i < 32; i++)
369                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
370         for (i = 0; i < 32; i++)
371                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
372         for (i = 0; i < 32; i++)
373                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
374         for (i = 0; i < 32; i++)
375                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
376         for (i = 0; i < 32; i++)
377                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
378         for (i = 0; i < 32; i++)
379                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
380         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
381         for (i = 0; i < 16; i++)
382                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
383         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
384         for (i = 0; i < 8; i++)
385                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
386         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
387
388         /* Wake Up */
389         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
390         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
391         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
392         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
393         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
394         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
395         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
396         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
397         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
398
399         /* DCE */
400         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
401         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
402         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
403         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
404         for (i = 0; i < 8; i++)
405                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
406         for (i = 0; i < 8; i++)
407                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
408         for (i = 0; i < 8; i++)
409                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
410         for (i = 0; i < 8; i++)
411                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
412         for (i = 0; i < 8; i++)
413                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
414         for (i = 0; i < 8; i++)
415                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
416
417         /* Statistics */
418         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
419         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
420         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
421         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
422         for (i = 0; i < 8; i++)
423                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
424         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
425         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
426         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
427         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
428         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
429         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
430         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
431         for (i = 0; i < 8; i++)
432                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
433         for (i = 0; i < 8; i++)
434                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
435         for (i = 0; i < 8; i++)
436                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
437         for (i = 0; i < 8; i++)
438                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
439         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
440         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
441         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
442         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
443         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
444         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
445         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
446         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
447         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
448         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
449         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
450         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
451         for (i = 0; i < 8; i++)
452                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
453         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
454         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
455         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
456         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
457         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
458         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
459         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
460         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
461         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
462         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
463         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
464         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
465         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
466         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
467         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
468         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
469         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
470         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
471         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
472         for (i = 0; i < 16; i++)
473                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
474         for (i = 0; i < 16; i++)
475                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
476         for (i = 0; i < 16; i++)
477                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
478         for (i = 0; i < 16; i++)
479                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
480
481         /* MAC */
482         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
483         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
484         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
485         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
486         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
487         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
488         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
489         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
490         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
491         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
492         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
493         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
494         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
495         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
496         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
497         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
498         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
499         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
500         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
501         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
502         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
503         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
504         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
505         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
506         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
507         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
508         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
509         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
510         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
511         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
512         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
513         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
514         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
515
516         /* Diagnostic */
517         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
518         for (i = 0; i < 8; i++)
519                 regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
520         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
521         regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
522         regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
523         regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
524         regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
525         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
526         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
527         for (i = 0; i < 8; i++)
528                 regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
529         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
530         regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
531         regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
532         regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
533         regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
534         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
535         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
536         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
537         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
538         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
539         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
540         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
541         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
542         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
543         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
544         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
545         for (i = 0; i < 8; i++)
546                 regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
547         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
548         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
549         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
550         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
551         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
552         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
553         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
554         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
555         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
556 }
557
558 static int ixgbe_get_eeprom_len(struct net_device *netdev)
559 {
560         struct ixgbe_adapter *adapter = netdev_priv(netdev);
561         return adapter->hw.eeprom.word_size * 2;
562 }
563
564 static int ixgbe_get_eeprom(struct net_device *netdev,
565                             struct ethtool_eeprom *eeprom, u8 *bytes)
566 {
567         struct ixgbe_adapter *adapter = netdev_priv(netdev);
568         struct ixgbe_hw *hw = &adapter->hw;
569         u16 *eeprom_buff;
570         int first_word, last_word, eeprom_len;
571         int ret_val = 0;
572         u16 i;
573
574         if (eeprom->len == 0)
575                 return -EINVAL;
576
577         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
578
579         first_word = eeprom->offset >> 1;
580         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
581         eeprom_len = last_word - first_word + 1;
582
583         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
584         if (!eeprom_buff)
585                 return -ENOMEM;
586
587         for (i = 0; i < eeprom_len; i++) {
588                 if ((ret_val = ixgbe_read_eeprom(hw, first_word + i,
589                                                  &eeprom_buff[i])))
590                         break;
591         }
592
593         /* Device's eeprom is always little-endian, word addressable */
594         for (i = 0; i < eeprom_len; i++)
595                 le16_to_cpus(&eeprom_buff[i]);
596
597         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
598         kfree(eeprom_buff);
599
600         return ret_val;
601 }
602
603 static void ixgbe_get_drvinfo(struct net_device *netdev,
604                               struct ethtool_drvinfo *drvinfo)
605 {
606         struct ixgbe_adapter *adapter = netdev_priv(netdev);
607
608         strncpy(drvinfo->driver, ixgbe_driver_name, 32);
609         strncpy(drvinfo->version, ixgbe_driver_version, 32);
610         strncpy(drvinfo->fw_version, "N/A", 32);
611         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
612         drvinfo->n_stats = IXGBE_STATS_LEN;
613         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
614 }
615
616 static void ixgbe_get_ringparam(struct net_device *netdev,
617                                 struct ethtool_ringparam *ring)
618 {
619         struct ixgbe_adapter *adapter = netdev_priv(netdev);
620         struct ixgbe_ring *tx_ring = adapter->tx_ring;
621         struct ixgbe_ring *rx_ring = adapter->rx_ring;
622
623         ring->rx_max_pending = IXGBE_MAX_RXD;
624         ring->tx_max_pending = IXGBE_MAX_TXD;
625         ring->rx_mini_max_pending = 0;
626         ring->rx_jumbo_max_pending = 0;
627         ring->rx_pending = rx_ring->count;
628         ring->tx_pending = tx_ring->count;
629         ring->rx_mini_pending = 0;
630         ring->rx_jumbo_pending = 0;
631 }
632
633 static int ixgbe_set_ringparam(struct net_device *netdev,
634                                struct ethtool_ringparam *ring)
635 {
636         struct ixgbe_adapter *adapter = netdev_priv(netdev);
637         struct ixgbe_tx_buffer *old_buf;
638         struct ixgbe_rx_buffer *old_rx_buf;
639         void *old_desc;
640         int i, err;
641         u32 new_rx_count, new_tx_count, old_size;
642         dma_addr_t old_dma;
643
644         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
645                 return -EINVAL;
646
647         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
648         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
649         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
650
651         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
652         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
653         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
654
655         if ((new_tx_count == adapter->tx_ring->count) &&
656             (new_rx_count == adapter->rx_ring->count)) {
657                 /* nothing to do */
658                 return 0;
659         }
660
661         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
662                 msleep(1);
663
664         if (netif_running(netdev))
665                 ixgbe_down(adapter);
666
667         /*
668          * We can't just free everything and then setup again,
669          * because the ISRs in MSI-X mode get passed pointers
670          * to the tx and rx ring structs.
671          */
672         if (new_tx_count != adapter->tx_ring->count) {
673                 for (i = 0; i < adapter->num_tx_queues; i++) {
674                         /* Save existing descriptor ring */
675                         old_buf = adapter->tx_ring[i].tx_buffer_info;
676                         old_desc = adapter->tx_ring[i].desc;
677                         old_size = adapter->tx_ring[i].size;
678                         old_dma = adapter->tx_ring[i].dma;
679                         /* Try to allocate a new one */
680                         adapter->tx_ring[i].tx_buffer_info = NULL;
681                         adapter->tx_ring[i].desc = NULL;
682                         adapter->tx_ring[i].count = new_tx_count;
683                         err = ixgbe_setup_tx_resources(adapter,
684                                                        &adapter->tx_ring[i]);
685                         if (err) {
686                                 /* Restore the old one so at least
687                                    the adapter still works, even if
688                                    we failed the request */
689                                 adapter->tx_ring[i].tx_buffer_info = old_buf;
690                                 adapter->tx_ring[i].desc = old_desc;
691                                 adapter->tx_ring[i].size = old_size;
692                                 adapter->tx_ring[i].dma = old_dma;
693                                 goto err_setup;
694                         }
695                         /* Free the old buffer manually */
696                         vfree(old_buf);
697                         pci_free_consistent(adapter->pdev, old_size,
698                                             old_desc, old_dma);
699                 }
700         }
701
702         if (new_rx_count != adapter->rx_ring->count) {
703                 for (i = 0; i < adapter->num_rx_queues; i++) {
704
705                         old_rx_buf = adapter->rx_ring[i].rx_buffer_info;
706                         old_desc = adapter->rx_ring[i].desc;
707                         old_size = adapter->rx_ring[i].size;
708                         old_dma = adapter->rx_ring[i].dma;
709
710                         adapter->rx_ring[i].rx_buffer_info = NULL;
711                         adapter->rx_ring[i].desc = NULL;
712                         adapter->rx_ring[i].dma = 0;
713                         adapter->rx_ring[i].count = new_rx_count;
714                         err = ixgbe_setup_rx_resources(adapter,
715                                                        &adapter->rx_ring[i]);
716                         if (err) {
717                                 adapter->rx_ring[i].rx_buffer_info = old_rx_buf;
718                                 adapter->rx_ring[i].desc = old_desc;
719                                 adapter->rx_ring[i].size = old_size;
720                                 adapter->rx_ring[i].dma = old_dma;
721                                 goto err_setup;
722                         }
723
724                         vfree(old_rx_buf);
725                         pci_free_consistent(adapter->pdev, old_size, old_desc,
726                                             old_dma);
727                 }
728         }
729
730         err = 0;
731 err_setup:
732         if (netif_running(adapter->netdev))
733                 ixgbe_up(adapter);
734
735         clear_bit(__IXGBE_RESETTING, &adapter->state);
736         return err;
737 }
738
739 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
740 {
741         switch (sset) {
742         case ETH_SS_STATS:
743                 return IXGBE_STATS_LEN;
744         default:
745                 return -EOPNOTSUPP;
746         }
747 }
748
749 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
750                                     struct ethtool_stats *stats, u64 *data)
751 {
752         struct ixgbe_adapter *adapter = netdev_priv(netdev);
753         u64 *queue_stat;
754         int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
755         int j, k;
756         int i;
757
758         ixgbe_update_stats(adapter);
759         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
760                 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
761                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
762                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
763         }
764         for (j = 0; j < adapter->num_tx_queues; j++) {
765                 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
766                 for (k = 0; k < stat_count; k++)
767                         data[i + k] = queue_stat[k];
768                 i += k;
769         }
770         for (j = 0; j < adapter->num_rx_queues; j++) {
771                 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
772                 for (k = 0; k < stat_count; k++)
773                         data[i + k] = queue_stat[k];
774                 i += k;
775         }
776 }
777
778 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
779                               u8 *data)
780 {
781         struct ixgbe_adapter *adapter = netdev_priv(netdev);
782         u8 *p = data;
783         int i;
784
785         switch (stringset) {
786         case ETH_SS_STATS:
787                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
788                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
789                                ETH_GSTRING_LEN);
790                         p += ETH_GSTRING_LEN;
791                 }
792                 for (i = 0; i < adapter->num_tx_queues; i++) {
793                         sprintf(p, "tx_queue_%u_packets", i);
794                         p += ETH_GSTRING_LEN;
795                         sprintf(p, "tx_queue_%u_bytes", i);
796                         p += ETH_GSTRING_LEN;
797                 }
798                 for (i = 0; i < adapter->num_rx_queues; i++) {
799                         sprintf(p, "rx_queue_%u_packets", i);
800                         p += ETH_GSTRING_LEN;
801                         sprintf(p, "rx_queue_%u_bytes", i);
802                         p += ETH_GSTRING_LEN;
803                 }
804 /*              BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
805                 break;
806         }
807 }
808
809
810 static void ixgbe_get_wol(struct net_device *netdev,
811                           struct ethtool_wolinfo *wol)
812 {
813         wol->supported = 0;
814         wol->wolopts = 0;
815
816         return;
817 }
818
819 static int ixgbe_nway_reset(struct net_device *netdev)
820 {
821         struct ixgbe_adapter *adapter = netdev_priv(netdev);
822
823         if (netif_running(netdev))
824                 ixgbe_reinit_locked(adapter);
825
826         return 0;
827 }
828
829 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
830 {
831         struct ixgbe_adapter *adapter = netdev_priv(netdev);
832         u32 led_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_LEDCTL);
833         u32 i;
834
835         if (!data || data > 300)
836                 data = 300;
837
838         for (i = 0; i < (data * 1000); i += 400) {
839                 ixgbe_led_on(&adapter->hw, IXGBE_LED_ON);
840                 msleep_interruptible(200);
841                 ixgbe_led_off(&adapter->hw, IXGBE_LED_ON);
842                 msleep_interruptible(200);
843         }
844
845         /* Restore LED settings */
846         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
847
848         return 0;
849 }
850
851 static int ixgbe_get_coalesce(struct net_device *netdev,
852                               struct ethtool_coalesce *ec)
853 {
854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
855
856         if (adapter->rx_eitr == 0)
857                 ec->rx_coalesce_usecs = 0;
858         else
859                 ec->rx_coalesce_usecs = 1000000 / adapter->rx_eitr;
860
861         if (adapter->tx_eitr == 0)
862                 ec->tx_coalesce_usecs = 0;
863         else
864                 ec->tx_coalesce_usecs = 1000000 / adapter->tx_eitr;
865
866         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
867         return 0;
868 }
869
870 static int ixgbe_set_coalesce(struct net_device *netdev,
871                               struct ethtool_coalesce *ec)
872 {
873         struct ixgbe_adapter *adapter = netdev_priv(netdev);
874
875         if ((ec->rx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
876             ((ec->rx_coalesce_usecs > 0) &&
877              (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
878                 return -EINVAL;
879         if ((ec->tx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
880             ((ec->tx_coalesce_usecs > 0) &&
881              (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
882                 return -EINVAL;
883
884         /* convert to rate of irq's per second */
885         if (ec->rx_coalesce_usecs == 0)
886                 adapter->rx_eitr = 0;
887         else
888                 adapter->rx_eitr = (1000000 / ec->rx_coalesce_usecs);
889
890         if (ec->tx_coalesce_usecs == 0)
891                 adapter->tx_eitr = 0;
892         else
893                 adapter->tx_eitr = (1000000 / ec->tx_coalesce_usecs);
894
895         if (ec->tx_max_coalesced_frames_irq)
896                 adapter->tx_ring[0].work_limit =
897                                         ec->tx_max_coalesced_frames_irq;
898
899         if (netif_running(netdev)) {
900                 ixgbe_down(adapter);
901                 ixgbe_up(adapter);
902         }
903
904         return 0;
905 }
906
907
908 static struct ethtool_ops ixgbe_ethtool_ops = {
909         .get_settings           = ixgbe_get_settings,
910         .set_settings           = ixgbe_set_settings,
911         .get_drvinfo            = ixgbe_get_drvinfo,
912         .get_regs_len           = ixgbe_get_regs_len,
913         .get_regs               = ixgbe_get_regs,
914         .get_wol                = ixgbe_get_wol,
915         .nway_reset             = ixgbe_nway_reset,
916         .get_link               = ethtool_op_get_link,
917         .get_eeprom_len         = ixgbe_get_eeprom_len,
918         .get_eeprom             = ixgbe_get_eeprom,
919         .get_ringparam          = ixgbe_get_ringparam,
920         .set_ringparam          = ixgbe_set_ringparam,
921         .get_pauseparam         = ixgbe_get_pauseparam,
922         .set_pauseparam         = ixgbe_set_pauseparam,
923         .get_rx_csum            = ixgbe_get_rx_csum,
924         .set_rx_csum            = ixgbe_set_rx_csum,
925         .get_tx_csum            = ixgbe_get_tx_csum,
926         .set_tx_csum            = ixgbe_set_tx_csum,
927         .get_sg                 = ethtool_op_get_sg,
928         .set_sg                 = ethtool_op_set_sg,
929         .get_msglevel           = ixgbe_get_msglevel,
930         .set_msglevel           = ixgbe_set_msglevel,
931         .get_tso                = ethtool_op_get_tso,
932         .set_tso                = ixgbe_set_tso,
933         .get_strings            = ixgbe_get_strings,
934         .phys_id                = ixgbe_phys_id,
935         .get_sset_count         = ixgbe_get_sset_count,
936         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
937         .get_coalesce           = ixgbe_get_coalesce,
938         .set_coalesce           = ixgbe_set_coalesce,
939 };
940
941 void ixgbe_set_ethtool_ops(struct net_device *netdev)
942 {
943         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
944 }