ixgbe: Introduce Multiqueue TX
[linux-2.6.git] / drivers / net / ixgbe / ixgbe_ethtool.c
1 /*******************************************************************************
2
3   Intel 10 Gigabit PCI Express Linux driver
4   Copyright(c) 1999 - 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   Linux NICS <linux.nics@intel.com>
24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for ixgbe */
30
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
38
39 #include "ixgbe.h"
40
41
42 #define IXGBE_ALL_RAR_ENTRIES 16
43
44 struct ixgbe_stats {
45         char stat_string[ETH_GSTRING_LEN];
46         int sizeof_stat;
47         int stat_offset;
48 };
49
50 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
51                       offsetof(struct ixgbe_adapter, m)
52 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
53         {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
54         {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
55         {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
56         {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
57         {"lsc_int", IXGBE_STAT(lsc_int)},
58         {"tx_busy", IXGBE_STAT(tx_busy)},
59         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
60         {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
61         {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
62         {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
63         {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
64         {"multicast", IXGBE_STAT(net_stats.multicast)},
65         {"broadcast", IXGBE_STAT(stats.bprc)},
66         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
67         {"collisions", IXGBE_STAT(net_stats.collisions)},
68         {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
69         {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
70         {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
71         {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
72         {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
73         {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
74         {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
75         {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
76         {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
77         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
78         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
79         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
80         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
81         {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
82         {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
83         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
84         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
85         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
86         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
87         {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
88         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
89         {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
90         {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
91         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
92         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
93 };
94
95 #define IXGBE_QUEUE_STATS_LEN \
96                 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
97                  ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
98                  (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
99 #define IXGBE_GLOBAL_STATS_LEN  ARRAY_SIZE(ixgbe_gstrings_stats)
100 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
101
102 static int ixgbe_get_settings(struct net_device *netdev,
103                               struct ethtool_cmd *ecmd)
104 {
105         struct ixgbe_adapter *adapter = netdev_priv(netdev);
106         struct ixgbe_hw *hw = &adapter->hw;
107         u32 link_speed = 0;
108         bool link_up;
109
110         ecmd->supported = SUPPORTED_10000baseT_Full;
111         ecmd->autoneg = AUTONEG_ENABLE;
112         ecmd->transceiver = XCVR_EXTERNAL;
113         if (hw->phy.media_type == ixgbe_media_type_copper) {
114                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
115                                     SUPPORTED_TP | SUPPORTED_Autoneg);
116
117                 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
118                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
119                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
120                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
121                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
122
123                 ecmd->port = PORT_TP;
124         } else {
125                 ecmd->supported |= SUPPORTED_FIBRE;
126                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
127                                      ADVERTISED_FIBRE);
128                 ecmd->port = PORT_FIBRE;
129         }
130
131         adapter->hw.mac.ops.check_link(hw, &(link_speed), &link_up);
132         if (link_up) {
133                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
134                                 SPEED_10000 : SPEED_1000;
135                 ecmd->duplex = DUPLEX_FULL;
136         } else {
137                 ecmd->speed = -1;
138                 ecmd->duplex = -1;
139         }
140
141         return 0;
142 }
143
144 static int ixgbe_set_settings(struct net_device *netdev,
145                               struct ethtool_cmd *ecmd)
146 {
147         struct ixgbe_adapter *adapter = netdev_priv(netdev);
148         struct ixgbe_hw *hw = &adapter->hw;
149
150         switch (hw->phy.media_type) {
151         case ixgbe_media_type_fiber:
152                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
153                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
154                         return -EINVAL;
155                 /* in this case we currently only support 10Gb/FULL */
156                 break;
157         default:
158                 break;
159         }
160
161         return 0;
162 }
163
164 static void ixgbe_get_pauseparam(struct net_device *netdev,
165                                  struct ethtool_pauseparam *pause)
166 {
167         struct ixgbe_adapter *adapter = netdev_priv(netdev);
168         struct ixgbe_hw *hw = &adapter->hw;
169
170         pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
171
172         if (hw->fc.type == ixgbe_fc_rx_pause) {
173                 pause->rx_pause = 1;
174         } else if (hw->fc.type == ixgbe_fc_tx_pause) {
175                 pause->tx_pause = 1;
176         } else if (hw->fc.type == ixgbe_fc_full) {
177                 pause->rx_pause = 1;
178                 pause->tx_pause = 1;
179         }
180 }
181
182 static int ixgbe_set_pauseparam(struct net_device *netdev,
183                                 struct ethtool_pauseparam *pause)
184 {
185         struct ixgbe_adapter *adapter = netdev_priv(netdev);
186         struct ixgbe_hw *hw = &adapter->hw;
187
188         if ((pause->autoneg == AUTONEG_ENABLE) ||
189             (pause->rx_pause && pause->tx_pause))
190                 hw->fc.type = ixgbe_fc_full;
191         else if (pause->rx_pause && !pause->tx_pause)
192                 hw->fc.type = ixgbe_fc_rx_pause;
193         else if (!pause->rx_pause && pause->tx_pause)
194                 hw->fc.type = ixgbe_fc_tx_pause;
195         else if (!pause->rx_pause && !pause->tx_pause)
196                 hw->fc.type = ixgbe_fc_none;
197         else
198                 return -EINVAL;
199
200         hw->fc.original_type = hw->fc.type;
201
202         if (netif_running(netdev))
203                 ixgbe_reinit_locked(adapter);
204         else
205                 ixgbe_reset(adapter);
206
207         return 0;
208 }
209
210 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
211 {
212         struct ixgbe_adapter *adapter = netdev_priv(netdev);
213         return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
214 }
215
216 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
217 {
218         struct ixgbe_adapter *adapter = netdev_priv(netdev);
219         if (data)
220                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
221         else
222                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
223
224         if (netif_running(netdev))
225                 ixgbe_reinit_locked(adapter);
226         else
227                 ixgbe_reset(adapter);
228
229         return 0;
230 }
231
232 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
233 {
234         return (netdev->features & NETIF_F_HW_CSUM) != 0;
235 }
236
237 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
238 {
239         if (data)
240                 netdev->features |= NETIF_F_HW_CSUM;
241         else
242                 netdev->features &= ~NETIF_F_HW_CSUM;
243
244         return 0;
245 }
246
247 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
248 {
249         if (data) {
250                 netdev->features |= NETIF_F_TSO;
251                 netdev->features |= NETIF_F_TSO6;
252         } else {
253 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
254                 struct ixgbe_adapter *adapter = netdev_priv(netdev);
255                 int i;
256 #endif
257                 netif_stop_queue(netdev);
258 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
259                 for (i = 0; i < adapter->num_tx_queues; i++)
260                         netif_stop_subqueue(netdev, i);
261 #endif
262                 netdev->features &= ~NETIF_F_TSO;
263                 netdev->features &= ~NETIF_F_TSO6;
264 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
265                 for (i = 0; i < adapter->num_tx_queues; i++)
266                         netif_start_subqueue(netdev, i);
267 #endif
268                 netif_start_queue(netdev);
269         }
270         return 0;
271 }
272
273 static u32 ixgbe_get_msglevel(struct net_device *netdev)
274 {
275         struct ixgbe_adapter *adapter = netdev_priv(netdev);
276         return adapter->msg_enable;
277 }
278
279 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
280 {
281         struct ixgbe_adapter *adapter = netdev_priv(netdev);
282         adapter->msg_enable = data;
283 }
284
285 static int ixgbe_get_regs_len(struct net_device *netdev)
286 {
287 #define IXGBE_REGS_LEN  1128
288         return IXGBE_REGS_LEN * sizeof(u32);
289 }
290
291 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
292
293 static void ixgbe_get_regs(struct net_device *netdev,
294                            struct ethtool_regs *regs, void *p)
295 {
296         struct ixgbe_adapter *adapter = netdev_priv(netdev);
297         struct ixgbe_hw *hw = &adapter->hw;
298         u32 *regs_buff = p;
299         u8 i;
300
301         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
302
303         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
304
305         /* General Registers */
306         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
307         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
308         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
309         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
310         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
311         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
312         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
313         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
314
315         /* NVM Register */
316         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
317         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
318         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
319         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
320         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
321         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
322         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
323         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
324         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
325         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
326
327         /* Interrupt */
328         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
329         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
330         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
331         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
332         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
333         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
334         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
335         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
336         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
337         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
338         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL);
339         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
340
341         /* Flow Control */
342         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
343         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
344         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
345         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
346         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
347         for (i = 0; i < 8; i++)
348                 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
349         for (i = 0; i < 8; i++)
350                 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
351         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
352         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
353
354         /* Receive DMA */
355         for (i = 0; i < 64; i++)
356                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
357         for (i = 0; i < 64; i++)
358                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
359         for (i = 0; i < 64; i++)
360                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
361         for (i = 0; i < 64; i++)
362                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
363         for (i = 0; i < 64; i++)
364                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
365         for (i = 0; i < 64; i++)
366                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
367         for (i = 0; i < 16; i++)
368                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
369         for (i = 0; i < 16; i++)
370                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
371         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
372         for (i = 0; i < 8; i++)
373                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
374         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
375         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
376
377         /* Receive */
378         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
379         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
380         for (i = 0; i < 16; i++)
381                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
382         for (i = 0; i < 16; i++)
383                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
384         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE);
385         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
386         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
387         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
388         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
389         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
390         for (i = 0; i < 8; i++)
391                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
392         for (i = 0; i < 8; i++)
393                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
394         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
395
396         /* Transmit */
397         for (i = 0; i < 32; i++)
398                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
399         for (i = 0; i < 32; i++)
400                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
401         for (i = 0; i < 32; i++)
402                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
403         for (i = 0; i < 32; i++)
404                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
405         for (i = 0; i < 32; i++)
406                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
407         for (i = 0; i < 32; i++)
408                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
409         for (i = 0; i < 32; i++)
410                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
411         for (i = 0; i < 32; i++)
412                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
413         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
414         for (i = 0; i < 16; i++)
415                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
416         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
417         for (i = 0; i < 8; i++)
418                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
419         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
420
421         /* Wake Up */
422         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
423         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
424         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
425         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
426         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
427         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
428         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
429         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
430         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
431
432         /* DCE */
433         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
434         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
435         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
436         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
437         for (i = 0; i < 8; i++)
438                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
439         for (i = 0; i < 8; i++)
440                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
441         for (i = 0; i < 8; i++)
442                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
443         for (i = 0; i < 8; i++)
444                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
445         for (i = 0; i < 8; i++)
446                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
447         for (i = 0; i < 8; i++)
448                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
449
450         /* Statistics */
451         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
452         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
453         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
454         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
455         for (i = 0; i < 8; i++)
456                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
457         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
458         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
459         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
460         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
461         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
462         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
463         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
464         for (i = 0; i < 8; i++)
465                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
466         for (i = 0; i < 8; i++)
467                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
468         for (i = 0; i < 8; i++)
469                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
470         for (i = 0; i < 8; i++)
471                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
472         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
473         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
474         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
475         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
476         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
477         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
478         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
479         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
480         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
481         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
482         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
483         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
484         for (i = 0; i < 8; i++)
485                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
486         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
487         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
488         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
489         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
490         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
491         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
492         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
493         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
494         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
495         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
496         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
497         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
498         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
499         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
500         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
501         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
502         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
503         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
504         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
505         for (i = 0; i < 16; i++)
506                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
507         for (i = 0; i < 16; i++)
508                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
509         for (i = 0; i < 16; i++)
510                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
511         for (i = 0; i < 16; i++)
512                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
513
514         /* MAC */
515         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
516         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
517         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
518         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
519         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
520         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
521         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
522         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
523         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
524         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
525         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
526         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
527         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
528         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
529         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
530         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
531         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
532         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
533         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
534         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
535         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
536         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
537         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
538         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
539         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
540         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
541         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
542         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
543         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
544         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
545         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
546         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
547         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
548
549         /* Diagnostic */
550         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
551         for (i = 0; i < 8; i++)
552                 regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
553         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
554         regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
555         regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
556         regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
557         regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
558         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
559         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
560         for (i = 0; i < 8; i++)
561                 regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
562         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
563         regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
564         regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
565         regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
566         regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
567         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
568         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
569         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
570         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
571         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
572         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
573         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
574         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
575         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
576         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
577         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
578         for (i = 0; i < 8; i++)
579                 regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
580         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
581         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
582         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
583         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
584         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
585         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
586         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
587         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
588         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
589 }
590
591 static int ixgbe_get_eeprom_len(struct net_device *netdev)
592 {
593         struct ixgbe_adapter *adapter = netdev_priv(netdev);
594         return adapter->hw.eeprom.word_size * 2;
595 }
596
597 static int ixgbe_get_eeprom(struct net_device *netdev,
598                             struct ethtool_eeprom *eeprom, u8 *bytes)
599 {
600         struct ixgbe_adapter *adapter = netdev_priv(netdev);
601         struct ixgbe_hw *hw = &adapter->hw;
602         u16 *eeprom_buff;
603         int first_word, last_word, eeprom_len;
604         int ret_val = 0;
605         u16 i;
606
607         if (eeprom->len == 0)
608                 return -EINVAL;
609
610         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
611
612         first_word = eeprom->offset >> 1;
613         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
614         eeprom_len = last_word - first_word + 1;
615
616         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
617         if (!eeprom_buff)
618                 return -ENOMEM;
619
620         for (i = 0; i < eeprom_len; i++) {
621                 if ((ret_val = ixgbe_read_eeprom(hw, first_word + i,
622                                                  &eeprom_buff[i])))
623                         break;
624         }
625
626         /* Device's eeprom is always little-endian, word addressable */
627         for (i = 0; i < eeprom_len; i++)
628                 le16_to_cpus(&eeprom_buff[i]);
629
630         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
631         kfree(eeprom_buff);
632
633         return ret_val;
634 }
635
636 static void ixgbe_get_drvinfo(struct net_device *netdev,
637                               struct ethtool_drvinfo *drvinfo)
638 {
639         struct ixgbe_adapter *adapter = netdev_priv(netdev);
640
641         strncpy(drvinfo->driver, ixgbe_driver_name, 32);
642         strncpy(drvinfo->version, ixgbe_driver_version, 32);
643         strncpy(drvinfo->fw_version, "N/A", 32);
644         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
645         drvinfo->n_stats = IXGBE_STATS_LEN;
646         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
647 }
648
649 static void ixgbe_get_ringparam(struct net_device *netdev,
650                                 struct ethtool_ringparam *ring)
651 {
652         struct ixgbe_adapter *adapter = netdev_priv(netdev);
653         struct ixgbe_ring *tx_ring = adapter->tx_ring;
654         struct ixgbe_ring *rx_ring = adapter->rx_ring;
655
656         ring->rx_max_pending = IXGBE_MAX_RXD;
657         ring->tx_max_pending = IXGBE_MAX_TXD;
658         ring->rx_mini_max_pending = 0;
659         ring->rx_jumbo_max_pending = 0;
660         ring->rx_pending = rx_ring->count;
661         ring->tx_pending = tx_ring->count;
662         ring->rx_mini_pending = 0;
663         ring->rx_jumbo_pending = 0;
664 }
665
666 static int ixgbe_set_ringparam(struct net_device *netdev,
667                                struct ethtool_ringparam *ring)
668 {
669         struct ixgbe_adapter *adapter = netdev_priv(netdev);
670         struct ixgbe_tx_buffer *old_buf;
671         struct ixgbe_rx_buffer *old_rx_buf;
672         void *old_desc;
673         int i, err;
674         u32 new_rx_count, new_tx_count, old_size;
675         dma_addr_t old_dma;
676
677         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
678                 return -EINVAL;
679
680         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
681         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
682         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
683
684         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
685         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
686         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
687
688         if ((new_tx_count == adapter->tx_ring->count) &&
689             (new_rx_count == adapter->rx_ring->count)) {
690                 /* nothing to do */
691                 return 0;
692         }
693
694         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
695                 msleep(1);
696
697         if (netif_running(netdev))
698                 ixgbe_down(adapter);
699
700         /*
701          * We can't just free everything and then setup again,
702          * because the ISRs in MSI-X mode get passed pointers
703          * to the tx and rx ring structs.
704          */
705         if (new_tx_count != adapter->tx_ring->count) {
706                 for (i = 0; i < adapter->num_tx_queues; i++) {
707                         /* Save existing descriptor ring */
708                         old_buf = adapter->tx_ring[i].tx_buffer_info;
709                         old_desc = adapter->tx_ring[i].desc;
710                         old_size = adapter->tx_ring[i].size;
711                         old_dma = adapter->tx_ring[i].dma;
712                         /* Try to allocate a new one */
713                         adapter->tx_ring[i].tx_buffer_info = NULL;
714                         adapter->tx_ring[i].desc = NULL;
715                         adapter->tx_ring[i].count = new_tx_count;
716                         err = ixgbe_setup_tx_resources(adapter,
717                                                        &adapter->tx_ring[i]);
718                         if (err) {
719                                 /* Restore the old one so at least
720                                    the adapter still works, even if
721                                    we failed the request */
722                                 adapter->tx_ring[i].tx_buffer_info = old_buf;
723                                 adapter->tx_ring[i].desc = old_desc;
724                                 adapter->tx_ring[i].size = old_size;
725                                 adapter->tx_ring[i].dma = old_dma;
726                                 goto err_setup;
727                         }
728                         /* Free the old buffer manually */
729                         vfree(old_buf);
730                         pci_free_consistent(adapter->pdev, old_size,
731                                             old_desc, old_dma);
732                 }
733         }
734
735         if (new_rx_count != adapter->rx_ring->count) {
736                 for (i = 0; i < adapter->num_rx_queues; i++) {
737
738                         old_rx_buf = adapter->rx_ring[i].rx_buffer_info;
739                         old_desc = adapter->rx_ring[i].desc;
740                         old_size = adapter->rx_ring[i].size;
741                         old_dma = adapter->rx_ring[i].dma;
742
743                         adapter->rx_ring[i].rx_buffer_info = NULL;
744                         adapter->rx_ring[i].desc = NULL;
745                         adapter->rx_ring[i].dma = 0;
746                         adapter->rx_ring[i].count = new_rx_count;
747                         err = ixgbe_setup_rx_resources(adapter,
748                                                        &adapter->rx_ring[i]);
749                         if (err) {
750                                 adapter->rx_ring[i].rx_buffer_info = old_rx_buf;
751                                 adapter->rx_ring[i].desc = old_desc;
752                                 adapter->rx_ring[i].size = old_size;
753                                 adapter->rx_ring[i].dma = old_dma;
754                                 goto err_setup;
755                         }
756
757                         vfree(old_rx_buf);
758                         pci_free_consistent(adapter->pdev, old_size, old_desc,
759                                             old_dma);
760                 }
761         }
762
763         err = 0;
764 err_setup:
765         if (netif_running(adapter->netdev))
766                 ixgbe_up(adapter);
767
768         clear_bit(__IXGBE_RESETTING, &adapter->state);
769         return err;
770 }
771
772 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
773 {
774         switch (sset) {
775         case ETH_SS_STATS:
776                 return IXGBE_STATS_LEN;
777         default:
778                 return -EOPNOTSUPP;
779         }
780 }
781
782 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
783                                     struct ethtool_stats *stats, u64 *data)
784 {
785         struct ixgbe_adapter *adapter = netdev_priv(netdev);
786         u64 *queue_stat;
787         int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
788         int j, k;
789         int i;
790
791         ixgbe_update_stats(adapter);
792         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
793                 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
794                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
795                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
796         }
797         for (j = 0; j < adapter->num_tx_queues; j++) {
798                 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
799                 for (k = 0; k < stat_count; k++)
800                         data[i + k] = queue_stat[k];
801                 i += k;
802         }
803         for (j = 0; j < adapter->num_rx_queues; j++) {
804                 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
805                 for (k = 0; k < stat_count; k++)
806                         data[i + k] = queue_stat[k];
807                 i += k;
808         }
809 }
810
811 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
812                               u8 *data)
813 {
814         struct ixgbe_adapter *adapter = netdev_priv(netdev);
815         u8 *p = data;
816         int i;
817
818         switch (stringset) {
819         case ETH_SS_STATS:
820                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
821                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
822                                ETH_GSTRING_LEN);
823                         p += ETH_GSTRING_LEN;
824                 }
825                 for (i = 0; i < adapter->num_tx_queues; i++) {
826                         sprintf(p, "tx_queue_%u_packets", i);
827                         p += ETH_GSTRING_LEN;
828                         sprintf(p, "tx_queue_%u_bytes", i);
829                         p += ETH_GSTRING_LEN;
830                 }
831                 for (i = 0; i < adapter->num_rx_queues; i++) {
832                         sprintf(p, "rx_queue_%u_packets", i);
833                         p += ETH_GSTRING_LEN;
834                         sprintf(p, "rx_queue_%u_bytes", i);
835                         p += ETH_GSTRING_LEN;
836                 }
837 /*              BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
838                 break;
839         }
840 }
841
842
843 static void ixgbe_get_wol(struct net_device *netdev,
844                           struct ethtool_wolinfo *wol)
845 {
846         wol->supported = 0;
847         wol->wolopts = 0;
848
849         return;
850 }
851
852 static int ixgbe_nway_reset(struct net_device *netdev)
853 {
854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
855
856         if (netif_running(netdev))
857                 ixgbe_reinit_locked(adapter);
858
859         return 0;
860 }
861
862 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
863 {
864         struct ixgbe_adapter *adapter = netdev_priv(netdev);
865         u32 led_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_LEDCTL);
866         u32 i;
867
868         if (!data || data > 300)
869                 data = 300;
870
871         for (i = 0; i < (data * 1000); i += 400) {
872                 ixgbe_led_on(&adapter->hw, IXGBE_LED_ON);
873                 msleep_interruptible(200);
874                 ixgbe_led_off(&adapter->hw, IXGBE_LED_ON);
875                 msleep_interruptible(200);
876         }
877
878         /* Restore LED settings */
879         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
880
881         return 0;
882 }
883
884 static int ixgbe_get_coalesce(struct net_device *netdev,
885                               struct ethtool_coalesce *ec)
886 {
887         struct ixgbe_adapter *adapter = netdev_priv(netdev);
888
889         if (adapter->rx_eitr == 0)
890                 ec->rx_coalesce_usecs = 0;
891         else
892                 ec->rx_coalesce_usecs = 1000000 / adapter->rx_eitr;
893
894         if (adapter->tx_eitr == 0)
895                 ec->tx_coalesce_usecs = 0;
896         else
897                 ec->tx_coalesce_usecs = 1000000 / adapter->tx_eitr;
898
899         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
900         return 0;
901 }
902
903 static int ixgbe_set_coalesce(struct net_device *netdev,
904                               struct ethtool_coalesce *ec)
905 {
906         struct ixgbe_adapter *adapter = netdev_priv(netdev);
907
908         if ((ec->rx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
909             ((ec->rx_coalesce_usecs > 0) &&
910              (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
911                 return -EINVAL;
912         if ((ec->tx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
913             ((ec->tx_coalesce_usecs > 0) &&
914              (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
915                 return -EINVAL;
916
917         /* convert to rate of irq's per second */
918         if (ec->rx_coalesce_usecs == 0)
919                 adapter->rx_eitr = 0;
920         else
921                 adapter->rx_eitr = (1000000 / ec->rx_coalesce_usecs);
922
923         if (ec->tx_coalesce_usecs == 0)
924                 adapter->tx_eitr = 0;
925         else
926                 adapter->tx_eitr = (1000000 / ec->tx_coalesce_usecs);
927
928         if (ec->tx_max_coalesced_frames_irq)
929                 adapter->tx_ring[0].work_limit =
930                                         ec->tx_max_coalesced_frames_irq;
931
932         if (netif_running(netdev)) {
933                 ixgbe_down(adapter);
934                 ixgbe_up(adapter);
935         }
936
937         return 0;
938 }
939
940
941 static struct ethtool_ops ixgbe_ethtool_ops = {
942         .get_settings           = ixgbe_get_settings,
943         .set_settings           = ixgbe_set_settings,
944         .get_drvinfo            = ixgbe_get_drvinfo,
945         .get_regs_len           = ixgbe_get_regs_len,
946         .get_regs               = ixgbe_get_regs,
947         .get_wol                = ixgbe_get_wol,
948         .nway_reset             = ixgbe_nway_reset,
949         .get_link               = ethtool_op_get_link,
950         .get_eeprom_len         = ixgbe_get_eeprom_len,
951         .get_eeprom             = ixgbe_get_eeprom,
952         .get_ringparam          = ixgbe_get_ringparam,
953         .set_ringparam          = ixgbe_set_ringparam,
954         .get_pauseparam         = ixgbe_get_pauseparam,
955         .set_pauseparam         = ixgbe_set_pauseparam,
956         .get_rx_csum            = ixgbe_get_rx_csum,
957         .set_rx_csum            = ixgbe_set_rx_csum,
958         .get_tx_csum            = ixgbe_get_tx_csum,
959         .set_tx_csum            = ixgbe_set_tx_csum,
960         .get_sg                 = ethtool_op_get_sg,
961         .set_sg                 = ethtool_op_set_sg,
962         .get_msglevel           = ixgbe_get_msglevel,
963         .set_msglevel           = ixgbe_set_msglevel,
964         .get_tso                = ethtool_op_get_tso,
965         .set_tso                = ixgbe_set_tso,
966         .get_strings            = ixgbe_get_strings,
967         .phys_id                = ixgbe_phys_id,
968         .get_sset_count         = ixgbe_get_sset_count,
969         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
970         .get_coalesce           = ixgbe_get_coalesce,
971         .set_coalesce           = ixgbe_set_coalesce,
972 };
973
974 void ixgbe_set_ethtool_ops(struct net_device *netdev)
975 {
976         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
977 }