ee5ab94124a1143386c17e66114789d017b8a356
[linux-2.6.git] / drivers / net / irda / smsc-ircc2.c
1 /*********************************************************************
2  * $Id: smsc-ircc2.c,v 1.19.2.5 2002/10/27 11:34:26 dip Exp $
3  *
4  * Description:   Driver for the SMC Infrared Communications Controller
5  * Status:        Experimental.
6  * Author:        Daniele Peri (peri@csai.unipa.it)
7  * Created at:
8  * Modified at:
9  * Modified by:
10  *
11  *     Copyright (c) 2002      Daniele Peri
12  *     All Rights Reserved.
13  *     Copyright (c) 2002      Jean Tourrilhes
14  *
15  *
16  * Based on smc-ircc.c:
17  *
18  *     Copyright (c) 2001      Stefani Seibold
19  *     Copyright (c) 1999-2001 Dag Brattli
20  *     Copyright (c) 1998-1999 Thomas Davis,
21  *
22  *      and irport.c:
23  *
24  *     Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
25  *
26  *
27  *     This program is free software; you can redistribute it and/or
28  *     modify it under the terms of the GNU General Public License as
29  *     published by the Free Software Foundation; either version 2 of
30  *     the License, or (at your option) any later version.
31  *
32  *     This program is distributed in the hope that it will be useful,
33  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
34  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
35  *     GNU General Public License for more details.
36  *
37  *     You should have received a copy of the GNU General Public License
38  *     along with this program; if not, write to the Free Software
39  *     Foundation, Inc., 59 Temple Place, Suite 330, Boston,
40  *     MA 02111-1307 USA
41  *
42  ********************************************************************/
43
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/types.h>
47 #include <linux/skbuff.h>
48 #include <linux/netdevice.h>
49 #include <linux/ioport.h>
50 #include <linux/delay.h>
51 #include <linux/slab.h>
52 #include <linux/init.h>
53 #include <linux/rtnetlink.h>
54 #include <linux/serial_reg.h>
55 #include <linux/dma-mapping.h>
56
57 #include <asm/io.h>
58 #include <asm/dma.h>
59 #include <asm/byteorder.h>
60
61 #include <linux/spinlock.h>
62 #include <linux/pm.h>
63
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
67
68 #include "smsc-ircc2.h"
69 #include "smsc-sio.h"
70
71
72 MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>");
73 MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver");
74 MODULE_LICENSE("GPL");
75
76
77 static int ircc_dma = 255;
78 module_param(ircc_dma, int, 0);
79 MODULE_PARM_DESC(ircc_dma, "DMA channel");
80
81 static int ircc_irq = 255;
82 module_param(ircc_irq, int, 0);
83 MODULE_PARM_DESC(ircc_irq, "IRQ line");
84
85 static int ircc_fir;
86 module_param(ircc_fir, int, 0);
87 MODULE_PARM_DESC(ircc_fir, "FIR Base Address");
88
89 static int ircc_sir;
90 module_param(ircc_sir, int, 0);
91 MODULE_PARM_DESC(ircc_sir, "SIR Base Address");
92
93 static int ircc_cfg;
94 module_param(ircc_cfg, int, 0);
95 MODULE_PARM_DESC(ircc_cfg, "Configuration register base address");
96
97 static int ircc_transceiver;
98 module_param(ircc_transceiver, int, 0);
99 MODULE_PARM_DESC(ircc_transceiver, "Transceiver type");
100
101 /* Types */
102
103 struct smsc_transceiver {
104         char *name;
105         void (*set_for_speed)(int fir_base, u32 speed);
106         int  (*probe)(int fir_base);
107 };
108
109 struct smsc_chip {
110         char *name;
111         #if 0
112         u8      type;
113         #endif
114         u16 flags;
115         u8 devid;
116         u8 rev;
117 };
118
119 struct smsc_chip_address {
120         unsigned int cfg_base;
121         unsigned int type;
122 };
123
124 /* Private data for each instance */
125 struct smsc_ircc_cb {
126         struct net_device *netdev;     /* Yes! we are some kind of netdevice */
127         struct net_device_stats stats;
128         struct irlap_cb    *irlap; /* The link layer we are binded to */
129
130         chipio_t io;               /* IrDA controller information */
131         iobuff_t tx_buff;          /* Transmit buffer */
132         iobuff_t rx_buff;          /* Receive buffer */
133         dma_addr_t tx_buff_dma;
134         dma_addr_t rx_buff_dma;
135
136         struct qos_info qos;       /* QoS capabilities for this device */
137
138         spinlock_t lock;           /* For serializing operations */
139
140         __u32 new_speed;
141         __u32 flags;               /* Interface flags */
142
143         int tx_buff_offsets[10];   /* Offsets between frames in tx_buff */
144         int tx_len;                /* Number of frames in tx_buff */
145
146         int transceiver;
147         struct pm_dev *pmdev;
148 };
149
150 /* Constants */
151
152 static const char *driver_name = "smsc-ircc2";
153 #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED        9600
154 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER        1
155 #define SMSC_IRCC2_C_NET_TIMEOUT                0
156 #define SMSC_IRCC2_C_SIR_STOP                   0
157
158 /* Prototypes */
159
160 static int smsc_ircc_open(unsigned int firbase, unsigned int sirbase, u8 dma, u8 irq);
161 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base);
162 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq);
163 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
164 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
165 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
166 static int  smsc_ircc_dma_receive(struct smsc_ircc_cb *self);
167 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self);
168 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
169 static int  smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
170 static int  smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
171 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs);
172 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self);
173 static void smsc_ircc_change_speed(void *priv, u32 speed);
174 static void smsc_ircc_set_sir_speed(void *priv, u32 speed);
175 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
176 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev);
177 static void smsc_ircc_sir_start(struct smsc_ircc_cb *self);
178 #if SMSC_IRCC2_C_SIR_STOP
179 static void smsc_ircc_sir_stop(struct smsc_ircc_cb *self);
180 #endif
181 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self);
182 static int  smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
183 static int  smsc_ircc_net_open(struct net_device *dev);
184 static int  smsc_ircc_net_close(struct net_device *dev);
185 static int  smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
186 #if SMSC_IRCC2_C_NET_TIMEOUT
187 static void smsc_ircc_timeout(struct net_device *dev);
188 #endif
189 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev);
190 static int  smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
191 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self);
192 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self);
193 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed);
194 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self);
195
196 /* Probing */
197 static int __init smsc_ircc_look_for_chips(void);
198 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type);
199 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
200 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type);
201 static int __init smsc_superio_fdc(unsigned short cfg_base);
202 static int __init smsc_superio_lpc(unsigned short cfg_base);
203
204 /* Transceivers specific functions */
205
206 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed);
207 static int  smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base);
208 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed);
209 static int  smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base);
210 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed);
211 static int  smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base);
212
213 /* Power Management */
214
215 static void smsc_ircc_suspend(struct smsc_ircc_cb *self);
216 static void smsc_ircc_wakeup(struct smsc_ircc_cb *self);
217 static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
218
219
220 /* Transceivers for SMSC-ircc */
221
222 static struct smsc_transceiver smsc_transceivers[] =
223 {
224         { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 },
225         { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select },
226         { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc },
227         { NULL, NULL }
228 };
229 #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (ARRAY_SIZE(smsc_transceivers) - 1)
230
231 /*  SMC SuperIO chipsets definitions */
232
233 #define KEY55_1 0       /* SuperIO Configuration mode with Key <0x55> */
234 #define KEY55_2 1       /* SuperIO Configuration mode with Key <0x55,0x55> */
235 #define NoIRDA  2       /* SuperIO Chip has no IRDA Port */
236 #define SIR     0       /* SuperIO Chip has only slow IRDA */
237 #define FIR     4       /* SuperIO Chip has fast IRDA */
238 #define SERx4   8       /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */
239
240 static struct smsc_chip __initdata fdc_chips_flat[] =
241 {
242         /* Base address 0x3f0 or 0x370 */
243         { "37C44",      KEY55_1|NoIRDA,         0x00, 0x00 }, /* This chip cannot be detected */
244         { "37C665GT",   KEY55_2|NoIRDA,         0x65, 0x01 },
245         { "37C665GT",   KEY55_2|NoIRDA,         0x66, 0x01 },
246         { "37C669",     KEY55_2|SIR|SERx4,      0x03, 0x02 },
247         { "37C669",     KEY55_2|SIR|SERx4,      0x04, 0x02 }, /* ID? */
248         { "37C78",      KEY55_2|NoIRDA,         0x78, 0x00 },
249         { "37N769",     KEY55_1|FIR|SERx4,      0x28, 0x00 },
250         { "37N869",     KEY55_1|FIR|SERx4,      0x29, 0x00 },
251         { NULL }
252 };
253
254 static struct smsc_chip __initdata fdc_chips_paged[] =
255 {
256         /* Base address 0x3f0 or 0x370 */
257         { "37B72X",     KEY55_1|SIR|SERx4,      0x4c, 0x00 },
258         { "37B77X",     KEY55_1|SIR|SERx4,      0x43, 0x00 },
259         { "37B78X",     KEY55_1|SIR|SERx4,      0x44, 0x00 },
260         { "37B80X",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
261         { "37C67X",     KEY55_1|FIR|SERx4,      0x40, 0x00 },
262         { "37C93X",     KEY55_2|SIR|SERx4,      0x02, 0x01 },
263         { "37C93XAPM",  KEY55_1|SIR|SERx4,      0x30, 0x01 },
264         { "37C93XFR",   KEY55_2|FIR|SERx4,      0x03, 0x01 },
265         { "37M707",     KEY55_1|SIR|SERx4,      0x42, 0x00 },
266         { "37M81X",     KEY55_1|SIR|SERx4,      0x4d, 0x00 },
267         { "37N958FR",   KEY55_1|FIR|SERx4,      0x09, 0x04 },
268         { "37N971",     KEY55_1|FIR|SERx4,      0x0a, 0x00 },
269         { "37N972",     KEY55_1|FIR|SERx4,      0x0b, 0x00 },
270         { NULL }
271 };
272
273 static struct smsc_chip __initdata lpc_chips_flat[] =
274 {
275         /* Base address 0x2E or 0x4E */
276         { "47N227",     KEY55_1|FIR|SERx4,      0x5a, 0x00 },
277         { "47N267",     KEY55_1|FIR|SERx4,      0x5e, 0x00 },
278         { NULL }
279 };
280
281 static struct smsc_chip __initdata lpc_chips_paged[] =
282 {
283         /* Base address 0x2E or 0x4E */
284         { "47B27X",     KEY55_1|SIR|SERx4,      0x51, 0x00 },
285         { "47B37X",     KEY55_1|SIR|SERx4,      0x52, 0x00 },
286         { "47M10X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
287         { "47M120",     KEY55_1|NoIRDA|SERx4,   0x5c, 0x00 },
288         { "47M13X",     KEY55_1|SIR|SERx4,      0x59, 0x00 },
289         { "47M14X",     KEY55_1|SIR|SERx4,      0x5f, 0x00 },
290         { "47N252",     KEY55_1|FIR|SERx4,      0x0e, 0x00 },
291         { "47S42X",     KEY55_1|SIR|SERx4,      0x57, 0x00 },
292         { NULL }
293 };
294
295 #define SMSCSIO_TYPE_FDC        1
296 #define SMSCSIO_TYPE_LPC        2
297 #define SMSCSIO_TYPE_FLAT       4
298 #define SMSCSIO_TYPE_PAGED      8
299
300 static struct smsc_chip_address __initdata possible_addresses[] =
301 {
302         { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
303         { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
304         { 0xe0,  SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
305         { 0x2e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
306         { 0x4e,  SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED },
307         { 0, 0 }
308 };
309
310 /* Globals */
311
312 static struct smsc_ircc_cb *dev_self[] = { NULL, NULL };
313 static unsigned short dev_count;
314
315 static inline void register_bank(int iobase, int bank)
316 {
317         outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)),
318                iobase + IRCC_MASTER);
319 }
320
321
322 /*******************************************************************************
323  *
324  *
325  * SMSC-ircc stuff
326  *
327  *
328  *******************************************************************************/
329
330 /*
331  * Function smsc_ircc_init ()
332  *
333  *    Initialize chip. Just try to find out how many chips we are dealing with
334  *    and where they are
335  */
336 static int __init smsc_ircc_init(void)
337 {
338         int ret = -ENODEV;
339
340         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
341
342         dev_count = 0;
343
344         if (ircc_fir > 0 && ircc_sir > 0) {
345                 IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
346                 IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
347
348                 if (smsc_ircc_open(ircc_fir, ircc_sir, ircc_dma, ircc_irq) == 0)
349                         return 0;
350
351                 return -ENODEV;
352         }
353
354         /* try user provided configuration register base address */
355         if (ircc_cfg > 0) {
356                 IRDA_MESSAGE(" Overriding configuration address 0x%04x\n",
357                              ircc_cfg);
358                 if (!smsc_superio_fdc(ircc_cfg))
359                         ret = 0;
360                 if (!smsc_superio_lpc(ircc_cfg))
361                         ret = 0;
362         }
363
364         if (smsc_ircc_look_for_chips() > 0)
365                 ret = 0;
366
367         return ret;
368 }
369
370 /*
371  * Function smsc_ircc_open (firbase, sirbase, dma, irq)
372  *
373  *    Try to open driver instance
374  *
375  */
376 static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u8 dma, u8 irq)
377 {
378         struct smsc_ircc_cb *self;
379         struct net_device *dev;
380         int err;
381
382         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
383
384         err = smsc_ircc_present(fir_base, sir_base);
385         if (err)
386                 goto err_out;
387
388         err = -ENOMEM;
389         if (dev_count >= ARRAY_SIZE(dev_self)) {
390                 IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
391                 goto err_out1;
392         }
393
394         /*
395          *  Allocate new instance of the driver
396          */
397         dev = alloc_irdadev(sizeof(struct smsc_ircc_cb));
398         if (!dev) {
399                 IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__);
400                 goto err_out1;
401         }
402
403         SET_MODULE_OWNER(dev);
404
405         dev->hard_start_xmit = smsc_ircc_hard_xmit_sir;
406 #if SMSC_IRCC2_C_NET_TIMEOUT
407         dev->tx_timeout      = smsc_ircc_timeout;
408         dev->watchdog_timeo  = HZ * 2;  /* Allow enough time for speed change */
409 #endif
410         dev->open            = smsc_ircc_net_open;
411         dev->stop            = smsc_ircc_net_close;
412         dev->do_ioctl        = smsc_ircc_net_ioctl;
413         dev->get_stats       = smsc_ircc_net_get_stats;
414
415         self = dev->priv;
416         self->netdev = dev;
417
418         /* Make ifconfig display some details */
419         dev->base_addr = self->io.fir_base = fir_base;
420         dev->irq = self->io.irq = irq;
421
422         /* Need to store self somewhere */
423         dev_self[dev_count++] = self;
424         spin_lock_init(&self->lock);
425
426         self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
427         self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
428
429         self->rx_buff.head =
430                 dma_alloc_coherent(NULL, self->rx_buff.truesize,
431                                    &self->rx_buff_dma, GFP_KERNEL);
432         if (self->rx_buff.head == NULL) {
433                 IRDA_ERROR("%s, Can't allocate memory for receive buffer!\n",
434                            driver_name);
435                 goto err_out2;
436         }
437
438         self->tx_buff.head =
439                 dma_alloc_coherent(NULL, self->tx_buff.truesize,
440                                    &self->tx_buff_dma, GFP_KERNEL);
441         if (self->tx_buff.head == NULL) {
442                 IRDA_ERROR("%s, Can't allocate memory for transmit buffer!\n",
443                            driver_name);
444                 goto err_out3;
445         }
446
447         memset(self->rx_buff.head, 0, self->rx_buff.truesize);
448         memset(self->tx_buff.head, 0, self->tx_buff.truesize);
449
450         self->rx_buff.in_frame = FALSE;
451         self->rx_buff.state = OUTSIDE_FRAME;
452         self->tx_buff.data = self->tx_buff.head;
453         self->rx_buff.data = self->rx_buff.head;
454
455         smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
456         smsc_ircc_setup_qos(self);
457         smsc_ircc_init_chip(self);
458
459         if (ircc_transceiver > 0  &&
460             ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
461                 self->transceiver = ircc_transceiver;
462         else
463                 smsc_ircc_probe_transceiver(self);
464
465         err = register_netdev(self->netdev);
466         if (err) {
467                 IRDA_ERROR("%s, Network device registration failed!\n",
468                            driver_name);
469                 goto err_out4;
470         }
471
472         self->pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, smsc_ircc_pmproc);
473         if (self->pmdev)
474                 self->pmdev->data = self;
475
476         IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
477
478         return 0;
479
480  err_out4:
481         dma_free_coherent(NULL, self->tx_buff.truesize,
482                           self->tx_buff.head, self->tx_buff_dma);
483  err_out3:
484         dma_free_coherent(NULL, self->rx_buff.truesize,
485                           self->rx_buff.head, self->rx_buff_dma);
486  err_out2:
487         free_netdev(self->netdev);
488         dev_self[--dev_count] = NULL;
489  err_out1:
490         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
491         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
492  err_out:
493         return err;
494 }
495
496 /*
497  * Function smsc_ircc_present(fir_base, sir_base)
498  *
499  *    Check the smsc-ircc chip presence
500  *
501  */
502 static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base)
503 {
504         unsigned char low, high, chip, config, dma, irq, version;
505
506         if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT,
507                             driver_name)) {
508                 IRDA_WARNING("%s: can't get fir_base of 0x%03x\n",
509                              __FUNCTION__, fir_base);
510                 goto out1;
511         }
512
513         if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT,
514                             driver_name)) {
515                 IRDA_WARNING("%s: can't get sir_base of 0x%03x\n",
516                              __FUNCTION__, sir_base);
517                 goto out2;
518         }
519
520         register_bank(fir_base, 3);
521
522         high    = inb(fir_base + IRCC_ID_HIGH);
523         low     = inb(fir_base + IRCC_ID_LOW);
524         chip    = inb(fir_base + IRCC_CHIP_ID);
525         version = inb(fir_base + IRCC_VERSION);
526         config  = inb(fir_base + IRCC_INTERFACE);
527         dma     = config & IRCC_INTERFACE_DMA_MASK;
528         irq     = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
529
530         if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
531                 IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
532                              __FUNCTION__, fir_base);
533                 goto out3;
534         }
535         IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, "
536                      "firport 0x%03x, sirport 0x%03x dma=%d, irq=%d\n",
537                      chip & 0x0f, version, fir_base, sir_base, dma, irq);
538
539         return 0;
540
541  out3:
542         release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT);
543  out2:
544         release_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT);
545  out1:
546         return -ENODEV;
547 }
548
549 /*
550  * Function smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq)
551  *
552  *    Setup I/O
553  *
554  */
555 static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
556                                unsigned int fir_base, unsigned int sir_base,
557                                u8 dma, u8 irq)
558 {
559         unsigned char config, chip_dma, chip_irq;
560
561         register_bank(fir_base, 3);
562         config = inb(fir_base + IRCC_INTERFACE);
563         chip_dma = config & IRCC_INTERFACE_DMA_MASK;
564         chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
565
566         self->io.fir_base  = fir_base;
567         self->io.sir_base  = sir_base;
568         self->io.fir_ext   = SMSC_IRCC2_FIR_CHIP_IO_EXTENT;
569         self->io.sir_ext   = SMSC_IRCC2_SIR_CHIP_IO_EXTENT;
570         self->io.fifo_size = SMSC_IRCC2_FIFO_SIZE;
571         self->io.speed = SMSC_IRCC2_C_IRDA_FALLBACK_SPEED;
572
573         if (irq < 255) {
574                 if (irq != chip_irq)
575                         IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
576                                      driver_name, chip_irq, irq);
577                 self->io.irq = irq;
578         } else
579                 self->io.irq = chip_irq;
580
581         if (dma < 255) {
582                 if (dma != chip_dma)
583                         IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
584                                      driver_name, chip_dma, dma);
585                 self->io.dma = dma;
586         } else
587                 self->io.dma = chip_dma;
588
589 }
590
591 /*
592  * Function smsc_ircc_setup_qos(self)
593  *
594  *    Setup qos
595  *
596  */
597 static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self)
598 {
599         /* Initialize QoS for this device */
600         irda_init_max_qos_capabilies(&self->qos);
601
602         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
603                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
604
605         self->qos.min_turn_time.bits = SMSC_IRCC2_MIN_TURN_TIME;
606         self->qos.window_size.bits = SMSC_IRCC2_WINDOW_SIZE;
607         irda_qos_bits_to_value(&self->qos);
608 }
609
610 /*
611  * Function smsc_ircc_init_chip(self)
612  *
613  *    Init chip
614  *
615  */
616 static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
617 {
618         int iobase, ir_mode, ctrl, fast;
619
620         IRDA_ASSERT(self != NULL, return;);
621
622         iobase = self->io.fir_base;
623         ir_mode = IRCC_CFGA_IRDA_SIR_A;
624         ctrl = 0;
625         fast = 0;
626
627         register_bank(iobase, 0);
628         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
629         outb(0x00, iobase + IRCC_MASTER);
630
631         register_bank(iobase, 1);
632         outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | ir_mode),
633              iobase + IRCC_SCE_CFGA);
634
635 #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
636         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
637              iobase + IRCC_SCE_CFGB);
638 #else
639         outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
640              iobase + IRCC_SCE_CFGB);
641 #endif
642         (void) inb(iobase + IRCC_FIFO_THRESHOLD);
643         outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD);
644
645         register_bank(iobase, 4);
646         outb((inb(iobase + IRCC_CONTROL) & 0x30) | ctrl, iobase + IRCC_CONTROL);
647
648         register_bank(iobase, 0);
649         outb(fast, iobase + IRCC_LCR_A);
650
651         smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
652
653         /* Power on device */
654         outb(0x00, iobase + IRCC_MASTER);
655 }
656
657 /*
658  * Function smsc_ircc_net_ioctl (dev, rq, cmd)
659  *
660  *    Process IOCTL commands for this device
661  *
662  */
663 static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
664 {
665         struct if_irda_req *irq = (struct if_irda_req *) rq;
666         struct smsc_ircc_cb *self;
667         unsigned long flags;
668         int ret = 0;
669
670         IRDA_ASSERT(dev != NULL, return -1;);
671
672         self = dev->priv;
673
674         IRDA_ASSERT(self != NULL, return -1;);
675
676         IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
677
678         switch (cmd) {
679         case SIOCSBANDWIDTH: /* Set bandwidth */
680                 if (!capable(CAP_NET_ADMIN))
681                         ret = -EPERM;
682                 else {
683                         /* Make sure we are the only one touching
684                          * self->io.speed and the hardware - Jean II */
685                         spin_lock_irqsave(&self->lock, flags);
686                         smsc_ircc_change_speed(self, irq->ifr_baudrate);
687                         spin_unlock_irqrestore(&self->lock, flags);
688                 }
689                 break;
690         case SIOCSMEDIABUSY: /* Set media busy */
691                 if (!capable(CAP_NET_ADMIN)) {
692                         ret = -EPERM;
693                         break;
694                 }
695
696                 irda_device_set_media_busy(self->netdev, TRUE);
697                 break;
698         case SIOCGRECEIVING: /* Check if we are receiving right now */
699                 irq->ifr_receiving = smsc_ircc_is_receiving(self);
700                 break;
701         #if 0
702         case SIOCSDTRRTS:
703                 if (!capable(CAP_NET_ADMIN)) {
704                         ret = -EPERM;
705                         break;
706                 }
707                 smsc_ircc_sir_set_dtr_rts(dev, irq->ifr_dtr, irq->ifr_rts);
708                 break;
709         #endif
710         default:
711                 ret = -EOPNOTSUPP;
712         }
713
714         return ret;
715 }
716
717 static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
718 {
719         struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv;
720
721         return &self->stats;
722 }
723
724 #if SMSC_IRCC2_C_NET_TIMEOUT
725 /*
726  * Function smsc_ircc_timeout (struct net_device *dev)
727  *
728  *    The networking timeout management.
729  *
730  */
731
732 static void smsc_ircc_timeout(struct net_device *dev)
733 {
734         struct smsc_ircc_cb *self;
735         unsigned long flags;
736
737         self = (struct smsc_ircc_cb *) dev->priv;
738
739         IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
740                      dev->name, self->io.speed);
741         spin_lock_irqsave(&self->lock, flags);
742         smsc_ircc_sir_start(self);
743         smsc_ircc_change_speed(self, self->io.speed);
744         dev->trans_start = jiffies;
745         netif_wake_queue(dev);
746         spin_unlock_irqrestore(&self->lock, flags);
747 }
748 #endif
749
750 /*
751  * Function smsc_ircc_hard_xmit_sir (struct sk_buff *skb, struct net_device *dev)
752  *
753  *    Transmits the current frame until FIFO is full, then
754  *    waits until the next transmit interrupt, and continues until the
755  *    frame is transmitted.
756  */
757 int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
758 {
759         struct smsc_ircc_cb *self;
760         unsigned long flags;
761         s32 speed;
762
763         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
764
765         IRDA_ASSERT(dev != NULL, return 0;);
766
767         self = (struct smsc_ircc_cb *) dev->priv;
768         IRDA_ASSERT(self != NULL, return 0;);
769
770         netif_stop_queue(dev);
771
772         /* Make sure test of self->io.speed & speed change are atomic */
773         spin_lock_irqsave(&self->lock, flags);
774
775         /* Check if we need to change the speed */
776         speed = irda_get_next_speed(skb);
777         if (speed != self->io.speed && speed != -1) {
778                 /* Check for empty frame */
779                 if (!skb->len) {
780                         /*
781                          * We send frames one by one in SIR mode (no
782                          * pipelining), so at this point, if we were sending
783                          * a previous frame, we just received the interrupt
784                          * telling us it is finished (UART_IIR_THRI).
785                          * Therefore, waiting for the transmitter to really
786                          * finish draining the fifo won't take too long.
787                          * And the interrupt handler is not expected to run.
788                          * - Jean II */
789                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
790                         smsc_ircc_change_speed(self, speed);
791                         spin_unlock_irqrestore(&self->lock, flags);
792                         dev_kfree_skb(skb);
793                         return 0;
794                 }
795                 self->new_speed = speed;
796         }
797
798         /* Init tx buffer */
799         self->tx_buff.data = self->tx_buff.head;
800
801         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
802         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
803                                            self->tx_buff.truesize);
804
805         self->stats.tx_bytes += self->tx_buff.len;
806
807         /* Turn on transmit finished interrupt. Will fire immediately!  */
808         outb(UART_IER_THRI, self->io.sir_base + UART_IER);
809
810         spin_unlock_irqrestore(&self->lock, flags);
811
812         dev_kfree_skb(skb);
813
814         return 0;
815 }
816
817 /*
818  * Function smsc_ircc_set_fir_speed (self, baud)
819  *
820  *    Change the speed of the device
821  *
822  */
823 static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed)
824 {
825         int fir_base, ir_mode, ctrl, fast;
826
827         IRDA_ASSERT(self != NULL, return;);
828         fir_base = self->io.fir_base;
829
830         self->io.speed = speed;
831
832         switch (speed) {
833         default:
834         case 576000:
835                 ir_mode = IRCC_CFGA_IRDA_HDLC;
836                 ctrl = IRCC_CRC;
837                 fast = 0;
838                 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
839                 break;
840         case 1152000:
841                 ir_mode = IRCC_CFGA_IRDA_HDLC;
842                 ctrl = IRCC_1152 | IRCC_CRC;
843                 fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA;
844                 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n",
845                            __FUNCTION__);
846                 break;
847         case 4000000:
848                 ir_mode = IRCC_CFGA_IRDA_4PPM;
849                 ctrl = IRCC_CRC;
850                 fast = IRCC_LCR_A_FAST;
851                 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n",
852                            __FUNCTION__);
853                 break;
854         }
855         #if 0
856         Now in tranceiver!
857         /* This causes an interrupt */
858         register_bank(fir_base, 0);
859         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast, fir_base + IRCC_LCR_A);
860         #endif
861
862         register_bank(fir_base, 1);
863         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA);
864
865         register_bank(fir_base, 4);
866         outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL);
867 }
868
869 /*
870  * Function smsc_ircc_fir_start(self)
871  *
872  *    Change the speed of the device
873  *
874  */
875 static void smsc_ircc_fir_start(struct smsc_ircc_cb *self)
876 {
877         struct net_device *dev;
878         int fir_base;
879
880         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
881
882         IRDA_ASSERT(self != NULL, return;);
883         dev = self->netdev;
884         IRDA_ASSERT(dev != NULL, return;);
885
886         fir_base = self->io.fir_base;
887
888         /* Reset everything */
889
890         /* Install FIR transmit handler */
891         dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
892
893         /* Clear FIFO */
894         outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A);
895
896         /* Enable interrupt */
897         /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/
898
899         register_bank(fir_base, 1);
900
901         /* Select the TX/RX interface */
902 #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
903         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
904              fir_base + IRCC_SCE_CFGB);
905 #else
906         outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
907              fir_base + IRCC_SCE_CFGB);
908 #endif
909         (void) inb(fir_base + IRCC_FIFO_THRESHOLD);
910
911         /* Enable SCE interrupts */
912         outb(0, fir_base + IRCC_MASTER);
913         register_bank(fir_base, 0);
914         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER);
915         outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER);
916 }
917
918 /*
919  * Function smsc_ircc_fir_stop(self, baud)
920  *
921  *    Change the speed of the device
922  *
923  */
924 static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self)
925 {
926         int fir_base;
927
928         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
929
930         IRDA_ASSERT(self != NULL, return;);
931
932         fir_base = self->io.fir_base;
933         register_bank(fir_base, 0);
934         /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/
935         outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B);
936 }
937
938
939 /*
940  * Function smsc_ircc_change_speed(self, baud)
941  *
942  *    Change the speed of the device
943  *
944  * This function *must* be called with spinlock held, because it may
945  * be called from the irq handler. - Jean II
946  */
947 static void smsc_ircc_change_speed(void *priv, u32 speed)
948 {
949         struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
950         struct net_device *dev;
951         int last_speed_was_sir;
952
953         IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
954
955         IRDA_ASSERT(self != NULL, return;);
956         dev = self->netdev;
957
958         last_speed_was_sir = self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED;
959
960         #if 0
961         /* Temp Hack */
962         speed= 1152000;
963         self->io.speed = speed;
964         last_speed_was_sir = 0;
965         smsc_ircc_fir_start(self);
966         #endif
967
968         if (self->io.speed == 0)
969                 smsc_ircc_sir_start(self);
970
971         #if 0
972         if (!last_speed_was_sir) speed = self->io.speed;
973         #endif
974
975         if (self->io.speed != speed)
976                 smsc_ircc_set_transceiver_for_speed(self, speed);
977
978         self->io.speed = speed;
979
980         if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
981                 if (!last_speed_was_sir) {
982                         smsc_ircc_fir_stop(self);
983                         smsc_ircc_sir_start(self);
984                 }
985                 smsc_ircc_set_sir_speed(self, speed);
986         } else {
987                 if (last_speed_was_sir) {
988                         #if SMSC_IRCC2_C_SIR_STOP
989                         smsc_ircc_sir_stop(self);
990                         #endif
991                         smsc_ircc_fir_start(self);
992                 }
993                 smsc_ircc_set_fir_speed(self, speed);
994
995                 #if 0
996                 self->tx_buff.len = 10;
997                 self->tx_buff.data = self->tx_buff.head;
998
999                 smsc_ircc_dma_xmit(self, 4000);
1000                 #endif
1001                 /* Be ready for incoming frames */
1002                 smsc_ircc_dma_receive(self);
1003         }
1004
1005         netif_wake_queue(dev);
1006 }
1007
1008 /*
1009  * Function smsc_ircc_set_sir_speed (self, speed)
1010  *
1011  *    Set speed of IrDA port to specified baudrate
1012  *
1013  */
1014 void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
1015 {
1016         struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
1017         int iobase;
1018         int fcr;    /* FIFO control reg */
1019         int lcr;    /* Line control reg */
1020         int divisor;
1021
1022         IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed);
1023
1024         IRDA_ASSERT(self != NULL, return;);
1025         iobase = self->io.sir_base;
1026
1027         /* Update accounting for new speed */
1028         self->io.speed = speed;
1029
1030         /* Turn off interrupts */
1031         outb(0, iobase + UART_IER);
1032
1033         divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed;
1034
1035         fcr = UART_FCR_ENABLE_FIFO;
1036
1037         /*
1038          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1039          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1040          * about this timeout since it will always be fast enough.
1041          */
1042         fcr |= self->io.speed < 38400 ?
1043                 UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1044
1045         /* IrDA ports use 8N1 */
1046         lcr = UART_LCR_WLEN8;
1047
1048         outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */
1049         outb(divisor & 0xff,      iobase + UART_DLL); /* Set speed */
1050         outb(divisor >> 8,        iobase + UART_DLM);
1051         outb(lcr,                 iobase + UART_LCR); /* Set 8N1 */
1052         outb(fcr,                 iobase + UART_FCR); /* Enable FIFO's */
1053
1054         /* Turn on interrups */
1055         outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
1056
1057         IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed);
1058 }
1059
1060
1061 /*
1062  * Function smsc_ircc_hard_xmit_fir (skb, dev)
1063  *
1064  *    Transmit the frame!
1065  *
1066  */
1067 static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1068 {
1069         struct smsc_ircc_cb *self;
1070         unsigned long flags;
1071         s32 speed;
1072         int mtt;
1073
1074         IRDA_ASSERT(dev != NULL, return 0;);
1075         self = (struct smsc_ircc_cb *) dev->priv;
1076         IRDA_ASSERT(self != NULL, return 0;);
1077
1078         netif_stop_queue(dev);
1079
1080         /* Make sure test of self->io.speed & speed change are atomic */
1081         spin_lock_irqsave(&self->lock, flags);
1082
1083         /* Check if we need to change the speed after this frame */
1084         speed = irda_get_next_speed(skb);
1085         if (speed != self->io.speed && speed != -1) {
1086                 /* Check for empty frame */
1087                 if (!skb->len) {
1088                         /* Note : you should make sure that speed changes
1089                          * are not going to corrupt any outgoing frame.
1090                          * Look at nsc-ircc for the gory details - Jean II */
1091                         smsc_ircc_change_speed(self, speed);
1092                         spin_unlock_irqrestore(&self->lock, flags);
1093                         dev_kfree_skb(skb);
1094                         return 0;
1095                 }
1096
1097                 self->new_speed = speed;
1098         }
1099
1100         memcpy(self->tx_buff.head, skb->data, skb->len);
1101
1102         self->tx_buff.len = skb->len;
1103         self->tx_buff.data = self->tx_buff.head;
1104
1105         mtt = irda_get_mtt(skb);
1106         if (mtt) {
1107                 int bofs;
1108
1109                 /*
1110                  * Compute how many BOFs (STA or PA's) we need to waste the
1111                  * min turn time given the speed of the link.
1112                  */
1113                 bofs = mtt * (self->io.speed / 1000) / 8000;
1114                 if (bofs > 4095)
1115                         bofs = 4095;
1116
1117                 smsc_ircc_dma_xmit(self, bofs);
1118         } else {
1119                 /* Transmit frame */
1120                 smsc_ircc_dma_xmit(self, 0);
1121         }
1122
1123         spin_unlock_irqrestore(&self->lock, flags);
1124         dev_kfree_skb(skb);
1125
1126         return 0;
1127 }
1128
1129 /*
1130  * Function smsc_ircc_dma_xmit (self, bofs)
1131  *
1132  *    Transmit data using DMA
1133  *
1134  */
1135 static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs)
1136 {
1137         int iobase = self->io.fir_base;
1138         u8 ctrl;
1139
1140         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1141 #if 1
1142         /* Disable Rx */
1143         register_bank(iobase, 0);
1144         outb(0x00, iobase + IRCC_LCR_B);
1145 #endif
1146         register_bank(iobase, 1);
1147         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1148              iobase + IRCC_SCE_CFGB);
1149
1150         self->io.direction = IO_XMIT;
1151
1152         /* Set BOF additional count for generating the min turn time */
1153         register_bank(iobase, 4);
1154         outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO);
1155         ctrl = inb(iobase + IRCC_CONTROL) & 0xf0;
1156         outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI);
1157
1158         /* Set max Tx frame size */
1159         outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI);
1160         outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO);
1161
1162         /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
1163
1164         /* Enable burst mode chip Tx DMA */
1165         register_bank(iobase, 1);
1166         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1167              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1168
1169         /* Setup DMA controller (must be done after enabling chip DMA) */
1170         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
1171                        DMA_TX_MODE);
1172
1173         /* Enable interrupt */
1174
1175         register_bank(iobase, 0);
1176         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1177         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1178
1179         /* Enable transmit */
1180         outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B);
1181 }
1182
1183 /*
1184  * Function smsc_ircc_dma_xmit_complete (self)
1185  *
1186  *    The transfer of a frame in finished. This function will only be called
1187  *    by the interrupt handler
1188  *
1189  */
1190 static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self)
1191 {
1192         int iobase = self->io.fir_base;
1193
1194         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1195 #if 0
1196         /* Disable Tx */
1197         register_bank(iobase, 0);
1198         outb(0x00, iobase + IRCC_LCR_B);
1199 #endif
1200         register_bank(iobase, 1);
1201         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1202              iobase + IRCC_SCE_CFGB);
1203
1204         /* Check for underrun! */
1205         register_bank(iobase, 0);
1206         if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) {
1207                 self->stats.tx_errors++;
1208                 self->stats.tx_fifo_errors++;
1209
1210                 /* Reset error condition */
1211                 register_bank(iobase, 0);
1212                 outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER);
1213                 outb(0x00, iobase + IRCC_MASTER);
1214         } else {
1215                 self->stats.tx_packets++;
1216                 self->stats.tx_bytes += self->tx_buff.len;
1217         }
1218
1219         /* Check if it's time to change the speed */
1220         if (self->new_speed) {
1221                 smsc_ircc_change_speed(self, self->new_speed);
1222                 self->new_speed = 0;
1223         }
1224
1225         netif_wake_queue(self->netdev);
1226 }
1227
1228 /*
1229  * Function smsc_ircc_dma_receive(self)
1230  *
1231  *    Get ready for receiving a frame. The device will initiate a DMA
1232  *    if it starts to receive a frame.
1233  *
1234  */
1235 static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self)
1236 {
1237         int iobase = self->io.fir_base;
1238 #if 0
1239         /* Turn off chip DMA */
1240         register_bank(iobase, 1);
1241         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1242              iobase + IRCC_SCE_CFGB);
1243 #endif
1244
1245         /* Disable Tx */
1246         register_bank(iobase, 0);
1247         outb(0x00, iobase + IRCC_LCR_B);
1248
1249         /* Turn off chip DMA */
1250         register_bank(iobase, 1);
1251         outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
1252              iobase + IRCC_SCE_CFGB);
1253
1254         self->io.direction = IO_RECV;
1255         self->rx_buff.data = self->rx_buff.head;
1256
1257         /* Set max Rx frame size */
1258         register_bank(iobase, 4);
1259         outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI);
1260         outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO);
1261
1262         /* Setup DMA controller */
1263         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1264                        DMA_RX_MODE);
1265
1266         /* Enable burst mode chip Rx DMA */
1267         register_bank(iobase, 1);
1268         outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
1269              IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB);
1270
1271         /* Enable interrupt */
1272         register_bank(iobase, 0);
1273         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1274         outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER);
1275
1276         /* Enable receiver */
1277         register_bank(iobase, 0);
1278         outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
1279              iobase + IRCC_LCR_B);
1280
1281         return 0;
1282 }
1283
1284 /*
1285  * Function smsc_ircc_dma_receive_complete(self)
1286  *
1287  *    Finished with receiving frames
1288  *
1289  */
1290 static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self)
1291 {
1292         struct sk_buff *skb;
1293         int len, msgcnt, lsr;
1294         int iobase = self->io.fir_base;
1295
1296         register_bank(iobase, 0);
1297
1298         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1299 #if 0
1300         /* Disable Rx */
1301         register_bank(iobase, 0);
1302         outb(0x00, iobase + IRCC_LCR_B);
1303 #endif
1304         register_bank(iobase, 0);
1305         outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR);
1306         lsr= inb(iobase + IRCC_LSR);
1307         msgcnt = inb(iobase + IRCC_LCR_B) & 0x08;
1308
1309         IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__,
1310                    get_dma_residue(self->io.dma));
1311
1312         len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
1313
1314         /* Look for errors */
1315         if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
1316                 self->stats.rx_errors++;
1317                 if (lsr & IRCC_LSR_FRAME_ERROR)
1318                         self->stats.rx_frame_errors++;
1319                 if (lsr & IRCC_LSR_CRC_ERROR)
1320                         self->stats.rx_crc_errors++;
1321                 if (lsr & IRCC_LSR_SIZE_ERROR)
1322                         self->stats.rx_length_errors++;
1323                 if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN))
1324                         self->stats.rx_length_errors++;
1325                 return;
1326         }
1327
1328         /* Remove CRC */
1329         len -= self->io.speed < 4000000 ? 2 : 4;
1330
1331         if (len < 2 || len > 2050) {
1332                 IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len);
1333                 return;
1334         }
1335         IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len);
1336
1337         skb = dev_alloc_skb(len + 1);
1338         if (!skb) {
1339                 IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
1340                              __FUNCTION__);
1341                 return;
1342         }
1343         /* Make sure IP header gets aligned */
1344         skb_reserve(skb, 1);
1345
1346         memcpy(skb_put(skb, len), self->rx_buff.data, len);
1347         self->stats.rx_packets++;
1348         self->stats.rx_bytes += len;
1349
1350         skb->dev = self->netdev;
1351         skb->mac.raw  = skb->data;
1352         skb->protocol = htons(ETH_P_IRDA);
1353         netif_rx(skb);
1354 }
1355
1356 /*
1357  * Function smsc_ircc_sir_receive (self)
1358  *
1359  *    Receive one frame from the infrared port
1360  *
1361  */
1362 static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
1363 {
1364         int boguscount = 0;
1365         int iobase;
1366
1367         IRDA_ASSERT(self != NULL, return;);
1368
1369         iobase = self->io.sir_base;
1370
1371         /*
1372          * Receive all characters in Rx FIFO, unwrap and unstuff them.
1373          * async_unwrap_char will deliver all found frames
1374          */
1375         do {
1376                 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
1377                                   inb(iobase + UART_RX));
1378
1379                 /* Make sure we don't stay here to long */
1380                 if (boguscount++ > 32) {
1381                         IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
1382                         break;
1383                 }
1384         } while (inb(iobase + UART_LSR) & UART_LSR_DR);
1385 }
1386
1387
1388 /*
1389  * Function smsc_ircc_interrupt (irq, dev_id, regs)
1390  *
1391  *    An interrupt from the chip has arrived. Time to do some work
1392  *
1393  */
1394 static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1395 {
1396         struct net_device *dev = (struct net_device *) dev_id;
1397         struct smsc_ircc_cb *self;
1398         int iobase, iir, lcra, lsr;
1399         irqreturn_t ret = IRQ_NONE;
1400
1401         if (dev == NULL) {
1402                 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1403                        driver_name, irq);
1404                 goto irq_ret;
1405         }
1406         self = (struct smsc_ircc_cb *) dev->priv;
1407         IRDA_ASSERT(self != NULL, return IRQ_NONE;);
1408
1409         /* Serialise the interrupt handler in various CPUs, stop Tx path */
1410         spin_lock(&self->lock);
1411
1412         /* Check if we should use the SIR interrupt handler */
1413         if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
1414                 ret = smsc_ircc_interrupt_sir(dev);
1415                 goto irq_ret_unlock;
1416         }
1417
1418         iobase = self->io.fir_base;
1419
1420         register_bank(iobase, 0);
1421         iir = inb(iobase + IRCC_IIR);
1422         if (iir == 0)
1423                 goto irq_ret_unlock;
1424         ret = IRQ_HANDLED;
1425
1426         /* Disable interrupts */
1427         outb(0, iobase + IRCC_IER);
1428         lcra = inb(iobase + IRCC_LCR_A);
1429         lsr = inb(iobase + IRCC_LSR);
1430
1431         IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
1432
1433         if (iir & IRCC_IIR_EOM) {
1434                 if (self->io.direction == IO_RECV)
1435                         smsc_ircc_dma_receive_complete(self);
1436                 else
1437                         smsc_ircc_dma_xmit_complete(self);
1438
1439                 smsc_ircc_dma_receive(self);
1440         }
1441
1442         if (iir & IRCC_IIR_ACTIVE_FRAME) {
1443                 /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/
1444         }
1445
1446         /* Enable interrupts again */
1447
1448         register_bank(iobase, 0);
1449         outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER);
1450
1451  irq_ret_unlock:
1452         spin_unlock(&self->lock);
1453  irq_ret:
1454         return ret;
1455 }
1456
1457 /*
1458  * Function irport_interrupt_sir (irq, dev_id, regs)
1459  *
1460  *    Interrupt handler for SIR modes
1461  */
1462 static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev)
1463 {
1464         struct smsc_ircc_cb *self = dev->priv;
1465         int boguscount = 0;
1466         int iobase;
1467         int iir, lsr;
1468
1469         /* Already locked comming here in smsc_ircc_interrupt() */
1470         /*spin_lock(&self->lock);*/
1471
1472         iobase = self->io.sir_base;
1473
1474         iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1475         if (iir == 0)
1476                 return IRQ_NONE;
1477         while (iir) {
1478                 /* Clear interrupt */
1479                 lsr = inb(iobase + UART_LSR);
1480
1481                 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
1482                             __FUNCTION__, iir, lsr, iobase);
1483
1484                 switch (iir) {
1485                 case UART_IIR_RLSI:
1486                         IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__);
1487                         break;
1488                 case UART_IIR_RDI:
1489                         /* Receive interrupt */
1490                         smsc_ircc_sir_receive(self);
1491                         break;
1492                 case UART_IIR_THRI:
1493                         if (lsr & UART_LSR_THRE)
1494                                 /* Transmitter ready for data */
1495                                 smsc_ircc_sir_write_wakeup(self);
1496                         break;
1497                 default:
1498                         IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
1499                                    __FUNCTION__, iir);
1500                         break;
1501                 }
1502
1503                 /* Make sure we don't stay here to long */
1504                 if (boguscount++ > 100)
1505                         break;
1506
1507                 iir = inb(iobase + UART_IIR) & UART_IIR_ID;
1508         }
1509         /*spin_unlock(&self->lock);*/
1510         return IRQ_HANDLED;
1511 }
1512
1513
1514 #if 0 /* unused */
1515 /*
1516  * Function ircc_is_receiving (self)
1517  *
1518  *    Return TRUE is we are currently receiving a frame
1519  *
1520  */
1521 static int ircc_is_receiving(struct smsc_ircc_cb *self)
1522 {
1523         int status = FALSE;
1524         /* int iobase; */
1525
1526         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1527
1528         IRDA_ASSERT(self != NULL, return FALSE;);
1529
1530         IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__,
1531                    get_dma_residue(self->io.dma));
1532
1533         status = (self->rx_buff.state != OUTSIDE_FRAME);
1534
1535         return status;
1536 }
1537 #endif /* unused */
1538
1539
1540 /*
1541  * Function smsc_ircc_net_open (dev)
1542  *
1543  *    Start the device
1544  *
1545  */
1546 static int smsc_ircc_net_open(struct net_device *dev)
1547 {
1548         struct smsc_ircc_cb *self;
1549         char hwname[16];
1550         unsigned long flags;
1551
1552         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1553
1554         IRDA_ASSERT(dev != NULL, return -1;);
1555         self = (struct smsc_ircc_cb *) dev->priv;
1556         IRDA_ASSERT(self != NULL, return 0;);
1557
1558         if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
1559                         (void *) dev)) {
1560                 IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
1561                            __FUNCTION__, self->io.irq);
1562                 return -EAGAIN;
1563         }
1564
1565         spin_lock_irqsave(&self->lock, flags);
1566         /*smsc_ircc_sir_start(self);*/
1567         self->io.speed = 0;
1568         smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
1569         spin_unlock_irqrestore(&self->lock, flags);
1570
1571         /* Give self a hardware name */
1572         /* It would be cool to offer the chip revision here - Jean II */
1573         sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
1574
1575         /*
1576          * Open new IrLAP layer instance, now that everything should be
1577          * initialized properly
1578          */
1579         self->irlap = irlap_open(dev, &self->qos, hwname);
1580
1581         /*
1582          * Always allocate the DMA channel after the IRQ,
1583          * and clean up on failure.
1584          */
1585         if (request_dma(self->io.dma, dev->name)) {
1586                 smsc_ircc_net_close(dev);
1587
1588                 IRDA_WARNING("%s(), unable to allocate DMA=%d\n",
1589                              __FUNCTION__, self->io.dma);
1590                 return -EAGAIN;
1591         }
1592
1593         netif_start_queue(dev);
1594
1595         return 0;
1596 }
1597
1598 /*
1599  * Function smsc_ircc_net_close (dev)
1600  *
1601  *    Stop the device
1602  *
1603  */
1604 static int smsc_ircc_net_close(struct net_device *dev)
1605 {
1606         struct smsc_ircc_cb *self;
1607
1608         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1609
1610         IRDA_ASSERT(dev != NULL, return -1;);
1611         self = (struct smsc_ircc_cb *) dev->priv;
1612         IRDA_ASSERT(self != NULL, return 0;);
1613
1614         /* Stop device */
1615         netif_stop_queue(dev);
1616
1617         /* Stop and remove instance of IrLAP */
1618         if (self->irlap)
1619                 irlap_close(self->irlap);
1620         self->irlap = NULL;
1621
1622         free_irq(self->io.irq, dev);
1623         disable_dma(self->io.dma);
1624         free_dma(self->io.dma);
1625
1626         return 0;
1627 }
1628
1629
1630 static void smsc_ircc_suspend(struct smsc_ircc_cb *self)
1631 {
1632         IRDA_MESSAGE("%s, Suspending\n", driver_name);
1633
1634         if (!self->io.suspended) {
1635                 smsc_ircc_net_close(self->netdev);
1636                 self->io.suspended = 1;
1637         }
1638 }
1639
1640 static void smsc_ircc_wakeup(struct smsc_ircc_cb *self)
1641 {
1642         if (!self->io.suspended)
1643                 return;
1644
1645         /* The code was doing a "cli()" here, but this can't be right.
1646          * If you need protection, do it in net_open with a spinlock
1647          * or give a good reason. - Jean II */
1648
1649         smsc_ircc_net_open(self->netdev);
1650
1651         IRDA_MESSAGE("%s, Waking up\n", driver_name);
1652 }
1653
1654 static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
1655 {
1656         struct smsc_ircc_cb *self = (struct smsc_ircc_cb*) dev->data;
1657         if (self) {
1658                 switch (rqst) {
1659                 case PM_SUSPEND:
1660                         smsc_ircc_suspend(self);
1661                         break;
1662                 case PM_RESUME:
1663                         smsc_ircc_wakeup(self);
1664                         break;
1665                 }
1666         }
1667         return 0;
1668 }
1669
1670 /*
1671  * Function smsc_ircc_close (self)
1672  *
1673  *    Close driver instance
1674  *
1675  */
1676 static int __exit smsc_ircc_close(struct smsc_ircc_cb *self)
1677 {
1678         int iobase;
1679         unsigned long flags;
1680
1681         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1682
1683         IRDA_ASSERT(self != NULL, return -1;);
1684
1685         iobase = self->io.fir_base;
1686
1687         if (self->pmdev)
1688                 pm_unregister(self->pmdev);
1689
1690         /* Remove netdevice */
1691         unregister_netdev(self->netdev);
1692
1693         /* Make sure the irq handler is not exectuting */
1694         spin_lock_irqsave(&self->lock, flags);
1695
1696         /* Stop interrupts */
1697         register_bank(iobase, 0);
1698         outb(0, iobase + IRCC_IER);
1699         outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER);
1700         outb(0x00, iobase + IRCC_MASTER);
1701 #if 0
1702         /* Reset to SIR mode */
1703         register_bank(iobase, 1);
1704         outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase + IRCC_SCE_CFGA);
1705         outb(IRCC_CFGB_IR, iobase + IRCC_SCE_CFGB);
1706 #endif
1707         spin_unlock_irqrestore(&self->lock, flags);
1708
1709         /* Release the PORTS that this driver is using */
1710         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n",  __FUNCTION__,
1711                    self->io.fir_base);
1712
1713         release_region(self->io.fir_base, self->io.fir_ext);
1714
1715         IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
1716                    self->io.sir_base);
1717
1718         release_region(self->io.sir_base, self->io.sir_ext);
1719
1720         if (self->tx_buff.head)
1721                 dma_free_coherent(NULL, self->tx_buff.truesize,
1722                                   self->tx_buff.head, self->tx_buff_dma);
1723
1724         if (self->rx_buff.head)
1725                 dma_free_coherent(NULL, self->rx_buff.truesize,
1726                                   self->rx_buff.head, self->rx_buff_dma);
1727
1728         free_netdev(self->netdev);
1729
1730         return 0;
1731 }
1732
1733 static void __exit smsc_ircc_cleanup(void)
1734 {
1735         int i;
1736
1737         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
1738
1739         for (i = 0; i < 2; i++) {
1740                 if (dev_self[i])
1741                         smsc_ircc_close(dev_self[i]);
1742         }
1743 }
1744
1745 /*
1746  *      Start SIR operations
1747  *
1748  * This function *must* be called with spinlock held, because it may
1749  * be called from the irq handler (via smsc_ircc_change_speed()). - Jean II
1750  */
1751 void smsc_ircc_sir_start(struct smsc_ircc_cb *self)
1752 {
1753         struct net_device *dev;
1754         int fir_base, sir_base;
1755
1756         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1757
1758         IRDA_ASSERT(self != NULL, return;);
1759         dev = self->netdev;
1760         IRDA_ASSERT(dev != NULL, return;);
1761         dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
1762
1763         fir_base = self->io.fir_base;
1764         sir_base = self->io.sir_base;
1765
1766         /* Reset everything */
1767         outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);
1768
1769         #if SMSC_IRCC2_C_SIR_STOP
1770         /*smsc_ircc_sir_stop(self);*/
1771         #endif
1772
1773         register_bank(fir_base, 1);
1774         outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA);
1775
1776         /* Initialize UART */
1777         outb(UART_LCR_WLEN8, sir_base + UART_LCR);  /* Reset DLAB */
1778         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR);
1779
1780         /* Turn on interrups */
1781         outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER);
1782
1783         IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__);
1784
1785         outb(0x00, fir_base + IRCC_MASTER);
1786 }
1787
1788 #if SMSC_IRCC2_C_SIR_STOP
1789 void smsc_ircc_sir_stop(struct smsc_ircc_cb *self)
1790 {
1791         int iobase;
1792
1793         IRDA_DEBUG(3, "%s\n", __FUNCTION__);
1794         iobase = self->io.sir_base;
1795
1796         /* Reset UART */
1797         outb(0, iobase + UART_MCR);
1798
1799         /* Turn off interrupts */
1800         outb(0, iobase + UART_IER);
1801 }
1802 #endif
1803
1804 /*
1805  * Function smsc_sir_write_wakeup (self)
1806  *
1807  *    Called by the SIR interrupt handler when there's room for more data.
1808  *    If we have more packets to send, we send them here.
1809  *
1810  */
1811 static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self)
1812 {
1813         int actual = 0;
1814         int iobase;
1815         int fcr;
1816
1817         IRDA_ASSERT(self != NULL, return;);
1818
1819         IRDA_DEBUG(4, "%s\n", __FUNCTION__);
1820
1821         iobase = self->io.sir_base;
1822
1823         /* Finished with frame?  */
1824         if (self->tx_buff.len > 0)  {
1825                 /* Write data left in transmit buffer */
1826                 actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
1827                                       self->tx_buff.data, self->tx_buff.len);
1828                 self->tx_buff.data += actual;
1829                 self->tx_buff.len  -= actual;
1830         } else {
1831
1832         /*if (self->tx_buff.len ==0)  {*/
1833
1834                 /*
1835                  *  Now serial buffer is almost free & we can start
1836                  *  transmission of another packet. But first we must check
1837                  *  if we need to change the speed of the hardware
1838                  */
1839                 if (self->new_speed) {
1840                         IRDA_DEBUG(5, "%s(), Changing speed to %d.\n",
1841                                    __FUNCTION__, self->new_speed);
1842                         smsc_ircc_sir_wait_hw_transmitter_finish(self);
1843                         smsc_ircc_change_speed(self, self->new_speed);
1844                         self->new_speed = 0;
1845                 } else {
1846                         /* Tell network layer that we want more frames */
1847                         netif_wake_queue(self->netdev);
1848                 }
1849                 self->stats.tx_packets++;
1850
1851                 if (self->io.speed <= 115200) {
1852                         /*
1853                          * Reset Rx FIFO to make sure that all reflected transmit data
1854                          * is discarded. This is needed for half duplex operation
1855                          */
1856                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
1857                         fcr |= self->io.speed < 38400 ?
1858                                         UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14;
1859
1860                         outb(fcr, iobase + UART_FCR);
1861
1862                         /* Turn on receive interrupts */
1863                         outb(UART_IER_RDI, iobase + UART_IER);
1864                 }
1865         }
1866 }
1867
1868 /*
1869  * Function smsc_ircc_sir_write (iobase, fifo_size, buf, len)
1870  *
1871  *    Fill Tx FIFO with transmit data
1872  *
1873  */
1874 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1875 {
1876         int actual = 0;
1877
1878         /* Tx FIFO should be empty! */
1879         if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) {
1880                 IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
1881                 return 0;
1882         }
1883
1884         /* Fill FIFO with current frame */
1885         while (fifo_size-- > 0 && actual < len) {
1886                 /* Transmit next byte */
1887                 outb(buf[actual], iobase + UART_TX);
1888                 actual++;
1889         }
1890         return actual;
1891 }
1892
1893 /*
1894  * Function smsc_ircc_is_receiving (self)
1895  *
1896  *    Returns true is we are currently receiving data
1897  *
1898  */
1899 static int smsc_ircc_is_receiving(struct smsc_ircc_cb *self)
1900 {
1901         return (self->rx_buff.state != OUTSIDE_FRAME);
1902 }
1903
1904
1905 /*
1906  * Function smsc_ircc_probe_transceiver(self)
1907  *
1908  *    Tries to find the used Transceiver
1909  *
1910  */
1911 static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
1912 {
1913         unsigned int    i;
1914
1915         IRDA_ASSERT(self != NULL, return;);
1916
1917         for (i = 0; smsc_transceivers[i].name != NULL; i++)
1918                 if (smsc_transceivers[i].probe(self->io.fir_base)) {
1919                         IRDA_MESSAGE(" %s transceiver found\n",
1920                                      smsc_transceivers[i].name);
1921                         self->transceiver= i + 1;
1922                         return;
1923                 }
1924
1925         IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
1926                      smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
1927
1928         self->transceiver = SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
1929 }
1930
1931
1932 /*
1933  * Function smsc_ircc_set_transceiver_for_speed(self, speed)
1934  *
1935  *    Set the transceiver according to the speed
1936  *
1937  */
1938 static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
1939 {
1940         unsigned int trx;
1941
1942         trx = self->transceiver;
1943         if (trx > 0)
1944                 smsc_transceivers[trx - 1].set_for_speed(self->io.fir_base, speed);
1945 }
1946
1947 /*
1948  * Function smsc_ircc_wait_hw_transmitter_finish ()
1949  *
1950  *    Wait for the real end of HW transmission
1951  *
1952  * The UART is a strict FIFO, and we get called only when we have finished
1953  * pushing data to the FIFO, so the maximum amount of time we must wait
1954  * is only for the FIFO to drain out.
1955  *
1956  * We use a simple calibrated loop. We may need to adjust the loop
1957  * delay (udelay) to balance I/O traffic and latency. And we also need to
1958  * adjust the maximum timeout.
1959  * It would probably be better to wait for the proper interrupt,
1960  * but it doesn't seem to be available.
1961  *
1962  * We can't use jiffies or kernel timers because :
1963  * 1) We are called from the interrupt handler, which disable softirqs,
1964  * so jiffies won't be increased
1965  * 2) Jiffies granularity is usually very coarse (10ms), and we don't
1966  * want to wait that long to detect stuck hardware.
1967  * Jean II
1968  */
1969
1970 static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self)
1971 {
1972         int iobase = self->io.sir_base;
1973         int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
1974
1975         /* Calibrated busy loop */
1976         while (count-- > 0 && !(inb(iobase + UART_LSR) & UART_LSR_TEMT))
1977                 udelay(1);
1978
1979         if (count == 0)
1980                 IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__);
1981 }
1982
1983
1984 /* PROBING
1985  *
1986  *
1987  */
1988
1989 static int __init smsc_ircc_look_for_chips(void)
1990 {
1991         struct smsc_chip_address *address;
1992         char *type;
1993         unsigned int cfg_base, found;
1994
1995         found = 0;
1996         address = possible_addresses;
1997
1998         while (address->cfg_base) {
1999                 cfg_base = address->cfg_base;
2000
2001                 /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
2002
2003                 if (address->type & SMSCSIO_TYPE_FDC) {
2004                         type = "FDC";
2005                         if (address->type & SMSCSIO_TYPE_FLAT)
2006                                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, type))
2007                                         found++;
2008
2009                         if (address->type & SMSCSIO_TYPE_PAGED)
2010                                 if (!smsc_superio_paged(fdc_chips_paged, cfg_base, type))
2011                                         found++;
2012                 }
2013                 if (address->type & SMSCSIO_TYPE_LPC) {
2014                         type = "LPC";
2015                         if (address->type & SMSCSIO_TYPE_FLAT)
2016                                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, type))
2017                                         found++;
2018
2019                         if (address->type & SMSCSIO_TYPE_PAGED)
2020                                 if (!smsc_superio_paged(lpc_chips_paged, cfg_base, type))
2021                                         found++;
2022                 }
2023                 address++;
2024         }
2025         return found;
2026 }
2027
2028 /*
2029  * Function smsc_superio_flat (chip, base, type)
2030  *
2031  *    Try to get configuration of a smc SuperIO chip with flat register model
2032  *
2033  */
2034 static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned short cfgbase, char *type)
2035 {
2036         unsigned short firbase, sirbase;
2037         u8 mode, dma, irq;
2038         int ret = -ENODEV;
2039
2040         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2041
2042         if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL)
2043                 return ret;
2044
2045         outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
2046         mode = inb(cfgbase + 1);
2047
2048         /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
2049
2050         if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
2051                 IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
2052
2053         outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
2054         sirbase = inb(cfgbase + 1) << 2;
2055
2056         /* FIR iobase */
2057         outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
2058         firbase = inb(cfgbase + 1) << 3;
2059
2060         /* DMA */
2061         outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
2062         dma = inb(cfgbase + 1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
2063
2064         /* IRQ */
2065         outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
2066         irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
2067
2068         IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode);
2069
2070         if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
2071                 ret = 0;
2072
2073         /* Exit configuration */
2074         outb(SMSCSIO_CFGEXITKEY, cfgbase);
2075
2076         return ret;
2077 }
2078
2079 /*
2080  * Function smsc_superio_paged (chip, base, type)
2081  *
2082  *    Try  to get configuration of a smc SuperIO chip with paged register model
2083  *
2084  */
2085 static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned short cfg_base, char *type)
2086 {
2087         unsigned short fir_io, sir_io;
2088         int ret = -ENODEV;
2089
2090         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2091
2092         if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL)
2093                 return ret;
2094
2095         /* Select logical device (UART2) */
2096         outb(0x07, cfg_base);
2097         outb(0x05, cfg_base + 1);
2098
2099         /* SIR iobase */
2100         outb(0x60, cfg_base);
2101         sir_io = inb(cfg_base + 1) << 8;
2102         outb(0x61, cfg_base);
2103         sir_io |= inb(cfg_base + 1);
2104
2105         /* Read FIR base */
2106         outb(0x62, cfg_base);
2107         fir_io = inb(cfg_base + 1) << 8;
2108         outb(0x63, cfg_base);
2109         fir_io |= inb(cfg_base + 1);
2110         outb(0x2b, cfg_base); /* ??? */
2111
2112         if (fir_io && smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
2113                 ret = 0;
2114
2115         /* Exit configuration */
2116         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2117
2118         return ret;
2119 }
2120
2121
2122 static int __init smsc_access(unsigned short cfg_base, unsigned char reg)
2123 {
2124         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2125
2126         outb(reg, cfg_base);
2127         return inb(cfg_base) != reg ? -1 : 0;
2128 }
2129
2130 static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const struct smsc_chip *chip, char *type)
2131 {
2132         u8 devid, xdevid, rev;
2133
2134         IRDA_DEBUG(1, "%s\n", __FUNCTION__);
2135
2136         /* Leave configuration */
2137
2138         outb(SMSCSIO_CFGEXITKEY, cfg_base);
2139
2140         if (inb(cfg_base) == SMSCSIO_CFGEXITKEY)        /* not a smc superio chip */
2141                 return NULL;
2142
2143         outb(reg, cfg_base);
2144
2145         xdevid = inb(cfg_base + 1);
2146
2147         /* Enter configuration */
2148
2149         outb(SMSCSIO_CFGACCESSKEY, cfg_base);
2150
2151         #if 0
2152         if (smsc_access(cfg_base,0x55)) /* send second key and check */
2153                 return NULL;
2154         #endif
2155
2156         /* probe device ID */
2157
2158         if (smsc_access(cfg_base, reg))
2159                 return NULL;
2160
2161         devid = inb(cfg_base + 1);
2162
2163         if (devid == 0 || devid == 0xff)        /* typical values for unused port */
2164                 return NULL;
2165
2166         /* probe revision ID */
2167
2168         if (smsc_access(cfg_base, reg + 1))
2169                 return NULL;
2170
2171         rev = inb(cfg_base + 1);
2172
2173         if (rev >= 128)                 /* i think this will make no sense */
2174                 return NULL;
2175
2176         if (devid == xdevid)            /* protection against false positives */
2177                 return NULL;
2178
2179         /* Check for expected device ID; are there others? */
2180
2181         while (chip->devid != devid) {
2182
2183                 chip++;
2184
2185                 if (chip->name == NULL)
2186                         return NULL;
2187         }
2188
2189         IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",
2190                      devid, rev, cfg_base, type, chip->name);
2191
2192         if (chip->rev > rev) {
2193                 IRDA_MESSAGE("Revision higher than expected\n");
2194                 return NULL;
2195         }
2196
2197         if (chip->flags & NoIRDA)
2198                 IRDA_MESSAGE("chipset does not support IRDA\n");
2199
2200         return chip;
2201 }
2202
2203 static int __init smsc_superio_fdc(unsigned short cfg_base)
2204 {
2205         int ret = -1;
2206
2207         if (!request_region(cfg_base, 2, driver_name)) {
2208                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2209                              __FUNCTION__, cfg_base);
2210         } else {
2211                 if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") ||
2212                     !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC"))
2213                         ret =  0;
2214
2215                 release_region(cfg_base, 2);
2216         }
2217
2218         return ret;
2219 }
2220
2221 static int __init smsc_superio_lpc(unsigned short cfg_base)
2222 {
2223         int ret = -1;
2224
2225         if (!request_region(cfg_base, 2, driver_name)) {
2226                 IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n",
2227                              __FUNCTION__, cfg_base);
2228         } else {
2229                 if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") ||
2230                     !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC"))
2231                         ret = 0;
2232
2233                 release_region(cfg_base, 2);
2234         }
2235         return ret;
2236 }
2237
2238 /************************************************
2239  *
2240  * Transceivers specific functions
2241  *
2242  ************************************************/
2243
2244
2245 /*
2246  * Function smsc_ircc_set_transceiver_smsc_ircc_atc(fir_base, speed)
2247  *
2248  *    Program transceiver through smsc-ircc ATC circuitry
2249  *
2250  */
2251
2252 static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed)
2253 {
2254         unsigned long jiffies_now, jiffies_timeout;
2255         u8 val;
2256
2257         jiffies_now = jiffies;
2258         jiffies_timeout = jiffies + SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
2259
2260         /* ATC */
2261         register_bank(fir_base, 4);
2262         outb((inb(fir_base + IRCC_ATC) & IRCC_ATC_MASK) | IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE,
2263              fir_base + IRCC_ATC);
2264
2265         while ((val = (inb(fir_base + IRCC_ATC) & IRCC_ATC_nPROGREADY)) &&
2266                 !time_after(jiffies, jiffies_timeout))
2267                 /* empty */;
2268
2269         if (val)
2270                 IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__,
2271                              inb(fir_base + IRCC_ATC));
2272 }
2273
2274 /*
2275  * Function smsc_ircc_probe_transceiver_smsc_ircc_atc(fir_base)
2276  *
2277  *    Probe transceiver smsc-ircc ATC circuitry
2278  *
2279  */
2280
2281 static int smsc_ircc_probe_transceiver_smsc_ircc_atc(int fir_base)
2282 {
2283         return 0;
2284 }
2285
2286 /*
2287  * Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
2288  *
2289  *    Set transceiver
2290  *
2291  */
2292
2293 static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
2294 {
2295         u8 fast_mode;
2296
2297         switch (speed) {
2298         default:
2299         case 576000 :
2300                 fast_mode = 0;
2301                 break;
2302         case 1152000 :
2303         case 4000000 :
2304                 fast_mode = IRCC_LCR_A_FAST;
2305                 break;
2306         }
2307         register_bank(fir_base, 0);
2308         outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2309 }
2310
2311 /*
2312  * Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
2313  *
2314  *    Probe transceiver
2315  *
2316  */
2317
2318 static int smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(int fir_base)
2319 {
2320         return 0;
2321 }
2322
2323 /*
2324  * Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
2325  *
2326  *    Set transceiver
2327  *
2328  */
2329
2330 static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
2331 {
2332         u8 fast_mode;
2333
2334         switch (speed) {
2335         default:
2336         case 576000 :
2337                 fast_mode = 0;
2338                 break;
2339         case 1152000 :
2340         case 4000000 :
2341                 fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
2342                 break;
2343
2344         }
2345         /* This causes an interrupt */
2346         register_bank(fir_base, 0);
2347         outb((inb(fir_base + IRCC_LCR_A) &  0xbf) | fast_mode, fir_base + IRCC_LCR_A);
2348 }
2349
2350 /*
2351  * Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
2352  *
2353  *    Probe transceiver
2354  *
2355  */
2356
2357 static int smsc_ircc_probe_transceiver_toshiba_sat1800(int fir_base)
2358 {
2359         return 0;
2360 }
2361
2362
2363 module_init(smsc_ircc_init);
2364 module_exit(smsc_ircc_cleanup);