igb: add support for in kernel LRO
[linux-2.6.git] / drivers / net / igb / igb_main.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
44 #ifdef CONFIG_DCA
45 #include <linux/dca.h>
46 #endif
47 #include "igb.h"
48
49 #define DRV_VERSION "1.2.45-k2"
50 char igb_driver_name[] = "igb";
51 char igb_driver_version[] = DRV_VERSION;
52 static const char igb_driver_string[] =
53                                 "Intel(R) Gigabit Ethernet Network Driver";
54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
55
56 static const struct e1000_info *igb_info_tbl[] = {
57         [board_82575] = &e1000_82575_info,
58 };
59
60 static struct pci_device_id igb_pci_tbl[] = {
61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
68         /* required last entry */
69         {0, }
70 };
71
72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
73
74 void igb_reset(struct igb_adapter *);
75 static int igb_setup_all_tx_resources(struct igb_adapter *);
76 static int igb_setup_all_rx_resources(struct igb_adapter *);
77 static void igb_free_all_tx_resources(struct igb_adapter *);
78 static void igb_free_all_rx_resources(struct igb_adapter *);
79 static void igb_free_tx_resources(struct igb_ring *);
80 static void igb_free_rx_resources(struct igb_ring *);
81 void igb_update_stats(struct igb_adapter *);
82 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
83 static void __devexit igb_remove(struct pci_dev *pdev);
84 static int igb_sw_init(struct igb_adapter *);
85 static int igb_open(struct net_device *);
86 static int igb_close(struct net_device *);
87 static void igb_configure_tx(struct igb_adapter *);
88 static void igb_configure_rx(struct igb_adapter *);
89 static void igb_setup_rctl(struct igb_adapter *);
90 static void igb_clean_all_tx_rings(struct igb_adapter *);
91 static void igb_clean_all_rx_rings(struct igb_adapter *);
92 static void igb_clean_tx_ring(struct igb_ring *);
93 static void igb_clean_rx_ring(struct igb_ring *);
94 static void igb_set_multi(struct net_device *);
95 static void igb_update_phy_info(unsigned long);
96 static void igb_watchdog(unsigned long);
97 static void igb_watchdog_task(struct work_struct *);
98 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
99                                   struct igb_ring *);
100 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
101 static struct net_device_stats *igb_get_stats(struct net_device *);
102 static int igb_change_mtu(struct net_device *, int);
103 static int igb_set_mac(struct net_device *, void *);
104 static irqreturn_t igb_intr(int irq, void *);
105 static irqreturn_t igb_intr_msi(int irq, void *);
106 static irqreturn_t igb_msix_other(int irq, void *);
107 static irqreturn_t igb_msix_rx(int irq, void *);
108 static irqreturn_t igb_msix_tx(int irq, void *);
109 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
110 #ifdef CONFIG_DCA
111 static void igb_update_rx_dca(struct igb_ring *);
112 static void igb_update_tx_dca(struct igb_ring *);
113 static void igb_setup_dca(struct igb_adapter *);
114 #endif /* CONFIG_DCA */
115 static bool igb_clean_tx_irq(struct igb_ring *);
116 static int igb_poll(struct napi_struct *, int);
117 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
118 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
119 #ifdef CONFIG_IGB_LRO
120 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
121 #endif
122 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
123 static void igb_tx_timeout(struct net_device *);
124 static void igb_reset_task(struct work_struct *);
125 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
126 static void igb_vlan_rx_add_vid(struct net_device *, u16);
127 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
128 static void igb_restore_vlan(struct igb_adapter *);
129
130 static int igb_suspend(struct pci_dev *, pm_message_t);
131 #ifdef CONFIG_PM
132 static int igb_resume(struct pci_dev *);
133 #endif
134 static void igb_shutdown(struct pci_dev *);
135 #ifdef CONFIG_DCA
136 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
137 static struct notifier_block dca_notifier = {
138         .notifier_call  = igb_notify_dca,
139         .next           = NULL,
140         .priority       = 0
141 };
142 #endif
143
144 #ifdef CONFIG_NET_POLL_CONTROLLER
145 /* for netdump / net console */
146 static void igb_netpoll(struct net_device *);
147 #endif
148
149 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
150                      pci_channel_state_t);
151 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
152 static void igb_io_resume(struct pci_dev *);
153
154 static struct pci_error_handlers igb_err_handler = {
155         .error_detected = igb_io_error_detected,
156         .slot_reset = igb_io_slot_reset,
157         .resume = igb_io_resume,
158 };
159
160
161 static struct pci_driver igb_driver = {
162         .name     = igb_driver_name,
163         .id_table = igb_pci_tbl,
164         .probe    = igb_probe,
165         .remove   = __devexit_p(igb_remove),
166 #ifdef CONFIG_PM
167         /* Power Managment Hooks */
168         .suspend  = igb_suspend,
169         .resume   = igb_resume,
170 #endif
171         .shutdown = igb_shutdown,
172         .err_handler = &igb_err_handler
173 };
174
175 static int global_quad_port_a; /* global quad port a indication */
176
177 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
178 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
179 MODULE_LICENSE("GPL");
180 MODULE_VERSION(DRV_VERSION);
181
182 #ifdef DEBUG
183 /**
184  * igb_get_hw_dev_name - return device name string
185  * used by hardware layer to print debugging information
186  **/
187 char *igb_get_hw_dev_name(struct e1000_hw *hw)
188 {
189         struct igb_adapter *adapter = hw->back;
190         return adapter->netdev->name;
191 }
192 #endif
193
194 /**
195  * igb_init_module - Driver Registration Routine
196  *
197  * igb_init_module is the first routine called when the driver is
198  * loaded. All it does is register with the PCI subsystem.
199  **/
200 static int __init igb_init_module(void)
201 {
202         int ret;
203         printk(KERN_INFO "%s - version %s\n",
204                igb_driver_string, igb_driver_version);
205
206         printk(KERN_INFO "%s\n", igb_copyright);
207
208         global_quad_port_a = 0;
209
210         ret = pci_register_driver(&igb_driver);
211 #ifdef CONFIG_DCA
212         dca_register_notify(&dca_notifier);
213 #endif
214         return ret;
215 }
216
217 module_init(igb_init_module);
218
219 /**
220  * igb_exit_module - Driver Exit Cleanup Routine
221  *
222  * igb_exit_module is called just before the driver is removed
223  * from memory.
224  **/
225 static void __exit igb_exit_module(void)
226 {
227 #ifdef CONFIG_DCA
228         dca_unregister_notify(&dca_notifier);
229 #endif
230         pci_unregister_driver(&igb_driver);
231 }
232
233 module_exit(igb_exit_module);
234
235 /**
236  * igb_alloc_queues - Allocate memory for all rings
237  * @adapter: board private structure to initialize
238  *
239  * We allocate one ring per queue at run-time since we don't know the
240  * number of queues at compile-time.
241  **/
242 static int igb_alloc_queues(struct igb_adapter *adapter)
243 {
244         int i;
245
246         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
247                                    sizeof(struct igb_ring), GFP_KERNEL);
248         if (!adapter->tx_ring)
249                 return -ENOMEM;
250
251         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
252                                    sizeof(struct igb_ring), GFP_KERNEL);
253         if (!adapter->rx_ring) {
254                 kfree(adapter->tx_ring);
255                 return -ENOMEM;
256         }
257
258         for (i = 0; i < adapter->num_tx_queues; i++) {
259                 struct igb_ring *ring = &(adapter->tx_ring[i]);
260                 ring->adapter = adapter;
261                 ring->queue_index = i;
262         }
263         for (i = 0; i < adapter->num_rx_queues; i++) {
264                 struct igb_ring *ring = &(adapter->rx_ring[i]);
265                 ring->adapter = adapter;
266                 ring->queue_index = i;
267                 ring->itr_register = E1000_ITR;
268
269                 /* set a default napi handler for each rx_ring */
270                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
271         }
272         return 0;
273 }
274
275 #define IGB_N0_QUEUE -1
276 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
277                               int tx_queue, int msix_vector)
278 {
279         u32 msixbm = 0;
280         struct e1000_hw *hw = &adapter->hw;
281         u32 ivar, index;
282
283         switch (hw->mac.type) {
284         case e1000_82575:
285                 /* The 82575 assigns vectors using a bitmask, which matches the
286                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
287                    or more queues to a vector, we write the appropriate bits
288                    into the MSIXBM register for that vector. */
289                 if (rx_queue > IGB_N0_QUEUE) {
290                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
291                         adapter->rx_ring[rx_queue].eims_value = msixbm;
292                 }
293                 if (tx_queue > IGB_N0_QUEUE) {
294                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
295                         adapter->tx_ring[tx_queue].eims_value =
296                                   E1000_EICR_TX_QUEUE0 << tx_queue;
297                 }
298                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
299                 break;
300         case e1000_82576:
301                 /* Kawela uses a table-based method for assigning vectors.
302                    Each queue has a single entry in the table to which we write
303                    a vector number along with a "valid" bit.  Sadly, the layout
304                    of the table is somewhat counterintuitive. */
305                 if (rx_queue > IGB_N0_QUEUE) {
306                         index = (rx_queue & 0x7);
307                         ivar = array_rd32(E1000_IVAR0, index);
308                         if (rx_queue < 8) {
309                                 /* vector goes into low byte of register */
310                                 ivar = ivar & 0xFFFFFF00;
311                                 ivar |= msix_vector | E1000_IVAR_VALID;
312                         } else {
313                                 /* vector goes into third byte of register */
314                                 ivar = ivar & 0xFF00FFFF;
315                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
316                         }
317                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
318                         array_wr32(E1000_IVAR0, index, ivar);
319                 }
320                 if (tx_queue > IGB_N0_QUEUE) {
321                         index = (tx_queue & 0x7);
322                         ivar = array_rd32(E1000_IVAR0, index);
323                         if (tx_queue < 8) {
324                                 /* vector goes into second byte of register */
325                                 ivar = ivar & 0xFFFF00FF;
326                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
327                         } else {
328                                 /* vector goes into high byte of register */
329                                 ivar = ivar & 0x00FFFFFF;
330                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
331                         }
332                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
333                         array_wr32(E1000_IVAR0, index, ivar);
334                 }
335                 break;
336         default:
337                 BUG();
338                 break;
339         }
340 }
341
342 /**
343  * igb_configure_msix - Configure MSI-X hardware
344  *
345  * igb_configure_msix sets up the hardware to properly
346  * generate MSI-X interrupts.
347  **/
348 static void igb_configure_msix(struct igb_adapter *adapter)
349 {
350         u32 tmp;
351         int i, vector = 0;
352         struct e1000_hw *hw = &adapter->hw;
353
354         adapter->eims_enable_mask = 0;
355         if (hw->mac.type == e1000_82576)
356                 /* Turn on MSI-X capability first, or our settings
357                  * won't stick.  And it will take days to debug. */
358                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
359                                    E1000_GPIE_PBA | E1000_GPIE_EIAME | 
360                                    E1000_GPIE_NSICR);
361
362         for (i = 0; i < adapter->num_tx_queues; i++) {
363                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
364                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
365                 adapter->eims_enable_mask |= tx_ring->eims_value;
366                 if (tx_ring->itr_val)
367                         writel(1000000000 / (tx_ring->itr_val * 256),
368                                hw->hw_addr + tx_ring->itr_register);
369                 else
370                         writel(1, hw->hw_addr + tx_ring->itr_register);
371         }
372
373         for (i = 0; i < adapter->num_rx_queues; i++) {
374                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
375                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
376                 adapter->eims_enable_mask |= rx_ring->eims_value;
377                 if (rx_ring->itr_val)
378                         writel(1000000000 / (rx_ring->itr_val * 256),
379                                hw->hw_addr + rx_ring->itr_register);
380                 else
381                         writel(1, hw->hw_addr + rx_ring->itr_register);
382         }
383
384
385         /* set vector for other causes, i.e. link changes */
386         switch (hw->mac.type) {
387         case e1000_82575:
388                 array_wr32(E1000_MSIXBM(0), vector++,
389                                       E1000_EIMS_OTHER);
390
391                 tmp = rd32(E1000_CTRL_EXT);
392                 /* enable MSI-X PBA support*/
393                 tmp |= E1000_CTRL_EXT_PBA_CLR;
394
395                 /* Auto-Mask interrupts upon ICR read. */
396                 tmp |= E1000_CTRL_EXT_EIAME;
397                 tmp |= E1000_CTRL_EXT_IRCA;
398
399                 wr32(E1000_CTRL_EXT, tmp);
400                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
401                 adapter->eims_other = E1000_EIMS_OTHER;
402
403                 break;
404
405         case e1000_82576:
406                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
407                 wr32(E1000_IVAR_MISC, tmp);
408
409                 adapter->eims_enable_mask = (1 << (vector)) - 1;
410                 adapter->eims_other = 1 << (vector - 1);
411                 break;
412         default:
413                 /* do nothing, since nothing else supports MSI-X */
414                 break;
415         } /* switch (hw->mac.type) */
416         wrfl();
417 }
418
419 /**
420  * igb_request_msix - Initialize MSI-X interrupts
421  *
422  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
423  * kernel.
424  **/
425 static int igb_request_msix(struct igb_adapter *adapter)
426 {
427         struct net_device *netdev = adapter->netdev;
428         int i, err = 0, vector = 0;
429
430         vector = 0;
431
432         for (i = 0; i < adapter->num_tx_queues; i++) {
433                 struct igb_ring *ring = &(adapter->tx_ring[i]);
434                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
435                 err = request_irq(adapter->msix_entries[vector].vector,
436                                   &igb_msix_tx, 0, ring->name,
437                                   &(adapter->tx_ring[i]));
438                 if (err)
439                         goto out;
440                 ring->itr_register = E1000_EITR(0) + (vector << 2);
441                 ring->itr_val = adapter->itr;
442                 vector++;
443         }
444         for (i = 0; i < adapter->num_rx_queues; i++) {
445                 struct igb_ring *ring = &(adapter->rx_ring[i]);
446                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
447                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
448                 else
449                         memcpy(ring->name, netdev->name, IFNAMSIZ);
450                 err = request_irq(adapter->msix_entries[vector].vector,
451                                   &igb_msix_rx, 0, ring->name,
452                                   &(adapter->rx_ring[i]));
453                 if (err)
454                         goto out;
455                 ring->itr_register = E1000_EITR(0) + (vector << 2);
456                 ring->itr_val = adapter->itr;
457                 /* overwrite the poll routine for MSIX, we've already done
458                  * netif_napi_add */
459                 ring->napi.poll = &igb_clean_rx_ring_msix;
460                 vector++;
461         }
462
463         err = request_irq(adapter->msix_entries[vector].vector,
464                           &igb_msix_other, 0, netdev->name, netdev);
465         if (err)
466                 goto out;
467
468         igb_configure_msix(adapter);
469         return 0;
470 out:
471         return err;
472 }
473
474 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
475 {
476         if (adapter->msix_entries) {
477                 pci_disable_msix(adapter->pdev);
478                 kfree(adapter->msix_entries);
479                 adapter->msix_entries = NULL;
480         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
481                 pci_disable_msi(adapter->pdev);
482         return;
483 }
484
485
486 /**
487  * igb_set_interrupt_capability - set MSI or MSI-X if supported
488  *
489  * Attempt to configure interrupts using the best available
490  * capabilities of the hardware and kernel.
491  **/
492 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
493 {
494         int err;
495         int numvecs, i;
496
497         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
498         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
499                                         GFP_KERNEL);
500         if (!adapter->msix_entries)
501                 goto msi_only;
502
503         for (i = 0; i < numvecs; i++)
504                 adapter->msix_entries[i].entry = i;
505
506         err = pci_enable_msix(adapter->pdev,
507                               adapter->msix_entries,
508                               numvecs);
509         if (err == 0)
510                 return;
511
512         igb_reset_interrupt_capability(adapter);
513
514         /* If we can't do MSI-X, try MSI */
515 msi_only:
516         adapter->num_rx_queues = 1;
517         adapter->num_tx_queues = 1;
518         if (!pci_enable_msi(adapter->pdev))
519                 adapter->flags |= IGB_FLAG_HAS_MSI;
520
521 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
522         /* Notify the stack of the (possibly) reduced Tx Queue count. */
523         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
524 #endif
525         return;
526 }
527
528 /**
529  * igb_request_irq - initialize interrupts
530  *
531  * Attempts to configure interrupts using the best available
532  * capabilities of the hardware and kernel.
533  **/
534 static int igb_request_irq(struct igb_adapter *adapter)
535 {
536         struct net_device *netdev = adapter->netdev;
537         struct e1000_hw *hw = &adapter->hw;
538         int err = 0;
539
540         if (adapter->msix_entries) {
541                 err = igb_request_msix(adapter);
542                 if (!err)
543                         goto request_done;
544                 /* fall back to MSI */
545                 igb_reset_interrupt_capability(adapter);
546                 if (!pci_enable_msi(adapter->pdev))
547                         adapter->flags |= IGB_FLAG_HAS_MSI;
548                 igb_free_all_tx_resources(adapter);
549                 igb_free_all_rx_resources(adapter);
550                 adapter->num_rx_queues = 1;
551                 igb_alloc_queues(adapter);
552         } else {
553                 switch (hw->mac.type) {
554                 case e1000_82575:
555                         wr32(E1000_MSIXBM(0),
556                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
557                         break;
558                 case e1000_82576:
559                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
560                         break;
561                 default:
562                         break;
563                 }
564         }
565
566         if (adapter->flags & IGB_FLAG_HAS_MSI) {
567                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
568                                   netdev->name, netdev);
569                 if (!err)
570                         goto request_done;
571                 /* fall back to legacy interrupts */
572                 igb_reset_interrupt_capability(adapter);
573                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
574         }
575
576         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
577                           netdev->name, netdev);
578
579         if (err)
580                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
581                         err);
582
583 request_done:
584         return err;
585 }
586
587 static void igb_free_irq(struct igb_adapter *adapter)
588 {
589         struct net_device *netdev = adapter->netdev;
590
591         if (adapter->msix_entries) {
592                 int vector = 0, i;
593
594                 for (i = 0; i < adapter->num_tx_queues; i++)
595                         free_irq(adapter->msix_entries[vector++].vector,
596                                 &(adapter->tx_ring[i]));
597                 for (i = 0; i < adapter->num_rx_queues; i++)
598                         free_irq(adapter->msix_entries[vector++].vector,
599                                 &(adapter->rx_ring[i]));
600
601                 free_irq(adapter->msix_entries[vector++].vector, netdev);
602                 return;
603         }
604
605         free_irq(adapter->pdev->irq, netdev);
606 }
607
608 /**
609  * igb_irq_disable - Mask off interrupt generation on the NIC
610  * @adapter: board private structure
611  **/
612 static void igb_irq_disable(struct igb_adapter *adapter)
613 {
614         struct e1000_hw *hw = &adapter->hw;
615
616         if (adapter->msix_entries) {
617                 wr32(E1000_EIAM, 0);
618                 wr32(E1000_EIMC, ~0);
619                 wr32(E1000_EIAC, 0);
620         }
621
622         wr32(E1000_IAM, 0);
623         wr32(E1000_IMC, ~0);
624         wrfl();
625         synchronize_irq(adapter->pdev->irq);
626 }
627
628 /**
629  * igb_irq_enable - Enable default interrupt generation settings
630  * @adapter: board private structure
631  **/
632 static void igb_irq_enable(struct igb_adapter *adapter)
633 {
634         struct e1000_hw *hw = &adapter->hw;
635
636         if (adapter->msix_entries) {
637                 wr32(E1000_EIAC, adapter->eims_enable_mask);
638                 wr32(E1000_EIAM, adapter->eims_enable_mask);
639                 wr32(E1000_EIMS, adapter->eims_enable_mask);
640                 wr32(E1000_IMS, E1000_IMS_LSC);
641         } else {
642                 wr32(E1000_IMS, IMS_ENABLE_MASK);
643                 wr32(E1000_IAM, IMS_ENABLE_MASK);
644         }
645 }
646
647 static void igb_update_mng_vlan(struct igb_adapter *adapter)
648 {
649         struct net_device *netdev = adapter->netdev;
650         u16 vid = adapter->hw.mng_cookie.vlan_id;
651         u16 old_vid = adapter->mng_vlan_id;
652         if (adapter->vlgrp) {
653                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
654                         if (adapter->hw.mng_cookie.status &
655                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
656                                 igb_vlan_rx_add_vid(netdev, vid);
657                                 adapter->mng_vlan_id = vid;
658                         } else
659                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
660
661                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
662                                         (vid != old_vid) &&
663                             !vlan_group_get_device(adapter->vlgrp, old_vid))
664                                 igb_vlan_rx_kill_vid(netdev, old_vid);
665                 } else
666                         adapter->mng_vlan_id = vid;
667         }
668 }
669
670 /**
671  * igb_release_hw_control - release control of the h/w to f/w
672  * @adapter: address of board private structure
673  *
674  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
675  * For ASF and Pass Through versions of f/w this means that the
676  * driver is no longer loaded.
677  *
678  **/
679 static void igb_release_hw_control(struct igb_adapter *adapter)
680 {
681         struct e1000_hw *hw = &adapter->hw;
682         u32 ctrl_ext;
683
684         /* Let firmware take over control of h/w */
685         ctrl_ext = rd32(E1000_CTRL_EXT);
686         wr32(E1000_CTRL_EXT,
687                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
688 }
689
690
691 /**
692  * igb_get_hw_control - get control of the h/w from f/w
693  * @adapter: address of board private structure
694  *
695  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
696  * For ASF and Pass Through versions of f/w this means that
697  * the driver is loaded.
698  *
699  **/
700 static void igb_get_hw_control(struct igb_adapter *adapter)
701 {
702         struct e1000_hw *hw = &adapter->hw;
703         u32 ctrl_ext;
704
705         /* Let firmware know the driver has taken over */
706         ctrl_ext = rd32(E1000_CTRL_EXT);
707         wr32(E1000_CTRL_EXT,
708                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
709 }
710
711 static void igb_init_manageability(struct igb_adapter *adapter)
712 {
713         struct e1000_hw *hw = &adapter->hw;
714
715         if (adapter->en_mng_pt) {
716                 u32 manc2h = rd32(E1000_MANC2H);
717                 u32 manc = rd32(E1000_MANC);
718
719                 /* enable receiving management packets to the host */
720                 /* this will probably generate destination unreachable messages
721                  * from the host OS, but the packets will be handled on SMBUS */
722                 manc |= E1000_MANC_EN_MNG2HOST;
723 #define E1000_MNG2HOST_PORT_623 (1 << 5)
724 #define E1000_MNG2HOST_PORT_664 (1 << 6)
725                 manc2h |= E1000_MNG2HOST_PORT_623;
726                 manc2h |= E1000_MNG2HOST_PORT_664;
727                 wr32(E1000_MANC2H, manc2h);
728
729                 wr32(E1000_MANC, manc);
730         }
731 }
732
733 /**
734  * igb_configure - configure the hardware for RX and TX
735  * @adapter: private board structure
736  **/
737 static void igb_configure(struct igb_adapter *adapter)
738 {
739         struct net_device *netdev = adapter->netdev;
740         int i;
741
742         igb_get_hw_control(adapter);
743         igb_set_multi(netdev);
744
745         igb_restore_vlan(adapter);
746         igb_init_manageability(adapter);
747
748         igb_configure_tx(adapter);
749         igb_setup_rctl(adapter);
750         igb_configure_rx(adapter);
751
752         igb_rx_fifo_flush_82575(&adapter->hw);
753
754         /* call IGB_DESC_UNUSED which always leaves
755          * at least 1 descriptor unused to make sure
756          * next_to_use != next_to_clean */
757         for (i = 0; i < adapter->num_rx_queues; i++) {
758                 struct igb_ring *ring = &adapter->rx_ring[i];
759                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
760         }
761
762
763         adapter->tx_queue_len = netdev->tx_queue_len;
764 }
765
766
767 /**
768  * igb_up - Open the interface and prepare it to handle traffic
769  * @adapter: board private structure
770  **/
771
772 int igb_up(struct igb_adapter *adapter)
773 {
774         struct e1000_hw *hw = &adapter->hw;
775         int i;
776
777         /* hardware has been reset, we need to reload some things */
778         igb_configure(adapter);
779
780         clear_bit(__IGB_DOWN, &adapter->state);
781
782         for (i = 0; i < adapter->num_rx_queues; i++)
783                 napi_enable(&adapter->rx_ring[i].napi);
784         if (adapter->msix_entries)
785                 igb_configure_msix(adapter);
786
787         /* Clear any pending interrupts. */
788         rd32(E1000_ICR);
789         igb_irq_enable(adapter);
790
791         /* Fire a link change interrupt to start the watchdog. */
792         wr32(E1000_ICS, E1000_ICS_LSC);
793         return 0;
794 }
795
796 void igb_down(struct igb_adapter *adapter)
797 {
798         struct e1000_hw *hw = &adapter->hw;
799         struct net_device *netdev = adapter->netdev;
800         u32 tctl, rctl;
801         int i;
802
803         /* signal that we're down so the interrupt handler does not
804          * reschedule our watchdog timer */
805         set_bit(__IGB_DOWN, &adapter->state);
806
807         /* disable receives in the hardware */
808         rctl = rd32(E1000_RCTL);
809         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
810         /* flush and sleep below */
811
812         netif_stop_queue(netdev);
813 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
814         for (i = 0; i < adapter->num_tx_queues; i++)
815                 netif_stop_subqueue(netdev, i);
816 #endif
817
818         /* disable transmits in the hardware */
819         tctl = rd32(E1000_TCTL);
820         tctl &= ~E1000_TCTL_EN;
821         wr32(E1000_TCTL, tctl);
822         /* flush both disables and wait for them to finish */
823         wrfl();
824         msleep(10);
825
826         for (i = 0; i < adapter->num_rx_queues; i++)
827                 napi_disable(&adapter->rx_ring[i].napi);
828
829         igb_irq_disable(adapter);
830
831         del_timer_sync(&adapter->watchdog_timer);
832         del_timer_sync(&adapter->phy_info_timer);
833
834         netdev->tx_queue_len = adapter->tx_queue_len;
835         netif_carrier_off(netdev);
836         adapter->link_speed = 0;
837         adapter->link_duplex = 0;
838
839         if (!pci_channel_offline(adapter->pdev))
840                 igb_reset(adapter);
841         igb_clean_all_tx_rings(adapter);
842         igb_clean_all_rx_rings(adapter);
843 }
844
845 void igb_reinit_locked(struct igb_adapter *adapter)
846 {
847         WARN_ON(in_interrupt());
848         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
849                 msleep(1);
850         igb_down(adapter);
851         igb_up(adapter);
852         clear_bit(__IGB_RESETTING, &adapter->state);
853 }
854
855 void igb_reset(struct igb_adapter *adapter)
856 {
857         struct e1000_hw *hw = &adapter->hw;
858         struct e1000_mac_info *mac = &hw->mac;
859         struct e1000_fc_info *fc = &hw->fc;
860         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
861         u16 hwm;
862
863         /* Repartition Pba for greater than 9k mtu
864          * To take effect CTRL.RST is required.
865          */
866         if (mac->type != e1000_82576) {
867         pba = E1000_PBA_34K;
868         }
869         else {
870                 pba = E1000_PBA_64K;
871         }
872
873         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
874             (mac->type < e1000_82576)) {
875                 /* adjust PBA for jumbo frames */
876                 wr32(E1000_PBA, pba);
877
878                 /* To maintain wire speed transmits, the Tx FIFO should be
879                  * large enough to accommodate two full transmit packets,
880                  * rounded up to the next 1KB and expressed in KB.  Likewise,
881                  * the Rx FIFO should be large enough to accommodate at least
882                  * one full receive packet and is similarly rounded up and
883                  * expressed in KB. */
884                 pba = rd32(E1000_PBA);
885                 /* upper 16 bits has Tx packet buffer allocation size in KB */
886                 tx_space = pba >> 16;
887                 /* lower 16 bits has Rx packet buffer allocation size in KB */
888                 pba &= 0xffff;
889                 /* the tx fifo also stores 16 bytes of information about the tx
890                  * but don't include ethernet FCS because hardware appends it */
891                 min_tx_space = (adapter->max_frame_size +
892                                 sizeof(struct e1000_tx_desc) -
893                                 ETH_FCS_LEN) * 2;
894                 min_tx_space = ALIGN(min_tx_space, 1024);
895                 min_tx_space >>= 10;
896                 /* software strips receive CRC, so leave room for it */
897                 min_rx_space = adapter->max_frame_size;
898                 min_rx_space = ALIGN(min_rx_space, 1024);
899                 min_rx_space >>= 10;
900
901                 /* If current Tx allocation is less than the min Tx FIFO size,
902                  * and the min Tx FIFO size is less than the current Rx FIFO
903                  * allocation, take space away from current Rx allocation */
904                 if (tx_space < min_tx_space &&
905                     ((min_tx_space - tx_space) < pba)) {
906                         pba = pba - (min_tx_space - tx_space);
907
908                         /* if short on rx space, rx wins and must trump tx
909                          * adjustment */
910                         if (pba < min_rx_space)
911                                 pba = min_rx_space;
912                 }
913                 wr32(E1000_PBA, pba);
914         }
915
916         /* flow control settings */
917         /* The high water mark must be low enough to fit one full frame
918          * (or the size used for early receive) above it in the Rx FIFO.
919          * Set it to the lower of:
920          * - 90% of the Rx FIFO size, or
921          * - the full Rx FIFO size minus one full frame */
922         hwm = min(((pba << 10) * 9 / 10),
923                         ((pba << 10) - 2 * adapter->max_frame_size));
924
925         if (mac->type < e1000_82576) {
926                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
927                 fc->low_water = fc->high_water - 8;
928         } else {
929                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
930                 fc->low_water = fc->high_water - 16;
931         }
932         fc->pause_time = 0xFFFF;
933         fc->send_xon = 1;
934         fc->type = fc->original_type;
935
936         /* Allow time for pending master requests to run */
937         adapter->hw.mac.ops.reset_hw(&adapter->hw);
938         wr32(E1000_WUC, 0);
939
940         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
941                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
942
943         igb_update_mng_vlan(adapter);
944
945         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
946         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
947
948         igb_reset_adaptive(&adapter->hw);
949         if (adapter->hw.phy.ops.get_phy_info)
950                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
951 }
952
953 /**
954  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
955  * @pdev: PCI device information struct
956  *
957  * Returns true if an adapter needs ioport resources
958  **/
959 static int igb_is_need_ioport(struct pci_dev *pdev)
960 {
961         switch (pdev->device) {
962         /* Currently there are no adapters that need ioport resources */
963         default:
964                 return false;
965         }
966 }
967
968 /**
969  * igb_probe - Device Initialization Routine
970  * @pdev: PCI device information struct
971  * @ent: entry in igb_pci_tbl
972  *
973  * Returns 0 on success, negative on failure
974  *
975  * igb_probe initializes an adapter identified by a pci_dev structure.
976  * The OS initialization, configuring of the adapter private structure,
977  * and a hardware reset occur.
978  **/
979 static int __devinit igb_probe(struct pci_dev *pdev,
980                                const struct pci_device_id *ent)
981 {
982         struct net_device *netdev;
983         struct igb_adapter *adapter;
984         struct e1000_hw *hw;
985         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
986         unsigned long mmio_start, mmio_len;
987         int i, err, pci_using_dac;
988         u16 eeprom_data = 0;
989         u16 eeprom_apme_mask = IGB_EEPROM_APME;
990         u32 part_num;
991         int bars, need_ioport;
992
993         /* do not allocate ioport bars when not needed */
994         need_ioport = igb_is_need_ioport(pdev);
995         if (need_ioport) {
996                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
997                 err = pci_enable_device(pdev);
998         } else {
999                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1000                 err = pci_enable_device_mem(pdev);
1001         }
1002         if (err)
1003                 return err;
1004
1005         pci_using_dac = 0;
1006         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1007         if (!err) {
1008                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1009                 if (!err)
1010                         pci_using_dac = 1;
1011         } else {
1012                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1013                 if (err) {
1014                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1015                         if (err) {
1016                                 dev_err(&pdev->dev, "No usable DMA "
1017                                         "configuration, aborting\n");
1018                                 goto err_dma;
1019                         }
1020                 }
1021         }
1022
1023         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1024         if (err)
1025                 goto err_pci_reg;
1026
1027         pci_set_master(pdev);
1028         pci_save_state(pdev);
1029
1030         err = -ENOMEM;
1031 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1032         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1033 #else
1034         netdev = alloc_etherdev(sizeof(struct igb_adapter));
1035 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
1036         if (!netdev)
1037                 goto err_alloc_etherdev;
1038
1039         SET_NETDEV_DEV(netdev, &pdev->dev);
1040
1041         pci_set_drvdata(pdev, netdev);
1042         adapter = netdev_priv(netdev);
1043         adapter->netdev = netdev;
1044         adapter->pdev = pdev;
1045         hw = &adapter->hw;
1046         hw->back = adapter;
1047         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1048         adapter->bars = bars;
1049         adapter->need_ioport = need_ioport;
1050
1051         mmio_start = pci_resource_start(pdev, 0);
1052         mmio_len = pci_resource_len(pdev, 0);
1053
1054         err = -EIO;
1055         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1056         if (!adapter->hw.hw_addr)
1057                 goto err_ioremap;
1058
1059         netdev->open = &igb_open;
1060         netdev->stop = &igb_close;
1061         netdev->get_stats = &igb_get_stats;
1062         netdev->set_multicast_list = &igb_set_multi;
1063         netdev->set_mac_address = &igb_set_mac;
1064         netdev->change_mtu = &igb_change_mtu;
1065         netdev->do_ioctl = &igb_ioctl;
1066         igb_set_ethtool_ops(netdev);
1067         netdev->tx_timeout = &igb_tx_timeout;
1068         netdev->watchdog_timeo = 5 * HZ;
1069         netdev->vlan_rx_register = igb_vlan_rx_register;
1070         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1071         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1072 #ifdef CONFIG_NET_POLL_CONTROLLER
1073         netdev->poll_controller = igb_netpoll;
1074 #endif
1075         netdev->hard_start_xmit = &igb_xmit_frame_adv;
1076
1077         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1078
1079         netdev->mem_start = mmio_start;
1080         netdev->mem_end = mmio_start + mmio_len;
1081
1082         /* PCI config space info */
1083         hw->vendor_id = pdev->vendor;
1084         hw->device_id = pdev->device;
1085         hw->revision_id = pdev->revision;
1086         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1087         hw->subsystem_device_id = pdev->subsystem_device;
1088
1089         /* setup the private structure */
1090         hw->back = adapter;
1091         /* Copy the default MAC, PHY and NVM function pointers */
1092         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1093         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1094         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1095         /* Initialize skew-specific constants */
1096         err = ei->get_invariants(hw);
1097         if (err)
1098                 goto err_hw_init;
1099
1100         err = igb_sw_init(adapter);
1101         if (err)
1102                 goto err_sw_init;
1103
1104         igb_get_bus_info_pcie(hw);
1105
1106         /* set flags */
1107         switch (hw->mac.type) {
1108         case e1000_82576:
1109         case e1000_82575:
1110                 adapter->flags |= IGB_FLAG_HAS_DCA;
1111                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1112                 break;
1113         default:
1114                 break;
1115         }
1116
1117         hw->phy.autoneg_wait_to_complete = false;
1118         hw->mac.adaptive_ifs = true;
1119
1120         /* Copper options */
1121         if (hw->phy.media_type == e1000_media_type_copper) {
1122                 hw->phy.mdix = AUTO_ALL_MODES;
1123                 hw->phy.disable_polarity_correction = false;
1124                 hw->phy.ms_type = e1000_ms_hw_default;
1125         }
1126
1127         if (igb_check_reset_block(hw))
1128                 dev_info(&pdev->dev,
1129                         "PHY reset is blocked due to SOL/IDER session.\n");
1130
1131         netdev->features = NETIF_F_SG |
1132                            NETIF_F_HW_CSUM |
1133                            NETIF_F_HW_VLAN_TX |
1134                            NETIF_F_HW_VLAN_RX |
1135                            NETIF_F_HW_VLAN_FILTER;
1136
1137         netdev->features |= NETIF_F_TSO;
1138         netdev->features |= NETIF_F_TSO6;
1139
1140 #ifdef CONFIG_IGB_LRO
1141         netdev->features |= NETIF_F_LRO;
1142 #endif
1143
1144         netdev->vlan_features |= NETIF_F_TSO;
1145         netdev->vlan_features |= NETIF_F_TSO6;
1146         netdev->vlan_features |= NETIF_F_HW_CSUM;
1147         netdev->vlan_features |= NETIF_F_SG;
1148
1149         if (pci_using_dac)
1150                 netdev->features |= NETIF_F_HIGHDMA;
1151
1152 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1153         netdev->features |= NETIF_F_MULTI_QUEUE;
1154 #endif
1155
1156         netdev->features |= NETIF_F_LLTX;
1157         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1158
1159         /* before reading the NVM, reset the controller to put the device in a
1160          * known good starting state */
1161         hw->mac.ops.reset_hw(hw);
1162
1163         /* make sure the NVM is good */
1164         if (igb_validate_nvm_checksum(hw) < 0) {
1165                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1166                 err = -EIO;
1167                 goto err_eeprom;
1168         }
1169
1170         /* copy the MAC address out of the NVM */
1171         if (hw->mac.ops.read_mac_addr(hw))
1172                 dev_err(&pdev->dev, "NVM Read Error\n");
1173
1174         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1175         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1176
1177         if (!is_valid_ether_addr(netdev->perm_addr)) {
1178                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1179                 err = -EIO;
1180                 goto err_eeprom;
1181         }
1182
1183         init_timer(&adapter->watchdog_timer);
1184         adapter->watchdog_timer.function = &igb_watchdog;
1185         adapter->watchdog_timer.data = (unsigned long) adapter;
1186
1187         init_timer(&adapter->phy_info_timer);
1188         adapter->phy_info_timer.function = &igb_update_phy_info;
1189         adapter->phy_info_timer.data = (unsigned long) adapter;
1190
1191         INIT_WORK(&adapter->reset_task, igb_reset_task);
1192         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1193
1194         /* Initialize link & ring properties that are user-changeable */
1195         adapter->tx_ring->count = 256;
1196         for (i = 0; i < adapter->num_tx_queues; i++)
1197                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1198         adapter->rx_ring->count = 256;
1199         for (i = 0; i < adapter->num_rx_queues; i++)
1200                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1201
1202         adapter->fc_autoneg = true;
1203         hw->mac.autoneg = true;
1204         hw->phy.autoneg_advertised = 0x2f;
1205
1206         hw->fc.original_type = e1000_fc_default;
1207         hw->fc.type = e1000_fc_default;
1208
1209         adapter->itr_setting = 3;
1210         adapter->itr = IGB_START_ITR;
1211
1212         igb_validate_mdi_setting(hw);
1213
1214         adapter->rx_csum = 1;
1215
1216         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1217          * enable the ACPI Magic Packet filter
1218          */
1219
1220         if (hw->bus.func == 0 ||
1221             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1222                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1223                                      &eeprom_data);
1224
1225         if (eeprom_data & eeprom_apme_mask)
1226                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1227
1228         /* now that we have the eeprom settings, apply the special cases where
1229          * the eeprom may be wrong or the board simply won't support wake on
1230          * lan on a particular port */
1231         switch (pdev->device) {
1232         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1233                 adapter->eeprom_wol = 0;
1234                 break;
1235         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1236         case E1000_DEV_ID_82576_FIBER:
1237         case E1000_DEV_ID_82576_SERDES:
1238                 /* Wake events only supported on port A for dual fiber
1239                  * regardless of eeprom setting */
1240                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1241                         adapter->eeprom_wol = 0;
1242                 break;
1243         case E1000_DEV_ID_82576_QUAD_COPPER:
1244                 /* if quad port adapter, disable WoL on all but port A */
1245                 if (global_quad_port_a != 0)
1246                         adapter->eeprom_wol = 0;
1247                 else
1248                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1249                 /* Reset for multiple quad port adapters */
1250                 if (++global_quad_port_a == 4)
1251                         global_quad_port_a = 0;
1252                 break;
1253         }
1254
1255         /* initialize the wol settings based on the eeprom settings */
1256         adapter->wol = adapter->eeprom_wol;
1257
1258         /* reset the hardware with the new settings */
1259         igb_reset(adapter);
1260
1261         /* let the f/w know that the h/w is now under the control of the
1262          * driver. */
1263         igb_get_hw_control(adapter);
1264
1265         /* tell the stack to leave us alone until igb_open() is called */
1266         netif_carrier_off(netdev);
1267         netif_stop_queue(netdev);
1268 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1269         for (i = 0; i < adapter->num_tx_queues; i++)
1270                 netif_stop_subqueue(netdev, i);
1271 #endif
1272
1273         strcpy(netdev->name, "eth%d");
1274         err = register_netdev(netdev);
1275         if (err)
1276                 goto err_register;
1277
1278 #ifdef CONFIG_DCA
1279         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1280             (dca_add_requester(&pdev->dev) == 0)) {
1281                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1282                 dev_info(&pdev->dev, "DCA enabled\n");
1283                 /* Always use CB2 mode, difference is masked
1284                  * in the CB driver. */
1285                 wr32(E1000_DCA_CTRL, 2);
1286                 igb_setup_dca(adapter);
1287         }
1288 #endif
1289
1290         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1291         /* print bus type/speed/width info */
1292         dev_info(&pdev->dev,
1293                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1294                  netdev->name,
1295                  ((hw->bus.speed == e1000_bus_speed_2500)
1296                   ? "2.5Gb/s" : "unknown"),
1297                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1298                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1299                   ? "Width x1" : "unknown"),
1300                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1301                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1302
1303         igb_read_part_num(hw, &part_num);
1304         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1305                 (part_num >> 8), (part_num & 0xff));
1306
1307         dev_info(&pdev->dev,
1308                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1309                 adapter->msix_entries ? "MSI-X" :
1310                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1311                 adapter->num_rx_queues, adapter->num_tx_queues);
1312
1313         return 0;
1314
1315 err_register:
1316         igb_release_hw_control(adapter);
1317 err_eeprom:
1318         if (!igb_check_reset_block(hw))
1319                 hw->phy.ops.reset_phy(hw);
1320
1321         if (hw->flash_address)
1322                 iounmap(hw->flash_address);
1323
1324         igb_remove_device(hw);
1325         kfree(adapter->tx_ring);
1326         kfree(adapter->rx_ring);
1327 err_sw_init:
1328 err_hw_init:
1329         iounmap(hw->hw_addr);
1330 err_ioremap:
1331         free_netdev(netdev);
1332 err_alloc_etherdev:
1333         pci_release_selected_regions(pdev, bars);
1334 err_pci_reg:
1335 err_dma:
1336         pci_disable_device(pdev);
1337         return err;
1338 }
1339
1340 /**
1341  * igb_remove - Device Removal Routine
1342  * @pdev: PCI device information struct
1343  *
1344  * igb_remove is called by the PCI subsystem to alert the driver
1345  * that it should release a PCI device.  The could be caused by a
1346  * Hot-Plug event, or because the driver is going to be removed from
1347  * memory.
1348  **/
1349 static void __devexit igb_remove(struct pci_dev *pdev)
1350 {
1351         struct net_device *netdev = pci_get_drvdata(pdev);
1352         struct igb_adapter *adapter = netdev_priv(netdev);
1353         struct e1000_hw *hw = &adapter->hw;
1354
1355         /* flush_scheduled work may reschedule our watchdog task, so
1356          * explicitly disable watchdog tasks from being rescheduled  */
1357         set_bit(__IGB_DOWN, &adapter->state);
1358         del_timer_sync(&adapter->watchdog_timer);
1359         del_timer_sync(&adapter->phy_info_timer);
1360
1361         flush_scheduled_work();
1362
1363 #ifdef CONFIG_DCA
1364         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1365                 dev_info(&pdev->dev, "DCA disabled\n");
1366                 dca_remove_requester(&pdev->dev);
1367                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1368                 wr32(E1000_DCA_CTRL, 1);
1369         }
1370 #endif
1371
1372         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1373          * would have already happened in close and is redundant. */
1374         igb_release_hw_control(adapter);
1375
1376         unregister_netdev(netdev);
1377
1378         if (!igb_check_reset_block(&adapter->hw))
1379                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1380
1381         igb_remove_device(&adapter->hw);
1382         igb_reset_interrupt_capability(adapter);
1383
1384         kfree(adapter->tx_ring);
1385         kfree(adapter->rx_ring);
1386
1387         iounmap(adapter->hw.hw_addr);
1388         if (adapter->hw.flash_address)
1389                 iounmap(adapter->hw.flash_address);
1390         pci_release_selected_regions(pdev, adapter->bars);
1391
1392         free_netdev(netdev);
1393
1394         pci_disable_device(pdev);
1395 }
1396
1397 /**
1398  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1399  * @adapter: board private structure to initialize
1400  *
1401  * igb_sw_init initializes the Adapter private data structure.
1402  * Fields are initialized based on PCI device information and
1403  * OS network device settings (MTU size).
1404  **/
1405 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1406 {
1407         struct e1000_hw *hw = &adapter->hw;
1408         struct net_device *netdev = adapter->netdev;
1409         struct pci_dev *pdev = adapter->pdev;
1410
1411         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1412
1413         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1414         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1415         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1416         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1417
1418         /* Number of supported queues. */
1419         /* Having more queues than CPUs doesn't make sense. */
1420         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1421 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1422         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1423 #else
1424         adapter->num_tx_queues = 1;
1425 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1426
1427         /* This call may decrease the number of queues depending on
1428          * interrupt mode. */
1429         igb_set_interrupt_capability(adapter);
1430
1431         if (igb_alloc_queues(adapter)) {
1432                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1433                 return -ENOMEM;
1434         }
1435
1436         /* Explicitly disable IRQ since the NIC can be in any state. */
1437         igb_irq_disable(adapter);
1438
1439         set_bit(__IGB_DOWN, &adapter->state);
1440         return 0;
1441 }
1442
1443 /**
1444  * igb_open - Called when a network interface is made active
1445  * @netdev: network interface device structure
1446  *
1447  * Returns 0 on success, negative value on failure
1448  *
1449  * The open entry point is called when a network interface is made
1450  * active by the system (IFF_UP).  At this point all resources needed
1451  * for transmit and receive operations are allocated, the interrupt
1452  * handler is registered with the OS, the watchdog timer is started,
1453  * and the stack is notified that the interface is ready.
1454  **/
1455 static int igb_open(struct net_device *netdev)
1456 {
1457         struct igb_adapter *adapter = netdev_priv(netdev);
1458         struct e1000_hw *hw = &adapter->hw;
1459         int err;
1460         int i;
1461
1462         /* disallow open during test */
1463         if (test_bit(__IGB_TESTING, &adapter->state))
1464                 return -EBUSY;
1465
1466         /* allocate transmit descriptors */
1467         err = igb_setup_all_tx_resources(adapter);
1468         if (err)
1469                 goto err_setup_tx;
1470
1471         /* allocate receive descriptors */
1472         err = igb_setup_all_rx_resources(adapter);
1473         if (err)
1474                 goto err_setup_rx;
1475
1476         /* e1000_power_up_phy(adapter); */
1477
1478         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1479         if ((adapter->hw.mng_cookie.status &
1480              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1481                 igb_update_mng_vlan(adapter);
1482
1483         /* before we allocate an interrupt, we must be ready to handle it.
1484          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1485          * as soon as we call pci_request_irq, so we have to setup our
1486          * clean_rx handler before we do so.  */
1487         igb_configure(adapter);
1488
1489         err = igb_request_irq(adapter);
1490         if (err)
1491                 goto err_req_irq;
1492
1493         /* From here on the code is the same as igb_up() */
1494         clear_bit(__IGB_DOWN, &adapter->state);
1495
1496         for (i = 0; i < adapter->num_rx_queues; i++)
1497                 napi_enable(&adapter->rx_ring[i].napi);
1498
1499         /* Clear any pending interrupts. */
1500         rd32(E1000_ICR);
1501
1502         igb_irq_enable(adapter);
1503
1504         /* Fire a link status change interrupt to start the watchdog. */
1505         wr32(E1000_ICS, E1000_ICS_LSC);
1506
1507         return 0;
1508
1509 err_req_irq:
1510         igb_release_hw_control(adapter);
1511         /* e1000_power_down_phy(adapter); */
1512         igb_free_all_rx_resources(adapter);
1513 err_setup_rx:
1514         igb_free_all_tx_resources(adapter);
1515 err_setup_tx:
1516         igb_reset(adapter);
1517
1518         return err;
1519 }
1520
1521 /**
1522  * igb_close - Disables a network interface
1523  * @netdev: network interface device structure
1524  *
1525  * Returns 0, this is not allowed to fail
1526  *
1527  * The close entry point is called when an interface is de-activated
1528  * by the OS.  The hardware is still under the driver's control, but
1529  * needs to be disabled.  A global MAC reset is issued to stop the
1530  * hardware, and all transmit and receive resources are freed.
1531  **/
1532 static int igb_close(struct net_device *netdev)
1533 {
1534         struct igb_adapter *adapter = netdev_priv(netdev);
1535
1536         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1537         igb_down(adapter);
1538
1539         igb_free_irq(adapter);
1540
1541         igb_free_all_tx_resources(adapter);
1542         igb_free_all_rx_resources(adapter);
1543
1544         /* kill manageability vlan ID if supported, but not if a vlan with
1545          * the same ID is registered on the host OS (let 8021q kill it) */
1546         if ((adapter->hw.mng_cookie.status &
1547                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1548              !(adapter->vlgrp &&
1549                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1550                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1551
1552         return 0;
1553 }
1554
1555 /**
1556  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1557  * @adapter: board private structure
1558  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1559  *
1560  * Return 0 on success, negative on failure
1561  **/
1562
1563 int igb_setup_tx_resources(struct igb_adapter *adapter,
1564                            struct igb_ring *tx_ring)
1565 {
1566         struct pci_dev *pdev = adapter->pdev;
1567         int size;
1568
1569         size = sizeof(struct igb_buffer) * tx_ring->count;
1570         tx_ring->buffer_info = vmalloc(size);
1571         if (!tx_ring->buffer_info)
1572                 goto err;
1573         memset(tx_ring->buffer_info, 0, size);
1574
1575         /* round up to nearest 4K */
1576         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1577                         + sizeof(u32);
1578         tx_ring->size = ALIGN(tx_ring->size, 4096);
1579
1580         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1581                                              &tx_ring->dma);
1582
1583         if (!tx_ring->desc)
1584                 goto err;
1585
1586         tx_ring->adapter = adapter;
1587         tx_ring->next_to_use = 0;
1588         tx_ring->next_to_clean = 0;
1589         return 0;
1590
1591 err:
1592         vfree(tx_ring->buffer_info);
1593         dev_err(&adapter->pdev->dev,
1594                 "Unable to allocate memory for the transmit descriptor ring\n");
1595         return -ENOMEM;
1596 }
1597
1598 /**
1599  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1600  *                                (Descriptors) for all queues
1601  * @adapter: board private structure
1602  *
1603  * Return 0 on success, negative on failure
1604  **/
1605 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1606 {
1607         int i, err = 0;
1608 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1609         int r_idx;
1610 #endif  
1611
1612         for (i = 0; i < adapter->num_tx_queues; i++) {
1613                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1614                 if (err) {
1615                         dev_err(&adapter->pdev->dev,
1616                                 "Allocation for Tx Queue %u failed\n", i);
1617                         for (i--; i >= 0; i--)
1618                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1619                         break;
1620                 }
1621         }
1622
1623 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1624         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1625                 r_idx = i % adapter->num_tx_queues;
1626                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1627         }       
1628 #endif          
1629         return err;
1630 }
1631
1632 /**
1633  * igb_configure_tx - Configure transmit Unit after Reset
1634  * @adapter: board private structure
1635  *
1636  * Configure the Tx unit of the MAC after a reset.
1637  **/
1638 static void igb_configure_tx(struct igb_adapter *adapter)
1639 {
1640         u64 tdba, tdwba;
1641         struct e1000_hw *hw = &adapter->hw;
1642         u32 tctl;
1643         u32 txdctl, txctrl;
1644         int i;
1645
1646         for (i = 0; i < adapter->num_tx_queues; i++) {
1647                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1648
1649                 wr32(E1000_TDLEN(i),
1650                                 ring->count * sizeof(struct e1000_tx_desc));
1651                 tdba = ring->dma;
1652                 wr32(E1000_TDBAL(i),
1653                                 tdba & 0x00000000ffffffffULL);
1654                 wr32(E1000_TDBAH(i), tdba >> 32);
1655
1656                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1657                 tdwba |= 1; /* enable head wb */
1658                 wr32(E1000_TDWBAL(i),
1659                                 tdwba & 0x00000000ffffffffULL);
1660                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1661
1662                 ring->head = E1000_TDH(i);
1663                 ring->tail = E1000_TDT(i);
1664                 writel(0, hw->hw_addr + ring->tail);
1665                 writel(0, hw->hw_addr + ring->head);
1666                 txdctl = rd32(E1000_TXDCTL(i));
1667                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1668                 wr32(E1000_TXDCTL(i), txdctl);
1669
1670                 /* Turn off Relaxed Ordering on head write-backs.  The
1671                  * writebacks MUST be delivered in order or it will
1672                  * completely screw up our bookeeping.
1673                  */
1674                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1675                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1676                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1677         }
1678
1679
1680
1681         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1682
1683         /* Program the Transmit Control Register */
1684
1685         tctl = rd32(E1000_TCTL);
1686         tctl &= ~E1000_TCTL_CT;
1687         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1688                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1689
1690         igb_config_collision_dist(hw);
1691
1692         /* Setup Transmit Descriptor Settings for eop descriptor */
1693         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1694
1695         /* Enable transmits */
1696         tctl |= E1000_TCTL_EN;
1697
1698         wr32(E1000_TCTL, tctl);
1699 }
1700
1701 /**
1702  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1703  * @adapter: board private structure
1704  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1705  *
1706  * Returns 0 on success, negative on failure
1707  **/
1708
1709 int igb_setup_rx_resources(struct igb_adapter *adapter,
1710                            struct igb_ring *rx_ring)
1711 {
1712         struct pci_dev *pdev = adapter->pdev;
1713         int size, desc_len;
1714
1715 #ifdef CONFIG_IGB_LRO
1716         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1717         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1718         if (!rx_ring->lro_mgr.lro_arr)
1719                 goto err;
1720         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1721 #endif
1722
1723         size = sizeof(struct igb_buffer) * rx_ring->count;
1724         rx_ring->buffer_info = vmalloc(size);
1725         if (!rx_ring->buffer_info)
1726                 goto err;
1727         memset(rx_ring->buffer_info, 0, size);
1728
1729         desc_len = sizeof(union e1000_adv_rx_desc);
1730
1731         /* Round up to nearest 4K */
1732         rx_ring->size = rx_ring->count * desc_len;
1733         rx_ring->size = ALIGN(rx_ring->size, 4096);
1734
1735         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1736                                              &rx_ring->dma);
1737
1738         if (!rx_ring->desc)
1739                 goto err;
1740
1741         rx_ring->next_to_clean = 0;
1742         rx_ring->next_to_use = 0;
1743
1744         rx_ring->adapter = adapter;
1745
1746         return 0;
1747
1748 err:
1749 #ifdef CONFIG_IGB_LRO
1750         vfree(rx_ring->lro_mgr.lro_arr);
1751         rx_ring->lro_mgr.lro_arr = NULL;
1752 #endif
1753         vfree(rx_ring->buffer_info);
1754         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1755                 "the receive descriptor ring\n");
1756         return -ENOMEM;
1757 }
1758
1759 /**
1760  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1761  *                                (Descriptors) for all queues
1762  * @adapter: board private structure
1763  *
1764  * Return 0 on success, negative on failure
1765  **/
1766 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1767 {
1768         int i, err = 0;
1769
1770         for (i = 0; i < adapter->num_rx_queues; i++) {
1771                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1772                 if (err) {
1773                         dev_err(&adapter->pdev->dev,
1774                                 "Allocation for Rx Queue %u failed\n", i);
1775                         for (i--; i >= 0; i--)
1776                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1777                         break;
1778                 }
1779         }
1780
1781         return err;
1782 }
1783
1784 /**
1785  * igb_setup_rctl - configure the receive control registers
1786  * @adapter: Board private structure
1787  **/
1788 static void igb_setup_rctl(struct igb_adapter *adapter)
1789 {
1790         struct e1000_hw *hw = &adapter->hw;
1791         u32 rctl;
1792         u32 srrctl = 0;
1793         int i;
1794
1795         rctl = rd32(E1000_RCTL);
1796
1797         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1798
1799         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1800                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1801                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1802
1803         /*
1804          * enable stripping of CRC. It's unlikely this will break BMC
1805          * redirection as it did with e1000. Newer features require
1806          * that the HW strips the CRC.
1807         */
1808         rctl |= E1000_RCTL_SECRC;
1809
1810         rctl &= ~E1000_RCTL_SBP;
1811
1812         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1813                 rctl &= ~E1000_RCTL_LPE;
1814         else
1815                 rctl |= E1000_RCTL_LPE;
1816         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1817                 /* Setup buffer sizes */
1818                 rctl &= ~E1000_RCTL_SZ_4096;
1819                 rctl |= E1000_RCTL_BSEX;
1820                 switch (adapter->rx_buffer_len) {
1821                 case IGB_RXBUFFER_256:
1822                         rctl |= E1000_RCTL_SZ_256;
1823                         rctl &= ~E1000_RCTL_BSEX;
1824                         break;
1825                 case IGB_RXBUFFER_512:
1826                         rctl |= E1000_RCTL_SZ_512;
1827                         rctl &= ~E1000_RCTL_BSEX;
1828                         break;
1829                 case IGB_RXBUFFER_1024:
1830                         rctl |= E1000_RCTL_SZ_1024;
1831                         rctl &= ~E1000_RCTL_BSEX;
1832                         break;
1833                 case IGB_RXBUFFER_2048:
1834                 default:
1835                         rctl |= E1000_RCTL_SZ_2048;
1836                         rctl &= ~E1000_RCTL_BSEX;
1837                         break;
1838                 }
1839         } else {
1840                 rctl &= ~E1000_RCTL_BSEX;
1841                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1842         }
1843
1844         /* 82575 and greater support packet-split where the protocol
1845          * header is placed in skb->data and the packet data is
1846          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1847          * In the case of a non-split, skb->data is linearly filled,
1848          * followed by the page buffers.  Therefore, skb->data is
1849          * sized to hold the largest protocol header.
1850          */
1851         /* allocations using alloc_page take too long for regular MTU
1852          * so only enable packet split for jumbo frames */
1853         if (rctl & E1000_RCTL_LPE) {
1854                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1855                 srrctl |= adapter->rx_ps_hdr_size <<
1856                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1857                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1858         } else {
1859                 adapter->rx_ps_hdr_size = 0;
1860                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1861         }
1862
1863         for (i = 0; i < adapter->num_rx_queues; i++)
1864                 wr32(E1000_SRRCTL(i), srrctl);
1865
1866         wr32(E1000_RCTL, rctl);
1867 }
1868
1869 /**
1870  * igb_configure_rx - Configure receive Unit after Reset
1871  * @adapter: board private structure
1872  *
1873  * Configure the Rx unit of the MAC after a reset.
1874  **/
1875 static void igb_configure_rx(struct igb_adapter *adapter)
1876 {
1877         u64 rdba;
1878         struct e1000_hw *hw = &adapter->hw;
1879         u32 rctl, rxcsum;
1880         u32 rxdctl;
1881         int i;
1882
1883         /* disable receives while setting up the descriptors */
1884         rctl = rd32(E1000_RCTL);
1885         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1886         wrfl();
1887         mdelay(10);
1888
1889         if (adapter->itr_setting > 3)
1890                 wr32(E1000_ITR,
1891                                 1000000000 / (adapter->itr * 256));
1892
1893         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1894          * the Base and Length of the Rx Descriptor Ring */
1895         for (i = 0; i < adapter->num_rx_queues; i++) {
1896                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1897                 rdba = ring->dma;
1898                 wr32(E1000_RDBAL(i),
1899                                 rdba & 0x00000000ffffffffULL);
1900                 wr32(E1000_RDBAH(i), rdba >> 32);
1901                 wr32(E1000_RDLEN(i),
1902                                ring->count * sizeof(union e1000_adv_rx_desc));
1903
1904                 ring->head = E1000_RDH(i);
1905                 ring->tail = E1000_RDT(i);
1906                 writel(0, hw->hw_addr + ring->tail);
1907                 writel(0, hw->hw_addr + ring->head);
1908
1909                 rxdctl = rd32(E1000_RXDCTL(i));
1910                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1911                 rxdctl &= 0xFFF00000;
1912                 rxdctl |= IGB_RX_PTHRESH;
1913                 rxdctl |= IGB_RX_HTHRESH << 8;
1914                 rxdctl |= IGB_RX_WTHRESH << 16;
1915                 wr32(E1000_RXDCTL(i), rxdctl);
1916 #ifdef CONFIG_IGB_LRO
1917                 /* Intitial LRO Settings */
1918                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1919                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1920                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1921                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1922                 ring->lro_mgr.dev = adapter->netdev;
1923                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1924                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1925 #endif
1926         }
1927
1928         if (adapter->num_rx_queues > 1) {
1929                 u32 random[10];
1930                 u32 mrqc;
1931                 u32 j, shift;
1932                 union e1000_reta {
1933                         u32 dword;
1934                         u8  bytes[4];
1935                 } reta;
1936
1937                 get_random_bytes(&random[0], 40);
1938
1939                 if (hw->mac.type >= e1000_82576)
1940                         shift = 0;
1941                 else
1942                         shift = 6;
1943                 for (j = 0; j < (32 * 4); j++) {
1944                         reta.bytes[j & 3] =
1945                                 (j % adapter->num_rx_queues) << shift;
1946                         if ((j & 3) == 3)
1947                                 writel(reta.dword,
1948                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1949                 }
1950                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1951
1952                 /* Fill out hash function seeds */
1953                 for (j = 0; j < 10; j++)
1954                         array_wr32(E1000_RSSRK(0), j, random[j]);
1955
1956                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1957                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1958                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1959                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1960                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1961                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1962                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1963                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1964
1965
1966                 wr32(E1000_MRQC, mrqc);
1967
1968                 /* Multiqueue and raw packet checksumming are mutually
1969                  * exclusive.  Note that this not the same as TCP/IP
1970                  * checksumming, which works fine. */
1971                 rxcsum = rd32(E1000_RXCSUM);
1972                 rxcsum |= E1000_RXCSUM_PCSD;
1973                 wr32(E1000_RXCSUM, rxcsum);
1974         } else {
1975                 /* Enable Receive Checksum Offload for TCP and UDP */
1976                 rxcsum = rd32(E1000_RXCSUM);
1977                 if (adapter->rx_csum) {
1978                         rxcsum |= E1000_RXCSUM_TUOFL;
1979
1980                         /* Enable IPv4 payload checksum for UDP fragments
1981                          * Must be used in conjunction with packet-split. */
1982                         if (adapter->rx_ps_hdr_size)
1983                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1984                 } else {
1985                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1986                         /* don't need to clear IPPCSE as it defaults to 0 */
1987                 }
1988                 wr32(E1000_RXCSUM, rxcsum);
1989         }
1990
1991         if (adapter->vlgrp)
1992                 wr32(E1000_RLPML,
1993                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1994         else
1995                 wr32(E1000_RLPML, adapter->max_frame_size);
1996
1997         /* Enable Receives */
1998         wr32(E1000_RCTL, rctl);
1999 }
2000
2001 /**
2002  * igb_free_tx_resources - Free Tx Resources per Queue
2003  * @adapter: board private structure
2004  * @tx_ring: Tx descriptor ring for a specific queue
2005  *
2006  * Free all transmit software resources
2007  **/
2008 static void igb_free_tx_resources(struct igb_ring *tx_ring)
2009 {
2010         struct pci_dev *pdev = tx_ring->adapter->pdev;
2011
2012         igb_clean_tx_ring(tx_ring);
2013
2014         vfree(tx_ring->buffer_info);
2015         tx_ring->buffer_info = NULL;
2016
2017         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2018
2019         tx_ring->desc = NULL;
2020 }
2021
2022 /**
2023  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2024  * @adapter: board private structure
2025  *
2026  * Free all transmit software resources
2027  **/
2028 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2029 {
2030         int i;
2031
2032         for (i = 0; i < adapter->num_tx_queues; i++)
2033                 igb_free_tx_resources(&adapter->tx_ring[i]);
2034 }
2035
2036 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2037                                            struct igb_buffer *buffer_info)
2038 {
2039         if (buffer_info->dma) {
2040                 pci_unmap_page(adapter->pdev,
2041                                 buffer_info->dma,
2042                                 buffer_info->length,
2043                                 PCI_DMA_TODEVICE);
2044                 buffer_info->dma = 0;
2045         }
2046         if (buffer_info->skb) {
2047                 dev_kfree_skb_any(buffer_info->skb);
2048                 buffer_info->skb = NULL;
2049         }
2050         buffer_info->time_stamp = 0;
2051         /* buffer_info must be completely set up in the transmit path */
2052 }
2053
2054 /**
2055  * igb_clean_tx_ring - Free Tx Buffers
2056  * @adapter: board private structure
2057  * @tx_ring: ring to be cleaned
2058  **/
2059 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2060 {
2061         struct igb_adapter *adapter = tx_ring->adapter;
2062         struct igb_buffer *buffer_info;
2063         unsigned long size;
2064         unsigned int i;
2065
2066         if (!tx_ring->buffer_info)
2067                 return;
2068         /* Free all the Tx ring sk_buffs */
2069
2070         for (i = 0; i < tx_ring->count; i++) {
2071                 buffer_info = &tx_ring->buffer_info[i];
2072                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2073         }
2074
2075         size = sizeof(struct igb_buffer) * tx_ring->count;
2076         memset(tx_ring->buffer_info, 0, size);
2077
2078         /* Zero out the descriptor ring */
2079
2080         memset(tx_ring->desc, 0, tx_ring->size);
2081
2082         tx_ring->next_to_use = 0;
2083         tx_ring->next_to_clean = 0;
2084
2085         writel(0, adapter->hw.hw_addr + tx_ring->head);
2086         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2087 }
2088
2089 /**
2090  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2091  * @adapter: board private structure
2092  **/
2093 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2094 {
2095         int i;
2096
2097         for (i = 0; i < adapter->num_tx_queues; i++)
2098                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2099 }
2100
2101 /**
2102  * igb_free_rx_resources - Free Rx Resources
2103  * @adapter: board private structure
2104  * @rx_ring: ring to clean the resources from
2105  *
2106  * Free all receive software resources
2107  **/
2108 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2109 {
2110         struct pci_dev *pdev = rx_ring->adapter->pdev;
2111
2112         igb_clean_rx_ring(rx_ring);
2113
2114         vfree(rx_ring->buffer_info);
2115         rx_ring->buffer_info = NULL;
2116
2117 #ifdef CONFIG_IGB_LRO
2118         vfree(rx_ring->lro_mgr.lro_arr);
2119         rx_ring->lro_mgr.lro_arr = NULL;
2120 #endif 
2121
2122         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2123
2124         rx_ring->desc = NULL;
2125 }
2126
2127 /**
2128  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2129  * @adapter: board private structure
2130  *
2131  * Free all receive software resources
2132  **/
2133 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2134 {
2135         int i;
2136
2137         for (i = 0; i < adapter->num_rx_queues; i++)
2138                 igb_free_rx_resources(&adapter->rx_ring[i]);
2139 }
2140
2141 /**
2142  * igb_clean_rx_ring - Free Rx Buffers per Queue
2143  * @adapter: board private structure
2144  * @rx_ring: ring to free buffers from
2145  **/
2146 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2147 {
2148         struct igb_adapter *adapter = rx_ring->adapter;
2149         struct igb_buffer *buffer_info;
2150         struct pci_dev *pdev = adapter->pdev;
2151         unsigned long size;
2152         unsigned int i;
2153
2154         if (!rx_ring->buffer_info)
2155                 return;
2156         /* Free all the Rx ring sk_buffs */
2157         for (i = 0; i < rx_ring->count; i++) {
2158                 buffer_info = &rx_ring->buffer_info[i];
2159                 if (buffer_info->dma) {
2160                         if (adapter->rx_ps_hdr_size)
2161                                 pci_unmap_single(pdev, buffer_info->dma,
2162                                                  adapter->rx_ps_hdr_size,
2163                                                  PCI_DMA_FROMDEVICE);
2164                         else
2165                                 pci_unmap_single(pdev, buffer_info->dma,
2166                                                  adapter->rx_buffer_len,
2167                                                  PCI_DMA_FROMDEVICE);
2168                         buffer_info->dma = 0;
2169                 }
2170
2171                 if (buffer_info->skb) {
2172                         dev_kfree_skb(buffer_info->skb);
2173                         buffer_info->skb = NULL;
2174                 }
2175                 if (buffer_info->page) {
2176                         if (buffer_info->page_dma)
2177                                 pci_unmap_page(pdev, buffer_info->page_dma,
2178                                                PAGE_SIZE / 2,
2179                                                PCI_DMA_FROMDEVICE);
2180                         put_page(buffer_info->page);
2181                         buffer_info->page = NULL;
2182                         buffer_info->page_dma = 0;
2183                         buffer_info->page_offset = 0;
2184                 }
2185         }
2186
2187         size = sizeof(struct igb_buffer) * rx_ring->count;
2188         memset(rx_ring->buffer_info, 0, size);
2189
2190         /* Zero out the descriptor ring */
2191         memset(rx_ring->desc, 0, rx_ring->size);
2192
2193         rx_ring->next_to_clean = 0;
2194         rx_ring->next_to_use = 0;
2195
2196         writel(0, adapter->hw.hw_addr + rx_ring->head);
2197         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2198 }
2199
2200 /**
2201  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2202  * @adapter: board private structure
2203  **/
2204 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2205 {
2206         int i;
2207
2208         for (i = 0; i < adapter->num_rx_queues; i++)
2209                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2210 }
2211
2212 /**
2213  * igb_set_mac - Change the Ethernet Address of the NIC
2214  * @netdev: network interface device structure
2215  * @p: pointer to an address structure
2216  *
2217  * Returns 0 on success, negative on failure
2218  **/
2219 static int igb_set_mac(struct net_device *netdev, void *p)
2220 {
2221         struct igb_adapter *adapter = netdev_priv(netdev);
2222         struct sockaddr *addr = p;
2223
2224         if (!is_valid_ether_addr(addr->sa_data))
2225                 return -EADDRNOTAVAIL;
2226
2227         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2228         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2229
2230         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2231
2232         return 0;
2233 }
2234
2235 /**
2236  * igb_set_multi - Multicast and Promiscuous mode set
2237  * @netdev: network interface device structure
2238  *
2239  * The set_multi entry point is called whenever the multicast address
2240  * list or the network interface flags are updated.  This routine is
2241  * responsible for configuring the hardware for proper multicast,
2242  * promiscuous mode, and all-multi behavior.
2243  **/
2244 static void igb_set_multi(struct net_device *netdev)
2245 {
2246         struct igb_adapter *adapter = netdev_priv(netdev);
2247         struct e1000_hw *hw = &adapter->hw;
2248         struct e1000_mac_info *mac = &hw->mac;
2249         struct dev_mc_list *mc_ptr;
2250         u8  *mta_list;
2251         u32 rctl;
2252         int i;
2253
2254         /* Check for Promiscuous and All Multicast modes */
2255
2256         rctl = rd32(E1000_RCTL);
2257
2258         if (netdev->flags & IFF_PROMISC)
2259                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2260         else if (netdev->flags & IFF_ALLMULTI) {
2261                 rctl |= E1000_RCTL_MPE;
2262                 rctl &= ~E1000_RCTL_UPE;
2263         } else
2264                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2265
2266         wr32(E1000_RCTL, rctl);
2267
2268         if (!netdev->mc_count) {
2269                 /* nothing to program, so clear mc list */
2270                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2271                                           mac->rar_entry_count);
2272                 return;
2273         }
2274
2275         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2276         if (!mta_list)
2277                 return;
2278
2279         /* The shared function expects a packed array of only addresses. */
2280         mc_ptr = netdev->mc_list;
2281
2282         for (i = 0; i < netdev->mc_count; i++) {
2283                 if (!mc_ptr)
2284                         break;
2285                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2286                 mc_ptr = mc_ptr->next;
2287         }
2288         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2289                                       mac->rar_entry_count);
2290         kfree(mta_list);
2291 }
2292
2293 /* Need to wait a few seconds after link up to get diagnostic information from
2294  * the phy */
2295 static void igb_update_phy_info(unsigned long data)
2296 {
2297         struct igb_adapter *adapter = (struct igb_adapter *) data;
2298         if (adapter->hw.phy.ops.get_phy_info)
2299                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2300 }
2301
2302 /**
2303  * igb_watchdog - Timer Call-back
2304  * @data: pointer to adapter cast into an unsigned long
2305  **/
2306 static void igb_watchdog(unsigned long data)
2307 {
2308         struct igb_adapter *adapter = (struct igb_adapter *)data;
2309         /* Do the rest outside of interrupt context */
2310         schedule_work(&adapter->watchdog_task);
2311 }
2312
2313 static void igb_watchdog_task(struct work_struct *work)
2314 {
2315         struct igb_adapter *adapter = container_of(work,
2316                                         struct igb_adapter, watchdog_task);
2317         struct e1000_hw *hw = &adapter->hw;
2318
2319         struct net_device *netdev = adapter->netdev;
2320         struct igb_ring *tx_ring = adapter->tx_ring;
2321         struct e1000_mac_info *mac = &adapter->hw.mac;
2322         u32 link;
2323         s32 ret_val;
2324 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2325         int i;
2326 #endif
2327
2328         if ((netif_carrier_ok(netdev)) &&
2329             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2330                 goto link_up;
2331
2332         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2333         if ((ret_val == E1000_ERR_PHY) &&
2334             (hw->phy.type == e1000_phy_igp_3) &&
2335             (rd32(E1000_CTRL) &
2336              E1000_PHY_CTRL_GBE_DISABLE))
2337                 dev_info(&adapter->pdev->dev,
2338                          "Gigabit has been disabled, downgrading speed\n");
2339
2340         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2341             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2342                 link = mac->serdes_has_link;
2343         else
2344                 link = rd32(E1000_STATUS) &
2345                                       E1000_STATUS_LU;
2346
2347         if (link) {
2348                 if (!netif_carrier_ok(netdev)) {
2349                         u32 ctrl;
2350                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2351                                                    &adapter->link_speed,
2352                                                    &adapter->link_duplex);
2353
2354                         ctrl = rd32(E1000_CTRL);
2355                         dev_info(&adapter->pdev->dev,
2356                                  "NIC Link is Up %d Mbps %s, "
2357                                  "Flow Control: %s\n",
2358                                  adapter->link_speed,
2359                                  adapter->link_duplex == FULL_DUPLEX ?
2360                                  "Full Duplex" : "Half Duplex",
2361                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2362                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2363                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2364                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2365
2366                         /* tweak tx_queue_len according to speed/duplex and
2367                          * adjust the timeout factor */
2368                         netdev->tx_queue_len = adapter->tx_queue_len;
2369                         adapter->tx_timeout_factor = 1;
2370                         switch (adapter->link_speed) {
2371                         case SPEED_10:
2372                                 netdev->tx_queue_len = 10;
2373                                 adapter->tx_timeout_factor = 14;
2374                                 break;
2375                         case SPEED_100:
2376                                 netdev->tx_queue_len = 100;
2377                                 /* maybe add some timeout factor ? */
2378                                 break;
2379                         }
2380
2381                         netif_carrier_on(netdev);
2382                         netif_wake_queue(netdev);
2383 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2384                         for (i = 0; i < adapter->num_tx_queues; i++)
2385                                 netif_wake_subqueue(netdev, i);
2386 #endif
2387
2388                         if (!test_bit(__IGB_DOWN, &adapter->state))
2389                                 mod_timer(&adapter->phy_info_timer,
2390                                           round_jiffies(jiffies + 2 * HZ));
2391                 }
2392         } else {
2393                 if (netif_carrier_ok(netdev)) {
2394                         adapter->link_speed = 0;
2395                         adapter->link_duplex = 0;
2396                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2397                         netif_carrier_off(netdev);
2398                         netif_stop_queue(netdev);
2399 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2400                         for (i = 0; i < adapter->num_tx_queues; i++)
2401                                 netif_stop_subqueue(netdev, i);
2402 #endif
2403                         if (!test_bit(__IGB_DOWN, &adapter->state))
2404                                 mod_timer(&adapter->phy_info_timer,
2405                                           round_jiffies(jiffies + 2 * HZ));
2406                 }
2407         }
2408
2409 link_up:
2410         igb_update_stats(adapter);
2411
2412         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2413         adapter->tpt_old = adapter->stats.tpt;
2414         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2415         adapter->colc_old = adapter->stats.colc;
2416
2417         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2418         adapter->gorc_old = adapter->stats.gorc;
2419         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2420         adapter->gotc_old = adapter->stats.gotc;
2421
2422         igb_update_adaptive(&adapter->hw);
2423
2424         if (!netif_carrier_ok(netdev)) {
2425                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2426                         /* We've lost link, so the controller stops DMA,
2427                          * but we've got queued Tx work that's never going
2428                          * to get done, so reset controller to flush Tx.
2429                          * (Do the reset outside of interrupt context). */
2430                         adapter->tx_timeout_count++;
2431                         schedule_work(&adapter->reset_task);
2432                 }
2433         }
2434
2435         /* Cause software interrupt to ensure rx ring is cleaned */
2436         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2437
2438         /* Force detection of hung controller every watchdog period */
2439         tx_ring->detect_tx_hung = true;
2440
2441         /* Reset the timer */
2442         if (!test_bit(__IGB_DOWN, &adapter->state))
2443                 mod_timer(&adapter->watchdog_timer,
2444                           round_jiffies(jiffies + 2 * HZ));
2445 }
2446
2447 enum latency_range {
2448         lowest_latency = 0,
2449         low_latency = 1,
2450         bulk_latency = 2,
2451         latency_invalid = 255
2452 };
2453
2454
2455 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2456                               struct igb_ring *rx_ring)
2457 {
2458         struct e1000_hw *hw = &adapter->hw;
2459         int new_val;
2460
2461         new_val = rx_ring->itr_val / 2;
2462         if (new_val < IGB_MIN_DYN_ITR)
2463                 new_val = IGB_MIN_DYN_ITR;
2464
2465         if (new_val != rx_ring->itr_val) {
2466                 rx_ring->itr_val = new_val;
2467                 wr32(rx_ring->itr_register,
2468                                 1000000000 / (new_val * 256));
2469         }
2470 }
2471
2472 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2473                               struct igb_ring *rx_ring)
2474 {
2475         struct e1000_hw *hw = &adapter->hw;
2476         int new_val;
2477
2478         new_val = rx_ring->itr_val * 2;
2479         if (new_val > IGB_MAX_DYN_ITR)
2480                 new_val = IGB_MAX_DYN_ITR;
2481
2482         if (new_val != rx_ring->itr_val) {
2483                 rx_ring->itr_val = new_val;
2484                 wr32(rx_ring->itr_register,
2485                                 1000000000 / (new_val * 256));
2486         }
2487 }
2488
2489 /**
2490  * igb_update_itr - update the dynamic ITR value based on statistics
2491  *      Stores a new ITR value based on packets and byte
2492  *      counts during the last interrupt.  The advantage of per interrupt
2493  *      computation is faster updates and more accurate ITR for the current
2494  *      traffic pattern.  Constants in this function were computed
2495  *      based on theoretical maximum wire speed and thresholds were set based
2496  *      on testing data as well as attempting to minimize response time
2497  *      while increasing bulk throughput.
2498  *      this functionality is controlled by the InterruptThrottleRate module
2499  *      parameter (see igb_param.c)
2500  *      NOTE:  These calculations are only valid when operating in a single-
2501  *             queue environment.
2502  * @adapter: pointer to adapter
2503  * @itr_setting: current adapter->itr
2504  * @packets: the number of packets during this measurement interval
2505  * @bytes: the number of bytes during this measurement interval
2506  **/
2507 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2508                                    int packets, int bytes)
2509 {
2510         unsigned int retval = itr_setting;
2511
2512         if (packets == 0)
2513                 goto update_itr_done;
2514
2515         switch (itr_setting) {
2516         case lowest_latency:
2517                 /* handle TSO and jumbo frames */
2518                 if (bytes/packets > 8000)
2519                         retval = bulk_latency;
2520                 else if ((packets < 5) && (bytes > 512))
2521                         retval = low_latency;
2522                 break;
2523         case low_latency:  /* 50 usec aka 20000 ints/s */
2524                 if (bytes > 10000) {
2525                         /* this if handles the TSO accounting */
2526                         if (bytes/packets > 8000) {
2527                                 retval = bulk_latency;
2528                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2529                                 retval = bulk_latency;
2530                         } else if ((packets > 35)) {
2531                                 retval = lowest_latency;
2532                         }
2533                 } else if (bytes/packets > 2000) {
2534                         retval = bulk_latency;
2535                 } else if (packets <= 2 && bytes < 512) {
2536                         retval = lowest_latency;
2537                 }
2538                 break;
2539         case bulk_latency: /* 250 usec aka 4000 ints/s */
2540                 if (bytes > 25000) {
2541                         if (packets > 35)
2542                                 retval = low_latency;
2543                 } else if (bytes < 6000) {
2544                         retval = low_latency;
2545                 }
2546                 break;
2547         }
2548
2549 update_itr_done:
2550         return retval;
2551 }
2552
2553 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2554                         int rx_only)
2555 {
2556         u16 current_itr;
2557         u32 new_itr = adapter->itr;
2558
2559         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2560         if (adapter->link_speed != SPEED_1000) {
2561                 current_itr = 0;
2562                 new_itr = 4000;
2563                 goto set_itr_now;
2564         }
2565
2566         adapter->rx_itr = igb_update_itr(adapter,
2567                                     adapter->rx_itr,
2568                                     adapter->rx_ring->total_packets,
2569                                     adapter->rx_ring->total_bytes);
2570         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2571         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2572                 adapter->rx_itr = low_latency;
2573
2574         if (!rx_only) {
2575                 adapter->tx_itr = igb_update_itr(adapter,
2576                                             adapter->tx_itr,
2577                                             adapter->tx_ring->total_packets,
2578                                             adapter->tx_ring->total_bytes);
2579                 /* conservative mode (itr 3) eliminates the
2580                  * lowest_latency setting */
2581                 if (adapter->itr_setting == 3 &&
2582                     adapter->tx_itr == lowest_latency)
2583                         adapter->tx_itr = low_latency;
2584
2585                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2586         } else {
2587                 current_itr = adapter->rx_itr;
2588         }
2589
2590         switch (current_itr) {
2591         /* counts and packets in update_itr are dependent on these numbers */
2592         case lowest_latency:
2593                 new_itr = 70000;
2594                 break;
2595         case low_latency:
2596                 new_itr = 20000; /* aka hwitr = ~200 */
2597                 break;
2598         case bulk_latency:
2599                 new_itr = 4000;
2600                 break;
2601         default:
2602                 break;
2603         }
2604
2605 set_itr_now:
2606         if (new_itr != adapter->itr) {
2607                 /* this attempts to bias the interrupt rate towards Bulk
2608                  * by adding intermediate steps when interrupt rate is
2609                  * increasing */
2610                 new_itr = new_itr > adapter->itr ?
2611                              min(adapter->itr + (new_itr >> 2), new_itr) :
2612                              new_itr;
2613                 /* Don't write the value here; it resets the adapter's
2614                  * internal timer, and causes us to delay far longer than
2615                  * we should between interrupts.  Instead, we write the ITR
2616                  * value at the beginning of the next interrupt so the timing
2617                  * ends up being correct.
2618                  */
2619                 adapter->itr = new_itr;
2620                 adapter->set_itr = 1;
2621         }
2622
2623         return;
2624 }
2625
2626
2627 #define IGB_TX_FLAGS_CSUM               0x00000001
2628 #define IGB_TX_FLAGS_VLAN               0x00000002
2629 #define IGB_TX_FLAGS_TSO                0x00000004
2630 #define IGB_TX_FLAGS_IPV4               0x00000008
2631 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2632 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2633
2634 static inline int igb_tso_adv(struct igb_adapter *adapter,
2635                               struct igb_ring *tx_ring,
2636                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2637 {
2638         struct e1000_adv_tx_context_desc *context_desc;
2639         unsigned int i;
2640         int err;
2641         struct igb_buffer *buffer_info;
2642         u32 info = 0, tu_cmd = 0;
2643         u32 mss_l4len_idx, l4len;
2644         *hdr_len = 0;
2645
2646         if (skb_header_cloned(skb)) {
2647                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2648                 if (err)
2649                         return err;
2650         }
2651
2652         l4len = tcp_hdrlen(skb);
2653         *hdr_len += l4len;
2654
2655         if (skb->protocol == htons(ETH_P_IP)) {
2656                 struct iphdr *iph = ip_hdr(skb);
2657                 iph->tot_len = 0;
2658                 iph->check = 0;
2659                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2660                                                          iph->daddr, 0,
2661                                                          IPPROTO_TCP,
2662                                                          0);
2663         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2664                 ipv6_hdr(skb)->payload_len = 0;
2665                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2666                                                        &ipv6_hdr(skb)->daddr,
2667                                                        0, IPPROTO_TCP, 0);
2668         }
2669
2670         i = tx_ring->next_to_use;
2671
2672         buffer_info = &tx_ring->buffer_info[i];
2673         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2674         /* VLAN MACLEN IPLEN */
2675         if (tx_flags & IGB_TX_FLAGS_VLAN)
2676                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2677         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2678         *hdr_len += skb_network_offset(skb);
2679         info |= skb_network_header_len(skb);
2680         *hdr_len += skb_network_header_len(skb);
2681         context_desc->vlan_macip_lens = cpu_to_le32(info);
2682
2683         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2684         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2685
2686         if (skb->protocol == htons(ETH_P_IP))
2687                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2688         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2689
2690         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2691
2692         /* MSS L4LEN IDX */
2693         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2694         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2695
2696         /* Context index must be unique per ring. */
2697         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2698                 mss_l4len_idx |= tx_ring->queue_index << 4;
2699
2700         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2701         context_desc->seqnum_seed = 0;
2702
2703         buffer_info->time_stamp = jiffies;
2704         buffer_info->dma = 0;
2705         i++;
2706         if (i == tx_ring->count)
2707                 i = 0;
2708
2709         tx_ring->next_to_use = i;
2710
2711         return true;
2712 }
2713
2714 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2715                                         struct igb_ring *tx_ring,
2716                                         struct sk_buff *skb, u32 tx_flags)
2717 {
2718         struct e1000_adv_tx_context_desc *context_desc;
2719         unsigned int i;
2720         struct igb_buffer *buffer_info;
2721         u32 info = 0, tu_cmd = 0;
2722
2723         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2724             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2725                 i = tx_ring->next_to_use;
2726                 buffer_info = &tx_ring->buffer_info[i];
2727                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2728
2729                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2730                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2731                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2732                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2733                         info |= skb_network_header_len(skb);
2734
2735                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2736
2737                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2738
2739                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2740                         switch (skb->protocol) {
2741                         case __constant_htons(ETH_P_IP):
2742                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2743                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2744                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2745                                 break;
2746                         case __constant_htons(ETH_P_IPV6):
2747                                 /* XXX what about other V6 headers?? */
2748                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2749                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2750                                 break;
2751                         default:
2752                                 if (unlikely(net_ratelimit()))
2753                                         dev_warn(&adapter->pdev->dev,
2754                                             "partial checksum but proto=%x!\n",
2755                                             skb->protocol);
2756                                 break;
2757                         }
2758                 }
2759
2760                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2761                 context_desc->seqnum_seed = 0;
2762                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2763                         context_desc->mss_l4len_idx =
2764                                 cpu_to_le32(tx_ring->queue_index << 4);
2765
2766                 buffer_info->time_stamp = jiffies;
2767                 buffer_info->dma = 0;
2768
2769                 i++;
2770                 if (i == tx_ring->count)
2771                         i = 0;
2772                 tx_ring->next_to_use = i;
2773
2774                 return true;
2775         }
2776
2777
2778         return false;
2779 }
2780
2781 #define IGB_MAX_TXD_PWR 16
2782 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2783
2784 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2785                                  struct igb_ring *tx_ring,
2786                                  struct sk_buff *skb)
2787 {
2788         struct igb_buffer *buffer_info;
2789         unsigned int len = skb_headlen(skb);
2790         unsigned int count = 0, i;
2791         unsigned int f;
2792
2793         i = tx_ring->next_to_use;
2794
2795         buffer_info = &tx_ring->buffer_info[i];
2796         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2797         buffer_info->length = len;
2798         /* set time_stamp *before* dma to help avoid a possible race */
2799         buffer_info->time_stamp = jiffies;
2800         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2801                                           PCI_DMA_TODEVICE);
2802         count++;
2803         i++;
2804         if (i == tx_ring->count)
2805                 i = 0;
2806
2807         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2808                 struct skb_frag_struct *frag;
2809
2810                 frag = &skb_shinfo(skb)->frags[f];
2811                 len = frag->size;
2812
2813                 buffer_info = &tx_ring->buffer_info[i];
2814                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2815                 buffer_info->length = len;
2816                 buffer_info->time_stamp = jiffies;
2817                 buffer_info->dma = pci_map_page(adapter->pdev,
2818                                                 frag->page,
2819                                                 frag->page_offset,
2820                                                 len,
2821                                                 PCI_DMA_TODEVICE);
2822
2823                 count++;
2824                 i++;
2825                 if (i == tx_ring->count)
2826                         i = 0;
2827         }
2828
2829         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2830         tx_ring->buffer_info[i].skb = skb;
2831
2832         return count;
2833 }
2834
2835 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2836                                     struct igb_ring *tx_ring,
2837                                     int tx_flags, int count, u32 paylen,
2838                                     u8 hdr_len)
2839 {
2840         union e1000_adv_tx_desc *tx_desc = NULL;
2841         struct igb_buffer *buffer_info;
2842         u32 olinfo_status = 0, cmd_type_len;
2843         unsigned int i;
2844
2845         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2846                         E1000_ADVTXD_DCMD_DEXT);
2847
2848         if (tx_flags & IGB_TX_FLAGS_VLAN)
2849                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2850
2851         if (tx_flags & IGB_TX_FLAGS_TSO) {
2852                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2853
2854                 /* insert tcp checksum */
2855                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2856
2857                 /* insert ip checksum */
2858                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2859                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2860
2861         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2862                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2863         }
2864
2865         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2866             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2867                          IGB_TX_FLAGS_VLAN)))
2868                 olinfo_status |= tx_ring->queue_index << 4;
2869
2870         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2871
2872         i = tx_ring->next_to_use;
2873         while (count--) {
2874                 buffer_info = &tx_ring->buffer_info[i];
2875                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2876                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2877                 tx_desc->read.cmd_type_len =
2878                         cpu_to_le32(cmd_type_len | buffer_info->length);
2879                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2880                 i++;
2881                 if (i == tx_ring->count)
2882                         i = 0;
2883         }
2884
2885         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2886         /* Force memory writes to complete before letting h/w
2887          * know there are new descriptors to fetch.  (Only
2888          * applicable for weak-ordered memory model archs,
2889          * such as IA-64). */
2890         wmb();
2891
2892         tx_ring->next_to_use = i;
2893         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2894         /* we need this if more than one processor can write to our tail
2895          * at a time, it syncronizes IO on IA64/Altix systems */
2896         mmiowb();
2897 }
2898
2899 static int __igb_maybe_stop_tx(struct net_device *netdev,
2900                                struct igb_ring *tx_ring, int size)
2901 {
2902         struct igb_adapter *adapter = netdev_priv(netdev);
2903
2904 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2905         netif_stop_subqueue(netdev, tx_ring->queue_index);
2906 #else
2907         netif_stop_queue(netdev);
2908 #endif
2909
2910         /* Herbert's original patch had:
2911          *  smp_mb__after_netif_stop_queue();
2912          * but since that doesn't exist yet, just open code it. */
2913         smp_mb();
2914
2915         /* We need to check again in a case another CPU has just
2916          * made room available. */
2917         if (IGB_DESC_UNUSED(tx_ring) < size)
2918                 return -EBUSY;
2919
2920         /* A reprieve! */
2921 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2922         netif_wake_subqueue(netdev, tx_ring->queue_index);
2923 #else
2924         netif_wake_queue(netdev);
2925 #endif  
2926         ++adapter->restart_queue;
2927         return 0;
2928 }
2929
2930 static int igb_maybe_stop_tx(struct net_device *netdev,
2931                              struct igb_ring *tx_ring, int size)
2932 {
2933         if (IGB_DESC_UNUSED(tx_ring) >= size)
2934                 return 0;
2935         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2936 }
2937
2938 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2939
2940 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2941                                    struct net_device *netdev,
2942                                    struct igb_ring *tx_ring)
2943 {
2944         struct igb_adapter *adapter = netdev_priv(netdev);
2945         unsigned int tx_flags = 0;
2946         unsigned int len;
2947         u8 hdr_len = 0;
2948         int tso = 0;
2949
2950         len = skb_headlen(skb);
2951
2952         if (test_bit(__IGB_DOWN, &adapter->state)) {
2953                 dev_kfree_skb_any(skb);
2954                 return NETDEV_TX_OK;
2955         }
2956
2957         if (skb->len <= 0) {
2958                 dev_kfree_skb_any(skb);
2959                 return NETDEV_TX_OK;
2960         }
2961
2962         /* need: 1 descriptor per page,
2963          *       + 2 desc gap to keep tail from touching head,
2964          *       + 1 desc for skb->data,
2965          *       + 1 desc for context descriptor,
2966          * otherwise try next time */
2967         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2968                 /* this is a hard error */
2969                 return NETDEV_TX_BUSY;
2970         }
2971
2972         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2973                 tx_flags |= IGB_TX_FLAGS_VLAN;
2974                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2975         }
2976
2977         if (skb->protocol == htons(ETH_P_IP))
2978                 tx_flags |= IGB_TX_FLAGS_IPV4;
2979
2980         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2981                                               &hdr_len) : 0;
2982
2983         if (tso < 0) {
2984                 dev_kfree_skb_any(skb);
2985                 return NETDEV_TX_OK;
2986         }
2987
2988         if (tso)
2989                 tx_flags |= IGB_TX_FLAGS_TSO;
2990         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2991                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2992                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2993
2994         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2995                          igb_tx_map_adv(adapter, tx_ring, skb),
2996                          skb->len, hdr_len);
2997
2998         netdev->trans_start = jiffies;
2999
3000         /* Make sure there is space in the ring for the next send. */
3001         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3002
3003         return NETDEV_TX_OK;
3004 }
3005
3006 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3007 {
3008         struct igb_adapter *adapter = netdev_priv(netdev);
3009         struct igb_ring *tx_ring;
3010
3011 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3012         int r_idx = 0;
3013         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3014         tx_ring = adapter->multi_tx_table[r_idx];
3015 #else
3016         tx_ring = &adapter->tx_ring[0];
3017 #endif
3018
3019
3020         /* This goes back to the question of how to logically map a tx queue
3021          * to a flow.  Right now, performance is impacted slightly negatively
3022          * if using multiple tx queues.  If the stack breaks away from a
3023          * single qdisc implementation, we can look at this again. */
3024         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3025 }
3026
3027 /**
3028  * igb_tx_timeout - Respond to a Tx Hang
3029  * @netdev: network interface device structure
3030  **/
3031 static void igb_tx_timeout(struct net_device *netdev)
3032 {
3033         struct igb_adapter *adapter = netdev_priv(netdev);
3034         struct e1000_hw *hw = &adapter->hw;
3035
3036         /* Do the reset outside of interrupt context */
3037         adapter->tx_timeout_count++;
3038         schedule_work(&adapter->reset_task);
3039         wr32(E1000_EICS, adapter->eims_enable_mask &
3040                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3041 }
3042
3043 static void igb_reset_task(struct work_struct *work)
3044 {
3045         struct igb_adapter *adapter;
3046         adapter = container_of(work, struct igb_adapter, reset_task);
3047
3048         igb_reinit_locked(adapter);
3049 }
3050
3051 /**
3052  * igb_get_stats - Get System Network Statistics
3053  * @netdev: network interface device structure
3054  *
3055  * Returns the address of the device statistics structure.
3056  * The statistics are actually updated from the timer callback.
3057  **/
3058 static struct net_device_stats *
3059 igb_get_stats(struct net_device *netdev)
3060 {
3061         struct igb_adapter *adapter = netdev_priv(netdev);
3062
3063         /* only return the current stats */
3064         return &adapter->net_stats;
3065 }
3066
3067 /**
3068  * igb_change_mtu - Change the Maximum Transfer Unit
3069  * @netdev: network interface device structure
3070  * @new_mtu: new value for maximum frame size
3071  *
3072  * Returns 0 on success, negative on failure
3073  **/
3074 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3075 {
3076         struct igb_adapter *adapter = netdev_priv(netdev);
3077         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3078
3079         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3080             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3081                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3082                 return -EINVAL;
3083         }
3084
3085 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3086         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3087                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3088                 return -EINVAL;
3089         }
3090
3091         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3092                 msleep(1);
3093         /* igb_down has a dependency on max_frame_size */
3094         adapter->max_frame_size = max_frame;
3095         if (netif_running(netdev))
3096                 igb_down(adapter);
3097
3098         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3099          * means we reserve 2 more, this pushes us to allocate from the next
3100          * larger slab size.
3101          * i.e. RXBUFFER_2048 --> size-4096 slab
3102          */
3103
3104         if (max_frame <= IGB_RXBUFFER_256)
3105                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3106         else if (max_frame <= IGB_RXBUFFER_512)
3107                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3108         else if (max_frame <= IGB_RXBUFFER_1024)
3109                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3110         else if (max_frame <= IGB_RXBUFFER_2048)
3111                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3112         else
3113 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3114                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3115 #else
3116                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3117 #endif
3118         /* adjust allocation if LPE protects us, and we aren't using SBP */
3119         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3120              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3121                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3122
3123         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3124                  netdev->mtu, new_mtu);
3125         netdev->mtu = new_mtu;
3126
3127         if (netif_running(netdev))
3128                 igb_up(adapter);
3129         else
3130                 igb_reset(adapter);
3131
3132         clear_bit(__IGB_RESETTING, &adapter->state);
3133
3134         return 0;
3135 }
3136
3137 /**
3138  * igb_update_stats - Update the board statistics counters
3139  * @adapter: board private structure
3140  **/
3141
3142 void igb_update_stats(struct igb_adapter *adapter)
3143 {
3144         struct e1000_hw *hw = &adapter->hw;
3145         struct pci_dev *pdev = adapter->pdev;
3146         u16 phy_tmp;
3147
3148 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3149
3150         /*
3151          * Prevent stats update while adapter is being reset, or if the pci
3152          * connection is down.
3153          */
3154         if (adapter->link_speed == 0)
3155                 return;
3156         if (pci_channel_offline(pdev))
3157                 return;
3158
3159         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3160         adapter->stats.gprc += rd32(E1000_GPRC);
3161         adapter->stats.gorc += rd32(E1000_GORCL);
3162         rd32(E1000_GORCH); /* clear GORCL */
3163         adapter->stats.bprc += rd32(E1000_BPRC);
3164         adapter->stats.mprc += rd32(E1000_MPRC);
3165         adapter->stats.roc += rd32(E1000_ROC);
3166
3167         adapter->stats.prc64 += rd32(E1000_PRC64);
3168         adapter->stats.prc127 += rd32(E1000_PRC127);
3169         adapter->stats.prc255 += rd32(E1000_PRC255);
3170         adapter->stats.prc511 += rd32(E1000_PRC511);
3171         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3172         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3173         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3174         adapter->stats.sec += rd32(E1000_SEC);
3175
3176         adapter->stats.mpc += rd32(E1000_MPC);
3177         adapter->stats.scc += rd32(E1000_SCC);
3178         adapter->stats.ecol += rd32(E1000_ECOL);
3179         adapter->stats.mcc += rd32(E1000_MCC);
3180         adapter->stats.latecol += rd32(E1000_LATECOL);
3181         adapter->stats.dc += rd32(E1000_DC);
3182         adapter->stats.rlec += rd32(E1000_RLEC);
3183         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3184         adapter->stats.xontxc += rd32(E1000_XONTXC);
3185         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3186         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3187         adapter->stats.fcruc += rd32(E1000_FCRUC);
3188         adapter->stats.gptc += rd32(E1000_GPTC);
3189         adapter->stats.gotc += rd32(E1000_GOTCL);
3190         rd32(E1000_GOTCH); /* clear GOTCL */
3191         adapter->stats.rnbc += rd32(E1000_RNBC);
3192         adapter->stats.ruc += rd32(E1000_RUC);
3193         adapter->stats.rfc += rd32(E1000_RFC);
3194         adapter->stats.rjc += rd32(E1000_RJC);
3195         adapter->stats.tor += rd32(E1000_TORH);
3196         adapter->stats.tot += rd32(E1000_TOTH);
3197         adapter->stats.tpr += rd32(E1000_TPR);
3198
3199         adapter->stats.ptc64 += rd32(E1000_PTC64);
3200         adapter->stats.ptc127 += rd32(E1000_PTC127);
3201         adapter->stats.ptc255 += rd32(E1000_PTC255);
3202         adapter->stats.ptc511 += rd32(E1000_PTC511);
3203         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3204         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3205
3206         adapter->stats.mptc += rd32(E1000_MPTC);
3207         adapter->stats.bptc += rd32(E1000_BPTC);
3208
3209         /* used for adaptive IFS */
3210
3211         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3212         adapter->stats.tpt += hw->mac.tx_packet_delta;
3213         hw->mac.collision_delta = rd32(E1000_COLC);
3214         adapter->stats.colc += hw->mac.collision_delta;
3215
3216         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3217         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3218         adapter->stats.tncrs += rd32(E1000_TNCRS);
3219         adapter->stats.tsctc += rd32(E1000_TSCTC);
3220         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3221
3222         adapter->stats.iac += rd32(E1000_IAC);
3223         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3224         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3225         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3226         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3227         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3228         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3229         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3230         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3231
3232         /* Fill out the OS statistics structure */
3233         adapter->net_stats.multicast = adapter->stats.mprc;
3234         adapter->net_stats.collisions = adapter->stats.colc;
3235
3236         /* Rx Errors */
3237
3238         /* RLEC on some newer hardware can be incorrect so build
3239         * our own version based on RUC and ROC */
3240         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3241                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3242                 adapter->stats.ruc + adapter->stats.roc +
3243                 adapter->stats.cexterr;
3244         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3245                                               adapter->stats.roc;
3246         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3247         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3248         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3249
3250         /* Tx Errors */
3251         adapter->net_stats.tx_errors = adapter->stats.ecol +
3252                                        adapter->stats.latecol;
3253         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3254         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3255         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3256
3257         /* Tx Dropped needs to be maintained elsewhere */
3258
3259         /* Phy Stats */
3260         if (hw->phy.media_type == e1000_media_type_copper) {
3261                 if ((adapter->link_speed == SPEED_1000) &&
3262                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3263                                               &phy_tmp))) {
3264                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3265                         adapter->phy_stats.idle_errors += phy_tmp;
3266                 }
3267         }
3268
3269         /* Management Stats */
3270         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3271         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3272         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3273 }
3274
3275
3276 static irqreturn_t igb_msix_other(int irq, void *data)
3277 {
3278         struct net_device *netdev = data;
3279         struct igb_adapter *adapter = netdev_priv(netdev);
3280         struct e1000_hw *hw = &adapter->hw;
3281         u32 icr = rd32(E1000_ICR);
3282
3283         /* reading ICR causes bit 31 of EICR to be cleared */
3284         if (!(icr & E1000_ICR_LSC))
3285                 goto no_link_interrupt;
3286         hw->mac.get_link_status = 1;
3287         /* guard against interrupt when we're going down */
3288         if (!test_bit(__IGB_DOWN, &adapter->state))
3289                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3290         
3291 no_link_interrupt:
3292         wr32(E1000_IMS, E1000_IMS_LSC);
3293         wr32(E1000_EIMS, adapter->eims_other);
3294
3295         return IRQ_HANDLED;
3296 }
3297
3298 static irqreturn_t igb_msix_tx(int irq, void *data)
3299 {
3300         struct igb_ring *tx_ring = data;
3301         struct igb_adapter *adapter = tx_ring->adapter;
3302         struct e1000_hw *hw = &adapter->hw;
3303
3304         if (!tx_ring->itr_val)
3305                 wr32(E1000_EIMC, tx_ring->eims_value);
3306 #ifdef CONFIG_DCA
3307         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3308                 igb_update_tx_dca(tx_ring);
3309 #endif
3310         tx_ring->total_bytes = 0;
3311         tx_ring->total_packets = 0;
3312
3313         /* auto mask will automatically reenable the interrupt when we write
3314          * EICS */
3315         if (!igb_clean_tx_irq(tx_ring))
3316                 /* Ring was not completely cleaned, so fire another interrupt */
3317                 wr32(E1000_EICS, tx_ring->eims_value);
3318         else
3319                 wr32(E1000_EIMS, tx_ring->eims_value);
3320
3321         return IRQ_HANDLED;
3322 }
3323
3324 static irqreturn_t igb_msix_rx(int irq, void *data)
3325 {
3326         struct igb_ring *rx_ring = data;
3327         struct igb_adapter *adapter = rx_ring->adapter;
3328         struct e1000_hw *hw = &adapter->hw;
3329
3330         /* Write the ITR value calculated at the end of the
3331          * previous interrupt.
3332          */
3333
3334         if (adapter->set_itr) {
3335                 wr32(rx_ring->itr_register,
3336                      1000000000 / (rx_ring->itr_val * 256));
3337                 adapter->set_itr = 0;
3338         }
3339
3340         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3341                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3342
3343 #ifdef CONFIG_DCA
3344         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3345                 igb_update_rx_dca(rx_ring);
3346 #endif
3347                 return IRQ_HANDLED;
3348 }
3349
3350 #ifdef CONFIG_DCA
3351 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3352 {
3353         u32 dca_rxctrl;
3354         struct igb_adapter *adapter = rx_ring->adapter;
3355         struct e1000_hw *hw = &adapter->hw;
3356         int cpu = get_cpu();
3357         int q = rx_ring - adapter->rx_ring;
3358
3359         if (rx_ring->cpu != cpu) {
3360                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3361                 if (hw->mac.type == e1000_82576) {
3362                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3363                         dca_rxctrl |= dca_get_tag(cpu) <<
3364                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3365                 } else {
3366                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3367                         dca_rxctrl |= dca_get_tag(cpu);
3368                 }
3369                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3370                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3371                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3372                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3373                 rx_ring->cpu = cpu;
3374         }
3375         put_cpu();
3376 }
3377
3378 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3379 {
3380         u32 dca_txctrl;
3381         struct igb_adapter *adapter = tx_ring->adapter;
3382         struct e1000_hw *hw = &adapter->hw;
3383         int cpu = get_cpu();
3384         int q = tx_ring - adapter->tx_ring;
3385
3386         if (tx_ring->cpu != cpu) {
3387                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3388                 if (hw->mac.type == e1000_82576) {
3389                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3390                         dca_txctrl |= dca_get_tag(cpu) <<
3391                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3392                 } else {
3393                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3394                         dca_txctrl |= dca_get_tag(cpu);
3395                 }
3396                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3397                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3398                 tx_ring->cpu = cpu;
3399         }
3400         put_cpu();
3401 }
3402
3403 static void igb_setup_dca(struct igb_adapter *adapter)
3404 {
3405         int i;
3406
3407         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3408                 return;
3409
3410         for (i = 0; i < adapter->num_tx_queues; i++) {
3411                 adapter->tx_ring[i].cpu = -1;
3412                 igb_update_tx_dca(&adapter->tx_ring[i]);
3413         }
3414         for (i = 0; i < adapter->num_rx_queues; i++) {
3415                 adapter->rx_ring[i].cpu = -1;
3416                 igb_update_rx_dca(&adapter->rx_ring[i]);
3417         }
3418 }
3419
3420 static int __igb_notify_dca(struct device *dev, void *data)
3421 {
3422         struct net_device *netdev = dev_get_drvdata(dev);
3423         struct igb_adapter *adapter = netdev_priv(netdev);
3424         struct e1000_hw *hw = &adapter->hw;
3425         unsigned long event = *(unsigned long *)data;
3426
3427         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3428                 goto out;
3429
3430         switch (event) {
3431         case DCA_PROVIDER_ADD:
3432                 /* if already enabled, don't do it again */
3433                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3434                         break;
3435                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3436                 /* Always use CB2 mode, difference is masked
3437                  * in the CB driver. */
3438                 wr32(E1000_DCA_CTRL, 2);
3439                 if (dca_add_requester(dev) == 0) {
3440                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3441                         igb_setup_dca(adapter);
3442                         break;
3443                 }
3444                 /* Fall Through since DCA is disabled. */
3445         case DCA_PROVIDER_REMOVE:
3446                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3447                         /* without this a class_device is left
3448                          * hanging around in the sysfs model */
3449                         dca_remove_requester(dev);
3450                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3451                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3452                         wr32(E1000_DCA_CTRL, 1);
3453                 }
3454                 break;
3455         }
3456 out:
3457         return 0;
3458 }
3459
3460 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3461                           void *p)
3462 {
3463         int ret_val;
3464
3465         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3466                                          __igb_notify_dca);
3467
3468         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3469 }
3470 #endif /* CONFIG_DCA */
3471
3472 /**
3473  * igb_intr_msi - Interrupt Handler
3474  * @irq: interrupt number
3475  * @data: pointer to a network interface device structure
3476  **/
3477 static irqreturn_t igb_intr_msi(int irq, void *data)
3478 {
3479         struct net_device *netdev = data;
3480         struct igb_adapter *adapter = netdev_priv(netdev);
3481         struct e1000_hw *hw = &adapter->hw;
3482         /* read ICR disables interrupts using IAM */
3483         u32 icr = rd32(E1000_ICR);
3484
3485         /* Write the ITR value calculated at the end of the
3486          * previous interrupt.
3487          */
3488         if (adapter->set_itr) {
3489                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3490                 adapter->set_itr = 0;
3491         }
3492
3493         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3494                 hw->mac.get_link_status = 1;
3495                 if (!test_bit(__IGB_DOWN, &adapter->state))
3496                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3497         }
3498
3499         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3500
3501         return IRQ_HANDLED;
3502 }
3503
3504 /**
3505  * igb_intr - Interrupt Handler
3506  * @irq: interrupt number
3507  * @data: pointer to a network interface device structure
3508  **/
3509 static irqreturn_t igb_intr(int irq, void *data)
3510 {
3511         struct net_device *netdev = data;
3512         struct igb_adapter *adapter = netdev_priv(netdev);
3513         struct e1000_hw *hw = &adapter->hw;
3514         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3515          * need for the IMC write */
3516         u32 icr = rd32(E1000_ICR);
3517         u32 eicr = 0;
3518         if (!icr)
3519                 return IRQ_NONE;  /* Not our interrupt */
3520
3521         /* Write the ITR value calculated at the end of the
3522          * previous interrupt.
3523          */
3524         if (adapter->set_itr) {
3525                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3526                 adapter->set_itr = 0;
3527         }
3528
3529         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3530          * not set, then the adapter didn't send an interrupt */
3531         if (!(icr & E1000_ICR_INT_ASSERTED))
3532                 return IRQ_NONE;
3533
3534         eicr = rd32(E1000_EICR);
3535
3536         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3537                 hw->mac.get_link_status = 1;
3538                 /* guard against interrupt when we're going down */
3539                 if (!test_bit(__IGB_DOWN, &adapter->state))
3540                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3541         }
3542
3543         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3544
3545         return IRQ_HANDLED;
3546 }
3547
3548 /**
3549  * igb_poll - NAPI Rx polling callback
3550  * @napi: napi polling structure
3551  * @budget: count of how many packets we should handle
3552  **/
3553 static int igb_poll(struct napi_struct *napi, int budget)
3554 {
3555         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3556         struct igb_adapter *adapter = rx_ring->adapter;
3557         struct net_device *netdev = adapter->netdev;
3558         int tx_clean_complete, work_done = 0;
3559
3560         /* this poll routine only supports one tx and one rx queue */
3561 #ifdef CONFIG_DCA
3562         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3563                 igb_update_tx_dca(&adapter->tx_ring[0]);
3564 #endif
3565         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3566
3567 #ifdef CONFIG_DCA
3568         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3569                 igb_update_rx_dca(&adapter->rx_ring[0]);
3570 #endif
3571         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3572
3573         /* If no Tx and not enough Rx work done, exit the polling mode */
3574         if ((tx_clean_complete && (work_done < budget)) ||
3575             !netif_running(netdev)) {
3576                 if (adapter->itr_setting & 3)
3577                         igb_set_itr(adapter, E1000_ITR, false);
3578                 netif_rx_complete(netdev, napi);
3579                 if (!test_bit(__IGB_DOWN, &adapter->state))
3580                         igb_irq_enable(adapter);
3581                 return 0;
3582         }
3583
3584         return 1;
3585 }
3586
3587 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3588 {
3589         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3590         struct igb_adapter *adapter = rx_ring->adapter;
3591         struct e1000_hw *hw = &adapter->hw;
3592         struct net_device *netdev = adapter->netdev;
3593         int work_done = 0;
3594
3595         /* Keep link state information with original netdev */
3596         if (!netif_carrier_ok(netdev))
3597                 goto quit_polling;
3598
3599 #ifdef CONFIG_DCA
3600         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3601                 igb_update_rx_dca(rx_ring);
3602 #endif
3603         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3604
3605
3606         /* If not enough Rx work done, exit the polling mode */
3607         if ((work_done == 0) || !netif_running(netdev)) {
3608 quit_polling:
3609                 netif_rx_complete(netdev, napi);
3610
3611                 wr32(E1000_EIMS, rx_ring->eims_value);
3612                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3613                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3614                         int mean_size = rx_ring->total_bytes /
3615                                         rx_ring->total_packets;
3616                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3617                                 igb_raise_rx_eitr(adapter, rx_ring);
3618                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3619                                 igb_lower_rx_eitr(adapter, rx_ring);
3620                 }
3621
3622                 if (!test_bit(__IGB_DOWN, &adapter->state))
3623                         wr32(E1000_EIMS, rx_ring->eims_value);
3624
3625                 return 0;
3626         }
3627
3628         return 1;
3629 }
3630
3631 static inline u32 get_head(struct igb_ring *tx_ring)
3632 {
3633         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3634         return le32_to_cpu(*(volatile __le32 *)end);
3635 }
3636
3637 /**
3638  * igb_clean_tx_irq - Reclaim resources after transmit completes
3639  * @adapter: board private structure
3640  * returns true if ring is completely cleaned
3641  **/
3642 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3643 {
3644         struct igb_adapter *adapter = tx_ring->adapter;
3645         struct e1000_hw *hw = &adapter->hw;
3646         struct net_device *netdev = adapter->netdev;
3647         struct e1000_tx_desc *tx_desc;
3648         struct igb_buffer *buffer_info;
3649         struct sk_buff *skb;
3650         unsigned int i;
3651         u32 head, oldhead;
3652         unsigned int count = 0;
3653         bool cleaned = false;
3654         bool retval = true;
3655         unsigned int total_bytes = 0, total_packets = 0;
3656
3657         rmb();
3658         head = get_head(tx_ring);
3659         i = tx_ring->next_to_clean;
3660         while (1) {
3661                 while (i != head) {
3662                         cleaned = true;
3663                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3664                         buffer_info = &tx_ring->buffer_info[i];
3665                         skb = buffer_info->skb;
3666
3667                         if (skb) {
3668                                 unsigned int segs, bytecount;
3669                                 /* gso_segs is currently only valid for tcp */
3670                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3671                                 /* multiply data chunks by size of headers */
3672                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3673                                             skb->len;
3674                                 total_packets += segs;
3675                                 total_bytes += bytecount;
3676                         }
3677
3678                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3679                         tx_desc->upper.data = 0;
3680
3681                         i++;
3682                         if (i == tx_ring->count)
3683                                 i = 0;
3684
3685                         count++;
3686                         if (count == IGB_MAX_TX_CLEAN) {
3687                                 retval = false;
3688                                 goto done_cleaning;
3689                         }
3690                 }
3691                 oldhead = head;
3692                 rmb();
3693                 head = get_head(tx_ring);
3694                 if (head == oldhead)
3695                         goto done_cleaning;
3696         }  /* while (1) */
3697
3698 done_cleaning:
3699         tx_ring->next_to_clean = i;
3700
3701         if (unlikely(cleaned &&
3702                      netif_carrier_ok(netdev) &&
3703                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3704                 /* Make sure that anybody stopping the queue after this
3705                  * sees the new next_to_clean.
3706                  */
3707                 smp_mb();
3708 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3709                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3710                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3711                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3712                         ++adapter->restart_queue;
3713                 }
3714 #else
3715                 if (netif_queue_stopped(netdev) &&
3716                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3717                         netif_wake_queue(netdev);
3718                         ++adapter->restart_queue;
3719                 }
3720 #endif          
3721         }
3722
3723         if (tx_ring->detect_tx_hung) {
3724                 /* Detect a transmit hang in hardware, this serializes the
3725                  * check with the clearing of time_stamp and movement of i */
3726                 tx_ring->detect_tx_hung = false;
3727                 if (tx_ring->buffer_info[i].time_stamp &&
3728                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3729                                (adapter->tx_timeout_factor * HZ))
3730                     && !(rd32(E1000_STATUS) &
3731                          E1000_STATUS_TXOFF)) {
3732
3733                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3734                         /* detected Tx unit hang */
3735                         dev_err(&adapter->pdev->dev,
3736                                 "Detected Tx Unit Hang\n"
3737                                 "  Tx Queue             <%d>\n"
3738                                 "  TDH                  <%x>\n"
3739                                 "  TDT                  <%x>\n"
3740                                 "  next_to_use          <%x>\n"
3741                                 "  next_to_clean        <%x>\n"
3742                                 "  head (WB)            <%x>\n"
3743                                 "buffer_info[next_to_clean]\n"
3744                                 "  time_stamp           <%lx>\n"
3745                                 "  jiffies              <%lx>\n"
3746                                 "  desc.status          <%x>\n",
3747                                 tx_ring->queue_index,
3748                                 readl(adapter->hw.hw_addr + tx_ring->head),
3749                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3750                                 tx_ring->next_to_use,
3751                                 tx_ring->next_to_clean,
3752                                 head,
3753                                 tx_ring->buffer_info[i].time_stamp,
3754                                 jiffies,
3755                                 tx_desc->upper.fields.status);
3756 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3757                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3758 #else
3759                         netif_stop_queue(netdev);
3760 #endif
3761                 }
3762         }
3763         tx_ring->total_bytes += total_bytes;
3764         tx_ring->total_packets += total_packets;
3765         tx_ring->tx_stats.bytes += total_bytes;
3766         tx_ring->tx_stats.packets += total_packets;
3767         adapter->net_stats.tx_bytes += total_bytes;
3768         adapter->net_stats.tx_packets += total_packets;
3769         return retval;
3770 }
3771
3772 #ifdef CONFIG_IGB_LRO
3773  /**
3774  * igb_get_skb_hdr - helper function for LRO header processing
3775  * @skb: pointer to sk_buff to be added to LRO packet
3776  * @iphdr: pointer to ip header structure
3777  * @tcph: pointer to tcp header structure
3778  * @hdr_flags: pointer to header flags
3779  * @priv: pointer to the receive descriptor for the current sk_buff
3780  **/
3781 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3782                            u64 *hdr_flags, void *priv)
3783 {
3784         union e1000_adv_rx_desc *rx_desc = priv;
3785         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3786                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3787
3788         /* Verify that this is a valid IPv4 TCP packet */
3789         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3790                           E1000_RXDADV_PKTTYPE_TCP))
3791                 return -1;
3792
3793         /* Set network headers */
3794         skb_reset_network_header(skb);
3795         skb_set_transport_header(skb, ip_hdrlen(skb));
3796         *iphdr = ip_hdr(skb);
3797         *tcph = tcp_hdr(skb);
3798         *hdr_flags = LRO_IPV4 | LRO_TCP;
3799
3800         return 0;
3801
3802 }
3803 #endif /* CONFIG_IGB_LRO */
3804
3805 /**
3806  * igb_receive_skb - helper function to handle rx indications
3807  * @ring: pointer to receive ring receving this packet 
3808  * @status: descriptor status field as written by hardware
3809  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3810  * @skb: pointer to sk_buff to be indicated to stack
3811  **/
3812 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3813                             union e1000_adv_rx_desc * rx_desc,
3814                             struct sk_buff *skb)
3815 {
3816         struct igb_adapter * adapter = ring->adapter;
3817         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3818
3819 #ifdef CONFIG_IGB_LRO
3820         if (adapter->netdev->features & NETIF_F_LRO &&
3821             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3822                 if (vlan_extracted)
3823                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3824                                            adapter->vlgrp,
3825                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3826                                            rx_desc);
3827                 else
3828                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3829                 ring->lro_used = 1;
3830         } else {
3831 #endif
3832                 if (vlan_extracted)
3833                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3834                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3835                 else
3836
3837                         netif_receive_skb(skb);
3838 #ifdef CONFIG_IGB_LRO
3839         }
3840 #endif
3841 }
3842
3843
3844 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3845                                        u32 status_err, struct sk_buff *skb)
3846 {
3847         skb->ip_summed = CHECKSUM_NONE;
3848
3849         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3850         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3851                 return;
3852         /* TCP/UDP checksum error bit is set */
3853         if (status_err &
3854             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3855                 /* let the stack verify checksum errors */
3856                 adapter->hw_csum_err++;
3857                 return;
3858         }
3859         /* It must be a TCP or UDP packet with a valid checksum */
3860         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3861                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3862
3863         adapter->hw_csum_good++;
3864 }
3865
3866 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3867                                  int *work_done, int budget)
3868 {
3869         struct igb_adapter *adapter = rx_ring->adapter;
3870         struct net_device *netdev = adapter->netdev;
3871         struct pci_dev *pdev = adapter->pdev;
3872         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3873         struct igb_buffer *buffer_info , *next_buffer;
3874         struct sk_buff *skb;
3875         unsigned int i;
3876         u32 length, hlen, staterr;
3877         bool cleaned = false;
3878         int cleaned_count = 0;
3879         unsigned int total_bytes = 0, total_packets = 0;
3880
3881         i = rx_ring->next_to_clean;
3882         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3883         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3884
3885         while (staterr & E1000_RXD_STAT_DD) {
3886                 if (*work_done >= budget)
3887                         break;
3888                 (*work_done)++;
3889                 buffer_info = &rx_ring->buffer_info[i];
3890
3891                 /* HW will not DMA in data larger than the given buffer, even
3892                  * if it parses the (NFS, of course) header to be larger.  In
3893                  * that case, it fills the header buffer and spills the rest
3894                  * into the page.
3895                  */
3896                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3897                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3898                 if (hlen > adapter->rx_ps_hdr_size)
3899                         hlen = adapter->rx_ps_hdr_size;
3900
3901                 length = le16_to_cpu(rx_desc->wb.upper.length);
3902                 cleaned = true;
3903                 cleaned_count++;
3904
3905                 skb = buffer_info->skb;
3906                 prefetch(skb->data - NET_IP_ALIGN);
3907                 buffer_info->skb = NULL;
3908                 if (!adapter->rx_ps_hdr_size) {
3909                         pci_unmap_single(pdev, buffer_info->dma,
3910                                          adapter->rx_buffer_len +
3911                                            NET_IP_ALIGN,
3912                                          PCI_DMA_FROMDEVICE);
3913                         skb_put(skb, length);
3914                         goto send_up;
3915                 }
3916
3917                 if (!skb_shinfo(skb)->nr_frags) {
3918                         pci_unmap_single(pdev, buffer_info->dma,
3919                                          adapter->rx_ps_hdr_size +
3920                                            NET_IP_ALIGN,
3921                                          PCI_DMA_FROMDEVICE);
3922                         skb_put(skb, hlen);
3923                 }
3924
3925                 if (length) {
3926                         pci_unmap_page(pdev, buffer_info->page_dma,
3927                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3928                         buffer_info->page_dma = 0;
3929
3930                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3931                                                 buffer_info->page,
3932                                                 buffer_info->page_offset,
3933                                                 length);
3934
3935                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3936                             (page_count(buffer_info->page) != 1))
3937                                 buffer_info->page = NULL;
3938                         else
3939                                 get_page(buffer_info->page);
3940
3941                         skb->len += length;
3942                         skb->data_len += length;
3943
3944                         skb->truesize += length;
3945                 }
3946 send_up:
3947                 i++;
3948                 if (i == rx_ring->count)
3949                         i = 0;
3950                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3951                 prefetch(next_rxd);
3952                 next_buffer = &rx_ring->buffer_info[i];
3953
3954                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3955                         buffer_info->skb = xchg(&next_buffer->skb, skb);
3956                         buffer_info->dma = xchg(&next_buffer->dma, 0);
3957                         goto next_desc;
3958                 }
3959
3960                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3961                         dev_kfree_skb_irq(skb);
3962                         goto next_desc;
3963                 }
3964                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3965
3966                 total_bytes += skb->len;
3967                 total_packets++;
3968
3969                 igb_rx_checksum_adv(adapter, staterr, skb);
3970
3971                 skb->protocol = eth_type_trans(skb, netdev);
3972
3973                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3974
3975                 netdev->last_rx = jiffies;
3976
3977 next_desc:
3978                 rx_desc->wb.upper.status_error = 0;
3979
3980                 /* return some buffers to hardware, one at a time is too slow */
3981                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3982                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3983                         cleaned_count = 0;
3984                 }
3985
3986                 /* use prefetched values */
3987                 rx_desc = next_rxd;
3988                 buffer_info = next_buffer;
3989
3990                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3991         }
3992
3993         rx_ring->next_to_clean = i;
3994         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3995
3996 #ifdef CONFIG_IGB_LRO
3997         if (rx_ring->lro_used) {
3998                 lro_flush_all(&rx_ring->lro_mgr);
3999                 rx_ring->lro_used = 0;
4000         }
4001 #endif
4002
4003         if (cleaned_count)
4004                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
4005
4006         rx_ring->total_packets += total_packets;
4007         rx_ring->total_bytes += total_bytes;
4008         rx_ring->rx_stats.packets += total_packets;
4009         rx_ring->rx_stats.bytes += total_bytes;
4010         adapter->net_stats.rx_bytes += total_bytes;
4011         adapter->net_stats.rx_packets += total_packets;
4012         return cleaned;
4013 }
4014
4015
4016 /**
4017  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
4018  * @adapter: address of board private structure
4019  **/
4020 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
4021                                      int cleaned_count)
4022 {
4023         struct igb_adapter *adapter = rx_ring->adapter;
4024         struct net_device *netdev = adapter->netdev;
4025         struct pci_dev *pdev = adapter->pdev;
4026         union e1000_adv_rx_desc *rx_desc;
4027         struct igb_buffer *buffer_info;
4028         struct sk_buff *skb;
4029         unsigned int i;
4030
4031         i = rx_ring->next_to_use;
4032         buffer_info = &rx_ring->buffer_info[i];
4033
4034         while (cleaned_count--) {
4035                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4036
4037                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4038                         if (!buffer_info->page) {
4039                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4040                                 if (!buffer_info->page) {
4041                                         adapter->alloc_rx_buff_failed++;
4042                                         goto no_buffers;
4043                                 }
4044                                 buffer_info->page_offset = 0;
4045                         } else {
4046                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4047                         }
4048                         buffer_info->page_dma =
4049                                 pci_map_page(pdev,
4050                                              buffer_info->page,
4051                                              buffer_info->page_offset,
4052                                              PAGE_SIZE / 2,
4053                                              PCI_DMA_FROMDEVICE);
4054                 }
4055
4056                 if (!buffer_info->skb) {
4057                         int bufsz;
4058
4059                         if (adapter->rx_ps_hdr_size)
4060                                 bufsz = adapter->rx_ps_hdr_size;
4061                         else
4062                                 bufsz = adapter->rx_buffer_len;
4063                         bufsz += NET_IP_ALIGN;
4064                         skb = netdev_alloc_skb(netdev, bufsz);
4065
4066                         if (!skb) {
4067                                 adapter->alloc_rx_buff_failed++;
4068                                 goto no_buffers;
4069                         }
4070
4071                         /* Make buffer alignment 2 beyond a 16 byte boundary
4072                          * this will result in a 16 byte aligned IP header after
4073                          * the 14 byte MAC header is removed
4074                          */
4075                         skb_reserve(skb, NET_IP_ALIGN);
4076
4077                         buffer_info->skb = skb;
4078                         buffer_info->dma = pci_map_single(pdev, skb->data,
4079                                                           bufsz,
4080                                                           PCI_DMA_FROMDEVICE);
4081
4082                 }
4083                 /* Refresh the desc even if buffer_addrs didn't change because
4084                  * each write-back erases this info. */
4085                 if (adapter->rx_ps_hdr_size) {
4086                         rx_desc->read.pkt_addr =
4087                              cpu_to_le64(buffer_info->page_dma);
4088                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4089                 } else {
4090                         rx_desc->read.pkt_addr =
4091                              cpu_to_le64(buffer_info->dma);
4092                         rx_desc->read.hdr_addr = 0;
4093                 }
4094
4095                 i++;
4096                 if (i == rx_ring->count)
4097                         i = 0;
4098                 buffer_info = &rx_ring->buffer_info[i];
4099         }
4100
4101 no_buffers:
4102         if (rx_ring->next_to_use != i) {
4103                 rx_ring->next_to_use = i;
4104                 if (i == 0)
4105                         i = (rx_ring->count - 1);
4106                 else
4107                         i--;
4108
4109                 /* Force memory writes to complete before letting h/w
4110                  * know there are new descriptors to fetch.  (Only
4111                  * applicable for weak-ordered memory model archs,
4112                  * such as IA-64). */
4113                 wmb();
4114                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4115         }
4116 }
4117
4118 /**
4119  * igb_mii_ioctl -
4120  * @netdev:
4121  * @ifreq:
4122  * @cmd:
4123  **/
4124 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4125 {
4126         struct igb_adapter *adapter = netdev_priv(netdev);
4127         struct mii_ioctl_data *data = if_mii(ifr);
4128
4129         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4130                 return -EOPNOTSUPP;
4131
4132         switch (cmd) {
4133         case SIOCGMIIPHY:
4134                 data->phy_id = adapter->hw.phy.addr;
4135                 break;
4136         case SIOCGMIIREG:
4137                 if (!capable(CAP_NET_ADMIN))
4138                         return -EPERM;
4139                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4140                                                      data->reg_num
4141                                                      & 0x1F, &data->val_out))
4142                         return -EIO;
4143                 break;
4144         case SIOCSMIIREG:
4145         default:
4146                 return -EOPNOTSUPP;
4147         }
4148         return 0;
4149 }
4150
4151 /**
4152  * igb_ioctl -
4153  * @netdev:
4154  * @ifreq:
4155  * @cmd:
4156  **/
4157 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4158 {
4159         switch (cmd) {
4160         case SIOCGMIIPHY:
4161         case SIOCGMIIREG:
4162         case SIOCSMIIREG:
4163                 return igb_mii_ioctl(netdev, ifr, cmd);
4164         default:
4165                 return -EOPNOTSUPP;
4166         }
4167 }
4168
4169 static void igb_vlan_rx_register(struct net_device *netdev,
4170                                  struct vlan_group *grp)
4171 {
4172         struct igb_adapter *adapter = netdev_priv(netdev);
4173         struct e1000_hw *hw = &adapter->hw;
4174         u32 ctrl, rctl;
4175
4176         igb_irq_disable(adapter);
4177         adapter->vlgrp = grp;
4178
4179         if (grp) {
4180                 /* enable VLAN tag insert/strip */
4181                 ctrl = rd32(E1000_CTRL);
4182                 ctrl |= E1000_CTRL_VME;
4183                 wr32(E1000_CTRL, ctrl);
4184
4185                 /* enable VLAN receive filtering */
4186                 rctl = rd32(E1000_RCTL);
4187                 rctl |= E1000_RCTL_VFE;
4188                 rctl &= ~E1000_RCTL_CFIEN;
4189                 wr32(E1000_RCTL, rctl);
4190                 igb_update_mng_vlan(adapter);
4191                 wr32(E1000_RLPML,
4192                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4193         } else {
4194                 /* disable VLAN tag insert/strip */
4195                 ctrl = rd32(E1000_CTRL);
4196                 ctrl &= ~E1000_CTRL_VME;
4197                 wr32(E1000_CTRL, ctrl);
4198
4199                 /* disable VLAN filtering */
4200                 rctl = rd32(E1000_RCTL);
4201                 rctl &= ~E1000_RCTL_VFE;
4202                 wr32(E1000_RCTL, rctl);
4203                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4204                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4205                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4206                 }
4207                 wr32(E1000_RLPML,
4208                                 adapter->max_frame_size);
4209         }
4210
4211         if (!test_bit(__IGB_DOWN, &adapter->state))
4212                 igb_irq_enable(adapter);
4213 }
4214
4215 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4216 {
4217         struct igb_adapter *adapter = netdev_priv(netdev);
4218         struct e1000_hw *hw = &adapter->hw;
4219         u32 vfta, index;
4220
4221         if ((adapter->hw.mng_cookie.status &
4222              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4223             (vid == adapter->mng_vlan_id))
4224                 return;
4225         /* add VID to filter table */
4226         index = (vid >> 5) & 0x7F;
4227         vfta = array_rd32(E1000_VFTA, index);
4228         vfta |= (1 << (vid & 0x1F));
4229         igb_write_vfta(&adapter->hw, index, vfta);
4230 }
4231
4232 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4233 {
4234         struct igb_adapter *adapter = netdev_priv(netdev);
4235         struct e1000_hw *hw = &adapter->hw;
4236         u32 vfta, index;
4237
4238         igb_irq_disable(adapter);
4239         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4240
4241         if (!test_bit(__IGB_DOWN, &adapter->state))
4242                 igb_irq_enable(adapter);
4243
4244         if ((adapter->hw.mng_cookie.status &
4245              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4246             (vid == adapter->mng_vlan_id)) {
4247                 /* release control to f/w */
4248                 igb_release_hw_control(adapter);
4249                 return;
4250         }
4251
4252         /* remove VID from filter table */
4253         index = (vid >> 5) & 0x7F;
4254         vfta = array_rd32(E1000_VFTA, index);
4255         vfta &= ~(1 << (vid & 0x1F));
4256         igb_write_vfta(&adapter->hw, index, vfta);
4257 }
4258
4259 static void igb_restore_vlan(struct igb_adapter *adapter)
4260 {
4261         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4262
4263         if (adapter->vlgrp) {
4264                 u16 vid;
4265                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4266                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4267                                 continue;
4268                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4269                 }
4270         }
4271 }
4272
4273 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4274 {
4275         struct e1000_mac_info *mac = &adapter->hw.mac;
4276
4277         mac->autoneg = 0;
4278
4279         /* Fiber NICs only allow 1000 gbps Full duplex */
4280         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4281                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4282                 dev_err(&adapter->pdev->dev,
4283                         "Unsupported Speed/Duplex configuration\n");
4284                 return -EINVAL;
4285         }
4286
4287         switch (spddplx) {
4288         case SPEED_10 + DUPLEX_HALF:
4289                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4290                 break;
4291         case SPEED_10 + DUPLEX_FULL:
4292                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4293                 break;
4294         case SPEED_100 + DUPLEX_HALF:
4295                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4296                 break;
4297         case SPEED_100 + DUPLEX_FULL:
4298                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4299                 break;
4300         case SPEED_1000 + DUPLEX_FULL:
4301                 mac->autoneg = 1;
4302                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4303                 break;
4304         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4305         default:
4306                 dev_err(&adapter->pdev->dev,
4307                         "Unsupported Speed/Duplex configuration\n");
4308                 return -EINVAL;
4309         }
4310         return 0;
4311 }
4312
4313
4314 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4315 {
4316         struct net_device *netdev = pci_get_drvdata(pdev);
4317         struct igb_adapter *adapter = netdev_priv(netdev);
4318         struct e1000_hw *hw = &adapter->hw;
4319         u32 ctrl, rctl, status;
4320         u32 wufc = adapter->wol;
4321 #ifdef CONFIG_PM
4322         int retval = 0;
4323 #endif
4324
4325         netif_device_detach(netdev);
4326
4327         if (netif_running(netdev)) {
4328                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4329                 igb_down(adapter);
4330                 igb_free_irq(adapter);
4331         }
4332
4333 #ifdef CONFIG_PM
4334         retval = pci_save_state(pdev);
4335         if (retval)
4336                 return retval;
4337 #endif
4338
4339         status = rd32(E1000_STATUS);
4340         if (status & E1000_STATUS_LU)
4341                 wufc &= ~E1000_WUFC_LNKC;
4342
4343         if (wufc) {
4344                 igb_setup_rctl(adapter);
4345                 igb_set_multi(netdev);
4346
4347                 /* turn on all-multi mode if wake on multicast is enabled */
4348                 if (wufc & E1000_WUFC_MC) {
4349                         rctl = rd32(E1000_RCTL);
4350                         rctl |= E1000_RCTL_MPE;
4351                         wr32(E1000_RCTL, rctl);
4352                 }
4353
4354                 ctrl = rd32(E1000_CTRL);
4355                 /* advertise wake from D3Cold */
4356                 #define E1000_CTRL_ADVD3WUC 0x00100000
4357                 /* phy power management enable */
4358                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4359                 ctrl |= E1000_CTRL_ADVD3WUC;
4360                 wr32(E1000_CTRL, ctrl);
4361
4362                 /* Allow time for pending master requests to run */
4363                 igb_disable_pcie_master(&adapter->hw);
4364
4365                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4366                 wr32(E1000_WUFC, wufc);
4367         } else {
4368                 wr32(E1000_WUC, 0);
4369                 wr32(E1000_WUFC, 0);
4370         }
4371
4372         /* make sure adapter isn't asleep if manageability/wol is enabled */
4373         if (wufc || adapter->en_mng_pt) {
4374                 pci_enable_wake(pdev, PCI_D3hot, 1);
4375                 pci_enable_wake(pdev, PCI_D3cold, 1);
4376         } else {
4377                 igb_shutdown_fiber_serdes_link_82575(hw);
4378                 pci_enable_wake(pdev, PCI_D3hot, 0);
4379                 pci_enable_wake(pdev, PCI_D3cold, 0);
4380         }
4381
4382         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4383          * would have already happened in close and is redundant. */
4384         igb_release_hw_control(adapter);
4385
4386         pci_disable_device(pdev);
4387
4388         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4389
4390         return 0;
4391 }
4392
4393 #ifdef CONFIG_PM
4394 static int igb_resume(struct pci_dev *pdev)
4395 {
4396         struct net_device *netdev = pci_get_drvdata(pdev);
4397         struct igb_adapter *adapter = netdev_priv(netdev);
4398         struct e1000_hw *hw = &adapter->hw;
4399         u32 err;
4400
4401         pci_set_power_state(pdev, PCI_D0);
4402         pci_restore_state(pdev);
4403
4404         if (adapter->need_ioport)
4405                 err = pci_enable_device(pdev);
4406         else
4407                 err = pci_enable_device_mem(pdev);
4408         if (err) {
4409                 dev_err(&pdev->dev,
4410                         "igb: Cannot enable PCI device from suspend\n");
4411                 return err;
4412         }
4413         pci_set_master(pdev);
4414
4415         pci_enable_wake(pdev, PCI_D3hot, 0);
4416         pci_enable_wake(pdev, PCI_D3cold, 0);
4417
4418         if (netif_running(netdev)) {
4419                 err = igb_request_irq(adapter);
4420                 if (err)
4421                         return err;
4422         }
4423
4424         /* e1000_power_up_phy(adapter); */
4425
4426         igb_reset(adapter);
4427         wr32(E1000_WUS, ~0);
4428
4429         igb_init_manageability(adapter);
4430
4431         if (netif_running(netdev))
4432                 igb_up(adapter);
4433
4434         netif_device_attach(netdev);
4435
4436         /* let the f/w know that the h/w is now under the control of the
4437          * driver. */
4438         igb_get_hw_control(adapter);
4439
4440         return 0;
4441 }
4442 #endif
4443
4444 static void igb_shutdown(struct pci_dev *pdev)
4445 {
4446         igb_suspend(pdev, PMSG_SUSPEND);
4447 }
4448
4449 #ifdef CONFIG_NET_POLL_CONTROLLER
4450 /*
4451  * Polling 'interrupt' - used by things like netconsole to send skbs
4452  * without having to re-enable interrupts. It's not called while
4453  * the interrupt routine is executing.
4454  */
4455 static void igb_netpoll(struct net_device *netdev)
4456 {
4457         struct igb_adapter *adapter = netdev_priv(netdev);
4458         int i;
4459         int work_done = 0;
4460
4461         igb_irq_disable(adapter);
4462         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4463
4464         for (i = 0; i < adapter->num_tx_queues; i++)
4465                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4466
4467         for (i = 0; i < adapter->num_rx_queues; i++)
4468                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4469                                      &work_done,
4470                                      adapter->rx_ring[i].napi.weight);
4471
4472         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4473         igb_irq_enable(adapter);
4474 }
4475 #endif /* CONFIG_NET_POLL_CONTROLLER */
4476
4477 /**
4478  * igb_io_error_detected - called when PCI error is detected
4479  * @pdev: Pointer to PCI device
4480  * @state: The current pci connection state
4481  *
4482  * This function is called after a PCI bus error affecting
4483  * this device has been detected.
4484  */
4485 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4486                                               pci_channel_state_t state)
4487 {
4488         struct net_device *netdev = pci_get_drvdata(pdev);
4489         struct igb_adapter *adapter = netdev_priv(netdev);
4490
4491         netif_device_detach(netdev);
4492
4493         if (netif_running(netdev))
4494                 igb_down(adapter);
4495         pci_disable_device(pdev);
4496
4497         /* Request a slot slot reset. */
4498         return PCI_ERS_RESULT_NEED_RESET;
4499 }
4500
4501 /**
4502  * igb_io_slot_reset - called after the pci bus has been reset.
4503  * @pdev: Pointer to PCI device
4504  *
4505  * Restart the card from scratch, as if from a cold-boot. Implementation
4506  * resembles the first-half of the igb_resume routine.
4507  */
4508 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4509 {
4510         struct net_device *netdev = pci_get_drvdata(pdev);
4511         struct igb_adapter *adapter = netdev_priv(netdev);
4512         struct e1000_hw *hw = &adapter->hw;
4513         int err;
4514
4515         if (adapter->need_ioport)
4516                 err = pci_enable_device(pdev);
4517         else
4518                 err = pci_enable_device_mem(pdev);
4519         if (err) {
4520                 dev_err(&pdev->dev,
4521                         "Cannot re-enable PCI device after reset.\n");
4522                 return PCI_ERS_RESULT_DISCONNECT;
4523         }
4524         pci_set_master(pdev);
4525         pci_restore_state(pdev);
4526
4527         pci_enable_wake(pdev, PCI_D3hot, 0);
4528         pci_enable_wake(pdev, PCI_D3cold, 0);
4529
4530         igb_reset(adapter);
4531         wr32(E1000_WUS, ~0);
4532
4533         return PCI_ERS_RESULT_RECOVERED;
4534 }
4535
4536 /**
4537  * igb_io_resume - called when traffic can start flowing again.
4538  * @pdev: Pointer to PCI device
4539  *
4540  * This callback is called when the error recovery driver tells us that
4541  * its OK to resume normal operation. Implementation resembles the
4542  * second-half of the igb_resume routine.
4543  */
4544 static void igb_io_resume(struct pci_dev *pdev)
4545 {
4546         struct net_device *netdev = pci_get_drvdata(pdev);
4547         struct igb_adapter *adapter = netdev_priv(netdev);
4548
4549         igb_init_manageability(adapter);
4550
4551         if (netif_running(netdev)) {
4552                 if (igb_up(adapter)) {
4553                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4554                         return;
4555                 }
4556         }
4557
4558         netif_device_attach(netdev);
4559
4560         /* let the f/w know that the h/w is now under the control of the
4561          * driver. */
4562         igb_get_hw_control(adapter);
4563
4564 }
4565
4566 /* igb_main.c */