igb: fix legacy mode irq issue
[linux-2.6.git] / drivers / net / igb / igb_main.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
35 #include <linux/ipv6.h>
36 #include <net/checksum.h>
37 #include <net/ip6_checksum.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
40 #include <linux/if_vlan.h>
41 #include <linux/pci.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
45
46 #include "igb.h"
47
48 #define DRV_VERSION "1.0.8-k2"
49 char igb_driver_name[] = "igb";
50 char igb_driver_version[] = DRV_VERSION;
51 static const char igb_driver_string[] =
52                                 "Intel(R) Gigabit Ethernet Network Driver";
53 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
54
55
56 static const struct e1000_info *igb_info_tbl[] = {
57         [board_82575] = &e1000_82575_info,
58 };
59
60 static struct pci_device_id igb_pci_tbl[] = {
61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
64         /* required last entry */
65         {0, }
66 };
67
68 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
69
70 void igb_reset(struct igb_adapter *);
71 static int igb_setup_all_tx_resources(struct igb_adapter *);
72 static int igb_setup_all_rx_resources(struct igb_adapter *);
73 static void igb_free_all_tx_resources(struct igb_adapter *);
74 static void igb_free_all_rx_resources(struct igb_adapter *);
75 static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *);
76 static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *);
77 void igb_update_stats(struct igb_adapter *);
78 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
79 static void __devexit igb_remove(struct pci_dev *pdev);
80 static int igb_sw_init(struct igb_adapter *);
81 static int igb_open(struct net_device *);
82 static int igb_close(struct net_device *);
83 static void igb_configure_tx(struct igb_adapter *);
84 static void igb_configure_rx(struct igb_adapter *);
85 static void igb_setup_rctl(struct igb_adapter *);
86 static void igb_clean_all_tx_rings(struct igb_adapter *);
87 static void igb_clean_all_rx_rings(struct igb_adapter *);
88 static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *);
89 static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *);
90 static void igb_set_multi(struct net_device *);
91 static void igb_update_phy_info(unsigned long);
92 static void igb_watchdog(unsigned long);
93 static void igb_watchdog_task(struct work_struct *);
94 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
95                                   struct igb_ring *);
96 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
97 static struct net_device_stats *igb_get_stats(struct net_device *);
98 static int igb_change_mtu(struct net_device *, int);
99 static int igb_set_mac(struct net_device *, void *);
100 static irqreturn_t igb_intr(int irq, void *);
101 static irqreturn_t igb_intr_msi(int irq, void *);
102 static irqreturn_t igb_msix_other(int irq, void *);
103 static irqreturn_t igb_msix_rx(int irq, void *);
104 static irqreturn_t igb_msix_tx(int irq, void *);
105 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
106 static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *);
107 static int igb_clean(struct napi_struct *, int);
108 static bool igb_clean_rx_irq_adv(struct igb_adapter *,
109                                  struct igb_ring *, int *, int);
110 static void igb_alloc_rx_buffers_adv(struct igb_adapter *,
111                                      struct igb_ring *, int);
112 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
113 static void igb_tx_timeout(struct net_device *);
114 static void igb_reset_task(struct work_struct *);
115 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
116 static void igb_vlan_rx_add_vid(struct net_device *, u16);
117 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
118 static void igb_restore_vlan(struct igb_adapter *);
119
120 static int igb_suspend(struct pci_dev *, pm_message_t);
121 #ifdef CONFIG_PM
122 static int igb_resume(struct pci_dev *);
123 #endif
124 static void igb_shutdown(struct pci_dev *);
125
126 #ifdef CONFIG_NET_POLL_CONTROLLER
127 /* for netdump / net console */
128 static void igb_netpoll(struct net_device *);
129 #endif
130
131 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
132                      pci_channel_state_t);
133 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
134 static void igb_io_resume(struct pci_dev *);
135
136 static struct pci_error_handlers igb_err_handler = {
137         .error_detected = igb_io_error_detected,
138         .slot_reset = igb_io_slot_reset,
139         .resume = igb_io_resume,
140 };
141
142
143 static struct pci_driver igb_driver = {
144         .name     = igb_driver_name,
145         .id_table = igb_pci_tbl,
146         .probe    = igb_probe,
147         .remove   = __devexit_p(igb_remove),
148 #ifdef CONFIG_PM
149         /* Power Managment Hooks */
150         .suspend  = igb_suspend,
151         .resume   = igb_resume,
152 #endif
153         .shutdown = igb_shutdown,
154         .err_handler = &igb_err_handler
155 };
156
157 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
158 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
159 MODULE_LICENSE("GPL");
160 MODULE_VERSION(DRV_VERSION);
161
162 #ifdef DEBUG
163 /**
164  * igb_get_hw_dev_name - return device name string
165  * used by hardware layer to print debugging information
166  **/
167 char *igb_get_hw_dev_name(struct e1000_hw *hw)
168 {
169         struct igb_adapter *adapter = hw->back;
170         return adapter->netdev->name;
171 }
172 #endif
173
174 /**
175  * igb_init_module - Driver Registration Routine
176  *
177  * igb_init_module is the first routine called when the driver is
178  * loaded. All it does is register with the PCI subsystem.
179  **/
180 static int __init igb_init_module(void)
181 {
182         int ret;
183         printk(KERN_INFO "%s - version %s\n",
184                igb_driver_string, igb_driver_version);
185
186         printk(KERN_INFO "%s\n", igb_copyright);
187
188         ret = pci_register_driver(&igb_driver);
189         return ret;
190 }
191
192 module_init(igb_init_module);
193
194 /**
195  * igb_exit_module - Driver Exit Cleanup Routine
196  *
197  * igb_exit_module is called just before the driver is removed
198  * from memory.
199  **/
200 static void __exit igb_exit_module(void)
201 {
202         pci_unregister_driver(&igb_driver);
203 }
204
205 module_exit(igb_exit_module);
206
207 /**
208  * igb_alloc_queues - Allocate memory for all rings
209  * @adapter: board private structure to initialize
210  *
211  * We allocate one ring per queue at run-time since we don't know the
212  * number of queues at compile-time.
213  **/
214 static int igb_alloc_queues(struct igb_adapter *adapter)
215 {
216         int i;
217
218         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
219                                    sizeof(struct igb_ring), GFP_KERNEL);
220         if (!adapter->tx_ring)
221                 return -ENOMEM;
222
223         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
224                                    sizeof(struct igb_ring), GFP_KERNEL);
225         if (!adapter->rx_ring) {
226                 kfree(adapter->tx_ring);
227                 return -ENOMEM;
228         }
229
230         for (i = 0; i < adapter->num_rx_queues; i++) {
231                 struct igb_ring *ring = &(adapter->rx_ring[i]);
232                 ring->adapter = adapter;
233                 ring->itr_register = E1000_ITR;
234
235                 if (!ring->napi.poll)
236                         netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
237                                        adapter->napi.weight /
238                                        adapter->num_rx_queues);
239         }
240         return 0;
241 }
242
243 #define IGB_N0_QUEUE -1
244 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
245                               int tx_queue, int msix_vector)
246 {
247         u32 msixbm = 0;
248         struct e1000_hw *hw = &adapter->hw;
249                 /* The 82575 assigns vectors using a bitmask, which matches the
250                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
251                    or more queues to a vector, we write the appropriate bits
252                    into the MSIXBM register for that vector. */
253                 if (rx_queue > IGB_N0_QUEUE) {
254                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
255                         adapter->rx_ring[rx_queue].eims_value = msixbm;
256                 }
257                 if (tx_queue > IGB_N0_QUEUE) {
258                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
259                         adapter->tx_ring[tx_queue].eims_value =
260                                   E1000_EICR_TX_QUEUE0 << tx_queue;
261                 }
262                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
263 }
264
265 /**
266  * igb_configure_msix - Configure MSI-X hardware
267  *
268  * igb_configure_msix sets up the hardware to properly
269  * generate MSI-X interrupts.
270  **/
271 static void igb_configure_msix(struct igb_adapter *adapter)
272 {
273         u32 tmp;
274         int i, vector = 0;
275         struct e1000_hw *hw = &adapter->hw;
276
277         adapter->eims_enable_mask = 0;
278
279         for (i = 0; i < adapter->num_tx_queues; i++) {
280                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
281                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
282                 adapter->eims_enable_mask |= tx_ring->eims_value;
283                 if (tx_ring->itr_val)
284                         writel(1000000000 / (tx_ring->itr_val * 256),
285                                hw->hw_addr + tx_ring->itr_register);
286                 else
287                         writel(1, hw->hw_addr + tx_ring->itr_register);
288         }
289
290         for (i = 0; i < adapter->num_rx_queues; i++) {
291                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
292                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
293                 adapter->eims_enable_mask |= rx_ring->eims_value;
294                 if (rx_ring->itr_val)
295                         writel(1000000000 / (rx_ring->itr_val * 256),
296                                hw->hw_addr + rx_ring->itr_register);
297                 else
298                         writel(1, hw->hw_addr + rx_ring->itr_register);
299         }
300
301
302         /* set vector for other causes, i.e. link changes */
303                 array_wr32(E1000_MSIXBM(0), vector++,
304                                       E1000_EIMS_OTHER);
305
306                 /* disable IAM for ICR interrupt bits */
307                 wr32(E1000_IAM, 0);
308
309                 tmp = rd32(E1000_CTRL_EXT);
310                 /* enable MSI-X PBA support*/
311                 tmp |= E1000_CTRL_EXT_PBA_CLR;
312
313                 /* Auto-Mask interrupts upon ICR read. */
314                 tmp |= E1000_CTRL_EXT_EIAME;
315                 tmp |= E1000_CTRL_EXT_IRCA;
316
317                 wr32(E1000_CTRL_EXT, tmp);
318                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
319
320         wrfl();
321 }
322
323 /**
324  * igb_request_msix - Initialize MSI-X interrupts
325  *
326  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
327  * kernel.
328  **/
329 static int igb_request_msix(struct igb_adapter *adapter)
330 {
331         struct net_device *netdev = adapter->netdev;
332         int i, err = 0, vector = 0;
333
334         vector = 0;
335
336         for (i = 0; i < adapter->num_tx_queues; i++) {
337                 struct igb_ring *ring = &(adapter->tx_ring[i]);
338                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
339                 err = request_irq(adapter->msix_entries[vector].vector,
340                                   &igb_msix_tx, 0, ring->name,
341                                   &(adapter->tx_ring[i]));
342                 if (err)
343                         goto out;
344                 ring->itr_register = E1000_EITR(0) + (vector << 2);
345                 ring->itr_val = adapter->itr;
346                 vector++;
347         }
348         for (i = 0; i < adapter->num_rx_queues; i++) {
349                 struct igb_ring *ring = &(adapter->rx_ring[i]);
350                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
351                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
352                 else
353                         memcpy(ring->name, netdev->name, IFNAMSIZ);
354                 err = request_irq(adapter->msix_entries[vector].vector,
355                                   &igb_msix_rx, 0, ring->name,
356                                   &(adapter->rx_ring[i]));
357                 if (err)
358                         goto out;
359                 ring->itr_register = E1000_EITR(0) + (vector << 2);
360                 ring->itr_val = adapter->itr;
361                 vector++;
362         }
363
364         err = request_irq(adapter->msix_entries[vector].vector,
365                           &igb_msix_other, 0, netdev->name, netdev);
366         if (err)
367                 goto out;
368
369         adapter->napi.poll = igb_clean_rx_ring_msix;
370         for (i = 0; i < adapter->num_rx_queues; i++)
371                 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
372         igb_configure_msix(adapter);
373         return 0;
374 out:
375         return err;
376 }
377
378 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
379 {
380         if (adapter->msix_entries) {
381                 pci_disable_msix(adapter->pdev);
382                 kfree(adapter->msix_entries);
383                 adapter->msix_entries = NULL;
384         } else if (adapter->msi_enabled)
385                 pci_disable_msi(adapter->pdev);
386         return;
387 }
388
389
390 /**
391  * igb_set_interrupt_capability - set MSI or MSI-X if supported
392  *
393  * Attempt to configure interrupts using the best available
394  * capabilities of the hardware and kernel.
395  **/
396 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
397 {
398         int err;
399         int numvecs, i;
400
401         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
402         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
403                                         GFP_KERNEL);
404         if (!adapter->msix_entries)
405                 goto msi_only;
406
407         for (i = 0; i < numvecs; i++)
408                 adapter->msix_entries[i].entry = i;
409
410         err = pci_enable_msix(adapter->pdev,
411                               adapter->msix_entries,
412                               numvecs);
413         if (err == 0)
414                 return;
415
416         igb_reset_interrupt_capability(adapter);
417
418         /* If we can't do MSI-X, try MSI */
419 msi_only:
420         adapter->num_rx_queues = 1;
421         if (!pci_enable_msi(adapter->pdev))
422                 adapter->msi_enabled = 1;
423         return;
424 }
425
426 /**
427  * igb_request_irq - initialize interrupts
428  *
429  * Attempts to configure interrupts using the best available
430  * capabilities of the hardware and kernel.
431  **/
432 static int igb_request_irq(struct igb_adapter *adapter)
433 {
434         struct net_device *netdev = adapter->netdev;
435         struct e1000_hw *hw = &adapter->hw;
436         int err = 0;
437
438         if (adapter->msix_entries) {
439                 err = igb_request_msix(adapter);
440                 if (!err) {
441                         /* enable IAM, auto-mask,
442                          * DO NOT USE EIAM or IAM in legacy mode */
443                         wr32(E1000_IAM, IMS_ENABLE_MASK);
444                         goto request_done;
445                 }
446                 /* fall back to MSI */
447                 igb_reset_interrupt_capability(adapter);
448                 if (!pci_enable_msi(adapter->pdev))
449                         adapter->msi_enabled = 1;
450                 igb_free_all_tx_resources(adapter);
451                 igb_free_all_rx_resources(adapter);
452                 adapter->num_rx_queues = 1;
453                 igb_alloc_queues(adapter);
454         }
455         if (adapter->msi_enabled) {
456                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
457                                   netdev->name, netdev);
458                 if (!err)
459                         goto request_done;
460                 /* fall back to legacy interrupts */
461                 igb_reset_interrupt_capability(adapter);
462                 adapter->msi_enabled = 0;
463         }
464
465         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
466                           netdev->name, netdev);
467
468         if (err)
469                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
470                         err);
471
472 request_done:
473         return err;
474 }
475
476 static void igb_free_irq(struct igb_adapter *adapter)
477 {
478         struct net_device *netdev = adapter->netdev;
479
480         if (adapter->msix_entries) {
481                 int vector = 0, i;
482
483                 for (i = 0; i < adapter->num_tx_queues; i++)
484                         free_irq(adapter->msix_entries[vector++].vector,
485                                 &(adapter->tx_ring[i]));
486                 for (i = 0; i < adapter->num_rx_queues; i++)
487                         free_irq(adapter->msix_entries[vector++].vector,
488                                 &(adapter->rx_ring[i]));
489
490                 free_irq(adapter->msix_entries[vector++].vector, netdev);
491                 return;
492         }
493
494         free_irq(adapter->pdev->irq, netdev);
495 }
496
497 /**
498  * igb_irq_disable - Mask off interrupt generation on the NIC
499  * @adapter: board private structure
500  **/
501 static void igb_irq_disable(struct igb_adapter *adapter)
502 {
503         struct e1000_hw *hw = &adapter->hw;
504
505         if (adapter->msix_entries) {
506                 wr32(E1000_EIMC, ~0);
507                 wr32(E1000_EIAC, 0);
508         }
509         wr32(E1000_IMC, ~0);
510         wrfl();
511         synchronize_irq(adapter->pdev->irq);
512 }
513
514 /**
515  * igb_irq_enable - Enable default interrupt generation settings
516  * @adapter: board private structure
517  **/
518 static void igb_irq_enable(struct igb_adapter *adapter)
519 {
520         struct e1000_hw *hw = &adapter->hw;
521
522         if (adapter->msix_entries) {
523                 wr32(E1000_EIMS,
524                                 adapter->eims_enable_mask);
525                 wr32(E1000_EIAC,
526                                 adapter->eims_enable_mask);
527                 wr32(E1000_IMS, E1000_IMS_LSC);
528         } else
529         wr32(E1000_IMS, IMS_ENABLE_MASK);
530 }
531
532 static void igb_update_mng_vlan(struct igb_adapter *adapter)
533 {
534         struct net_device *netdev = adapter->netdev;
535         u16 vid = adapter->hw.mng_cookie.vlan_id;
536         u16 old_vid = adapter->mng_vlan_id;
537         if (adapter->vlgrp) {
538                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
539                         if (adapter->hw.mng_cookie.status &
540                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
541                                 igb_vlan_rx_add_vid(netdev, vid);
542                                 adapter->mng_vlan_id = vid;
543                         } else
544                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
545
546                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
547                                         (vid != old_vid) &&
548                             !vlan_group_get_device(adapter->vlgrp, old_vid))
549                                 igb_vlan_rx_kill_vid(netdev, old_vid);
550                 } else
551                         adapter->mng_vlan_id = vid;
552         }
553 }
554
555 /**
556  * igb_release_hw_control - release control of the h/w to f/w
557  * @adapter: address of board private structure
558  *
559  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
560  * For ASF and Pass Through versions of f/w this means that the
561  * driver is no longer loaded.
562  *
563  **/
564 static void igb_release_hw_control(struct igb_adapter *adapter)
565 {
566         struct e1000_hw *hw = &adapter->hw;
567         u32 ctrl_ext;
568
569         /* Let firmware take over control of h/w */
570         ctrl_ext = rd32(E1000_CTRL_EXT);
571         wr32(E1000_CTRL_EXT,
572                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
573 }
574
575
576 /**
577  * igb_get_hw_control - get control of the h/w from f/w
578  * @adapter: address of board private structure
579  *
580  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
581  * For ASF and Pass Through versions of f/w this means that
582  * the driver is loaded.
583  *
584  **/
585 static void igb_get_hw_control(struct igb_adapter *adapter)
586 {
587         struct e1000_hw *hw = &adapter->hw;
588         u32 ctrl_ext;
589
590         /* Let firmware know the driver has taken over */
591         ctrl_ext = rd32(E1000_CTRL_EXT);
592         wr32(E1000_CTRL_EXT,
593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
594 }
595
596 static void igb_init_manageability(struct igb_adapter *adapter)
597 {
598         struct e1000_hw *hw = &adapter->hw;
599
600         if (adapter->en_mng_pt) {
601                 u32 manc2h = rd32(E1000_MANC2H);
602                 u32 manc = rd32(E1000_MANC);
603
604                 /* enable receiving management packets to the host */
605                 /* this will probably generate destination unreachable messages
606                  * from the host OS, but the packets will be handled on SMBUS */
607                 manc |= E1000_MANC_EN_MNG2HOST;
608 #define E1000_MNG2HOST_PORT_623 (1 << 5)
609 #define E1000_MNG2HOST_PORT_664 (1 << 6)
610                 manc2h |= E1000_MNG2HOST_PORT_623;
611                 manc2h |= E1000_MNG2HOST_PORT_664;
612                 wr32(E1000_MANC2H, manc2h);
613
614                 wr32(E1000_MANC, manc);
615         }
616 }
617
618 /**
619  * igb_configure - configure the hardware for RX and TX
620  * @adapter: private board structure
621  **/
622 static void igb_configure(struct igb_adapter *adapter)
623 {
624         struct net_device *netdev = adapter->netdev;
625         int i;
626
627         igb_get_hw_control(adapter);
628         igb_set_multi(netdev);
629
630         igb_restore_vlan(adapter);
631         igb_init_manageability(adapter);
632
633         igb_configure_tx(adapter);
634         igb_setup_rctl(adapter);
635         igb_configure_rx(adapter);
636         /* call IGB_DESC_UNUSED which always leaves
637          * at least 1 descriptor unused to make sure
638          * next_to_use != next_to_clean */
639         for (i = 0; i < adapter->num_rx_queues; i++) {
640                 struct igb_ring *ring = &adapter->rx_ring[i];
641                 igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring));
642         }
643
644
645         adapter->tx_queue_len = netdev->tx_queue_len;
646 }
647
648
649 /**
650  * igb_up - Open the interface and prepare it to handle traffic
651  * @adapter: board private structure
652  **/
653
654 int igb_up(struct igb_adapter *adapter)
655 {
656         struct e1000_hw *hw = &adapter->hw;
657         int i;
658
659         /* hardware has been reset, we need to reload some things */
660         igb_configure(adapter);
661
662         clear_bit(__IGB_DOWN, &adapter->state);
663
664         napi_enable(&adapter->napi);
665
666         if (adapter->msix_entries) {
667                 for (i = 0; i < adapter->num_rx_queues; i++)
668                         napi_enable(&adapter->rx_ring[i].napi);
669                 igb_configure_msix(adapter);
670         }
671
672         /* Clear any pending interrupts. */
673         rd32(E1000_ICR);
674         igb_irq_enable(adapter);
675
676         /* Fire a link change interrupt to start the watchdog. */
677         wr32(E1000_ICS, E1000_ICS_LSC);
678         return 0;
679 }
680
681 void igb_down(struct igb_adapter *adapter)
682 {
683         struct e1000_hw *hw = &adapter->hw;
684         struct net_device *netdev = adapter->netdev;
685         u32 tctl, rctl;
686         int i;
687
688         /* signal that we're down so the interrupt handler does not
689          * reschedule our watchdog timer */
690         set_bit(__IGB_DOWN, &adapter->state);
691
692         /* disable receives in the hardware */
693         rctl = rd32(E1000_RCTL);
694         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
695         /* flush and sleep below */
696
697         netif_stop_queue(netdev);
698
699         /* disable transmits in the hardware */
700         tctl = rd32(E1000_TCTL);
701         tctl &= ~E1000_TCTL_EN;
702         wr32(E1000_TCTL, tctl);
703         /* flush both disables and wait for them to finish */
704         wrfl();
705         msleep(10);
706
707         napi_disable(&adapter->napi);
708
709         if (adapter->msix_entries)
710                 for (i = 0; i < adapter->num_rx_queues; i++)
711                         napi_disable(&adapter->rx_ring[i].napi);
712         igb_irq_disable(adapter);
713
714         del_timer_sync(&adapter->watchdog_timer);
715         del_timer_sync(&adapter->phy_info_timer);
716
717         netdev->tx_queue_len = adapter->tx_queue_len;
718         netif_carrier_off(netdev);
719         adapter->link_speed = 0;
720         adapter->link_duplex = 0;
721
722         igb_reset(adapter);
723         igb_clean_all_tx_rings(adapter);
724         igb_clean_all_rx_rings(adapter);
725 }
726
727 void igb_reinit_locked(struct igb_adapter *adapter)
728 {
729         WARN_ON(in_interrupt());
730         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
731                 msleep(1);
732         igb_down(adapter);
733         igb_up(adapter);
734         clear_bit(__IGB_RESETTING, &adapter->state);
735 }
736
737 void igb_reset(struct igb_adapter *adapter)
738 {
739         struct e1000_hw *hw = &adapter->hw;
740         struct e1000_fc_info *fc = &adapter->hw.fc;
741         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
742         u16 hwm;
743
744         /* Repartition Pba for greater than 9k mtu
745          * To take effect CTRL.RST is required.
746          */
747         pba = E1000_PBA_34K;
748
749         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
750                 /* adjust PBA for jumbo frames */
751                 wr32(E1000_PBA, pba);
752
753                 /* To maintain wire speed transmits, the Tx FIFO should be
754                  * large enough to accommodate two full transmit packets,
755                  * rounded up to the next 1KB and expressed in KB.  Likewise,
756                  * the Rx FIFO should be large enough to accommodate at least
757                  * one full receive packet and is similarly rounded up and
758                  * expressed in KB. */
759                 pba = rd32(E1000_PBA);
760                 /* upper 16 bits has Tx packet buffer allocation size in KB */
761                 tx_space = pba >> 16;
762                 /* lower 16 bits has Rx packet buffer allocation size in KB */
763                 pba &= 0xffff;
764                 /* the tx fifo also stores 16 bytes of information about the tx
765                  * but don't include ethernet FCS because hardware appends it */
766                 min_tx_space = (adapter->max_frame_size +
767                                 sizeof(struct e1000_tx_desc) -
768                                 ETH_FCS_LEN) * 2;
769                 min_tx_space = ALIGN(min_tx_space, 1024);
770                 min_tx_space >>= 10;
771                 /* software strips receive CRC, so leave room for it */
772                 min_rx_space = adapter->max_frame_size;
773                 min_rx_space = ALIGN(min_rx_space, 1024);
774                 min_rx_space >>= 10;
775
776                 /* If current Tx allocation is less than the min Tx FIFO size,
777                  * and the min Tx FIFO size is less than the current Rx FIFO
778                  * allocation, take space away from current Rx allocation */
779                 if (tx_space < min_tx_space &&
780                     ((min_tx_space - tx_space) < pba)) {
781                         pba = pba - (min_tx_space - tx_space);
782
783                         /* if short on rx space, rx wins and must trump tx
784                          * adjustment */
785                         if (pba < min_rx_space)
786                                 pba = min_rx_space;
787                 }
788         }
789         wr32(E1000_PBA, pba);
790
791         /* flow control settings */
792         /* The high water mark must be low enough to fit one full frame
793          * (or the size used for early receive) above it in the Rx FIFO.
794          * Set it to the lower of:
795          * - 90% of the Rx FIFO size, or
796          * - the full Rx FIFO size minus one full frame */
797         hwm = min(((pba << 10) * 9 / 10),
798                   ((pba << 10) - adapter->max_frame_size));
799
800         fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
801         fc->low_water = fc->high_water - 8;
802         fc->pause_time = 0xFFFF;
803         fc->send_xon = 1;
804         fc->type = fc->original_type;
805
806         /* Allow time for pending master requests to run */
807         adapter->hw.mac.ops.reset_hw(&adapter->hw);
808         wr32(E1000_WUC, 0);
809
810         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
811                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
812
813         igb_update_mng_vlan(adapter);
814
815         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
816         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
817
818         igb_reset_adaptive(&adapter->hw);
819         adapter->hw.phy.ops.get_phy_info(&adapter->hw);
820 }
821
822 /**
823  * igb_probe - Device Initialization Routine
824  * @pdev: PCI device information struct
825  * @ent: entry in igb_pci_tbl
826  *
827  * Returns 0 on success, negative on failure
828  *
829  * igb_probe initializes an adapter identified by a pci_dev structure.
830  * The OS initialization, configuring of the adapter private structure,
831  * and a hardware reset occur.
832  **/
833 static int __devinit igb_probe(struct pci_dev *pdev,
834                                const struct pci_device_id *ent)
835 {
836         struct net_device *netdev;
837         struct igb_adapter *adapter;
838         struct e1000_hw *hw;
839         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
840         unsigned long mmio_start, mmio_len;
841         static int cards_found;
842         int i, err, pci_using_dac;
843         u16 eeprom_data = 0;
844         u16 eeprom_apme_mask = IGB_EEPROM_APME;
845         u32 part_num;
846
847         err = pci_enable_device(pdev);
848         if (err)
849                 return err;
850
851         pci_using_dac = 0;
852         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
853         if (!err) {
854                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
855                 if (!err)
856                         pci_using_dac = 1;
857         } else {
858                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
859                 if (err) {
860                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
861                         if (err) {
862                                 dev_err(&pdev->dev, "No usable DMA "
863                                         "configuration, aborting\n");
864                                 goto err_dma;
865                         }
866                 }
867         }
868
869         err = pci_request_regions(pdev, igb_driver_name);
870         if (err)
871                 goto err_pci_reg;
872
873         pci_set_master(pdev);
874
875         err = -ENOMEM;
876         netdev = alloc_etherdev(sizeof(struct igb_adapter));
877         if (!netdev)
878                 goto err_alloc_etherdev;
879
880         SET_NETDEV_DEV(netdev, &pdev->dev);
881
882         pci_set_drvdata(pdev, netdev);
883         adapter = netdev_priv(netdev);
884         adapter->netdev = netdev;
885         adapter->pdev = pdev;
886         hw = &adapter->hw;
887         hw->back = adapter;
888         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
889
890         mmio_start = pci_resource_start(pdev, 0);
891         mmio_len = pci_resource_len(pdev, 0);
892
893         err = -EIO;
894         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
895         if (!adapter->hw.hw_addr)
896                 goto err_ioremap;
897
898         netdev->open = &igb_open;
899         netdev->stop = &igb_close;
900         netdev->get_stats = &igb_get_stats;
901         netdev->set_multicast_list = &igb_set_multi;
902         netdev->set_mac_address = &igb_set_mac;
903         netdev->change_mtu = &igb_change_mtu;
904         netdev->do_ioctl = &igb_ioctl;
905         igb_set_ethtool_ops(netdev);
906         netdev->tx_timeout = &igb_tx_timeout;
907         netdev->watchdog_timeo = 5 * HZ;
908         netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
909         netdev->vlan_rx_register = igb_vlan_rx_register;
910         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
911         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
912 #ifdef CONFIG_NET_POLL_CONTROLLER
913         netdev->poll_controller = igb_netpoll;
914 #endif
915         netdev->hard_start_xmit = &igb_xmit_frame_adv;
916
917         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
918
919         netdev->mem_start = mmio_start;
920         netdev->mem_end = mmio_start + mmio_len;
921
922         adapter->bd_number = cards_found;
923
924         /* PCI config space info */
925         hw->vendor_id = pdev->vendor;
926         hw->device_id = pdev->device;
927         hw->revision_id = pdev->revision;
928         hw->subsystem_vendor_id = pdev->subsystem_vendor;
929         hw->subsystem_device_id = pdev->subsystem_device;
930
931         /* setup the private structure */
932         hw->back = adapter;
933         /* Copy the default MAC, PHY and NVM function pointers */
934         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
935         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
936         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
937         /* Initialize skew-specific constants */
938         err = ei->get_invariants(hw);
939         if (err)
940                 goto err_hw_init;
941
942         err = igb_sw_init(adapter);
943         if (err)
944                 goto err_sw_init;
945
946         igb_get_bus_info_pcie(hw);
947
948         hw->phy.autoneg_wait_to_complete = false;
949         hw->mac.adaptive_ifs = true;
950
951         /* Copper options */
952         if (hw->phy.media_type == e1000_media_type_copper) {
953                 hw->phy.mdix = AUTO_ALL_MODES;
954                 hw->phy.disable_polarity_correction = false;
955                 hw->phy.ms_type = e1000_ms_hw_default;
956         }
957
958         if (igb_check_reset_block(hw))
959                 dev_info(&pdev->dev,
960                         "PHY reset is blocked due to SOL/IDER session.\n");
961
962         netdev->features = NETIF_F_SG |
963                            NETIF_F_HW_CSUM |
964                            NETIF_F_HW_VLAN_TX |
965                            NETIF_F_HW_VLAN_RX |
966                            NETIF_F_HW_VLAN_FILTER;
967
968         netdev->features |= NETIF_F_TSO;
969
970         netdev->features |= NETIF_F_TSO6;
971         if (pci_using_dac)
972                 netdev->features |= NETIF_F_HIGHDMA;
973
974         netdev->features |= NETIF_F_LLTX;
975         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
976
977         /* before reading the NVM, reset the controller to put the device in a
978          * known good starting state */
979         hw->mac.ops.reset_hw(hw);
980
981         /* make sure the NVM is good */
982         if (igb_validate_nvm_checksum(hw) < 0) {
983                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
984                 err = -EIO;
985                 goto err_eeprom;
986         }
987
988         /* copy the MAC address out of the NVM */
989         if (hw->mac.ops.read_mac_addr(hw))
990                 dev_err(&pdev->dev, "NVM Read Error\n");
991
992         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
993         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
994
995         if (!is_valid_ether_addr(netdev->perm_addr)) {
996                 dev_err(&pdev->dev, "Invalid MAC Address\n");
997                 err = -EIO;
998                 goto err_eeprom;
999         }
1000
1001         init_timer(&adapter->watchdog_timer);
1002         adapter->watchdog_timer.function = &igb_watchdog;
1003         adapter->watchdog_timer.data = (unsigned long) adapter;
1004
1005         init_timer(&adapter->phy_info_timer);
1006         adapter->phy_info_timer.function = &igb_update_phy_info;
1007         adapter->phy_info_timer.data = (unsigned long) adapter;
1008
1009         INIT_WORK(&adapter->reset_task, igb_reset_task);
1010         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1011
1012         /* Initialize link & ring properties that are user-changeable */
1013         adapter->tx_ring->count = 256;
1014         for (i = 0; i < adapter->num_tx_queues; i++)
1015                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1016         adapter->rx_ring->count = 256;
1017         for (i = 0; i < adapter->num_rx_queues; i++)
1018                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1019
1020         adapter->fc_autoneg = true;
1021         hw->mac.autoneg = true;
1022         hw->phy.autoneg_advertised = 0x2f;
1023
1024         hw->fc.original_type = e1000_fc_default;
1025         hw->fc.type = e1000_fc_default;
1026
1027         adapter->itr_setting = 3;
1028         adapter->itr = IGB_START_ITR;
1029
1030         igb_validate_mdi_setting(hw);
1031
1032         adapter->rx_csum = 1;
1033
1034         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1035          * enable the ACPI Magic Packet filter
1036          */
1037
1038         if (hw->bus.func == 0 ||
1039             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1040                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1041                                      &eeprom_data);
1042
1043         if (eeprom_data & eeprom_apme_mask)
1044                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1045
1046         /* now that we have the eeprom settings, apply the special cases where
1047          * the eeprom may be wrong or the board simply won't support wake on
1048          * lan on a particular port */
1049         switch (pdev->device) {
1050         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1051                 adapter->eeprom_wol = 0;
1052                 break;
1053         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1054                 /* Wake events only supported on port A for dual fiber
1055                  * regardless of eeprom setting */
1056                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1057                         adapter->eeprom_wol = 0;
1058                 break;
1059         }
1060
1061         /* initialize the wol settings based on the eeprom settings */
1062         adapter->wol = adapter->eeprom_wol;
1063
1064         /* reset the hardware with the new settings */
1065         igb_reset(adapter);
1066
1067         /* let the f/w know that the h/w is now under the control of the
1068          * driver. */
1069         igb_get_hw_control(adapter);
1070
1071         /* tell the stack to leave us alone until igb_open() is called */
1072         netif_carrier_off(netdev);
1073         netif_stop_queue(netdev);
1074
1075         strcpy(netdev->name, "eth%d");
1076         err = register_netdev(netdev);
1077         if (err)
1078                 goto err_register;
1079
1080         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1081         /* print bus type/speed/width info */
1082         dev_info(&pdev->dev,
1083                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1084                  netdev->name,
1085                  ((hw->bus.speed == e1000_bus_speed_2500)
1086                   ? "2.5Gb/s" : "unknown"),
1087                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1088                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1089                   ? "Width x1" : "unknown"),
1090                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1091                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1092
1093         igb_read_part_num(hw, &part_num);
1094         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1095                 (part_num >> 8), (part_num & 0xff));
1096
1097         dev_info(&pdev->dev,
1098                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1099                 adapter->msix_entries ? "MSI-X" :
1100                 adapter->msi_enabled ? "MSI" : "legacy",
1101                 adapter->num_rx_queues, adapter->num_tx_queues);
1102
1103         cards_found++;
1104         return 0;
1105
1106 err_register:
1107         igb_release_hw_control(adapter);
1108 err_eeprom:
1109         if (!igb_check_reset_block(hw))
1110                 hw->phy.ops.reset_phy(hw);
1111
1112         if (hw->flash_address)
1113                 iounmap(hw->flash_address);
1114
1115         igb_remove_device(hw);
1116         kfree(adapter->tx_ring);
1117         kfree(adapter->rx_ring);
1118 err_sw_init:
1119 err_hw_init:
1120         iounmap(hw->hw_addr);
1121 err_ioremap:
1122         free_netdev(netdev);
1123 err_alloc_etherdev:
1124         pci_release_regions(pdev);
1125 err_pci_reg:
1126 err_dma:
1127         pci_disable_device(pdev);
1128         return err;
1129 }
1130
1131 /**
1132  * igb_remove - Device Removal Routine
1133  * @pdev: PCI device information struct
1134  *
1135  * igb_remove is called by the PCI subsystem to alert the driver
1136  * that it should release a PCI device.  The could be caused by a
1137  * Hot-Plug event, or because the driver is going to be removed from
1138  * memory.
1139  **/
1140 static void __devexit igb_remove(struct pci_dev *pdev)
1141 {
1142         struct net_device *netdev = pci_get_drvdata(pdev);
1143         struct igb_adapter *adapter = netdev_priv(netdev);
1144
1145         /* flush_scheduled work may reschedule our watchdog task, so
1146          * explicitly disable watchdog tasks from being rescheduled  */
1147         set_bit(__IGB_DOWN, &adapter->state);
1148         del_timer_sync(&adapter->watchdog_timer);
1149         del_timer_sync(&adapter->phy_info_timer);
1150
1151         flush_scheduled_work();
1152
1153         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1154          * would have already happened in close and is redundant. */
1155         igb_release_hw_control(adapter);
1156
1157         unregister_netdev(netdev);
1158
1159         if (!igb_check_reset_block(&adapter->hw))
1160                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1161
1162         igb_remove_device(&adapter->hw);
1163         igb_reset_interrupt_capability(adapter);
1164
1165         kfree(adapter->tx_ring);
1166         kfree(adapter->rx_ring);
1167
1168         iounmap(adapter->hw.hw_addr);
1169         if (adapter->hw.flash_address)
1170                 iounmap(adapter->hw.flash_address);
1171         pci_release_regions(pdev);
1172
1173         free_netdev(netdev);
1174
1175         pci_disable_device(pdev);
1176 }
1177
1178 /**
1179  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1180  * @adapter: board private structure to initialize
1181  *
1182  * igb_sw_init initializes the Adapter private data structure.
1183  * Fields are initialized based on PCI device information and
1184  * OS network device settings (MTU size).
1185  **/
1186 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1187 {
1188         struct e1000_hw *hw = &adapter->hw;
1189         struct net_device *netdev = adapter->netdev;
1190         struct pci_dev *pdev = adapter->pdev;
1191
1192         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1193
1194         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1195         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1196         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1197         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1198
1199         /* Number of supported queues. */
1200         /* Having more queues than CPUs doesn't make sense. */
1201         adapter->num_tx_queues = 1;
1202         adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1203
1204         igb_set_interrupt_capability(adapter);
1205
1206         if (igb_alloc_queues(adapter)) {
1207                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1208                 return -ENOMEM;
1209         }
1210
1211         /* Explicitly disable IRQ since the NIC can be in any state. */
1212         igb_irq_disable(adapter);
1213
1214         set_bit(__IGB_DOWN, &adapter->state);
1215         return 0;
1216 }
1217
1218 /**
1219  * igb_open - Called when a network interface is made active
1220  * @netdev: network interface device structure
1221  *
1222  * Returns 0 on success, negative value on failure
1223  *
1224  * The open entry point is called when a network interface is made
1225  * active by the system (IFF_UP).  At this point all resources needed
1226  * for transmit and receive operations are allocated, the interrupt
1227  * handler is registered with the OS, the watchdog timer is started,
1228  * and the stack is notified that the interface is ready.
1229  **/
1230 static int igb_open(struct net_device *netdev)
1231 {
1232         struct igb_adapter *adapter = netdev_priv(netdev);
1233         struct e1000_hw *hw = &adapter->hw;
1234         int err;
1235         int i;
1236
1237         /* disallow open during test */
1238         if (test_bit(__IGB_TESTING, &adapter->state))
1239                 return -EBUSY;
1240
1241         /* allocate transmit descriptors */
1242         err = igb_setup_all_tx_resources(adapter);
1243         if (err)
1244                 goto err_setup_tx;
1245
1246         /* allocate receive descriptors */
1247         err = igb_setup_all_rx_resources(adapter);
1248         if (err)
1249                 goto err_setup_rx;
1250
1251         /* e1000_power_up_phy(adapter); */
1252
1253         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1254         if ((adapter->hw.mng_cookie.status &
1255              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1256                 igb_update_mng_vlan(adapter);
1257
1258         /* before we allocate an interrupt, we must be ready to handle it.
1259          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1260          * as soon as we call pci_request_irq, so we have to setup our
1261          * clean_rx handler before we do so.  */
1262         igb_configure(adapter);
1263
1264         err = igb_request_irq(adapter);
1265         if (err)
1266                 goto err_req_irq;
1267
1268         /* From here on the code is the same as igb_up() */
1269         clear_bit(__IGB_DOWN, &adapter->state);
1270
1271         napi_enable(&adapter->napi);
1272         if (adapter->msix_entries)
1273                 for (i = 0; i < adapter->num_rx_queues; i++)
1274                         napi_enable(&adapter->rx_ring[i].napi);
1275
1276         igb_irq_enable(adapter);
1277
1278         /* Clear any pending interrupts. */
1279         rd32(E1000_ICR);
1280         /* Fire a link status change interrupt to start the watchdog. */
1281         wr32(E1000_ICS, E1000_ICS_LSC);
1282
1283         return 0;
1284
1285 err_req_irq:
1286         igb_release_hw_control(adapter);
1287         /* e1000_power_down_phy(adapter); */
1288         igb_free_all_rx_resources(adapter);
1289 err_setup_rx:
1290         igb_free_all_tx_resources(adapter);
1291 err_setup_tx:
1292         igb_reset(adapter);
1293
1294         return err;
1295 }
1296
1297 /**
1298  * igb_close - Disables a network interface
1299  * @netdev: network interface device structure
1300  *
1301  * Returns 0, this is not allowed to fail
1302  *
1303  * The close entry point is called when an interface is de-activated
1304  * by the OS.  The hardware is still under the driver's control, but
1305  * needs to be disabled.  A global MAC reset is issued to stop the
1306  * hardware, and all transmit and receive resources are freed.
1307  **/
1308 static int igb_close(struct net_device *netdev)
1309 {
1310         struct igb_adapter *adapter = netdev_priv(netdev);
1311
1312         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1313         igb_down(adapter);
1314
1315         igb_free_irq(adapter);
1316
1317         igb_free_all_tx_resources(adapter);
1318         igb_free_all_rx_resources(adapter);
1319
1320         /* kill manageability vlan ID if supported, but not if a vlan with
1321          * the same ID is registered on the host OS (let 8021q kill it) */
1322         if ((adapter->hw.mng_cookie.status &
1323                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1324              !(adapter->vlgrp &&
1325                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1326                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1327
1328         return 0;
1329 }
1330
1331 /**
1332  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1333  * @adapter: board private structure
1334  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1335  *
1336  * Return 0 on success, negative on failure
1337  **/
1338
1339 int igb_setup_tx_resources(struct igb_adapter *adapter,
1340                            struct igb_ring *tx_ring)
1341 {
1342         struct pci_dev *pdev = adapter->pdev;
1343         int size;
1344
1345         size = sizeof(struct igb_buffer) * tx_ring->count;
1346         tx_ring->buffer_info = vmalloc(size);
1347         if (!tx_ring->buffer_info)
1348                 goto err;
1349         memset(tx_ring->buffer_info, 0, size);
1350
1351         /* round up to nearest 4K */
1352         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1353                         + sizeof(u32);
1354         tx_ring->size = ALIGN(tx_ring->size, 4096);
1355
1356         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1357                                              &tx_ring->dma);
1358
1359         if (!tx_ring->desc)
1360                 goto err;
1361
1362         tx_ring->adapter = adapter;
1363         tx_ring->next_to_use = 0;
1364         tx_ring->next_to_clean = 0;
1365         spin_lock_init(&tx_ring->tx_clean_lock);
1366         spin_lock_init(&tx_ring->tx_lock);
1367         return 0;
1368
1369 err:
1370         vfree(tx_ring->buffer_info);
1371         dev_err(&adapter->pdev->dev,
1372                 "Unable to allocate memory for the transmit descriptor ring\n");
1373         return -ENOMEM;
1374 }
1375
1376 /**
1377  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1378  *                                (Descriptors) for all queues
1379  * @adapter: board private structure
1380  *
1381  * Return 0 on success, negative on failure
1382  **/
1383 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1384 {
1385         int i, err = 0;
1386
1387         for (i = 0; i < adapter->num_tx_queues; i++) {
1388                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1389                 if (err) {
1390                         dev_err(&adapter->pdev->dev,
1391                                 "Allocation for Tx Queue %u failed\n", i);
1392                         for (i--; i >= 0; i--)
1393                                 igb_free_tx_resources(adapter,
1394                                                         &adapter->tx_ring[i]);
1395                         break;
1396                 }
1397         }
1398
1399         return err;
1400 }
1401
1402 /**
1403  * igb_configure_tx - Configure transmit Unit after Reset
1404  * @adapter: board private structure
1405  *
1406  * Configure the Tx unit of the MAC after a reset.
1407  **/
1408 static void igb_configure_tx(struct igb_adapter *adapter)
1409 {
1410         u64 tdba, tdwba;
1411         struct e1000_hw *hw = &adapter->hw;
1412         u32 tctl;
1413         u32 txdctl, txctrl;
1414         int i;
1415
1416         for (i = 0; i < adapter->num_tx_queues; i++) {
1417                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1418
1419                 wr32(E1000_TDLEN(i),
1420                                 ring->count * sizeof(struct e1000_tx_desc));
1421                 tdba = ring->dma;
1422                 wr32(E1000_TDBAL(i),
1423                                 tdba & 0x00000000ffffffffULL);
1424                 wr32(E1000_TDBAH(i), tdba >> 32);
1425
1426                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1427                 tdwba |= 1; /* enable head wb */
1428                 wr32(E1000_TDWBAL(i),
1429                                 tdwba & 0x00000000ffffffffULL);
1430                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1431
1432                 ring->head = E1000_TDH(i);
1433                 ring->tail = E1000_TDT(i);
1434                 writel(0, hw->hw_addr + ring->tail);
1435                 writel(0, hw->hw_addr + ring->head);
1436                 txdctl = rd32(E1000_TXDCTL(i));
1437                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1438                 wr32(E1000_TXDCTL(i), txdctl);
1439
1440                 /* Turn off Relaxed Ordering on head write-backs.  The
1441                  * writebacks MUST be delivered in order or it will
1442                  * completely screw up our bookeeping.
1443                  */
1444                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1445                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1446                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1447         }
1448
1449
1450
1451         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1452
1453         /* Program the Transmit Control Register */
1454
1455         tctl = rd32(E1000_TCTL);
1456         tctl &= ~E1000_TCTL_CT;
1457         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1458                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1459
1460         igb_config_collision_dist(hw);
1461
1462         /* Setup Transmit Descriptor Settings for eop descriptor */
1463         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1464
1465         /* Enable transmits */
1466         tctl |= E1000_TCTL_EN;
1467
1468         wr32(E1000_TCTL, tctl);
1469 }
1470
1471 /**
1472  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1473  * @adapter: board private structure
1474  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1475  *
1476  * Returns 0 on success, negative on failure
1477  **/
1478
1479 int igb_setup_rx_resources(struct igb_adapter *adapter,
1480                            struct igb_ring *rx_ring)
1481 {
1482         struct pci_dev *pdev = adapter->pdev;
1483         int size, desc_len;
1484
1485         size = sizeof(struct igb_buffer) * rx_ring->count;
1486         rx_ring->buffer_info = vmalloc(size);
1487         if (!rx_ring->buffer_info)
1488                 goto err;
1489         memset(rx_ring->buffer_info, 0, size);
1490
1491         desc_len = sizeof(union e1000_adv_rx_desc);
1492
1493         /* Round up to nearest 4K */
1494         rx_ring->size = rx_ring->count * desc_len;
1495         rx_ring->size = ALIGN(rx_ring->size, 4096);
1496
1497         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1498                                              &rx_ring->dma);
1499
1500         if (!rx_ring->desc)
1501                 goto err;
1502
1503         rx_ring->next_to_clean = 0;
1504         rx_ring->next_to_use = 0;
1505         rx_ring->pending_skb = NULL;
1506
1507         rx_ring->adapter = adapter;
1508         /* FIXME: do we want to setup ring->napi->poll here? */
1509         rx_ring->napi.poll = adapter->napi.poll;
1510
1511         return 0;
1512
1513 err:
1514         vfree(rx_ring->buffer_info);
1515         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1516                 "the receive descriptor ring\n");
1517         return -ENOMEM;
1518 }
1519
1520 /**
1521  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1522  *                                (Descriptors) for all queues
1523  * @adapter: board private structure
1524  *
1525  * Return 0 on success, negative on failure
1526  **/
1527 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1528 {
1529         int i, err = 0;
1530
1531         for (i = 0; i < adapter->num_rx_queues; i++) {
1532                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1533                 if (err) {
1534                         dev_err(&adapter->pdev->dev,
1535                                 "Allocation for Rx Queue %u failed\n", i);
1536                         for (i--; i >= 0; i--)
1537                                 igb_free_rx_resources(adapter,
1538                                                         &adapter->rx_ring[i]);
1539                         break;
1540                 }
1541         }
1542
1543         return err;
1544 }
1545
1546 /**
1547  * igb_setup_rctl - configure the receive control registers
1548  * @adapter: Board private structure
1549  **/
1550 static void igb_setup_rctl(struct igb_adapter *adapter)
1551 {
1552         struct e1000_hw *hw = &adapter->hw;
1553         u32 rctl;
1554         u32 srrctl = 0;
1555         int i;
1556
1557         rctl = rd32(E1000_RCTL);
1558
1559         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1560
1561         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1562                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1563                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1564
1565         /* disable the stripping of CRC because it breaks
1566          * BMC firmware connected over SMBUS
1567         rctl |= E1000_RCTL_SECRC;
1568         */
1569
1570         rctl &= ~E1000_RCTL_SBP;
1571
1572         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1573                 rctl &= ~E1000_RCTL_LPE;
1574         else
1575                 rctl |= E1000_RCTL_LPE;
1576         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1577                 /* Setup buffer sizes */
1578                 rctl &= ~E1000_RCTL_SZ_4096;
1579                 rctl |= E1000_RCTL_BSEX;
1580                 switch (adapter->rx_buffer_len) {
1581                 case IGB_RXBUFFER_256:
1582                         rctl |= E1000_RCTL_SZ_256;
1583                         rctl &= ~E1000_RCTL_BSEX;
1584                         break;
1585                 case IGB_RXBUFFER_512:
1586                         rctl |= E1000_RCTL_SZ_512;
1587                         rctl &= ~E1000_RCTL_BSEX;
1588                         break;
1589                 case IGB_RXBUFFER_1024:
1590                         rctl |= E1000_RCTL_SZ_1024;
1591                         rctl &= ~E1000_RCTL_BSEX;
1592                         break;
1593                 case IGB_RXBUFFER_2048:
1594                 default:
1595                         rctl |= E1000_RCTL_SZ_2048;
1596                         rctl &= ~E1000_RCTL_BSEX;
1597                         break;
1598                 case IGB_RXBUFFER_4096:
1599                         rctl |= E1000_RCTL_SZ_4096;
1600                         break;
1601                 case IGB_RXBUFFER_8192:
1602                         rctl |= E1000_RCTL_SZ_8192;
1603                         break;
1604                 case IGB_RXBUFFER_16384:
1605                         rctl |= E1000_RCTL_SZ_16384;
1606                         break;
1607                 }
1608         } else {
1609                 rctl &= ~E1000_RCTL_BSEX;
1610                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1611         }
1612
1613         /* 82575 and greater support packet-split where the protocol
1614          * header is placed in skb->data and the packet data is
1615          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1616          * In the case of a non-split, skb->data is linearly filled,
1617          * followed by the page buffers.  Therefore, skb->data is
1618          * sized to hold the largest protocol header.
1619          */
1620         /* allocations using alloc_page take too long for regular MTU
1621          * so only enable packet split for jumbo frames */
1622         if (rctl & E1000_RCTL_LPE) {
1623                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1624                 srrctl = adapter->rx_ps_hdr_size <<
1625                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1626                 /* buffer size is ALWAYS one page */
1627                 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1628                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1629         } else {
1630                 adapter->rx_ps_hdr_size = 0;
1631                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1632         }
1633
1634         for (i = 0; i < adapter->num_rx_queues; i++)
1635                 wr32(E1000_SRRCTL(i), srrctl);
1636
1637         wr32(E1000_RCTL, rctl);
1638 }
1639
1640 /**
1641  * igb_configure_rx - Configure receive Unit after Reset
1642  * @adapter: board private structure
1643  *
1644  * Configure the Rx unit of the MAC after a reset.
1645  **/
1646 static void igb_configure_rx(struct igb_adapter *adapter)
1647 {
1648         u64 rdba;
1649         struct e1000_hw *hw = &adapter->hw;
1650         u32 rctl, rxcsum;
1651         u32 rxdctl;
1652         int i;
1653
1654         /* disable receives while setting up the descriptors */
1655         rctl = rd32(E1000_RCTL);
1656         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1657         wrfl();
1658         mdelay(10);
1659
1660         if (adapter->itr_setting > 3)
1661                 wr32(E1000_ITR,
1662                                 1000000000 / (adapter->itr * 256));
1663
1664         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1665          * the Base and Length of the Rx Descriptor Ring */
1666         for (i = 0; i < adapter->num_rx_queues; i++) {
1667                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1668                 rdba = ring->dma;
1669                 wr32(E1000_RDBAL(i),
1670                                 rdba & 0x00000000ffffffffULL);
1671                 wr32(E1000_RDBAH(i), rdba >> 32);
1672                 wr32(E1000_RDLEN(i),
1673                                ring->count * sizeof(union e1000_adv_rx_desc));
1674
1675                 ring->head = E1000_RDH(i);
1676                 ring->tail = E1000_RDT(i);
1677                 writel(0, hw->hw_addr + ring->tail);
1678                 writel(0, hw->hw_addr + ring->head);
1679
1680                 rxdctl = rd32(E1000_RXDCTL(i));
1681                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1682                 rxdctl &= 0xFFF00000;
1683                 rxdctl |= IGB_RX_PTHRESH;
1684                 rxdctl |= IGB_RX_HTHRESH << 8;
1685                 rxdctl |= IGB_RX_WTHRESH << 16;
1686                 wr32(E1000_RXDCTL(i), rxdctl);
1687         }
1688
1689         if (adapter->num_rx_queues > 1) {
1690                 u32 random[10];
1691                 u32 mrqc;
1692                 u32 j, shift;
1693                 union e1000_reta {
1694                         u32 dword;
1695                         u8  bytes[4];
1696                 } reta;
1697
1698                 get_random_bytes(&random[0], 40);
1699
1700                 shift = 6;
1701                 for (j = 0; j < (32 * 4); j++) {
1702                         reta.bytes[j & 3] =
1703                                 (j % adapter->num_rx_queues) << shift;
1704                         if ((j & 3) == 3)
1705                                 writel(reta.dword,
1706                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1707                 }
1708                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1709
1710                 /* Fill out hash function seeds */
1711                 for (j = 0; j < 10; j++)
1712                         array_wr32(E1000_RSSRK(0), j, random[j]);
1713
1714                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1715                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1716                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1717                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1718                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1719                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1720                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1721                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1722
1723
1724                 wr32(E1000_MRQC, mrqc);
1725
1726                 /* Multiqueue and raw packet checksumming are mutually
1727                  * exclusive.  Note that this not the same as TCP/IP
1728                  * checksumming, which works fine. */
1729                 rxcsum = rd32(E1000_RXCSUM);
1730                 rxcsum |= E1000_RXCSUM_PCSD;
1731                 wr32(E1000_RXCSUM, rxcsum);
1732         } else {
1733                 /* Enable Receive Checksum Offload for TCP and UDP */
1734                 rxcsum = rd32(E1000_RXCSUM);
1735                 if (adapter->rx_csum) {
1736                         rxcsum |= E1000_RXCSUM_TUOFL;
1737
1738                         /* Enable IPv4 payload checksum for UDP fragments
1739                          * Must be used in conjunction with packet-split. */
1740                         if (adapter->rx_ps_hdr_size)
1741                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1742                 } else {
1743                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1744                         /* don't need to clear IPPCSE as it defaults to 0 */
1745                 }
1746                 wr32(E1000_RXCSUM, rxcsum);
1747         }
1748
1749         if (adapter->vlgrp)
1750                 wr32(E1000_RLPML,
1751                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1752         else
1753                 wr32(E1000_RLPML, adapter->max_frame_size);
1754
1755         /* Enable Receives */
1756         wr32(E1000_RCTL, rctl);
1757 }
1758
1759 /**
1760  * igb_free_tx_resources - Free Tx Resources per Queue
1761  * @adapter: board private structure
1762  * @tx_ring: Tx descriptor ring for a specific queue
1763  *
1764  * Free all transmit software resources
1765  **/
1766 static void igb_free_tx_resources(struct igb_adapter *adapter,
1767                                   struct igb_ring *tx_ring)
1768 {
1769         struct pci_dev *pdev = adapter->pdev;
1770
1771         igb_clean_tx_ring(adapter, tx_ring);
1772
1773         vfree(tx_ring->buffer_info);
1774         tx_ring->buffer_info = NULL;
1775
1776         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1777
1778         tx_ring->desc = NULL;
1779 }
1780
1781 /**
1782  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1783  * @adapter: board private structure
1784  *
1785  * Free all transmit software resources
1786  **/
1787 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1788 {
1789         int i;
1790
1791         for (i = 0; i < adapter->num_tx_queues; i++)
1792                 igb_free_tx_resources(adapter, &adapter->tx_ring[i]);
1793 }
1794
1795 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1796                                            struct igb_buffer *buffer_info)
1797 {
1798         if (buffer_info->dma) {
1799                 pci_unmap_page(adapter->pdev,
1800                                 buffer_info->dma,
1801                                 buffer_info->length,
1802                                 PCI_DMA_TODEVICE);
1803                 buffer_info->dma = 0;
1804         }
1805         if (buffer_info->skb) {
1806                 dev_kfree_skb_any(buffer_info->skb);
1807                 buffer_info->skb = NULL;
1808         }
1809         buffer_info->time_stamp = 0;
1810         /* buffer_info must be completely set up in the transmit path */
1811 }
1812
1813 /**
1814  * igb_clean_tx_ring - Free Tx Buffers
1815  * @adapter: board private structure
1816  * @tx_ring: ring to be cleaned
1817  **/
1818 static void igb_clean_tx_ring(struct igb_adapter *adapter,
1819                               struct igb_ring *tx_ring)
1820 {
1821         struct igb_buffer *buffer_info;
1822         unsigned long size;
1823         unsigned int i;
1824
1825         if (!tx_ring->buffer_info)
1826                 return;
1827         /* Free all the Tx ring sk_buffs */
1828
1829         for (i = 0; i < tx_ring->count; i++) {
1830                 buffer_info = &tx_ring->buffer_info[i];
1831                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1832         }
1833
1834         size = sizeof(struct igb_buffer) * tx_ring->count;
1835         memset(tx_ring->buffer_info, 0, size);
1836
1837         /* Zero out the descriptor ring */
1838
1839         memset(tx_ring->desc, 0, tx_ring->size);
1840
1841         tx_ring->next_to_use = 0;
1842         tx_ring->next_to_clean = 0;
1843
1844         writel(0, adapter->hw.hw_addr + tx_ring->head);
1845         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1846 }
1847
1848 /**
1849  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1850  * @adapter: board private structure
1851  **/
1852 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1853 {
1854         int i;
1855
1856         for (i = 0; i < adapter->num_tx_queues; i++)
1857                 igb_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1858 }
1859
1860 /**
1861  * igb_free_rx_resources - Free Rx Resources
1862  * @adapter: board private structure
1863  * @rx_ring: ring to clean the resources from
1864  *
1865  * Free all receive software resources
1866  **/
1867 static void igb_free_rx_resources(struct igb_adapter *adapter,
1868                                   struct igb_ring *rx_ring)
1869 {
1870         struct pci_dev *pdev = adapter->pdev;
1871
1872         igb_clean_rx_ring(adapter, rx_ring);
1873
1874         vfree(rx_ring->buffer_info);
1875         rx_ring->buffer_info = NULL;
1876
1877         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1878
1879         rx_ring->desc = NULL;
1880 }
1881
1882 /**
1883  * igb_free_all_rx_resources - Free Rx Resources for All Queues
1884  * @adapter: board private structure
1885  *
1886  * Free all receive software resources
1887  **/
1888 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1889 {
1890         int i;
1891
1892         for (i = 0; i < adapter->num_rx_queues; i++)
1893                 igb_free_rx_resources(adapter, &adapter->rx_ring[i]);
1894 }
1895
1896 /**
1897  * igb_clean_rx_ring - Free Rx Buffers per Queue
1898  * @adapter: board private structure
1899  * @rx_ring: ring to free buffers from
1900  **/
1901 static void igb_clean_rx_ring(struct igb_adapter *adapter,
1902                               struct igb_ring *rx_ring)
1903 {
1904         struct igb_buffer *buffer_info;
1905         struct pci_dev *pdev = adapter->pdev;
1906         unsigned long size;
1907         unsigned int i;
1908
1909         if (!rx_ring->buffer_info)
1910                 return;
1911         /* Free all the Rx ring sk_buffs */
1912         for (i = 0; i < rx_ring->count; i++) {
1913                 buffer_info = &rx_ring->buffer_info[i];
1914                 if (buffer_info->dma) {
1915                         if (adapter->rx_ps_hdr_size)
1916                                 pci_unmap_single(pdev, buffer_info->dma,
1917                                                  adapter->rx_ps_hdr_size,
1918                                                  PCI_DMA_FROMDEVICE);
1919                         else
1920                                 pci_unmap_single(pdev, buffer_info->dma,
1921                                                  adapter->rx_buffer_len,
1922                                                  PCI_DMA_FROMDEVICE);
1923                         buffer_info->dma = 0;
1924                 }
1925
1926                 if (buffer_info->skb) {
1927                         dev_kfree_skb(buffer_info->skb);
1928                         buffer_info->skb = NULL;
1929                 }
1930                 if (buffer_info->page) {
1931                         pci_unmap_page(pdev, buffer_info->page_dma,
1932                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
1933                         put_page(buffer_info->page);
1934                         buffer_info->page = NULL;
1935                         buffer_info->page_dma = 0;
1936                 }
1937         }
1938
1939         /* there also may be some cached data from a chained receive */
1940         if (rx_ring->pending_skb) {
1941                 dev_kfree_skb(rx_ring->pending_skb);
1942                 rx_ring->pending_skb = NULL;
1943         }
1944
1945         size = sizeof(struct igb_buffer) * rx_ring->count;
1946         memset(rx_ring->buffer_info, 0, size);
1947
1948         /* Zero out the descriptor ring */
1949         memset(rx_ring->desc, 0, rx_ring->size);
1950
1951         rx_ring->next_to_clean = 0;
1952         rx_ring->next_to_use = 0;
1953
1954         writel(0, adapter->hw.hw_addr + rx_ring->head);
1955         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1956 }
1957
1958 /**
1959  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1960  * @adapter: board private structure
1961  **/
1962 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1963 {
1964         int i;
1965
1966         for (i = 0; i < adapter->num_rx_queues; i++)
1967                 igb_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1968 }
1969
1970 /**
1971  * igb_set_mac - Change the Ethernet Address of the NIC
1972  * @netdev: network interface device structure
1973  * @p: pointer to an address structure
1974  *
1975  * Returns 0 on success, negative on failure
1976  **/
1977 static int igb_set_mac(struct net_device *netdev, void *p)
1978 {
1979         struct igb_adapter *adapter = netdev_priv(netdev);
1980         struct sockaddr *addr = p;
1981
1982         if (!is_valid_ether_addr(addr->sa_data))
1983                 return -EADDRNOTAVAIL;
1984
1985         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1986         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
1987
1988         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1989
1990         return 0;
1991 }
1992
1993 /**
1994  * igb_set_multi - Multicast and Promiscuous mode set
1995  * @netdev: network interface device structure
1996  *
1997  * The set_multi entry point is called whenever the multicast address
1998  * list or the network interface flags are updated.  This routine is
1999  * responsible for configuring the hardware for proper multicast,
2000  * promiscuous mode, and all-multi behavior.
2001  **/
2002 static void igb_set_multi(struct net_device *netdev)
2003 {
2004         struct igb_adapter *adapter = netdev_priv(netdev);
2005         struct e1000_hw *hw = &adapter->hw;
2006         struct e1000_mac_info *mac = &hw->mac;
2007         struct dev_mc_list *mc_ptr;
2008         u8  *mta_list;
2009         u32 rctl;
2010         int i;
2011
2012         /* Check for Promiscuous and All Multicast modes */
2013
2014         rctl = rd32(E1000_RCTL);
2015
2016         if (netdev->flags & IFF_PROMISC)
2017                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2018         else if (netdev->flags & IFF_ALLMULTI) {
2019                 rctl |= E1000_RCTL_MPE;
2020                 rctl &= ~E1000_RCTL_UPE;
2021         } else
2022                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2023
2024         wr32(E1000_RCTL, rctl);
2025
2026         if (!netdev->mc_count) {
2027                 /* nothing to program, so clear mc list */
2028                 igb_update_mc_addr_list(hw, NULL, 0, 1,
2029                                           mac->rar_entry_count);
2030                 return;
2031         }
2032
2033         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2034         if (!mta_list)
2035                 return;
2036
2037         /* The shared function expects a packed array of only addresses. */
2038         mc_ptr = netdev->mc_list;
2039
2040         for (i = 0; i < netdev->mc_count; i++) {
2041                 if (!mc_ptr)
2042                         break;
2043                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2044                 mc_ptr = mc_ptr->next;
2045         }
2046         igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2047         kfree(mta_list);
2048 }
2049
2050 /* Need to wait a few seconds after link up to get diagnostic information from
2051  * the phy */
2052 static void igb_update_phy_info(unsigned long data)
2053 {
2054         struct igb_adapter *adapter = (struct igb_adapter *) data;
2055         adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2056 }
2057
2058 /**
2059  * igb_watchdog - Timer Call-back
2060  * @data: pointer to adapter cast into an unsigned long
2061  **/
2062 static void igb_watchdog(unsigned long data)
2063 {
2064         struct igb_adapter *adapter = (struct igb_adapter *)data;
2065         /* Do the rest outside of interrupt context */
2066         schedule_work(&adapter->watchdog_task);
2067 }
2068
2069 static void igb_watchdog_task(struct work_struct *work)
2070 {
2071         struct igb_adapter *adapter = container_of(work,
2072                                         struct igb_adapter, watchdog_task);
2073         struct e1000_hw *hw = &adapter->hw;
2074
2075         struct net_device *netdev = adapter->netdev;
2076         struct igb_ring *tx_ring = adapter->tx_ring;
2077         struct e1000_mac_info *mac = &adapter->hw.mac;
2078         u32 link;
2079         s32 ret_val;
2080
2081         if ((netif_carrier_ok(netdev)) &&
2082             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2083                 goto link_up;
2084
2085         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2086         if ((ret_val == E1000_ERR_PHY) &&
2087             (hw->phy.type == e1000_phy_igp_3) &&
2088             (rd32(E1000_CTRL) &
2089              E1000_PHY_CTRL_GBE_DISABLE))
2090                 dev_info(&adapter->pdev->dev,
2091                          "Gigabit has been disabled, downgrading speed\n");
2092
2093         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2094             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2095                 link = mac->serdes_has_link;
2096         else
2097                 link = rd32(E1000_STATUS) &
2098                                       E1000_STATUS_LU;
2099
2100         if (link) {
2101                 if (!netif_carrier_ok(netdev)) {
2102                         u32 ctrl;
2103                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2104                                                    &adapter->link_speed,
2105                                                    &adapter->link_duplex);
2106
2107                         ctrl = rd32(E1000_CTRL);
2108                         dev_info(&adapter->pdev->dev,
2109                                  "NIC Link is Up %d Mbps %s, "
2110                                  "Flow Control: %s\n",
2111                                  adapter->link_speed,
2112                                  adapter->link_duplex == FULL_DUPLEX ?
2113                                  "Full Duplex" : "Half Duplex",
2114                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2115                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2116                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2117                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2118
2119                         /* tweak tx_queue_len according to speed/duplex and
2120                          * adjust the timeout factor */
2121                         netdev->tx_queue_len = adapter->tx_queue_len;
2122                         adapter->tx_timeout_factor = 1;
2123                         switch (adapter->link_speed) {
2124                         case SPEED_10:
2125                                 netdev->tx_queue_len = 10;
2126                                 adapter->tx_timeout_factor = 14;
2127                                 break;
2128                         case SPEED_100:
2129                                 netdev->tx_queue_len = 100;
2130                                 /* maybe add some timeout factor ? */
2131                                 break;
2132                         }
2133
2134                         netif_carrier_on(netdev);
2135                         netif_wake_queue(netdev);
2136
2137                         if (!test_bit(__IGB_DOWN, &adapter->state))
2138                                 mod_timer(&adapter->phy_info_timer,
2139                                           round_jiffies(jiffies + 2 * HZ));
2140                 }
2141         } else {
2142                 if (netif_carrier_ok(netdev)) {
2143                         adapter->link_speed = 0;
2144                         adapter->link_duplex = 0;
2145                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2146                         netif_carrier_off(netdev);
2147                         netif_stop_queue(netdev);
2148                         if (!test_bit(__IGB_DOWN, &adapter->state))
2149                                 mod_timer(&adapter->phy_info_timer,
2150                                           round_jiffies(jiffies + 2 * HZ));
2151                 }
2152         }
2153
2154 link_up:
2155         igb_update_stats(adapter);
2156
2157         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2158         adapter->tpt_old = adapter->stats.tpt;
2159         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2160         adapter->colc_old = adapter->stats.colc;
2161
2162         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2163         adapter->gorc_old = adapter->stats.gorc;
2164         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2165         adapter->gotc_old = adapter->stats.gotc;
2166
2167         igb_update_adaptive(&adapter->hw);
2168
2169         if (!netif_carrier_ok(netdev)) {
2170                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2171                         /* We've lost link, so the controller stops DMA,
2172                          * but we've got queued Tx work that's never going
2173                          * to get done, so reset controller to flush Tx.
2174                          * (Do the reset outside of interrupt context). */
2175                         adapter->tx_timeout_count++;
2176                         schedule_work(&adapter->reset_task);
2177                 }
2178         }
2179
2180         /* Cause software interrupt to ensure rx ring is cleaned */
2181         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2182
2183         /* Force detection of hung controller every watchdog period */
2184         tx_ring->detect_tx_hung = true;
2185
2186         /* Reset the timer */
2187         if (!test_bit(__IGB_DOWN, &adapter->state))
2188                 mod_timer(&adapter->watchdog_timer,
2189                           round_jiffies(jiffies + 2 * HZ));
2190 }
2191
2192 enum latency_range {
2193         lowest_latency = 0,
2194         low_latency = 1,
2195         bulk_latency = 2,
2196         latency_invalid = 255
2197 };
2198
2199
2200 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2201                               struct igb_ring *rx_ring)
2202 {
2203         struct e1000_hw *hw = &adapter->hw;
2204         int new_val;
2205
2206         new_val = rx_ring->itr_val / 2;
2207         if (new_val < IGB_MIN_DYN_ITR)
2208                 new_val = IGB_MIN_DYN_ITR;
2209
2210         if (new_val != rx_ring->itr_val) {
2211                 rx_ring->itr_val = new_val;
2212                 wr32(rx_ring->itr_register,
2213                                 1000000000 / (new_val * 256));
2214         }
2215 }
2216
2217 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2218                               struct igb_ring *rx_ring)
2219 {
2220         struct e1000_hw *hw = &adapter->hw;
2221         int new_val;
2222
2223         new_val = rx_ring->itr_val * 2;
2224         if (new_val > IGB_MAX_DYN_ITR)
2225                 new_val = IGB_MAX_DYN_ITR;
2226
2227         if (new_val != rx_ring->itr_val) {
2228                 rx_ring->itr_val = new_val;
2229                 wr32(rx_ring->itr_register,
2230                                 1000000000 / (new_val * 256));
2231         }
2232 }
2233
2234 /**
2235  * igb_update_itr - update the dynamic ITR value based on statistics
2236  *      Stores a new ITR value based on packets and byte
2237  *      counts during the last interrupt.  The advantage of per interrupt
2238  *      computation is faster updates and more accurate ITR for the current
2239  *      traffic pattern.  Constants in this function were computed
2240  *      based on theoretical maximum wire speed and thresholds were set based
2241  *      on testing data as well as attempting to minimize response time
2242  *      while increasing bulk throughput.
2243  *      this functionality is controlled by the InterruptThrottleRate module
2244  *      parameter (see igb_param.c)
2245  *      NOTE:  These calculations are only valid when operating in a single-
2246  *             queue environment.
2247  * @adapter: pointer to adapter
2248  * @itr_setting: current adapter->itr
2249  * @packets: the number of packets during this measurement interval
2250  * @bytes: the number of bytes during this measurement interval
2251  **/
2252 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2253                                    int packets, int bytes)
2254 {
2255         unsigned int retval = itr_setting;
2256
2257         if (packets == 0)
2258                 goto update_itr_done;
2259
2260         switch (itr_setting) {
2261         case lowest_latency:
2262                 /* handle TSO and jumbo frames */
2263                 if (bytes/packets > 8000)
2264                         retval = bulk_latency;
2265                 else if ((packets < 5) && (bytes > 512))
2266                         retval = low_latency;
2267                 break;
2268         case low_latency:  /* 50 usec aka 20000 ints/s */
2269                 if (bytes > 10000) {
2270                         /* this if handles the TSO accounting */
2271                         if (bytes/packets > 8000) {
2272                                 retval = bulk_latency;
2273                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2274                                 retval = bulk_latency;
2275                         } else if ((packets > 35)) {
2276                                 retval = lowest_latency;
2277                         }
2278                 } else if (bytes/packets > 2000) {
2279                         retval = bulk_latency;
2280                 } else if (packets <= 2 && bytes < 512) {
2281                         retval = lowest_latency;
2282                 }
2283                 break;
2284         case bulk_latency: /* 250 usec aka 4000 ints/s */
2285                 if (bytes > 25000) {
2286                         if (packets > 35)
2287                                 retval = low_latency;
2288                 } else if (bytes < 6000) {
2289                         retval = low_latency;
2290                 }
2291                 break;
2292         }
2293
2294 update_itr_done:
2295         return retval;
2296 }
2297
2298 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2299                         int rx_only)
2300 {
2301         u16 current_itr;
2302         u32 new_itr = adapter->itr;
2303
2304         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2305         if (adapter->link_speed != SPEED_1000) {
2306                 current_itr = 0;
2307                 new_itr = 4000;
2308                 goto set_itr_now;
2309         }
2310
2311         adapter->rx_itr = igb_update_itr(adapter,
2312                                     adapter->rx_itr,
2313                                     adapter->rx_ring->total_packets,
2314                                     adapter->rx_ring->total_bytes);
2315         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2316         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2317                 adapter->rx_itr = low_latency;
2318
2319         if (!rx_only) {
2320                 adapter->tx_itr = igb_update_itr(adapter,
2321                                             adapter->tx_itr,
2322                                             adapter->tx_ring->total_packets,
2323                                             adapter->tx_ring->total_bytes);
2324                 /* conservative mode (itr 3) eliminates the
2325                  * lowest_latency setting */
2326                 if (adapter->itr_setting == 3 &&
2327                     adapter->tx_itr == lowest_latency)
2328                         adapter->tx_itr = low_latency;
2329
2330                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2331         } else {
2332                 current_itr = adapter->rx_itr;
2333         }
2334
2335         switch (current_itr) {
2336         /* counts and packets in update_itr are dependent on these numbers */
2337         case lowest_latency:
2338                 new_itr = 70000;
2339                 break;
2340         case low_latency:
2341                 new_itr = 20000; /* aka hwitr = ~200 */
2342                 break;
2343         case bulk_latency:
2344                 new_itr = 4000;
2345                 break;
2346         default:
2347                 break;
2348         }
2349
2350 set_itr_now:
2351         if (new_itr != adapter->itr) {
2352                 /* this attempts to bias the interrupt rate towards Bulk
2353                  * by adding intermediate steps when interrupt rate is
2354                  * increasing */
2355                 new_itr = new_itr > adapter->itr ?
2356                              min(adapter->itr + (new_itr >> 2), new_itr) :
2357                              new_itr;
2358                 /* Don't write the value here; it resets the adapter's
2359                  * internal timer, and causes us to delay far longer than
2360                  * we should between interrupts.  Instead, we write the ITR
2361                  * value at the beginning of the next interrupt so the timing
2362                  * ends up being correct.
2363                  */
2364                 adapter->itr = new_itr;
2365                 adapter->set_itr = 1;
2366         }
2367
2368         return;
2369 }
2370
2371
2372 #define IGB_TX_FLAGS_CSUM               0x00000001
2373 #define IGB_TX_FLAGS_VLAN               0x00000002
2374 #define IGB_TX_FLAGS_TSO                0x00000004
2375 #define IGB_TX_FLAGS_IPV4               0x00000008
2376 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2377 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2378
2379 static inline int igb_tso_adv(struct igb_adapter *adapter,
2380                               struct igb_ring *tx_ring,
2381                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2382 {
2383         struct e1000_adv_tx_context_desc *context_desc;
2384         unsigned int i;
2385         int err;
2386         struct igb_buffer *buffer_info;
2387         u32 info = 0, tu_cmd = 0;
2388         u32 mss_l4len_idx, l4len;
2389         *hdr_len = 0;
2390
2391         if (skb_header_cloned(skb)) {
2392                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2393                 if (err)
2394                         return err;
2395         }
2396
2397         l4len = tcp_hdrlen(skb);
2398         *hdr_len += l4len;
2399
2400         if (skb->protocol == htons(ETH_P_IP)) {
2401                 struct iphdr *iph = ip_hdr(skb);
2402                 iph->tot_len = 0;
2403                 iph->check = 0;
2404                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2405                                                          iph->daddr, 0,
2406                                                          IPPROTO_TCP,
2407                                                          0);
2408         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2409                 ipv6_hdr(skb)->payload_len = 0;
2410                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2411                                                        &ipv6_hdr(skb)->daddr,
2412                                                        0, IPPROTO_TCP, 0);
2413         }
2414
2415         i = tx_ring->next_to_use;
2416
2417         buffer_info = &tx_ring->buffer_info[i];
2418         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2419         /* VLAN MACLEN IPLEN */
2420         if (tx_flags & IGB_TX_FLAGS_VLAN)
2421                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2422         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2423         *hdr_len += skb_network_offset(skb);
2424         info |= skb_network_header_len(skb);
2425         *hdr_len += skb_network_header_len(skb);
2426         context_desc->vlan_macip_lens = cpu_to_le32(info);
2427
2428         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2429         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2430
2431         if (skb->protocol == htons(ETH_P_IP))
2432                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2433         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2434
2435         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2436
2437         /* MSS L4LEN IDX */
2438         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2439         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2440
2441         /* Context index must be unique per ring.  Luckily, so is the interrupt
2442          * mask value. */
2443         mss_l4len_idx |= tx_ring->eims_value >> 4;
2444
2445         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2446         context_desc->seqnum_seed = 0;
2447
2448         buffer_info->time_stamp = jiffies;
2449         buffer_info->dma = 0;
2450         i++;
2451         if (i == tx_ring->count)
2452                 i = 0;
2453
2454         tx_ring->next_to_use = i;
2455
2456         return true;
2457 }
2458
2459 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2460                                         struct igb_ring *tx_ring,
2461                                         struct sk_buff *skb, u32 tx_flags)
2462 {
2463         struct e1000_adv_tx_context_desc *context_desc;
2464         unsigned int i;
2465         struct igb_buffer *buffer_info;
2466         u32 info = 0, tu_cmd = 0;
2467
2468         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2469             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2470                 i = tx_ring->next_to_use;
2471                 buffer_info = &tx_ring->buffer_info[i];
2472                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2473
2474                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2475                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2476                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2477                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2478                         info |= skb_network_header_len(skb);
2479
2480                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2481
2482                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2483
2484                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2485                         if (skb->protocol == htons(ETH_P_IP))
2486                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2487                         if (skb->sk && (skb->sk->sk_protocol == IPPROTO_TCP))
2488                                 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2489                 }
2490
2491                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2492                 context_desc->seqnum_seed = 0;
2493                 context_desc->mss_l4len_idx =
2494                                           cpu_to_le32(tx_ring->eims_value >> 4);
2495
2496                 buffer_info->time_stamp = jiffies;
2497                 buffer_info->dma = 0;
2498
2499                 i++;
2500                 if (i == tx_ring->count)
2501                         i = 0;
2502                 tx_ring->next_to_use = i;
2503
2504                 return true;
2505         }
2506
2507
2508         return false;
2509 }
2510
2511 #define IGB_MAX_TXD_PWR 16
2512 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2513
2514 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2515                                  struct igb_ring *tx_ring,
2516                                  struct sk_buff *skb)
2517 {
2518         struct igb_buffer *buffer_info;
2519         unsigned int len = skb_headlen(skb);
2520         unsigned int count = 0, i;
2521         unsigned int f;
2522
2523         i = tx_ring->next_to_use;
2524
2525         buffer_info = &tx_ring->buffer_info[i];
2526         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2527         buffer_info->length = len;
2528         /* set time_stamp *before* dma to help avoid a possible race */
2529         buffer_info->time_stamp = jiffies;
2530         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2531                                           PCI_DMA_TODEVICE);
2532         count++;
2533         i++;
2534         if (i == tx_ring->count)
2535                 i = 0;
2536
2537         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2538                 struct skb_frag_struct *frag;
2539
2540                 frag = &skb_shinfo(skb)->frags[f];
2541                 len = frag->size;
2542
2543                 buffer_info = &tx_ring->buffer_info[i];
2544                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2545                 buffer_info->length = len;
2546                 buffer_info->time_stamp = jiffies;
2547                 buffer_info->dma = pci_map_page(adapter->pdev,
2548                                                 frag->page,
2549                                                 frag->page_offset,
2550                                                 len,
2551                                                 PCI_DMA_TODEVICE);
2552
2553                 count++;
2554                 i++;
2555                 if (i == tx_ring->count)
2556                         i = 0;
2557         }
2558
2559         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2560         tx_ring->buffer_info[i].skb = skb;
2561
2562         return count;
2563 }
2564
2565 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2566                                     struct igb_ring *tx_ring,
2567                                     int tx_flags, int count, u32 paylen,
2568                                     u8 hdr_len)
2569 {
2570         union e1000_adv_tx_desc *tx_desc = NULL;
2571         struct igb_buffer *buffer_info;
2572         u32 olinfo_status = 0, cmd_type_len;
2573         unsigned int i;
2574
2575         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2576                         E1000_ADVTXD_DCMD_DEXT);
2577
2578         if (tx_flags & IGB_TX_FLAGS_VLAN)
2579                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2580
2581         if (tx_flags & IGB_TX_FLAGS_TSO) {
2582                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2583
2584                 /* insert tcp checksum */
2585                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2586
2587                 /* insert ip checksum */
2588                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2589                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2590
2591         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2592                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2593         }
2594
2595         if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2596                         IGB_TX_FLAGS_VLAN))
2597                 olinfo_status |= tx_ring->eims_value >> 4;
2598
2599         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2600
2601         i = tx_ring->next_to_use;
2602         while (count--) {
2603                 buffer_info = &tx_ring->buffer_info[i];
2604                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2605                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2606                 tx_desc->read.cmd_type_len =
2607                         cpu_to_le32(cmd_type_len | buffer_info->length);
2608                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2609                 i++;
2610                 if (i == tx_ring->count)
2611                         i = 0;
2612         }
2613
2614         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2615         /* Force memory writes to complete before letting h/w
2616          * know there are new descriptors to fetch.  (Only
2617          * applicable for weak-ordered memory model archs,
2618          * such as IA-64). */
2619         wmb();
2620
2621         tx_ring->next_to_use = i;
2622         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2623         /* we need this if more than one processor can write to our tail
2624          * at a time, it syncronizes IO on IA64/Altix systems */
2625         mmiowb();
2626 }
2627
2628 static int __igb_maybe_stop_tx(struct net_device *netdev,
2629                                struct igb_ring *tx_ring, int size)
2630 {
2631         struct igb_adapter *adapter = netdev_priv(netdev);
2632
2633         netif_stop_queue(netdev);
2634         /* Herbert's original patch had:
2635          *  smp_mb__after_netif_stop_queue();
2636          * but since that doesn't exist yet, just open code it. */
2637         smp_mb();
2638
2639         /* We need to check again in a case another CPU has just
2640          * made room available. */
2641         if (IGB_DESC_UNUSED(tx_ring) < size)
2642                 return -EBUSY;
2643
2644         /* A reprieve! */
2645         netif_start_queue(netdev);
2646         ++adapter->restart_queue;
2647         return 0;
2648 }
2649
2650 static int igb_maybe_stop_tx(struct net_device *netdev,
2651                              struct igb_ring *tx_ring, int size)
2652 {
2653         if (IGB_DESC_UNUSED(tx_ring) >= size)
2654                 return 0;
2655         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2656 }
2657
2658 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2659
2660 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2661                                    struct net_device *netdev,
2662                                    struct igb_ring *tx_ring)
2663 {
2664         struct igb_adapter *adapter = netdev_priv(netdev);
2665         unsigned int tx_flags = 0;
2666         unsigned int len;
2667         unsigned long irq_flags;
2668         u8 hdr_len = 0;
2669         int tso = 0;
2670
2671         len = skb_headlen(skb);
2672
2673         if (test_bit(__IGB_DOWN, &adapter->state)) {
2674                 dev_kfree_skb_any(skb);
2675                 return NETDEV_TX_OK;
2676         }
2677
2678         if (skb->len <= 0) {
2679                 dev_kfree_skb_any(skb);
2680                 return NETDEV_TX_OK;
2681         }
2682
2683         if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2684                 /* Collision - tell upper layer to requeue */
2685                 return NETDEV_TX_LOCKED;
2686
2687         /* need: 1 descriptor per page,
2688          *       + 2 desc gap to keep tail from touching head,
2689          *       + 1 desc for skb->data,
2690          *       + 1 desc for context descriptor,
2691          * otherwise try next time */
2692         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2693                 /* this is a hard error */
2694                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2695                 return NETDEV_TX_BUSY;
2696         }
2697
2698         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2699                 tx_flags |= IGB_TX_FLAGS_VLAN;
2700                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2701         }
2702
2703         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2704                                               &hdr_len) : 0;
2705
2706         if (tso < 0) {
2707                 dev_kfree_skb_any(skb);
2708                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2709                 return NETDEV_TX_OK;
2710         }
2711
2712         if (tso)
2713                 tx_flags |= IGB_TX_FLAGS_TSO;
2714         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2715                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2716                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2717
2718         if (skb->protocol == htons(ETH_P_IP))
2719                 tx_flags |= IGB_TX_FLAGS_IPV4;
2720
2721         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2722                          igb_tx_map_adv(adapter, tx_ring, skb),
2723                          skb->len, hdr_len);
2724
2725         netdev->trans_start = jiffies;
2726
2727         /* Make sure there is space in the ring for the next send. */
2728         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2729
2730         spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2731         return NETDEV_TX_OK;
2732 }
2733
2734 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2735 {
2736         struct igb_adapter *adapter = netdev_priv(netdev);
2737         struct igb_ring *tx_ring = &adapter->tx_ring[0];
2738
2739         /* This goes back to the question of how to logically map a tx queue
2740          * to a flow.  Right now, performance is impacted slightly negatively
2741          * if using multiple tx queues.  If the stack breaks away from a
2742          * single qdisc implementation, we can look at this again. */
2743         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2744 }
2745
2746 /**
2747  * igb_tx_timeout - Respond to a Tx Hang
2748  * @netdev: network interface device structure
2749  **/
2750 static void igb_tx_timeout(struct net_device *netdev)
2751 {
2752         struct igb_adapter *adapter = netdev_priv(netdev);
2753         struct e1000_hw *hw = &adapter->hw;
2754
2755         /* Do the reset outside of interrupt context */
2756         adapter->tx_timeout_count++;
2757         schedule_work(&adapter->reset_task);
2758         wr32(E1000_EICS, adapter->eims_enable_mask &
2759                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2760 }
2761
2762 static void igb_reset_task(struct work_struct *work)
2763 {
2764         struct igb_adapter *adapter;
2765         adapter = container_of(work, struct igb_adapter, reset_task);
2766
2767         igb_reinit_locked(adapter);
2768 }
2769
2770 /**
2771  * igb_get_stats - Get System Network Statistics
2772  * @netdev: network interface device structure
2773  *
2774  * Returns the address of the device statistics structure.
2775  * The statistics are actually updated from the timer callback.
2776  **/
2777 static struct net_device_stats *
2778 igb_get_stats(struct net_device *netdev)
2779 {
2780         struct igb_adapter *adapter = netdev_priv(netdev);
2781
2782         /* only return the current stats */
2783         return &adapter->net_stats;
2784 }
2785
2786 /**
2787  * igb_change_mtu - Change the Maximum Transfer Unit
2788  * @netdev: network interface device structure
2789  * @new_mtu: new value for maximum frame size
2790  *
2791  * Returns 0 on success, negative on failure
2792  **/
2793 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2794 {
2795         struct igb_adapter *adapter = netdev_priv(netdev);
2796         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2797
2798         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2799             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2800                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2801                 return -EINVAL;
2802         }
2803
2804 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2805         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2806                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2807                 return -EINVAL;
2808         }
2809
2810         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2811                 msleep(1);
2812         /* igb_down has a dependency on max_frame_size */
2813         adapter->max_frame_size = max_frame;
2814         if (netif_running(netdev))
2815                 igb_down(adapter);
2816
2817         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2818          * means we reserve 2 more, this pushes us to allocate from the next
2819          * larger slab size.
2820          * i.e. RXBUFFER_2048 --> size-4096 slab
2821          */
2822
2823         if (max_frame <= IGB_RXBUFFER_256)
2824                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2825         else if (max_frame <= IGB_RXBUFFER_512)
2826                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2827         else if (max_frame <= IGB_RXBUFFER_1024)
2828                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2829         else if (max_frame <= IGB_RXBUFFER_2048)
2830                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2831         else
2832                 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2833         /* adjust allocation if LPE protects us, and we aren't using SBP */
2834         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2835              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2836                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2837
2838         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2839                  netdev->mtu, new_mtu);
2840         netdev->mtu = new_mtu;
2841
2842         if (netif_running(netdev))
2843                 igb_up(adapter);
2844         else
2845                 igb_reset(adapter);
2846
2847         clear_bit(__IGB_RESETTING, &adapter->state);
2848
2849         return 0;
2850 }
2851
2852 /**
2853  * igb_update_stats - Update the board statistics counters
2854  * @adapter: board private structure
2855  **/
2856
2857 void igb_update_stats(struct igb_adapter *adapter)
2858 {
2859         struct e1000_hw *hw = &adapter->hw;
2860         struct pci_dev *pdev = adapter->pdev;
2861         u16 phy_tmp;
2862
2863 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2864
2865         /*
2866          * Prevent stats update while adapter is being reset, or if the pci
2867          * connection is down.
2868          */
2869         if (adapter->link_speed == 0)
2870                 return;
2871         if (pci_channel_offline(pdev))
2872                 return;
2873
2874         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2875         adapter->stats.gprc += rd32(E1000_GPRC);
2876         adapter->stats.gorc += rd32(E1000_GORCL);
2877         rd32(E1000_GORCH); /* clear GORCL */
2878         adapter->stats.bprc += rd32(E1000_BPRC);
2879         adapter->stats.mprc += rd32(E1000_MPRC);
2880         adapter->stats.roc += rd32(E1000_ROC);
2881
2882         adapter->stats.prc64 += rd32(E1000_PRC64);
2883         adapter->stats.prc127 += rd32(E1000_PRC127);
2884         adapter->stats.prc255 += rd32(E1000_PRC255);
2885         adapter->stats.prc511 += rd32(E1000_PRC511);
2886         adapter->stats.prc1023 += rd32(E1000_PRC1023);
2887         adapter->stats.prc1522 += rd32(E1000_PRC1522);
2888         adapter->stats.symerrs += rd32(E1000_SYMERRS);
2889         adapter->stats.sec += rd32(E1000_SEC);
2890
2891         adapter->stats.mpc += rd32(E1000_MPC);
2892         adapter->stats.scc += rd32(E1000_SCC);
2893         adapter->stats.ecol += rd32(E1000_ECOL);
2894         adapter->stats.mcc += rd32(E1000_MCC);
2895         adapter->stats.latecol += rd32(E1000_LATECOL);
2896         adapter->stats.dc += rd32(E1000_DC);
2897         adapter->stats.rlec += rd32(E1000_RLEC);
2898         adapter->stats.xonrxc += rd32(E1000_XONRXC);
2899         adapter->stats.xontxc += rd32(E1000_XONTXC);
2900         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2901         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2902         adapter->stats.fcruc += rd32(E1000_FCRUC);
2903         adapter->stats.gptc += rd32(E1000_GPTC);
2904         adapter->stats.gotc += rd32(E1000_GOTCL);
2905         rd32(E1000_GOTCH); /* clear GOTCL */
2906         adapter->stats.rnbc += rd32(E1000_RNBC);
2907         adapter->stats.ruc += rd32(E1000_RUC);
2908         adapter->stats.rfc += rd32(E1000_RFC);
2909         adapter->stats.rjc += rd32(E1000_RJC);
2910         adapter->stats.tor += rd32(E1000_TORH);
2911         adapter->stats.tot += rd32(E1000_TOTH);
2912         adapter->stats.tpr += rd32(E1000_TPR);
2913
2914         adapter->stats.ptc64 += rd32(E1000_PTC64);
2915         adapter->stats.ptc127 += rd32(E1000_PTC127);
2916         adapter->stats.ptc255 += rd32(E1000_PTC255);
2917         adapter->stats.ptc511 += rd32(E1000_PTC511);
2918         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2919         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2920
2921         adapter->stats.mptc += rd32(E1000_MPTC);
2922         adapter->stats.bptc += rd32(E1000_BPTC);
2923
2924         /* used for adaptive IFS */
2925
2926         hw->mac.tx_packet_delta = rd32(E1000_TPT);
2927         adapter->stats.tpt += hw->mac.tx_packet_delta;
2928         hw->mac.collision_delta = rd32(E1000_COLC);
2929         adapter->stats.colc += hw->mac.collision_delta;
2930
2931         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2932         adapter->stats.rxerrc += rd32(E1000_RXERRC);
2933         adapter->stats.tncrs += rd32(E1000_TNCRS);
2934         adapter->stats.tsctc += rd32(E1000_TSCTC);
2935         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2936
2937         adapter->stats.iac += rd32(E1000_IAC);
2938         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2939         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2940         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2941         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2942         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2943         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2944         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2945         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2946
2947         /* Fill out the OS statistics structure */
2948         adapter->net_stats.multicast = adapter->stats.mprc;
2949         adapter->net_stats.collisions = adapter->stats.colc;
2950
2951         /* Rx Errors */
2952
2953         /* RLEC on some newer hardware can be incorrect so build
2954         * our own version based on RUC and ROC */
2955         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2956                 adapter->stats.crcerrs + adapter->stats.algnerrc +
2957                 adapter->stats.ruc + adapter->stats.roc +
2958                 adapter->stats.cexterr;
2959         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
2960                                               adapter->stats.roc;
2961         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2962         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
2963         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
2964
2965         /* Tx Errors */
2966         adapter->net_stats.tx_errors = adapter->stats.ecol +
2967                                        adapter->stats.latecol;
2968         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
2969         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
2970         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
2971
2972         /* Tx Dropped needs to be maintained elsewhere */
2973
2974         /* Phy Stats */
2975         if (hw->phy.media_type == e1000_media_type_copper) {
2976                 if ((adapter->link_speed == SPEED_1000) &&
2977                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
2978                                               &phy_tmp))) {
2979                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
2980                         adapter->phy_stats.idle_errors += phy_tmp;
2981                 }
2982         }
2983
2984         /* Management Stats */
2985         adapter->stats.mgptc += rd32(E1000_MGTPTC);
2986         adapter->stats.mgprc += rd32(E1000_MGTPRC);
2987         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
2988 }
2989
2990
2991 static irqreturn_t igb_msix_other(int irq, void *data)
2992 {
2993         struct net_device *netdev = data;
2994         struct igb_adapter *adapter = netdev_priv(netdev);
2995         struct e1000_hw *hw = &adapter->hw;
2996         u32 eicr;
2997         /* disable interrupts from the "other" bit, avoid re-entry */
2998         wr32(E1000_EIMC, E1000_EIMS_OTHER);
2999
3000         eicr = rd32(E1000_EICR);
3001
3002         if (eicr & E1000_EIMS_OTHER) {
3003                 u32 icr = rd32(E1000_ICR);
3004                 /* reading ICR causes bit 31 of EICR to be cleared */
3005                 if (!(icr & E1000_ICR_LSC))
3006                         goto no_link_interrupt;
3007                 hw->mac.get_link_status = 1;
3008                 /* guard against interrupt when we're going down */
3009                 if (!test_bit(__IGB_DOWN, &adapter->state))
3010                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3011         }
3012
3013 no_link_interrupt:
3014         wr32(E1000_IMS, E1000_IMS_LSC);
3015         wr32(E1000_EIMS, E1000_EIMS_OTHER);
3016
3017         return IRQ_HANDLED;
3018 }
3019
3020 static irqreturn_t igb_msix_tx(int irq, void *data)
3021 {
3022         struct igb_ring *tx_ring = data;
3023         struct igb_adapter *adapter = tx_ring->adapter;
3024         struct e1000_hw *hw = &adapter->hw;
3025
3026         if (!tx_ring->itr_val)
3027                 wr32(E1000_EIMC, tx_ring->eims_value);
3028
3029         tx_ring->total_bytes = 0;
3030         tx_ring->total_packets = 0;
3031         if (!igb_clean_tx_irq(adapter, tx_ring))
3032                 /* Ring was not completely cleaned, so fire another interrupt */
3033                 wr32(E1000_EICS, tx_ring->eims_value);
3034
3035         if (!tx_ring->itr_val)
3036                 wr32(E1000_EIMS, tx_ring->eims_value);
3037         return IRQ_HANDLED;
3038 }
3039
3040 static irqreturn_t igb_msix_rx(int irq, void *data)
3041 {
3042         struct igb_ring *rx_ring = data;
3043         struct igb_adapter *adapter = rx_ring->adapter;
3044         struct e1000_hw *hw = &adapter->hw;
3045
3046         if (!rx_ring->itr_val)
3047                 wr32(E1000_EIMC, rx_ring->eims_value);
3048
3049         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3050                 rx_ring->total_bytes = 0;
3051                 rx_ring->total_packets = 0;
3052                 rx_ring->no_itr_adjust = 0;
3053                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3054         } else {
3055                 if (!rx_ring->no_itr_adjust) {
3056                         igb_lower_rx_eitr(adapter, rx_ring);
3057                         rx_ring->no_itr_adjust = 1;
3058                 }
3059         }
3060
3061         return IRQ_HANDLED;
3062 }
3063
3064
3065 /**
3066  * igb_intr_msi - Interrupt Handler
3067  * @irq: interrupt number
3068  * @data: pointer to a network interface device structure
3069  **/
3070 static irqreturn_t igb_intr_msi(int irq, void *data)
3071 {
3072         struct net_device *netdev = data;
3073         struct igb_adapter *adapter = netdev_priv(netdev);
3074         struct napi_struct *napi = &adapter->napi;
3075         struct e1000_hw *hw = &adapter->hw;
3076         /* read ICR disables interrupts using IAM */
3077         u32 icr = rd32(E1000_ICR);
3078
3079         /* Write the ITR value calculated at the end of the
3080          * previous interrupt.
3081          */
3082         if (adapter->set_itr) {
3083                 wr32(E1000_ITR,
3084                         1000000000 / (adapter->itr * 256));
3085                 adapter->set_itr = 0;
3086         }
3087
3088         /* read ICR disables interrupts using IAM */
3089         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3090                 hw->mac.get_link_status = 1;
3091                 if (!test_bit(__IGB_DOWN, &adapter->state))
3092                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3093         }
3094
3095         if (netif_rx_schedule_prep(netdev, napi)) {
3096                 adapter->tx_ring->total_bytes = 0;
3097                 adapter->tx_ring->total_packets = 0;
3098                 adapter->rx_ring->total_bytes = 0;
3099                 adapter->rx_ring->total_packets = 0;
3100                 __netif_rx_schedule(netdev, napi);
3101         }
3102
3103         return IRQ_HANDLED;
3104 }
3105
3106 /**
3107  * igb_intr - Interrupt Handler
3108  * @irq: interrupt number
3109  * @data: pointer to a network interface device structure
3110  **/
3111 static irqreturn_t igb_intr(int irq, void *data)
3112 {
3113         struct net_device *netdev = data;
3114         struct igb_adapter *adapter = netdev_priv(netdev);
3115         struct napi_struct *napi = &adapter->napi;
3116         struct e1000_hw *hw = &adapter->hw;
3117         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3118          * need for the IMC write */
3119         u32 icr = rd32(E1000_ICR);
3120         u32 eicr = 0;
3121         if (!icr)
3122                 return IRQ_NONE;  /* Not our interrupt */
3123
3124         /* Write the ITR value calculated at the end of the
3125          * previous interrupt.
3126          */
3127         if (adapter->set_itr) {
3128                 wr32(E1000_ITR,
3129                         1000000000 / (adapter->itr * 256));
3130                 adapter->set_itr = 0;
3131         }
3132
3133         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3134          * not set, then the adapter didn't send an interrupt */
3135         if (!(icr & E1000_ICR_INT_ASSERTED))
3136                 return IRQ_NONE;
3137
3138         eicr = rd32(E1000_EICR);
3139
3140         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3141                 hw->mac.get_link_status = 1;
3142                 /* guard against interrupt when we're going down */
3143                 if (!test_bit(__IGB_DOWN, &adapter->state))
3144                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3145         }
3146
3147         if (netif_rx_schedule_prep(netdev, napi)) {
3148                 adapter->tx_ring->total_bytes = 0;
3149                 adapter->rx_ring->total_bytes = 0;
3150                 adapter->tx_ring->total_packets = 0;
3151                 adapter->rx_ring->total_packets = 0;
3152                 __netif_rx_schedule(netdev, napi);
3153         }
3154
3155         return IRQ_HANDLED;
3156 }
3157
3158 /**
3159  * igb_clean - NAPI Rx polling callback
3160  * @adapter: board private structure
3161  **/
3162 static int igb_clean(struct napi_struct *napi, int budget)
3163 {
3164         struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3165                                                    napi);
3166         struct net_device *netdev = adapter->netdev;
3167         int tx_clean_complete = 1, work_done = 0;
3168         int i;
3169
3170         /* Must NOT use netdev_priv macro here. */
3171         adapter = netdev->priv;
3172
3173         /* Keep link state information with original netdev */
3174         if (!netif_carrier_ok(netdev))
3175                 goto quit_polling;
3176
3177         /* igb_clean is called per-cpu.  This lock protects tx_ring[i] from
3178          * being cleaned by multiple cpus simultaneously.  A failure obtaining
3179          * the lock means tx_ring[i] is currently being cleaned anyway. */
3180         for (i = 0; i < adapter->num_tx_queues; i++) {
3181                 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
3182                         tx_clean_complete &= igb_clean_tx_irq(adapter,
3183                                                         &adapter->tx_ring[i]);
3184                         spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3185                 }
3186         }
3187
3188         for (i = 0; i < adapter->num_rx_queues; i++)
3189                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done,
3190                                      adapter->rx_ring[i].napi.weight);
3191
3192         /* If no Tx and not enough Rx work done, exit the polling mode */
3193         if ((tx_clean_complete && (work_done < budget)) ||
3194             !netif_running(netdev)) {
3195 quit_polling:
3196                 if (adapter->itr_setting & 3)
3197                         igb_set_itr(adapter, E1000_ITR, false);
3198                 netif_rx_complete(netdev, napi);
3199                 if (!test_bit(__IGB_DOWN, &adapter->state))
3200                         igb_irq_enable(adapter);
3201                 return 0;
3202         }
3203
3204         return 1;
3205 }
3206
3207 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3208 {
3209         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3210         struct igb_adapter *adapter = rx_ring->adapter;
3211         struct e1000_hw *hw = &adapter->hw;
3212         struct net_device *netdev = adapter->netdev;
3213         int work_done = 0;
3214
3215         /* Keep link state information with original netdev */
3216         if (!netif_carrier_ok(netdev))
3217                 goto quit_polling;
3218
3219         igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget);
3220
3221
3222         /* If not enough Rx work done, exit the polling mode */
3223         if ((work_done == 0) || !netif_running(netdev)) {
3224 quit_polling:
3225                 netif_rx_complete(netdev, napi);
3226
3227                 wr32(E1000_EIMS, rx_ring->eims_value);
3228                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3229                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3230                         int mean_size = rx_ring->total_bytes /
3231                                         rx_ring->total_packets;
3232                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3233                                 igb_raise_rx_eitr(adapter, rx_ring);
3234                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3235                                 igb_lower_rx_eitr(adapter, rx_ring);
3236                 }
3237                 return 0;
3238         }
3239
3240         return 1;
3241 }
3242 /**
3243  * igb_clean_tx_irq - Reclaim resources after transmit completes
3244  * @adapter: board private structure
3245  * returns true if ring is completely cleaned
3246  **/
3247 static bool igb_clean_tx_irq(struct igb_adapter *adapter,
3248                                   struct igb_ring *tx_ring)
3249 {
3250         struct net_device *netdev = adapter->netdev;
3251         struct e1000_hw *hw = &adapter->hw;
3252         struct e1000_tx_desc *tx_desc;
3253         struct igb_buffer *buffer_info;
3254         struct sk_buff *skb;
3255         unsigned int i;
3256         u32 head, oldhead;
3257         unsigned int count = 0;
3258         bool cleaned = false;
3259         bool retval = true;
3260         unsigned int total_bytes = 0, total_packets = 0;
3261
3262         rmb();
3263         head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
3264                                  + tx_ring->count);
3265         head = le32_to_cpu(head);
3266         i = tx_ring->next_to_clean;
3267         while (1) {
3268                 while (i != head) {
3269                         cleaned = true;
3270                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3271                         buffer_info = &tx_ring->buffer_info[i];
3272                         skb = buffer_info->skb;
3273
3274                         if (skb) {
3275                                 unsigned int segs, bytecount;
3276                                 /* gso_segs is currently only valid for tcp */
3277                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3278                                 /* multiply data chunks by size of headers */
3279                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3280                                             skb->len;
3281                                 total_packets += segs;
3282                                 total_bytes += bytecount;
3283                         }
3284
3285                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3286                         tx_desc->upper.data = 0;
3287
3288                         i++;
3289                         if (i == tx_ring->count)
3290                                 i = 0;
3291
3292                         count++;
3293                         if (count == IGB_MAX_TX_CLEAN) {
3294                                 retval = false;
3295                                 goto done_cleaning;
3296                         }
3297                 }
3298                 oldhead = head;
3299                 rmb();
3300                 head = *(volatile u32 *)((struct e1000_tx_desc *)tx_ring->desc
3301                                          + tx_ring->count);
3302                 head = le32_to_cpu(head);
3303                 if (head == oldhead)
3304                         goto done_cleaning;
3305         }  /* while (1) */
3306
3307 done_cleaning:
3308         tx_ring->next_to_clean = i;
3309
3310         if (unlikely(cleaned &&
3311                      netif_carrier_ok(netdev) &&
3312                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3313                 /* Make sure that anybody stopping the queue after this
3314                  * sees the new next_to_clean.
3315                  */
3316                 smp_mb();
3317                 if (netif_queue_stopped(netdev) &&
3318                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3319                         netif_wake_queue(netdev);
3320                         ++adapter->restart_queue;
3321                 }
3322         }
3323
3324         if (tx_ring->detect_tx_hung) {
3325                 /* Detect a transmit hang in hardware, this serializes the
3326                  * check with the clearing of time_stamp and movement of i */
3327                 tx_ring->detect_tx_hung = false;
3328                 if (tx_ring->buffer_info[i].time_stamp &&
3329                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3330                                (adapter->tx_timeout_factor * HZ))
3331                     && !(rd32(E1000_STATUS) &
3332                          E1000_STATUS_TXOFF)) {
3333
3334                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3335                         /* detected Tx unit hang */
3336                         dev_err(&adapter->pdev->dev,
3337                                 "Detected Tx Unit Hang\n"
3338                                 "  Tx Queue             <%lu>\n"
3339                                 "  TDH                  <%x>\n"
3340                                 "  TDT                  <%x>\n"
3341                                 "  next_to_use          <%x>\n"
3342                                 "  next_to_clean        <%x>\n"
3343                                 "  head (WB)            <%x>\n"
3344                                 "buffer_info[next_to_clean]\n"
3345                                 "  time_stamp           <%lx>\n"
3346                                 "  jiffies              <%lx>\n"
3347                                 "  desc.status          <%x>\n",
3348                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3349                                         sizeof(struct igb_ring)),
3350                                 readl(adapter->hw.hw_addr + tx_ring->head),
3351                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3352                                 tx_ring->next_to_use,
3353                                 tx_ring->next_to_clean,
3354                                 head,
3355                                 tx_ring->buffer_info[i].time_stamp,
3356                                 jiffies,
3357                                 tx_desc->upper.fields.status);
3358                         netif_stop_queue(netdev);
3359                 }
3360         }
3361         tx_ring->total_bytes += total_bytes;
3362         tx_ring->total_packets += total_packets;
3363         adapter->net_stats.tx_bytes += total_bytes;
3364         adapter->net_stats.tx_packets += total_packets;
3365         return retval;
3366 }
3367
3368
3369 /**
3370  * igb_receive_skb - helper function to handle rx indications
3371  * @adapter: board private structure
3372  * @status: descriptor status field as written by hardware
3373  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3374  * @skb: pointer to sk_buff to be indicated to stack
3375  **/
3376 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, u16 vlan,
3377                             struct sk_buff *skb)
3378 {
3379         if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3380                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3381                                          le16_to_cpu(vlan) &
3382                                          E1000_RXD_SPC_VLAN_MASK);
3383         else
3384                 netif_receive_skb(skb);
3385 }
3386
3387
3388 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3389                                        u32 status_err, struct sk_buff *skb)
3390 {
3391         skb->ip_summed = CHECKSUM_NONE;
3392
3393         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3394         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3395                 return;
3396         /* TCP/UDP checksum error bit is set */
3397         if (status_err &
3398             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3399                 /* let the stack verify checksum errors */
3400                 adapter->hw_csum_err++;
3401                 return;
3402         }
3403         /* It must be a TCP or UDP packet with a valid checksum */
3404         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3405                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3406
3407         adapter->hw_csum_good++;
3408 }
3409
3410 static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter,
3411                                       struct igb_ring *rx_ring,
3412                                       int *work_done, int budget)
3413 {
3414         struct net_device *netdev = adapter->netdev;
3415         struct pci_dev *pdev = adapter->pdev;
3416         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3417         struct igb_buffer *buffer_info , *next_buffer;
3418         struct sk_buff *skb;
3419         unsigned int i, j;
3420         u32 length, hlen, staterr;
3421         bool cleaned = false;
3422         int cleaned_count = 0;
3423         unsigned int total_bytes = 0, total_packets = 0;
3424
3425         i = rx_ring->next_to_clean;
3426         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3427         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3428
3429         while (staterr & E1000_RXD_STAT_DD) {
3430                 if (*work_done >= budget)
3431                         break;
3432                 (*work_done)++;
3433                 buffer_info = &rx_ring->buffer_info[i];
3434
3435                 /* HW will not DMA in data larger than the given buffer, even
3436                  * if it parses the (NFS, of course) header to be larger.  In
3437                  * that case, it fills the header buffer and spills the rest
3438                  * into the page.
3439                  */
3440                 hlen = le16_to_cpu((rx_desc->wb.lower.lo_dword.hdr_info &
3441                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT);
3442                 if (hlen > adapter->rx_ps_hdr_size)
3443                         hlen = adapter->rx_ps_hdr_size;
3444
3445                 length = le16_to_cpu(rx_desc->wb.upper.length);
3446                 cleaned = true;
3447                 cleaned_count++;
3448
3449                 if (rx_ring->pending_skb != NULL) {
3450                         skb = rx_ring->pending_skb;
3451                         rx_ring->pending_skb = NULL;
3452                         j = rx_ring->pending_skb_page;
3453                 } else {
3454                         skb = buffer_info->skb;
3455                         prefetch(skb->data - NET_IP_ALIGN);
3456                         buffer_info->skb = NULL;
3457                         if (hlen) {
3458                                 pci_unmap_single(pdev, buffer_info->dma,
3459                                                  adapter->rx_ps_hdr_size +
3460                                                    NET_IP_ALIGN,
3461                                                  PCI_DMA_FROMDEVICE);
3462                                 skb_put(skb, hlen);
3463                         } else {
3464                                 pci_unmap_single(pdev, buffer_info->dma,
3465                                                  adapter->rx_buffer_len +
3466                                                    NET_IP_ALIGN,
3467                                                  PCI_DMA_FROMDEVICE);
3468                                 skb_put(skb, length);
3469                                 goto send_up;
3470                         }
3471                         j = 0;
3472                 }
3473
3474                 while (length) {
3475                         pci_unmap_page(pdev, buffer_info->page_dma,
3476                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3477                         buffer_info->page_dma = 0;
3478                         skb_fill_page_desc(skb, j, buffer_info->page,
3479                                                 0, length);
3480                         buffer_info->page = NULL;
3481
3482                         skb->len += length;
3483                         skb->data_len += length;
3484                         skb->truesize += length;
3485                         rx_desc->wb.upper.status_error = 0;
3486                         if (staterr & E1000_RXD_STAT_EOP)
3487                                 break;
3488
3489                         j++;
3490                         cleaned_count++;
3491                         i++;
3492                         if (i == rx_ring->count)
3493                                 i = 0;
3494
3495                         buffer_info = &rx_ring->buffer_info[i];
3496                         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3497                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3498                         length = le16_to_cpu(rx_desc->wb.upper.length);
3499                         if (!(staterr & E1000_RXD_STAT_DD)) {
3500                                 rx_ring->pending_skb = skb;
3501                                 rx_ring->pending_skb_page = j;
3502                                 goto out;
3503                         }
3504                 }
3505 send_up:
3506                 pskb_trim(skb, skb->len - 4);
3507                 i++;
3508                 if (i == rx_ring->count)
3509                         i = 0;
3510                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3511                 prefetch(next_rxd);
3512                 next_buffer = &rx_ring->buffer_info[i];
3513
3514                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3515                         dev_kfree_skb_irq(skb);
3516                         goto next_desc;
3517                 }
3518                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3519
3520                 total_bytes += skb->len;
3521                 total_packets++;
3522
3523                 igb_rx_checksum_adv(adapter, staterr, skb);
3524
3525                 skb->protocol = eth_type_trans(skb, netdev);
3526
3527                 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3528
3529                 netdev->last_rx = jiffies;
3530
3531 next_desc:
3532                 rx_desc->wb.upper.status_error = 0;
3533
3534                 /* return some buffers to hardware, one at a time is too slow */
3535                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3536                         igb_alloc_rx_buffers_adv(adapter, rx_ring,
3537                                                  cleaned_count);
3538                         cleaned_count = 0;
3539                 }
3540
3541                 /* use prefetched values */
3542                 rx_desc = next_rxd;
3543                 buffer_info = next_buffer;
3544
3545                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3546         }
3547 out:
3548         rx_ring->next_to_clean = i;
3549         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3550
3551         if (cleaned_count)
3552                 igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count);
3553
3554         rx_ring->total_packets += total_packets;
3555         rx_ring->total_bytes += total_bytes;
3556         rx_ring->rx_stats.packets += total_packets;
3557         rx_ring->rx_stats.bytes += total_bytes;
3558         adapter->net_stats.rx_bytes += total_bytes;
3559         adapter->net_stats.rx_packets += total_packets;
3560         return cleaned;
3561 }
3562
3563
3564 /**
3565  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3566  * @adapter: address of board private structure
3567  **/
3568 static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter,
3569                                      struct igb_ring *rx_ring,
3570                                      int cleaned_count)
3571 {
3572         struct net_device *netdev = adapter->netdev;
3573         struct pci_dev *pdev = adapter->pdev;
3574         union e1000_adv_rx_desc *rx_desc;
3575         struct igb_buffer *buffer_info;
3576         struct sk_buff *skb;
3577         unsigned int i;
3578
3579         i = rx_ring->next_to_use;
3580         buffer_info = &rx_ring->buffer_info[i];
3581
3582         while (cleaned_count--) {
3583                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3584
3585                 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3586                         buffer_info->page = alloc_page(GFP_ATOMIC);
3587                         if (!buffer_info->page) {
3588                                 adapter->alloc_rx_buff_failed++;
3589                                 goto no_buffers;
3590                         }
3591                         buffer_info->page_dma =
3592                                 pci_map_page(pdev,
3593                                              buffer_info->page,
3594                                              0, PAGE_SIZE,
3595                                              PCI_DMA_FROMDEVICE);
3596                 }
3597
3598                 if (!buffer_info->skb) {
3599                         int bufsz;
3600
3601                         if (adapter->rx_ps_hdr_size)
3602                                 bufsz = adapter->rx_ps_hdr_size;
3603                         else
3604                                 bufsz = adapter->rx_buffer_len;
3605                         bufsz += NET_IP_ALIGN;
3606                         skb = netdev_alloc_skb(netdev, bufsz);
3607
3608                         if (!skb) {
3609                                 adapter->alloc_rx_buff_failed++;
3610                                 goto no_buffers;
3611                         }
3612
3613                         /* Make buffer alignment 2 beyond a 16 byte boundary
3614                          * this will result in a 16 byte aligned IP header after
3615                          * the 14 byte MAC header is removed
3616                          */
3617                         skb_reserve(skb, NET_IP_ALIGN);
3618
3619                         buffer_info->skb = skb;
3620                         buffer_info->dma = pci_map_single(pdev, skb->data,
3621                                                           bufsz,
3622                                                           PCI_DMA_FROMDEVICE);
3623
3624                 }
3625                 /* Refresh the desc even if buffer_addrs didn't change because
3626                  * each write-back erases this info. */
3627                 if (adapter->rx_ps_hdr_size) {
3628                         rx_desc->read.pkt_addr =
3629                              cpu_to_le64(buffer_info->page_dma);
3630                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3631                 } else {
3632                         rx_desc->read.pkt_addr =
3633                              cpu_to_le64(buffer_info->dma);
3634                         rx_desc->read.hdr_addr = 0;
3635                 }
3636
3637                 i++;
3638                 if (i == rx_ring->count)
3639                         i = 0;
3640                 buffer_info = &rx_ring->buffer_info[i];
3641         }
3642
3643 no_buffers:
3644         if (rx_ring->next_to_use != i) {
3645                 rx_ring->next_to_use = i;
3646                 if (i == 0)
3647                         i = (rx_ring->count - 1);
3648                 else
3649                         i--;
3650
3651                 /* Force memory writes to complete before letting h/w
3652                  * know there are new descriptors to fetch.  (Only
3653                  * applicable for weak-ordered memory model archs,
3654                  * such as IA-64). */
3655                 wmb();
3656                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3657         }
3658 }
3659
3660 /**
3661  * igb_mii_ioctl -
3662  * @netdev:
3663  * @ifreq:
3664  * @cmd:
3665  **/
3666 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3667 {
3668         struct igb_adapter *adapter = netdev_priv(netdev);
3669         struct mii_ioctl_data *data = if_mii(ifr);
3670
3671         if (adapter->hw.phy.media_type != e1000_media_type_copper)
3672                 return -EOPNOTSUPP;
3673
3674         switch (cmd) {
3675         case SIOCGMIIPHY:
3676                 data->phy_id = adapter->hw.phy.addr;
3677                 break;
3678         case SIOCGMIIREG:
3679                 if (!capable(CAP_NET_ADMIN))
3680                         return -EPERM;
3681                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3682                                                      data->reg_num
3683                                                      & 0x1F, &data->val_out))
3684                         return -EIO;
3685                 break;
3686         case SIOCSMIIREG:
3687         default:
3688                 return -EOPNOTSUPP;
3689         }
3690         return 0;
3691 }
3692
3693 /**
3694  * igb_ioctl -
3695  * @netdev:
3696  * @ifreq:
3697  * @cmd:
3698  **/
3699 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3700 {
3701         switch (cmd) {
3702         case SIOCGMIIPHY:
3703         case SIOCGMIIREG:
3704         case SIOCSMIIREG:
3705                 return igb_mii_ioctl(netdev, ifr, cmd);
3706         default:
3707                 return -EOPNOTSUPP;
3708         }
3709 }
3710
3711 static void igb_vlan_rx_register(struct net_device *netdev,
3712                                  struct vlan_group *grp)
3713 {
3714         struct igb_adapter *adapter = netdev_priv(netdev);
3715         struct e1000_hw *hw = &adapter->hw;
3716         u32 ctrl, rctl;
3717
3718         igb_irq_disable(adapter);
3719         adapter->vlgrp = grp;
3720
3721         if (grp) {
3722                 /* enable VLAN tag insert/strip */
3723                 ctrl = rd32(E1000_CTRL);
3724                 ctrl |= E1000_CTRL_VME;
3725                 wr32(E1000_CTRL, ctrl);
3726
3727                 /* enable VLAN receive filtering */
3728                 rctl = rd32(E1000_RCTL);
3729                 rctl |= E1000_RCTL_VFE;
3730                 rctl &= ~E1000_RCTL_CFIEN;
3731                 wr32(E1000_RCTL, rctl);
3732                 igb_update_mng_vlan(adapter);
3733                 wr32(E1000_RLPML,
3734                                 adapter->max_frame_size + VLAN_TAG_SIZE);
3735         } else {
3736                 /* disable VLAN tag insert/strip */
3737                 ctrl = rd32(E1000_CTRL);
3738                 ctrl &= ~E1000_CTRL_VME;
3739                 wr32(E1000_CTRL, ctrl);
3740
3741                 /* disable VLAN filtering */
3742                 rctl = rd32(E1000_RCTL);
3743                 rctl &= ~E1000_RCTL_VFE;
3744                 wr32(E1000_RCTL, rctl);
3745                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3746                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3747                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3748                 }
3749                 wr32(E1000_RLPML,
3750                                 adapter->max_frame_size);
3751         }
3752
3753         if (!test_bit(__IGB_DOWN, &adapter->state))
3754                 igb_irq_enable(adapter);
3755 }
3756
3757 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3758 {
3759         struct igb_adapter *adapter = netdev_priv(netdev);
3760         struct e1000_hw *hw = &adapter->hw;
3761         u32 vfta, index;
3762
3763         if ((adapter->hw.mng_cookie.status &
3764              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3765             (vid == adapter->mng_vlan_id))
3766                 return;
3767         /* add VID to filter table */
3768         index = (vid >> 5) & 0x7F;
3769         vfta = array_rd32(E1000_VFTA, index);
3770         vfta |= (1 << (vid & 0x1F));
3771         igb_write_vfta(&adapter->hw, index, vfta);
3772 }
3773
3774 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3775 {
3776         struct igb_adapter *adapter = netdev_priv(netdev);
3777         struct e1000_hw *hw = &adapter->hw;
3778         u32 vfta, index;
3779
3780         igb_irq_disable(adapter);
3781         vlan_group_set_device(adapter->vlgrp, vid, NULL);
3782
3783         if (!test_bit(__IGB_DOWN, &adapter->state))
3784                 igb_irq_enable(adapter);
3785
3786         if ((adapter->hw.mng_cookie.status &
3787              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3788             (vid == adapter->mng_vlan_id)) {
3789                 /* release control to f/w */
3790                 igb_release_hw_control(adapter);
3791                 return;
3792         }
3793
3794         /* remove VID from filter table */
3795         index = (vid >> 5) & 0x7F;
3796         vfta = array_rd32(E1000_VFTA, index);
3797         vfta &= ~(1 << (vid & 0x1F));
3798         igb_write_vfta(&adapter->hw, index, vfta);
3799 }
3800
3801 static void igb_restore_vlan(struct igb_adapter *adapter)
3802 {
3803         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3804
3805         if (adapter->vlgrp) {
3806                 u16 vid;
3807                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3808                         if (!vlan_group_get_device(adapter->vlgrp, vid))
3809                                 continue;
3810                         igb_vlan_rx_add_vid(adapter->netdev, vid);
3811                 }
3812         }
3813 }
3814
3815 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3816 {
3817         struct e1000_mac_info *mac = &adapter->hw.mac;
3818
3819         mac->autoneg = 0;
3820
3821         /* Fiber NICs only allow 1000 gbps Full duplex */
3822         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3823                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3824                 dev_err(&adapter->pdev->dev,
3825                         "Unsupported Speed/Duplex configuration\n");
3826                 return -EINVAL;
3827         }
3828
3829         switch (spddplx) {
3830         case SPEED_10 + DUPLEX_HALF:
3831                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3832                 break;
3833         case SPEED_10 + DUPLEX_FULL:
3834                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3835                 break;
3836         case SPEED_100 + DUPLEX_HALF:
3837                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3838                 break;
3839         case SPEED_100 + DUPLEX_FULL:
3840                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3841                 break;
3842         case SPEED_1000 + DUPLEX_FULL:
3843                 mac->autoneg = 1;
3844                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3845                 break;
3846         case SPEED_1000 + DUPLEX_HALF: /* not supported */
3847         default:
3848                 dev_err(&adapter->pdev->dev,
3849                         "Unsupported Speed/Duplex configuration\n");
3850                 return -EINVAL;
3851         }
3852         return 0;
3853 }
3854
3855
3856 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3857 {
3858         struct net_device *netdev = pci_get_drvdata(pdev);
3859         struct igb_adapter *adapter = netdev_priv(netdev);
3860         struct e1000_hw *hw = &adapter->hw;
3861         u32 ctrl, ctrl_ext, rctl, status;
3862         u32 wufc = adapter->wol;
3863 #ifdef CONFIG_PM
3864         int retval = 0;
3865 #endif
3866
3867         netif_device_detach(netdev);
3868
3869         if (netif_running(netdev)) {
3870                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3871                 igb_down(adapter);
3872                 igb_free_irq(adapter);
3873         }
3874
3875 #ifdef CONFIG_PM
3876         retval = pci_save_state(pdev);
3877         if (retval)
3878                 return retval;
3879 #endif
3880
3881         status = rd32(E1000_STATUS);
3882         if (status & E1000_STATUS_LU)
3883                 wufc &= ~E1000_WUFC_LNKC;
3884
3885         if (wufc) {
3886                 igb_setup_rctl(adapter);
3887                 igb_set_multi(netdev);
3888
3889                 /* turn on all-multi mode if wake on multicast is enabled */
3890                 if (wufc & E1000_WUFC_MC) {
3891                         rctl = rd32(E1000_RCTL);
3892                         rctl |= E1000_RCTL_MPE;
3893                         wr32(E1000_RCTL, rctl);
3894                 }
3895
3896                 ctrl = rd32(E1000_CTRL);
3897                 /* advertise wake from D3Cold */
3898                 #define E1000_CTRL_ADVD3WUC 0x00100000
3899                 /* phy power management enable */
3900                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3901                 ctrl |= E1000_CTRL_ADVD3WUC;
3902                 wr32(E1000_CTRL, ctrl);
3903
3904                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3905                    adapter->hw.phy.media_type ==
3906                                         e1000_media_type_internal_serdes) {
3907                         /* keep the laser running in D3 */
3908                         ctrl_ext = rd32(E1000_CTRL_EXT);
3909                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3910                         wr32(E1000_CTRL_EXT, ctrl_ext);
3911                 }
3912
3913                 /* Allow time for pending master requests to run */
3914                 igb_disable_pcie_master(&adapter->hw);
3915
3916                 wr32(E1000_WUC, E1000_WUC_PME_EN);
3917                 wr32(E1000_WUFC, wufc);
3918                 pci_enable_wake(pdev, PCI_D3hot, 1);
3919                 pci_enable_wake(pdev, PCI_D3cold, 1);
3920         } else {
3921                 wr32(E1000_WUC, 0);
3922                 wr32(E1000_WUFC, 0);
3923                 pci_enable_wake(pdev, PCI_D3hot, 0);
3924                 pci_enable_wake(pdev, PCI_D3cold, 0);
3925         }
3926
3927         /* make sure adapter isn't asleep if manageability is enabled */
3928         if (adapter->en_mng_pt) {
3929                 pci_enable_wake(pdev, PCI_D3hot, 1);
3930                 pci_enable_wake(pdev, PCI_D3cold, 1);
3931         }
3932
3933         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3934          * would have already happened in close and is redundant. */
3935         igb_release_hw_control(adapter);
3936
3937         pci_disable_device(pdev);
3938
3939         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3940
3941         return 0;
3942 }
3943
3944 #ifdef CONFIG_PM
3945 static int igb_resume(struct pci_dev *pdev)
3946 {
3947         struct net_device *netdev = pci_get_drvdata(pdev);
3948         struct igb_adapter *adapter = netdev_priv(netdev);
3949         struct e1000_hw *hw = &adapter->hw;
3950         u32 err;
3951
3952         pci_set_power_state(pdev, PCI_D0);
3953         pci_restore_state(pdev);
3954         err = pci_enable_device(pdev);
3955         if (err) {
3956                 dev_err(&pdev->dev,
3957                         "igb: Cannot enable PCI device from suspend\n");
3958                 return err;
3959         }
3960         pci_set_master(pdev);
3961
3962         pci_enable_wake(pdev, PCI_D3hot, 0);
3963         pci_enable_wake(pdev, PCI_D3cold, 0);
3964
3965         if (netif_running(netdev)) {
3966                 err = igb_request_irq(adapter);
3967                 if (err)
3968                         return err;
3969         }
3970
3971         /* e1000_power_up_phy(adapter); */
3972
3973         igb_reset(adapter);
3974         wr32(E1000_WUS, ~0);
3975
3976         igb_init_manageability(adapter);
3977
3978         if (netif_running(netdev))
3979                 igb_up(adapter);
3980
3981         netif_device_attach(netdev);
3982
3983         /* let the f/w know that the h/w is now under the control of the
3984          * driver. */
3985         igb_get_hw_control(adapter);
3986
3987         return 0;
3988 }
3989 #endif
3990
3991 static void igb_shutdown(struct pci_dev *pdev)
3992 {
3993         igb_suspend(pdev, PMSG_SUSPEND);
3994 }
3995
3996 #ifdef CONFIG_NET_POLL_CONTROLLER
3997 /*
3998  * Polling 'interrupt' - used by things like netconsole to send skbs
3999  * without having to re-enable interrupts. It's not called while
4000  * the interrupt routine is executing.
4001  */
4002 static void igb_netpoll(struct net_device *netdev)
4003 {
4004         struct igb_adapter *adapter = netdev_priv(netdev);
4005         int i;
4006         int work_done = 0;
4007
4008         igb_irq_disable(adapter);
4009         for (i = 0; i < adapter->num_tx_queues; i++)
4010                 igb_clean_tx_irq(adapter, &adapter->tx_ring[i]);
4011
4012         for (i = 0; i < adapter->num_rx_queues; i++)
4013                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i],
4014                                      &work_done,
4015                                      adapter->rx_ring[i].napi.weight);
4016
4017         igb_irq_enable(adapter);
4018 }
4019 #endif /* CONFIG_NET_POLL_CONTROLLER */
4020
4021 /**
4022  * igb_io_error_detected - called when PCI error is detected
4023  * @pdev: Pointer to PCI device
4024  * @state: The current pci connection state
4025  *
4026  * This function is called after a PCI bus error affecting
4027  * this device has been detected.
4028  */
4029 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4030                                               pci_channel_state_t state)
4031 {
4032         struct net_device *netdev = pci_get_drvdata(pdev);
4033         struct igb_adapter *adapter = netdev_priv(netdev);
4034
4035         netif_device_detach(netdev);
4036
4037         if (netif_running(netdev))
4038                 igb_down(adapter);
4039         pci_disable_device(pdev);
4040
4041         /* Request a slot slot reset. */
4042         return PCI_ERS_RESULT_NEED_RESET;
4043 }
4044
4045 /**
4046  * igb_io_slot_reset - called after the pci bus has been reset.
4047  * @pdev: Pointer to PCI device
4048  *
4049  * Restart the card from scratch, as if from a cold-boot. Implementation
4050  * resembles the first-half of the igb_resume routine.
4051  */
4052 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4053 {
4054         struct net_device *netdev = pci_get_drvdata(pdev);
4055         struct igb_adapter *adapter = netdev_priv(netdev);
4056         struct e1000_hw *hw = &adapter->hw;
4057
4058         if (pci_enable_device(pdev)) {
4059                 dev_err(&pdev->dev,
4060                         "Cannot re-enable PCI device after reset.\n");
4061                 return PCI_ERS_RESULT_DISCONNECT;
4062         }
4063         pci_set_master(pdev);
4064
4065         pci_enable_wake(pdev, PCI_D3hot, 0);
4066         pci_enable_wake(pdev, PCI_D3cold, 0);
4067
4068         igb_reset(adapter);
4069         wr32(E1000_WUS, ~0);
4070
4071         return PCI_ERS_RESULT_RECOVERED;
4072 }
4073
4074 /**
4075  * igb_io_resume - called when traffic can start flowing again.
4076  * @pdev: Pointer to PCI device
4077  *
4078  * This callback is called when the error recovery driver tells us that
4079  * its OK to resume normal operation. Implementation resembles the
4080  * second-half of the igb_resume routine.
4081  */
4082 static void igb_io_resume(struct pci_dev *pdev)
4083 {
4084         struct net_device *netdev = pci_get_drvdata(pdev);
4085         struct igb_adapter *adapter = netdev_priv(netdev);
4086
4087         igb_init_manageability(adapter);
4088
4089         if (netif_running(netdev)) {
4090                 if (igb_up(adapter)) {
4091                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4092                         return;
4093                 }
4094         }
4095
4096         netif_device_attach(netdev);
4097
4098         /* let the f/w know that the h/w is now under the control of the
4099          * driver. */
4100         igb_get_hw_control(adapter);
4101
4102 }
4103
4104 /* igb_main.c */