igb: make ioport free
[linux-2.6.git] / drivers / net / igb / igb_main.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
44
45 #include "igb.h"
46
47 #define DRV_VERSION "1.0.8-k2"
48 char igb_driver_name[] = "igb";
49 char igb_driver_version[] = DRV_VERSION;
50 static const char igb_driver_string[] =
51                                 "Intel(R) Gigabit Ethernet Network Driver";
52 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
53
54
55 static const struct e1000_info *igb_info_tbl[] = {
56         [board_82575] = &e1000_82575_info,
57 };
58
59 static struct pci_device_id igb_pci_tbl[] = {
60         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
61         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
63         /* required last entry */
64         {0, }
65 };
66
67 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
68
69 void igb_reset(struct igb_adapter *);
70 static int igb_setup_all_tx_resources(struct igb_adapter *);
71 static int igb_setup_all_rx_resources(struct igb_adapter *);
72 static void igb_free_all_tx_resources(struct igb_adapter *);
73 static void igb_free_all_rx_resources(struct igb_adapter *);
74 static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *);
75 static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *);
76 void igb_update_stats(struct igb_adapter *);
77 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
78 static void __devexit igb_remove(struct pci_dev *pdev);
79 static int igb_sw_init(struct igb_adapter *);
80 static int igb_open(struct net_device *);
81 static int igb_close(struct net_device *);
82 static void igb_configure_tx(struct igb_adapter *);
83 static void igb_configure_rx(struct igb_adapter *);
84 static void igb_setup_rctl(struct igb_adapter *);
85 static void igb_clean_all_tx_rings(struct igb_adapter *);
86 static void igb_clean_all_rx_rings(struct igb_adapter *);
87 static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *);
88 static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *);
89 static void igb_set_multi(struct net_device *);
90 static void igb_update_phy_info(unsigned long);
91 static void igb_watchdog(unsigned long);
92 static void igb_watchdog_task(struct work_struct *);
93 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
94                                   struct igb_ring *);
95 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
96 static struct net_device_stats *igb_get_stats(struct net_device *);
97 static int igb_change_mtu(struct net_device *, int);
98 static int igb_set_mac(struct net_device *, void *);
99 static irqreturn_t igb_intr(int irq, void *);
100 static irqreturn_t igb_intr_msi(int irq, void *);
101 static irqreturn_t igb_msix_other(int irq, void *);
102 static irqreturn_t igb_msix_rx(int irq, void *);
103 static irqreturn_t igb_msix_tx(int irq, void *);
104 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
105 static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *);
106 static int igb_clean(struct napi_struct *, int);
107 static bool igb_clean_rx_irq_adv(struct igb_adapter *,
108                                  struct igb_ring *, int *, int);
109 static void igb_alloc_rx_buffers_adv(struct igb_adapter *,
110                                      struct igb_ring *, int);
111 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
112 static void igb_tx_timeout(struct net_device *);
113 static void igb_reset_task(struct work_struct *);
114 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
115 static void igb_vlan_rx_add_vid(struct net_device *, u16);
116 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
117 static void igb_restore_vlan(struct igb_adapter *);
118
119 static int igb_suspend(struct pci_dev *, pm_message_t);
120 #ifdef CONFIG_PM
121 static int igb_resume(struct pci_dev *);
122 #endif
123 static void igb_shutdown(struct pci_dev *);
124
125 #ifdef CONFIG_NET_POLL_CONTROLLER
126 /* for netdump / net console */
127 static void igb_netpoll(struct net_device *);
128 #endif
129
130 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
131                      pci_channel_state_t);
132 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
133 static void igb_io_resume(struct pci_dev *);
134
135 static struct pci_error_handlers igb_err_handler = {
136         .error_detected = igb_io_error_detected,
137         .slot_reset = igb_io_slot_reset,
138         .resume = igb_io_resume,
139 };
140
141
142 static struct pci_driver igb_driver = {
143         .name     = igb_driver_name,
144         .id_table = igb_pci_tbl,
145         .probe    = igb_probe,
146         .remove   = __devexit_p(igb_remove),
147 #ifdef CONFIG_PM
148         /* Power Managment Hooks */
149         .suspend  = igb_suspend,
150         .resume   = igb_resume,
151 #endif
152         .shutdown = igb_shutdown,
153         .err_handler = &igb_err_handler
154 };
155
156 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
157 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
158 MODULE_LICENSE("GPL");
159 MODULE_VERSION(DRV_VERSION);
160
161 #ifdef DEBUG
162 /**
163  * igb_get_hw_dev_name - return device name string
164  * used by hardware layer to print debugging information
165  **/
166 char *igb_get_hw_dev_name(struct e1000_hw *hw)
167 {
168         struct igb_adapter *adapter = hw->back;
169         return adapter->netdev->name;
170 }
171 #endif
172
173 /**
174  * igb_init_module - Driver Registration Routine
175  *
176  * igb_init_module is the first routine called when the driver is
177  * loaded. All it does is register with the PCI subsystem.
178  **/
179 static int __init igb_init_module(void)
180 {
181         int ret;
182         printk(KERN_INFO "%s - version %s\n",
183                igb_driver_string, igb_driver_version);
184
185         printk(KERN_INFO "%s\n", igb_copyright);
186
187         ret = pci_register_driver(&igb_driver);
188         return ret;
189 }
190
191 module_init(igb_init_module);
192
193 /**
194  * igb_exit_module - Driver Exit Cleanup Routine
195  *
196  * igb_exit_module is called just before the driver is removed
197  * from memory.
198  **/
199 static void __exit igb_exit_module(void)
200 {
201         pci_unregister_driver(&igb_driver);
202 }
203
204 module_exit(igb_exit_module);
205
206 /**
207  * igb_alloc_queues - Allocate memory for all rings
208  * @adapter: board private structure to initialize
209  *
210  * We allocate one ring per queue at run-time since we don't know the
211  * number of queues at compile-time.
212  **/
213 static int igb_alloc_queues(struct igb_adapter *adapter)
214 {
215         int i;
216
217         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
218                                    sizeof(struct igb_ring), GFP_KERNEL);
219         if (!adapter->tx_ring)
220                 return -ENOMEM;
221
222         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
223                                    sizeof(struct igb_ring), GFP_KERNEL);
224         if (!adapter->rx_ring) {
225                 kfree(adapter->tx_ring);
226                 return -ENOMEM;
227         }
228
229         for (i = 0; i < adapter->num_rx_queues; i++) {
230                 struct igb_ring *ring = &(adapter->rx_ring[i]);
231                 ring->adapter = adapter;
232                 ring->itr_register = E1000_ITR;
233
234                 if (!ring->napi.poll)
235                         netif_napi_add(adapter->netdev, &ring->napi, igb_clean,
236                                        adapter->napi.weight /
237                                        adapter->num_rx_queues);
238         }
239         return 0;
240 }
241
242 #define IGB_N0_QUEUE -1
243 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
244                               int tx_queue, int msix_vector)
245 {
246         u32 msixbm = 0;
247         struct e1000_hw *hw = &adapter->hw;
248                 /* The 82575 assigns vectors using a bitmask, which matches the
249                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
250                    or more queues to a vector, we write the appropriate bits
251                    into the MSIXBM register for that vector. */
252                 if (rx_queue > IGB_N0_QUEUE) {
253                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
254                         adapter->rx_ring[rx_queue].eims_value = msixbm;
255                 }
256                 if (tx_queue > IGB_N0_QUEUE) {
257                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
258                         adapter->tx_ring[tx_queue].eims_value =
259                                   E1000_EICR_TX_QUEUE0 << tx_queue;
260                 }
261                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
262 }
263
264 /**
265  * igb_configure_msix - Configure MSI-X hardware
266  *
267  * igb_configure_msix sets up the hardware to properly
268  * generate MSI-X interrupts.
269  **/
270 static void igb_configure_msix(struct igb_adapter *adapter)
271 {
272         u32 tmp;
273         int i, vector = 0;
274         struct e1000_hw *hw = &adapter->hw;
275
276         adapter->eims_enable_mask = 0;
277
278         for (i = 0; i < adapter->num_tx_queues; i++) {
279                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
280                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
281                 adapter->eims_enable_mask |= tx_ring->eims_value;
282                 if (tx_ring->itr_val)
283                         writel(1000000000 / (tx_ring->itr_val * 256),
284                                hw->hw_addr + tx_ring->itr_register);
285                 else
286                         writel(1, hw->hw_addr + tx_ring->itr_register);
287         }
288
289         for (i = 0; i < adapter->num_rx_queues; i++) {
290                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
291                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
292                 adapter->eims_enable_mask |= rx_ring->eims_value;
293                 if (rx_ring->itr_val)
294                         writel(1000000000 / (rx_ring->itr_val * 256),
295                                hw->hw_addr + rx_ring->itr_register);
296                 else
297                         writel(1, hw->hw_addr + rx_ring->itr_register);
298         }
299
300
301         /* set vector for other causes, i.e. link changes */
302                 array_wr32(E1000_MSIXBM(0), vector++,
303                                       E1000_EIMS_OTHER);
304
305                 /* disable IAM for ICR interrupt bits */
306                 wr32(E1000_IAM, 0);
307
308                 tmp = rd32(E1000_CTRL_EXT);
309                 /* enable MSI-X PBA support*/
310                 tmp |= E1000_CTRL_EXT_PBA_CLR;
311
312                 /* Auto-Mask interrupts upon ICR read. */
313                 tmp |= E1000_CTRL_EXT_EIAME;
314                 tmp |= E1000_CTRL_EXT_IRCA;
315
316                 wr32(E1000_CTRL_EXT, tmp);
317                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
318
319         wrfl();
320 }
321
322 /**
323  * igb_request_msix - Initialize MSI-X interrupts
324  *
325  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
326  * kernel.
327  **/
328 static int igb_request_msix(struct igb_adapter *adapter)
329 {
330         struct net_device *netdev = adapter->netdev;
331         int i, err = 0, vector = 0;
332
333         vector = 0;
334
335         for (i = 0; i < adapter->num_tx_queues; i++) {
336                 struct igb_ring *ring = &(adapter->tx_ring[i]);
337                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
338                 err = request_irq(adapter->msix_entries[vector].vector,
339                                   &igb_msix_tx, 0, ring->name,
340                                   &(adapter->tx_ring[i]));
341                 if (err)
342                         goto out;
343                 ring->itr_register = E1000_EITR(0) + (vector << 2);
344                 ring->itr_val = adapter->itr;
345                 vector++;
346         }
347         for (i = 0; i < adapter->num_rx_queues; i++) {
348                 struct igb_ring *ring = &(adapter->rx_ring[i]);
349                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
350                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
351                 else
352                         memcpy(ring->name, netdev->name, IFNAMSIZ);
353                 err = request_irq(adapter->msix_entries[vector].vector,
354                                   &igb_msix_rx, 0, ring->name,
355                                   &(adapter->rx_ring[i]));
356                 if (err)
357                         goto out;
358                 ring->itr_register = E1000_EITR(0) + (vector << 2);
359                 ring->itr_val = adapter->itr;
360                 vector++;
361         }
362
363         err = request_irq(adapter->msix_entries[vector].vector,
364                           &igb_msix_other, 0, netdev->name, netdev);
365         if (err)
366                 goto out;
367
368         adapter->napi.poll = igb_clean_rx_ring_msix;
369         for (i = 0; i < adapter->num_rx_queues; i++)
370                 adapter->rx_ring[i].napi.poll = adapter->napi.poll;
371         igb_configure_msix(adapter);
372         return 0;
373 out:
374         return err;
375 }
376
377 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
378 {
379         if (adapter->msix_entries) {
380                 pci_disable_msix(adapter->pdev);
381                 kfree(adapter->msix_entries);
382                 adapter->msix_entries = NULL;
383         } else if (adapter->msi_enabled)
384                 pci_disable_msi(adapter->pdev);
385         return;
386 }
387
388
389 /**
390  * igb_set_interrupt_capability - set MSI or MSI-X if supported
391  *
392  * Attempt to configure interrupts using the best available
393  * capabilities of the hardware and kernel.
394  **/
395 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
396 {
397         int err;
398         int numvecs, i;
399
400         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
401         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
402                                         GFP_KERNEL);
403         if (!adapter->msix_entries)
404                 goto msi_only;
405
406         for (i = 0; i < numvecs; i++)
407                 adapter->msix_entries[i].entry = i;
408
409         err = pci_enable_msix(adapter->pdev,
410                               adapter->msix_entries,
411                               numvecs);
412         if (err == 0)
413                 return;
414
415         igb_reset_interrupt_capability(adapter);
416
417         /* If we can't do MSI-X, try MSI */
418 msi_only:
419         adapter->num_rx_queues = 1;
420         if (!pci_enable_msi(adapter->pdev))
421                 adapter->msi_enabled = 1;
422         return;
423 }
424
425 /**
426  * igb_request_irq - initialize interrupts
427  *
428  * Attempts to configure interrupts using the best available
429  * capabilities of the hardware and kernel.
430  **/
431 static int igb_request_irq(struct igb_adapter *adapter)
432 {
433         struct net_device *netdev = adapter->netdev;
434         struct e1000_hw *hw = &adapter->hw;
435         int err = 0;
436
437         if (adapter->msix_entries) {
438                 err = igb_request_msix(adapter);
439                 if (!err) {
440                         /* enable IAM, auto-mask,
441                          * DO NOT USE EIAM or IAM in legacy mode */
442                         wr32(E1000_IAM, IMS_ENABLE_MASK);
443                         goto request_done;
444                 }
445                 /* fall back to MSI */
446                 igb_reset_interrupt_capability(adapter);
447                 if (!pci_enable_msi(adapter->pdev))
448                         adapter->msi_enabled = 1;
449                 igb_free_all_tx_resources(adapter);
450                 igb_free_all_rx_resources(adapter);
451                 adapter->num_rx_queues = 1;
452                 igb_alloc_queues(adapter);
453         }
454         if (adapter->msi_enabled) {
455                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
456                                   netdev->name, netdev);
457                 if (!err)
458                         goto request_done;
459                 /* fall back to legacy interrupts */
460                 igb_reset_interrupt_capability(adapter);
461                 adapter->msi_enabled = 0;
462         }
463
464         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
465                           netdev->name, netdev);
466
467         if (err)
468                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
469                         err);
470
471 request_done:
472         return err;
473 }
474
475 static void igb_free_irq(struct igb_adapter *adapter)
476 {
477         struct net_device *netdev = adapter->netdev;
478
479         if (adapter->msix_entries) {
480                 int vector = 0, i;
481
482                 for (i = 0; i < adapter->num_tx_queues; i++)
483                         free_irq(adapter->msix_entries[vector++].vector,
484                                 &(adapter->tx_ring[i]));
485                 for (i = 0; i < adapter->num_rx_queues; i++)
486                         free_irq(adapter->msix_entries[vector++].vector,
487                                 &(adapter->rx_ring[i]));
488
489                 free_irq(adapter->msix_entries[vector++].vector, netdev);
490                 return;
491         }
492
493         free_irq(adapter->pdev->irq, netdev);
494 }
495
496 /**
497  * igb_irq_disable - Mask off interrupt generation on the NIC
498  * @adapter: board private structure
499  **/
500 static void igb_irq_disable(struct igb_adapter *adapter)
501 {
502         struct e1000_hw *hw = &adapter->hw;
503
504         if (adapter->msix_entries) {
505                 wr32(E1000_EIMC, ~0);
506                 wr32(E1000_EIAC, 0);
507         }
508         wr32(E1000_IMC, ~0);
509         wrfl();
510         synchronize_irq(adapter->pdev->irq);
511 }
512
513 /**
514  * igb_irq_enable - Enable default interrupt generation settings
515  * @adapter: board private structure
516  **/
517 static void igb_irq_enable(struct igb_adapter *adapter)
518 {
519         struct e1000_hw *hw = &adapter->hw;
520
521         if (adapter->msix_entries) {
522                 wr32(E1000_EIMS,
523                                 adapter->eims_enable_mask);
524                 wr32(E1000_EIAC,
525                                 adapter->eims_enable_mask);
526                 wr32(E1000_IMS, E1000_IMS_LSC);
527         } else
528         wr32(E1000_IMS, IMS_ENABLE_MASK);
529 }
530
531 static void igb_update_mng_vlan(struct igb_adapter *adapter)
532 {
533         struct net_device *netdev = adapter->netdev;
534         u16 vid = adapter->hw.mng_cookie.vlan_id;
535         u16 old_vid = adapter->mng_vlan_id;
536         if (adapter->vlgrp) {
537                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
538                         if (adapter->hw.mng_cookie.status &
539                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
540                                 igb_vlan_rx_add_vid(netdev, vid);
541                                 adapter->mng_vlan_id = vid;
542                         } else
543                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
544
545                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
546                                         (vid != old_vid) &&
547                             !vlan_group_get_device(adapter->vlgrp, old_vid))
548                                 igb_vlan_rx_kill_vid(netdev, old_vid);
549                 } else
550                         adapter->mng_vlan_id = vid;
551         }
552 }
553
554 /**
555  * igb_release_hw_control - release control of the h/w to f/w
556  * @adapter: address of board private structure
557  *
558  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
559  * For ASF and Pass Through versions of f/w this means that the
560  * driver is no longer loaded.
561  *
562  **/
563 static void igb_release_hw_control(struct igb_adapter *adapter)
564 {
565         struct e1000_hw *hw = &adapter->hw;
566         u32 ctrl_ext;
567
568         /* Let firmware take over control of h/w */
569         ctrl_ext = rd32(E1000_CTRL_EXT);
570         wr32(E1000_CTRL_EXT,
571                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
572 }
573
574
575 /**
576  * igb_get_hw_control - get control of the h/w from f/w
577  * @adapter: address of board private structure
578  *
579  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
580  * For ASF and Pass Through versions of f/w this means that
581  * the driver is loaded.
582  *
583  **/
584 static void igb_get_hw_control(struct igb_adapter *adapter)
585 {
586         struct e1000_hw *hw = &adapter->hw;
587         u32 ctrl_ext;
588
589         /* Let firmware know the driver has taken over */
590         ctrl_ext = rd32(E1000_CTRL_EXT);
591         wr32(E1000_CTRL_EXT,
592                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
593 }
594
595 static void igb_init_manageability(struct igb_adapter *adapter)
596 {
597         struct e1000_hw *hw = &adapter->hw;
598
599         if (adapter->en_mng_pt) {
600                 u32 manc2h = rd32(E1000_MANC2H);
601                 u32 manc = rd32(E1000_MANC);
602
603                 /* enable receiving management packets to the host */
604                 /* this will probably generate destination unreachable messages
605                  * from the host OS, but the packets will be handled on SMBUS */
606                 manc |= E1000_MANC_EN_MNG2HOST;
607 #define E1000_MNG2HOST_PORT_623 (1 << 5)
608 #define E1000_MNG2HOST_PORT_664 (1 << 6)
609                 manc2h |= E1000_MNG2HOST_PORT_623;
610                 manc2h |= E1000_MNG2HOST_PORT_664;
611                 wr32(E1000_MANC2H, manc2h);
612
613                 wr32(E1000_MANC, manc);
614         }
615 }
616
617 /**
618  * igb_configure - configure the hardware for RX and TX
619  * @adapter: private board structure
620  **/
621 static void igb_configure(struct igb_adapter *adapter)
622 {
623         struct net_device *netdev = adapter->netdev;
624         int i;
625
626         igb_get_hw_control(adapter);
627         igb_set_multi(netdev);
628
629         igb_restore_vlan(adapter);
630         igb_init_manageability(adapter);
631
632         igb_configure_tx(adapter);
633         igb_setup_rctl(adapter);
634         igb_configure_rx(adapter);
635         /* call IGB_DESC_UNUSED which always leaves
636          * at least 1 descriptor unused to make sure
637          * next_to_use != next_to_clean */
638         for (i = 0; i < adapter->num_rx_queues; i++) {
639                 struct igb_ring *ring = &adapter->rx_ring[i];
640                 igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring));
641         }
642
643
644         adapter->tx_queue_len = netdev->tx_queue_len;
645 }
646
647
648 /**
649  * igb_up - Open the interface and prepare it to handle traffic
650  * @adapter: board private structure
651  **/
652
653 int igb_up(struct igb_adapter *adapter)
654 {
655         struct e1000_hw *hw = &adapter->hw;
656         int i;
657
658         /* hardware has been reset, we need to reload some things */
659         igb_configure(adapter);
660
661         clear_bit(__IGB_DOWN, &adapter->state);
662
663         napi_enable(&adapter->napi);
664
665         if (adapter->msix_entries) {
666                 for (i = 0; i < adapter->num_rx_queues; i++)
667                         napi_enable(&adapter->rx_ring[i].napi);
668                 igb_configure_msix(adapter);
669         }
670
671         /* Clear any pending interrupts. */
672         rd32(E1000_ICR);
673         igb_irq_enable(adapter);
674
675         /* Fire a link change interrupt to start the watchdog. */
676         wr32(E1000_ICS, E1000_ICS_LSC);
677         return 0;
678 }
679
680 void igb_down(struct igb_adapter *adapter)
681 {
682         struct e1000_hw *hw = &adapter->hw;
683         struct net_device *netdev = adapter->netdev;
684         u32 tctl, rctl;
685         int i;
686
687         /* signal that we're down so the interrupt handler does not
688          * reschedule our watchdog timer */
689         set_bit(__IGB_DOWN, &adapter->state);
690
691         /* disable receives in the hardware */
692         rctl = rd32(E1000_RCTL);
693         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
694         /* flush and sleep below */
695
696         netif_stop_queue(netdev);
697
698         /* disable transmits in the hardware */
699         tctl = rd32(E1000_TCTL);
700         tctl &= ~E1000_TCTL_EN;
701         wr32(E1000_TCTL, tctl);
702         /* flush both disables and wait for them to finish */
703         wrfl();
704         msleep(10);
705
706         napi_disable(&adapter->napi);
707
708         if (adapter->msix_entries)
709                 for (i = 0; i < adapter->num_rx_queues; i++)
710                         napi_disable(&adapter->rx_ring[i].napi);
711         igb_irq_disable(adapter);
712
713         del_timer_sync(&adapter->watchdog_timer);
714         del_timer_sync(&adapter->phy_info_timer);
715
716         netdev->tx_queue_len = adapter->tx_queue_len;
717         netif_carrier_off(netdev);
718         adapter->link_speed = 0;
719         adapter->link_duplex = 0;
720
721         igb_reset(adapter);
722         igb_clean_all_tx_rings(adapter);
723         igb_clean_all_rx_rings(adapter);
724 }
725
726 void igb_reinit_locked(struct igb_adapter *adapter)
727 {
728         WARN_ON(in_interrupt());
729         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
730                 msleep(1);
731         igb_down(adapter);
732         igb_up(adapter);
733         clear_bit(__IGB_RESETTING, &adapter->state);
734 }
735
736 void igb_reset(struct igb_adapter *adapter)
737 {
738         struct e1000_hw *hw = &adapter->hw;
739         struct e1000_fc_info *fc = &adapter->hw.fc;
740         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
741         u16 hwm;
742
743         /* Repartition Pba for greater than 9k mtu
744          * To take effect CTRL.RST is required.
745          */
746         pba = E1000_PBA_34K;
747
748         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
749                 /* adjust PBA for jumbo frames */
750                 wr32(E1000_PBA, pba);
751
752                 /* To maintain wire speed transmits, the Tx FIFO should be
753                  * large enough to accommodate two full transmit packets,
754                  * rounded up to the next 1KB and expressed in KB.  Likewise,
755                  * the Rx FIFO should be large enough to accommodate at least
756                  * one full receive packet and is similarly rounded up and
757                  * expressed in KB. */
758                 pba = rd32(E1000_PBA);
759                 /* upper 16 bits has Tx packet buffer allocation size in KB */
760                 tx_space = pba >> 16;
761                 /* lower 16 bits has Rx packet buffer allocation size in KB */
762                 pba &= 0xffff;
763                 /* the tx fifo also stores 16 bytes of information about the tx
764                  * but don't include ethernet FCS because hardware appends it */
765                 min_tx_space = (adapter->max_frame_size +
766                                 sizeof(struct e1000_tx_desc) -
767                                 ETH_FCS_LEN) * 2;
768                 min_tx_space = ALIGN(min_tx_space, 1024);
769                 min_tx_space >>= 10;
770                 /* software strips receive CRC, so leave room for it */
771                 min_rx_space = adapter->max_frame_size;
772                 min_rx_space = ALIGN(min_rx_space, 1024);
773                 min_rx_space >>= 10;
774
775                 /* If current Tx allocation is less than the min Tx FIFO size,
776                  * and the min Tx FIFO size is less than the current Rx FIFO
777                  * allocation, take space away from current Rx allocation */
778                 if (tx_space < min_tx_space &&
779                     ((min_tx_space - tx_space) < pba)) {
780                         pba = pba - (min_tx_space - tx_space);
781
782                         /* if short on rx space, rx wins and must trump tx
783                          * adjustment */
784                         if (pba < min_rx_space)
785                                 pba = min_rx_space;
786                 }
787         }
788         wr32(E1000_PBA, pba);
789
790         /* flow control settings */
791         /* The high water mark must be low enough to fit one full frame
792          * (or the size used for early receive) above it in the Rx FIFO.
793          * Set it to the lower of:
794          * - 90% of the Rx FIFO size, or
795          * - the full Rx FIFO size minus one full frame */
796         hwm = min(((pba << 10) * 9 / 10),
797                   ((pba << 10) - adapter->max_frame_size));
798
799         fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
800         fc->low_water = fc->high_water - 8;
801         fc->pause_time = 0xFFFF;
802         fc->send_xon = 1;
803         fc->type = fc->original_type;
804
805         /* Allow time for pending master requests to run */
806         adapter->hw.mac.ops.reset_hw(&adapter->hw);
807         wr32(E1000_WUC, 0);
808
809         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
810                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
811
812         igb_update_mng_vlan(adapter);
813
814         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
815         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
816
817         igb_reset_adaptive(&adapter->hw);
818         if (adapter->hw.phy.ops.get_phy_info)
819                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
820 }
821
822 /**
823  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
824  * @pdev: PCI device information struct
825  *
826  * Returns true if an adapter needs ioport resources
827  **/
828 static int igb_is_need_ioport(struct pci_dev *pdev)
829 {
830         switch (pdev->device) {
831         /* Currently there are no adapters that need ioport resources */
832         default:
833                 return false;
834         }
835 }
836
837 /**
838  * igb_probe - Device Initialization Routine
839  * @pdev: PCI device information struct
840  * @ent: entry in igb_pci_tbl
841  *
842  * Returns 0 on success, negative on failure
843  *
844  * igb_probe initializes an adapter identified by a pci_dev structure.
845  * The OS initialization, configuring of the adapter private structure,
846  * and a hardware reset occur.
847  **/
848 static int __devinit igb_probe(struct pci_dev *pdev,
849                                const struct pci_device_id *ent)
850 {
851         struct net_device *netdev;
852         struct igb_adapter *adapter;
853         struct e1000_hw *hw;
854         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
855         unsigned long mmio_start, mmio_len;
856         static int cards_found;
857         int i, err, pci_using_dac;
858         u16 eeprom_data = 0;
859         u16 eeprom_apme_mask = IGB_EEPROM_APME;
860         u32 part_num;
861         int bars, need_ioport;
862
863         /* do not allocate ioport bars when not needed */
864         need_ioport = igb_is_need_ioport(pdev);
865         if (need_ioport) {
866                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
867                 err = pci_enable_device(pdev);
868         } else {
869                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
870                 err = pci_enable_device_mem(pdev);
871         }
872         if (err)
873                 return err;
874
875         pci_using_dac = 0;
876         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
877         if (!err) {
878                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
879                 if (!err)
880                         pci_using_dac = 1;
881         } else {
882                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
883                 if (err) {
884                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
885                         if (err) {
886                                 dev_err(&pdev->dev, "No usable DMA "
887                                         "configuration, aborting\n");
888                                 goto err_dma;
889                         }
890                 }
891         }
892
893         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
894         if (err)
895                 goto err_pci_reg;
896
897         pci_set_master(pdev);
898         pci_save_state(pdev);
899
900         err = -ENOMEM;
901         netdev = alloc_etherdev(sizeof(struct igb_adapter));
902         if (!netdev)
903                 goto err_alloc_etherdev;
904
905         SET_NETDEV_DEV(netdev, &pdev->dev);
906
907         pci_set_drvdata(pdev, netdev);
908         adapter = netdev_priv(netdev);
909         adapter->netdev = netdev;
910         adapter->pdev = pdev;
911         hw = &adapter->hw;
912         hw->back = adapter;
913         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
914         adapter->bars = bars;
915         adapter->need_ioport = need_ioport;
916
917         mmio_start = pci_resource_start(pdev, 0);
918         mmio_len = pci_resource_len(pdev, 0);
919
920         err = -EIO;
921         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
922         if (!adapter->hw.hw_addr)
923                 goto err_ioremap;
924
925         netdev->open = &igb_open;
926         netdev->stop = &igb_close;
927         netdev->get_stats = &igb_get_stats;
928         netdev->set_multicast_list = &igb_set_multi;
929         netdev->set_mac_address = &igb_set_mac;
930         netdev->change_mtu = &igb_change_mtu;
931         netdev->do_ioctl = &igb_ioctl;
932         igb_set_ethtool_ops(netdev);
933         netdev->tx_timeout = &igb_tx_timeout;
934         netdev->watchdog_timeo = 5 * HZ;
935         netif_napi_add(netdev, &adapter->napi, igb_clean, 64);
936         netdev->vlan_rx_register = igb_vlan_rx_register;
937         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
938         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
939 #ifdef CONFIG_NET_POLL_CONTROLLER
940         netdev->poll_controller = igb_netpoll;
941 #endif
942         netdev->hard_start_xmit = &igb_xmit_frame_adv;
943
944         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
945
946         netdev->mem_start = mmio_start;
947         netdev->mem_end = mmio_start + mmio_len;
948
949         adapter->bd_number = cards_found;
950
951         /* PCI config space info */
952         hw->vendor_id = pdev->vendor;
953         hw->device_id = pdev->device;
954         hw->revision_id = pdev->revision;
955         hw->subsystem_vendor_id = pdev->subsystem_vendor;
956         hw->subsystem_device_id = pdev->subsystem_device;
957
958         /* setup the private structure */
959         hw->back = adapter;
960         /* Copy the default MAC, PHY and NVM function pointers */
961         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
962         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
963         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
964         /* Initialize skew-specific constants */
965         err = ei->get_invariants(hw);
966         if (err)
967                 goto err_hw_init;
968
969         err = igb_sw_init(adapter);
970         if (err)
971                 goto err_sw_init;
972
973         igb_get_bus_info_pcie(hw);
974
975         hw->phy.autoneg_wait_to_complete = false;
976         hw->mac.adaptive_ifs = true;
977
978         /* Copper options */
979         if (hw->phy.media_type == e1000_media_type_copper) {
980                 hw->phy.mdix = AUTO_ALL_MODES;
981                 hw->phy.disable_polarity_correction = false;
982                 hw->phy.ms_type = e1000_ms_hw_default;
983         }
984
985         if (igb_check_reset_block(hw))
986                 dev_info(&pdev->dev,
987                         "PHY reset is blocked due to SOL/IDER session.\n");
988
989         netdev->features = NETIF_F_SG |
990                            NETIF_F_HW_CSUM |
991                            NETIF_F_HW_VLAN_TX |
992                            NETIF_F_HW_VLAN_RX |
993                            NETIF_F_HW_VLAN_FILTER;
994
995         netdev->features |= NETIF_F_TSO;
996         netdev->features |= NETIF_F_TSO6;
997
998         netdev->vlan_features |= NETIF_F_TSO;
999         netdev->vlan_features |= NETIF_F_TSO6;
1000         netdev->vlan_features |= NETIF_F_HW_CSUM;
1001         netdev->vlan_features |= NETIF_F_SG;
1002
1003         if (pci_using_dac)
1004                 netdev->features |= NETIF_F_HIGHDMA;
1005
1006         netdev->features |= NETIF_F_LLTX;
1007         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1008
1009         /* before reading the NVM, reset the controller to put the device in a
1010          * known good starting state */
1011         hw->mac.ops.reset_hw(hw);
1012
1013         /* make sure the NVM is good */
1014         if (igb_validate_nvm_checksum(hw) < 0) {
1015                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1016                 err = -EIO;
1017                 goto err_eeprom;
1018         }
1019
1020         /* copy the MAC address out of the NVM */
1021         if (hw->mac.ops.read_mac_addr(hw))
1022                 dev_err(&pdev->dev, "NVM Read Error\n");
1023
1024         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1025         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1026
1027         if (!is_valid_ether_addr(netdev->perm_addr)) {
1028                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1029                 err = -EIO;
1030                 goto err_eeprom;
1031         }
1032
1033         init_timer(&adapter->watchdog_timer);
1034         adapter->watchdog_timer.function = &igb_watchdog;
1035         adapter->watchdog_timer.data = (unsigned long) adapter;
1036
1037         init_timer(&adapter->phy_info_timer);
1038         adapter->phy_info_timer.function = &igb_update_phy_info;
1039         adapter->phy_info_timer.data = (unsigned long) adapter;
1040
1041         INIT_WORK(&adapter->reset_task, igb_reset_task);
1042         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1043
1044         /* Initialize link & ring properties that are user-changeable */
1045         adapter->tx_ring->count = 256;
1046         for (i = 0; i < adapter->num_tx_queues; i++)
1047                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1048         adapter->rx_ring->count = 256;
1049         for (i = 0; i < adapter->num_rx_queues; i++)
1050                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1051
1052         adapter->fc_autoneg = true;
1053         hw->mac.autoneg = true;
1054         hw->phy.autoneg_advertised = 0x2f;
1055
1056         hw->fc.original_type = e1000_fc_default;
1057         hw->fc.type = e1000_fc_default;
1058
1059         adapter->itr_setting = 3;
1060         adapter->itr = IGB_START_ITR;
1061
1062         igb_validate_mdi_setting(hw);
1063
1064         adapter->rx_csum = 1;
1065
1066         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1067          * enable the ACPI Magic Packet filter
1068          */
1069
1070         if (hw->bus.func == 0 ||
1071             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1072                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1073                                      &eeprom_data);
1074
1075         if (eeprom_data & eeprom_apme_mask)
1076                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1077
1078         /* now that we have the eeprom settings, apply the special cases where
1079          * the eeprom may be wrong or the board simply won't support wake on
1080          * lan on a particular port */
1081         switch (pdev->device) {
1082         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1083                 adapter->eeprom_wol = 0;
1084                 break;
1085         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1086                 /* Wake events only supported on port A for dual fiber
1087                  * regardless of eeprom setting */
1088                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1089                         adapter->eeprom_wol = 0;
1090                 break;
1091         }
1092
1093         /* initialize the wol settings based on the eeprom settings */
1094         adapter->wol = adapter->eeprom_wol;
1095
1096         /* reset the hardware with the new settings */
1097         igb_reset(adapter);
1098
1099         /* let the f/w know that the h/w is now under the control of the
1100          * driver. */
1101         igb_get_hw_control(adapter);
1102
1103         /* tell the stack to leave us alone until igb_open() is called */
1104         netif_carrier_off(netdev);
1105         netif_stop_queue(netdev);
1106
1107         strcpy(netdev->name, "eth%d");
1108         err = register_netdev(netdev);
1109         if (err)
1110                 goto err_register;
1111
1112         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1113         /* print bus type/speed/width info */
1114         dev_info(&pdev->dev,
1115                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1116                  netdev->name,
1117                  ((hw->bus.speed == e1000_bus_speed_2500)
1118                   ? "2.5Gb/s" : "unknown"),
1119                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1120                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1121                   ? "Width x1" : "unknown"),
1122                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1123                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1124
1125         igb_read_part_num(hw, &part_num);
1126         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1127                 (part_num >> 8), (part_num & 0xff));
1128
1129         dev_info(&pdev->dev,
1130                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1131                 adapter->msix_entries ? "MSI-X" :
1132                 adapter->msi_enabled ? "MSI" : "legacy",
1133                 adapter->num_rx_queues, adapter->num_tx_queues);
1134
1135         cards_found++;
1136         return 0;
1137
1138 err_register:
1139         igb_release_hw_control(adapter);
1140 err_eeprom:
1141         if (!igb_check_reset_block(hw))
1142                 hw->phy.ops.reset_phy(hw);
1143
1144         if (hw->flash_address)
1145                 iounmap(hw->flash_address);
1146
1147         igb_remove_device(hw);
1148         kfree(adapter->tx_ring);
1149         kfree(adapter->rx_ring);
1150 err_sw_init:
1151 err_hw_init:
1152         iounmap(hw->hw_addr);
1153 err_ioremap:
1154         free_netdev(netdev);
1155 err_alloc_etherdev:
1156         pci_release_selected_regions(pdev, bars);
1157 err_pci_reg:
1158 err_dma:
1159         pci_disable_device(pdev);
1160         return err;
1161 }
1162
1163 /**
1164  * igb_remove - Device Removal Routine
1165  * @pdev: PCI device information struct
1166  *
1167  * igb_remove is called by the PCI subsystem to alert the driver
1168  * that it should release a PCI device.  The could be caused by a
1169  * Hot-Plug event, or because the driver is going to be removed from
1170  * memory.
1171  **/
1172 static void __devexit igb_remove(struct pci_dev *pdev)
1173 {
1174         struct net_device *netdev = pci_get_drvdata(pdev);
1175         struct igb_adapter *adapter = netdev_priv(netdev);
1176
1177         /* flush_scheduled work may reschedule our watchdog task, so
1178          * explicitly disable watchdog tasks from being rescheduled  */
1179         set_bit(__IGB_DOWN, &adapter->state);
1180         del_timer_sync(&adapter->watchdog_timer);
1181         del_timer_sync(&adapter->phy_info_timer);
1182
1183         flush_scheduled_work();
1184
1185         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1186          * would have already happened in close and is redundant. */
1187         igb_release_hw_control(adapter);
1188
1189         unregister_netdev(netdev);
1190
1191         if (!igb_check_reset_block(&adapter->hw))
1192                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1193
1194         igb_remove_device(&adapter->hw);
1195         igb_reset_interrupt_capability(adapter);
1196
1197         kfree(adapter->tx_ring);
1198         kfree(adapter->rx_ring);
1199
1200         iounmap(adapter->hw.hw_addr);
1201         if (adapter->hw.flash_address)
1202                 iounmap(adapter->hw.flash_address);
1203         pci_release_selected_regions(pdev, adapter->bars);
1204
1205         free_netdev(netdev);
1206
1207         pci_disable_device(pdev);
1208 }
1209
1210 /**
1211  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1212  * @adapter: board private structure to initialize
1213  *
1214  * igb_sw_init initializes the Adapter private data structure.
1215  * Fields are initialized based on PCI device information and
1216  * OS network device settings (MTU size).
1217  **/
1218 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1219 {
1220         struct e1000_hw *hw = &adapter->hw;
1221         struct net_device *netdev = adapter->netdev;
1222         struct pci_dev *pdev = adapter->pdev;
1223
1224         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1225
1226         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1227         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1228         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1229         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1230
1231         /* Number of supported queues. */
1232         /* Having more queues than CPUs doesn't make sense. */
1233         adapter->num_tx_queues = 1;
1234         adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus());
1235
1236         igb_set_interrupt_capability(adapter);
1237
1238         if (igb_alloc_queues(adapter)) {
1239                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1240                 return -ENOMEM;
1241         }
1242
1243         /* Explicitly disable IRQ since the NIC can be in any state. */
1244         igb_irq_disable(adapter);
1245
1246         set_bit(__IGB_DOWN, &adapter->state);
1247         return 0;
1248 }
1249
1250 /**
1251  * igb_open - Called when a network interface is made active
1252  * @netdev: network interface device structure
1253  *
1254  * Returns 0 on success, negative value on failure
1255  *
1256  * The open entry point is called when a network interface is made
1257  * active by the system (IFF_UP).  At this point all resources needed
1258  * for transmit and receive operations are allocated, the interrupt
1259  * handler is registered with the OS, the watchdog timer is started,
1260  * and the stack is notified that the interface is ready.
1261  **/
1262 static int igb_open(struct net_device *netdev)
1263 {
1264         struct igb_adapter *adapter = netdev_priv(netdev);
1265         struct e1000_hw *hw = &adapter->hw;
1266         int err;
1267         int i;
1268
1269         /* disallow open during test */
1270         if (test_bit(__IGB_TESTING, &adapter->state))
1271                 return -EBUSY;
1272
1273         /* allocate transmit descriptors */
1274         err = igb_setup_all_tx_resources(adapter);
1275         if (err)
1276                 goto err_setup_tx;
1277
1278         /* allocate receive descriptors */
1279         err = igb_setup_all_rx_resources(adapter);
1280         if (err)
1281                 goto err_setup_rx;
1282
1283         /* e1000_power_up_phy(adapter); */
1284
1285         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1286         if ((adapter->hw.mng_cookie.status &
1287              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1288                 igb_update_mng_vlan(adapter);
1289
1290         /* before we allocate an interrupt, we must be ready to handle it.
1291          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1292          * as soon as we call pci_request_irq, so we have to setup our
1293          * clean_rx handler before we do so.  */
1294         igb_configure(adapter);
1295
1296         err = igb_request_irq(adapter);
1297         if (err)
1298                 goto err_req_irq;
1299
1300         /* From here on the code is the same as igb_up() */
1301         clear_bit(__IGB_DOWN, &adapter->state);
1302
1303         napi_enable(&adapter->napi);
1304         if (adapter->msix_entries)
1305                 for (i = 0; i < adapter->num_rx_queues; i++)
1306                         napi_enable(&adapter->rx_ring[i].napi);
1307
1308         igb_irq_enable(adapter);
1309
1310         /* Clear any pending interrupts. */
1311         rd32(E1000_ICR);
1312         /* Fire a link status change interrupt to start the watchdog. */
1313         wr32(E1000_ICS, E1000_ICS_LSC);
1314
1315         return 0;
1316
1317 err_req_irq:
1318         igb_release_hw_control(adapter);
1319         /* e1000_power_down_phy(adapter); */
1320         igb_free_all_rx_resources(adapter);
1321 err_setup_rx:
1322         igb_free_all_tx_resources(adapter);
1323 err_setup_tx:
1324         igb_reset(adapter);
1325
1326         return err;
1327 }
1328
1329 /**
1330  * igb_close - Disables a network interface
1331  * @netdev: network interface device structure
1332  *
1333  * Returns 0, this is not allowed to fail
1334  *
1335  * The close entry point is called when an interface is de-activated
1336  * by the OS.  The hardware is still under the driver's control, but
1337  * needs to be disabled.  A global MAC reset is issued to stop the
1338  * hardware, and all transmit and receive resources are freed.
1339  **/
1340 static int igb_close(struct net_device *netdev)
1341 {
1342         struct igb_adapter *adapter = netdev_priv(netdev);
1343
1344         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1345         igb_down(adapter);
1346
1347         igb_free_irq(adapter);
1348
1349         igb_free_all_tx_resources(adapter);
1350         igb_free_all_rx_resources(adapter);
1351
1352         /* kill manageability vlan ID if supported, but not if a vlan with
1353          * the same ID is registered on the host OS (let 8021q kill it) */
1354         if ((adapter->hw.mng_cookie.status &
1355                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1356              !(adapter->vlgrp &&
1357                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1358                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1359
1360         return 0;
1361 }
1362
1363 /**
1364  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1365  * @adapter: board private structure
1366  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1367  *
1368  * Return 0 on success, negative on failure
1369  **/
1370
1371 int igb_setup_tx_resources(struct igb_adapter *adapter,
1372                            struct igb_ring *tx_ring)
1373 {
1374         struct pci_dev *pdev = adapter->pdev;
1375         int size;
1376
1377         size = sizeof(struct igb_buffer) * tx_ring->count;
1378         tx_ring->buffer_info = vmalloc(size);
1379         if (!tx_ring->buffer_info)
1380                 goto err;
1381         memset(tx_ring->buffer_info, 0, size);
1382
1383         /* round up to nearest 4K */
1384         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1385                         + sizeof(u32);
1386         tx_ring->size = ALIGN(tx_ring->size, 4096);
1387
1388         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1389                                              &tx_ring->dma);
1390
1391         if (!tx_ring->desc)
1392                 goto err;
1393
1394         tx_ring->adapter = adapter;
1395         tx_ring->next_to_use = 0;
1396         tx_ring->next_to_clean = 0;
1397         spin_lock_init(&tx_ring->tx_clean_lock);
1398         spin_lock_init(&tx_ring->tx_lock);
1399         return 0;
1400
1401 err:
1402         vfree(tx_ring->buffer_info);
1403         dev_err(&adapter->pdev->dev,
1404                 "Unable to allocate memory for the transmit descriptor ring\n");
1405         return -ENOMEM;
1406 }
1407
1408 /**
1409  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1410  *                                (Descriptors) for all queues
1411  * @adapter: board private structure
1412  *
1413  * Return 0 on success, negative on failure
1414  **/
1415 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1416 {
1417         int i, err = 0;
1418
1419         for (i = 0; i < adapter->num_tx_queues; i++) {
1420                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1421                 if (err) {
1422                         dev_err(&adapter->pdev->dev,
1423                                 "Allocation for Tx Queue %u failed\n", i);
1424                         for (i--; i >= 0; i--)
1425                                 igb_free_tx_resources(adapter,
1426                                                         &adapter->tx_ring[i]);
1427                         break;
1428                 }
1429         }
1430
1431         return err;
1432 }
1433
1434 /**
1435  * igb_configure_tx - Configure transmit Unit after Reset
1436  * @adapter: board private structure
1437  *
1438  * Configure the Tx unit of the MAC after a reset.
1439  **/
1440 static void igb_configure_tx(struct igb_adapter *adapter)
1441 {
1442         u64 tdba, tdwba;
1443         struct e1000_hw *hw = &adapter->hw;
1444         u32 tctl;
1445         u32 txdctl, txctrl;
1446         int i;
1447
1448         for (i = 0; i < adapter->num_tx_queues; i++) {
1449                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1450
1451                 wr32(E1000_TDLEN(i),
1452                                 ring->count * sizeof(struct e1000_tx_desc));
1453                 tdba = ring->dma;
1454                 wr32(E1000_TDBAL(i),
1455                                 tdba & 0x00000000ffffffffULL);
1456                 wr32(E1000_TDBAH(i), tdba >> 32);
1457
1458                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1459                 tdwba |= 1; /* enable head wb */
1460                 wr32(E1000_TDWBAL(i),
1461                                 tdwba & 0x00000000ffffffffULL);
1462                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1463
1464                 ring->head = E1000_TDH(i);
1465                 ring->tail = E1000_TDT(i);
1466                 writel(0, hw->hw_addr + ring->tail);
1467                 writel(0, hw->hw_addr + ring->head);
1468                 txdctl = rd32(E1000_TXDCTL(i));
1469                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1470                 wr32(E1000_TXDCTL(i), txdctl);
1471
1472                 /* Turn off Relaxed Ordering on head write-backs.  The
1473                  * writebacks MUST be delivered in order or it will
1474                  * completely screw up our bookeeping.
1475                  */
1476                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1477                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1478                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1479         }
1480
1481
1482
1483         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1484
1485         /* Program the Transmit Control Register */
1486
1487         tctl = rd32(E1000_TCTL);
1488         tctl &= ~E1000_TCTL_CT;
1489         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1490                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1491
1492         igb_config_collision_dist(hw);
1493
1494         /* Setup Transmit Descriptor Settings for eop descriptor */
1495         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1496
1497         /* Enable transmits */
1498         tctl |= E1000_TCTL_EN;
1499
1500         wr32(E1000_TCTL, tctl);
1501 }
1502
1503 /**
1504  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1505  * @adapter: board private structure
1506  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1507  *
1508  * Returns 0 on success, negative on failure
1509  **/
1510
1511 int igb_setup_rx_resources(struct igb_adapter *adapter,
1512                            struct igb_ring *rx_ring)
1513 {
1514         struct pci_dev *pdev = adapter->pdev;
1515         int size, desc_len;
1516
1517         size = sizeof(struct igb_buffer) * rx_ring->count;
1518         rx_ring->buffer_info = vmalloc(size);
1519         if (!rx_ring->buffer_info)
1520                 goto err;
1521         memset(rx_ring->buffer_info, 0, size);
1522
1523         desc_len = sizeof(union e1000_adv_rx_desc);
1524
1525         /* Round up to nearest 4K */
1526         rx_ring->size = rx_ring->count * desc_len;
1527         rx_ring->size = ALIGN(rx_ring->size, 4096);
1528
1529         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1530                                              &rx_ring->dma);
1531
1532         if (!rx_ring->desc)
1533                 goto err;
1534
1535         rx_ring->next_to_clean = 0;
1536         rx_ring->next_to_use = 0;
1537         rx_ring->pending_skb = NULL;
1538
1539         rx_ring->adapter = adapter;
1540         /* FIXME: do we want to setup ring->napi->poll here? */
1541         rx_ring->napi.poll = adapter->napi.poll;
1542
1543         return 0;
1544
1545 err:
1546         vfree(rx_ring->buffer_info);
1547         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1548                 "the receive descriptor ring\n");
1549         return -ENOMEM;
1550 }
1551
1552 /**
1553  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1554  *                                (Descriptors) for all queues
1555  * @adapter: board private structure
1556  *
1557  * Return 0 on success, negative on failure
1558  **/
1559 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1560 {
1561         int i, err = 0;
1562
1563         for (i = 0; i < adapter->num_rx_queues; i++) {
1564                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1565                 if (err) {
1566                         dev_err(&adapter->pdev->dev,
1567                                 "Allocation for Rx Queue %u failed\n", i);
1568                         for (i--; i >= 0; i--)
1569                                 igb_free_rx_resources(adapter,
1570                                                         &adapter->rx_ring[i]);
1571                         break;
1572                 }
1573         }
1574
1575         return err;
1576 }
1577
1578 /**
1579  * igb_setup_rctl - configure the receive control registers
1580  * @adapter: Board private structure
1581  **/
1582 static void igb_setup_rctl(struct igb_adapter *adapter)
1583 {
1584         struct e1000_hw *hw = &adapter->hw;
1585         u32 rctl;
1586         u32 srrctl = 0;
1587         int i;
1588
1589         rctl = rd32(E1000_RCTL);
1590
1591         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1592
1593         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1594                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1595                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1596
1597         /* disable the stripping of CRC because it breaks
1598          * BMC firmware connected over SMBUS
1599         rctl |= E1000_RCTL_SECRC;
1600         */
1601
1602         rctl &= ~E1000_RCTL_SBP;
1603
1604         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1605                 rctl &= ~E1000_RCTL_LPE;
1606         else
1607                 rctl |= E1000_RCTL_LPE;
1608         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1609                 /* Setup buffer sizes */
1610                 rctl &= ~E1000_RCTL_SZ_4096;
1611                 rctl |= E1000_RCTL_BSEX;
1612                 switch (adapter->rx_buffer_len) {
1613                 case IGB_RXBUFFER_256:
1614                         rctl |= E1000_RCTL_SZ_256;
1615                         rctl &= ~E1000_RCTL_BSEX;
1616                         break;
1617                 case IGB_RXBUFFER_512:
1618                         rctl |= E1000_RCTL_SZ_512;
1619                         rctl &= ~E1000_RCTL_BSEX;
1620                         break;
1621                 case IGB_RXBUFFER_1024:
1622                         rctl |= E1000_RCTL_SZ_1024;
1623                         rctl &= ~E1000_RCTL_BSEX;
1624                         break;
1625                 case IGB_RXBUFFER_2048:
1626                 default:
1627                         rctl |= E1000_RCTL_SZ_2048;
1628                         rctl &= ~E1000_RCTL_BSEX;
1629                         break;
1630                 case IGB_RXBUFFER_4096:
1631                         rctl |= E1000_RCTL_SZ_4096;
1632                         break;
1633                 case IGB_RXBUFFER_8192:
1634                         rctl |= E1000_RCTL_SZ_8192;
1635                         break;
1636                 case IGB_RXBUFFER_16384:
1637                         rctl |= E1000_RCTL_SZ_16384;
1638                         break;
1639                 }
1640         } else {
1641                 rctl &= ~E1000_RCTL_BSEX;
1642                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1643         }
1644
1645         /* 82575 and greater support packet-split where the protocol
1646          * header is placed in skb->data and the packet data is
1647          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1648          * In the case of a non-split, skb->data is linearly filled,
1649          * followed by the page buffers.  Therefore, skb->data is
1650          * sized to hold the largest protocol header.
1651          */
1652         /* allocations using alloc_page take too long for regular MTU
1653          * so only enable packet split for jumbo frames */
1654         if (rctl & E1000_RCTL_LPE) {
1655                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1656                 srrctl = adapter->rx_ps_hdr_size <<
1657                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1658                 /* buffer size is ALWAYS one page */
1659                 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1660                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1661         } else {
1662                 adapter->rx_ps_hdr_size = 0;
1663                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1664         }
1665
1666         for (i = 0; i < adapter->num_rx_queues; i++)
1667                 wr32(E1000_SRRCTL(i), srrctl);
1668
1669         wr32(E1000_RCTL, rctl);
1670 }
1671
1672 /**
1673  * igb_configure_rx - Configure receive Unit after Reset
1674  * @adapter: board private structure
1675  *
1676  * Configure the Rx unit of the MAC after a reset.
1677  **/
1678 static void igb_configure_rx(struct igb_adapter *adapter)
1679 {
1680         u64 rdba;
1681         struct e1000_hw *hw = &adapter->hw;
1682         u32 rctl, rxcsum;
1683         u32 rxdctl;
1684         int i;
1685
1686         /* disable receives while setting up the descriptors */
1687         rctl = rd32(E1000_RCTL);
1688         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1689         wrfl();
1690         mdelay(10);
1691
1692         if (adapter->itr_setting > 3)
1693                 wr32(E1000_ITR,
1694                                 1000000000 / (adapter->itr * 256));
1695
1696         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1697          * the Base and Length of the Rx Descriptor Ring */
1698         for (i = 0; i < adapter->num_rx_queues; i++) {
1699                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1700                 rdba = ring->dma;
1701                 wr32(E1000_RDBAL(i),
1702                                 rdba & 0x00000000ffffffffULL);
1703                 wr32(E1000_RDBAH(i), rdba >> 32);
1704                 wr32(E1000_RDLEN(i),
1705                                ring->count * sizeof(union e1000_adv_rx_desc));
1706
1707                 ring->head = E1000_RDH(i);
1708                 ring->tail = E1000_RDT(i);
1709                 writel(0, hw->hw_addr + ring->tail);
1710                 writel(0, hw->hw_addr + ring->head);
1711
1712                 rxdctl = rd32(E1000_RXDCTL(i));
1713                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1714                 rxdctl &= 0xFFF00000;
1715                 rxdctl |= IGB_RX_PTHRESH;
1716                 rxdctl |= IGB_RX_HTHRESH << 8;
1717                 rxdctl |= IGB_RX_WTHRESH << 16;
1718                 wr32(E1000_RXDCTL(i), rxdctl);
1719         }
1720
1721         if (adapter->num_rx_queues > 1) {
1722                 u32 random[10];
1723                 u32 mrqc;
1724                 u32 j, shift;
1725                 union e1000_reta {
1726                         u32 dword;
1727                         u8  bytes[4];
1728                 } reta;
1729
1730                 get_random_bytes(&random[0], 40);
1731
1732                 shift = 6;
1733                 for (j = 0; j < (32 * 4); j++) {
1734                         reta.bytes[j & 3] =
1735                                 (j % adapter->num_rx_queues) << shift;
1736                         if ((j & 3) == 3)
1737                                 writel(reta.dword,
1738                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1739                 }
1740                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1741
1742                 /* Fill out hash function seeds */
1743                 for (j = 0; j < 10; j++)
1744                         array_wr32(E1000_RSSRK(0), j, random[j]);
1745
1746                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1747                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1748                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1749                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1750                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1751                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1752                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1753                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1754
1755
1756                 wr32(E1000_MRQC, mrqc);
1757
1758                 /* Multiqueue and raw packet checksumming are mutually
1759                  * exclusive.  Note that this not the same as TCP/IP
1760                  * checksumming, which works fine. */
1761                 rxcsum = rd32(E1000_RXCSUM);
1762                 rxcsum |= E1000_RXCSUM_PCSD;
1763                 wr32(E1000_RXCSUM, rxcsum);
1764         } else {
1765                 /* Enable Receive Checksum Offload for TCP and UDP */
1766                 rxcsum = rd32(E1000_RXCSUM);
1767                 if (adapter->rx_csum) {
1768                         rxcsum |= E1000_RXCSUM_TUOFL;
1769
1770                         /* Enable IPv4 payload checksum for UDP fragments
1771                          * Must be used in conjunction with packet-split. */
1772                         if (adapter->rx_ps_hdr_size)
1773                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1774                 } else {
1775                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1776                         /* don't need to clear IPPCSE as it defaults to 0 */
1777                 }
1778                 wr32(E1000_RXCSUM, rxcsum);
1779         }
1780
1781         if (adapter->vlgrp)
1782                 wr32(E1000_RLPML,
1783                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1784         else
1785                 wr32(E1000_RLPML, adapter->max_frame_size);
1786
1787         /* Enable Receives */
1788         wr32(E1000_RCTL, rctl);
1789 }
1790
1791 /**
1792  * igb_free_tx_resources - Free Tx Resources per Queue
1793  * @adapter: board private structure
1794  * @tx_ring: Tx descriptor ring for a specific queue
1795  *
1796  * Free all transmit software resources
1797  **/
1798 static void igb_free_tx_resources(struct igb_adapter *adapter,
1799                                   struct igb_ring *tx_ring)
1800 {
1801         struct pci_dev *pdev = adapter->pdev;
1802
1803         igb_clean_tx_ring(adapter, tx_ring);
1804
1805         vfree(tx_ring->buffer_info);
1806         tx_ring->buffer_info = NULL;
1807
1808         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1809
1810         tx_ring->desc = NULL;
1811 }
1812
1813 /**
1814  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1815  * @adapter: board private structure
1816  *
1817  * Free all transmit software resources
1818  **/
1819 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1820 {
1821         int i;
1822
1823         for (i = 0; i < adapter->num_tx_queues; i++)
1824                 igb_free_tx_resources(adapter, &adapter->tx_ring[i]);
1825 }
1826
1827 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1828                                            struct igb_buffer *buffer_info)
1829 {
1830         if (buffer_info->dma) {
1831                 pci_unmap_page(adapter->pdev,
1832                                 buffer_info->dma,
1833                                 buffer_info->length,
1834                                 PCI_DMA_TODEVICE);
1835                 buffer_info->dma = 0;
1836         }
1837         if (buffer_info->skb) {
1838                 dev_kfree_skb_any(buffer_info->skb);
1839                 buffer_info->skb = NULL;
1840         }
1841         buffer_info->time_stamp = 0;
1842         /* buffer_info must be completely set up in the transmit path */
1843 }
1844
1845 /**
1846  * igb_clean_tx_ring - Free Tx Buffers
1847  * @adapter: board private structure
1848  * @tx_ring: ring to be cleaned
1849  **/
1850 static void igb_clean_tx_ring(struct igb_adapter *adapter,
1851                               struct igb_ring *tx_ring)
1852 {
1853         struct igb_buffer *buffer_info;
1854         unsigned long size;
1855         unsigned int i;
1856
1857         if (!tx_ring->buffer_info)
1858                 return;
1859         /* Free all the Tx ring sk_buffs */
1860
1861         for (i = 0; i < tx_ring->count; i++) {
1862                 buffer_info = &tx_ring->buffer_info[i];
1863                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1864         }
1865
1866         size = sizeof(struct igb_buffer) * tx_ring->count;
1867         memset(tx_ring->buffer_info, 0, size);
1868
1869         /* Zero out the descriptor ring */
1870
1871         memset(tx_ring->desc, 0, tx_ring->size);
1872
1873         tx_ring->next_to_use = 0;
1874         tx_ring->next_to_clean = 0;
1875
1876         writel(0, adapter->hw.hw_addr + tx_ring->head);
1877         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1878 }
1879
1880 /**
1881  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1882  * @adapter: board private structure
1883  **/
1884 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1885 {
1886         int i;
1887
1888         for (i = 0; i < adapter->num_tx_queues; i++)
1889                 igb_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1890 }
1891
1892 /**
1893  * igb_free_rx_resources - Free Rx Resources
1894  * @adapter: board private structure
1895  * @rx_ring: ring to clean the resources from
1896  *
1897  * Free all receive software resources
1898  **/
1899 static void igb_free_rx_resources(struct igb_adapter *adapter,
1900                                   struct igb_ring *rx_ring)
1901 {
1902         struct pci_dev *pdev = adapter->pdev;
1903
1904         igb_clean_rx_ring(adapter, rx_ring);
1905
1906         vfree(rx_ring->buffer_info);
1907         rx_ring->buffer_info = NULL;
1908
1909         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1910
1911         rx_ring->desc = NULL;
1912 }
1913
1914 /**
1915  * igb_free_all_rx_resources - Free Rx Resources for All Queues
1916  * @adapter: board private structure
1917  *
1918  * Free all receive software resources
1919  **/
1920 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1921 {
1922         int i;
1923
1924         for (i = 0; i < adapter->num_rx_queues; i++)
1925                 igb_free_rx_resources(adapter, &adapter->rx_ring[i]);
1926 }
1927
1928 /**
1929  * igb_clean_rx_ring - Free Rx Buffers per Queue
1930  * @adapter: board private structure
1931  * @rx_ring: ring to free buffers from
1932  **/
1933 static void igb_clean_rx_ring(struct igb_adapter *adapter,
1934                               struct igb_ring *rx_ring)
1935 {
1936         struct igb_buffer *buffer_info;
1937         struct pci_dev *pdev = adapter->pdev;
1938         unsigned long size;
1939         unsigned int i;
1940
1941         if (!rx_ring->buffer_info)
1942                 return;
1943         /* Free all the Rx ring sk_buffs */
1944         for (i = 0; i < rx_ring->count; i++) {
1945                 buffer_info = &rx_ring->buffer_info[i];
1946                 if (buffer_info->dma) {
1947                         if (adapter->rx_ps_hdr_size)
1948                                 pci_unmap_single(pdev, buffer_info->dma,
1949                                                  adapter->rx_ps_hdr_size,
1950                                                  PCI_DMA_FROMDEVICE);
1951                         else
1952                                 pci_unmap_single(pdev, buffer_info->dma,
1953                                                  adapter->rx_buffer_len,
1954                                                  PCI_DMA_FROMDEVICE);
1955                         buffer_info->dma = 0;
1956                 }
1957
1958                 if (buffer_info->skb) {
1959                         dev_kfree_skb(buffer_info->skb);
1960                         buffer_info->skb = NULL;
1961                 }
1962                 if (buffer_info->page) {
1963                         pci_unmap_page(pdev, buffer_info->page_dma,
1964                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
1965                         put_page(buffer_info->page);
1966                         buffer_info->page = NULL;
1967                         buffer_info->page_dma = 0;
1968                 }
1969         }
1970
1971         /* there also may be some cached data from a chained receive */
1972         if (rx_ring->pending_skb) {
1973                 dev_kfree_skb(rx_ring->pending_skb);
1974                 rx_ring->pending_skb = NULL;
1975         }
1976
1977         size = sizeof(struct igb_buffer) * rx_ring->count;
1978         memset(rx_ring->buffer_info, 0, size);
1979
1980         /* Zero out the descriptor ring */
1981         memset(rx_ring->desc, 0, rx_ring->size);
1982
1983         rx_ring->next_to_clean = 0;
1984         rx_ring->next_to_use = 0;
1985
1986         writel(0, adapter->hw.hw_addr + rx_ring->head);
1987         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1988 }
1989
1990 /**
1991  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
1992  * @adapter: board private structure
1993  **/
1994 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
1995 {
1996         int i;
1997
1998         for (i = 0; i < adapter->num_rx_queues; i++)
1999                 igb_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2000 }
2001
2002 /**
2003  * igb_set_mac - Change the Ethernet Address of the NIC
2004  * @netdev: network interface device structure
2005  * @p: pointer to an address structure
2006  *
2007  * Returns 0 on success, negative on failure
2008  **/
2009 static int igb_set_mac(struct net_device *netdev, void *p)
2010 {
2011         struct igb_adapter *adapter = netdev_priv(netdev);
2012         struct sockaddr *addr = p;
2013
2014         if (!is_valid_ether_addr(addr->sa_data))
2015                 return -EADDRNOTAVAIL;
2016
2017         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2018         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2019
2020         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2021
2022         return 0;
2023 }
2024
2025 /**
2026  * igb_set_multi - Multicast and Promiscuous mode set
2027  * @netdev: network interface device structure
2028  *
2029  * The set_multi entry point is called whenever the multicast address
2030  * list or the network interface flags are updated.  This routine is
2031  * responsible for configuring the hardware for proper multicast,
2032  * promiscuous mode, and all-multi behavior.
2033  **/
2034 static void igb_set_multi(struct net_device *netdev)
2035 {
2036         struct igb_adapter *adapter = netdev_priv(netdev);
2037         struct e1000_hw *hw = &adapter->hw;
2038         struct e1000_mac_info *mac = &hw->mac;
2039         struct dev_mc_list *mc_ptr;
2040         u8  *mta_list;
2041         u32 rctl;
2042         int i;
2043
2044         /* Check for Promiscuous and All Multicast modes */
2045
2046         rctl = rd32(E1000_RCTL);
2047
2048         if (netdev->flags & IFF_PROMISC)
2049                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2050         else if (netdev->flags & IFF_ALLMULTI) {
2051                 rctl |= E1000_RCTL_MPE;
2052                 rctl &= ~E1000_RCTL_UPE;
2053         } else
2054                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2055
2056         wr32(E1000_RCTL, rctl);
2057
2058         if (!netdev->mc_count) {
2059                 /* nothing to program, so clear mc list */
2060                 igb_update_mc_addr_list(hw, NULL, 0, 1,
2061                                           mac->rar_entry_count);
2062                 return;
2063         }
2064
2065         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2066         if (!mta_list)
2067                 return;
2068
2069         /* The shared function expects a packed array of only addresses. */
2070         mc_ptr = netdev->mc_list;
2071
2072         for (i = 0; i < netdev->mc_count; i++) {
2073                 if (!mc_ptr)
2074                         break;
2075                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2076                 mc_ptr = mc_ptr->next;
2077         }
2078         igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2079         kfree(mta_list);
2080 }
2081
2082 /* Need to wait a few seconds after link up to get diagnostic information from
2083  * the phy */
2084 static void igb_update_phy_info(unsigned long data)
2085 {
2086         struct igb_adapter *adapter = (struct igb_adapter *) data;
2087         if (adapter->hw.phy.ops.get_phy_info)
2088                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2089 }
2090
2091 /**
2092  * igb_watchdog - Timer Call-back
2093  * @data: pointer to adapter cast into an unsigned long
2094  **/
2095 static void igb_watchdog(unsigned long data)
2096 {
2097         struct igb_adapter *adapter = (struct igb_adapter *)data;
2098         /* Do the rest outside of interrupt context */
2099         schedule_work(&adapter->watchdog_task);
2100 }
2101
2102 static void igb_watchdog_task(struct work_struct *work)
2103 {
2104         struct igb_adapter *adapter = container_of(work,
2105                                         struct igb_adapter, watchdog_task);
2106         struct e1000_hw *hw = &adapter->hw;
2107
2108         struct net_device *netdev = adapter->netdev;
2109         struct igb_ring *tx_ring = adapter->tx_ring;
2110         struct e1000_mac_info *mac = &adapter->hw.mac;
2111         u32 link;
2112         s32 ret_val;
2113
2114         if ((netif_carrier_ok(netdev)) &&
2115             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2116                 goto link_up;
2117
2118         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2119         if ((ret_val == E1000_ERR_PHY) &&
2120             (hw->phy.type == e1000_phy_igp_3) &&
2121             (rd32(E1000_CTRL) &
2122              E1000_PHY_CTRL_GBE_DISABLE))
2123                 dev_info(&adapter->pdev->dev,
2124                          "Gigabit has been disabled, downgrading speed\n");
2125
2126         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2127             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2128                 link = mac->serdes_has_link;
2129         else
2130                 link = rd32(E1000_STATUS) &
2131                                       E1000_STATUS_LU;
2132
2133         if (link) {
2134                 if (!netif_carrier_ok(netdev)) {
2135                         u32 ctrl;
2136                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2137                                                    &adapter->link_speed,
2138                                                    &adapter->link_duplex);
2139
2140                         ctrl = rd32(E1000_CTRL);
2141                         dev_info(&adapter->pdev->dev,
2142                                  "NIC Link is Up %d Mbps %s, "
2143                                  "Flow Control: %s\n",
2144                                  adapter->link_speed,
2145                                  adapter->link_duplex == FULL_DUPLEX ?
2146                                  "Full Duplex" : "Half Duplex",
2147                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2148                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2149                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2150                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2151
2152                         /* tweak tx_queue_len according to speed/duplex and
2153                          * adjust the timeout factor */
2154                         netdev->tx_queue_len = adapter->tx_queue_len;
2155                         adapter->tx_timeout_factor = 1;
2156                         switch (adapter->link_speed) {
2157                         case SPEED_10:
2158                                 netdev->tx_queue_len = 10;
2159                                 adapter->tx_timeout_factor = 14;
2160                                 break;
2161                         case SPEED_100:
2162                                 netdev->tx_queue_len = 100;
2163                                 /* maybe add some timeout factor ? */
2164                                 break;
2165                         }
2166
2167                         netif_carrier_on(netdev);
2168                         netif_wake_queue(netdev);
2169
2170                         if (!test_bit(__IGB_DOWN, &adapter->state))
2171                                 mod_timer(&adapter->phy_info_timer,
2172                                           round_jiffies(jiffies + 2 * HZ));
2173                 }
2174         } else {
2175                 if (netif_carrier_ok(netdev)) {
2176                         adapter->link_speed = 0;
2177                         adapter->link_duplex = 0;
2178                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2179                         netif_carrier_off(netdev);
2180                         netif_stop_queue(netdev);
2181                         if (!test_bit(__IGB_DOWN, &adapter->state))
2182                                 mod_timer(&adapter->phy_info_timer,
2183                                           round_jiffies(jiffies + 2 * HZ));
2184                 }
2185         }
2186
2187 link_up:
2188         igb_update_stats(adapter);
2189
2190         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2191         adapter->tpt_old = adapter->stats.tpt;
2192         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2193         adapter->colc_old = adapter->stats.colc;
2194
2195         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2196         adapter->gorc_old = adapter->stats.gorc;
2197         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2198         adapter->gotc_old = adapter->stats.gotc;
2199
2200         igb_update_adaptive(&adapter->hw);
2201
2202         if (!netif_carrier_ok(netdev)) {
2203                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2204                         /* We've lost link, so the controller stops DMA,
2205                          * but we've got queued Tx work that's never going
2206                          * to get done, so reset controller to flush Tx.
2207                          * (Do the reset outside of interrupt context). */
2208                         adapter->tx_timeout_count++;
2209                         schedule_work(&adapter->reset_task);
2210                 }
2211         }
2212
2213         /* Cause software interrupt to ensure rx ring is cleaned */
2214         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2215
2216         /* Force detection of hung controller every watchdog period */
2217         tx_ring->detect_tx_hung = true;
2218
2219         /* Reset the timer */
2220         if (!test_bit(__IGB_DOWN, &adapter->state))
2221                 mod_timer(&adapter->watchdog_timer,
2222                           round_jiffies(jiffies + 2 * HZ));
2223 }
2224
2225 enum latency_range {
2226         lowest_latency = 0,
2227         low_latency = 1,
2228         bulk_latency = 2,
2229         latency_invalid = 255
2230 };
2231
2232
2233 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2234                               struct igb_ring *rx_ring)
2235 {
2236         struct e1000_hw *hw = &adapter->hw;
2237         int new_val;
2238
2239         new_val = rx_ring->itr_val / 2;
2240         if (new_val < IGB_MIN_DYN_ITR)
2241                 new_val = IGB_MIN_DYN_ITR;
2242
2243         if (new_val != rx_ring->itr_val) {
2244                 rx_ring->itr_val = new_val;
2245                 wr32(rx_ring->itr_register,
2246                                 1000000000 / (new_val * 256));
2247         }
2248 }
2249
2250 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2251                               struct igb_ring *rx_ring)
2252 {
2253         struct e1000_hw *hw = &adapter->hw;
2254         int new_val;
2255
2256         new_val = rx_ring->itr_val * 2;
2257         if (new_val > IGB_MAX_DYN_ITR)
2258                 new_val = IGB_MAX_DYN_ITR;
2259
2260         if (new_val != rx_ring->itr_val) {
2261                 rx_ring->itr_val = new_val;
2262                 wr32(rx_ring->itr_register,
2263                                 1000000000 / (new_val * 256));
2264         }
2265 }
2266
2267 /**
2268  * igb_update_itr - update the dynamic ITR value based on statistics
2269  *      Stores a new ITR value based on packets and byte
2270  *      counts during the last interrupt.  The advantage of per interrupt
2271  *      computation is faster updates and more accurate ITR for the current
2272  *      traffic pattern.  Constants in this function were computed
2273  *      based on theoretical maximum wire speed and thresholds were set based
2274  *      on testing data as well as attempting to minimize response time
2275  *      while increasing bulk throughput.
2276  *      this functionality is controlled by the InterruptThrottleRate module
2277  *      parameter (see igb_param.c)
2278  *      NOTE:  These calculations are only valid when operating in a single-
2279  *             queue environment.
2280  * @adapter: pointer to adapter
2281  * @itr_setting: current adapter->itr
2282  * @packets: the number of packets during this measurement interval
2283  * @bytes: the number of bytes during this measurement interval
2284  **/
2285 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2286                                    int packets, int bytes)
2287 {
2288         unsigned int retval = itr_setting;
2289
2290         if (packets == 0)
2291                 goto update_itr_done;
2292
2293         switch (itr_setting) {
2294         case lowest_latency:
2295                 /* handle TSO and jumbo frames */
2296                 if (bytes/packets > 8000)
2297                         retval = bulk_latency;
2298                 else if ((packets < 5) && (bytes > 512))
2299                         retval = low_latency;
2300                 break;
2301         case low_latency:  /* 50 usec aka 20000 ints/s */
2302                 if (bytes > 10000) {
2303                         /* this if handles the TSO accounting */
2304                         if (bytes/packets > 8000) {
2305                                 retval = bulk_latency;
2306                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2307                                 retval = bulk_latency;
2308                         } else if ((packets > 35)) {
2309                                 retval = lowest_latency;
2310                         }
2311                 } else if (bytes/packets > 2000) {
2312                         retval = bulk_latency;
2313                 } else if (packets <= 2 && bytes < 512) {
2314                         retval = lowest_latency;
2315                 }
2316                 break;
2317         case bulk_latency: /* 250 usec aka 4000 ints/s */
2318                 if (bytes > 25000) {
2319                         if (packets > 35)
2320                                 retval = low_latency;
2321                 } else if (bytes < 6000) {
2322                         retval = low_latency;
2323                 }
2324                 break;
2325         }
2326
2327 update_itr_done:
2328         return retval;
2329 }
2330
2331 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2332                         int rx_only)
2333 {
2334         u16 current_itr;
2335         u32 new_itr = adapter->itr;
2336
2337         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2338         if (adapter->link_speed != SPEED_1000) {
2339                 current_itr = 0;
2340                 new_itr = 4000;
2341                 goto set_itr_now;
2342         }
2343
2344         adapter->rx_itr = igb_update_itr(adapter,
2345                                     adapter->rx_itr,
2346                                     adapter->rx_ring->total_packets,
2347                                     adapter->rx_ring->total_bytes);
2348         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2349         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2350                 adapter->rx_itr = low_latency;
2351
2352         if (!rx_only) {
2353                 adapter->tx_itr = igb_update_itr(adapter,
2354                                             adapter->tx_itr,
2355                                             adapter->tx_ring->total_packets,
2356                                             adapter->tx_ring->total_bytes);
2357                 /* conservative mode (itr 3) eliminates the
2358                  * lowest_latency setting */
2359                 if (adapter->itr_setting == 3 &&
2360                     adapter->tx_itr == lowest_latency)
2361                         adapter->tx_itr = low_latency;
2362
2363                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2364         } else {
2365                 current_itr = adapter->rx_itr;
2366         }
2367
2368         switch (current_itr) {
2369         /* counts and packets in update_itr are dependent on these numbers */
2370         case lowest_latency:
2371                 new_itr = 70000;
2372                 break;
2373         case low_latency:
2374                 new_itr = 20000; /* aka hwitr = ~200 */
2375                 break;
2376         case bulk_latency:
2377                 new_itr = 4000;
2378                 break;
2379         default:
2380                 break;
2381         }
2382
2383 set_itr_now:
2384         if (new_itr != adapter->itr) {
2385                 /* this attempts to bias the interrupt rate towards Bulk
2386                  * by adding intermediate steps when interrupt rate is
2387                  * increasing */
2388                 new_itr = new_itr > adapter->itr ?
2389                              min(adapter->itr + (new_itr >> 2), new_itr) :
2390                              new_itr;
2391                 /* Don't write the value here; it resets the adapter's
2392                  * internal timer, and causes us to delay far longer than
2393                  * we should between interrupts.  Instead, we write the ITR
2394                  * value at the beginning of the next interrupt so the timing
2395                  * ends up being correct.
2396                  */
2397                 adapter->itr = new_itr;
2398                 adapter->set_itr = 1;
2399         }
2400
2401         return;
2402 }
2403
2404
2405 #define IGB_TX_FLAGS_CSUM               0x00000001
2406 #define IGB_TX_FLAGS_VLAN               0x00000002
2407 #define IGB_TX_FLAGS_TSO                0x00000004
2408 #define IGB_TX_FLAGS_IPV4               0x00000008
2409 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2410 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2411
2412 static inline int igb_tso_adv(struct igb_adapter *adapter,
2413                               struct igb_ring *tx_ring,
2414                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2415 {
2416         struct e1000_adv_tx_context_desc *context_desc;
2417         unsigned int i;
2418         int err;
2419         struct igb_buffer *buffer_info;
2420         u32 info = 0, tu_cmd = 0;
2421         u32 mss_l4len_idx, l4len;
2422         *hdr_len = 0;
2423
2424         if (skb_header_cloned(skb)) {
2425                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2426                 if (err)
2427                         return err;
2428         }
2429
2430         l4len = tcp_hdrlen(skb);
2431         *hdr_len += l4len;
2432
2433         if (skb->protocol == htons(ETH_P_IP)) {
2434                 struct iphdr *iph = ip_hdr(skb);
2435                 iph->tot_len = 0;
2436                 iph->check = 0;
2437                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2438                                                          iph->daddr, 0,
2439                                                          IPPROTO_TCP,
2440                                                          0);
2441         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2442                 ipv6_hdr(skb)->payload_len = 0;
2443                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2444                                                        &ipv6_hdr(skb)->daddr,
2445                                                        0, IPPROTO_TCP, 0);
2446         }
2447
2448         i = tx_ring->next_to_use;
2449
2450         buffer_info = &tx_ring->buffer_info[i];
2451         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2452         /* VLAN MACLEN IPLEN */
2453         if (tx_flags & IGB_TX_FLAGS_VLAN)
2454                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2455         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2456         *hdr_len += skb_network_offset(skb);
2457         info |= skb_network_header_len(skb);
2458         *hdr_len += skb_network_header_len(skb);
2459         context_desc->vlan_macip_lens = cpu_to_le32(info);
2460
2461         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2462         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2463
2464         if (skb->protocol == htons(ETH_P_IP))
2465                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2466         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2467
2468         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2469
2470         /* MSS L4LEN IDX */
2471         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2472         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2473
2474         /* Context index must be unique per ring.  Luckily, so is the interrupt
2475          * mask value. */
2476         mss_l4len_idx |= tx_ring->eims_value >> 4;
2477
2478         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2479         context_desc->seqnum_seed = 0;
2480
2481         buffer_info->time_stamp = jiffies;
2482         buffer_info->dma = 0;
2483         i++;
2484         if (i == tx_ring->count)
2485                 i = 0;
2486
2487         tx_ring->next_to_use = i;
2488
2489         return true;
2490 }
2491
2492 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2493                                         struct igb_ring *tx_ring,
2494                                         struct sk_buff *skb, u32 tx_flags)
2495 {
2496         struct e1000_adv_tx_context_desc *context_desc;
2497         unsigned int i;
2498         struct igb_buffer *buffer_info;
2499         u32 info = 0, tu_cmd = 0;
2500
2501         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2502             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2503                 i = tx_ring->next_to_use;
2504                 buffer_info = &tx_ring->buffer_info[i];
2505                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2506
2507                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2508                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2509                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2510                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2511                         info |= skb_network_header_len(skb);
2512
2513                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2514
2515                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2516
2517                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2518                         switch (skb->protocol) {
2519                         case __constant_htons(ETH_P_IP):
2520                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2521                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2522                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2523                                 break;
2524                         case __constant_htons(ETH_P_IPV6):
2525                                 /* XXX what about other V6 headers?? */
2526                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2527                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2528                                 break;
2529                         default:
2530                                 if (unlikely(net_ratelimit()))
2531                                         dev_warn(&adapter->pdev->dev,
2532                                             "partial checksum but proto=%x!\n",
2533                                             skb->protocol);
2534                                 break;
2535                         }
2536                 }
2537
2538                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2539                 context_desc->seqnum_seed = 0;
2540                 context_desc->mss_l4len_idx =
2541                                           cpu_to_le32(tx_ring->eims_value >> 4);
2542
2543                 buffer_info->time_stamp = jiffies;
2544                 buffer_info->dma = 0;
2545
2546                 i++;
2547                 if (i == tx_ring->count)
2548                         i = 0;
2549                 tx_ring->next_to_use = i;
2550
2551                 return true;
2552         }
2553
2554
2555         return false;
2556 }
2557
2558 #define IGB_MAX_TXD_PWR 16
2559 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2560
2561 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2562                                  struct igb_ring *tx_ring,
2563                                  struct sk_buff *skb)
2564 {
2565         struct igb_buffer *buffer_info;
2566         unsigned int len = skb_headlen(skb);
2567         unsigned int count = 0, i;
2568         unsigned int f;
2569
2570         i = tx_ring->next_to_use;
2571
2572         buffer_info = &tx_ring->buffer_info[i];
2573         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2574         buffer_info->length = len;
2575         /* set time_stamp *before* dma to help avoid a possible race */
2576         buffer_info->time_stamp = jiffies;
2577         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2578                                           PCI_DMA_TODEVICE);
2579         count++;
2580         i++;
2581         if (i == tx_ring->count)
2582                 i = 0;
2583
2584         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2585                 struct skb_frag_struct *frag;
2586
2587                 frag = &skb_shinfo(skb)->frags[f];
2588                 len = frag->size;
2589
2590                 buffer_info = &tx_ring->buffer_info[i];
2591                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2592                 buffer_info->length = len;
2593                 buffer_info->time_stamp = jiffies;
2594                 buffer_info->dma = pci_map_page(adapter->pdev,
2595                                                 frag->page,
2596                                                 frag->page_offset,
2597                                                 len,
2598                                                 PCI_DMA_TODEVICE);
2599
2600                 count++;
2601                 i++;
2602                 if (i == tx_ring->count)
2603                         i = 0;
2604         }
2605
2606         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2607         tx_ring->buffer_info[i].skb = skb;
2608
2609         return count;
2610 }
2611
2612 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2613                                     struct igb_ring *tx_ring,
2614                                     int tx_flags, int count, u32 paylen,
2615                                     u8 hdr_len)
2616 {
2617         union e1000_adv_tx_desc *tx_desc = NULL;
2618         struct igb_buffer *buffer_info;
2619         u32 olinfo_status = 0, cmd_type_len;
2620         unsigned int i;
2621
2622         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2623                         E1000_ADVTXD_DCMD_DEXT);
2624
2625         if (tx_flags & IGB_TX_FLAGS_VLAN)
2626                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2627
2628         if (tx_flags & IGB_TX_FLAGS_TSO) {
2629                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2630
2631                 /* insert tcp checksum */
2632                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2633
2634                 /* insert ip checksum */
2635                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2636                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2637
2638         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2639                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2640         }
2641
2642         if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2643                         IGB_TX_FLAGS_VLAN))
2644                 olinfo_status |= tx_ring->eims_value >> 4;
2645
2646         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2647
2648         i = tx_ring->next_to_use;
2649         while (count--) {
2650                 buffer_info = &tx_ring->buffer_info[i];
2651                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2652                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2653                 tx_desc->read.cmd_type_len =
2654                         cpu_to_le32(cmd_type_len | buffer_info->length);
2655                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2656                 i++;
2657                 if (i == tx_ring->count)
2658                         i = 0;
2659         }
2660
2661         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2662         /* Force memory writes to complete before letting h/w
2663          * know there are new descriptors to fetch.  (Only
2664          * applicable for weak-ordered memory model archs,
2665          * such as IA-64). */
2666         wmb();
2667
2668         tx_ring->next_to_use = i;
2669         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2670         /* we need this if more than one processor can write to our tail
2671          * at a time, it syncronizes IO on IA64/Altix systems */
2672         mmiowb();
2673 }
2674
2675 static int __igb_maybe_stop_tx(struct net_device *netdev,
2676                                struct igb_ring *tx_ring, int size)
2677 {
2678         struct igb_adapter *adapter = netdev_priv(netdev);
2679
2680         netif_stop_queue(netdev);
2681         /* Herbert's original patch had:
2682          *  smp_mb__after_netif_stop_queue();
2683          * but since that doesn't exist yet, just open code it. */
2684         smp_mb();
2685
2686         /* We need to check again in a case another CPU has just
2687          * made room available. */
2688         if (IGB_DESC_UNUSED(tx_ring) < size)
2689                 return -EBUSY;
2690
2691         /* A reprieve! */
2692         netif_start_queue(netdev);
2693         ++adapter->restart_queue;
2694         return 0;
2695 }
2696
2697 static int igb_maybe_stop_tx(struct net_device *netdev,
2698                              struct igb_ring *tx_ring, int size)
2699 {
2700         if (IGB_DESC_UNUSED(tx_ring) >= size)
2701                 return 0;
2702         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2703 }
2704
2705 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2706
2707 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2708                                    struct net_device *netdev,
2709                                    struct igb_ring *tx_ring)
2710 {
2711         struct igb_adapter *adapter = netdev_priv(netdev);
2712         unsigned int tx_flags = 0;
2713         unsigned int len;
2714         unsigned long irq_flags;
2715         u8 hdr_len = 0;
2716         int tso = 0;
2717
2718         len = skb_headlen(skb);
2719
2720         if (test_bit(__IGB_DOWN, &adapter->state)) {
2721                 dev_kfree_skb_any(skb);
2722                 return NETDEV_TX_OK;
2723         }
2724
2725         if (skb->len <= 0) {
2726                 dev_kfree_skb_any(skb);
2727                 return NETDEV_TX_OK;
2728         }
2729
2730         if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags))
2731                 /* Collision - tell upper layer to requeue */
2732                 return NETDEV_TX_LOCKED;
2733
2734         /* need: 1 descriptor per page,
2735          *       + 2 desc gap to keep tail from touching head,
2736          *       + 1 desc for skb->data,
2737          *       + 1 desc for context descriptor,
2738          * otherwise try next time */
2739         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2740                 /* this is a hard error */
2741                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2742                 return NETDEV_TX_BUSY;
2743         }
2744
2745         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2746                 tx_flags |= IGB_TX_FLAGS_VLAN;
2747                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2748         }
2749
2750         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2751                                               &hdr_len) : 0;
2752
2753         if (tso < 0) {
2754                 dev_kfree_skb_any(skb);
2755                 spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2756                 return NETDEV_TX_OK;
2757         }
2758
2759         if (tso)
2760                 tx_flags |= IGB_TX_FLAGS_TSO;
2761         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2762                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2763                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2764
2765         if (skb->protocol == htons(ETH_P_IP))
2766                 tx_flags |= IGB_TX_FLAGS_IPV4;
2767
2768         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2769                          igb_tx_map_adv(adapter, tx_ring, skb),
2770                          skb->len, hdr_len);
2771
2772         netdev->trans_start = jiffies;
2773
2774         /* Make sure there is space in the ring for the next send. */
2775         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2776
2777         spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags);
2778         return NETDEV_TX_OK;
2779 }
2780
2781 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2782 {
2783         struct igb_adapter *adapter = netdev_priv(netdev);
2784         struct igb_ring *tx_ring = &adapter->tx_ring[0];
2785
2786         /* This goes back to the question of how to logically map a tx queue
2787          * to a flow.  Right now, performance is impacted slightly negatively
2788          * if using multiple tx queues.  If the stack breaks away from a
2789          * single qdisc implementation, we can look at this again. */
2790         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2791 }
2792
2793 /**
2794  * igb_tx_timeout - Respond to a Tx Hang
2795  * @netdev: network interface device structure
2796  **/
2797 static void igb_tx_timeout(struct net_device *netdev)
2798 {
2799         struct igb_adapter *adapter = netdev_priv(netdev);
2800         struct e1000_hw *hw = &adapter->hw;
2801
2802         /* Do the reset outside of interrupt context */
2803         adapter->tx_timeout_count++;
2804         schedule_work(&adapter->reset_task);
2805         wr32(E1000_EICS, adapter->eims_enable_mask &
2806                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2807 }
2808
2809 static void igb_reset_task(struct work_struct *work)
2810 {
2811         struct igb_adapter *adapter;
2812         adapter = container_of(work, struct igb_adapter, reset_task);
2813
2814         igb_reinit_locked(adapter);
2815 }
2816
2817 /**
2818  * igb_get_stats - Get System Network Statistics
2819  * @netdev: network interface device structure
2820  *
2821  * Returns the address of the device statistics structure.
2822  * The statistics are actually updated from the timer callback.
2823  **/
2824 static struct net_device_stats *
2825 igb_get_stats(struct net_device *netdev)
2826 {
2827         struct igb_adapter *adapter = netdev_priv(netdev);
2828
2829         /* only return the current stats */
2830         return &adapter->net_stats;
2831 }
2832
2833 /**
2834  * igb_change_mtu - Change the Maximum Transfer Unit
2835  * @netdev: network interface device structure
2836  * @new_mtu: new value for maximum frame size
2837  *
2838  * Returns 0 on success, negative on failure
2839  **/
2840 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2841 {
2842         struct igb_adapter *adapter = netdev_priv(netdev);
2843         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2844
2845         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2846             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2847                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2848                 return -EINVAL;
2849         }
2850
2851 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2852         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2853                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2854                 return -EINVAL;
2855         }
2856
2857         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2858                 msleep(1);
2859         /* igb_down has a dependency on max_frame_size */
2860         adapter->max_frame_size = max_frame;
2861         if (netif_running(netdev))
2862                 igb_down(adapter);
2863
2864         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2865          * means we reserve 2 more, this pushes us to allocate from the next
2866          * larger slab size.
2867          * i.e. RXBUFFER_2048 --> size-4096 slab
2868          */
2869
2870         if (max_frame <= IGB_RXBUFFER_256)
2871                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2872         else if (max_frame <= IGB_RXBUFFER_512)
2873                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2874         else if (max_frame <= IGB_RXBUFFER_1024)
2875                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2876         else if (max_frame <= IGB_RXBUFFER_2048)
2877                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2878         else
2879                 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2880         /* adjust allocation if LPE protects us, and we aren't using SBP */
2881         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2882              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2883                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2884
2885         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2886                  netdev->mtu, new_mtu);
2887         netdev->mtu = new_mtu;
2888
2889         if (netif_running(netdev))
2890                 igb_up(adapter);
2891         else
2892                 igb_reset(adapter);
2893
2894         clear_bit(__IGB_RESETTING, &adapter->state);
2895
2896         return 0;
2897 }
2898
2899 /**
2900  * igb_update_stats - Update the board statistics counters
2901  * @adapter: board private structure
2902  **/
2903
2904 void igb_update_stats(struct igb_adapter *adapter)
2905 {
2906         struct e1000_hw *hw = &adapter->hw;
2907         struct pci_dev *pdev = adapter->pdev;
2908         u16 phy_tmp;
2909
2910 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2911
2912         /*
2913          * Prevent stats update while adapter is being reset, or if the pci
2914          * connection is down.
2915          */
2916         if (adapter->link_speed == 0)
2917                 return;
2918         if (pci_channel_offline(pdev))
2919                 return;
2920
2921         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
2922         adapter->stats.gprc += rd32(E1000_GPRC);
2923         adapter->stats.gorc += rd32(E1000_GORCL);
2924         rd32(E1000_GORCH); /* clear GORCL */
2925         adapter->stats.bprc += rd32(E1000_BPRC);
2926         adapter->stats.mprc += rd32(E1000_MPRC);
2927         adapter->stats.roc += rd32(E1000_ROC);
2928
2929         adapter->stats.prc64 += rd32(E1000_PRC64);
2930         adapter->stats.prc127 += rd32(E1000_PRC127);
2931         adapter->stats.prc255 += rd32(E1000_PRC255);
2932         adapter->stats.prc511 += rd32(E1000_PRC511);
2933         adapter->stats.prc1023 += rd32(E1000_PRC1023);
2934         adapter->stats.prc1522 += rd32(E1000_PRC1522);
2935         adapter->stats.symerrs += rd32(E1000_SYMERRS);
2936         adapter->stats.sec += rd32(E1000_SEC);
2937
2938         adapter->stats.mpc += rd32(E1000_MPC);
2939         adapter->stats.scc += rd32(E1000_SCC);
2940         adapter->stats.ecol += rd32(E1000_ECOL);
2941         adapter->stats.mcc += rd32(E1000_MCC);
2942         adapter->stats.latecol += rd32(E1000_LATECOL);
2943         adapter->stats.dc += rd32(E1000_DC);
2944         adapter->stats.rlec += rd32(E1000_RLEC);
2945         adapter->stats.xonrxc += rd32(E1000_XONRXC);
2946         adapter->stats.xontxc += rd32(E1000_XONTXC);
2947         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
2948         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
2949         adapter->stats.fcruc += rd32(E1000_FCRUC);
2950         adapter->stats.gptc += rd32(E1000_GPTC);
2951         adapter->stats.gotc += rd32(E1000_GOTCL);
2952         rd32(E1000_GOTCH); /* clear GOTCL */
2953         adapter->stats.rnbc += rd32(E1000_RNBC);
2954         adapter->stats.ruc += rd32(E1000_RUC);
2955         adapter->stats.rfc += rd32(E1000_RFC);
2956         adapter->stats.rjc += rd32(E1000_RJC);
2957         adapter->stats.tor += rd32(E1000_TORH);
2958         adapter->stats.tot += rd32(E1000_TOTH);
2959         adapter->stats.tpr += rd32(E1000_TPR);
2960
2961         adapter->stats.ptc64 += rd32(E1000_PTC64);
2962         adapter->stats.ptc127 += rd32(E1000_PTC127);
2963         adapter->stats.ptc255 += rd32(E1000_PTC255);
2964         adapter->stats.ptc511 += rd32(E1000_PTC511);
2965         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
2966         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
2967
2968         adapter->stats.mptc += rd32(E1000_MPTC);
2969         adapter->stats.bptc += rd32(E1000_BPTC);
2970
2971         /* used for adaptive IFS */
2972
2973         hw->mac.tx_packet_delta = rd32(E1000_TPT);
2974         adapter->stats.tpt += hw->mac.tx_packet_delta;
2975         hw->mac.collision_delta = rd32(E1000_COLC);
2976         adapter->stats.colc += hw->mac.collision_delta;
2977
2978         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
2979         adapter->stats.rxerrc += rd32(E1000_RXERRC);
2980         adapter->stats.tncrs += rd32(E1000_TNCRS);
2981         adapter->stats.tsctc += rd32(E1000_TSCTC);
2982         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
2983
2984         adapter->stats.iac += rd32(E1000_IAC);
2985         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
2986         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
2987         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
2988         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
2989         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
2990         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
2991         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
2992         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
2993
2994         /* Fill out the OS statistics structure */
2995         adapter->net_stats.multicast = adapter->stats.mprc;
2996         adapter->net_stats.collisions = adapter->stats.colc;
2997
2998         /* Rx Errors */
2999
3000         /* RLEC on some newer hardware can be incorrect so build
3001         * our own version based on RUC and ROC */
3002         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3003                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3004                 adapter->stats.ruc + adapter->stats.roc +
3005                 adapter->stats.cexterr;
3006         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3007                                               adapter->stats.roc;
3008         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3009         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3010         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3011
3012         /* Tx Errors */
3013         adapter->net_stats.tx_errors = adapter->stats.ecol +
3014                                        adapter->stats.latecol;
3015         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3016         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3017         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3018
3019         /* Tx Dropped needs to be maintained elsewhere */
3020
3021         /* Phy Stats */
3022         if (hw->phy.media_type == e1000_media_type_copper) {
3023                 if ((adapter->link_speed == SPEED_1000) &&
3024                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3025                                               &phy_tmp))) {
3026                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3027                         adapter->phy_stats.idle_errors += phy_tmp;
3028                 }
3029         }
3030
3031         /* Management Stats */
3032         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3033         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3034         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3035 }
3036
3037
3038 static irqreturn_t igb_msix_other(int irq, void *data)
3039 {
3040         struct net_device *netdev = data;
3041         struct igb_adapter *adapter = netdev_priv(netdev);
3042         struct e1000_hw *hw = &adapter->hw;
3043         u32 eicr;
3044         /* disable interrupts from the "other" bit, avoid re-entry */
3045         wr32(E1000_EIMC, E1000_EIMS_OTHER);
3046
3047         eicr = rd32(E1000_EICR);
3048
3049         if (eicr & E1000_EIMS_OTHER) {
3050                 u32 icr = rd32(E1000_ICR);
3051                 /* reading ICR causes bit 31 of EICR to be cleared */
3052                 if (!(icr & E1000_ICR_LSC))
3053                         goto no_link_interrupt;
3054                 hw->mac.get_link_status = 1;
3055                 /* guard against interrupt when we're going down */
3056                 if (!test_bit(__IGB_DOWN, &adapter->state))
3057                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3058         }
3059
3060 no_link_interrupt:
3061         wr32(E1000_IMS, E1000_IMS_LSC);
3062         wr32(E1000_EIMS, E1000_EIMS_OTHER);
3063
3064         return IRQ_HANDLED;
3065 }
3066
3067 static irqreturn_t igb_msix_tx(int irq, void *data)
3068 {
3069         struct igb_ring *tx_ring = data;
3070         struct igb_adapter *adapter = tx_ring->adapter;
3071         struct e1000_hw *hw = &adapter->hw;
3072
3073         if (!tx_ring->itr_val)
3074                 wr32(E1000_EIMC, tx_ring->eims_value);
3075
3076         tx_ring->total_bytes = 0;
3077         tx_ring->total_packets = 0;
3078         if (!igb_clean_tx_irq(adapter, tx_ring))
3079                 /* Ring was not completely cleaned, so fire another interrupt */
3080                 wr32(E1000_EICS, tx_ring->eims_value);
3081
3082         if (!tx_ring->itr_val)
3083                 wr32(E1000_EIMS, tx_ring->eims_value);
3084         return IRQ_HANDLED;
3085 }
3086
3087 static irqreturn_t igb_msix_rx(int irq, void *data)
3088 {
3089         struct igb_ring *rx_ring = data;
3090         struct igb_adapter *adapter = rx_ring->adapter;
3091         struct e1000_hw *hw = &adapter->hw;
3092
3093         if (!rx_ring->itr_val)
3094                 wr32(E1000_EIMC, rx_ring->eims_value);
3095
3096         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) {
3097                 rx_ring->total_bytes = 0;
3098                 rx_ring->total_packets = 0;
3099                 rx_ring->no_itr_adjust = 0;
3100                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3101         } else {
3102                 if (!rx_ring->no_itr_adjust) {
3103                         igb_lower_rx_eitr(adapter, rx_ring);
3104                         rx_ring->no_itr_adjust = 1;
3105                 }
3106         }
3107
3108         return IRQ_HANDLED;
3109 }
3110
3111
3112 /**
3113  * igb_intr_msi - Interrupt Handler
3114  * @irq: interrupt number
3115  * @data: pointer to a network interface device structure
3116  **/
3117 static irqreturn_t igb_intr_msi(int irq, void *data)
3118 {
3119         struct net_device *netdev = data;
3120         struct igb_adapter *adapter = netdev_priv(netdev);
3121         struct napi_struct *napi = &adapter->napi;
3122         struct e1000_hw *hw = &adapter->hw;
3123         /* read ICR disables interrupts using IAM */
3124         u32 icr = rd32(E1000_ICR);
3125
3126         /* Write the ITR value calculated at the end of the
3127          * previous interrupt.
3128          */
3129         if (adapter->set_itr) {
3130                 wr32(E1000_ITR,
3131                         1000000000 / (adapter->itr * 256));
3132                 adapter->set_itr = 0;
3133         }
3134
3135         /* read ICR disables interrupts using IAM */
3136         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3137                 hw->mac.get_link_status = 1;
3138                 if (!test_bit(__IGB_DOWN, &adapter->state))
3139                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3140         }
3141
3142         if (netif_rx_schedule_prep(netdev, napi)) {
3143                 adapter->tx_ring->total_bytes = 0;
3144                 adapter->tx_ring->total_packets = 0;
3145                 adapter->rx_ring->total_bytes = 0;
3146                 adapter->rx_ring->total_packets = 0;
3147                 __netif_rx_schedule(netdev, napi);
3148         }
3149
3150         return IRQ_HANDLED;
3151 }
3152
3153 /**
3154  * igb_intr - Interrupt Handler
3155  * @irq: interrupt number
3156  * @data: pointer to a network interface device structure
3157  **/
3158 static irqreturn_t igb_intr(int irq, void *data)
3159 {
3160         struct net_device *netdev = data;
3161         struct igb_adapter *adapter = netdev_priv(netdev);
3162         struct napi_struct *napi = &adapter->napi;
3163         struct e1000_hw *hw = &adapter->hw;
3164         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3165          * need for the IMC write */
3166         u32 icr = rd32(E1000_ICR);
3167         u32 eicr = 0;
3168         if (!icr)
3169                 return IRQ_NONE;  /* Not our interrupt */
3170
3171         /* Write the ITR value calculated at the end of the
3172          * previous interrupt.
3173          */
3174         if (adapter->set_itr) {
3175                 wr32(E1000_ITR,
3176                         1000000000 / (adapter->itr * 256));
3177                 adapter->set_itr = 0;
3178         }
3179
3180         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3181          * not set, then the adapter didn't send an interrupt */
3182         if (!(icr & E1000_ICR_INT_ASSERTED))
3183                 return IRQ_NONE;
3184
3185         eicr = rd32(E1000_EICR);
3186
3187         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3188                 hw->mac.get_link_status = 1;
3189                 /* guard against interrupt when we're going down */
3190                 if (!test_bit(__IGB_DOWN, &adapter->state))
3191                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3192         }
3193
3194         if (netif_rx_schedule_prep(netdev, napi)) {
3195                 adapter->tx_ring->total_bytes = 0;
3196                 adapter->rx_ring->total_bytes = 0;
3197                 adapter->tx_ring->total_packets = 0;
3198                 adapter->rx_ring->total_packets = 0;
3199                 __netif_rx_schedule(netdev, napi);
3200         }
3201
3202         return IRQ_HANDLED;
3203 }
3204
3205 /**
3206  * igb_clean - NAPI Rx polling callback
3207  * @adapter: board private structure
3208  **/
3209 static int igb_clean(struct napi_struct *napi, int budget)
3210 {
3211         struct igb_adapter *adapter = container_of(napi, struct igb_adapter,
3212                                                    napi);
3213         struct net_device *netdev = adapter->netdev;
3214         int tx_clean_complete = 1, work_done = 0;
3215         int i;
3216
3217         /* Must NOT use netdev_priv macro here. */
3218         adapter = netdev->priv;
3219
3220         /* Keep link state information with original netdev */
3221         if (!netif_carrier_ok(netdev))
3222                 goto quit_polling;
3223
3224         /* igb_clean is called per-cpu.  This lock protects tx_ring[i] from
3225          * being cleaned by multiple cpus simultaneously.  A failure obtaining
3226          * the lock means tx_ring[i] is currently being cleaned anyway. */
3227         for (i = 0; i < adapter->num_tx_queues; i++) {
3228                 if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) {
3229                         tx_clean_complete &= igb_clean_tx_irq(adapter,
3230                                                         &adapter->tx_ring[i]);
3231                         spin_unlock(&adapter->tx_ring[i].tx_clean_lock);
3232                 }
3233         }
3234
3235         for (i = 0; i < adapter->num_rx_queues; i++)
3236                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done,
3237                                      adapter->rx_ring[i].napi.weight);
3238
3239         /* If no Tx and not enough Rx work done, exit the polling mode */
3240         if ((tx_clean_complete && (work_done < budget)) ||
3241             !netif_running(netdev)) {
3242 quit_polling:
3243                 if (adapter->itr_setting & 3)
3244                         igb_set_itr(adapter, E1000_ITR, false);
3245                 netif_rx_complete(netdev, napi);
3246                 if (!test_bit(__IGB_DOWN, &adapter->state))
3247                         igb_irq_enable(adapter);
3248                 return 0;
3249         }
3250
3251         return 1;
3252 }
3253
3254 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3255 {
3256         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3257         struct igb_adapter *adapter = rx_ring->adapter;
3258         struct e1000_hw *hw = &adapter->hw;
3259         struct net_device *netdev = adapter->netdev;
3260         int work_done = 0;
3261
3262         /* Keep link state information with original netdev */
3263         if (!netif_carrier_ok(netdev))
3264                 goto quit_polling;
3265
3266         igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget);
3267
3268
3269         /* If not enough Rx work done, exit the polling mode */
3270         if ((work_done == 0) || !netif_running(netdev)) {
3271 quit_polling:
3272                 netif_rx_complete(netdev, napi);
3273
3274                 wr32(E1000_EIMS, rx_ring->eims_value);
3275                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3276                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3277                         int mean_size = rx_ring->total_bytes /
3278                                         rx_ring->total_packets;
3279                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3280                                 igb_raise_rx_eitr(adapter, rx_ring);
3281                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3282                                 igb_lower_rx_eitr(adapter, rx_ring);
3283                 }
3284                 return 0;
3285         }
3286
3287         return 1;
3288 }
3289
3290 static inline u32 get_head(struct igb_ring *tx_ring)
3291 {
3292         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3293         return le32_to_cpu(*(volatile __le32 *)end);
3294 }
3295
3296 /**
3297  * igb_clean_tx_irq - Reclaim resources after transmit completes
3298  * @adapter: board private structure
3299  * returns true if ring is completely cleaned
3300  **/
3301 static bool igb_clean_tx_irq(struct igb_adapter *adapter,
3302                                   struct igb_ring *tx_ring)
3303 {
3304         struct net_device *netdev = adapter->netdev;
3305         struct e1000_hw *hw = &adapter->hw;
3306         struct e1000_tx_desc *tx_desc;
3307         struct igb_buffer *buffer_info;
3308         struct sk_buff *skb;
3309         unsigned int i;
3310         u32 head, oldhead;
3311         unsigned int count = 0;
3312         bool cleaned = false;
3313         bool retval = true;
3314         unsigned int total_bytes = 0, total_packets = 0;
3315
3316         rmb();
3317         head = get_head(tx_ring);
3318         i = tx_ring->next_to_clean;
3319         while (1) {
3320                 while (i != head) {
3321                         cleaned = true;
3322                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3323                         buffer_info = &tx_ring->buffer_info[i];
3324                         skb = buffer_info->skb;
3325
3326                         if (skb) {
3327                                 unsigned int segs, bytecount;
3328                                 /* gso_segs is currently only valid for tcp */
3329                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3330                                 /* multiply data chunks by size of headers */
3331                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3332                                             skb->len;
3333                                 total_packets += segs;
3334                                 total_bytes += bytecount;
3335                         }
3336
3337                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3338                         tx_desc->upper.data = 0;
3339
3340                         i++;
3341                         if (i == tx_ring->count)
3342                                 i = 0;
3343
3344                         count++;
3345                         if (count == IGB_MAX_TX_CLEAN) {
3346                                 retval = false;
3347                                 goto done_cleaning;
3348                         }
3349                 }
3350                 oldhead = head;
3351                 rmb();
3352                 head = get_head(tx_ring);
3353                 if (head == oldhead)
3354                         goto done_cleaning;
3355         }  /* while (1) */
3356
3357 done_cleaning:
3358         tx_ring->next_to_clean = i;
3359
3360         if (unlikely(cleaned &&
3361                      netif_carrier_ok(netdev) &&
3362                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3363                 /* Make sure that anybody stopping the queue after this
3364                  * sees the new next_to_clean.
3365                  */
3366                 smp_mb();
3367                 if (netif_queue_stopped(netdev) &&
3368                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3369                         netif_wake_queue(netdev);
3370                         ++adapter->restart_queue;
3371                 }
3372         }
3373
3374         if (tx_ring->detect_tx_hung) {
3375                 /* Detect a transmit hang in hardware, this serializes the
3376                  * check with the clearing of time_stamp and movement of i */
3377                 tx_ring->detect_tx_hung = false;
3378                 if (tx_ring->buffer_info[i].time_stamp &&
3379                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3380                                (adapter->tx_timeout_factor * HZ))
3381                     && !(rd32(E1000_STATUS) &
3382                          E1000_STATUS_TXOFF)) {
3383
3384                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3385                         /* detected Tx unit hang */
3386                         dev_err(&adapter->pdev->dev,
3387                                 "Detected Tx Unit Hang\n"
3388                                 "  Tx Queue             <%lu>\n"
3389                                 "  TDH                  <%x>\n"
3390                                 "  TDT                  <%x>\n"
3391                                 "  next_to_use          <%x>\n"
3392                                 "  next_to_clean        <%x>\n"
3393                                 "  head (WB)            <%x>\n"
3394                                 "buffer_info[next_to_clean]\n"
3395                                 "  time_stamp           <%lx>\n"
3396                                 "  jiffies              <%lx>\n"
3397                                 "  desc.status          <%x>\n",
3398                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3399                                         sizeof(struct igb_ring)),
3400                                 readl(adapter->hw.hw_addr + tx_ring->head),
3401                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3402                                 tx_ring->next_to_use,
3403                                 tx_ring->next_to_clean,
3404                                 head,
3405                                 tx_ring->buffer_info[i].time_stamp,
3406                                 jiffies,
3407                                 tx_desc->upper.fields.status);
3408                         netif_stop_queue(netdev);
3409                 }
3410         }
3411         tx_ring->total_bytes += total_bytes;
3412         tx_ring->total_packets += total_packets;
3413         adapter->net_stats.tx_bytes += total_bytes;
3414         adapter->net_stats.tx_packets += total_packets;
3415         return retval;
3416 }
3417
3418
3419 /**
3420  * igb_receive_skb - helper function to handle rx indications
3421  * @adapter: board private structure
3422  * @status: descriptor status field as written by hardware
3423  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3424  * @skb: pointer to sk_buff to be indicated to stack
3425  **/
3426 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
3427                             struct sk_buff *skb)
3428 {
3429         if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3430                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3431                                          le16_to_cpu(vlan) &
3432                                          E1000_RXD_SPC_VLAN_MASK);
3433         else
3434                 netif_receive_skb(skb);
3435 }
3436
3437
3438 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3439                                        u32 status_err, struct sk_buff *skb)
3440 {
3441         skb->ip_summed = CHECKSUM_NONE;
3442
3443         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3444         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3445                 return;
3446         /* TCP/UDP checksum error bit is set */
3447         if (status_err &
3448             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3449                 /* let the stack verify checksum errors */
3450                 adapter->hw_csum_err++;
3451                 return;
3452         }
3453         /* It must be a TCP or UDP packet with a valid checksum */
3454         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3455                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3456
3457         adapter->hw_csum_good++;
3458 }
3459
3460 static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter,
3461                                       struct igb_ring *rx_ring,
3462                                       int *work_done, int budget)
3463 {
3464         struct net_device *netdev = adapter->netdev;
3465         struct pci_dev *pdev = adapter->pdev;
3466         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3467         struct igb_buffer *buffer_info , *next_buffer;
3468         struct sk_buff *skb;
3469         unsigned int i, j;
3470         u32 length, hlen, staterr;
3471         bool cleaned = false;
3472         int cleaned_count = 0;
3473         unsigned int total_bytes = 0, total_packets = 0;
3474
3475         i = rx_ring->next_to_clean;
3476         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3477         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3478
3479         while (staterr & E1000_RXD_STAT_DD) {
3480                 if (*work_done >= budget)
3481                         break;
3482                 (*work_done)++;
3483                 buffer_info = &rx_ring->buffer_info[i];
3484
3485                 /* HW will not DMA in data larger than the given buffer, even
3486                  * if it parses the (NFS, of course) header to be larger.  In
3487                  * that case, it fills the header buffer and spills the rest
3488                  * into the page.
3489                  */
3490                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3491                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3492                 if (hlen > adapter->rx_ps_hdr_size)
3493                         hlen = adapter->rx_ps_hdr_size;
3494
3495                 length = le16_to_cpu(rx_desc->wb.upper.length);
3496                 cleaned = true;
3497                 cleaned_count++;
3498
3499                 if (rx_ring->pending_skb != NULL) {
3500                         skb = rx_ring->pending_skb;
3501                         rx_ring->pending_skb = NULL;
3502                         j = rx_ring->pending_skb_page;
3503                 } else {
3504                         skb = buffer_info->skb;
3505                         prefetch(skb->data - NET_IP_ALIGN);
3506                         buffer_info->skb = NULL;
3507                         if (hlen) {
3508                                 pci_unmap_single(pdev, buffer_info->dma,
3509                                                  adapter->rx_ps_hdr_size +
3510                                                    NET_IP_ALIGN,
3511                                                  PCI_DMA_FROMDEVICE);
3512                                 skb_put(skb, hlen);
3513                         } else {
3514                                 pci_unmap_single(pdev, buffer_info->dma,
3515                                                  adapter->rx_buffer_len +
3516                                                    NET_IP_ALIGN,
3517                                                  PCI_DMA_FROMDEVICE);
3518                                 skb_put(skb, length);
3519                                 goto send_up;
3520                         }
3521                         j = 0;
3522                 }
3523
3524                 while (length) {
3525                         pci_unmap_page(pdev, buffer_info->page_dma,
3526                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3527                         buffer_info->page_dma = 0;
3528                         skb_fill_page_desc(skb, j, buffer_info->page,
3529                                                 0, length);
3530                         buffer_info->page = NULL;
3531
3532                         skb->len += length;
3533                         skb->data_len += length;
3534                         skb->truesize += length;
3535                         rx_desc->wb.upper.status_error = 0;
3536                         if (staterr & E1000_RXD_STAT_EOP)
3537                                 break;
3538
3539                         j++;
3540                         cleaned_count++;
3541                         i++;
3542                         if (i == rx_ring->count)
3543                                 i = 0;
3544
3545                         buffer_info = &rx_ring->buffer_info[i];
3546                         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3547                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3548                         length = le16_to_cpu(rx_desc->wb.upper.length);
3549                         if (!(staterr & E1000_RXD_STAT_DD)) {
3550                                 rx_ring->pending_skb = skb;
3551                                 rx_ring->pending_skb_page = j;
3552                                 goto out;
3553                         }
3554                 }
3555 send_up:
3556                 pskb_trim(skb, skb->len - 4);
3557                 i++;
3558                 if (i == rx_ring->count)
3559                         i = 0;
3560                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3561                 prefetch(next_rxd);
3562                 next_buffer = &rx_ring->buffer_info[i];
3563
3564                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3565                         dev_kfree_skb_irq(skb);
3566                         goto next_desc;
3567                 }
3568                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3569
3570                 total_bytes += skb->len;
3571                 total_packets++;
3572
3573                 igb_rx_checksum_adv(adapter, staterr, skb);
3574
3575                 skb->protocol = eth_type_trans(skb, netdev);
3576
3577                 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3578
3579                 netdev->last_rx = jiffies;
3580
3581 next_desc:
3582                 rx_desc->wb.upper.status_error = 0;
3583
3584                 /* return some buffers to hardware, one at a time is too slow */
3585                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3586                         igb_alloc_rx_buffers_adv(adapter, rx_ring,
3587                                                  cleaned_count);
3588                         cleaned_count = 0;
3589                 }
3590
3591                 /* use prefetched values */
3592                 rx_desc = next_rxd;
3593                 buffer_info = next_buffer;
3594
3595                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3596         }
3597 out:
3598         rx_ring->next_to_clean = i;
3599         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3600
3601         if (cleaned_count)
3602                 igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count);
3603
3604         rx_ring->total_packets += total_packets;
3605         rx_ring->total_bytes += total_bytes;
3606         rx_ring->rx_stats.packets += total_packets;
3607         rx_ring->rx_stats.bytes += total_bytes;
3608         adapter->net_stats.rx_bytes += total_bytes;
3609         adapter->net_stats.rx_packets += total_packets;
3610         return cleaned;
3611 }
3612
3613
3614 /**
3615  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3616  * @adapter: address of board private structure
3617  **/
3618 static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter,
3619                                      struct igb_ring *rx_ring,
3620                                      int cleaned_count)
3621 {
3622         struct net_device *netdev = adapter->netdev;
3623         struct pci_dev *pdev = adapter->pdev;
3624         union e1000_adv_rx_desc *rx_desc;
3625         struct igb_buffer *buffer_info;
3626         struct sk_buff *skb;
3627         unsigned int i;
3628
3629         i = rx_ring->next_to_use;
3630         buffer_info = &rx_ring->buffer_info[i];
3631
3632         while (cleaned_count--) {
3633                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3634
3635                 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3636                         buffer_info->page = alloc_page(GFP_ATOMIC);
3637                         if (!buffer_info->page) {
3638                                 adapter->alloc_rx_buff_failed++;
3639                                 goto no_buffers;
3640                         }
3641                         buffer_info->page_dma =
3642                                 pci_map_page(pdev,
3643                                              buffer_info->page,
3644                                              0, PAGE_SIZE,
3645                                              PCI_DMA_FROMDEVICE);
3646                 }
3647
3648                 if (!buffer_info->skb) {
3649                         int bufsz;
3650
3651                         if (adapter->rx_ps_hdr_size)
3652                                 bufsz = adapter->rx_ps_hdr_size;
3653                         else
3654                                 bufsz = adapter->rx_buffer_len;
3655                         bufsz += NET_IP_ALIGN;
3656                         skb = netdev_alloc_skb(netdev, bufsz);
3657
3658                         if (!skb) {
3659                                 adapter->alloc_rx_buff_failed++;
3660                                 goto no_buffers;
3661                         }
3662
3663                         /* Make buffer alignment 2 beyond a 16 byte boundary
3664                          * this will result in a 16 byte aligned IP header after
3665                          * the 14 byte MAC header is removed
3666                          */
3667                         skb_reserve(skb, NET_IP_ALIGN);
3668
3669                         buffer_info->skb = skb;
3670                         buffer_info->dma = pci_map_single(pdev, skb->data,
3671                                                           bufsz,
3672                                                           PCI_DMA_FROMDEVICE);
3673
3674                 }
3675                 /* Refresh the desc even if buffer_addrs didn't change because
3676                  * each write-back erases this info. */
3677                 if (adapter->rx_ps_hdr_size) {
3678                         rx_desc->read.pkt_addr =
3679                              cpu_to_le64(buffer_info->page_dma);
3680                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3681                 } else {
3682                         rx_desc->read.pkt_addr =
3683                              cpu_to_le64(buffer_info->dma);
3684                         rx_desc->read.hdr_addr = 0;
3685                 }
3686
3687                 i++;
3688                 if (i == rx_ring->count)
3689                         i = 0;
3690                 buffer_info = &rx_ring->buffer_info[i];
3691         }
3692
3693 no_buffers:
3694         if (rx_ring->next_to_use != i) {
3695                 rx_ring->next_to_use = i;
3696                 if (i == 0)
3697                         i = (rx_ring->count - 1);
3698                 else
3699                         i--;
3700
3701                 /* Force memory writes to complete before letting h/w
3702                  * know there are new descriptors to fetch.  (Only
3703                  * applicable for weak-ordered memory model archs,
3704                  * such as IA-64). */
3705                 wmb();
3706                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3707         }
3708 }
3709
3710 /**
3711  * igb_mii_ioctl -
3712  * @netdev:
3713  * @ifreq:
3714  * @cmd:
3715  **/
3716 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3717 {
3718         struct igb_adapter *adapter = netdev_priv(netdev);
3719         struct mii_ioctl_data *data = if_mii(ifr);
3720
3721         if (adapter->hw.phy.media_type != e1000_media_type_copper)
3722                 return -EOPNOTSUPP;
3723
3724         switch (cmd) {
3725         case SIOCGMIIPHY:
3726                 data->phy_id = adapter->hw.phy.addr;
3727                 break;
3728         case SIOCGMIIREG:
3729                 if (!capable(CAP_NET_ADMIN))
3730                         return -EPERM;
3731                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3732                                                      data->reg_num
3733                                                      & 0x1F, &data->val_out))
3734                         return -EIO;
3735                 break;
3736         case SIOCSMIIREG:
3737         default:
3738                 return -EOPNOTSUPP;
3739         }
3740         return 0;
3741 }
3742
3743 /**
3744  * igb_ioctl -
3745  * @netdev:
3746  * @ifreq:
3747  * @cmd:
3748  **/
3749 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3750 {
3751         switch (cmd) {
3752         case SIOCGMIIPHY:
3753         case SIOCGMIIREG:
3754         case SIOCSMIIREG:
3755                 return igb_mii_ioctl(netdev, ifr, cmd);
3756         default:
3757                 return -EOPNOTSUPP;
3758         }
3759 }
3760
3761 static void igb_vlan_rx_register(struct net_device *netdev,
3762                                  struct vlan_group *grp)
3763 {
3764         struct igb_adapter *adapter = netdev_priv(netdev);
3765         struct e1000_hw *hw = &adapter->hw;
3766         u32 ctrl, rctl;
3767
3768         igb_irq_disable(adapter);
3769         adapter->vlgrp = grp;
3770
3771         if (grp) {
3772                 /* enable VLAN tag insert/strip */
3773                 ctrl = rd32(E1000_CTRL);
3774                 ctrl |= E1000_CTRL_VME;
3775                 wr32(E1000_CTRL, ctrl);
3776
3777                 /* enable VLAN receive filtering */
3778                 rctl = rd32(E1000_RCTL);
3779                 rctl |= E1000_RCTL_VFE;
3780                 rctl &= ~E1000_RCTL_CFIEN;
3781                 wr32(E1000_RCTL, rctl);
3782                 igb_update_mng_vlan(adapter);
3783                 wr32(E1000_RLPML,
3784                                 adapter->max_frame_size + VLAN_TAG_SIZE);
3785         } else {
3786                 /* disable VLAN tag insert/strip */
3787                 ctrl = rd32(E1000_CTRL);
3788                 ctrl &= ~E1000_CTRL_VME;
3789                 wr32(E1000_CTRL, ctrl);
3790
3791                 /* disable VLAN filtering */
3792                 rctl = rd32(E1000_RCTL);
3793                 rctl &= ~E1000_RCTL_VFE;
3794                 wr32(E1000_RCTL, rctl);
3795                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3796                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3797                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3798                 }
3799                 wr32(E1000_RLPML,
3800                                 adapter->max_frame_size);
3801         }
3802
3803         if (!test_bit(__IGB_DOWN, &adapter->state))
3804                 igb_irq_enable(adapter);
3805 }
3806
3807 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3808 {
3809         struct igb_adapter *adapter = netdev_priv(netdev);
3810         struct e1000_hw *hw = &adapter->hw;
3811         u32 vfta, index;
3812
3813         if ((adapter->hw.mng_cookie.status &
3814              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3815             (vid == adapter->mng_vlan_id))
3816                 return;
3817         /* add VID to filter table */
3818         index = (vid >> 5) & 0x7F;
3819         vfta = array_rd32(E1000_VFTA, index);
3820         vfta |= (1 << (vid & 0x1F));
3821         igb_write_vfta(&adapter->hw, index, vfta);
3822 }
3823
3824 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3825 {
3826         struct igb_adapter *adapter = netdev_priv(netdev);
3827         struct e1000_hw *hw = &adapter->hw;
3828         u32 vfta, index;
3829
3830         igb_irq_disable(adapter);
3831         vlan_group_set_device(adapter->vlgrp, vid, NULL);
3832
3833         if (!test_bit(__IGB_DOWN, &adapter->state))
3834                 igb_irq_enable(adapter);
3835
3836         if ((adapter->hw.mng_cookie.status &
3837              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3838             (vid == adapter->mng_vlan_id)) {
3839                 /* release control to f/w */
3840                 igb_release_hw_control(adapter);
3841                 return;
3842         }
3843
3844         /* remove VID from filter table */
3845         index = (vid >> 5) & 0x7F;
3846         vfta = array_rd32(E1000_VFTA, index);
3847         vfta &= ~(1 << (vid & 0x1F));
3848         igb_write_vfta(&adapter->hw, index, vfta);
3849 }
3850
3851 static void igb_restore_vlan(struct igb_adapter *adapter)
3852 {
3853         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3854
3855         if (adapter->vlgrp) {
3856                 u16 vid;
3857                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3858                         if (!vlan_group_get_device(adapter->vlgrp, vid))
3859                                 continue;
3860                         igb_vlan_rx_add_vid(adapter->netdev, vid);
3861                 }
3862         }
3863 }
3864
3865 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
3866 {
3867         struct e1000_mac_info *mac = &adapter->hw.mac;
3868
3869         mac->autoneg = 0;
3870
3871         /* Fiber NICs only allow 1000 gbps Full duplex */
3872         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
3873                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3874                 dev_err(&adapter->pdev->dev,
3875                         "Unsupported Speed/Duplex configuration\n");
3876                 return -EINVAL;
3877         }
3878
3879         switch (spddplx) {
3880         case SPEED_10 + DUPLEX_HALF:
3881                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
3882                 break;
3883         case SPEED_10 + DUPLEX_FULL:
3884                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
3885                 break;
3886         case SPEED_100 + DUPLEX_HALF:
3887                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
3888                 break;
3889         case SPEED_100 + DUPLEX_FULL:
3890                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
3891                 break;
3892         case SPEED_1000 + DUPLEX_FULL:
3893                 mac->autoneg = 1;
3894                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
3895                 break;
3896         case SPEED_1000 + DUPLEX_HALF: /* not supported */
3897         default:
3898                 dev_err(&adapter->pdev->dev,
3899                         "Unsupported Speed/Duplex configuration\n");
3900                 return -EINVAL;
3901         }
3902         return 0;
3903 }
3904
3905
3906 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
3907 {
3908         struct net_device *netdev = pci_get_drvdata(pdev);
3909         struct igb_adapter *adapter = netdev_priv(netdev);
3910         struct e1000_hw *hw = &adapter->hw;
3911         u32 ctrl, ctrl_ext, rctl, status;
3912         u32 wufc = adapter->wol;
3913 #ifdef CONFIG_PM
3914         int retval = 0;
3915 #endif
3916
3917         netif_device_detach(netdev);
3918
3919         if (netif_running(netdev)) {
3920                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3921                 igb_down(adapter);
3922                 igb_free_irq(adapter);
3923         }
3924
3925 #ifdef CONFIG_PM
3926         retval = pci_save_state(pdev);
3927         if (retval)
3928                 return retval;
3929 #endif
3930
3931         status = rd32(E1000_STATUS);
3932         if (status & E1000_STATUS_LU)
3933                 wufc &= ~E1000_WUFC_LNKC;
3934
3935         if (wufc) {
3936                 igb_setup_rctl(adapter);
3937                 igb_set_multi(netdev);
3938
3939                 /* turn on all-multi mode if wake on multicast is enabled */
3940                 if (wufc & E1000_WUFC_MC) {
3941                         rctl = rd32(E1000_RCTL);
3942                         rctl |= E1000_RCTL_MPE;
3943                         wr32(E1000_RCTL, rctl);
3944                 }
3945
3946                 ctrl = rd32(E1000_CTRL);
3947                 /* advertise wake from D3Cold */
3948                 #define E1000_CTRL_ADVD3WUC 0x00100000
3949                 /* phy power management enable */
3950                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3951                 ctrl |= E1000_CTRL_ADVD3WUC;
3952                 wr32(E1000_CTRL, ctrl);
3953
3954                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3955                    adapter->hw.phy.media_type ==
3956                                         e1000_media_type_internal_serdes) {
3957                         /* keep the laser running in D3 */
3958                         ctrl_ext = rd32(E1000_CTRL_EXT);
3959                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3960                         wr32(E1000_CTRL_EXT, ctrl_ext);
3961                 }
3962
3963                 /* Allow time for pending master requests to run */
3964                 igb_disable_pcie_master(&adapter->hw);
3965
3966                 wr32(E1000_WUC, E1000_WUC_PME_EN);
3967                 wr32(E1000_WUFC, wufc);
3968                 pci_enable_wake(pdev, PCI_D3hot, 1);
3969                 pci_enable_wake(pdev, PCI_D3cold, 1);
3970         } else {
3971                 wr32(E1000_WUC, 0);
3972                 wr32(E1000_WUFC, 0);
3973                 pci_enable_wake(pdev, PCI_D3hot, 0);
3974                 pci_enable_wake(pdev, PCI_D3cold, 0);
3975         }
3976
3977         /* make sure adapter isn't asleep if manageability is enabled */
3978         if (adapter->en_mng_pt) {
3979                 pci_enable_wake(pdev, PCI_D3hot, 1);
3980                 pci_enable_wake(pdev, PCI_D3cold, 1);
3981         }
3982
3983         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3984          * would have already happened in close and is redundant. */
3985         igb_release_hw_control(adapter);
3986
3987         pci_disable_device(pdev);
3988
3989         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3990
3991         return 0;
3992 }
3993
3994 #ifdef CONFIG_PM
3995 static int igb_resume(struct pci_dev *pdev)
3996 {
3997         struct net_device *netdev = pci_get_drvdata(pdev);
3998         struct igb_adapter *adapter = netdev_priv(netdev);
3999         struct e1000_hw *hw = &adapter->hw;
4000         u32 err;
4001
4002         pci_set_power_state(pdev, PCI_D0);
4003         pci_restore_state(pdev);
4004
4005         if (adapter->need_ioport)
4006                 err = pci_enable_device(pdev);
4007         else
4008                 err = pci_enable_device_mem(pdev);
4009         if (err) {
4010                 dev_err(&pdev->dev,
4011                         "igb: Cannot enable PCI device from suspend\n");
4012                 return err;
4013         }
4014         pci_set_master(pdev);
4015
4016         pci_enable_wake(pdev, PCI_D3hot, 0);
4017         pci_enable_wake(pdev, PCI_D3cold, 0);
4018
4019         if (netif_running(netdev)) {
4020                 err = igb_request_irq(adapter);
4021                 if (err)
4022                         return err;
4023         }
4024
4025         /* e1000_power_up_phy(adapter); */
4026
4027         igb_reset(adapter);
4028         wr32(E1000_WUS, ~0);
4029
4030         igb_init_manageability(adapter);
4031
4032         if (netif_running(netdev))
4033                 igb_up(adapter);
4034
4035         netif_device_attach(netdev);
4036
4037         /* let the f/w know that the h/w is now under the control of the
4038          * driver. */
4039         igb_get_hw_control(adapter);
4040
4041         return 0;
4042 }
4043 #endif
4044
4045 static void igb_shutdown(struct pci_dev *pdev)
4046 {
4047         igb_suspend(pdev, PMSG_SUSPEND);
4048 }
4049
4050 #ifdef CONFIG_NET_POLL_CONTROLLER
4051 /*
4052  * Polling 'interrupt' - used by things like netconsole to send skbs
4053  * without having to re-enable interrupts. It's not called while
4054  * the interrupt routine is executing.
4055  */
4056 static void igb_netpoll(struct net_device *netdev)
4057 {
4058         struct igb_adapter *adapter = netdev_priv(netdev);
4059         int i;
4060         int work_done = 0;
4061
4062         igb_irq_disable(adapter);
4063         for (i = 0; i < adapter->num_tx_queues; i++)
4064                 igb_clean_tx_irq(adapter, &adapter->tx_ring[i]);
4065
4066         for (i = 0; i < adapter->num_rx_queues; i++)
4067                 igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i],
4068                                      &work_done,
4069                                      adapter->rx_ring[i].napi.weight);
4070
4071         igb_irq_enable(adapter);
4072 }
4073 #endif /* CONFIG_NET_POLL_CONTROLLER */
4074
4075 /**
4076  * igb_io_error_detected - called when PCI error is detected
4077  * @pdev: Pointer to PCI device
4078  * @state: The current pci connection state
4079  *
4080  * This function is called after a PCI bus error affecting
4081  * this device has been detected.
4082  */
4083 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4084                                               pci_channel_state_t state)
4085 {
4086         struct net_device *netdev = pci_get_drvdata(pdev);
4087         struct igb_adapter *adapter = netdev_priv(netdev);
4088
4089         netif_device_detach(netdev);
4090
4091         if (netif_running(netdev))
4092                 igb_down(adapter);
4093         pci_disable_device(pdev);
4094
4095         /* Request a slot slot reset. */
4096         return PCI_ERS_RESULT_NEED_RESET;
4097 }
4098
4099 /**
4100  * igb_io_slot_reset - called after the pci bus has been reset.
4101  * @pdev: Pointer to PCI device
4102  *
4103  * Restart the card from scratch, as if from a cold-boot. Implementation
4104  * resembles the first-half of the igb_resume routine.
4105  */
4106 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4107 {
4108         struct net_device *netdev = pci_get_drvdata(pdev);
4109         struct igb_adapter *adapter = netdev_priv(netdev);
4110         struct e1000_hw *hw = &adapter->hw;
4111         int err;
4112
4113         if (adapter->need_ioport)
4114                 err = pci_enable_device(pdev);
4115         else
4116                 err = pci_enable_device_mem(pdev);
4117         if (err) {
4118                 dev_err(&pdev->dev,
4119                         "Cannot re-enable PCI device after reset.\n");
4120                 return PCI_ERS_RESULT_DISCONNECT;
4121         }
4122         pci_set_master(pdev);
4123         pci_restore_state(pdev);
4124
4125         pci_enable_wake(pdev, PCI_D3hot, 0);
4126         pci_enable_wake(pdev, PCI_D3cold, 0);
4127
4128         igb_reset(adapter);
4129         wr32(E1000_WUS, ~0);
4130
4131         return PCI_ERS_RESULT_RECOVERED;
4132 }
4133
4134 /**
4135  * igb_io_resume - called when traffic can start flowing again.
4136  * @pdev: Pointer to PCI device
4137  *
4138  * This callback is called when the error recovery driver tells us that
4139  * its OK to resume normal operation. Implementation resembles the
4140  * second-half of the igb_resume routine.
4141  */
4142 static void igb_io_resume(struct pci_dev *pdev)
4143 {
4144         struct net_device *netdev = pci_get_drvdata(pdev);
4145         struct igb_adapter *adapter = netdev_priv(netdev);
4146
4147         igb_init_manageability(adapter);
4148
4149         if (netif_running(netdev)) {
4150                 if (igb_up(adapter)) {
4151                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4152                         return;
4153                 }
4154         }
4155
4156         netif_device_attach(netdev);
4157
4158         /* let the f/w know that the h/w is now under the control of the
4159          * driver. */
4160         igb_get_hw_control(adapter);
4161
4162 }
4163
4164 /* igb_main.c */