e8ef5410591a4c94f52aea40a49498dee9b229b1
[linux-2.6.git] / drivers / net / igb / igb_main.c
1 /*******************************************************************************
2
3   Intel(R) Gigabit Ethernet Linux driver
4   Copyright(c) 2007 Intel Corporation.
5
6   This program is free software; you can redistribute it and/or modify it
7   under the terms and conditions of the GNU General Public License,
8   version 2, as published by the Free Software Foundation.
9
10   This program is distributed in the hope it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc.,
17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19   The full GNU General Public License is included in this distribution in
20   the file called "COPYING".
21
22   Contact Information:
23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
44 #ifdef CONFIG_DCA
45 #include <linux/dca.h>
46 #endif
47 #include "igb.h"
48
49 #define DRV_VERSION "1.0.8-k2"
50 char igb_driver_name[] = "igb";
51 char igb_driver_version[] = DRV_VERSION;
52 static const char igb_driver_string[] =
53                                 "Intel(R) Gigabit Ethernet Network Driver";
54 static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation.";
55
56
57 static const struct e1000_info *igb_info_tbl[] = {
58         [board_82575] = &e1000_82575_info,
59 };
60
61 static struct pci_device_id igb_pci_tbl[] = {
62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
65         /* required last entry */
66         {0, }
67 };
68
69 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
70
71 void igb_reset(struct igb_adapter *);
72 static int igb_setup_all_tx_resources(struct igb_adapter *);
73 static int igb_setup_all_rx_resources(struct igb_adapter *);
74 static void igb_free_all_tx_resources(struct igb_adapter *);
75 static void igb_free_all_rx_resources(struct igb_adapter *);
76 static void igb_free_tx_resources(struct igb_ring *);
77 static void igb_free_rx_resources(struct igb_ring *);
78 void igb_update_stats(struct igb_adapter *);
79 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
80 static void __devexit igb_remove(struct pci_dev *pdev);
81 static int igb_sw_init(struct igb_adapter *);
82 static int igb_open(struct net_device *);
83 static int igb_close(struct net_device *);
84 static void igb_configure_tx(struct igb_adapter *);
85 static void igb_configure_rx(struct igb_adapter *);
86 static void igb_setup_rctl(struct igb_adapter *);
87 static void igb_clean_all_tx_rings(struct igb_adapter *);
88 static void igb_clean_all_rx_rings(struct igb_adapter *);
89 static void igb_clean_tx_ring(struct igb_ring *);
90 static void igb_clean_rx_ring(struct igb_ring *);
91 static void igb_set_multi(struct net_device *);
92 static void igb_update_phy_info(unsigned long);
93 static void igb_watchdog(unsigned long);
94 static void igb_watchdog_task(struct work_struct *);
95 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
96                                   struct igb_ring *);
97 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
98 static struct net_device_stats *igb_get_stats(struct net_device *);
99 static int igb_change_mtu(struct net_device *, int);
100 static int igb_set_mac(struct net_device *, void *);
101 static irqreturn_t igb_intr(int irq, void *);
102 static irqreturn_t igb_intr_msi(int irq, void *);
103 static irqreturn_t igb_msix_other(int irq, void *);
104 static irqreturn_t igb_msix_rx(int irq, void *);
105 static irqreturn_t igb_msix_tx(int irq, void *);
106 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
107 #ifdef CONFIG_DCA
108 static void igb_update_rx_dca(struct igb_ring *);
109 static void igb_update_tx_dca(struct igb_ring *);
110 static void igb_setup_dca(struct igb_adapter *);
111 #endif /* CONFIG_DCA */
112 static bool igb_clean_tx_irq(struct igb_ring *);
113 static int igb_poll(struct napi_struct *, int);
114 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
115 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
116 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
117 static void igb_tx_timeout(struct net_device *);
118 static void igb_reset_task(struct work_struct *);
119 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
120 static void igb_vlan_rx_add_vid(struct net_device *, u16);
121 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
122 static void igb_restore_vlan(struct igb_adapter *);
123
124 static int igb_suspend(struct pci_dev *, pm_message_t);
125 #ifdef CONFIG_PM
126 static int igb_resume(struct pci_dev *);
127 #endif
128 static void igb_shutdown(struct pci_dev *);
129 #ifdef CONFIG_DCA
130 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
131 static struct notifier_block dca_notifier = {
132         .notifier_call  = igb_notify_dca,
133         .next           = NULL,
134         .priority       = 0
135 };
136 #endif
137
138 #ifdef CONFIG_NET_POLL_CONTROLLER
139 /* for netdump / net console */
140 static void igb_netpoll(struct net_device *);
141 #endif
142
143 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
144                      pci_channel_state_t);
145 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
146 static void igb_io_resume(struct pci_dev *);
147
148 static struct pci_error_handlers igb_err_handler = {
149         .error_detected = igb_io_error_detected,
150         .slot_reset = igb_io_slot_reset,
151         .resume = igb_io_resume,
152 };
153
154
155 static struct pci_driver igb_driver = {
156         .name     = igb_driver_name,
157         .id_table = igb_pci_tbl,
158         .probe    = igb_probe,
159         .remove   = __devexit_p(igb_remove),
160 #ifdef CONFIG_PM
161         /* Power Managment Hooks */
162         .suspend  = igb_suspend,
163         .resume   = igb_resume,
164 #endif
165         .shutdown = igb_shutdown,
166         .err_handler = &igb_err_handler
167 };
168
169 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
170 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
171 MODULE_LICENSE("GPL");
172 MODULE_VERSION(DRV_VERSION);
173
174 #ifdef DEBUG
175 /**
176  * igb_get_hw_dev_name - return device name string
177  * used by hardware layer to print debugging information
178  **/
179 char *igb_get_hw_dev_name(struct e1000_hw *hw)
180 {
181         struct igb_adapter *adapter = hw->back;
182         return adapter->netdev->name;
183 }
184 #endif
185
186 /**
187  * igb_init_module - Driver Registration Routine
188  *
189  * igb_init_module is the first routine called when the driver is
190  * loaded. All it does is register with the PCI subsystem.
191  **/
192 static int __init igb_init_module(void)
193 {
194         int ret;
195         printk(KERN_INFO "%s - version %s\n",
196                igb_driver_string, igb_driver_version);
197
198         printk(KERN_INFO "%s\n", igb_copyright);
199
200         ret = pci_register_driver(&igb_driver);
201 #ifdef CONFIG_DCA
202         dca_register_notify(&dca_notifier);
203 #endif
204         return ret;
205 }
206
207 module_init(igb_init_module);
208
209 /**
210  * igb_exit_module - Driver Exit Cleanup Routine
211  *
212  * igb_exit_module is called just before the driver is removed
213  * from memory.
214  **/
215 static void __exit igb_exit_module(void)
216 {
217 #ifdef CONFIG_DCA
218         dca_unregister_notify(&dca_notifier);
219 #endif
220         pci_unregister_driver(&igb_driver);
221 }
222
223 module_exit(igb_exit_module);
224
225 /**
226  * igb_alloc_queues - Allocate memory for all rings
227  * @adapter: board private structure to initialize
228  *
229  * We allocate one ring per queue at run-time since we don't know the
230  * number of queues at compile-time.
231  **/
232 static int igb_alloc_queues(struct igb_adapter *adapter)
233 {
234         int i;
235
236         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
237                                    sizeof(struct igb_ring), GFP_KERNEL);
238         if (!adapter->tx_ring)
239                 return -ENOMEM;
240
241         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
242                                    sizeof(struct igb_ring), GFP_KERNEL);
243         if (!adapter->rx_ring) {
244                 kfree(adapter->tx_ring);
245                 return -ENOMEM;
246         }
247
248         for (i = 0; i < adapter->num_tx_queues; i++) {
249                 struct igb_ring *ring = &(adapter->tx_ring[i]);
250                 ring->adapter = adapter;
251                 ring->queue_index = i;
252         }
253         for (i = 0; i < adapter->num_rx_queues; i++) {
254                 struct igb_ring *ring = &(adapter->rx_ring[i]);
255                 ring->adapter = adapter;
256                 ring->queue_index = i;
257                 ring->itr_register = E1000_ITR;
258
259                 /* set a default napi handler for each rx_ring */
260                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
261         }
262         return 0;
263 }
264
265 #define IGB_N0_QUEUE -1
266 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
267                               int tx_queue, int msix_vector)
268 {
269         u32 msixbm = 0;
270         struct e1000_hw *hw = &adapter->hw;
271                 /* The 82575 assigns vectors using a bitmask, which matches the
272                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
273                    or more queues to a vector, we write the appropriate bits
274                    into the MSIXBM register for that vector. */
275                 if (rx_queue > IGB_N0_QUEUE) {
276                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
277                         adapter->rx_ring[rx_queue].eims_value = msixbm;
278                 }
279                 if (tx_queue > IGB_N0_QUEUE) {
280                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
281                         adapter->tx_ring[tx_queue].eims_value =
282                                   E1000_EICR_TX_QUEUE0 << tx_queue;
283                 }
284                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
285 }
286
287 /**
288  * igb_configure_msix - Configure MSI-X hardware
289  *
290  * igb_configure_msix sets up the hardware to properly
291  * generate MSI-X interrupts.
292  **/
293 static void igb_configure_msix(struct igb_adapter *adapter)
294 {
295         u32 tmp;
296         int i, vector = 0;
297         struct e1000_hw *hw = &adapter->hw;
298
299         adapter->eims_enable_mask = 0;
300
301         for (i = 0; i < adapter->num_tx_queues; i++) {
302                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
303                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
304                 adapter->eims_enable_mask |= tx_ring->eims_value;
305                 if (tx_ring->itr_val)
306                         writel(1000000000 / (tx_ring->itr_val * 256),
307                                hw->hw_addr + tx_ring->itr_register);
308                 else
309                         writel(1, hw->hw_addr + tx_ring->itr_register);
310         }
311
312         for (i = 0; i < adapter->num_rx_queues; i++) {
313                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
314                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
315                 adapter->eims_enable_mask |= rx_ring->eims_value;
316                 if (rx_ring->itr_val)
317                         writel(1000000000 / (rx_ring->itr_val * 256),
318                                hw->hw_addr + rx_ring->itr_register);
319                 else
320                         writel(1, hw->hw_addr + rx_ring->itr_register);
321         }
322
323
324         /* set vector for other causes, i.e. link changes */
325                 array_wr32(E1000_MSIXBM(0), vector++,
326                                       E1000_EIMS_OTHER);
327
328                 tmp = rd32(E1000_CTRL_EXT);
329                 /* enable MSI-X PBA support*/
330                 tmp |= E1000_CTRL_EXT_PBA_CLR;
331
332                 /* Auto-Mask interrupts upon ICR read. */
333                 tmp |= E1000_CTRL_EXT_EIAME;
334                 tmp |= E1000_CTRL_EXT_IRCA;
335
336                 wr32(E1000_CTRL_EXT, tmp);
337                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
338                 adapter->eims_other = E1000_EIMS_OTHER;
339
340         wrfl();
341 }
342
343 /**
344  * igb_request_msix - Initialize MSI-X interrupts
345  *
346  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
347  * kernel.
348  **/
349 static int igb_request_msix(struct igb_adapter *adapter)
350 {
351         struct net_device *netdev = adapter->netdev;
352         int i, err = 0, vector = 0;
353
354         vector = 0;
355
356         for (i = 0; i < adapter->num_tx_queues; i++) {
357                 struct igb_ring *ring = &(adapter->tx_ring[i]);
358                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
359                 err = request_irq(adapter->msix_entries[vector].vector,
360                                   &igb_msix_tx, 0, ring->name,
361                                   &(adapter->tx_ring[i]));
362                 if (err)
363                         goto out;
364                 ring->itr_register = E1000_EITR(0) + (vector << 2);
365                 ring->itr_val = adapter->itr;
366                 vector++;
367         }
368         for (i = 0; i < adapter->num_rx_queues; i++) {
369                 struct igb_ring *ring = &(adapter->rx_ring[i]);
370                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
371                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
372                 else
373                         memcpy(ring->name, netdev->name, IFNAMSIZ);
374                 err = request_irq(adapter->msix_entries[vector].vector,
375                                   &igb_msix_rx, 0, ring->name,
376                                   &(adapter->rx_ring[i]));
377                 if (err)
378                         goto out;
379                 ring->itr_register = E1000_EITR(0) + (vector << 2);
380                 ring->itr_val = adapter->itr;
381                 /* overwrite the poll routine for MSIX, we've already done
382                  * netif_napi_add */
383                 ring->napi.poll = &igb_clean_rx_ring_msix;
384                 vector++;
385         }
386
387         err = request_irq(adapter->msix_entries[vector].vector,
388                           &igb_msix_other, 0, netdev->name, netdev);
389         if (err)
390                 goto out;
391
392         igb_configure_msix(adapter);
393         return 0;
394 out:
395         return err;
396 }
397
398 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
399 {
400         if (adapter->msix_entries) {
401                 pci_disable_msix(adapter->pdev);
402                 kfree(adapter->msix_entries);
403                 adapter->msix_entries = NULL;
404         } else if (adapter->msi_enabled)
405                 pci_disable_msi(adapter->pdev);
406         return;
407 }
408
409
410 /**
411  * igb_set_interrupt_capability - set MSI or MSI-X if supported
412  *
413  * Attempt to configure interrupts using the best available
414  * capabilities of the hardware and kernel.
415  **/
416 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
417 {
418         int err;
419         int numvecs, i;
420
421         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
422         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
423                                         GFP_KERNEL);
424         if (!adapter->msix_entries)
425                 goto msi_only;
426
427         for (i = 0; i < numvecs; i++)
428                 adapter->msix_entries[i].entry = i;
429
430         err = pci_enable_msix(adapter->pdev,
431                               adapter->msix_entries,
432                               numvecs);
433         if (err == 0)
434                 return;
435
436         igb_reset_interrupt_capability(adapter);
437
438         /* If we can't do MSI-X, try MSI */
439 msi_only:
440         adapter->num_rx_queues = 1;
441         adapter->num_tx_queues = 1;
442         if (!pci_enable_msi(adapter->pdev))
443                 adapter->msi_enabled = 1;
444
445 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
446         /* Notify the stack of the (possibly) reduced Tx Queue count. */
447         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
448 #endif
449         return;
450 }
451
452 /**
453  * igb_request_irq - initialize interrupts
454  *
455  * Attempts to configure interrupts using the best available
456  * capabilities of the hardware and kernel.
457  **/
458 static int igb_request_irq(struct igb_adapter *adapter)
459 {
460         struct net_device *netdev = adapter->netdev;
461         struct e1000_hw *hw = &adapter->hw;
462         int err = 0;
463
464         if (adapter->msix_entries) {
465                 err = igb_request_msix(adapter);
466                 if (!err)
467                         goto request_done;
468                 /* fall back to MSI */
469                 igb_reset_interrupt_capability(adapter);
470                 if (!pci_enable_msi(adapter->pdev))
471                         adapter->msi_enabled = 1;
472                 igb_free_all_tx_resources(adapter);
473                 igb_free_all_rx_resources(adapter);
474                 adapter->num_rx_queues = 1;
475                 igb_alloc_queues(adapter);
476         } else {
477                 wr32(E1000_MSIXBM(0), (E1000_EICR_RX_QUEUE0 |
478                                        E1000_EIMS_OTHER));
479         }
480
481         if (adapter->msi_enabled) {
482                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
483                                   netdev->name, netdev);
484                 if (!err)
485                         goto request_done;
486                 /* fall back to legacy interrupts */
487                 igb_reset_interrupt_capability(adapter);
488                 adapter->msi_enabled = 0;
489         }
490
491         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
492                           netdev->name, netdev);
493
494         if (err)
495                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
496                         err);
497
498 request_done:
499         return err;
500 }
501
502 static void igb_free_irq(struct igb_adapter *adapter)
503 {
504         struct net_device *netdev = adapter->netdev;
505
506         if (adapter->msix_entries) {
507                 int vector = 0, i;
508
509                 for (i = 0; i < adapter->num_tx_queues; i++)
510                         free_irq(adapter->msix_entries[vector++].vector,
511                                 &(adapter->tx_ring[i]));
512                 for (i = 0; i < adapter->num_rx_queues; i++)
513                         free_irq(adapter->msix_entries[vector++].vector,
514                                 &(adapter->rx_ring[i]));
515
516                 free_irq(adapter->msix_entries[vector++].vector, netdev);
517                 return;
518         }
519
520         free_irq(adapter->pdev->irq, netdev);
521 }
522
523 /**
524  * igb_irq_disable - Mask off interrupt generation on the NIC
525  * @adapter: board private structure
526  **/
527 static void igb_irq_disable(struct igb_adapter *adapter)
528 {
529         struct e1000_hw *hw = &adapter->hw;
530
531         if (adapter->msix_entries) {
532                 wr32(E1000_EIAM, 0);
533                 wr32(E1000_EIMC, ~0);
534                 wr32(E1000_EIAC, 0);
535         }
536
537         wr32(E1000_IAM, 0);
538         wr32(E1000_IMC, ~0);
539         wrfl();
540         synchronize_irq(adapter->pdev->irq);
541 }
542
543 /**
544  * igb_irq_enable - Enable default interrupt generation settings
545  * @adapter: board private structure
546  **/
547 static void igb_irq_enable(struct igb_adapter *adapter)
548 {
549         struct e1000_hw *hw = &adapter->hw;
550
551         if (adapter->msix_entries) {
552                 wr32(E1000_EIAC, adapter->eims_enable_mask);
553                 wr32(E1000_EIAM, adapter->eims_enable_mask);
554                 wr32(E1000_EIMS, adapter->eims_enable_mask);
555                 wr32(E1000_IMS, E1000_IMS_LSC);
556         } else {
557                 wr32(E1000_IMS, IMS_ENABLE_MASK);
558                 wr32(E1000_IAM, IMS_ENABLE_MASK);
559         }
560 }
561
562 static void igb_update_mng_vlan(struct igb_adapter *adapter)
563 {
564         struct net_device *netdev = adapter->netdev;
565         u16 vid = adapter->hw.mng_cookie.vlan_id;
566         u16 old_vid = adapter->mng_vlan_id;
567         if (adapter->vlgrp) {
568                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
569                         if (adapter->hw.mng_cookie.status &
570                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
571                                 igb_vlan_rx_add_vid(netdev, vid);
572                                 adapter->mng_vlan_id = vid;
573                         } else
574                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
575
576                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
577                                         (vid != old_vid) &&
578                             !vlan_group_get_device(adapter->vlgrp, old_vid))
579                                 igb_vlan_rx_kill_vid(netdev, old_vid);
580                 } else
581                         adapter->mng_vlan_id = vid;
582         }
583 }
584
585 /**
586  * igb_release_hw_control - release control of the h/w to f/w
587  * @adapter: address of board private structure
588  *
589  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
590  * For ASF and Pass Through versions of f/w this means that the
591  * driver is no longer loaded.
592  *
593  **/
594 static void igb_release_hw_control(struct igb_adapter *adapter)
595 {
596         struct e1000_hw *hw = &adapter->hw;
597         u32 ctrl_ext;
598
599         /* Let firmware take over control of h/w */
600         ctrl_ext = rd32(E1000_CTRL_EXT);
601         wr32(E1000_CTRL_EXT,
602                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
603 }
604
605
606 /**
607  * igb_get_hw_control - get control of the h/w from f/w
608  * @adapter: address of board private structure
609  *
610  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
611  * For ASF and Pass Through versions of f/w this means that
612  * the driver is loaded.
613  *
614  **/
615 static void igb_get_hw_control(struct igb_adapter *adapter)
616 {
617         struct e1000_hw *hw = &adapter->hw;
618         u32 ctrl_ext;
619
620         /* Let firmware know the driver has taken over */
621         ctrl_ext = rd32(E1000_CTRL_EXT);
622         wr32(E1000_CTRL_EXT,
623                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
624 }
625
626 static void igb_init_manageability(struct igb_adapter *adapter)
627 {
628         struct e1000_hw *hw = &adapter->hw;
629
630         if (adapter->en_mng_pt) {
631                 u32 manc2h = rd32(E1000_MANC2H);
632                 u32 manc = rd32(E1000_MANC);
633
634                 /* enable receiving management packets to the host */
635                 /* this will probably generate destination unreachable messages
636                  * from the host OS, but the packets will be handled on SMBUS */
637                 manc |= E1000_MANC_EN_MNG2HOST;
638 #define E1000_MNG2HOST_PORT_623 (1 << 5)
639 #define E1000_MNG2HOST_PORT_664 (1 << 6)
640                 manc2h |= E1000_MNG2HOST_PORT_623;
641                 manc2h |= E1000_MNG2HOST_PORT_664;
642                 wr32(E1000_MANC2H, manc2h);
643
644                 wr32(E1000_MANC, manc);
645         }
646 }
647
648 /**
649  * igb_configure - configure the hardware for RX and TX
650  * @adapter: private board structure
651  **/
652 static void igb_configure(struct igb_adapter *adapter)
653 {
654         struct net_device *netdev = adapter->netdev;
655         int i;
656
657         igb_get_hw_control(adapter);
658         igb_set_multi(netdev);
659
660         igb_restore_vlan(adapter);
661         igb_init_manageability(adapter);
662
663         igb_configure_tx(adapter);
664         igb_setup_rctl(adapter);
665         igb_configure_rx(adapter);
666
667         igb_rx_fifo_flush_82575(&adapter->hw);
668
669         /* call IGB_DESC_UNUSED which always leaves
670          * at least 1 descriptor unused to make sure
671          * next_to_use != next_to_clean */
672         for (i = 0; i < adapter->num_rx_queues; i++) {
673                 struct igb_ring *ring = &adapter->rx_ring[i];
674                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
675         }
676
677
678         adapter->tx_queue_len = netdev->tx_queue_len;
679 }
680
681
682 /**
683  * igb_up - Open the interface and prepare it to handle traffic
684  * @adapter: board private structure
685  **/
686
687 int igb_up(struct igb_adapter *adapter)
688 {
689         struct e1000_hw *hw = &adapter->hw;
690         int i;
691
692         /* hardware has been reset, we need to reload some things */
693         igb_configure(adapter);
694
695         clear_bit(__IGB_DOWN, &adapter->state);
696
697         for (i = 0; i < adapter->num_rx_queues; i++)
698                 napi_enable(&adapter->rx_ring[i].napi);
699         if (adapter->msix_entries)
700                 igb_configure_msix(adapter);
701
702         /* Clear any pending interrupts. */
703         rd32(E1000_ICR);
704         igb_irq_enable(adapter);
705
706         /* Fire a link change interrupt to start the watchdog. */
707         wr32(E1000_ICS, E1000_ICS_LSC);
708         return 0;
709 }
710
711 void igb_down(struct igb_adapter *adapter)
712 {
713         struct e1000_hw *hw = &adapter->hw;
714         struct net_device *netdev = adapter->netdev;
715         u32 tctl, rctl;
716         int i;
717
718         /* signal that we're down so the interrupt handler does not
719          * reschedule our watchdog timer */
720         set_bit(__IGB_DOWN, &adapter->state);
721
722         /* disable receives in the hardware */
723         rctl = rd32(E1000_RCTL);
724         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
725         /* flush and sleep below */
726
727         netif_stop_queue(netdev);
728 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
729         for (i = 0; i < adapter->num_tx_queues; i++)
730                 netif_stop_subqueue(netdev, i);
731 #endif
732
733         /* disable transmits in the hardware */
734         tctl = rd32(E1000_TCTL);
735         tctl &= ~E1000_TCTL_EN;
736         wr32(E1000_TCTL, tctl);
737         /* flush both disables and wait for them to finish */
738         wrfl();
739         msleep(10);
740
741         for (i = 0; i < adapter->num_rx_queues; i++)
742                 napi_disable(&adapter->rx_ring[i].napi);
743
744         igb_irq_disable(adapter);
745
746         del_timer_sync(&adapter->watchdog_timer);
747         del_timer_sync(&adapter->phy_info_timer);
748
749         netdev->tx_queue_len = adapter->tx_queue_len;
750         netif_carrier_off(netdev);
751         adapter->link_speed = 0;
752         adapter->link_duplex = 0;
753
754         if (!pci_channel_offline(adapter->pdev))
755                 igb_reset(adapter);
756         igb_clean_all_tx_rings(adapter);
757         igb_clean_all_rx_rings(adapter);
758 }
759
760 void igb_reinit_locked(struct igb_adapter *adapter)
761 {
762         WARN_ON(in_interrupt());
763         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
764                 msleep(1);
765         igb_down(adapter);
766         igb_up(adapter);
767         clear_bit(__IGB_RESETTING, &adapter->state);
768 }
769
770 void igb_reset(struct igb_adapter *adapter)
771 {
772         struct e1000_hw *hw = &adapter->hw;
773         struct e1000_fc_info *fc = &adapter->hw.fc;
774         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
775         u16 hwm;
776
777         /* Repartition Pba for greater than 9k mtu
778          * To take effect CTRL.RST is required.
779          */
780         pba = E1000_PBA_34K;
781
782         if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
783                 /* adjust PBA for jumbo frames */
784                 wr32(E1000_PBA, pba);
785
786                 /* To maintain wire speed transmits, the Tx FIFO should be
787                  * large enough to accommodate two full transmit packets,
788                  * rounded up to the next 1KB and expressed in KB.  Likewise,
789                  * the Rx FIFO should be large enough to accommodate at least
790                  * one full receive packet and is similarly rounded up and
791                  * expressed in KB. */
792                 pba = rd32(E1000_PBA);
793                 /* upper 16 bits has Tx packet buffer allocation size in KB */
794                 tx_space = pba >> 16;
795                 /* lower 16 bits has Rx packet buffer allocation size in KB */
796                 pba &= 0xffff;
797                 /* the tx fifo also stores 16 bytes of information about the tx
798                  * but don't include ethernet FCS because hardware appends it */
799                 min_tx_space = (adapter->max_frame_size +
800                                 sizeof(struct e1000_tx_desc) -
801                                 ETH_FCS_LEN) * 2;
802                 min_tx_space = ALIGN(min_tx_space, 1024);
803                 min_tx_space >>= 10;
804                 /* software strips receive CRC, so leave room for it */
805                 min_rx_space = adapter->max_frame_size;
806                 min_rx_space = ALIGN(min_rx_space, 1024);
807                 min_rx_space >>= 10;
808
809                 /* If current Tx allocation is less than the min Tx FIFO size,
810                  * and the min Tx FIFO size is less than the current Rx FIFO
811                  * allocation, take space away from current Rx allocation */
812                 if (tx_space < min_tx_space &&
813                     ((min_tx_space - tx_space) < pba)) {
814                         pba = pba - (min_tx_space - tx_space);
815
816                         /* if short on rx space, rx wins and must trump tx
817                          * adjustment */
818                         if (pba < min_rx_space)
819                                 pba = min_rx_space;
820                 }
821         }
822         wr32(E1000_PBA, pba);
823
824         /* flow control settings */
825         /* The high water mark must be low enough to fit one full frame
826          * (or the size used for early receive) above it in the Rx FIFO.
827          * Set it to the lower of:
828          * - 90% of the Rx FIFO size, or
829          * - the full Rx FIFO size minus one full frame */
830         hwm = min(((pba << 10) * 9 / 10),
831                   ((pba << 10) - adapter->max_frame_size));
832
833         fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
834         fc->low_water = fc->high_water - 8;
835         fc->pause_time = 0xFFFF;
836         fc->send_xon = 1;
837         fc->type = fc->original_type;
838
839         /* Allow time for pending master requests to run */
840         adapter->hw.mac.ops.reset_hw(&adapter->hw);
841         wr32(E1000_WUC, 0);
842
843         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
844                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
845
846         igb_update_mng_vlan(adapter);
847
848         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
849         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
850
851         igb_reset_adaptive(&adapter->hw);
852         if (adapter->hw.phy.ops.get_phy_info)
853                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
854 }
855
856 /**
857  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
858  * @pdev: PCI device information struct
859  *
860  * Returns true if an adapter needs ioport resources
861  **/
862 static int igb_is_need_ioport(struct pci_dev *pdev)
863 {
864         switch (pdev->device) {
865         /* Currently there are no adapters that need ioport resources */
866         default:
867                 return false;
868         }
869 }
870
871 /**
872  * igb_probe - Device Initialization Routine
873  * @pdev: PCI device information struct
874  * @ent: entry in igb_pci_tbl
875  *
876  * Returns 0 on success, negative on failure
877  *
878  * igb_probe initializes an adapter identified by a pci_dev structure.
879  * The OS initialization, configuring of the adapter private structure,
880  * and a hardware reset occur.
881  **/
882 static int __devinit igb_probe(struct pci_dev *pdev,
883                                const struct pci_device_id *ent)
884 {
885         struct net_device *netdev;
886         struct igb_adapter *adapter;
887         struct e1000_hw *hw;
888         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
889         unsigned long mmio_start, mmio_len;
890         int i, err, pci_using_dac;
891         u16 eeprom_data = 0;
892         u16 eeprom_apme_mask = IGB_EEPROM_APME;
893         u32 part_num;
894         int bars, need_ioport;
895
896         /* do not allocate ioport bars when not needed */
897         need_ioport = igb_is_need_ioport(pdev);
898         if (need_ioport) {
899                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
900                 err = pci_enable_device(pdev);
901         } else {
902                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
903                 err = pci_enable_device_mem(pdev);
904         }
905         if (err)
906                 return err;
907
908         pci_using_dac = 0;
909         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
910         if (!err) {
911                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
912                 if (!err)
913                         pci_using_dac = 1;
914         } else {
915                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
916                 if (err) {
917                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
918                         if (err) {
919                                 dev_err(&pdev->dev, "No usable DMA "
920                                         "configuration, aborting\n");
921                                 goto err_dma;
922                         }
923                 }
924         }
925
926         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
927         if (err)
928                 goto err_pci_reg;
929
930         pci_set_master(pdev);
931         pci_save_state(pdev);
932
933         err = -ENOMEM;
934 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
935         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
936 #else
937         netdev = alloc_etherdev(sizeof(struct igb_adapter));
938 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
939         if (!netdev)
940                 goto err_alloc_etherdev;
941
942         SET_NETDEV_DEV(netdev, &pdev->dev);
943
944         pci_set_drvdata(pdev, netdev);
945         adapter = netdev_priv(netdev);
946         adapter->netdev = netdev;
947         adapter->pdev = pdev;
948         hw = &adapter->hw;
949         hw->back = adapter;
950         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
951         adapter->bars = bars;
952         adapter->need_ioport = need_ioport;
953
954         mmio_start = pci_resource_start(pdev, 0);
955         mmio_len = pci_resource_len(pdev, 0);
956
957         err = -EIO;
958         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
959         if (!adapter->hw.hw_addr)
960                 goto err_ioremap;
961
962         netdev->open = &igb_open;
963         netdev->stop = &igb_close;
964         netdev->get_stats = &igb_get_stats;
965         netdev->set_multicast_list = &igb_set_multi;
966         netdev->set_mac_address = &igb_set_mac;
967         netdev->change_mtu = &igb_change_mtu;
968         netdev->do_ioctl = &igb_ioctl;
969         igb_set_ethtool_ops(netdev);
970         netdev->tx_timeout = &igb_tx_timeout;
971         netdev->watchdog_timeo = 5 * HZ;
972         netdev->vlan_rx_register = igb_vlan_rx_register;
973         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
974         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
975 #ifdef CONFIG_NET_POLL_CONTROLLER
976         netdev->poll_controller = igb_netpoll;
977 #endif
978         netdev->hard_start_xmit = &igb_xmit_frame_adv;
979
980         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
981
982         netdev->mem_start = mmio_start;
983         netdev->mem_end = mmio_start + mmio_len;
984
985         /* PCI config space info */
986         hw->vendor_id = pdev->vendor;
987         hw->device_id = pdev->device;
988         hw->revision_id = pdev->revision;
989         hw->subsystem_vendor_id = pdev->subsystem_vendor;
990         hw->subsystem_device_id = pdev->subsystem_device;
991
992         /* setup the private structure */
993         hw->back = adapter;
994         /* Copy the default MAC, PHY and NVM function pointers */
995         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
996         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
997         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
998         /* Initialize skew-specific constants */
999         err = ei->get_invariants(hw);
1000         if (err)
1001                 goto err_hw_init;
1002
1003         err = igb_sw_init(adapter);
1004         if (err)
1005                 goto err_sw_init;
1006
1007         igb_get_bus_info_pcie(hw);
1008
1009         hw->phy.autoneg_wait_to_complete = false;
1010         hw->mac.adaptive_ifs = true;
1011
1012         /* Copper options */
1013         if (hw->phy.media_type == e1000_media_type_copper) {
1014                 hw->phy.mdix = AUTO_ALL_MODES;
1015                 hw->phy.disable_polarity_correction = false;
1016                 hw->phy.ms_type = e1000_ms_hw_default;
1017         }
1018
1019         if (igb_check_reset_block(hw))
1020                 dev_info(&pdev->dev,
1021                         "PHY reset is blocked due to SOL/IDER session.\n");
1022
1023         netdev->features = NETIF_F_SG |
1024                            NETIF_F_HW_CSUM |
1025                            NETIF_F_HW_VLAN_TX |
1026                            NETIF_F_HW_VLAN_RX |
1027                            NETIF_F_HW_VLAN_FILTER;
1028
1029         netdev->features |= NETIF_F_TSO;
1030         netdev->features |= NETIF_F_TSO6;
1031
1032         netdev->vlan_features |= NETIF_F_TSO;
1033         netdev->vlan_features |= NETIF_F_TSO6;
1034         netdev->vlan_features |= NETIF_F_HW_CSUM;
1035         netdev->vlan_features |= NETIF_F_SG;
1036
1037         if (pci_using_dac)
1038                 netdev->features |= NETIF_F_HIGHDMA;
1039
1040 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1041         netdev->features |= NETIF_F_MULTI_QUEUE;
1042 #endif
1043
1044         netdev->features |= NETIF_F_LLTX;
1045         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1046
1047         /* before reading the NVM, reset the controller to put the device in a
1048          * known good starting state */
1049         hw->mac.ops.reset_hw(hw);
1050
1051         /* make sure the NVM is good */
1052         if (igb_validate_nvm_checksum(hw) < 0) {
1053                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1054                 err = -EIO;
1055                 goto err_eeprom;
1056         }
1057
1058         /* copy the MAC address out of the NVM */
1059         if (hw->mac.ops.read_mac_addr(hw))
1060                 dev_err(&pdev->dev, "NVM Read Error\n");
1061
1062         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1063         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1064
1065         if (!is_valid_ether_addr(netdev->perm_addr)) {
1066                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1067                 err = -EIO;
1068                 goto err_eeprom;
1069         }
1070
1071         init_timer(&adapter->watchdog_timer);
1072         adapter->watchdog_timer.function = &igb_watchdog;
1073         adapter->watchdog_timer.data = (unsigned long) adapter;
1074
1075         init_timer(&adapter->phy_info_timer);
1076         adapter->phy_info_timer.function = &igb_update_phy_info;
1077         adapter->phy_info_timer.data = (unsigned long) adapter;
1078
1079         INIT_WORK(&adapter->reset_task, igb_reset_task);
1080         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1081
1082         /* Initialize link & ring properties that are user-changeable */
1083         adapter->tx_ring->count = 256;
1084         for (i = 0; i < adapter->num_tx_queues; i++)
1085                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1086         adapter->rx_ring->count = 256;
1087         for (i = 0; i < adapter->num_rx_queues; i++)
1088                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1089
1090         adapter->fc_autoneg = true;
1091         hw->mac.autoneg = true;
1092         hw->phy.autoneg_advertised = 0x2f;
1093
1094         hw->fc.original_type = e1000_fc_default;
1095         hw->fc.type = e1000_fc_default;
1096
1097         adapter->itr_setting = 3;
1098         adapter->itr = IGB_START_ITR;
1099
1100         igb_validate_mdi_setting(hw);
1101
1102         adapter->rx_csum = 1;
1103
1104         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1105          * enable the ACPI Magic Packet filter
1106          */
1107
1108         if (hw->bus.func == 0 ||
1109             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1110                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1111                                      &eeprom_data);
1112
1113         if (eeprom_data & eeprom_apme_mask)
1114                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1115
1116         /* now that we have the eeprom settings, apply the special cases where
1117          * the eeprom may be wrong or the board simply won't support wake on
1118          * lan on a particular port */
1119         switch (pdev->device) {
1120         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1121                 adapter->eeprom_wol = 0;
1122                 break;
1123         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1124                 /* Wake events only supported on port A for dual fiber
1125                  * regardless of eeprom setting */
1126                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1127                         adapter->eeprom_wol = 0;
1128                 break;
1129         }
1130
1131         /* initialize the wol settings based on the eeprom settings */
1132         adapter->wol = adapter->eeprom_wol;
1133
1134         /* reset the hardware with the new settings */
1135         igb_reset(adapter);
1136
1137         /* let the f/w know that the h/w is now under the control of the
1138          * driver. */
1139         igb_get_hw_control(adapter);
1140
1141         /* tell the stack to leave us alone until igb_open() is called */
1142         netif_carrier_off(netdev);
1143         netif_stop_queue(netdev);
1144 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1145         for (i = 0; i < adapter->num_tx_queues; i++)
1146                 netif_stop_subqueue(netdev, i);
1147 #endif
1148
1149         strcpy(netdev->name, "eth%d");
1150         err = register_netdev(netdev);
1151         if (err)
1152                 goto err_register;
1153
1154 #ifdef CONFIG_DCA
1155         if (dca_add_requester(&pdev->dev) == 0) {
1156                 adapter->dca_enabled = true;
1157                 dev_info(&pdev->dev, "DCA enabled\n");
1158                 /* Always use CB2 mode, difference is masked
1159                  * in the CB driver. */
1160                 wr32(E1000_DCA_CTRL, 2);
1161                 igb_setup_dca(adapter);
1162         }
1163 #endif
1164
1165         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1166         /* print bus type/speed/width info */
1167         dev_info(&pdev->dev,
1168                  "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1169                  netdev->name,
1170                  ((hw->bus.speed == e1000_bus_speed_2500)
1171                   ? "2.5Gb/s" : "unknown"),
1172                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1173                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1174                   ? "Width x1" : "unknown"),
1175                  netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1176                  netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1177
1178         igb_read_part_num(hw, &part_num);
1179         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1180                 (part_num >> 8), (part_num & 0xff));
1181
1182         dev_info(&pdev->dev,
1183                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1184                 adapter->msix_entries ? "MSI-X" :
1185                 adapter->msi_enabled ? "MSI" : "legacy",
1186                 adapter->num_rx_queues, adapter->num_tx_queues);
1187
1188         return 0;
1189
1190 err_register:
1191         igb_release_hw_control(adapter);
1192 err_eeprom:
1193         if (!igb_check_reset_block(hw))
1194                 hw->phy.ops.reset_phy(hw);
1195
1196         if (hw->flash_address)
1197                 iounmap(hw->flash_address);
1198
1199         igb_remove_device(hw);
1200         kfree(adapter->tx_ring);
1201         kfree(adapter->rx_ring);
1202 err_sw_init:
1203 err_hw_init:
1204         iounmap(hw->hw_addr);
1205 err_ioremap:
1206         free_netdev(netdev);
1207 err_alloc_etherdev:
1208         pci_release_selected_regions(pdev, bars);
1209 err_pci_reg:
1210 err_dma:
1211         pci_disable_device(pdev);
1212         return err;
1213 }
1214
1215 /**
1216  * igb_remove - Device Removal Routine
1217  * @pdev: PCI device information struct
1218  *
1219  * igb_remove is called by the PCI subsystem to alert the driver
1220  * that it should release a PCI device.  The could be caused by a
1221  * Hot-Plug event, or because the driver is going to be removed from
1222  * memory.
1223  **/
1224 static void __devexit igb_remove(struct pci_dev *pdev)
1225 {
1226         struct net_device *netdev = pci_get_drvdata(pdev);
1227         struct igb_adapter *adapter = netdev_priv(netdev);
1228         struct e1000_hw *hw = &adapter->hw;
1229
1230         /* flush_scheduled work may reschedule our watchdog task, so
1231          * explicitly disable watchdog tasks from being rescheduled  */
1232         set_bit(__IGB_DOWN, &adapter->state);
1233         del_timer_sync(&adapter->watchdog_timer);
1234         del_timer_sync(&adapter->phy_info_timer);
1235
1236         flush_scheduled_work();
1237
1238 #ifdef CONFIG_DCA
1239         if (adapter->dca_enabled) {
1240                 dev_info(&pdev->dev, "DCA disabled\n");
1241                 dca_remove_requester(&pdev->dev);
1242                 adapter->dca_enabled = false;
1243                 wr32(E1000_DCA_CTRL, 1);
1244         }
1245 #endif
1246
1247         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1248          * would have already happened in close and is redundant. */
1249         igb_release_hw_control(adapter);
1250
1251         unregister_netdev(netdev);
1252
1253         if (!igb_check_reset_block(&adapter->hw))
1254                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1255
1256         igb_remove_device(&adapter->hw);
1257         igb_reset_interrupt_capability(adapter);
1258
1259         kfree(adapter->tx_ring);
1260         kfree(adapter->rx_ring);
1261
1262         iounmap(adapter->hw.hw_addr);
1263         if (adapter->hw.flash_address)
1264                 iounmap(adapter->hw.flash_address);
1265         pci_release_selected_regions(pdev, adapter->bars);
1266
1267         free_netdev(netdev);
1268
1269         pci_disable_device(pdev);
1270 }
1271
1272 /**
1273  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1274  * @adapter: board private structure to initialize
1275  *
1276  * igb_sw_init initializes the Adapter private data structure.
1277  * Fields are initialized based on PCI device information and
1278  * OS network device settings (MTU size).
1279  **/
1280 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1281 {
1282         struct e1000_hw *hw = &adapter->hw;
1283         struct net_device *netdev = adapter->netdev;
1284         struct pci_dev *pdev = adapter->pdev;
1285
1286         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1287
1288         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1289         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1290         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1291         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1292
1293         /* Number of supported queues. */
1294         /* Having more queues than CPUs doesn't make sense. */
1295         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1296 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1297         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1298 #else
1299         adapter->num_tx_queues = 1;
1300 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1301
1302         /* This call may decrease the number of queues depending on
1303          * interrupt mode. */
1304         igb_set_interrupt_capability(adapter);
1305
1306         if (igb_alloc_queues(adapter)) {
1307                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1308                 return -ENOMEM;
1309         }
1310
1311         /* Explicitly disable IRQ since the NIC can be in any state. */
1312         igb_irq_disable(adapter);
1313
1314         set_bit(__IGB_DOWN, &adapter->state);
1315         return 0;
1316 }
1317
1318 /**
1319  * igb_open - Called when a network interface is made active
1320  * @netdev: network interface device structure
1321  *
1322  * Returns 0 on success, negative value on failure
1323  *
1324  * The open entry point is called when a network interface is made
1325  * active by the system (IFF_UP).  At this point all resources needed
1326  * for transmit and receive operations are allocated, the interrupt
1327  * handler is registered with the OS, the watchdog timer is started,
1328  * and the stack is notified that the interface is ready.
1329  **/
1330 static int igb_open(struct net_device *netdev)
1331 {
1332         struct igb_adapter *adapter = netdev_priv(netdev);
1333         struct e1000_hw *hw = &adapter->hw;
1334         int err;
1335         int i;
1336
1337         /* disallow open during test */
1338         if (test_bit(__IGB_TESTING, &adapter->state))
1339                 return -EBUSY;
1340
1341         /* allocate transmit descriptors */
1342         err = igb_setup_all_tx_resources(adapter);
1343         if (err)
1344                 goto err_setup_tx;
1345
1346         /* allocate receive descriptors */
1347         err = igb_setup_all_rx_resources(adapter);
1348         if (err)
1349                 goto err_setup_rx;
1350
1351         /* e1000_power_up_phy(adapter); */
1352
1353         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1354         if ((adapter->hw.mng_cookie.status &
1355              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1356                 igb_update_mng_vlan(adapter);
1357
1358         /* before we allocate an interrupt, we must be ready to handle it.
1359          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1360          * as soon as we call pci_request_irq, so we have to setup our
1361          * clean_rx handler before we do so.  */
1362         igb_configure(adapter);
1363
1364         err = igb_request_irq(adapter);
1365         if (err)
1366                 goto err_req_irq;
1367
1368         /* From here on the code is the same as igb_up() */
1369         clear_bit(__IGB_DOWN, &adapter->state);
1370
1371         for (i = 0; i < adapter->num_rx_queues; i++)
1372                 napi_enable(&adapter->rx_ring[i].napi);
1373
1374         /* Clear any pending interrupts. */
1375         rd32(E1000_ICR);
1376
1377         igb_irq_enable(adapter);
1378
1379         /* Fire a link status change interrupt to start the watchdog. */
1380         wr32(E1000_ICS, E1000_ICS_LSC);
1381
1382         return 0;
1383
1384 err_req_irq:
1385         igb_release_hw_control(adapter);
1386         /* e1000_power_down_phy(adapter); */
1387         igb_free_all_rx_resources(adapter);
1388 err_setup_rx:
1389         igb_free_all_tx_resources(adapter);
1390 err_setup_tx:
1391         igb_reset(adapter);
1392
1393         return err;
1394 }
1395
1396 /**
1397  * igb_close - Disables a network interface
1398  * @netdev: network interface device structure
1399  *
1400  * Returns 0, this is not allowed to fail
1401  *
1402  * The close entry point is called when an interface is de-activated
1403  * by the OS.  The hardware is still under the driver's control, but
1404  * needs to be disabled.  A global MAC reset is issued to stop the
1405  * hardware, and all transmit and receive resources are freed.
1406  **/
1407 static int igb_close(struct net_device *netdev)
1408 {
1409         struct igb_adapter *adapter = netdev_priv(netdev);
1410
1411         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1412         igb_down(adapter);
1413
1414         igb_free_irq(adapter);
1415
1416         igb_free_all_tx_resources(adapter);
1417         igb_free_all_rx_resources(adapter);
1418
1419         /* kill manageability vlan ID if supported, but not if a vlan with
1420          * the same ID is registered on the host OS (let 8021q kill it) */
1421         if ((adapter->hw.mng_cookie.status &
1422                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1423              !(adapter->vlgrp &&
1424                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1425                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1426
1427         return 0;
1428 }
1429
1430 /**
1431  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1432  * @adapter: board private structure
1433  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1434  *
1435  * Return 0 on success, negative on failure
1436  **/
1437
1438 int igb_setup_tx_resources(struct igb_adapter *adapter,
1439                            struct igb_ring *tx_ring)
1440 {
1441         struct pci_dev *pdev = adapter->pdev;
1442         int size;
1443
1444         size = sizeof(struct igb_buffer) * tx_ring->count;
1445         tx_ring->buffer_info = vmalloc(size);
1446         if (!tx_ring->buffer_info)
1447                 goto err;
1448         memset(tx_ring->buffer_info, 0, size);
1449
1450         /* round up to nearest 4K */
1451         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1452                         + sizeof(u32);
1453         tx_ring->size = ALIGN(tx_ring->size, 4096);
1454
1455         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1456                                              &tx_ring->dma);
1457
1458         if (!tx_ring->desc)
1459                 goto err;
1460
1461         tx_ring->adapter = adapter;
1462         tx_ring->next_to_use = 0;
1463         tx_ring->next_to_clean = 0;
1464         return 0;
1465
1466 err:
1467         vfree(tx_ring->buffer_info);
1468         dev_err(&adapter->pdev->dev,
1469                 "Unable to allocate memory for the transmit descriptor ring\n");
1470         return -ENOMEM;
1471 }
1472
1473 /**
1474  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1475  *                                (Descriptors) for all queues
1476  * @adapter: board private structure
1477  *
1478  * Return 0 on success, negative on failure
1479  **/
1480 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1481 {
1482         int i, err = 0;
1483 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1484         int r_idx;
1485 #endif  
1486
1487         for (i = 0; i < adapter->num_tx_queues; i++) {
1488                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1489                 if (err) {
1490                         dev_err(&adapter->pdev->dev,
1491                                 "Allocation for Tx Queue %u failed\n", i);
1492                         for (i--; i >= 0; i--)
1493                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1494                         break;
1495                 }
1496         }
1497
1498 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1499         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1500                 r_idx = i % adapter->num_tx_queues;
1501                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1502         }       
1503 #endif          
1504         return err;
1505 }
1506
1507 /**
1508  * igb_configure_tx - Configure transmit Unit after Reset
1509  * @adapter: board private structure
1510  *
1511  * Configure the Tx unit of the MAC after a reset.
1512  **/
1513 static void igb_configure_tx(struct igb_adapter *adapter)
1514 {
1515         u64 tdba, tdwba;
1516         struct e1000_hw *hw = &adapter->hw;
1517         u32 tctl;
1518         u32 txdctl, txctrl;
1519         int i;
1520
1521         for (i = 0; i < adapter->num_tx_queues; i++) {
1522                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1523
1524                 wr32(E1000_TDLEN(i),
1525                                 ring->count * sizeof(struct e1000_tx_desc));
1526                 tdba = ring->dma;
1527                 wr32(E1000_TDBAL(i),
1528                                 tdba & 0x00000000ffffffffULL);
1529                 wr32(E1000_TDBAH(i), tdba >> 32);
1530
1531                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1532                 tdwba |= 1; /* enable head wb */
1533                 wr32(E1000_TDWBAL(i),
1534                                 tdwba & 0x00000000ffffffffULL);
1535                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1536
1537                 ring->head = E1000_TDH(i);
1538                 ring->tail = E1000_TDT(i);
1539                 writel(0, hw->hw_addr + ring->tail);
1540                 writel(0, hw->hw_addr + ring->head);
1541                 txdctl = rd32(E1000_TXDCTL(i));
1542                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1543                 wr32(E1000_TXDCTL(i), txdctl);
1544
1545                 /* Turn off Relaxed Ordering on head write-backs.  The
1546                  * writebacks MUST be delivered in order or it will
1547                  * completely screw up our bookeeping.
1548                  */
1549                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1550                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1551                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1552         }
1553
1554
1555
1556         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1557
1558         /* Program the Transmit Control Register */
1559
1560         tctl = rd32(E1000_TCTL);
1561         tctl &= ~E1000_TCTL_CT;
1562         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1563                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1564
1565         igb_config_collision_dist(hw);
1566
1567         /* Setup Transmit Descriptor Settings for eop descriptor */
1568         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1569
1570         /* Enable transmits */
1571         tctl |= E1000_TCTL_EN;
1572
1573         wr32(E1000_TCTL, tctl);
1574 }
1575
1576 /**
1577  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1578  * @adapter: board private structure
1579  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1580  *
1581  * Returns 0 on success, negative on failure
1582  **/
1583
1584 int igb_setup_rx_resources(struct igb_adapter *adapter,
1585                            struct igb_ring *rx_ring)
1586 {
1587         struct pci_dev *pdev = adapter->pdev;
1588         int size, desc_len;
1589
1590         size = sizeof(struct igb_buffer) * rx_ring->count;
1591         rx_ring->buffer_info = vmalloc(size);
1592         if (!rx_ring->buffer_info)
1593                 goto err;
1594         memset(rx_ring->buffer_info, 0, size);
1595
1596         desc_len = sizeof(union e1000_adv_rx_desc);
1597
1598         /* Round up to nearest 4K */
1599         rx_ring->size = rx_ring->count * desc_len;
1600         rx_ring->size = ALIGN(rx_ring->size, 4096);
1601
1602         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1603                                              &rx_ring->dma);
1604
1605         if (!rx_ring->desc)
1606                 goto err;
1607
1608         rx_ring->next_to_clean = 0;
1609         rx_ring->next_to_use = 0;
1610         rx_ring->pending_skb = NULL;
1611
1612         rx_ring->adapter = adapter;
1613
1614         return 0;
1615
1616 err:
1617         vfree(rx_ring->buffer_info);
1618         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1619                 "the receive descriptor ring\n");
1620         return -ENOMEM;
1621 }
1622
1623 /**
1624  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1625  *                                (Descriptors) for all queues
1626  * @adapter: board private structure
1627  *
1628  * Return 0 on success, negative on failure
1629  **/
1630 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1631 {
1632         int i, err = 0;
1633
1634         for (i = 0; i < adapter->num_rx_queues; i++) {
1635                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1636                 if (err) {
1637                         dev_err(&adapter->pdev->dev,
1638                                 "Allocation for Rx Queue %u failed\n", i);
1639                         for (i--; i >= 0; i--)
1640                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1641                         break;
1642                 }
1643         }
1644
1645         return err;
1646 }
1647
1648 /**
1649  * igb_setup_rctl - configure the receive control registers
1650  * @adapter: Board private structure
1651  **/
1652 static void igb_setup_rctl(struct igb_adapter *adapter)
1653 {
1654         struct e1000_hw *hw = &adapter->hw;
1655         u32 rctl;
1656         u32 srrctl = 0;
1657         int i;
1658
1659         rctl = rd32(E1000_RCTL);
1660
1661         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1662
1663         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1664                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1665                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1666
1667         /* disable the stripping of CRC because it breaks
1668          * BMC firmware connected over SMBUS
1669         rctl |= E1000_RCTL_SECRC;
1670         */
1671
1672         rctl &= ~E1000_RCTL_SBP;
1673
1674         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1675                 rctl &= ~E1000_RCTL_LPE;
1676         else
1677                 rctl |= E1000_RCTL_LPE;
1678         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1679                 /* Setup buffer sizes */
1680                 rctl &= ~E1000_RCTL_SZ_4096;
1681                 rctl |= E1000_RCTL_BSEX;
1682                 switch (adapter->rx_buffer_len) {
1683                 case IGB_RXBUFFER_256:
1684                         rctl |= E1000_RCTL_SZ_256;
1685                         rctl &= ~E1000_RCTL_BSEX;
1686                         break;
1687                 case IGB_RXBUFFER_512:
1688                         rctl |= E1000_RCTL_SZ_512;
1689                         rctl &= ~E1000_RCTL_BSEX;
1690                         break;
1691                 case IGB_RXBUFFER_1024:
1692                         rctl |= E1000_RCTL_SZ_1024;
1693                         rctl &= ~E1000_RCTL_BSEX;
1694                         break;
1695                 case IGB_RXBUFFER_2048:
1696                 default:
1697                         rctl |= E1000_RCTL_SZ_2048;
1698                         rctl &= ~E1000_RCTL_BSEX;
1699                         break;
1700                 case IGB_RXBUFFER_4096:
1701                         rctl |= E1000_RCTL_SZ_4096;
1702                         break;
1703                 case IGB_RXBUFFER_8192:
1704                         rctl |= E1000_RCTL_SZ_8192;
1705                         break;
1706                 case IGB_RXBUFFER_16384:
1707                         rctl |= E1000_RCTL_SZ_16384;
1708                         break;
1709                 }
1710         } else {
1711                 rctl &= ~E1000_RCTL_BSEX;
1712                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1713         }
1714
1715         /* 82575 and greater support packet-split where the protocol
1716          * header is placed in skb->data and the packet data is
1717          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1718          * In the case of a non-split, skb->data is linearly filled,
1719          * followed by the page buffers.  Therefore, skb->data is
1720          * sized to hold the largest protocol header.
1721          */
1722         /* allocations using alloc_page take too long for regular MTU
1723          * so only enable packet split for jumbo frames */
1724         if (rctl & E1000_RCTL_LPE) {
1725                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1726                 srrctl = adapter->rx_ps_hdr_size <<
1727                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1728                 /* buffer size is ALWAYS one page */
1729                 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1730                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1731         } else {
1732                 adapter->rx_ps_hdr_size = 0;
1733                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1734         }
1735
1736         for (i = 0; i < adapter->num_rx_queues; i++)
1737                 wr32(E1000_SRRCTL(i), srrctl);
1738
1739         wr32(E1000_RCTL, rctl);
1740 }
1741
1742 /**
1743  * igb_configure_rx - Configure receive Unit after Reset
1744  * @adapter: board private structure
1745  *
1746  * Configure the Rx unit of the MAC after a reset.
1747  **/
1748 static void igb_configure_rx(struct igb_adapter *adapter)
1749 {
1750         u64 rdba;
1751         struct e1000_hw *hw = &adapter->hw;
1752         u32 rctl, rxcsum;
1753         u32 rxdctl;
1754         int i;
1755
1756         /* disable receives while setting up the descriptors */
1757         rctl = rd32(E1000_RCTL);
1758         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1759         wrfl();
1760         mdelay(10);
1761
1762         if (adapter->itr_setting > 3)
1763                 wr32(E1000_ITR,
1764                                 1000000000 / (adapter->itr * 256));
1765
1766         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1767          * the Base and Length of the Rx Descriptor Ring */
1768         for (i = 0; i < adapter->num_rx_queues; i++) {
1769                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1770                 rdba = ring->dma;
1771                 wr32(E1000_RDBAL(i),
1772                                 rdba & 0x00000000ffffffffULL);
1773                 wr32(E1000_RDBAH(i), rdba >> 32);
1774                 wr32(E1000_RDLEN(i),
1775                                ring->count * sizeof(union e1000_adv_rx_desc));
1776
1777                 ring->head = E1000_RDH(i);
1778                 ring->tail = E1000_RDT(i);
1779                 writel(0, hw->hw_addr + ring->tail);
1780                 writel(0, hw->hw_addr + ring->head);
1781
1782                 rxdctl = rd32(E1000_RXDCTL(i));
1783                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1784                 rxdctl &= 0xFFF00000;
1785                 rxdctl |= IGB_RX_PTHRESH;
1786                 rxdctl |= IGB_RX_HTHRESH << 8;
1787                 rxdctl |= IGB_RX_WTHRESH << 16;
1788                 wr32(E1000_RXDCTL(i), rxdctl);
1789         }
1790
1791         if (adapter->num_rx_queues > 1) {
1792                 u32 random[10];
1793                 u32 mrqc;
1794                 u32 j, shift;
1795                 union e1000_reta {
1796                         u32 dword;
1797                         u8  bytes[4];
1798                 } reta;
1799
1800                 get_random_bytes(&random[0], 40);
1801
1802                 shift = 6;
1803                 for (j = 0; j < (32 * 4); j++) {
1804                         reta.bytes[j & 3] =
1805                                 (j % adapter->num_rx_queues) << shift;
1806                         if ((j & 3) == 3)
1807                                 writel(reta.dword,
1808                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1809                 }
1810                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1811
1812                 /* Fill out hash function seeds */
1813                 for (j = 0; j < 10; j++)
1814                         array_wr32(E1000_RSSRK(0), j, random[j]);
1815
1816                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1817                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1818                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1819                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1820                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1821                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1822                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1823                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1824
1825
1826                 wr32(E1000_MRQC, mrqc);
1827
1828                 /* Multiqueue and raw packet checksumming are mutually
1829                  * exclusive.  Note that this not the same as TCP/IP
1830                  * checksumming, which works fine. */
1831                 rxcsum = rd32(E1000_RXCSUM);
1832                 rxcsum |= E1000_RXCSUM_PCSD;
1833                 wr32(E1000_RXCSUM, rxcsum);
1834         } else {
1835                 /* Enable Receive Checksum Offload for TCP and UDP */
1836                 rxcsum = rd32(E1000_RXCSUM);
1837                 if (adapter->rx_csum) {
1838                         rxcsum |= E1000_RXCSUM_TUOFL;
1839
1840                         /* Enable IPv4 payload checksum for UDP fragments
1841                          * Must be used in conjunction with packet-split. */
1842                         if (adapter->rx_ps_hdr_size)
1843                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1844                 } else {
1845                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1846                         /* don't need to clear IPPCSE as it defaults to 0 */
1847                 }
1848                 wr32(E1000_RXCSUM, rxcsum);
1849         }
1850
1851         if (adapter->vlgrp)
1852                 wr32(E1000_RLPML,
1853                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1854         else
1855                 wr32(E1000_RLPML, adapter->max_frame_size);
1856
1857         /* Enable Receives */
1858         wr32(E1000_RCTL, rctl);
1859 }
1860
1861 /**
1862  * igb_free_tx_resources - Free Tx Resources per Queue
1863  * @adapter: board private structure
1864  * @tx_ring: Tx descriptor ring for a specific queue
1865  *
1866  * Free all transmit software resources
1867  **/
1868 static void igb_free_tx_resources(struct igb_ring *tx_ring)
1869 {
1870         struct pci_dev *pdev = tx_ring->adapter->pdev;
1871
1872         igb_clean_tx_ring(tx_ring);
1873
1874         vfree(tx_ring->buffer_info);
1875         tx_ring->buffer_info = NULL;
1876
1877         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1878
1879         tx_ring->desc = NULL;
1880 }
1881
1882 /**
1883  * igb_free_all_tx_resources - Free Tx Resources for All Queues
1884  * @adapter: board private structure
1885  *
1886  * Free all transmit software resources
1887  **/
1888 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1889 {
1890         int i;
1891
1892         for (i = 0; i < adapter->num_tx_queues; i++)
1893                 igb_free_tx_resources(&adapter->tx_ring[i]);
1894 }
1895
1896 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1897                                            struct igb_buffer *buffer_info)
1898 {
1899         if (buffer_info->dma) {
1900                 pci_unmap_page(adapter->pdev,
1901                                 buffer_info->dma,
1902                                 buffer_info->length,
1903                                 PCI_DMA_TODEVICE);
1904                 buffer_info->dma = 0;
1905         }
1906         if (buffer_info->skb) {
1907                 dev_kfree_skb_any(buffer_info->skb);
1908                 buffer_info->skb = NULL;
1909         }
1910         buffer_info->time_stamp = 0;
1911         /* buffer_info must be completely set up in the transmit path */
1912 }
1913
1914 /**
1915  * igb_clean_tx_ring - Free Tx Buffers
1916  * @adapter: board private structure
1917  * @tx_ring: ring to be cleaned
1918  **/
1919 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
1920 {
1921         struct igb_adapter *adapter = tx_ring->adapter;
1922         struct igb_buffer *buffer_info;
1923         unsigned long size;
1924         unsigned int i;
1925
1926         if (!tx_ring->buffer_info)
1927                 return;
1928         /* Free all the Tx ring sk_buffs */
1929
1930         for (i = 0; i < tx_ring->count; i++) {
1931                 buffer_info = &tx_ring->buffer_info[i];
1932                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
1933         }
1934
1935         size = sizeof(struct igb_buffer) * tx_ring->count;
1936         memset(tx_ring->buffer_info, 0, size);
1937
1938         /* Zero out the descriptor ring */
1939
1940         memset(tx_ring->desc, 0, tx_ring->size);
1941
1942         tx_ring->next_to_use = 0;
1943         tx_ring->next_to_clean = 0;
1944
1945         writel(0, adapter->hw.hw_addr + tx_ring->head);
1946         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1947 }
1948
1949 /**
1950  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
1951  * @adapter: board private structure
1952  **/
1953 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
1954 {
1955         int i;
1956
1957         for (i = 0; i < adapter->num_tx_queues; i++)
1958                 igb_clean_tx_ring(&adapter->tx_ring[i]);
1959 }
1960
1961 /**
1962  * igb_free_rx_resources - Free Rx Resources
1963  * @adapter: board private structure
1964  * @rx_ring: ring to clean the resources from
1965  *
1966  * Free all receive software resources
1967  **/
1968 static void igb_free_rx_resources(struct igb_ring *rx_ring)
1969 {
1970         struct pci_dev *pdev = rx_ring->adapter->pdev;
1971
1972         igb_clean_rx_ring(rx_ring);
1973
1974         vfree(rx_ring->buffer_info);
1975         rx_ring->buffer_info = NULL;
1976
1977         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1978
1979         rx_ring->desc = NULL;
1980 }
1981
1982 /**
1983  * igb_free_all_rx_resources - Free Rx Resources for All Queues
1984  * @adapter: board private structure
1985  *
1986  * Free all receive software resources
1987  **/
1988 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
1989 {
1990         int i;
1991
1992         for (i = 0; i < adapter->num_rx_queues; i++)
1993                 igb_free_rx_resources(&adapter->rx_ring[i]);
1994 }
1995
1996 /**
1997  * igb_clean_rx_ring - Free Rx Buffers per Queue
1998  * @adapter: board private structure
1999  * @rx_ring: ring to free buffers from
2000  **/
2001 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2002 {
2003         struct igb_adapter *adapter = rx_ring->adapter;
2004         struct igb_buffer *buffer_info;
2005         struct pci_dev *pdev = adapter->pdev;
2006         unsigned long size;
2007         unsigned int i;
2008
2009         if (!rx_ring->buffer_info)
2010                 return;
2011         /* Free all the Rx ring sk_buffs */
2012         for (i = 0; i < rx_ring->count; i++) {
2013                 buffer_info = &rx_ring->buffer_info[i];
2014                 if (buffer_info->dma) {
2015                         if (adapter->rx_ps_hdr_size)
2016                                 pci_unmap_single(pdev, buffer_info->dma,
2017                                                  adapter->rx_ps_hdr_size,
2018                                                  PCI_DMA_FROMDEVICE);
2019                         else
2020                                 pci_unmap_single(pdev, buffer_info->dma,
2021                                                  adapter->rx_buffer_len,
2022                                                  PCI_DMA_FROMDEVICE);
2023                         buffer_info->dma = 0;
2024                 }
2025
2026                 if (buffer_info->skb) {
2027                         dev_kfree_skb(buffer_info->skb);
2028                         buffer_info->skb = NULL;
2029                 }
2030                 if (buffer_info->page) {
2031                         pci_unmap_page(pdev, buffer_info->page_dma,
2032                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
2033                         put_page(buffer_info->page);
2034                         buffer_info->page = NULL;
2035                         buffer_info->page_dma = 0;
2036                 }
2037         }
2038
2039         /* there also may be some cached data from a chained receive */
2040         if (rx_ring->pending_skb) {
2041                 dev_kfree_skb(rx_ring->pending_skb);
2042                 rx_ring->pending_skb = NULL;
2043         }
2044
2045         size = sizeof(struct igb_buffer) * rx_ring->count;
2046         memset(rx_ring->buffer_info, 0, size);
2047
2048         /* Zero out the descriptor ring */
2049         memset(rx_ring->desc, 0, rx_ring->size);
2050
2051         rx_ring->next_to_clean = 0;
2052         rx_ring->next_to_use = 0;
2053
2054         writel(0, adapter->hw.hw_addr + rx_ring->head);
2055         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2056 }
2057
2058 /**
2059  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2060  * @adapter: board private structure
2061  **/
2062 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2063 {
2064         int i;
2065
2066         for (i = 0; i < adapter->num_rx_queues; i++)
2067                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2068 }
2069
2070 /**
2071  * igb_set_mac - Change the Ethernet Address of the NIC
2072  * @netdev: network interface device structure
2073  * @p: pointer to an address structure
2074  *
2075  * Returns 0 on success, negative on failure
2076  **/
2077 static int igb_set_mac(struct net_device *netdev, void *p)
2078 {
2079         struct igb_adapter *adapter = netdev_priv(netdev);
2080         struct sockaddr *addr = p;
2081
2082         if (!is_valid_ether_addr(addr->sa_data))
2083                 return -EADDRNOTAVAIL;
2084
2085         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2086         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2087
2088         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2089
2090         return 0;
2091 }
2092
2093 /**
2094  * igb_set_multi - Multicast and Promiscuous mode set
2095  * @netdev: network interface device structure
2096  *
2097  * The set_multi entry point is called whenever the multicast address
2098  * list or the network interface flags are updated.  This routine is
2099  * responsible for configuring the hardware for proper multicast,
2100  * promiscuous mode, and all-multi behavior.
2101  **/
2102 static void igb_set_multi(struct net_device *netdev)
2103 {
2104         struct igb_adapter *adapter = netdev_priv(netdev);
2105         struct e1000_hw *hw = &adapter->hw;
2106         struct e1000_mac_info *mac = &hw->mac;
2107         struct dev_mc_list *mc_ptr;
2108         u8  *mta_list;
2109         u32 rctl;
2110         int i;
2111
2112         /* Check for Promiscuous and All Multicast modes */
2113
2114         rctl = rd32(E1000_RCTL);
2115
2116         if (netdev->flags & IFF_PROMISC)
2117                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2118         else if (netdev->flags & IFF_ALLMULTI) {
2119                 rctl |= E1000_RCTL_MPE;
2120                 rctl &= ~E1000_RCTL_UPE;
2121         } else
2122                 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2123
2124         wr32(E1000_RCTL, rctl);
2125
2126         if (!netdev->mc_count) {
2127                 /* nothing to program, so clear mc list */
2128                 igb_update_mc_addr_list(hw, NULL, 0, 1,
2129                                           mac->rar_entry_count);
2130                 return;
2131         }
2132
2133         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2134         if (!mta_list)
2135                 return;
2136
2137         /* The shared function expects a packed array of only addresses. */
2138         mc_ptr = netdev->mc_list;
2139
2140         for (i = 0; i < netdev->mc_count; i++) {
2141                 if (!mc_ptr)
2142                         break;
2143                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2144                 mc_ptr = mc_ptr->next;
2145         }
2146         igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count);
2147         kfree(mta_list);
2148 }
2149
2150 /* Need to wait a few seconds after link up to get diagnostic information from
2151  * the phy */
2152 static void igb_update_phy_info(unsigned long data)
2153 {
2154         struct igb_adapter *adapter = (struct igb_adapter *) data;
2155         if (adapter->hw.phy.ops.get_phy_info)
2156                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2157 }
2158
2159 /**
2160  * igb_watchdog - Timer Call-back
2161  * @data: pointer to adapter cast into an unsigned long
2162  **/
2163 static void igb_watchdog(unsigned long data)
2164 {
2165         struct igb_adapter *adapter = (struct igb_adapter *)data;
2166         /* Do the rest outside of interrupt context */
2167         schedule_work(&adapter->watchdog_task);
2168 }
2169
2170 static void igb_watchdog_task(struct work_struct *work)
2171 {
2172         struct igb_adapter *adapter = container_of(work,
2173                                         struct igb_adapter, watchdog_task);
2174         struct e1000_hw *hw = &adapter->hw;
2175
2176         struct net_device *netdev = adapter->netdev;
2177         struct igb_ring *tx_ring = adapter->tx_ring;
2178         struct e1000_mac_info *mac = &adapter->hw.mac;
2179         u32 link;
2180         s32 ret_val;
2181 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2182         int i;
2183 #endif
2184
2185         if ((netif_carrier_ok(netdev)) &&
2186             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2187                 goto link_up;
2188
2189         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2190         if ((ret_val == E1000_ERR_PHY) &&
2191             (hw->phy.type == e1000_phy_igp_3) &&
2192             (rd32(E1000_CTRL) &
2193              E1000_PHY_CTRL_GBE_DISABLE))
2194                 dev_info(&adapter->pdev->dev,
2195                          "Gigabit has been disabled, downgrading speed\n");
2196
2197         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2198             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2199                 link = mac->serdes_has_link;
2200         else
2201                 link = rd32(E1000_STATUS) &
2202                                       E1000_STATUS_LU;
2203
2204         if (link) {
2205                 if (!netif_carrier_ok(netdev)) {
2206                         u32 ctrl;
2207                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2208                                                    &adapter->link_speed,
2209                                                    &adapter->link_duplex);
2210
2211                         ctrl = rd32(E1000_CTRL);
2212                         dev_info(&adapter->pdev->dev,
2213                                  "NIC Link is Up %d Mbps %s, "
2214                                  "Flow Control: %s\n",
2215                                  adapter->link_speed,
2216                                  adapter->link_duplex == FULL_DUPLEX ?
2217                                  "Full Duplex" : "Half Duplex",
2218                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2219                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2220                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2221                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2222
2223                         /* tweak tx_queue_len according to speed/duplex and
2224                          * adjust the timeout factor */
2225                         netdev->tx_queue_len = adapter->tx_queue_len;
2226                         adapter->tx_timeout_factor = 1;
2227                         switch (adapter->link_speed) {
2228                         case SPEED_10:
2229                                 netdev->tx_queue_len = 10;
2230                                 adapter->tx_timeout_factor = 14;
2231                                 break;
2232                         case SPEED_100:
2233                                 netdev->tx_queue_len = 100;
2234                                 /* maybe add some timeout factor ? */
2235                                 break;
2236                         }
2237
2238                         netif_carrier_on(netdev);
2239                         netif_wake_queue(netdev);
2240 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2241                         for (i = 0; i < adapter->num_tx_queues; i++)
2242                                 netif_wake_subqueue(netdev, i);
2243 #endif
2244
2245                         if (!test_bit(__IGB_DOWN, &adapter->state))
2246                                 mod_timer(&adapter->phy_info_timer,
2247                                           round_jiffies(jiffies + 2 * HZ));
2248                 }
2249         } else {
2250                 if (netif_carrier_ok(netdev)) {
2251                         adapter->link_speed = 0;
2252                         adapter->link_duplex = 0;
2253                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2254                         netif_carrier_off(netdev);
2255                         netif_stop_queue(netdev);
2256 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2257                         for (i = 0; i < adapter->num_tx_queues; i++)
2258                                 netif_stop_subqueue(netdev, i);
2259 #endif
2260                         if (!test_bit(__IGB_DOWN, &adapter->state))
2261                                 mod_timer(&adapter->phy_info_timer,
2262                                           round_jiffies(jiffies + 2 * HZ));
2263                 }
2264         }
2265
2266 link_up:
2267         igb_update_stats(adapter);
2268
2269         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2270         adapter->tpt_old = adapter->stats.tpt;
2271         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2272         adapter->colc_old = adapter->stats.colc;
2273
2274         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2275         adapter->gorc_old = adapter->stats.gorc;
2276         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2277         adapter->gotc_old = adapter->stats.gotc;
2278
2279         igb_update_adaptive(&adapter->hw);
2280
2281         if (!netif_carrier_ok(netdev)) {
2282                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2283                         /* We've lost link, so the controller stops DMA,
2284                          * but we've got queued Tx work that's never going
2285                          * to get done, so reset controller to flush Tx.
2286                          * (Do the reset outside of interrupt context). */
2287                         adapter->tx_timeout_count++;
2288                         schedule_work(&adapter->reset_task);
2289                 }
2290         }
2291
2292         /* Cause software interrupt to ensure rx ring is cleaned */
2293         wr32(E1000_ICS, E1000_ICS_RXDMT0);
2294
2295         /* Force detection of hung controller every watchdog period */
2296         tx_ring->detect_tx_hung = true;
2297
2298         /* Reset the timer */
2299         if (!test_bit(__IGB_DOWN, &adapter->state))
2300                 mod_timer(&adapter->watchdog_timer,
2301                           round_jiffies(jiffies + 2 * HZ));
2302 }
2303
2304 enum latency_range {
2305         lowest_latency = 0,
2306         low_latency = 1,
2307         bulk_latency = 2,
2308         latency_invalid = 255
2309 };
2310
2311
2312 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2313                               struct igb_ring *rx_ring)
2314 {
2315         struct e1000_hw *hw = &adapter->hw;
2316         int new_val;
2317
2318         new_val = rx_ring->itr_val / 2;
2319         if (new_val < IGB_MIN_DYN_ITR)
2320                 new_val = IGB_MIN_DYN_ITR;
2321
2322         if (new_val != rx_ring->itr_val) {
2323                 rx_ring->itr_val = new_val;
2324                 wr32(rx_ring->itr_register,
2325                                 1000000000 / (new_val * 256));
2326         }
2327 }
2328
2329 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2330                               struct igb_ring *rx_ring)
2331 {
2332         struct e1000_hw *hw = &adapter->hw;
2333         int new_val;
2334
2335         new_val = rx_ring->itr_val * 2;
2336         if (new_val > IGB_MAX_DYN_ITR)
2337                 new_val = IGB_MAX_DYN_ITR;
2338
2339         if (new_val != rx_ring->itr_val) {
2340                 rx_ring->itr_val = new_val;
2341                 wr32(rx_ring->itr_register,
2342                                 1000000000 / (new_val * 256));
2343         }
2344 }
2345
2346 /**
2347  * igb_update_itr - update the dynamic ITR value based on statistics
2348  *      Stores a new ITR value based on packets and byte
2349  *      counts during the last interrupt.  The advantage of per interrupt
2350  *      computation is faster updates and more accurate ITR for the current
2351  *      traffic pattern.  Constants in this function were computed
2352  *      based on theoretical maximum wire speed and thresholds were set based
2353  *      on testing data as well as attempting to minimize response time
2354  *      while increasing bulk throughput.
2355  *      this functionality is controlled by the InterruptThrottleRate module
2356  *      parameter (see igb_param.c)
2357  *      NOTE:  These calculations are only valid when operating in a single-
2358  *             queue environment.
2359  * @adapter: pointer to adapter
2360  * @itr_setting: current adapter->itr
2361  * @packets: the number of packets during this measurement interval
2362  * @bytes: the number of bytes during this measurement interval
2363  **/
2364 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2365                                    int packets, int bytes)
2366 {
2367         unsigned int retval = itr_setting;
2368
2369         if (packets == 0)
2370                 goto update_itr_done;
2371
2372         switch (itr_setting) {
2373         case lowest_latency:
2374                 /* handle TSO and jumbo frames */
2375                 if (bytes/packets > 8000)
2376                         retval = bulk_latency;
2377                 else if ((packets < 5) && (bytes > 512))
2378                         retval = low_latency;
2379                 break;
2380         case low_latency:  /* 50 usec aka 20000 ints/s */
2381                 if (bytes > 10000) {
2382                         /* this if handles the TSO accounting */
2383                         if (bytes/packets > 8000) {
2384                                 retval = bulk_latency;
2385                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2386                                 retval = bulk_latency;
2387                         } else if ((packets > 35)) {
2388                                 retval = lowest_latency;
2389                         }
2390                 } else if (bytes/packets > 2000) {
2391                         retval = bulk_latency;
2392                 } else if (packets <= 2 && bytes < 512) {
2393                         retval = lowest_latency;
2394                 }
2395                 break;
2396         case bulk_latency: /* 250 usec aka 4000 ints/s */
2397                 if (bytes > 25000) {
2398                         if (packets > 35)
2399                                 retval = low_latency;
2400                 } else if (bytes < 6000) {
2401                         retval = low_latency;
2402                 }
2403                 break;
2404         }
2405
2406 update_itr_done:
2407         return retval;
2408 }
2409
2410 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2411                         int rx_only)
2412 {
2413         u16 current_itr;
2414         u32 new_itr = adapter->itr;
2415
2416         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2417         if (adapter->link_speed != SPEED_1000) {
2418                 current_itr = 0;
2419                 new_itr = 4000;
2420                 goto set_itr_now;
2421         }
2422
2423         adapter->rx_itr = igb_update_itr(adapter,
2424                                     adapter->rx_itr,
2425                                     adapter->rx_ring->total_packets,
2426                                     adapter->rx_ring->total_bytes);
2427         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2428         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2429                 adapter->rx_itr = low_latency;
2430
2431         if (!rx_only) {
2432                 adapter->tx_itr = igb_update_itr(adapter,
2433                                             adapter->tx_itr,
2434                                             adapter->tx_ring->total_packets,
2435                                             adapter->tx_ring->total_bytes);
2436                 /* conservative mode (itr 3) eliminates the
2437                  * lowest_latency setting */
2438                 if (adapter->itr_setting == 3 &&
2439                     adapter->tx_itr == lowest_latency)
2440                         adapter->tx_itr = low_latency;
2441
2442                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2443         } else {
2444                 current_itr = adapter->rx_itr;
2445         }
2446
2447         switch (current_itr) {
2448         /* counts and packets in update_itr are dependent on these numbers */
2449         case lowest_latency:
2450                 new_itr = 70000;
2451                 break;
2452         case low_latency:
2453                 new_itr = 20000; /* aka hwitr = ~200 */
2454                 break;
2455         case bulk_latency:
2456                 new_itr = 4000;
2457                 break;
2458         default:
2459                 break;
2460         }
2461
2462 set_itr_now:
2463         if (new_itr != adapter->itr) {
2464                 /* this attempts to bias the interrupt rate towards Bulk
2465                  * by adding intermediate steps when interrupt rate is
2466                  * increasing */
2467                 new_itr = new_itr > adapter->itr ?
2468                              min(adapter->itr + (new_itr >> 2), new_itr) :
2469                              new_itr;
2470                 /* Don't write the value here; it resets the adapter's
2471                  * internal timer, and causes us to delay far longer than
2472                  * we should between interrupts.  Instead, we write the ITR
2473                  * value at the beginning of the next interrupt so the timing
2474                  * ends up being correct.
2475                  */
2476                 adapter->itr = new_itr;
2477                 adapter->set_itr = 1;
2478         }
2479
2480         return;
2481 }
2482
2483
2484 #define IGB_TX_FLAGS_CSUM               0x00000001
2485 #define IGB_TX_FLAGS_VLAN               0x00000002
2486 #define IGB_TX_FLAGS_TSO                0x00000004
2487 #define IGB_TX_FLAGS_IPV4               0x00000008
2488 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2489 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2490
2491 static inline int igb_tso_adv(struct igb_adapter *adapter,
2492                               struct igb_ring *tx_ring,
2493                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2494 {
2495         struct e1000_adv_tx_context_desc *context_desc;
2496         unsigned int i;
2497         int err;
2498         struct igb_buffer *buffer_info;
2499         u32 info = 0, tu_cmd = 0;
2500         u32 mss_l4len_idx, l4len;
2501         *hdr_len = 0;
2502
2503         if (skb_header_cloned(skb)) {
2504                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2505                 if (err)
2506                         return err;
2507         }
2508
2509         l4len = tcp_hdrlen(skb);
2510         *hdr_len += l4len;
2511
2512         if (skb->protocol == htons(ETH_P_IP)) {
2513                 struct iphdr *iph = ip_hdr(skb);
2514                 iph->tot_len = 0;
2515                 iph->check = 0;
2516                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2517                                                          iph->daddr, 0,
2518                                                          IPPROTO_TCP,
2519                                                          0);
2520         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2521                 ipv6_hdr(skb)->payload_len = 0;
2522                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2523                                                        &ipv6_hdr(skb)->daddr,
2524                                                        0, IPPROTO_TCP, 0);
2525         }
2526
2527         i = tx_ring->next_to_use;
2528
2529         buffer_info = &tx_ring->buffer_info[i];
2530         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2531         /* VLAN MACLEN IPLEN */
2532         if (tx_flags & IGB_TX_FLAGS_VLAN)
2533                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2534         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2535         *hdr_len += skb_network_offset(skb);
2536         info |= skb_network_header_len(skb);
2537         *hdr_len += skb_network_header_len(skb);
2538         context_desc->vlan_macip_lens = cpu_to_le32(info);
2539
2540         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2541         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2542
2543         if (skb->protocol == htons(ETH_P_IP))
2544                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2545         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2546
2547         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2548
2549         /* MSS L4LEN IDX */
2550         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2551         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2552
2553         /* Context index must be unique per ring.  Luckily, so is the interrupt
2554          * mask value. */
2555         mss_l4len_idx |= tx_ring->eims_value >> 4;
2556
2557         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2558         context_desc->seqnum_seed = 0;
2559
2560         buffer_info->time_stamp = jiffies;
2561         buffer_info->dma = 0;
2562         i++;
2563         if (i == tx_ring->count)
2564                 i = 0;
2565
2566         tx_ring->next_to_use = i;
2567
2568         return true;
2569 }
2570
2571 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2572                                         struct igb_ring *tx_ring,
2573                                         struct sk_buff *skb, u32 tx_flags)
2574 {
2575         struct e1000_adv_tx_context_desc *context_desc;
2576         unsigned int i;
2577         struct igb_buffer *buffer_info;
2578         u32 info = 0, tu_cmd = 0;
2579
2580         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2581             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2582                 i = tx_ring->next_to_use;
2583                 buffer_info = &tx_ring->buffer_info[i];
2584                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2585
2586                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2587                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2588                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2589                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2590                         info |= skb_network_header_len(skb);
2591
2592                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2593
2594                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2595
2596                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2597                         switch (skb->protocol) {
2598                         case __constant_htons(ETH_P_IP):
2599                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2600                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2601                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2602                                 break;
2603                         case __constant_htons(ETH_P_IPV6):
2604                                 /* XXX what about other V6 headers?? */
2605                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2606                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2607                                 break;
2608                         default:
2609                                 if (unlikely(net_ratelimit()))
2610                                         dev_warn(&adapter->pdev->dev,
2611                                             "partial checksum but proto=%x!\n",
2612                                             skb->protocol);
2613                                 break;
2614                         }
2615                 }
2616
2617                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2618                 context_desc->seqnum_seed = 0;
2619                 context_desc->mss_l4len_idx =
2620                                           cpu_to_le32(tx_ring->queue_index << 4);
2621
2622                 buffer_info->time_stamp = jiffies;
2623                 buffer_info->dma = 0;
2624
2625                 i++;
2626                 if (i == tx_ring->count)
2627                         i = 0;
2628                 tx_ring->next_to_use = i;
2629
2630                 return true;
2631         }
2632
2633
2634         return false;
2635 }
2636
2637 #define IGB_MAX_TXD_PWR 16
2638 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2639
2640 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2641                                  struct igb_ring *tx_ring,
2642                                  struct sk_buff *skb)
2643 {
2644         struct igb_buffer *buffer_info;
2645         unsigned int len = skb_headlen(skb);
2646         unsigned int count = 0, i;
2647         unsigned int f;
2648
2649         i = tx_ring->next_to_use;
2650
2651         buffer_info = &tx_ring->buffer_info[i];
2652         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2653         buffer_info->length = len;
2654         /* set time_stamp *before* dma to help avoid a possible race */
2655         buffer_info->time_stamp = jiffies;
2656         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2657                                           PCI_DMA_TODEVICE);
2658         count++;
2659         i++;
2660         if (i == tx_ring->count)
2661                 i = 0;
2662
2663         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2664                 struct skb_frag_struct *frag;
2665
2666                 frag = &skb_shinfo(skb)->frags[f];
2667                 len = frag->size;
2668
2669                 buffer_info = &tx_ring->buffer_info[i];
2670                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2671                 buffer_info->length = len;
2672                 buffer_info->time_stamp = jiffies;
2673                 buffer_info->dma = pci_map_page(adapter->pdev,
2674                                                 frag->page,
2675                                                 frag->page_offset,
2676                                                 len,
2677                                                 PCI_DMA_TODEVICE);
2678
2679                 count++;
2680                 i++;
2681                 if (i == tx_ring->count)
2682                         i = 0;
2683         }
2684
2685         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2686         tx_ring->buffer_info[i].skb = skb;
2687
2688         return count;
2689 }
2690
2691 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2692                                     struct igb_ring *tx_ring,
2693                                     int tx_flags, int count, u32 paylen,
2694                                     u8 hdr_len)
2695 {
2696         union e1000_adv_tx_desc *tx_desc = NULL;
2697         struct igb_buffer *buffer_info;
2698         u32 olinfo_status = 0, cmd_type_len;
2699         unsigned int i;
2700
2701         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2702                         E1000_ADVTXD_DCMD_DEXT);
2703
2704         if (tx_flags & IGB_TX_FLAGS_VLAN)
2705                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2706
2707         if (tx_flags & IGB_TX_FLAGS_TSO) {
2708                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2709
2710                 /* insert tcp checksum */
2711                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2712
2713                 /* insert ip checksum */
2714                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2715                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2716
2717         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2718                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2719         }
2720
2721         if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2722                         IGB_TX_FLAGS_VLAN))
2723                 olinfo_status |= tx_ring->queue_index << 4;
2724
2725         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2726
2727         i = tx_ring->next_to_use;
2728         while (count--) {
2729                 buffer_info = &tx_ring->buffer_info[i];
2730                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2731                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2732                 tx_desc->read.cmd_type_len =
2733                         cpu_to_le32(cmd_type_len | buffer_info->length);
2734                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2735                 i++;
2736                 if (i == tx_ring->count)
2737                         i = 0;
2738         }
2739
2740         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2741         /* Force memory writes to complete before letting h/w
2742          * know there are new descriptors to fetch.  (Only
2743          * applicable for weak-ordered memory model archs,
2744          * such as IA-64). */
2745         wmb();
2746
2747         tx_ring->next_to_use = i;
2748         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2749         /* we need this if more than one processor can write to our tail
2750          * at a time, it syncronizes IO on IA64/Altix systems */
2751         mmiowb();
2752 }
2753
2754 static int __igb_maybe_stop_tx(struct net_device *netdev,
2755                                struct igb_ring *tx_ring, int size)
2756 {
2757         struct igb_adapter *adapter = netdev_priv(netdev);
2758
2759 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2760         netif_stop_subqueue(netdev, tx_ring->queue_index);
2761 #else
2762         netif_stop_queue(netdev);
2763 #endif
2764
2765         /* Herbert's original patch had:
2766          *  smp_mb__after_netif_stop_queue();
2767          * but since that doesn't exist yet, just open code it. */
2768         smp_mb();
2769
2770         /* We need to check again in a case another CPU has just
2771          * made room available. */
2772         if (IGB_DESC_UNUSED(tx_ring) < size)
2773                 return -EBUSY;
2774
2775         /* A reprieve! */
2776 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2777         netif_wake_subqueue(netdev, tx_ring->queue_index);
2778 #else
2779         netif_wake_queue(netdev);
2780 #endif  
2781         ++adapter->restart_queue;
2782         return 0;
2783 }
2784
2785 static int igb_maybe_stop_tx(struct net_device *netdev,
2786                              struct igb_ring *tx_ring, int size)
2787 {
2788         if (IGB_DESC_UNUSED(tx_ring) >= size)
2789                 return 0;
2790         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2791 }
2792
2793 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2794
2795 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2796                                    struct net_device *netdev,
2797                                    struct igb_ring *tx_ring)
2798 {
2799         struct igb_adapter *adapter = netdev_priv(netdev);
2800         unsigned int tx_flags = 0;
2801         unsigned int len;
2802         u8 hdr_len = 0;
2803         int tso = 0;
2804
2805         len = skb_headlen(skb);
2806
2807         if (test_bit(__IGB_DOWN, &adapter->state)) {
2808                 dev_kfree_skb_any(skb);
2809                 return NETDEV_TX_OK;
2810         }
2811
2812         if (skb->len <= 0) {
2813                 dev_kfree_skb_any(skb);
2814                 return NETDEV_TX_OK;
2815         }
2816
2817         /* need: 1 descriptor per page,
2818          *       + 2 desc gap to keep tail from touching head,
2819          *       + 1 desc for skb->data,
2820          *       + 1 desc for context descriptor,
2821          * otherwise try next time */
2822         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2823                 /* this is a hard error */
2824                 return NETDEV_TX_BUSY;
2825         }
2826
2827         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2828                 tx_flags |= IGB_TX_FLAGS_VLAN;
2829                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2830         }
2831
2832         if (skb->protocol == htons(ETH_P_IP))
2833                 tx_flags |= IGB_TX_FLAGS_IPV4;
2834
2835         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2836                                               &hdr_len) : 0;
2837
2838         if (tso < 0) {
2839                 dev_kfree_skb_any(skb);
2840                 return NETDEV_TX_OK;
2841         }
2842
2843         if (tso)
2844                 tx_flags |= IGB_TX_FLAGS_TSO;
2845         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2846                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2847                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2848
2849         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2850                          igb_tx_map_adv(adapter, tx_ring, skb),
2851                          skb->len, hdr_len);
2852
2853         netdev->trans_start = jiffies;
2854
2855         /* Make sure there is space in the ring for the next send. */
2856         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2857
2858         return NETDEV_TX_OK;
2859 }
2860
2861 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2862 {
2863         struct igb_adapter *adapter = netdev_priv(netdev);
2864         struct igb_ring *tx_ring;
2865
2866 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2867         int r_idx = 0;
2868         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
2869         tx_ring = adapter->multi_tx_table[r_idx];
2870 #else
2871         tx_ring = &adapter->tx_ring[0];
2872 #endif
2873
2874
2875         /* This goes back to the question of how to logically map a tx queue
2876          * to a flow.  Right now, performance is impacted slightly negatively
2877          * if using multiple tx queues.  If the stack breaks away from a
2878          * single qdisc implementation, we can look at this again. */
2879         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2880 }
2881
2882 /**
2883  * igb_tx_timeout - Respond to a Tx Hang
2884  * @netdev: network interface device structure
2885  **/
2886 static void igb_tx_timeout(struct net_device *netdev)
2887 {
2888         struct igb_adapter *adapter = netdev_priv(netdev);
2889         struct e1000_hw *hw = &adapter->hw;
2890
2891         /* Do the reset outside of interrupt context */
2892         adapter->tx_timeout_count++;
2893         schedule_work(&adapter->reset_task);
2894         wr32(E1000_EICS, adapter->eims_enable_mask &
2895                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2896 }
2897
2898 static void igb_reset_task(struct work_struct *work)
2899 {
2900         struct igb_adapter *adapter;
2901         adapter = container_of(work, struct igb_adapter, reset_task);
2902
2903         igb_reinit_locked(adapter);
2904 }
2905
2906 /**
2907  * igb_get_stats - Get System Network Statistics
2908  * @netdev: network interface device structure
2909  *
2910  * Returns the address of the device statistics structure.
2911  * The statistics are actually updated from the timer callback.
2912  **/
2913 static struct net_device_stats *
2914 igb_get_stats(struct net_device *netdev)
2915 {
2916         struct igb_adapter *adapter = netdev_priv(netdev);
2917
2918         /* only return the current stats */
2919         return &adapter->net_stats;
2920 }
2921
2922 /**
2923  * igb_change_mtu - Change the Maximum Transfer Unit
2924  * @netdev: network interface device structure
2925  * @new_mtu: new value for maximum frame size
2926  *
2927  * Returns 0 on success, negative on failure
2928  **/
2929 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
2930 {
2931         struct igb_adapter *adapter = netdev_priv(netdev);
2932         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2933
2934         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
2935             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2936                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
2937                 return -EINVAL;
2938         }
2939
2940 #define MAX_STD_JUMBO_FRAME_SIZE 9234
2941         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2942                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
2943                 return -EINVAL;
2944         }
2945
2946         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2947                 msleep(1);
2948         /* igb_down has a dependency on max_frame_size */
2949         adapter->max_frame_size = max_frame;
2950         if (netif_running(netdev))
2951                 igb_down(adapter);
2952
2953         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
2954          * means we reserve 2 more, this pushes us to allocate from the next
2955          * larger slab size.
2956          * i.e. RXBUFFER_2048 --> size-4096 slab
2957          */
2958
2959         if (max_frame <= IGB_RXBUFFER_256)
2960                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
2961         else if (max_frame <= IGB_RXBUFFER_512)
2962                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
2963         else if (max_frame <= IGB_RXBUFFER_1024)
2964                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
2965         else if (max_frame <= IGB_RXBUFFER_2048)
2966                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
2967         else
2968                 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
2969         /* adjust allocation if LPE protects us, and we aren't using SBP */
2970         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
2971              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
2972                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2973
2974         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
2975                  netdev->mtu, new_mtu);
2976         netdev->mtu = new_mtu;
2977
2978         if (netif_running(netdev))
2979                 igb_up(adapter);
2980         else
2981                 igb_reset(adapter);
2982
2983         clear_bit(__IGB_RESETTING, &adapter->state);
2984
2985         return 0;
2986 }
2987
2988 /**
2989  * igb_update_stats - Update the board statistics counters
2990  * @adapter: board private structure
2991  **/
2992
2993 void igb_update_stats(struct igb_adapter *adapter)
2994 {
2995         struct e1000_hw *hw = &adapter->hw;
2996         struct pci_dev *pdev = adapter->pdev;
2997         u16 phy_tmp;
2998
2999 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3000
3001         /*
3002          * Prevent stats update while adapter is being reset, or if the pci
3003          * connection is down.
3004          */
3005         if (adapter->link_speed == 0)
3006                 return;
3007         if (pci_channel_offline(pdev))
3008                 return;
3009
3010         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3011         adapter->stats.gprc += rd32(E1000_GPRC);
3012         adapter->stats.gorc += rd32(E1000_GORCL);
3013         rd32(E1000_GORCH); /* clear GORCL */
3014         adapter->stats.bprc += rd32(E1000_BPRC);
3015         adapter->stats.mprc += rd32(E1000_MPRC);
3016         adapter->stats.roc += rd32(E1000_ROC);
3017
3018         adapter->stats.prc64 += rd32(E1000_PRC64);
3019         adapter->stats.prc127 += rd32(E1000_PRC127);
3020         adapter->stats.prc255 += rd32(E1000_PRC255);
3021         adapter->stats.prc511 += rd32(E1000_PRC511);
3022         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3023         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3024         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3025         adapter->stats.sec += rd32(E1000_SEC);
3026
3027         adapter->stats.mpc += rd32(E1000_MPC);
3028         adapter->stats.scc += rd32(E1000_SCC);
3029         adapter->stats.ecol += rd32(E1000_ECOL);
3030         adapter->stats.mcc += rd32(E1000_MCC);
3031         adapter->stats.latecol += rd32(E1000_LATECOL);
3032         adapter->stats.dc += rd32(E1000_DC);
3033         adapter->stats.rlec += rd32(E1000_RLEC);
3034         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3035         adapter->stats.xontxc += rd32(E1000_XONTXC);
3036         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3037         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3038         adapter->stats.fcruc += rd32(E1000_FCRUC);
3039         adapter->stats.gptc += rd32(E1000_GPTC);
3040         adapter->stats.gotc += rd32(E1000_GOTCL);
3041         rd32(E1000_GOTCH); /* clear GOTCL */
3042         adapter->stats.rnbc += rd32(E1000_RNBC);
3043         adapter->stats.ruc += rd32(E1000_RUC);
3044         adapter->stats.rfc += rd32(E1000_RFC);
3045         adapter->stats.rjc += rd32(E1000_RJC);
3046         adapter->stats.tor += rd32(E1000_TORH);
3047         adapter->stats.tot += rd32(E1000_TOTH);
3048         adapter->stats.tpr += rd32(E1000_TPR);
3049
3050         adapter->stats.ptc64 += rd32(E1000_PTC64);
3051         adapter->stats.ptc127 += rd32(E1000_PTC127);
3052         adapter->stats.ptc255 += rd32(E1000_PTC255);
3053         adapter->stats.ptc511 += rd32(E1000_PTC511);
3054         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3055         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3056
3057         adapter->stats.mptc += rd32(E1000_MPTC);
3058         adapter->stats.bptc += rd32(E1000_BPTC);
3059
3060         /* used for adaptive IFS */
3061
3062         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3063         adapter->stats.tpt += hw->mac.tx_packet_delta;
3064         hw->mac.collision_delta = rd32(E1000_COLC);
3065         adapter->stats.colc += hw->mac.collision_delta;
3066
3067         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3068         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3069         adapter->stats.tncrs += rd32(E1000_TNCRS);
3070         adapter->stats.tsctc += rd32(E1000_TSCTC);
3071         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3072
3073         adapter->stats.iac += rd32(E1000_IAC);
3074         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3075         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3076         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3077         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3078         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3079         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3080         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3081         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3082
3083         /* Fill out the OS statistics structure */
3084         adapter->net_stats.multicast = adapter->stats.mprc;
3085         adapter->net_stats.collisions = adapter->stats.colc;
3086
3087         /* Rx Errors */
3088
3089         /* RLEC on some newer hardware can be incorrect so build
3090         * our own version based on RUC and ROC */
3091         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3092                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3093                 adapter->stats.ruc + adapter->stats.roc +
3094                 adapter->stats.cexterr;
3095         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3096                                               adapter->stats.roc;
3097         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3098         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3099         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3100
3101         /* Tx Errors */
3102         adapter->net_stats.tx_errors = adapter->stats.ecol +
3103                                        adapter->stats.latecol;
3104         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3105         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3106         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3107
3108         /* Tx Dropped needs to be maintained elsewhere */
3109
3110         /* Phy Stats */
3111         if (hw->phy.media_type == e1000_media_type_copper) {
3112                 if ((adapter->link_speed == SPEED_1000) &&
3113                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3114                                               &phy_tmp))) {
3115                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3116                         adapter->phy_stats.idle_errors += phy_tmp;
3117                 }
3118         }
3119
3120         /* Management Stats */
3121         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3122         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3123         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3124 }
3125
3126
3127 static irqreturn_t igb_msix_other(int irq, void *data)
3128 {
3129         struct net_device *netdev = data;
3130         struct igb_adapter *adapter = netdev_priv(netdev);
3131         struct e1000_hw *hw = &adapter->hw;
3132         u32 icr = rd32(E1000_ICR);
3133
3134         /* reading ICR causes bit 31 of EICR to be cleared */
3135         if (!(icr & E1000_ICR_LSC))
3136                 goto no_link_interrupt;
3137         hw->mac.get_link_status = 1;
3138         /* guard against interrupt when we're going down */
3139         if (!test_bit(__IGB_DOWN, &adapter->state))
3140                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3141         
3142 no_link_interrupt:
3143         wr32(E1000_IMS, E1000_IMS_LSC);
3144         wr32(E1000_EIMS, adapter->eims_other);
3145
3146         return IRQ_HANDLED;
3147 }
3148
3149 static irqreturn_t igb_msix_tx(int irq, void *data)
3150 {
3151         struct igb_ring *tx_ring = data;
3152         struct igb_adapter *adapter = tx_ring->adapter;
3153         struct e1000_hw *hw = &adapter->hw;
3154
3155         if (!tx_ring->itr_val)
3156                 wr32(E1000_EIMC, tx_ring->eims_value);
3157 #ifdef CONFIG_DCA
3158         if (adapter->dca_enabled)
3159                 igb_update_tx_dca(tx_ring);
3160 #endif
3161         tx_ring->total_bytes = 0;
3162         tx_ring->total_packets = 0;
3163
3164         /* auto mask will automatically reenable the interrupt when we write
3165          * EICS */
3166         if (!igb_clean_tx_irq(tx_ring))
3167                 /* Ring was not completely cleaned, so fire another interrupt */
3168                 wr32(E1000_EICS, tx_ring->eims_value);
3169         else
3170                 wr32(E1000_EIMS, tx_ring->eims_value);
3171
3172         return IRQ_HANDLED;
3173 }
3174
3175 static irqreturn_t igb_msix_rx(int irq, void *data)
3176 {
3177         struct igb_ring *rx_ring = data;
3178         struct igb_adapter *adapter = rx_ring->adapter;
3179         struct e1000_hw *hw = &adapter->hw;
3180
3181         /* Write the ITR value calculated at the end of the
3182          * previous interrupt.
3183          */
3184
3185         if (adapter->set_itr) {
3186                 wr32(rx_ring->itr_register,
3187                      1000000000 / (rx_ring->itr_val * 256));
3188                 adapter->set_itr = 0;
3189         }
3190
3191         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3192                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3193
3194 #ifdef CONFIG_DCA
3195         if (adapter->dca_enabled)
3196                 igb_update_rx_dca(rx_ring);
3197 #endif
3198                 return IRQ_HANDLED;
3199 }
3200
3201 #ifdef CONFIG_DCA
3202 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3203 {
3204         u32 dca_rxctrl;
3205         struct igb_adapter *adapter = rx_ring->adapter;
3206         struct e1000_hw *hw = &adapter->hw;
3207         int cpu = get_cpu();
3208         int q = rx_ring - adapter->rx_ring;
3209
3210         if (rx_ring->cpu != cpu) {
3211                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3212                 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3213                 dca_rxctrl |= dca_get_tag(cpu);
3214                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3215                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3216                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3217                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3218                 rx_ring->cpu = cpu;
3219         }
3220         put_cpu();
3221 }
3222
3223 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3224 {
3225         u32 dca_txctrl;
3226         struct igb_adapter *adapter = tx_ring->adapter;
3227         struct e1000_hw *hw = &adapter->hw;
3228         int cpu = get_cpu();
3229         int q = tx_ring - adapter->tx_ring;
3230
3231         if (tx_ring->cpu != cpu) {
3232                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3233                 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3234                 dca_txctrl |= dca_get_tag(cpu);
3235                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3236                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3237                 tx_ring->cpu = cpu;
3238         }
3239         put_cpu();
3240 }
3241
3242 static void igb_setup_dca(struct igb_adapter *adapter)
3243 {
3244         int i;
3245
3246         if (!(adapter->dca_enabled))
3247                 return;
3248
3249         for (i = 0; i < adapter->num_tx_queues; i++) {
3250                 adapter->tx_ring[i].cpu = -1;
3251                 igb_update_tx_dca(&adapter->tx_ring[i]);
3252         }
3253         for (i = 0; i < adapter->num_rx_queues; i++) {
3254                 adapter->rx_ring[i].cpu = -1;
3255                 igb_update_rx_dca(&adapter->rx_ring[i]);
3256         }
3257 }
3258
3259 static int __igb_notify_dca(struct device *dev, void *data)
3260 {
3261         struct net_device *netdev = dev_get_drvdata(dev);
3262         struct igb_adapter *adapter = netdev_priv(netdev);
3263         struct e1000_hw *hw = &adapter->hw;
3264         unsigned long event = *(unsigned long *)data;
3265
3266         switch (event) {
3267         case DCA_PROVIDER_ADD:
3268                 /* if already enabled, don't do it again */
3269                 if (adapter->dca_enabled)
3270                         break;
3271                 adapter->dca_enabled = true;
3272                 /* Always use CB2 mode, difference is masked
3273                  * in the CB driver. */
3274                 wr32(E1000_DCA_CTRL, 2);
3275                 if (dca_add_requester(dev) == 0) {
3276                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3277                         igb_setup_dca(adapter);
3278                         break;
3279                 }
3280                 /* Fall Through since DCA is disabled. */
3281         case DCA_PROVIDER_REMOVE:
3282                 if (adapter->dca_enabled) {
3283                         /* without this a class_device is left
3284                          * hanging around in the sysfs model */
3285                         dca_remove_requester(dev);
3286                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3287                         adapter->dca_enabled = false;
3288                         wr32(E1000_DCA_CTRL, 1);
3289                 }
3290                 break;
3291         }
3292
3293         return 0;
3294 }
3295
3296 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3297                           void *p)
3298 {
3299         int ret_val;
3300
3301         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3302                                          __igb_notify_dca);
3303
3304         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3305 }
3306 #endif /* CONFIG_DCA */
3307
3308 /**
3309  * igb_intr_msi - Interrupt Handler
3310  * @irq: interrupt number
3311  * @data: pointer to a network interface device structure
3312  **/
3313 static irqreturn_t igb_intr_msi(int irq, void *data)
3314 {
3315         struct net_device *netdev = data;
3316         struct igb_adapter *adapter = netdev_priv(netdev);
3317         struct e1000_hw *hw = &adapter->hw;
3318         /* read ICR disables interrupts using IAM */
3319         u32 icr = rd32(E1000_ICR);
3320
3321         /* Write the ITR value calculated at the end of the
3322          * previous interrupt.
3323          */
3324         if (adapter->set_itr) {
3325                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3326                 adapter->set_itr = 0;
3327         }
3328
3329         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3330                 hw->mac.get_link_status = 1;
3331                 if (!test_bit(__IGB_DOWN, &adapter->state))
3332                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3333         }
3334
3335         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3336
3337         return IRQ_HANDLED;
3338 }
3339
3340 /**
3341  * igb_intr - Interrupt Handler
3342  * @irq: interrupt number
3343  * @data: pointer to a network interface device structure
3344  **/
3345 static irqreturn_t igb_intr(int irq, void *data)
3346 {
3347         struct net_device *netdev = data;
3348         struct igb_adapter *adapter = netdev_priv(netdev);
3349         struct e1000_hw *hw = &adapter->hw;
3350         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3351          * need for the IMC write */
3352         u32 icr = rd32(E1000_ICR);
3353         u32 eicr = 0;
3354         if (!icr)
3355                 return IRQ_NONE;  /* Not our interrupt */
3356
3357         /* Write the ITR value calculated at the end of the
3358          * previous interrupt.
3359          */
3360         if (adapter->set_itr) {
3361                 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3362                 adapter->set_itr = 0;
3363         }
3364
3365         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3366          * not set, then the adapter didn't send an interrupt */
3367         if (!(icr & E1000_ICR_INT_ASSERTED))
3368                 return IRQ_NONE;
3369
3370         eicr = rd32(E1000_EICR);
3371
3372         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3373                 hw->mac.get_link_status = 1;
3374                 /* guard against interrupt when we're going down */
3375                 if (!test_bit(__IGB_DOWN, &adapter->state))
3376                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3377         }
3378
3379         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3380
3381         return IRQ_HANDLED;
3382 }
3383
3384 /**
3385  * igb_poll - NAPI Rx polling callback
3386  * @napi: napi polling structure
3387  * @budget: count of how many packets we should handle
3388  **/
3389 static int igb_poll(struct napi_struct *napi, int budget)
3390 {
3391         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3392         struct igb_adapter *adapter = rx_ring->adapter;
3393         struct net_device *netdev = adapter->netdev;
3394         int tx_clean_complete, work_done = 0;
3395
3396         /* this poll routine only supports one tx and one rx queue */
3397 #ifdef CONFIG_DCA
3398         if (adapter->dca_enabled)
3399                 igb_update_tx_dca(&adapter->tx_ring[0]);
3400 #endif
3401         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3402
3403 #ifdef CONFIG_DCA
3404         if (adapter->dca_enabled)
3405                 igb_update_rx_dca(&adapter->rx_ring[0]);
3406 #endif
3407         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3408
3409         /* If no Tx and not enough Rx work done, exit the polling mode */
3410         if ((tx_clean_complete && (work_done < budget)) ||
3411             !netif_running(netdev)) {
3412                 if (adapter->itr_setting & 3)
3413                         igb_set_itr(adapter, E1000_ITR, false);
3414                 netif_rx_complete(netdev, napi);
3415                 if (!test_bit(__IGB_DOWN, &adapter->state))
3416                         igb_irq_enable(adapter);
3417                 return 0;
3418         }
3419
3420         return 1;
3421 }
3422
3423 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3424 {
3425         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3426         struct igb_adapter *adapter = rx_ring->adapter;
3427         struct e1000_hw *hw = &adapter->hw;
3428         struct net_device *netdev = adapter->netdev;
3429         int work_done = 0;
3430
3431         /* Keep link state information with original netdev */
3432         if (!netif_carrier_ok(netdev))
3433                 goto quit_polling;
3434
3435 #ifdef CONFIG_DCA
3436         if (adapter->dca_enabled)
3437                 igb_update_rx_dca(rx_ring);
3438 #endif
3439         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3440
3441
3442         /* If not enough Rx work done, exit the polling mode */
3443         if ((work_done == 0) || !netif_running(netdev)) {
3444 quit_polling:
3445                 netif_rx_complete(netdev, napi);
3446
3447                 wr32(E1000_EIMS, rx_ring->eims_value);
3448                 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3449                     (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3450                         int mean_size = rx_ring->total_bytes /
3451                                         rx_ring->total_packets;
3452                         if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3453                                 igb_raise_rx_eitr(adapter, rx_ring);
3454                         else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3455                                 igb_lower_rx_eitr(adapter, rx_ring);
3456                 }
3457
3458                 if (!test_bit(__IGB_DOWN, &adapter->state))
3459                         wr32(E1000_EIMS, rx_ring->eims_value);
3460
3461                 return 0;
3462         }
3463
3464         return 1;
3465 }
3466
3467 static inline u32 get_head(struct igb_ring *tx_ring)
3468 {
3469         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3470         return le32_to_cpu(*(volatile __le32 *)end);
3471 }
3472
3473 /**
3474  * igb_clean_tx_irq - Reclaim resources after transmit completes
3475  * @adapter: board private structure
3476  * returns true if ring is completely cleaned
3477  **/
3478 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3479 {
3480         struct igb_adapter *adapter = tx_ring->adapter;
3481         struct e1000_hw *hw = &adapter->hw;
3482         struct net_device *netdev = adapter->netdev;
3483         struct e1000_tx_desc *tx_desc;
3484         struct igb_buffer *buffer_info;
3485         struct sk_buff *skb;
3486         unsigned int i;
3487         u32 head, oldhead;
3488         unsigned int count = 0;
3489         bool cleaned = false;
3490         bool retval = true;
3491         unsigned int total_bytes = 0, total_packets = 0;
3492
3493         rmb();
3494         head = get_head(tx_ring);
3495         i = tx_ring->next_to_clean;
3496         while (1) {
3497                 while (i != head) {
3498                         cleaned = true;
3499                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3500                         buffer_info = &tx_ring->buffer_info[i];
3501                         skb = buffer_info->skb;
3502
3503                         if (skb) {
3504                                 unsigned int segs, bytecount;
3505                                 /* gso_segs is currently only valid for tcp */
3506                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3507                                 /* multiply data chunks by size of headers */
3508                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3509                                             skb->len;
3510                                 total_packets += segs;
3511                                 total_bytes += bytecount;
3512                         }
3513
3514                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3515                         tx_desc->upper.data = 0;
3516
3517                         i++;
3518                         if (i == tx_ring->count)
3519                                 i = 0;
3520
3521                         count++;
3522                         if (count == IGB_MAX_TX_CLEAN) {
3523                                 retval = false;
3524                                 goto done_cleaning;
3525                         }
3526                 }
3527                 oldhead = head;
3528                 rmb();
3529                 head = get_head(tx_ring);
3530                 if (head == oldhead)
3531                         goto done_cleaning;
3532         }  /* while (1) */
3533
3534 done_cleaning:
3535         tx_ring->next_to_clean = i;
3536
3537         if (unlikely(cleaned &&
3538                      netif_carrier_ok(netdev) &&
3539                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3540                 /* Make sure that anybody stopping the queue after this
3541                  * sees the new next_to_clean.
3542                  */
3543                 smp_mb();
3544 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3545                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3546                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3547                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3548                         ++adapter->restart_queue;
3549                 }
3550 #else
3551                 if (netif_queue_stopped(netdev) &&
3552                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3553                         netif_wake_queue(netdev);
3554                         ++adapter->restart_queue;
3555                 }
3556 #endif          
3557         }
3558
3559         if (tx_ring->detect_tx_hung) {
3560                 /* Detect a transmit hang in hardware, this serializes the
3561                  * check with the clearing of time_stamp and movement of i */
3562                 tx_ring->detect_tx_hung = false;
3563                 if (tx_ring->buffer_info[i].time_stamp &&
3564                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3565                                (adapter->tx_timeout_factor * HZ))
3566                     && !(rd32(E1000_STATUS) &
3567                          E1000_STATUS_TXOFF)) {
3568
3569                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3570                         /* detected Tx unit hang */
3571                         dev_err(&adapter->pdev->dev,
3572                                 "Detected Tx Unit Hang\n"
3573                                 "  Tx Queue             <%lu>\n"
3574                                 "  TDH                  <%x>\n"
3575                                 "  TDT                  <%x>\n"
3576                                 "  next_to_use          <%x>\n"
3577                                 "  next_to_clean        <%x>\n"
3578                                 "  head (WB)            <%x>\n"
3579                                 "buffer_info[next_to_clean]\n"
3580                                 "  time_stamp           <%lx>\n"
3581                                 "  jiffies              <%lx>\n"
3582                                 "  desc.status          <%x>\n",
3583                                 (unsigned long)((tx_ring - adapter->tx_ring) /
3584                                         sizeof(struct igb_ring)),
3585                                 readl(adapter->hw.hw_addr + tx_ring->head),
3586                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3587                                 tx_ring->next_to_use,
3588                                 tx_ring->next_to_clean,
3589                                 head,
3590                                 tx_ring->buffer_info[i].time_stamp,
3591                                 jiffies,
3592                                 tx_desc->upper.fields.status);
3593 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3594                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3595 #else
3596                         netif_stop_queue(netdev);
3597 #endif
3598                 }
3599         }
3600         tx_ring->total_bytes += total_bytes;
3601         tx_ring->total_packets += total_packets;
3602         tx_ring->tx_stats.bytes += total_bytes;
3603         tx_ring->tx_stats.packets += total_packets;
3604         adapter->net_stats.tx_bytes += total_bytes;
3605         adapter->net_stats.tx_packets += total_packets;
3606         return retval;
3607 }
3608
3609
3610 /**
3611  * igb_receive_skb - helper function to handle rx indications
3612  * @adapter: board private structure
3613  * @status: descriptor status field as written by hardware
3614  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3615  * @skb: pointer to sk_buff to be indicated to stack
3616  **/
3617 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
3618                             struct sk_buff *skb)
3619 {
3620         if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3621                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3622                                          le16_to_cpu(vlan));
3623         else
3624                 netif_receive_skb(skb);
3625 }
3626
3627
3628 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3629                                        u32 status_err, struct sk_buff *skb)
3630 {
3631         skb->ip_summed = CHECKSUM_NONE;
3632
3633         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3634         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3635                 return;
3636         /* TCP/UDP checksum error bit is set */
3637         if (status_err &
3638             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3639                 /* let the stack verify checksum errors */
3640                 adapter->hw_csum_err++;
3641                 return;
3642         }
3643         /* It must be a TCP or UDP packet with a valid checksum */
3644         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3645                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3646
3647         adapter->hw_csum_good++;
3648 }
3649
3650 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3651                                  int *work_done, int budget)
3652 {
3653         struct igb_adapter *adapter = rx_ring->adapter;
3654         struct net_device *netdev = adapter->netdev;
3655         struct pci_dev *pdev = adapter->pdev;
3656         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3657         struct igb_buffer *buffer_info , *next_buffer;
3658         struct sk_buff *skb;
3659         unsigned int i, j;
3660         u32 length, hlen, staterr;
3661         bool cleaned = false;
3662         int cleaned_count = 0;
3663         unsigned int total_bytes = 0, total_packets = 0;
3664
3665         i = rx_ring->next_to_clean;
3666         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3667         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3668
3669         while (staterr & E1000_RXD_STAT_DD) {
3670                 if (*work_done >= budget)
3671                         break;
3672                 (*work_done)++;
3673                 buffer_info = &rx_ring->buffer_info[i];
3674
3675                 /* HW will not DMA in data larger than the given buffer, even
3676                  * if it parses the (NFS, of course) header to be larger.  In
3677                  * that case, it fills the header buffer and spills the rest
3678                  * into the page.
3679                  */
3680                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3681                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3682                 if (hlen > adapter->rx_ps_hdr_size)
3683                         hlen = adapter->rx_ps_hdr_size;
3684
3685                 length = le16_to_cpu(rx_desc->wb.upper.length);
3686                 cleaned = true;
3687                 cleaned_count++;
3688
3689                 if (rx_ring->pending_skb != NULL) {
3690                         skb = rx_ring->pending_skb;
3691                         rx_ring->pending_skb = NULL;
3692                         j = rx_ring->pending_skb_page;
3693                 } else {
3694                         skb = buffer_info->skb;
3695                         prefetch(skb->data - NET_IP_ALIGN);
3696                         buffer_info->skb = NULL;
3697                         if (hlen) {
3698                                 pci_unmap_single(pdev, buffer_info->dma,
3699                                                  adapter->rx_ps_hdr_size +
3700                                                    NET_IP_ALIGN,
3701                                                  PCI_DMA_FROMDEVICE);
3702                                 skb_put(skb, hlen);
3703                         } else {
3704                                 pci_unmap_single(pdev, buffer_info->dma,
3705                                                  adapter->rx_buffer_len +
3706                                                    NET_IP_ALIGN,
3707                                                  PCI_DMA_FROMDEVICE);
3708                                 skb_put(skb, length);
3709                                 goto send_up;
3710                         }
3711                         j = 0;
3712                 }
3713
3714                 while (length) {
3715                         pci_unmap_page(pdev, buffer_info->page_dma,
3716                                 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3717                         buffer_info->page_dma = 0;
3718                         skb_fill_page_desc(skb, j, buffer_info->page,
3719                                                 0, length);
3720                         buffer_info->page = NULL;
3721
3722                         skb->len += length;
3723                         skb->data_len += length;
3724                         skb->truesize += length;
3725                         rx_desc->wb.upper.status_error = 0;
3726                         if (staterr & E1000_RXD_STAT_EOP)
3727                                 break;
3728
3729                         j++;
3730                         cleaned_count++;
3731                         i++;
3732                         if (i == rx_ring->count)
3733                                 i = 0;
3734
3735                         buffer_info = &rx_ring->buffer_info[i];
3736                         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3737                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3738                         length = le16_to_cpu(rx_desc->wb.upper.length);
3739                         if (!(staterr & E1000_RXD_STAT_DD)) {
3740                                 rx_ring->pending_skb = skb;
3741                                 rx_ring->pending_skb_page = j;
3742                                 goto out;
3743                         }
3744                 }
3745 send_up:
3746                 pskb_trim(skb, skb->len - 4);
3747                 i++;
3748                 if (i == rx_ring->count)
3749                         i = 0;
3750                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3751                 prefetch(next_rxd);
3752                 next_buffer = &rx_ring->buffer_info[i];
3753
3754                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3755                         dev_kfree_skb_irq(skb);
3756                         goto next_desc;
3757                 }
3758                 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3759
3760                 total_bytes += skb->len;
3761                 total_packets++;
3762
3763                 igb_rx_checksum_adv(adapter, staterr, skb);
3764
3765                 skb->protocol = eth_type_trans(skb, netdev);
3766
3767                 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3768
3769                 netdev->last_rx = jiffies;
3770
3771 next_desc:
3772                 rx_desc->wb.upper.status_error = 0;
3773
3774                 /* return some buffers to hardware, one at a time is too slow */
3775                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3776                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3777                         cleaned_count = 0;
3778                 }
3779
3780                 /* use prefetched values */
3781                 rx_desc = next_rxd;
3782                 buffer_info = next_buffer;
3783
3784                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3785         }
3786 out:
3787         rx_ring->next_to_clean = i;
3788         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3789
3790         if (cleaned_count)
3791                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3792
3793         rx_ring->total_packets += total_packets;
3794         rx_ring->total_bytes += total_bytes;
3795         rx_ring->rx_stats.packets += total_packets;
3796         rx_ring->rx_stats.bytes += total_bytes;
3797         adapter->net_stats.rx_bytes += total_bytes;
3798         adapter->net_stats.rx_packets += total_packets;
3799         return cleaned;
3800 }
3801
3802
3803 /**
3804  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3805  * @adapter: address of board private structure
3806  **/
3807 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3808                                      int cleaned_count)
3809 {
3810         struct igb_adapter *adapter = rx_ring->adapter;
3811         struct net_device *netdev = adapter->netdev;
3812         struct pci_dev *pdev = adapter->pdev;
3813         union e1000_adv_rx_desc *rx_desc;
3814         struct igb_buffer *buffer_info;
3815         struct sk_buff *skb;
3816         unsigned int i;
3817
3818         i = rx_ring->next_to_use;
3819         buffer_info = &rx_ring->buffer_info[i];
3820
3821         while (cleaned_count--) {
3822                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3823
3824                 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3825                         buffer_info->page = alloc_page(GFP_ATOMIC);
3826                         if (!buffer_info->page) {
3827                                 adapter->alloc_rx_buff_failed++;
3828                                 goto no_buffers;
3829                         }
3830                         buffer_info->page_dma =
3831                                 pci_map_page(pdev,
3832                                              buffer_info->page,
3833                                              0, PAGE_SIZE,
3834                                              PCI_DMA_FROMDEVICE);
3835                 }
3836
3837                 if (!buffer_info->skb) {
3838                         int bufsz;
3839
3840                         if (adapter->rx_ps_hdr_size)
3841                                 bufsz = adapter->rx_ps_hdr_size;
3842                         else
3843                                 bufsz = adapter->rx_buffer_len;
3844                         bufsz += NET_IP_ALIGN;
3845                         skb = netdev_alloc_skb(netdev, bufsz);
3846
3847                         if (!skb) {
3848                                 adapter->alloc_rx_buff_failed++;
3849                                 goto no_buffers;
3850                         }
3851
3852                         /* Make buffer alignment 2 beyond a 16 byte boundary
3853                          * this will result in a 16 byte aligned IP header after
3854                          * the 14 byte MAC header is removed
3855                          */
3856                         skb_reserve(skb, NET_IP_ALIGN);
3857
3858                         buffer_info->skb = skb;
3859                         buffer_info->dma = pci_map_single(pdev, skb->data,
3860                                                           bufsz,
3861                                                           PCI_DMA_FROMDEVICE);
3862
3863                 }
3864                 /* Refresh the desc even if buffer_addrs didn't change because
3865                  * each write-back erases this info. */
3866                 if (adapter->rx_ps_hdr_size) {
3867                         rx_desc->read.pkt_addr =
3868                              cpu_to_le64(buffer_info->page_dma);
3869                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3870                 } else {
3871                         rx_desc->read.pkt_addr =
3872                              cpu_to_le64(buffer_info->dma);
3873                         rx_desc->read.hdr_addr = 0;
3874                 }
3875
3876                 i++;
3877                 if (i == rx_ring->count)
3878                         i = 0;
3879                 buffer_info = &rx_ring->buffer_info[i];
3880         }
3881
3882 no_buffers:
3883         if (rx_ring->next_to_use != i) {
3884                 rx_ring->next_to_use = i;
3885                 if (i == 0)
3886                         i = (rx_ring->count - 1);
3887                 else
3888                         i--;
3889
3890                 /* Force memory writes to complete before letting h/w
3891                  * know there are new descriptors to fetch.  (Only
3892                  * applicable for weak-ordered memory model archs,
3893                  * such as IA-64). */
3894                 wmb();
3895                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
3896         }
3897 }
3898
3899 /**
3900  * igb_mii_ioctl -
3901  * @netdev:
3902  * @ifreq:
3903  * @cmd:
3904  **/
3905 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3906 {
3907         struct igb_adapter *adapter = netdev_priv(netdev);
3908         struct mii_ioctl_data *data = if_mii(ifr);
3909
3910         if (adapter->hw.phy.media_type != e1000_media_type_copper)
3911                 return -EOPNOTSUPP;
3912
3913         switch (cmd) {
3914         case SIOCGMIIPHY:
3915                 data->phy_id = adapter->hw.phy.addr;
3916                 break;
3917         case SIOCGMIIREG:
3918                 if (!capable(CAP_NET_ADMIN))
3919                         return -EPERM;
3920                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
3921                                                      data->reg_num
3922                                                      & 0x1F, &data->val_out))
3923                         return -EIO;
3924                 break;
3925         case SIOCSMIIREG:
3926         default:
3927                 return -EOPNOTSUPP;
3928         }
3929         return 0;
3930 }
3931
3932 /**
3933  * igb_ioctl -
3934  * @netdev:
3935  * @ifreq:
3936  * @cmd:
3937  **/
3938 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3939 {
3940         switch (cmd) {
3941         case SIOCGMIIPHY:
3942         case SIOCGMIIREG:
3943         case SIOCSMIIREG:
3944                 return igb_mii_ioctl(netdev, ifr, cmd);
3945         default:
3946                 return -EOPNOTSUPP;
3947         }
3948 }
3949
3950 static void igb_vlan_rx_register(struct net_device *netdev,
3951                                  struct vlan_group *grp)
3952 {
3953         struct igb_adapter *adapter = netdev_priv(netdev);
3954         struct e1000_hw *hw = &adapter->hw;
3955         u32 ctrl, rctl;
3956
3957         igb_irq_disable(adapter);
3958         adapter->vlgrp = grp;
3959
3960         if (grp) {
3961                 /* enable VLAN tag insert/strip */
3962                 ctrl = rd32(E1000_CTRL);
3963                 ctrl |= E1000_CTRL_VME;
3964                 wr32(E1000_CTRL, ctrl);
3965
3966                 /* enable VLAN receive filtering */
3967                 rctl = rd32(E1000_RCTL);
3968                 rctl |= E1000_RCTL_VFE;
3969                 rctl &= ~E1000_RCTL_CFIEN;
3970                 wr32(E1000_RCTL, rctl);
3971                 igb_update_mng_vlan(adapter);
3972                 wr32(E1000_RLPML,
3973                                 adapter->max_frame_size + VLAN_TAG_SIZE);
3974         } else {
3975                 /* disable VLAN tag insert/strip */
3976                 ctrl = rd32(E1000_CTRL);
3977                 ctrl &= ~E1000_CTRL_VME;
3978                 wr32(E1000_CTRL, ctrl);
3979
3980                 /* disable VLAN filtering */
3981                 rctl = rd32(E1000_RCTL);
3982                 rctl &= ~E1000_RCTL_VFE;
3983                 wr32(E1000_RCTL, rctl);
3984                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
3985                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3986                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
3987                 }
3988                 wr32(E1000_RLPML,
3989                                 adapter->max_frame_size);
3990         }
3991
3992         if (!test_bit(__IGB_DOWN, &adapter->state))
3993                 igb_irq_enable(adapter);
3994 }
3995
3996 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3997 {
3998         struct igb_adapter *adapter = netdev_priv(netdev);
3999         struct e1000_hw *hw = &adapter->hw;
4000         u32 vfta, index;
4001
4002         if ((adapter->hw.mng_cookie.status &
4003              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4004             (vid == adapter->mng_vlan_id))
4005                 return;
4006         /* add VID to filter table */
4007         index = (vid >> 5) & 0x7F;
4008         vfta = array_rd32(E1000_VFTA, index);
4009         vfta |= (1 << (vid & 0x1F));
4010         igb_write_vfta(&adapter->hw, index, vfta);
4011 }
4012
4013 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4014 {
4015         struct igb_adapter *adapter = netdev_priv(netdev);
4016         struct e1000_hw *hw = &adapter->hw;
4017         u32 vfta, index;
4018
4019         igb_irq_disable(adapter);
4020         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4021
4022         if (!test_bit(__IGB_DOWN, &adapter->state))
4023                 igb_irq_enable(adapter);
4024
4025         if ((adapter->hw.mng_cookie.status &
4026              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4027             (vid == adapter->mng_vlan_id)) {
4028                 /* release control to f/w */
4029                 igb_release_hw_control(adapter);
4030                 return;
4031         }
4032
4033         /* remove VID from filter table */
4034         index = (vid >> 5) & 0x7F;
4035         vfta = array_rd32(E1000_VFTA, index);
4036         vfta &= ~(1 << (vid & 0x1F));
4037         igb_write_vfta(&adapter->hw, index, vfta);
4038 }
4039
4040 static void igb_restore_vlan(struct igb_adapter *adapter)
4041 {
4042         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4043
4044         if (adapter->vlgrp) {
4045                 u16 vid;
4046                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4047                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4048                                 continue;
4049                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4050                 }
4051         }
4052 }
4053
4054 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4055 {
4056         struct e1000_mac_info *mac = &adapter->hw.mac;
4057
4058         mac->autoneg = 0;
4059
4060         /* Fiber NICs only allow 1000 gbps Full duplex */
4061         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4062                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4063                 dev_err(&adapter->pdev->dev,
4064                         "Unsupported Speed/Duplex configuration\n");
4065                 return -EINVAL;
4066         }
4067
4068         switch (spddplx) {
4069         case SPEED_10 + DUPLEX_HALF:
4070                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4071                 break;
4072         case SPEED_10 + DUPLEX_FULL:
4073                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4074                 break;
4075         case SPEED_100 + DUPLEX_HALF:
4076                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4077                 break;
4078         case SPEED_100 + DUPLEX_FULL:
4079                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4080                 break;
4081         case SPEED_1000 + DUPLEX_FULL:
4082                 mac->autoneg = 1;
4083                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4084                 break;
4085         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4086         default:
4087                 dev_err(&adapter->pdev->dev,
4088                         "Unsupported Speed/Duplex configuration\n");
4089                 return -EINVAL;
4090         }
4091         return 0;
4092 }
4093
4094
4095 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4096 {
4097         struct net_device *netdev = pci_get_drvdata(pdev);
4098         struct igb_adapter *adapter = netdev_priv(netdev);
4099         struct e1000_hw *hw = &adapter->hw;
4100         u32 ctrl, ctrl_ext, rctl, status;
4101         u32 wufc = adapter->wol;
4102 #ifdef CONFIG_PM
4103         int retval = 0;
4104 #endif
4105
4106         netif_device_detach(netdev);
4107
4108         if (netif_running(netdev)) {
4109                 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4110                 igb_down(adapter);
4111                 igb_free_irq(adapter);
4112         }
4113
4114 #ifdef CONFIG_PM
4115         retval = pci_save_state(pdev);
4116         if (retval)
4117                 return retval;
4118 #endif
4119
4120         status = rd32(E1000_STATUS);
4121         if (status & E1000_STATUS_LU)
4122                 wufc &= ~E1000_WUFC_LNKC;
4123
4124         if (wufc) {
4125                 igb_setup_rctl(adapter);
4126                 igb_set_multi(netdev);
4127
4128                 /* turn on all-multi mode if wake on multicast is enabled */
4129                 if (wufc & E1000_WUFC_MC) {
4130                         rctl = rd32(E1000_RCTL);
4131                         rctl |= E1000_RCTL_MPE;
4132                         wr32(E1000_RCTL, rctl);
4133                 }
4134
4135                 ctrl = rd32(E1000_CTRL);
4136                 /* advertise wake from D3Cold */
4137                 #define E1000_CTRL_ADVD3WUC 0x00100000
4138                 /* phy power management enable */
4139                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4140                 ctrl |= E1000_CTRL_ADVD3WUC;
4141                 wr32(E1000_CTRL, ctrl);
4142
4143                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4144                    adapter->hw.phy.media_type ==
4145                                         e1000_media_type_internal_serdes) {
4146                         /* keep the laser running in D3 */
4147                         ctrl_ext = rd32(E1000_CTRL_EXT);
4148                         ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4149                         wr32(E1000_CTRL_EXT, ctrl_ext);
4150                 }
4151
4152                 /* Allow time for pending master requests to run */
4153                 igb_disable_pcie_master(&adapter->hw);
4154
4155                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4156                 wr32(E1000_WUFC, wufc);
4157                 pci_enable_wake(pdev, PCI_D3hot, 1);
4158                 pci_enable_wake(pdev, PCI_D3cold, 1);
4159         } else {
4160                 wr32(E1000_WUC, 0);
4161                 wr32(E1000_WUFC, 0);
4162                 pci_enable_wake(pdev, PCI_D3hot, 0);
4163                 pci_enable_wake(pdev, PCI_D3cold, 0);
4164         }
4165
4166         /* make sure adapter isn't asleep if manageability is enabled */
4167         if (adapter->en_mng_pt) {
4168                 pci_enable_wake(pdev, PCI_D3hot, 1);
4169                 pci_enable_wake(pdev, PCI_D3cold, 1);
4170         }
4171
4172         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4173          * would have already happened in close and is redundant. */
4174         igb_release_hw_control(adapter);
4175
4176         pci_disable_device(pdev);
4177
4178         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4179
4180         return 0;
4181 }
4182
4183 #ifdef CONFIG_PM
4184 static int igb_resume(struct pci_dev *pdev)
4185 {
4186         struct net_device *netdev = pci_get_drvdata(pdev);
4187         struct igb_adapter *adapter = netdev_priv(netdev);
4188         struct e1000_hw *hw = &adapter->hw;
4189         u32 err;
4190
4191         pci_set_power_state(pdev, PCI_D0);
4192         pci_restore_state(pdev);
4193
4194         if (adapter->need_ioport)
4195                 err = pci_enable_device(pdev);
4196         else
4197                 err = pci_enable_device_mem(pdev);
4198         if (err) {
4199                 dev_err(&pdev->dev,
4200                         "igb: Cannot enable PCI device from suspend\n");
4201                 return err;
4202         }
4203         pci_set_master(pdev);
4204
4205         pci_enable_wake(pdev, PCI_D3hot, 0);
4206         pci_enable_wake(pdev, PCI_D3cold, 0);
4207
4208         if (netif_running(netdev)) {
4209                 err = igb_request_irq(adapter);
4210                 if (err)
4211                         return err;
4212         }
4213
4214         /* e1000_power_up_phy(adapter); */
4215
4216         igb_reset(adapter);
4217         wr32(E1000_WUS, ~0);
4218
4219         igb_init_manageability(adapter);
4220
4221         if (netif_running(netdev))
4222                 igb_up(adapter);
4223
4224         netif_device_attach(netdev);
4225
4226         /* let the f/w know that the h/w is now under the control of the
4227          * driver. */
4228         igb_get_hw_control(adapter);
4229
4230         return 0;
4231 }
4232 #endif
4233
4234 static void igb_shutdown(struct pci_dev *pdev)
4235 {
4236         igb_suspend(pdev, PMSG_SUSPEND);
4237 }
4238
4239 #ifdef CONFIG_NET_POLL_CONTROLLER
4240 /*
4241  * Polling 'interrupt' - used by things like netconsole to send skbs
4242  * without having to re-enable interrupts. It's not called while
4243  * the interrupt routine is executing.
4244  */
4245 static void igb_netpoll(struct net_device *netdev)
4246 {
4247         struct igb_adapter *adapter = netdev_priv(netdev);
4248         int i;
4249         int work_done = 0;
4250
4251         igb_irq_disable(adapter);
4252         for (i = 0; i < adapter->num_tx_queues; i++)
4253                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4254
4255         for (i = 0; i < adapter->num_rx_queues; i++)
4256                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4257                                      &work_done,
4258                                      adapter->rx_ring[i].napi.weight);
4259
4260         igb_irq_enable(adapter);
4261 }
4262 #endif /* CONFIG_NET_POLL_CONTROLLER */
4263
4264 /**
4265  * igb_io_error_detected - called when PCI error is detected
4266  * @pdev: Pointer to PCI device
4267  * @state: The current pci connection state
4268  *
4269  * This function is called after a PCI bus error affecting
4270  * this device has been detected.
4271  */
4272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4273                                               pci_channel_state_t state)
4274 {
4275         struct net_device *netdev = pci_get_drvdata(pdev);
4276         struct igb_adapter *adapter = netdev_priv(netdev);
4277
4278         netif_device_detach(netdev);
4279
4280         if (netif_running(netdev))
4281                 igb_down(adapter);
4282         pci_disable_device(pdev);
4283
4284         /* Request a slot slot reset. */
4285         return PCI_ERS_RESULT_NEED_RESET;
4286 }
4287
4288 /**
4289  * igb_io_slot_reset - called after the pci bus has been reset.
4290  * @pdev: Pointer to PCI device
4291  *
4292  * Restart the card from scratch, as if from a cold-boot. Implementation
4293  * resembles the first-half of the igb_resume routine.
4294  */
4295 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4296 {
4297         struct net_device *netdev = pci_get_drvdata(pdev);
4298         struct igb_adapter *adapter = netdev_priv(netdev);
4299         struct e1000_hw *hw = &adapter->hw;
4300         int err;
4301
4302         if (adapter->need_ioport)
4303                 err = pci_enable_device(pdev);
4304         else
4305                 err = pci_enable_device_mem(pdev);
4306         if (err) {
4307                 dev_err(&pdev->dev,
4308                         "Cannot re-enable PCI device after reset.\n");
4309                 return PCI_ERS_RESULT_DISCONNECT;
4310         }
4311         pci_set_master(pdev);
4312         pci_restore_state(pdev);
4313
4314         pci_enable_wake(pdev, PCI_D3hot, 0);
4315         pci_enable_wake(pdev, PCI_D3cold, 0);
4316
4317         igb_reset(adapter);
4318         wr32(E1000_WUS, ~0);
4319
4320         return PCI_ERS_RESULT_RECOVERED;
4321 }
4322
4323 /**
4324  * igb_io_resume - called when traffic can start flowing again.
4325  * @pdev: Pointer to PCI device
4326  *
4327  * This callback is called when the error recovery driver tells us that
4328  * its OK to resume normal operation. Implementation resembles the
4329  * second-half of the igb_resume routine.
4330  */
4331 static void igb_io_resume(struct pci_dev *pdev)
4332 {
4333         struct net_device *netdev = pci_get_drvdata(pdev);
4334         struct igb_adapter *adapter = netdev_priv(netdev);
4335
4336         igb_init_manageability(adapter);
4337
4338         if (netif_running(netdev)) {
4339                 if (igb_up(adapter)) {
4340                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4341                         return;
4342                 }
4343         }
4344
4345         netif_device_attach(netdev);
4346
4347         /* let the f/w know that the h/w is now under the control of the
4348          * driver. */
4349         igb_get_hw_control(adapter);
4350
4351 }
4352
4353 /* igb_main.c */