1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
35 #include "e1000_regs.h"
36 #include "e1000_defines.h"
40 #define E1000_DEV_ID_82576 0x10C9
41 #define E1000_DEV_ID_82576_FIBER 0x10E6
42 #define E1000_DEV_ID_82576_SERDES 0x10E7
43 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
44 #define E1000_DEV_ID_82576_NS 0x150A
45 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
46 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
47 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
48 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
50 #define E1000_REVISION_2 2
51 #define E1000_REVISION_4 4
53 #define E1000_FUNC_0 0
54 #define E1000_FUNC_1 1
60 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
63 enum e1000_media_type {
64 e1000_media_type_unknown = 0,
65 e1000_media_type_copper = 1,
66 e1000_media_type_internal_serdes = 2,
71 e1000_nvm_unknown = 0,
74 e1000_nvm_eeprom_microwire,
79 enum e1000_nvm_override {
80 e1000_nvm_override_none = 0,
81 e1000_nvm_override_spi_small,
82 e1000_nvm_override_spi_large,
83 e1000_nvm_override_microwire_small,
84 e1000_nvm_override_microwire_large
88 e1000_phy_unknown = 0,
99 e1000_bus_type_unknown = 0,
102 e1000_bus_type_pci_express,
103 e1000_bus_type_reserved
106 enum e1000_bus_speed {
107 e1000_bus_speed_unknown = 0,
113 e1000_bus_speed_2500,
114 e1000_bus_speed_5000,
115 e1000_bus_speed_reserved
118 enum e1000_bus_width {
119 e1000_bus_width_unknown = 0,
120 e1000_bus_width_pcie_x1,
121 e1000_bus_width_pcie_x2,
122 e1000_bus_width_pcie_x4 = 4,
123 e1000_bus_width_pcie_x8 = 8,
126 e1000_bus_width_reserved
129 enum e1000_1000t_rx_status {
130 e1000_1000t_rx_status_not_ok = 0,
131 e1000_1000t_rx_status_ok,
132 e1000_1000t_rx_status_undefined = 0xFF
135 enum e1000_rev_polarity {
136 e1000_rev_polarity_normal = 0,
137 e1000_rev_polarity_reversed,
138 e1000_rev_polarity_undefined = 0xFF
146 e1000_fc_default = 0xFF
149 /* Statistics counters collected by the MAC */
150 struct e1000_hw_stats {
229 struct e1000_phy_stats {
234 struct e1000_host_mng_dhcp_cookie {
245 /* Host Interface "Rev 1" */
246 struct e1000_host_command_header {
253 #define E1000_HI_MAX_DATA_LENGTH 252
254 struct e1000_host_command_info {
255 struct e1000_host_command_header command_header;
256 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
259 /* Host Interface "Rev 2" */
260 struct e1000_host_mng_command_header {
268 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
269 struct e1000_host_mng_command_info {
270 struct e1000_host_mng_command_header command_header;
271 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
274 #include "e1000_mac.h"
275 #include "e1000_phy.h"
276 #include "e1000_nvm.h"
277 #include "e1000_mbx.h"
279 struct e1000_mac_operations {
280 s32 (*check_for_link)(struct e1000_hw *);
281 s32 (*reset_hw)(struct e1000_hw *);
282 s32 (*init_hw)(struct e1000_hw *);
283 bool (*check_mng_mode)(struct e1000_hw *);
284 s32 (*setup_physical_interface)(struct e1000_hw *);
285 void (*rar_set)(struct e1000_hw *, u8 *, u32);
286 s32 (*read_mac_addr)(struct e1000_hw *);
287 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
290 struct e1000_phy_operations {
291 s32 (*acquire)(struct e1000_hw *);
292 s32 (*check_reset_block)(struct e1000_hw *);
293 s32 (*force_speed_duplex)(struct e1000_hw *);
294 s32 (*get_cfg_done)(struct e1000_hw *hw);
295 s32 (*get_cable_length)(struct e1000_hw *);
296 s32 (*get_phy_info)(struct e1000_hw *);
297 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
298 void (*release)(struct e1000_hw *);
299 s32 (*reset)(struct e1000_hw *);
300 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
301 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
302 s32 (*write_reg)(struct e1000_hw *, u32, u16);
305 struct e1000_nvm_operations {
306 s32 (*acquire)(struct e1000_hw *);
307 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
308 void (*release)(struct e1000_hw *);
309 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
313 s32 (*get_invariants)(struct e1000_hw *);
314 struct e1000_mac_operations *mac_ops;
315 struct e1000_phy_operations *phy_ops;
316 struct e1000_nvm_operations *nvm_ops;
319 extern const struct e1000_info e1000_82575_info;
321 struct e1000_mac_info {
322 struct e1000_mac_operations ops;
327 enum e1000_mac_type type;
345 /* Maximum size of the MTA register table in all supported adapters */
346 #define MAX_MTA_REG 128
347 u32 mta_shadow[MAX_MTA_REG];
350 u8 forced_speed_duplex;
353 bool arc_subsystem_valid;
354 bool asf_firmware_present;
357 bool disable_hw_init_bits;
358 bool get_link_status;
359 bool ifs_params_forced;
361 bool report_tx_early;
362 bool serdes_has_link;
363 bool tx_pkt_filtering;
366 struct e1000_phy_info {
367 struct e1000_phy_operations ops;
369 enum e1000_phy_type type;
371 enum e1000_1000t_rx_status local_rx;
372 enum e1000_1000t_rx_status remote_rx;
373 enum e1000_ms_type ms_type;
374 enum e1000_ms_type original_ms_type;
375 enum e1000_rev_polarity cable_polarity;
376 enum e1000_smart_speed smart_speed;
380 u32 reset_delay_us; /* in usec */
383 enum e1000_media_type media_type;
385 u16 autoneg_advertised;
388 u16 max_cable_length;
389 u16 min_cable_length;
393 bool disable_polarity_correction;
395 bool polarity_correction;
397 bool speed_downgraded;
398 bool autoneg_wait_to_complete;
401 struct e1000_nvm_info {
402 struct e1000_nvm_operations ops;
404 enum e1000_nvm_type type;
405 enum e1000_nvm_override override;
417 struct e1000_bus_info {
418 enum e1000_bus_type type;
419 enum e1000_bus_speed speed;
420 enum e1000_bus_width width;
428 struct e1000_fc_info {
429 u32 high_water; /* Flow control high-water mark */
430 u32 low_water; /* Flow control low-water mark */
431 u16 pause_time; /* Flow control pause timer */
432 bool send_xon; /* Flow control send XON */
433 bool strict_ieee; /* Strict IEEE mode */
434 enum e1000_fc_mode current_mode; /* Type of flow control */
435 enum e1000_fc_mode requested_mode;
438 struct e1000_mbx_operations {
439 s32 (*init_params)(struct e1000_hw *hw);
440 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
441 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
442 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
443 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
444 s32 (*check_for_msg)(struct e1000_hw *, u16);
445 s32 (*check_for_ack)(struct e1000_hw *, u16);
446 s32 (*check_for_rst)(struct e1000_hw *, u16);
449 struct e1000_mbx_stats {
458 struct e1000_mbx_info {
459 struct e1000_mbx_operations ops;
460 struct e1000_mbx_stats stats;
466 struct e1000_dev_spec_82575 {
474 u8 __iomem *flash_address;
475 unsigned long io_base;
477 struct e1000_mac_info mac;
478 struct e1000_fc_info fc;
479 struct e1000_phy_info phy;
480 struct e1000_nvm_info nvm;
481 struct e1000_bus_info bus;
482 struct e1000_mbx_info mbx;
483 struct e1000_host_mng_dhcp_cookie mng_cookie;
486 struct e1000_dev_spec_82575 _82575;
490 u16 subsystem_vendor_id;
491 u16 subsystem_device_id;
498 extern char *igb_get_hw_dev_name(struct e1000_hw *hw);
499 #define hw_dbg(format, arg...) \
500 printk(KERN_DEBUG "%s: " format, igb_get_hw_dev_name(hw), ##arg)
502 #define hw_dbg(format, arg...)
505 /* These functions must be implemented by drivers */
506 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
507 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);