ibm_newemac: Parameterize EMAC Multicast Match Handling
[linux-2.6.git] / drivers / net / ibm_newemac / debug.c
1 /*
2  * drivers/net/ibm_newemac/debug.c
3  *
4  * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
5  *
6  * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
7  *                <benh@kernel.crashing.org>
8  *
9  * Based on the arch/ppc version of the driver:
10  *
11  * Copyright (c) 2004, 2005 Zultys Technologies
12  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
13  *
14  * This program is free software; you can redistribute  it and/or modify it
15  * under  the terms of  the GNU General  Public License as published by the
16  * Free Software Foundation;  either version 2 of the  License, or (at your
17  * option) any later version.
18  *
19  */
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/netdevice.h>
24 #include <linux/sysrq.h>
25 #include <asm/io.h>
26
27 #include "core.h"
28
29 static DEFINE_SPINLOCK(emac_dbg_lock);
30
31 static void emac_desc_dump(struct emac_instance *p)
32 {
33         int i;
34         printk("** EMAC %s TX BDs **\n"
35                " tx_cnt = %d tx_slot = %d ack_slot = %d\n",
36                p->ofdev->node->full_name,
37                p->tx_cnt, p->tx_slot, p->ack_slot);
38         for (i = 0; i < NUM_TX_BUFF / 2; ++i)
39                 printk
40                     ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
41                      i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
42                      p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
43                      NUM_TX_BUFF / 2 + i,
44                      p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
45                      p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
46                      p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
47                      p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
48
49         printk("** EMAC %s RX BDs **\n"
50                " rx_slot = %d flags = 0x%lx rx_skb_size = %d rx_sync_size = %d\n"
51                " rx_sg_skb = 0x%p\n",
52                p->ofdev->node->full_name,
53                p->rx_slot, p->commac.flags, p->rx_skb_size,
54                p->rx_sync_size, p->rx_sg_skb);
55         for (i = 0; i < NUM_RX_BUFF / 2; ++i)
56                 printk
57                     ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
58                      i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
59                      p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
60                      NUM_RX_BUFF / 2 + i,
61                      p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
62                      p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
63                      p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
64                      p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
65 }
66
67 static void emac_mac_dump(struct emac_instance *dev)
68 {
69         struct emac_regs __iomem *p = dev->emacp;
70         const int xaht_regs = EMAC_XAHT_REGS(dev);
71         u32 *gaht_base = emac_gaht_base(dev);
72         u32 *iaht_base = emac_iaht_base(dev);
73         int emac4sync = emac_has_feature(dev, EMAC_FTR_EMAC4SYNC);
74         int n;
75
76         printk("** EMAC %s registers **\n"
77                "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
78                "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
79                "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n",
80                dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1),
81                in_be32(&p->tmr0), in_be32(&p->tmr1),
82                in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
83                in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
84                in_be32(&p->vtci)
85                );
86
87         if (emac4sync)
88                 printk("MAR = %04x%08x MMAR = %04x%08x\n",
89                        in_be32(&p->u0.emac4sync.mahr),
90                        in_be32(&p->u0.emac4sync.malr),
91                        in_be32(&p->u0.emac4sync.mmahr),
92                        in_be32(&p->u0.emac4sync.mmalr)
93                        );
94
95         for (n = 0; n < xaht_regs; n++)
96                 printk("IAHT%02d = 0x%08x\n", n + 1, in_be32(iaht_base + n));
97
98         for (n = 0; n < xaht_regs; n++)
99                 printk("GAHT%02d = 0x%08x\n", n + 1, in_be32(gaht_base + n));
100
101         printk("LSA = %04x%08x IPGVR = 0x%04x\n"
102                "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
103                "OCTX = 0x%08x OCRX = 0x%08x\n",
104                in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
105                in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
106                in_be32(&p->octx), in_be32(&p->ocrx)
107                );
108
109         if (!emac4sync) {
110                 printk("IPCR = 0x%08x\n",
111                        in_be32(&p->u1.emac4.ipcr)
112                        );
113         } else {
114                 printk("REVID = 0x%08x TPC = 0x%08x\n",
115                        in_be32(&p->u1.emac4sync.revid),
116                        in_be32(&p->u1.emac4sync.tpc)
117                        );
118         }
119
120         emac_desc_dump(dev);
121 }
122
123 static void emac_mal_dump(struct mal_instance *mal)
124 {
125         int i;
126
127         printk("** MAL %s Registers **\n"
128                "CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
129                "TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
130                "RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
131                mal->ofdev->node->full_name,
132                get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
133                get_mal_dcrn(mal, MAL_IER),
134                get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
135                get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
136                get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
137                get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
138             );
139
140         printk("TX|");
141         for (i = 0; i < mal->num_tx_chans; ++i) {
142                 if (i && !(i % 4))
143                         printk("\n   ");
144                 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
145         }
146         printk("\nRX|");
147         for (i = 0; i < mal->num_rx_chans; ++i) {
148                 if (i && !(i % 4))
149                         printk("\n   ");
150                 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
151         }
152         printk("\n   ");
153         for (i = 0; i < mal->num_rx_chans; ++i) {
154                 u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
155                 if (i && !(i % 3))
156                         printk("\n   ");
157                 printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
158         }
159         printk("\n");
160 }
161
162 static struct emac_instance *__emacs[4];
163 static struct mal_instance *__mals[1];
164
165 void emac_dbg_register(struct emac_instance *dev)
166 {
167         unsigned long flags;
168         int i;
169
170         spin_lock_irqsave(&emac_dbg_lock, flags);
171         for (i = 0; i < ARRAY_SIZE(__emacs); i++)
172                 if (__emacs[i] == NULL) {
173                         __emacs[i] = dev;
174                         break;
175                 }
176         spin_unlock_irqrestore(&emac_dbg_lock, flags);
177 }
178
179 void emac_dbg_unregister(struct emac_instance *dev)
180 {
181         unsigned long flags;
182         int i;
183
184         spin_lock_irqsave(&emac_dbg_lock, flags);
185         for (i = 0; i < ARRAY_SIZE(__emacs); i++)
186                 if (__emacs[i] == dev) {
187                         __emacs[i] = NULL;
188                         break;
189                 }
190         spin_unlock_irqrestore(&emac_dbg_lock, flags);
191 }
192
193 void mal_dbg_register(struct mal_instance *mal)
194 {
195         unsigned long flags;
196         int i;
197
198         spin_lock_irqsave(&emac_dbg_lock, flags);
199         for (i = 0; i < ARRAY_SIZE(__mals); i++)
200                 if (__mals[i] == NULL) {
201                         __mals[i] = mal;
202                         break;
203                 }
204         spin_unlock_irqrestore(&emac_dbg_lock, flags);
205 }
206
207 void mal_dbg_unregister(struct mal_instance *mal)
208 {
209         unsigned long flags;
210         int i;
211
212         spin_lock_irqsave(&emac_dbg_lock, flags);
213         for (i = 0; i < ARRAY_SIZE(__mals); i++)
214                 if (__mals[i] == mal) {
215                         __mals[i] = NULL;
216                         break;
217                 }
218         spin_unlock_irqrestore(&emac_dbg_lock, flags);
219 }
220
221 void emac_dbg_dump_all(void)
222 {
223         unsigned int i;
224         unsigned long flags;
225
226         spin_lock_irqsave(&emac_dbg_lock, flags);
227
228         for (i = 0; i < ARRAY_SIZE(__mals); ++i)
229                 if (__mals[i])
230                         emac_mal_dump(__mals[i]);
231
232         for (i = 0; i < ARRAY_SIZE(__emacs); ++i)
233                 if (__emacs[i])
234                         emac_mac_dump(__emacs[i]);
235
236         spin_unlock_irqrestore(&emac_dbg_lock, flags);
237 }
238
239 #if defined(CONFIG_MAGIC_SYSRQ)
240 static void emac_sysrq_handler(int key, struct tty_struct *tty)
241 {
242         emac_dbg_dump_all();
243 }
244
245 static struct sysrq_key_op emac_sysrq_op = {
246         .handler = emac_sysrq_handler,
247         .help_msg = "emaC",
248         .action_msg = "Show EMAC(s) status",
249 };
250
251 int __init emac_init_debug(void)
252 {
253         return register_sysrq_key('c', &emac_sysrq_op);
254 }
255
256 void __exit emac_fini_debug(void)
257 {
258         unregister_sysrq_key('c', &emac_sysrq_op);
259 }
260
261 #else
262 int __init emac_init_debug(void)
263 {
264         return 0;
265 }
266 void __exit emac_fini_debug(void)
267 {
268 }
269 #endif                          /* CONFIG_MAGIC_SYSRQ */