[HAMRADIO]: Fix baycom_epp.c compile failure.
[linux-2.6.git] / drivers / net / hamradio / baycom_epp.c
1 /*****************************************************************************/
2
3 /*
4  *      baycom_epp.c  -- baycom epp radio modem driver.
5  *
6  *      Copyright (C) 1998-2000
7  *          Thomas Sailer (sailer@ife.ee.ethz.ch)
8  *
9  *      This program is free software; you can redistribute it and/or modify
10  *      it under the terms of the GNU General Public License as published by
11  *      the Free Software Foundation; either version 2 of the License, or
12  *      (at your option) any later version.
13  *
14  *      This program is distributed in the hope that it will be useful,
15  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *      GNU General Public License for more details.
18  *
19  *      You should have received a copy of the GNU General Public License
20  *      along with this program; if not, write to the Free Software
21  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  *  Please note that the GPL allows you to use the driver, NOT the radio.
24  *  In order to use the radio, you need a license from the communications
25  *  authority of your country.
26  *
27  *
28  *  History:
29  *   0.1  xx.xx.1998  Initial version by Matthias Welwarsky (dg2fef)
30  *   0.2  21.04.1998  Massive rework by Thomas Sailer
31  *                    Integrated FPGA EPP modem configuration routines
32  *   0.3  11.05.1998  Took FPGA config out and moved it into a separate program
33  *   0.4  26.07.1999  Adapted to new lowlevel parport driver interface
34  *   0.5  03.08.1999  adapt to Linus' new __setup/__initcall
35  *                    removed some pre-2.2 kernel compatibility cruft
36  *   0.6  10.08.1999  Check if parport can do SPP and is safe to access during interrupt contexts
37  *   0.7  12.02.2000  adapted to softnet driver interface
38  *
39  */
40
41 /*****************************************************************************/
42
43 #include <linux/crc-ccitt.h>
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/init.h>
47 #include <linux/string.h>
48 #include <linux/workqueue.h>
49 #include <linux/fs.h>
50 #include <linux/parport.h>
51 #include <linux/if_arp.h>
52 #include <linux/hdlcdrv.h>
53 #include <linux/baycom.h>
54 #include <linux/jiffies.h>
55 #include <net/ax25.h> 
56 #include <asm/uaccess.h>
57
58 /* --------------------------------------------------------------------- */
59
60 #define BAYCOM_DEBUG
61 #define BAYCOM_MAGIC 19730510
62
63 /* --------------------------------------------------------------------- */
64
65 static const char paranoia_str[] = KERN_ERR 
66         "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
67
68 static const char bc_drvname[] = "baycom_epp";
69 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
70 KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
71
72 /* --------------------------------------------------------------------- */
73
74 #define NR_PORTS 4
75
76 static struct net_device *baycom_device[NR_PORTS];
77
78 /* --------------------------------------------------------------------- */
79
80 /* EPP status register */
81 #define EPP_DCDBIT      0x80
82 #define EPP_PTTBIT      0x08
83 #define EPP_NREF        0x01
84 #define EPP_NRAEF       0x02
85 #define EPP_NRHF        0x04
86 #define EPP_NTHF        0x20
87 #define EPP_NTAEF       0x10
88 #define EPP_NTEF        EPP_PTTBIT
89
90 /* EPP control register */
91 #define EPP_TX_FIFO_ENABLE 0x10
92 #define EPP_RX_FIFO_ENABLE 0x08
93 #define EPP_MODEM_ENABLE   0x20
94 #define EPP_LEDS           0xC0
95 #define EPP_IRQ_ENABLE     0x10
96
97 /* LPT registers */
98 #define LPTREG_ECONTROL       0x402
99 #define LPTREG_CONFIGB        0x401
100 #define LPTREG_CONFIGA        0x400
101 #define LPTREG_EPPDATA        0x004
102 #define LPTREG_EPPADDR        0x003
103 #define LPTREG_CONTROL        0x002
104 #define LPTREG_STATUS         0x001
105 #define LPTREG_DATA           0x000
106
107 /* LPT control register */
108 #define LPTCTRL_PROGRAM       0x04   /* 0 to reprogram */
109 #define LPTCTRL_WRITE         0x01
110 #define LPTCTRL_ADDRSTB       0x08
111 #define LPTCTRL_DATASTB       0x02
112 #define LPTCTRL_INTEN         0x10
113
114 /* LPT status register */
115 #define LPTSTAT_SHIFT_NINTR   6
116 #define LPTSTAT_WAIT          0x80
117 #define LPTSTAT_NINTR         (1<<LPTSTAT_SHIFT_NINTR)
118 #define LPTSTAT_PE            0x20
119 #define LPTSTAT_DONE          0x10
120 #define LPTSTAT_NERROR        0x08
121 #define LPTSTAT_EPPTIMEOUT    0x01
122
123 /* LPT data register */
124 #define LPTDATA_SHIFT_TDI     0
125 #define LPTDATA_SHIFT_TMS     2
126 #define LPTDATA_TDI           (1<<LPTDATA_SHIFT_TDI)
127 #define LPTDATA_TCK           0x02
128 #define LPTDATA_TMS           (1<<LPTDATA_SHIFT_TMS)
129 #define LPTDATA_INITBIAS      0x80
130
131
132 /* EPP modem config/status bits */
133 #define EPP_DCDBIT            0x80
134 #define EPP_PTTBIT            0x08
135 #define EPP_RXEBIT            0x01
136 #define EPP_RXAEBIT           0x02
137 #define EPP_RXHFULL           0x04
138
139 #define EPP_NTHF              0x20
140 #define EPP_NTAEF             0x10
141 #define EPP_NTEF              EPP_PTTBIT
142
143 #define EPP_TX_FIFO_ENABLE    0x10
144 #define EPP_RX_FIFO_ENABLE    0x08
145 #define EPP_MODEM_ENABLE      0x20
146 #define EPP_LEDS              0xC0
147 #define EPP_IRQ_ENABLE        0x10
148
149 /* Xilinx 4k JTAG instructions */
150 #define XC4K_IRLENGTH   3
151 #define XC4K_EXTEST     0
152 #define XC4K_PRELOAD    1
153 #define XC4K_CONFIGURE  5
154 #define XC4K_BYPASS     7
155
156 #define EPP_CONVENTIONAL  0
157 #define EPP_FPGA          1
158 #define EPP_FPGAEXTSTATUS 2
159
160 #define TXBUFFER_SIZE     ((HDLCDRV_MAXFLEN*6/5)+8)
161
162 /* ---------------------------------------------------------------------- */
163 /*
164  * Information that need to be kept for each board.
165  */
166
167 struct baycom_state {
168         int magic;
169
170         struct pardevice *pdev;
171         struct net_device *dev;
172         unsigned int work_running;
173         struct delayed_work run_work;
174         unsigned int modem;
175         unsigned int bitrate;
176         unsigned char stat;
177
178         struct {
179                 unsigned int intclk;
180                 unsigned int fclk;
181                 unsigned int bps;
182                 unsigned int extmodem;
183                 unsigned int loopback;
184         } cfg;
185
186         struct hdlcdrv_channel_params ch_params;
187
188         struct {
189                 unsigned int bitbuf, bitstream, numbits, state;
190                 unsigned char *bufptr;
191                 int bufcnt;
192                 unsigned char buf[TXBUFFER_SIZE];
193         } hdlcrx;
194
195         struct {
196                 int calibrate;
197                 int slotcnt;
198                 int flags;
199                 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
200                 unsigned char *bufptr;
201                 int bufcnt;
202                 unsigned char buf[TXBUFFER_SIZE];
203         } hdlctx;
204
205         struct net_device_stats stats;
206         unsigned int ptt_keyed;
207         struct sk_buff *skb;  /* next transmit packet  */
208
209 #ifdef BAYCOM_DEBUG
210         struct debug_vals {
211                 unsigned long last_jiffies;
212                 unsigned cur_intcnt;
213                 unsigned last_intcnt;
214                 int cur_pllcorr;
215                 int last_pllcorr;
216                 unsigned int mod_cycles;
217                 unsigned int demod_cycles;
218         } debug_vals;
219 #endif /* BAYCOM_DEBUG */
220 };
221
222 /* --------------------------------------------------------------------- */
223
224 #define KISS_VERBOSE
225
226 /* --------------------------------------------------------------------- */
227
228 #define PARAM_TXDELAY   1
229 #define PARAM_PERSIST   2
230 #define PARAM_SLOTTIME  3
231 #define PARAM_TXTAIL    4
232 #define PARAM_FULLDUP   5
233 #define PARAM_HARDWARE  6
234 #define PARAM_RETURN    255
235
236 /* --------------------------------------------------------------------- */
237 /*
238  * the CRC routines are stolen from WAMPES
239  * by Dieter Deyke
240  */
241
242
243 /*---------------------------------------------------------------------------*/
244
245 #if 0
246 static inline void append_crc_ccitt(unsigned char *buffer, int len)
247 {
248         unsigned int crc = 0xffff;
249
250         for (;len>0;len--)
251                 crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
252         crc ^= 0xffff;
253         *buffer++ = crc;
254         *buffer++ = crc >> 8;
255 }
256 #endif
257
258 /*---------------------------------------------------------------------------*/
259
260 static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
261 {
262         return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
263 }
264
265 /*---------------------------------------------------------------------------*/
266
267 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
268 {
269         return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
270 }
271
272 /* ---------------------------------------------------------------------- */
273
274 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
275
276 /* --------------------------------------------------------------------- */
277
278 static inline void baycom_int_freq(struct baycom_state *bc)
279 {
280 #ifdef BAYCOM_DEBUG
281         unsigned long cur_jiffies = jiffies;
282         /*
283          * measure the interrupt frequency
284          */
285         bc->debug_vals.cur_intcnt++;
286         if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
287                 bc->debug_vals.last_jiffies = cur_jiffies;
288                 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
289                 bc->debug_vals.cur_intcnt = 0;
290                 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
291                 bc->debug_vals.cur_pllcorr = 0;
292         }
293 #endif /* BAYCOM_DEBUG */
294 }
295
296 /* ---------------------------------------------------------------------- */
297 /*
298  *    eppconfig_path should be setable  via /proc/sys.
299  */
300
301 static char eppconfig_path[256] = "/usr/sbin/eppfpga";
302
303 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
304
305 /* eppconfig: called during ifconfig up to configure the modem */
306 static int eppconfig(struct baycom_state *bc)
307 {
308         char modearg[256];
309         char portarg[16];
310         char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
311                          NULL };
312
313         /* set up arguments */
314         sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
315                 bc->cfg.intclk ? "int" : "ext",
316                 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
317                 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
318                 bc->cfg.loopback ? ",loopback" : "");
319         sprintf(portarg, "%ld", bc->pdev->port->base);
320         printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
321
322         return call_usermodehelper(eppconfig_path, argv, envp, 1);
323 }
324
325 /* ---------------------------------------------------------------------- */
326
327 static void epp_interrupt(int irq, void *dev_id)
328 {
329 }
330
331 /* ---------------------------------------------------------------------- */
332
333 static inline void do_kiss_params(struct baycom_state *bc,
334                                   unsigned char *data, unsigned long len)
335 {
336
337 #ifdef KISS_VERBOSE
338 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
339 #else /* KISS_VERBOSE */              
340 #define PKP(a,b) 
341 #endif /* KISS_VERBOSE */             
342
343         if (len < 2)
344                 return;
345         switch(data[0]) {
346         case PARAM_TXDELAY:
347                 bc->ch_params.tx_delay = data[1];
348                 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
349                 break;
350         case PARAM_PERSIST:   
351                 bc->ch_params.ppersist = data[1];
352                 PKP("p persistence = %u", bc->ch_params.ppersist);
353                 break;
354         case PARAM_SLOTTIME:  
355                 bc->ch_params.slottime = data[1];
356                 PKP("slot time = %ums", bc->ch_params.slottime);
357                 break;
358         case PARAM_TXTAIL:    
359                 bc->ch_params.tx_tail = data[1];
360                 PKP("TX tail = %ums", bc->ch_params.tx_tail);
361                 break;
362         case PARAM_FULLDUP:   
363                 bc->ch_params.fulldup = !!data[1];
364                 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
365                 break;
366         default:
367                 break;
368         }
369 #undef PKP
370 }
371
372 /* --------------------------------------------------------------------- */
373
374 static void encode_hdlc(struct baycom_state *bc)
375 {
376         struct sk_buff *skb;
377         unsigned char *wp, *bp;
378         int pkt_len;
379         unsigned bitstream, notbitstream, bitbuf, numbit, crc;
380         unsigned char crcarr[2];
381         int j;
382         
383         if (bc->hdlctx.bufcnt > 0)
384                 return;
385         skb = bc->skb;
386         if (!skb)
387                 return;
388         bc->skb = NULL;
389         pkt_len = skb->len-1; /* strip KISS byte */
390         wp = bc->hdlctx.buf;
391         bp = skb->data+1;
392         crc = calc_crc_ccitt(bp, pkt_len);
393         crcarr[0] = crc;
394         crcarr[1] = crc >> 8;
395         *wp++ = 0x7e;
396         bitstream = bitbuf = numbit = 0;
397         while (pkt_len > -2) {
398                 bitstream >>= 8;
399                 bitstream |= ((unsigned int)*bp) << 8;
400                 bitbuf |= ((unsigned int)*bp) << numbit;
401                 notbitstream = ~bitstream;
402                 bp++;
403                 pkt_len--;
404                 if (!pkt_len)
405                         bp = crcarr;
406                 for (j = 0; j < 8; j++)
407                         if (unlikely(!(notbitstream & (0x1f0 << j)))) {
408                                 bitstream &= ~(0x100 << j);
409                                 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
410                                         ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
411                                 numbit++;
412                                 notbitstream = ~bitstream;
413                         }
414                 numbit += 8;
415                 while (numbit >= 8) {
416                         *wp++ = bitbuf;
417                         bitbuf >>= 8;
418                         numbit -= 8;
419                 }
420         }
421         bitbuf |= 0x7e7e << numbit;
422         numbit += 16;
423         while (numbit >= 8) {
424                 *wp++ = bitbuf;
425                 bitbuf >>= 8;
426                 numbit -= 8;
427         }
428         bc->hdlctx.bufptr = bc->hdlctx.buf;
429         bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
430         dev_kfree_skb(skb);
431         bc->stats.tx_packets++;
432 }
433
434 /* ---------------------------------------------------------------------- */
435
436 static unsigned short random_seed;
437
438 static inline unsigned short random_num(void)
439 {
440         random_seed = 28629 * random_seed + 157;
441         return random_seed;
442 }
443
444 /* ---------------------------------------------------------------------- */
445
446 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
447 {
448         struct parport *pp = bc->pdev->port;
449         unsigned char tmp[128];
450         int i, j;
451
452         if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
453                 bc->hdlctx.state = tx_idle;
454         if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
455                 if (bc->hdlctx.bufcnt <= 0)
456                         encode_hdlc(bc);
457                 if (bc->hdlctx.bufcnt <= 0)
458                         return 0;
459                 if (!bc->ch_params.fulldup) {
460                         if (!(stat & EPP_DCDBIT)) {
461                                 bc->hdlctx.slotcnt = bc->ch_params.slottime;
462                                 return 0;
463                         }
464                         if ((--bc->hdlctx.slotcnt) > 0)
465                                 return 0;
466                         bc->hdlctx.slotcnt = bc->ch_params.slottime;
467                         if ((random_num() % 256) > bc->ch_params.ppersist)
468                                 return 0;
469                 }
470         }
471         if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
472                 bc->hdlctx.state = tx_keyup;
473                 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
474                 bc->ptt_keyed++;
475         }
476         while (cnt > 0) {
477                 switch (bc->hdlctx.state) {
478                 case tx_keyup:
479                         i = min_t(int, cnt, bc->hdlctx.flags);
480                         cnt -= i;
481                         bc->hdlctx.flags -= i;
482                         if (bc->hdlctx.flags <= 0)
483                                 bc->hdlctx.state = tx_data;
484                         memset(tmp, 0x7e, sizeof(tmp));
485                         while (i > 0) {
486                                 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
487                                 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
488                                         return -1;
489                                 i -= j;
490                         }
491                         break;
492
493                 case tx_data:
494                         if (bc->hdlctx.bufcnt <= 0) {
495                                 encode_hdlc(bc);
496                                 if (bc->hdlctx.bufcnt <= 0) {
497                                         bc->hdlctx.state = tx_tail;
498                                         bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
499                                         break;
500                                 }
501                         }
502                         i = min_t(int, cnt, bc->hdlctx.bufcnt);
503                         bc->hdlctx.bufcnt -= i;
504                         cnt -= i;
505                         if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
506                                         return -1;
507                         bc->hdlctx.bufptr += i;
508                         break;
509                         
510                 case tx_tail:
511                         encode_hdlc(bc);
512                         if (bc->hdlctx.bufcnt > 0) {
513                                 bc->hdlctx.state = tx_data;
514                                 break;
515                         }
516                         i = min_t(int, cnt, bc->hdlctx.flags);
517                         if (i) {
518                                 cnt -= i;
519                                 bc->hdlctx.flags -= i;
520                                 memset(tmp, 0x7e, sizeof(tmp));
521                                 while (i > 0) {
522                                         j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
523                                         if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
524                                                 return -1;
525                                         i -= j;
526                                 }
527                                 break;
528                         }
529
530                 default:  /* fall through */
531                         if (bc->hdlctx.calibrate <= 0)
532                                 return 0;
533                         i = min_t(int, cnt, bc->hdlctx.calibrate);
534                         cnt -= i;
535                         bc->hdlctx.calibrate -= i;
536                         memset(tmp, 0, sizeof(tmp));
537                         while (i > 0) {
538                                 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
539                                 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
540                                         return -1;
541                                 i -= j;
542                         }
543                         break;
544                 }
545         }
546         return 0;
547 }
548
549 /* ---------------------------------------------------------------------- */
550
551 static void do_rxpacket(struct net_device *dev)
552 {
553         struct baycom_state *bc = netdev_priv(dev);
554         struct sk_buff *skb;
555         unsigned char *cp;
556         unsigned pktlen;
557
558         if (bc->hdlcrx.bufcnt < 4) 
559                 return;
560         if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 
561                 return;
562         pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
563         if (!(skb = dev_alloc_skb(pktlen))) {
564                 printk("%s: memory squeeze, dropping packet\n", dev->name);
565                 bc->stats.rx_dropped++;
566                 return;
567         }
568         cp = skb_put(skb, pktlen);
569         *cp++ = 0; /* KISS kludge */
570         memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
571         skb->protocol = ax25_type_trans(skb, dev);
572         netif_rx(skb);
573         dev->last_rx = jiffies;
574         bc->stats.rx_packets++;
575 }
576
577 static int receive(struct net_device *dev, int cnt)
578 {
579         struct baycom_state *bc = netdev_priv(dev);
580         struct parport *pp = bc->pdev->port;
581         unsigned int bitbuf, notbitstream, bitstream, numbits, state;
582         unsigned char tmp[128];
583         unsigned char *cp;
584         int cnt2, ret = 0;
585         int j;
586         
587         numbits = bc->hdlcrx.numbits;
588         state = bc->hdlcrx.state;
589         bitstream = bc->hdlcrx.bitstream;
590         bitbuf = bc->hdlcrx.bitbuf;
591         while (cnt > 0) {
592                 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
593                 cnt -= cnt2;
594                 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
595                         ret = -1;
596                         break;
597                 }
598                 cp = tmp;
599                 for (; cnt2 > 0; cnt2--, cp++) {
600                         bitstream >>= 8;
601                         bitstream |= (*cp) << 8;
602                         bitbuf >>= 8;
603                         bitbuf |= (*cp) << 8;
604                         numbits += 8;
605                         notbitstream = ~bitstream;
606                         for (j = 0; j < 8; j++) {
607
608                                 /* flag or abort */
609                                 if (unlikely(!(notbitstream & (0x0fc << j)))) {
610
611                                         /* abort received */
612                                         if (!(notbitstream & (0x1fc << j)))
613                                                 state = 0;
614
615                                         /* not flag received */
616                                         else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
617                                                 if (state)
618                                                         do_rxpacket(dev);
619                                                 bc->hdlcrx.bufcnt = 0;
620                                                 bc->hdlcrx.bufptr = bc->hdlcrx.buf;
621                                                 state = 1;
622                                                 numbits = 7-j;
623                                                 }
624                                         }
625
626                                 /* stuffed bit */
627                                 else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
628                                         numbits--;
629                                         bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
630                                         }
631                                 }
632                         while (state && numbits >= 8) {
633                                 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
634                                         state = 0;
635                                 } else {
636                                         *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
637                                         bc->hdlcrx.bufcnt++;
638                                         numbits -= 8;
639                                 }
640                         }
641                 }
642         }
643         bc->hdlcrx.numbits = numbits;
644         bc->hdlcrx.state = state;
645         bc->hdlcrx.bitstream = bitstream;
646         bc->hdlcrx.bitbuf = bitbuf;
647         return ret;
648 }
649
650 /* --------------------------------------------------------------------- */
651
652 #ifdef __i386__
653 #include <asm/msr.h>
654 #define GETTICK(x)                                                \
655 ({                                                                \
656         if (cpu_has_tsc)                                          \
657                 rdtscl(x);                                        \
658 })
659 #else /* __i386__ */
660 #define GETTICK(x)
661 #endif /* __i386__ */
662
663 static void epp_bh(struct work_struct *work)
664 {
665         struct net_device *dev;
666         struct baycom_state *bc;
667         struct parport *pp;
668         unsigned char stat;
669         unsigned char tmp[2];
670         unsigned int time1 = 0, time2 = 0, time3 = 0;
671         int cnt, cnt2;
672
673         bc = container_of(work, struct baycom_state, run_work.work);
674         dev = bc->dev;
675         if (!bc->work_running)
676                 return;
677         baycom_int_freq(bc);
678         pp = bc->pdev->port;
679         /* update status */
680         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
681                 goto epptimeout;
682         bc->stat = stat;
683         bc->debug_vals.last_pllcorr = stat;
684         GETTICK(time1);
685         if (bc->modem == EPP_FPGAEXTSTATUS) {
686                 /* get input count */
687                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
688                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
689                         goto epptimeout;
690                 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
691                         goto epptimeout;
692                 cnt = tmp[0] | (tmp[1] << 8);
693                 cnt &= 0x7fff;
694                 /* get output count */
695                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
696                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
697                         goto epptimeout;
698                 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
699                         goto epptimeout;
700                 cnt2 = tmp[0] | (tmp[1] << 8);
701                 cnt2 = 16384 - (cnt2 & 0x7fff);
702                 /* return to normal */
703                 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
704                 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
705                         goto epptimeout;
706                 if (transmit(bc, cnt2, stat))
707                         goto epptimeout;
708                 GETTICK(time2);
709                 if (receive(dev, cnt))
710                         goto epptimeout;
711                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
712                         goto epptimeout;
713                 bc->stat = stat;
714         } else {
715                 /* try to tx */
716                 switch (stat & (EPP_NTAEF|EPP_NTHF)) {
717                 case EPP_NTHF:
718                         cnt = 2048 - 256;
719                         break;
720                 
721                 case EPP_NTAEF:
722                         cnt = 2048 - 1793;
723                         break;
724                 
725                 case 0:
726                         cnt = 0;
727                         break;
728                 
729                 default:
730                         cnt = 2048 - 1025;
731                         break;
732                 }
733                 if (transmit(bc, cnt, stat))
734                         goto epptimeout;
735                 GETTICK(time2);
736                 /* do receiver */
737                 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
738                         switch (stat & (EPP_NRAEF|EPP_NRHF)) {
739                         case EPP_NRAEF:
740                                 cnt = 1025;
741                                 break;
742
743                         case 0:
744                                 cnt = 1793;
745                                 break;
746
747                         default:
748                                 cnt = 256;
749                                 break;
750                         }
751                         if (receive(dev, cnt))
752                                 goto epptimeout;
753                         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
754                                 goto epptimeout;
755                 }
756                 cnt = 0;
757                 if (bc->bitrate < 50000)
758                         cnt = 256;
759                 else if (bc->bitrate < 100000)
760                         cnt = 128;
761                 while (cnt > 0 && stat & EPP_NREF) {
762                         if (receive(dev, 1))
763                                 goto epptimeout;
764                         cnt--;
765                         if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
766                                 goto epptimeout;
767                 }
768         }
769         GETTICK(time3);
770 #ifdef BAYCOM_DEBUG
771         bc->debug_vals.mod_cycles = time2 - time1;
772         bc->debug_vals.demod_cycles = time3 - time2;
773 #endif /* BAYCOM_DEBUG */
774         schedule_delayed_work(&bc->run_work, 1);
775         if (!bc->skb)
776                 netif_wake_queue(dev);
777         return;
778  epptimeout:
779         printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
780 }
781
782 /* ---------------------------------------------------------------------- */
783 /*
784  * ===================== network driver interface =========================
785  */
786
787 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
788 {
789         struct baycom_state *bc = netdev_priv(dev);
790
791         if (skb->data[0] != 0) {
792                 do_kiss_params(bc, skb->data, skb->len);
793                 dev_kfree_skb(skb);
794                 return 0;
795         }
796         if (bc->skb)
797                 return -1;
798         /* strip KISS byte */
799         if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
800                 dev_kfree_skb(skb);
801                 return 0;
802         }
803         netif_stop_queue(dev);
804         bc->skb = skb;
805         return 0;
806 }
807
808 /* --------------------------------------------------------------------- */
809
810 static int baycom_set_mac_address(struct net_device *dev, void *addr)
811 {
812         struct sockaddr *sa = (struct sockaddr *)addr;
813
814         /* addr is an AX.25 shifted ASCII mac address */
815         memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); 
816         return 0;                                         
817 }
818
819 /* --------------------------------------------------------------------- */
820
821 static struct net_device_stats *baycom_get_stats(struct net_device *dev)
822 {
823         struct baycom_state *bc = netdev_priv(dev);
824
825         /* 
826          * Get the current statistics.  This may be called with the
827          * card open or closed. 
828          */
829         return &bc->stats;
830 }
831
832 /* --------------------------------------------------------------------- */
833
834 static void epp_wakeup(void *handle)
835 {
836         struct net_device *dev = (struct net_device *)handle;
837         struct baycom_state *bc = netdev_priv(dev);
838
839         printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
840         if (!parport_claim(bc->pdev))
841                 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
842 }
843
844 /* --------------------------------------------------------------------- */
845
846 /*
847  * Open/initialize the board. This is called (in the current kernel)
848  * sometime after booting when the 'ifconfig' program is run.
849  *
850  * This routine should set everything up anew at each open, even
851  * registers that "should" only need to be set once at boot, so that
852  * there is non-reboot way to recover if something goes wrong.
853  */
854
855 static int epp_open(struct net_device *dev)
856 {
857         struct baycom_state *bc = netdev_priv(dev);
858         struct parport *pp = parport_find_base(dev->base_addr);
859         unsigned int i, j;
860         unsigned char tmp[128];
861         unsigned char stat;
862         unsigned long tstart;
863         
864         if (!pp) {
865                 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
866                 return -ENXIO;
867         }
868 #if 0
869         if (pp->irq < 0) {
870                 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
871                 parport_put_port(pp);
872                 return -ENXIO;
873         }
874 #endif
875         if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
876                 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
877                        bc_drvname, pp->base);
878                 parport_put_port(pp);
879                 return -EIO;
880         }
881         memset(&bc->modem, 0, sizeof(bc->modem));
882         bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup, 
883                                         epp_interrupt, PARPORT_DEV_EXCL, dev);
884         parport_put_port(pp);
885         if (!bc->pdev) {
886                 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
887                 return -ENXIO;
888         }
889         if (parport_claim(bc->pdev)) {
890                 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
891                 parport_unregister_device(bc->pdev);
892                 return -EBUSY;
893         }
894         dev->irq = /*pp->irq*/ 0;
895         INIT_DELAYED_WORK(&bc->run_work, epp_bh);
896         bc->work_running = 1;
897         bc->modem = EPP_CONVENTIONAL;
898         if (eppconfig(bc))
899                 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
900         else
901                 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
902         parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
903         /* reset the modem */
904         tmp[0] = 0;
905         tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
906         if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
907                 goto epptimeout;
908         /* autoprobe baud rate */
909         tstart = jiffies;
910         i = 0;
911         while (time_before(jiffies, tstart + HZ/3)) {
912                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
913                         goto epptimeout;
914                 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
915                         schedule();
916                         continue;
917                 }
918                 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
919                         goto epptimeout;
920                 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
921                         goto epptimeout;
922                 i += 256;
923         }
924         for (j = 0; j < 256; j++) {
925                 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
926                         goto epptimeout;
927                 if (!(stat & EPP_NREF))
928                         break;
929                 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
930                         goto epptimeout;
931                 i++;
932         }
933         tstart = jiffies - tstart;
934         bc->bitrate = i * (8 * HZ) / tstart;
935         j = 1;
936         i = bc->bitrate >> 3;
937         while (j < 7 && i > 150) {
938                 j++;
939                 i >>= 1;
940         }
941         printk(KERN_INFO "%s: autoprobed bitrate: %d  int divider: %d  int rate: %d\n", 
942                bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
943         tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
944         if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
945                 goto epptimeout;
946         /*
947          * initialise hdlc variables
948          */
949         bc->hdlcrx.state = 0;
950         bc->hdlcrx.numbits = 0;
951         bc->hdlctx.state = tx_idle;
952         bc->hdlctx.bufcnt = 0;
953         bc->hdlctx.slotcnt = bc->ch_params.slottime;
954         bc->hdlctx.calibrate = 0;
955         /* start the bottom half stuff */
956         schedule_delayed_work(&bc->run_work, 1);
957         netif_start_queue(dev);
958         return 0;
959
960  epptimeout:
961         printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
962         parport_write_control(pp, 0); /* reset the adapter */
963         parport_release(bc->pdev);
964         parport_unregister_device(bc->pdev);
965         return -EIO;
966 }
967
968 /* --------------------------------------------------------------------- */
969
970 static int epp_close(struct net_device *dev)
971 {
972         struct baycom_state *bc = netdev_priv(dev);
973         struct parport *pp = bc->pdev->port;
974         unsigned char tmp[1];
975
976         bc->work_running = 0;
977         flush_scheduled_work();
978         bc->stat = EPP_DCDBIT;
979         tmp[0] = 0;
980         pp->ops->epp_write_addr(pp, tmp, 1, 0);
981         parport_write_control(pp, 0); /* reset the adapter */
982         parport_release(bc->pdev);
983         parport_unregister_device(bc->pdev);
984         if (bc->skb)
985                 dev_kfree_skb(bc->skb);
986         bc->skb = NULL;
987         printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
988                bc_drvname, dev->base_addr, dev->irq);
989         return 0;
990 }
991
992 /* --------------------------------------------------------------------- */
993
994 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
995 {
996         const char *cp;
997
998         if (strstr(modestr,"intclk"))
999                 bc->cfg.intclk = 1;
1000         if (strstr(modestr,"extclk"))
1001                 bc->cfg.intclk = 0;
1002         if (strstr(modestr,"intmodem"))
1003                 bc->cfg.extmodem = 0;
1004         if (strstr(modestr,"extmodem"))
1005                 bc->cfg.extmodem = 1;
1006         if (strstr(modestr,"noloopback"))
1007                 bc->cfg.loopback = 0;
1008         if (strstr(modestr,"loopback"))
1009                 bc->cfg.loopback = 1;
1010         if ((cp = strstr(modestr,"fclk="))) {
1011                 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
1012                 if (bc->cfg.fclk < 1000000)
1013                         bc->cfg.fclk = 1000000;
1014                 if (bc->cfg.fclk > 25000000)
1015                         bc->cfg.fclk = 25000000;
1016         }
1017         if ((cp = strstr(modestr,"bps="))) {
1018                 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
1019                 if (bc->cfg.bps < 1000)
1020                         bc->cfg.bps = 1000;
1021                 if (bc->cfg.bps > 1500000)
1022                         bc->cfg.bps = 1500000;
1023         }
1024         return 0;
1025 }
1026
1027 /* --------------------------------------------------------------------- */
1028
1029 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1030 {
1031         struct baycom_state *bc = netdev_priv(dev);
1032         struct hdlcdrv_ioctl hi;
1033
1034         if (cmd != SIOCDEVPRIVATE)
1035                 return -ENOIOCTLCMD;
1036
1037         if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
1038                 return -EFAULT;
1039         switch (hi.cmd) {
1040         default:
1041                 return -ENOIOCTLCMD;
1042
1043         case HDLCDRVCTL_GETCHANNELPAR:
1044                 hi.data.cp.tx_delay = bc->ch_params.tx_delay;
1045                 hi.data.cp.tx_tail = bc->ch_params.tx_tail;
1046                 hi.data.cp.slottime = bc->ch_params.slottime;
1047                 hi.data.cp.ppersist = bc->ch_params.ppersist;
1048                 hi.data.cp.fulldup = bc->ch_params.fulldup;
1049                 break;
1050
1051         case HDLCDRVCTL_SETCHANNELPAR:
1052                 if (!capable(CAP_NET_ADMIN))
1053                         return -EACCES;
1054                 bc->ch_params.tx_delay = hi.data.cp.tx_delay;
1055                 bc->ch_params.tx_tail = hi.data.cp.tx_tail;
1056                 bc->ch_params.slottime = hi.data.cp.slottime;
1057                 bc->ch_params.ppersist = hi.data.cp.ppersist;
1058                 bc->ch_params.fulldup = hi.data.cp.fulldup;
1059                 bc->hdlctx.slotcnt = 1;
1060                 return 0;
1061                 
1062         case HDLCDRVCTL_GETMODEMPAR:
1063                 hi.data.mp.iobase = dev->base_addr;
1064                 hi.data.mp.irq = dev->irq;
1065                 hi.data.mp.dma = dev->dma;
1066                 hi.data.mp.dma2 = 0;
1067                 hi.data.mp.seriobase = 0;
1068                 hi.data.mp.pariobase = 0;
1069                 hi.data.mp.midiiobase = 0;
1070                 break;
1071
1072         case HDLCDRVCTL_SETMODEMPAR:
1073                 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
1074                         return -EACCES;
1075                 dev->base_addr = hi.data.mp.iobase;
1076                 dev->irq = /*hi.data.mp.irq*/0;
1077                 dev->dma = /*hi.data.mp.dma*/0;
1078                 return 0;       
1079                 
1080         case HDLCDRVCTL_GETSTAT:
1081                 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
1082                 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
1083                 hi.data.cs.ptt_keyed = bc->ptt_keyed;
1084                 hi.data.cs.tx_packets = bc->stats.tx_packets;
1085                 hi.data.cs.tx_errors = bc->stats.tx_errors;
1086                 hi.data.cs.rx_packets = bc->stats.rx_packets;
1087                 hi.data.cs.rx_errors = bc->stats.rx_errors;
1088                 break;          
1089
1090         case HDLCDRVCTL_OLDGETSTAT:
1091                 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
1092                 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
1093                 hi.data.ocs.ptt_keyed = bc->ptt_keyed;
1094                 break;          
1095
1096         case HDLCDRVCTL_CALIBRATE:
1097                 if (!capable(CAP_SYS_RAWIO))
1098                         return -EACCES;
1099                 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
1100                 return 0;
1101
1102         case HDLCDRVCTL_DRIVERNAME:
1103                 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
1104                 break;
1105                 
1106         case HDLCDRVCTL_GETMODE:
1107                 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 
1108                         bc->cfg.intclk ? "int" : "ext",
1109                         bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
1110                         bc->cfg.loopback ? ",loopback" : "");
1111                 break;
1112
1113         case HDLCDRVCTL_SETMODE:
1114                 if (!capable(CAP_NET_ADMIN) || netif_running(dev))
1115                         return -EACCES;
1116                 hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
1117                 return baycom_setmode(bc, hi.data.modename);
1118
1119         case HDLCDRVCTL_MODELIST:
1120                 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
1121                         sizeof(hi.data.modename));
1122                 break;
1123
1124         case HDLCDRVCTL_MODEMPARMASK:
1125                 return HDLCDRV_PARMASK_IOBASE;
1126
1127         }
1128         if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
1129                 return -EFAULT;
1130         return 0;
1131 }
1132
1133 /* --------------------------------------------------------------------- */
1134
1135 /*
1136  * Check for a network adaptor of this type, and return '0' if one exists.
1137  * If dev->base_addr == 0, probe all likely locations.
1138  * If dev->base_addr == 1, always return failure.
1139  * If dev->base_addr == 2, allocate space for the device and return success
1140  * (detachable devices only).
1141  */
1142 static void baycom_probe(struct net_device *dev)
1143 {
1144         const struct hdlcdrv_channel_params dflt_ch_params = { 
1145                 20, 2, 10, 40, 0 
1146         };
1147         struct baycom_state *bc;
1148
1149         /*
1150          * not a real probe! only initialize data structures
1151          */
1152         bc = netdev_priv(dev);
1153         /*
1154          * initialize the baycom_state struct
1155          */
1156         bc->ch_params = dflt_ch_params;
1157         bc->ptt_keyed = 0;
1158
1159         /*
1160          * initialize the device struct
1161          */
1162         dev->open = epp_open;
1163         dev->stop = epp_close;
1164         dev->do_ioctl = baycom_ioctl;
1165         dev->hard_start_xmit = baycom_send_packet;
1166         dev->get_stats = baycom_get_stats;
1167
1168         /* Fill in the fields of the device structure */
1169         bc->skb = NULL;
1170         
1171         dev->hard_header = ax25_hard_header;
1172         dev->rebuild_header = ax25_rebuild_header;
1173         dev->set_mac_address = baycom_set_mac_address;
1174         
1175         dev->type = ARPHRD_AX25;           /* AF_AX25 device */
1176         dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1177         dev->mtu = AX25_DEF_PACLEN;        /* eth_mtu is the default */
1178         dev->addr_len = AX25_ADDR_LEN;     /* sizeof an ax.25 address */
1179         memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1180         memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
1181         dev->tx_queue_len = 16;
1182
1183         /* New style flags */
1184         dev->flags = 0;
1185 }
1186
1187 /* --------------------------------------------------------------------- */
1188
1189 /*
1190  * command line settable parameters
1191  */
1192 static const char *mode[NR_PORTS] = { "", };
1193 static int iobase[NR_PORTS] = { 0x378, };
1194
1195 module_param_array(mode, charp, NULL, 0);
1196 MODULE_PARM_DESC(mode, "baycom operating mode");
1197 module_param_array(iobase, int, NULL, 0);
1198 MODULE_PARM_DESC(iobase, "baycom io base address");
1199
1200 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
1201 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
1202 MODULE_LICENSE("GPL");
1203
1204 /* --------------------------------------------------------------------- */
1205
1206 static void __init baycom_epp_dev_setup(struct net_device *dev)
1207 {
1208         struct baycom_state *bc = netdev_priv(dev);
1209
1210         /*
1211          * initialize part of the baycom_state struct
1212          */
1213         bc->dev = dev;
1214         bc->magic = BAYCOM_MAGIC;
1215         bc->cfg.fclk = 19666600;
1216         bc->cfg.bps = 9600;
1217         /*
1218          * initialize part of the device struct
1219          */
1220         baycom_probe(dev);
1221 }
1222
1223 static int __init init_baycomepp(void)
1224 {
1225         int i, found = 0;
1226         char set_hw = 1;
1227
1228         printk(bc_drvinfo);
1229         /*
1230          * register net devices
1231          */
1232         for (i = 0; i < NR_PORTS; i++) {
1233                 struct net_device *dev;
1234                 
1235                 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
1236                                    baycom_epp_dev_setup);
1237
1238                 if (!dev) {
1239                         printk(KERN_WARNING "bce%d : out of memory\n", i);
1240                         return found ? 0 : -ENOMEM;
1241                 }
1242                         
1243                 sprintf(dev->name, "bce%d", i);
1244                 dev->base_addr = iobase[i];
1245
1246                 if (!mode[i])
1247                         set_hw = 0;
1248                 if (!set_hw)
1249                         iobase[i] = 0;
1250
1251                 if (register_netdev(dev)) {
1252                         printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
1253                         free_netdev(dev);
1254                         break;
1255                 }
1256                 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
1257                         set_hw = 0;
1258                 baycom_device[i] = dev;
1259                 found++;
1260         }
1261
1262         return found ? 0 : -ENXIO;
1263 }
1264
1265 static void __exit cleanup_baycomepp(void)
1266 {
1267         int i;
1268
1269         for(i = 0; i < NR_PORTS; i++) {
1270                 struct net_device *dev = baycom_device[i];
1271
1272                 if (dev) {
1273                         struct baycom_state *bc = netdev_priv(dev);
1274                         if (bc->magic == BAYCOM_MAGIC) {
1275                                 unregister_netdev(dev);
1276                                 free_netdev(dev);
1277                         } else
1278                                 printk(paranoia_str, "cleanup_module");
1279                 }
1280         }
1281 }
1282
1283 module_init(init_baycomepp);
1284 module_exit(cleanup_baycomepp);
1285
1286 /* --------------------------------------------------------------------- */
1287
1288 #ifndef MODULE
1289
1290 /*
1291  * format: baycom_epp=io,mode
1292  * mode: fpga config options
1293  */
1294
1295 static int __init baycom_epp_setup(char *str)
1296 {
1297         static unsigned __initdata nr_dev = 0;
1298         int ints[2];
1299
1300         if (nr_dev >= NR_PORTS)
1301                 return 0;
1302         str = get_options(str, 2, ints);
1303         if (ints[0] < 1)
1304                 return 0;
1305         mode[nr_dev] = str;
1306         iobase[nr_dev] = ints[1];
1307         nr_dev++;
1308         return 1;
1309 }
1310
1311 __setup("baycom_epp=", baycom_epp_setup);
1312
1313 #endif /* MODULE */
1314 /* --------------------------------------------------------------------- */