Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * This driver is designed for the non-CPM ethernet controllers
6  * on the 85xx and 83xx family of integrated processors
7  * Based on 8260_io/fcc_enet.c
8  *
9  * Author: Andy Fleming
10  * Maintainer: Kumar Gala
11  *
12  * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13  * Copyright (c) 2007 MontaVista Software, Inc.
14  *
15  * This program is free software; you can redistribute  it and/or modify it
16  * under  the terms of  the GNU General  Public License as published by the
17  * Free Software Foundation;  either version 2 of the  License, or (at your
18  * option) any later version.
19  *
20  *  Gianfar:  AKA Lambda Draconis, "Dragon"
21  *  RA 11 31 24.2
22  *  Dec +69 19 52
23  *  V 3.84
24  *  B-V +1.62
25  *
26  *  Theory of operation
27  *
28  *  The driver is initialized through of_device. Configuration information
29  *  is therefore conveyed through an OF-style device tree.
30  *
31  *  The Gianfar Ethernet Controller uses a ring of buffer
32  *  descriptors.  The beginning is indicated by a register
33  *  pointing to the physical address of the start of the ring.
34  *  The end is determined by a "wrap" bit being set in the
35  *  last descriptor of the ring.
36  *
37  *  When a packet is received, the RXF bit in the
38  *  IEVENT register is set, triggering an interrupt when the
39  *  corresponding bit in the IMASK register is also set (if
40  *  interrupt coalescing is active, then the interrupt may not
41  *  happen immediately, but will wait until either a set number
42  *  of frames or amount of time have passed).  In NAPI, the
43  *  interrupt handler will signal there is work to be done, and
44  *  exit. This method will start at the last known empty
45  *  descriptor, and process every subsequent descriptor until there
46  *  are none left with data (NAPI will stop after a set number of
47  *  packets to give time to other tasks, but will eventually
48  *  process all the packets).  The data arrives inside a
49  *  pre-allocated skb, and so after the skb is passed up to the
50  *  stack, a new skb must be allocated, and the address field in
51  *  the buffer descriptor must be updated to indicate this new
52  *  skb.
53  *
54  *  When the kernel requests that a packet be transmitted, the
55  *  driver starts where it left off last time, and points the
56  *  descriptor at the buffer which was passed in.  The driver
57  *  then informs the DMA engine that there are packets ready to
58  *  be transmitted.  Once the controller is finished transmitting
59  *  the packet, an interrupt may be triggered (under the same
60  *  conditions as for reception, but depending on the TXF bit).
61  *  The driver then cleans up the buffer.
62  */
63
64 #include <linux/kernel.h>
65 #include <linux/string.h>
66 #include <linux/errno.h>
67 #include <linux/unistd.h>
68 #include <linux/slab.h>
69 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #include <linux/if_vlan.h>
76 #include <linux/spinlock.h>
77 #include <linux/mm.h>
78 #include <linux/of_mdio.h>
79 #include <linux/of_platform.h>
80 #include <linux/ip.h>
81 #include <linux/tcp.h>
82 #include <linux/udp.h>
83 #include <linux/in.h>
84
85 #include <asm/io.h>
86 #include <asm/irq.h>
87 #include <asm/uaccess.h>
88 #include <linux/module.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/crc32.h>
91 #include <linux/mii.h>
92 #include <linux/phy.h>
93 #include <linux/phy_fixed.h>
94 #include <linux/of.h>
95
96 #include "gianfar.h"
97 #include "fsl_pq_mdio.h"
98
99 #define TX_TIMEOUT      (1*HZ)
100 #undef BRIEF_GFAR_ERRORS
101 #undef VERBOSE_GFAR_ERRORS
102
103 const char gfar_driver_name[] = "Gianfar Ethernet";
104 const char gfar_driver_version[] = "1.3";
105
106 static int gfar_enet_open(struct net_device *dev);
107 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
108 static void gfar_reset_task(struct work_struct *work);
109 static void gfar_timeout(struct net_device *dev);
110 static int gfar_close(struct net_device *dev);
111 struct sk_buff *gfar_new_skb(struct net_device *dev);
112 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
113                 struct sk_buff *skb);
114 static int gfar_set_mac_address(struct net_device *dev);
115 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
116 static irqreturn_t gfar_error(int irq, void *dev_id);
117 static irqreturn_t gfar_transmit(int irq, void *dev_id);
118 static irqreturn_t gfar_interrupt(int irq, void *dev_id);
119 static void adjust_link(struct net_device *dev);
120 static void init_registers(struct net_device *dev);
121 static int init_phy(struct net_device *dev);
122 static int gfar_probe(struct of_device *ofdev,
123                 const struct of_device_id *match);
124 static int gfar_remove(struct of_device *ofdev);
125 static void free_skb_resources(struct gfar_private *priv);
126 static void gfar_set_multi(struct net_device *dev);
127 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
128 static void gfar_configure_serdes(struct net_device *dev);
129 static int gfar_poll(struct napi_struct *napi, int budget);
130 #ifdef CONFIG_NET_POLL_CONTROLLER
131 static void gfar_netpoll(struct net_device *dev);
132 #endif
133 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
134 static int gfar_clean_tx_ring(struct net_device *dev);
135 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
136                               int amount_pull);
137 static void gfar_vlan_rx_register(struct net_device *netdev,
138                                 struct vlan_group *grp);
139 void gfar_halt(struct net_device *dev);
140 static void gfar_halt_nodisable(struct net_device *dev);
141 void gfar_start(struct net_device *dev);
142 static void gfar_clear_exact_match(struct net_device *dev);
143 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
144 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
145
146 MODULE_AUTHOR("Freescale Semiconductor, Inc");
147 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
148 MODULE_LICENSE("GPL");
149
150 static void gfar_init_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
151                             dma_addr_t buf)
152 {
153         struct gfar_private *priv = netdev_priv(dev);
154         u32 lstatus;
155
156         bdp->bufPtr = buf;
157
158         lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
159         if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
160                 lstatus |= BD_LFLAG(RXBD_WRAP);
161
162         eieio();
163
164         bdp->lstatus = lstatus;
165 }
166
167 static int gfar_init_bds(struct net_device *ndev)
168 {
169         struct gfar_private *priv = netdev_priv(ndev);
170         struct txbd8 *txbdp;
171         struct rxbd8 *rxbdp;
172         int i;
173
174         /* Initialize some variables in our dev structure */
175         priv->num_txbdfree = priv->tx_ring_size;
176         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
177         priv->cur_rx = priv->rx_bd_base;
178         priv->skb_curtx = priv->skb_dirtytx = 0;
179         priv->skb_currx = 0;
180
181         /* Initialize Transmit Descriptor Ring */
182         txbdp = priv->tx_bd_base;
183         for (i = 0; i < priv->tx_ring_size; i++) {
184                 txbdp->lstatus = 0;
185                 txbdp->bufPtr = 0;
186                 txbdp++;
187         }
188
189         /* Set the last descriptor in the ring to indicate wrap */
190         txbdp--;
191         txbdp->status |= TXBD_WRAP;
192
193         rxbdp = priv->rx_bd_base;
194         for (i = 0; i < priv->rx_ring_size; i++) {
195                 struct sk_buff *skb = priv->rx_skbuff[i];
196
197                 if (skb) {
198                         gfar_init_rxbdp(ndev, rxbdp, rxbdp->bufPtr);
199                 } else {
200                         skb = gfar_new_skb(ndev);
201                         if (!skb) {
202                                 pr_err("%s: Can't allocate RX buffers\n",
203                                        ndev->name);
204                                 return -ENOMEM;
205                         }
206                         priv->rx_skbuff[i] = skb;
207
208                         gfar_new_rxbdp(ndev, rxbdp, skb);
209                 }
210
211                 rxbdp++;
212         }
213
214         return 0;
215 }
216
217 static int gfar_alloc_skb_resources(struct net_device *ndev)
218 {
219         void *vaddr;
220         int i;
221         struct gfar_private *priv = netdev_priv(ndev);
222         struct device *dev = &priv->ofdev->dev;
223
224         /* Allocate memory for the buffer descriptors */
225         vaddr = dma_alloc_coherent(dev,
226                         sizeof(*priv->tx_bd_base) * priv->tx_ring_size +
227                         sizeof(*priv->rx_bd_base) * priv->rx_ring_size,
228                         &priv->tx_bd_dma_base, GFP_KERNEL);
229         if (!vaddr) {
230                 if (netif_msg_ifup(priv))
231                         pr_err("%s: Could not allocate buffer descriptors!\n",
232                                ndev->name);
233                 return -ENOMEM;
234         }
235
236         priv->tx_bd_base = vaddr;
237
238         /* Start the rx descriptor ring where the tx ring leaves off */
239         vaddr = vaddr + sizeof(*priv->tx_bd_base) * priv->tx_ring_size;
240         priv->rx_bd_base = vaddr;
241
242         /* Setup the skbuff rings */
243         priv->tx_skbuff = kmalloc(sizeof(*priv->tx_skbuff) *
244                                   priv->tx_ring_size, GFP_KERNEL);
245         if (!priv->tx_skbuff) {
246                 if (netif_msg_ifup(priv))
247                         pr_err("%s: Could not allocate tx_skbuff\n",
248                                ndev->name);
249                 goto cleanup;
250         }
251
252         for (i = 0; i < priv->tx_ring_size; i++)
253                 priv->tx_skbuff[i] = NULL;
254
255         priv->rx_skbuff = kmalloc(sizeof(*priv->rx_skbuff) *
256                                   priv->rx_ring_size, GFP_KERNEL);
257         if (!priv->rx_skbuff) {
258                 if (netif_msg_ifup(priv))
259                         pr_err("%s: Could not allocate rx_skbuff\n",
260                                ndev->name);
261                 goto cleanup;
262         }
263
264         for (i = 0; i < priv->rx_ring_size; i++)
265                 priv->rx_skbuff[i] = NULL;
266
267         if (gfar_init_bds(ndev))
268                 goto cleanup;
269
270         return 0;
271
272 cleanup:
273         free_skb_resources(priv);
274         return -ENOMEM;
275 }
276
277 static void gfar_init_mac(struct net_device *ndev)
278 {
279         struct gfar_private *priv = netdev_priv(ndev);
280         struct gfar __iomem *regs = priv->regs;
281         u32 rctrl = 0;
282         u32 tctrl = 0;
283         u32 attrs = 0;
284
285         /* enet DMA only understands physical addresses */
286         gfar_write(&regs->tbase0, priv->tx_bd_dma_base);
287         gfar_write(&regs->rbase0, priv->tx_bd_dma_base +
288                                   sizeof(*priv->tx_bd_base) *
289                                   priv->tx_ring_size);
290
291         /* Configure the coalescing support */
292         gfar_write(&regs->txic, 0);
293         if (priv->txcoalescing)
294                 gfar_write(&regs->txic, priv->txic);
295
296         gfar_write(&regs->rxic, 0);
297         if (priv->rxcoalescing)
298                 gfar_write(&regs->rxic, priv->rxic);
299
300         if (priv->rx_csum_enable)
301                 rctrl |= RCTRL_CHECKSUMMING;
302
303         if (priv->extended_hash) {
304                 rctrl |= RCTRL_EXTHASH;
305
306                 gfar_clear_exact_match(ndev);
307                 rctrl |= RCTRL_EMEN;
308         }
309
310         if (priv->padding) {
311                 rctrl &= ~RCTRL_PAL_MASK;
312                 rctrl |= RCTRL_PADDING(priv->padding);
313         }
314
315         /* keep vlan related bits if it's enabled */
316         if (priv->vlgrp) {
317                 rctrl |= RCTRL_VLEX | RCTRL_PRSDEP_INIT;
318                 tctrl |= TCTRL_VLINS;
319         }
320
321         /* Init rctrl based on our settings */
322         gfar_write(&regs->rctrl, rctrl);
323
324         if (ndev->features & NETIF_F_IP_CSUM)
325                 tctrl |= TCTRL_INIT_CSUM;
326
327         gfar_write(&regs->tctrl, tctrl);
328
329         /* Set the extraction length and index */
330         attrs = ATTRELI_EL(priv->rx_stash_size) |
331                 ATTRELI_EI(priv->rx_stash_index);
332
333         gfar_write(&regs->attreli, attrs);
334
335         /* Start with defaults, and add stashing or locking
336          * depending on the approprate variables */
337         attrs = ATTR_INIT_SETTINGS;
338
339         if (priv->bd_stash_en)
340                 attrs |= ATTR_BDSTASH;
341
342         if (priv->rx_stash_size != 0)
343                 attrs |= ATTR_BUFSTASH;
344
345         gfar_write(&regs->attr, attrs);
346
347         gfar_write(&regs->fifo_tx_thr, priv->fifo_threshold);
348         gfar_write(&regs->fifo_tx_starve, priv->fifo_starve);
349         gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
350 }
351
352 static const struct net_device_ops gfar_netdev_ops = {
353         .ndo_open = gfar_enet_open,
354         .ndo_start_xmit = gfar_start_xmit,
355         .ndo_stop = gfar_close,
356         .ndo_change_mtu = gfar_change_mtu,
357         .ndo_set_multicast_list = gfar_set_multi,
358         .ndo_tx_timeout = gfar_timeout,
359         .ndo_do_ioctl = gfar_ioctl,
360         .ndo_vlan_rx_register = gfar_vlan_rx_register,
361         .ndo_set_mac_address = eth_mac_addr,
362         .ndo_validate_addr = eth_validate_addr,
363 #ifdef CONFIG_NET_POLL_CONTROLLER
364         .ndo_poll_controller = gfar_netpoll,
365 #endif
366 };
367
368 /* Returns 1 if incoming frames use an FCB */
369 static inline int gfar_uses_fcb(struct gfar_private *priv)
370 {
371         return priv->vlgrp || priv->rx_csum_enable;
372 }
373
374 static int gfar_of_init(struct net_device *dev)
375 {
376         const char *model;
377         const char *ctype;
378         const void *mac_addr;
379         u64 addr, size;
380         int err = 0;
381         struct gfar_private *priv = netdev_priv(dev);
382         struct device_node *np = priv->node;
383         const u32 *stash;
384         const u32 *stash_len;
385         const u32 *stash_idx;
386
387         if (!np || !of_device_is_available(np))
388                 return -ENODEV;
389
390         /* get a pointer to the register memory */
391         addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
392         priv->regs = ioremap(addr, size);
393
394         if (priv->regs == NULL)
395                 return -ENOMEM;
396
397         priv->interruptTransmit = irq_of_parse_and_map(np, 0);
398
399         model = of_get_property(np, "model", NULL);
400
401         /* If we aren't the FEC we have multiple interrupts */
402         if (model && strcasecmp(model, "FEC")) {
403                 priv->interruptReceive = irq_of_parse_and_map(np, 1);
404
405                 priv->interruptError = irq_of_parse_and_map(np, 2);
406
407                 if (priv->interruptTransmit < 0 ||
408                                 priv->interruptReceive < 0 ||
409                                 priv->interruptError < 0) {
410                         err = -EINVAL;
411                         goto err_out;
412                 }
413         }
414
415         stash = of_get_property(np, "bd-stash", NULL);
416
417         if(stash) {
418                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
419                 priv->bd_stash_en = 1;
420         }
421
422         stash_len = of_get_property(np, "rx-stash-len", NULL);
423
424         if (stash_len)
425                 priv->rx_stash_size = *stash_len;
426
427         stash_idx = of_get_property(np, "rx-stash-idx", NULL);
428
429         if (stash_idx)
430                 priv->rx_stash_index = *stash_idx;
431
432         if (stash_len || stash_idx)
433                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
434
435         mac_addr = of_get_mac_address(np);
436         if (mac_addr)
437                 memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
438
439         if (model && !strcasecmp(model, "TSEC"))
440                 priv->device_flags =
441                         FSL_GIANFAR_DEV_HAS_GIGABIT |
442                         FSL_GIANFAR_DEV_HAS_COALESCE |
443                         FSL_GIANFAR_DEV_HAS_RMON |
444                         FSL_GIANFAR_DEV_HAS_MULTI_INTR;
445         if (model && !strcasecmp(model, "eTSEC"))
446                 priv->device_flags =
447                         FSL_GIANFAR_DEV_HAS_GIGABIT |
448                         FSL_GIANFAR_DEV_HAS_COALESCE |
449                         FSL_GIANFAR_DEV_HAS_RMON |
450                         FSL_GIANFAR_DEV_HAS_MULTI_INTR |
451                         FSL_GIANFAR_DEV_HAS_PADDING |
452                         FSL_GIANFAR_DEV_HAS_CSUM |
453                         FSL_GIANFAR_DEV_HAS_VLAN |
454                         FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
455                         FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
456
457         ctype = of_get_property(np, "phy-connection-type", NULL);
458
459         /* We only care about rgmii-id.  The rest are autodetected */
460         if (ctype && !strcmp(ctype, "rgmii-id"))
461                 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
462         else
463                 priv->interface = PHY_INTERFACE_MODE_MII;
464
465         if (of_get_property(np, "fsl,magic-packet", NULL))
466                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
467
468         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
469
470         /* Find the TBI PHY.  If it's not there, we don't support SGMII */
471         priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
472
473         return 0;
474
475 err_out:
476         iounmap(priv->regs);
477         return err;
478 }
479
480 /* Ioctl MII Interface */
481 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
482 {
483         struct gfar_private *priv = netdev_priv(dev);
484
485         if (!netif_running(dev))
486                 return -EINVAL;
487
488         if (!priv->phydev)
489                 return -ENODEV;
490
491         return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
492 }
493
494 /* Set up the ethernet device structure, private data,
495  * and anything else we need before we start */
496 static int gfar_probe(struct of_device *ofdev,
497                 const struct of_device_id *match)
498 {
499         u32 tempval;
500         struct net_device *dev = NULL;
501         struct gfar_private *priv = NULL;
502         int err = 0;
503         int len_devname;
504
505         /* Create an ethernet device instance */
506         dev = alloc_etherdev(sizeof (*priv));
507
508         if (NULL == dev)
509                 return -ENOMEM;
510
511         priv = netdev_priv(dev);
512         priv->ndev = dev;
513         priv->ofdev = ofdev;
514         priv->node = ofdev->node;
515         SET_NETDEV_DEV(dev, &ofdev->dev);
516
517         err = gfar_of_init(dev);
518
519         if (err)
520                 goto regs_fail;
521
522         spin_lock_init(&priv->txlock);
523         spin_lock_init(&priv->rxlock);
524         spin_lock_init(&priv->bflock);
525         INIT_WORK(&priv->reset_task, gfar_reset_task);
526
527         dev_set_drvdata(&ofdev->dev, priv);
528
529         /* Stop the DMA engine now, in case it was running before */
530         /* (The firmware could have used it, and left it running). */
531         gfar_halt(dev);
532
533         /* Reset MAC layer */
534         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
535
536         /* We need to delay at least 3 TX clocks */
537         udelay(2);
538
539         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
540         gfar_write(&priv->regs->maccfg1, tempval);
541
542         /* Initialize MACCFG2. */
543         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
544
545         /* Initialize ECNTRL */
546         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
547
548         /* Set the dev->base_addr to the gfar reg region */
549         dev->base_addr = (unsigned long) (priv->regs);
550
551         SET_NETDEV_DEV(dev, &ofdev->dev);
552
553         /* Fill in the dev structure */
554         dev->watchdog_timeo = TX_TIMEOUT;
555         netif_napi_add(dev, &priv->napi, gfar_poll, GFAR_DEV_WEIGHT);
556         dev->mtu = 1500;
557
558         dev->netdev_ops = &gfar_netdev_ops;
559         dev->ethtool_ops = &gfar_ethtool_ops;
560
561         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
562                 priv->rx_csum_enable = 1;
563                 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA;
564         } else
565                 priv->rx_csum_enable = 0;
566
567         priv->vlgrp = NULL;
568
569         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN)
570                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
571
572         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
573                 priv->extended_hash = 1;
574                 priv->hash_width = 9;
575
576                 priv->hash_regs[0] = &priv->regs->igaddr0;
577                 priv->hash_regs[1] = &priv->regs->igaddr1;
578                 priv->hash_regs[2] = &priv->regs->igaddr2;
579                 priv->hash_regs[3] = &priv->regs->igaddr3;
580                 priv->hash_regs[4] = &priv->regs->igaddr4;
581                 priv->hash_regs[5] = &priv->regs->igaddr5;
582                 priv->hash_regs[6] = &priv->regs->igaddr6;
583                 priv->hash_regs[7] = &priv->regs->igaddr7;
584                 priv->hash_regs[8] = &priv->regs->gaddr0;
585                 priv->hash_regs[9] = &priv->regs->gaddr1;
586                 priv->hash_regs[10] = &priv->regs->gaddr2;
587                 priv->hash_regs[11] = &priv->regs->gaddr3;
588                 priv->hash_regs[12] = &priv->regs->gaddr4;
589                 priv->hash_regs[13] = &priv->regs->gaddr5;
590                 priv->hash_regs[14] = &priv->regs->gaddr6;
591                 priv->hash_regs[15] = &priv->regs->gaddr7;
592
593         } else {
594                 priv->extended_hash = 0;
595                 priv->hash_width = 8;
596
597                 priv->hash_regs[0] = &priv->regs->gaddr0;
598                 priv->hash_regs[1] = &priv->regs->gaddr1;
599                 priv->hash_regs[2] = &priv->regs->gaddr2;
600                 priv->hash_regs[3] = &priv->regs->gaddr3;
601                 priv->hash_regs[4] = &priv->regs->gaddr4;
602                 priv->hash_regs[5] = &priv->regs->gaddr5;
603                 priv->hash_regs[6] = &priv->regs->gaddr6;
604                 priv->hash_regs[7] = &priv->regs->gaddr7;
605         }
606
607         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
608                 priv->padding = DEFAULT_PADDING;
609         else
610                 priv->padding = 0;
611
612         if (dev->features & NETIF_F_IP_CSUM)
613                 dev->hard_header_len += GMAC_FCB_LEN;
614
615         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
616         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
617         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
618         priv->num_txbdfree = DEFAULT_TX_RING_SIZE;
619
620         priv->txcoalescing = DEFAULT_TX_COALESCE;
621         priv->txic = DEFAULT_TXIC;
622         priv->rxcoalescing = DEFAULT_RX_COALESCE;
623         priv->rxic = DEFAULT_RXIC;
624
625         /* Enable most messages by default */
626         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
627
628         /* Carrier starts down, phylib will bring it up */
629         netif_carrier_off(dev);
630
631         err = register_netdev(dev);
632
633         if (err) {
634                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
635                                 dev->name);
636                 goto register_fail;
637         }
638
639         device_init_wakeup(&dev->dev,
640                 priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
641
642         /* fill out IRQ number and name fields */
643         len_devname = strlen(dev->name);
644         strncpy(&priv->int_name_tx[0], dev->name, len_devname);
645         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
646                 strncpy(&priv->int_name_tx[len_devname],
647                         "_tx", sizeof("_tx") + 1);
648
649                 strncpy(&priv->int_name_rx[0], dev->name, len_devname);
650                 strncpy(&priv->int_name_rx[len_devname],
651                         "_rx", sizeof("_rx") + 1);
652
653                 strncpy(&priv->int_name_er[0], dev->name, len_devname);
654                 strncpy(&priv->int_name_er[len_devname],
655                         "_er", sizeof("_er") + 1);
656         } else
657                 priv->int_name_tx[len_devname] = '\0';
658
659         /* Create all the sysfs files */
660         gfar_init_sysfs(dev);
661
662         /* Print out the device info */
663         printk(KERN_INFO DEVICE_NAME "%pM\n", dev->name, dev->dev_addr);
664
665         /* Even more device info helps when determining which kernel */
666         /* provided which set of benchmarks. */
667         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
668         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
669                dev->name, priv->rx_ring_size, priv->tx_ring_size);
670
671         return 0;
672
673 register_fail:
674         iounmap(priv->regs);
675 regs_fail:
676         if (priv->phy_node)
677                 of_node_put(priv->phy_node);
678         if (priv->tbi_node)
679                 of_node_put(priv->tbi_node);
680         free_netdev(dev);
681         return err;
682 }
683
684 static int gfar_remove(struct of_device *ofdev)
685 {
686         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
687
688         if (priv->phy_node)
689                 of_node_put(priv->phy_node);
690         if (priv->tbi_node)
691                 of_node_put(priv->tbi_node);
692
693         dev_set_drvdata(&ofdev->dev, NULL);
694
695         unregister_netdev(priv->ndev);
696         iounmap(priv->regs);
697         free_netdev(priv->ndev);
698
699         return 0;
700 }
701
702 #ifdef CONFIG_PM
703
704 static int gfar_suspend(struct device *dev)
705 {
706         struct gfar_private *priv = dev_get_drvdata(dev);
707         struct net_device *ndev = priv->ndev;
708         unsigned long flags;
709         u32 tempval;
710
711         int magic_packet = priv->wol_en &&
712                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
713
714         netif_device_detach(ndev);
715
716         if (netif_running(ndev)) {
717                 spin_lock_irqsave(&priv->txlock, flags);
718                 spin_lock(&priv->rxlock);
719
720                 gfar_halt_nodisable(ndev);
721
722                 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
723                 tempval = gfar_read(&priv->regs->maccfg1);
724
725                 tempval &= ~MACCFG1_TX_EN;
726
727                 if (!magic_packet)
728                         tempval &= ~MACCFG1_RX_EN;
729
730                 gfar_write(&priv->regs->maccfg1, tempval);
731
732                 spin_unlock(&priv->rxlock);
733                 spin_unlock_irqrestore(&priv->txlock, flags);
734
735                 napi_disable(&priv->napi);
736
737                 if (magic_packet) {
738                         /* Enable interrupt on Magic Packet */
739                         gfar_write(&priv->regs->imask, IMASK_MAG);
740
741                         /* Enable Magic Packet mode */
742                         tempval = gfar_read(&priv->regs->maccfg2);
743                         tempval |= MACCFG2_MPEN;
744                         gfar_write(&priv->regs->maccfg2, tempval);
745                 } else {
746                         phy_stop(priv->phydev);
747                 }
748         }
749
750         return 0;
751 }
752
753 static int gfar_resume(struct device *dev)
754 {
755         struct gfar_private *priv = dev_get_drvdata(dev);
756         struct net_device *ndev = priv->ndev;
757         unsigned long flags;
758         u32 tempval;
759         int magic_packet = priv->wol_en &&
760                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
761
762         if (!netif_running(ndev)) {
763                 netif_device_attach(ndev);
764                 return 0;
765         }
766
767         if (!magic_packet && priv->phydev)
768                 phy_start(priv->phydev);
769
770         /* Disable Magic Packet mode, in case something
771          * else woke us up.
772          */
773
774         spin_lock_irqsave(&priv->txlock, flags);
775         spin_lock(&priv->rxlock);
776
777         tempval = gfar_read(&priv->regs->maccfg2);
778         tempval &= ~MACCFG2_MPEN;
779         gfar_write(&priv->regs->maccfg2, tempval);
780
781         gfar_start(ndev);
782
783         spin_unlock(&priv->rxlock);
784         spin_unlock_irqrestore(&priv->txlock, flags);
785
786         netif_device_attach(ndev);
787
788         napi_enable(&priv->napi);
789
790         return 0;
791 }
792
793 static int gfar_restore(struct device *dev)
794 {
795         struct gfar_private *priv = dev_get_drvdata(dev);
796         struct net_device *ndev = priv->ndev;
797
798         if (!netif_running(ndev))
799                 return 0;
800
801         gfar_init_bds(ndev);
802         init_registers(ndev);
803         gfar_set_mac_address(ndev);
804         gfar_init_mac(ndev);
805         gfar_start(ndev);
806
807         priv->oldlink = 0;
808         priv->oldspeed = 0;
809         priv->oldduplex = -1;
810
811         if (priv->phydev)
812                 phy_start(priv->phydev);
813
814         netif_device_attach(ndev);
815         napi_enable(&priv->napi);
816
817         return 0;
818 }
819
820 static struct dev_pm_ops gfar_pm_ops = {
821         .suspend = gfar_suspend,
822         .resume = gfar_resume,
823         .freeze = gfar_suspend,
824         .thaw = gfar_resume,
825         .restore = gfar_restore,
826 };
827
828 #define GFAR_PM_OPS (&gfar_pm_ops)
829
830 static int gfar_legacy_suspend(struct of_device *ofdev, pm_message_t state)
831 {
832         return gfar_suspend(&ofdev->dev);
833 }
834
835 static int gfar_legacy_resume(struct of_device *ofdev)
836 {
837         return gfar_resume(&ofdev->dev);
838 }
839
840 #else
841
842 #define GFAR_PM_OPS NULL
843 #define gfar_legacy_suspend NULL
844 #define gfar_legacy_resume NULL
845
846 #endif
847
848 /* Reads the controller's registers to determine what interface
849  * connects it to the PHY.
850  */
851 static phy_interface_t gfar_get_interface(struct net_device *dev)
852 {
853         struct gfar_private *priv = netdev_priv(dev);
854         u32 ecntrl = gfar_read(&priv->regs->ecntrl);
855
856         if (ecntrl & ECNTRL_SGMII_MODE)
857                 return PHY_INTERFACE_MODE_SGMII;
858
859         if (ecntrl & ECNTRL_TBI_MODE) {
860                 if (ecntrl & ECNTRL_REDUCED_MODE)
861                         return PHY_INTERFACE_MODE_RTBI;
862                 else
863                         return PHY_INTERFACE_MODE_TBI;
864         }
865
866         if (ecntrl & ECNTRL_REDUCED_MODE) {
867                 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
868                         return PHY_INTERFACE_MODE_RMII;
869                 else {
870                         phy_interface_t interface = priv->interface;
871
872                         /*
873                          * This isn't autodetected right now, so it must
874                          * be set by the device tree or platform code.
875                          */
876                         if (interface == PHY_INTERFACE_MODE_RGMII_ID)
877                                 return PHY_INTERFACE_MODE_RGMII_ID;
878
879                         return PHY_INTERFACE_MODE_RGMII;
880                 }
881         }
882
883         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
884                 return PHY_INTERFACE_MODE_GMII;
885
886         return PHY_INTERFACE_MODE_MII;
887 }
888
889
890 /* Initializes driver's PHY state, and attaches to the PHY.
891  * Returns 0 on success.
892  */
893 static int init_phy(struct net_device *dev)
894 {
895         struct gfar_private *priv = netdev_priv(dev);
896         uint gigabit_support =
897                 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
898                 SUPPORTED_1000baseT_Full : 0;
899         phy_interface_t interface;
900
901         priv->oldlink = 0;
902         priv->oldspeed = 0;
903         priv->oldduplex = -1;
904
905         interface = gfar_get_interface(dev);
906
907         priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
908                                       interface);
909         if (!priv->phydev)
910                 priv->phydev = of_phy_connect_fixed_link(dev, &adjust_link,
911                                                          interface);
912         if (!priv->phydev) {
913                 dev_err(&dev->dev, "could not attach to PHY\n");
914                 return -ENODEV;
915         }
916
917         if (interface == PHY_INTERFACE_MODE_SGMII)
918                 gfar_configure_serdes(dev);
919
920         /* Remove any features not supported by the controller */
921         priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
922         priv->phydev->advertising = priv->phydev->supported;
923
924         return 0;
925 }
926
927 /*
928  * Initialize TBI PHY interface for communicating with the
929  * SERDES lynx PHY on the chip.  We communicate with this PHY
930  * through the MDIO bus on each controller, treating it as a
931  * "normal" PHY at the address found in the TBIPA register.  We assume
932  * that the TBIPA register is valid.  Either the MDIO bus code will set
933  * it to a value that doesn't conflict with other PHYs on the bus, or the
934  * value doesn't matter, as there are no other PHYs on the bus.
935  */
936 static void gfar_configure_serdes(struct net_device *dev)
937 {
938         struct gfar_private *priv = netdev_priv(dev);
939         struct phy_device *tbiphy;
940
941         if (!priv->tbi_node) {
942                 dev_warn(&dev->dev, "error: SGMII mode requires that the "
943                                     "device tree specify a tbi-handle\n");
944                 return;
945         }
946
947         tbiphy = of_phy_find_device(priv->tbi_node);
948         if (!tbiphy) {
949                 dev_err(&dev->dev, "error: Could not get TBI device\n");
950                 return;
951         }
952
953         /*
954          * If the link is already up, we must already be ok, and don't need to
955          * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
956          * everything for us?  Resetting it takes the link down and requires
957          * several seconds for it to come back.
958          */
959         if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
960                 return;
961
962         /* Single clk mode, mii mode off(for serdes communication) */
963         phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
964
965         phy_write(tbiphy, MII_ADVERTISE,
966                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
967                         ADVERTISE_1000XPSE_ASYM);
968
969         phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
970                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
971 }
972
973 static void init_registers(struct net_device *dev)
974 {
975         struct gfar_private *priv = netdev_priv(dev);
976
977         /* Clear IEVENT */
978         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
979
980         /* Initialize IMASK */
981         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
982
983         /* Init hash registers to zero */
984         gfar_write(&priv->regs->igaddr0, 0);
985         gfar_write(&priv->regs->igaddr1, 0);
986         gfar_write(&priv->regs->igaddr2, 0);
987         gfar_write(&priv->regs->igaddr3, 0);
988         gfar_write(&priv->regs->igaddr4, 0);
989         gfar_write(&priv->regs->igaddr5, 0);
990         gfar_write(&priv->regs->igaddr6, 0);
991         gfar_write(&priv->regs->igaddr7, 0);
992
993         gfar_write(&priv->regs->gaddr0, 0);
994         gfar_write(&priv->regs->gaddr1, 0);
995         gfar_write(&priv->regs->gaddr2, 0);
996         gfar_write(&priv->regs->gaddr3, 0);
997         gfar_write(&priv->regs->gaddr4, 0);
998         gfar_write(&priv->regs->gaddr5, 0);
999         gfar_write(&priv->regs->gaddr6, 0);
1000         gfar_write(&priv->regs->gaddr7, 0);
1001
1002         /* Zero out the rmon mib registers if it has them */
1003         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
1004                 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib));
1005
1006                 /* Mask off the CAM interrupts */
1007                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
1008                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
1009         }
1010
1011         /* Initialize the max receive buffer length */
1012         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1013
1014         /* Initialize the Minimum Frame Length Register */
1015         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
1016 }
1017
1018
1019 /* Halt the receive and transmit queues */
1020 static void gfar_halt_nodisable(struct net_device *dev)
1021 {
1022         struct gfar_private *priv = netdev_priv(dev);
1023         struct gfar __iomem *regs = priv->regs;
1024         u32 tempval;
1025
1026         /* Mask all interrupts */
1027         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1028
1029         /* Clear all interrupts */
1030         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
1031
1032         /* Stop the DMA, and wait for it to stop */
1033         tempval = gfar_read(&priv->regs->dmactrl);
1034         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
1035             != (DMACTRL_GRS | DMACTRL_GTS)) {
1036                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
1037                 gfar_write(&priv->regs->dmactrl, tempval);
1038
1039                 while (!(gfar_read(&priv->regs->ievent) &
1040                          (IEVENT_GRSC | IEVENT_GTSC)))
1041                         cpu_relax();
1042         }
1043 }
1044
1045 /* Halt the receive and transmit queues */
1046 void gfar_halt(struct net_device *dev)
1047 {
1048         struct gfar_private *priv = netdev_priv(dev);
1049         struct gfar __iomem *regs = priv->regs;
1050         u32 tempval;
1051
1052         gfar_halt_nodisable(dev);
1053
1054         /* Disable Rx and Tx */
1055         tempval = gfar_read(&regs->maccfg1);
1056         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
1057         gfar_write(&regs->maccfg1, tempval);
1058 }
1059
1060 void stop_gfar(struct net_device *dev)
1061 {
1062         struct gfar_private *priv = netdev_priv(dev);
1063         unsigned long flags;
1064
1065         phy_stop(priv->phydev);
1066
1067         /* Lock it down */
1068         spin_lock_irqsave(&priv->txlock, flags);
1069         spin_lock(&priv->rxlock);
1070
1071         gfar_halt(dev);
1072
1073         spin_unlock(&priv->rxlock);
1074         spin_unlock_irqrestore(&priv->txlock, flags);
1075
1076         /* Free the IRQs */
1077         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1078                 free_irq(priv->interruptError, dev);
1079                 free_irq(priv->interruptTransmit, dev);
1080                 free_irq(priv->interruptReceive, dev);
1081         } else {
1082                 free_irq(priv->interruptTransmit, dev);
1083         }
1084
1085         free_skb_resources(priv);
1086 }
1087
1088 /* If there are any tx skbs or rx skbs still around, free them.
1089  * Then free tx_skbuff and rx_skbuff */
1090 static void free_skb_resources(struct gfar_private *priv)
1091 {
1092         struct device *dev = &priv->ofdev->dev;
1093         struct rxbd8 *rxbdp;
1094         struct txbd8 *txbdp;
1095         int i, j;
1096
1097         /* Go through all the buffer descriptors and free their data buffers */
1098         txbdp = priv->tx_bd_base;
1099
1100         if (!priv->tx_skbuff)
1101                 goto skip_tx_skbuff;
1102
1103         for (i = 0; i < priv->tx_ring_size; i++) {
1104                 if (!priv->tx_skbuff[i])
1105                         continue;
1106
1107                 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
1108                                 txbdp->length, DMA_TO_DEVICE);
1109                 txbdp->lstatus = 0;
1110                 for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
1111                         txbdp++;
1112                         dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
1113                                         txbdp->length, DMA_TO_DEVICE);
1114                 }
1115                 txbdp++;
1116                 dev_kfree_skb_any(priv->tx_skbuff[i]);
1117                 priv->tx_skbuff[i] = NULL;
1118         }
1119
1120         kfree(priv->tx_skbuff);
1121 skip_tx_skbuff:
1122
1123         rxbdp = priv->rx_bd_base;
1124
1125         if (!priv->rx_skbuff)
1126                 goto skip_rx_skbuff;
1127
1128         for (i = 0; i < priv->rx_ring_size; i++) {
1129                 if (priv->rx_skbuff[i]) {
1130                         dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
1131                                          priv->rx_buffer_size,
1132                                         DMA_FROM_DEVICE);
1133                         dev_kfree_skb_any(priv->rx_skbuff[i]);
1134                         priv->rx_skbuff[i] = NULL;
1135                 }
1136
1137                 rxbdp->lstatus = 0;
1138                 rxbdp->bufPtr = 0;
1139                 rxbdp++;
1140         }
1141
1142         kfree(priv->rx_skbuff);
1143 skip_rx_skbuff:
1144
1145         dma_free_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
1146                                sizeof(*rxbdp) * priv->rx_ring_size,
1147                           priv->tx_bd_base, priv->tx_bd_dma_base);
1148 }
1149
1150 void gfar_start(struct net_device *dev)
1151 {
1152         struct gfar_private *priv = netdev_priv(dev);
1153         struct gfar __iomem *regs = priv->regs;
1154         u32 tempval;
1155
1156         /* Enable Rx and Tx in MACCFG1 */
1157         tempval = gfar_read(&regs->maccfg1);
1158         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
1159         gfar_write(&regs->maccfg1, tempval);
1160
1161         /* Initialize DMACTRL to have WWR and WOP */
1162         tempval = gfar_read(&priv->regs->dmactrl);
1163         tempval |= DMACTRL_INIT_SETTINGS;
1164         gfar_write(&priv->regs->dmactrl, tempval);
1165
1166         /* Make sure we aren't stopped */
1167         tempval = gfar_read(&priv->regs->dmactrl);
1168         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
1169         gfar_write(&priv->regs->dmactrl, tempval);
1170
1171         /* Clear THLT/RHLT, so that the DMA starts polling now */
1172         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
1173         gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
1174
1175         /* Unmask the interrupts we look for */
1176         gfar_write(&regs->imask, IMASK_DEFAULT);
1177
1178         dev->trans_start = jiffies;
1179 }
1180
1181 /* Bring the controller up and running */
1182 int startup_gfar(struct net_device *ndev)
1183 {
1184         struct gfar_private *priv = netdev_priv(ndev);
1185         struct gfar __iomem *regs = priv->regs;
1186         int err;
1187
1188         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1189
1190         err = gfar_alloc_skb_resources(ndev);
1191         if (err)
1192                 return err;
1193
1194         gfar_init_mac(ndev);
1195
1196         /* If the device has multiple interrupts, register for
1197          * them.  Otherwise, only register for the one */
1198         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1199                 /* Install our interrupt handlers for Error,
1200                  * Transmit, and Receive */
1201                 err = request_irq(priv->interruptError, gfar_error, 0,
1202                                   priv->int_name_er, ndev);
1203                 if (err) {
1204                         if (netif_msg_intr(priv))
1205                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1206                                        priv->interruptError);
1207                         goto err_irq_fail;
1208                 }
1209
1210                 err = request_irq(priv->interruptTransmit, gfar_transmit, 0,
1211                                   priv->int_name_tx, ndev);
1212                 if (err) {
1213                         if (netif_msg_intr(priv))
1214                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1215                                        priv->interruptTransmit);
1216                         goto tx_irq_fail;
1217                 }
1218
1219                 err = request_irq(priv->interruptReceive, gfar_receive, 0,
1220                                   priv->int_name_rx, ndev);
1221                 if (err) {
1222                         if (netif_msg_intr(priv))
1223                                 pr_err("%s: Can't get IRQ %d (receive0)\n",
1224                                        ndev->name, priv->interruptReceive);
1225                         goto rx_irq_fail;
1226                 }
1227         } else {
1228                 err = request_irq(priv->interruptTransmit, gfar_interrupt,
1229                                 0, priv->int_name_tx, ndev);
1230                 if (err) {
1231                         if (netif_msg_intr(priv))
1232                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1233                                        priv->interruptTransmit);
1234                         goto err_irq_fail;
1235                 }
1236         }
1237
1238         /* Start the controller */
1239         gfar_start(ndev);
1240
1241         phy_start(priv->phydev);
1242
1243         return 0;
1244
1245 rx_irq_fail:
1246         free_irq(priv->interruptTransmit, ndev);
1247 tx_irq_fail:
1248         free_irq(priv->interruptError, ndev);
1249 err_irq_fail:
1250         free_skb_resources(priv);
1251         return err;
1252 }
1253
1254 /* Called when something needs to use the ethernet device */
1255 /* Returns 0 for success. */
1256 static int gfar_enet_open(struct net_device *dev)
1257 {
1258         struct gfar_private *priv = netdev_priv(dev);
1259         int err;
1260
1261         napi_enable(&priv->napi);
1262
1263         skb_queue_head_init(&priv->rx_recycle);
1264
1265         /* Initialize a bunch of registers */
1266         init_registers(dev);
1267
1268         gfar_set_mac_address(dev);
1269
1270         err = init_phy(dev);
1271
1272         if(err) {
1273                 napi_disable(&priv->napi);
1274                 return err;
1275         }
1276
1277         err = startup_gfar(dev);
1278         if (err) {
1279                 napi_disable(&priv->napi);
1280                 return err;
1281         }
1282
1283         netif_start_queue(dev);
1284
1285         device_set_wakeup_enable(&dev->dev, priv->wol_en);
1286
1287         return err;
1288 }
1289
1290 static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1291 {
1292         struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1293
1294         memset(fcb, 0, GMAC_FCB_LEN);
1295
1296         return fcb;
1297 }
1298
1299 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
1300 {
1301         u8 flags = 0;
1302
1303         /* If we're here, it's a IP packet with a TCP or UDP
1304          * payload.  We set it to checksum, using a pseudo-header
1305          * we provide
1306          */
1307         flags = TXFCB_DEFAULT;
1308
1309         /* Tell the controller what the protocol is */
1310         /* And provide the already calculated phcs */
1311         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
1312                 flags |= TXFCB_UDP;
1313                 fcb->phcs = udp_hdr(skb)->check;
1314         } else
1315                 fcb->phcs = tcp_hdr(skb)->check;
1316
1317         /* l3os is the distance between the start of the
1318          * frame (skb->data) and the start of the IP hdr.
1319          * l4os is the distance between the start of the
1320          * l3 hdr and the l4 hdr */
1321         fcb->l3os = (u16)(skb_network_offset(skb) - GMAC_FCB_LEN);
1322         fcb->l4os = skb_network_header_len(skb);
1323
1324         fcb->flags = flags;
1325 }
1326
1327 void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
1328 {
1329         fcb->flags |= TXFCB_VLN;
1330         fcb->vlctl = vlan_tx_tag_get(skb);
1331 }
1332
1333 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
1334                                struct txbd8 *base, int ring_size)
1335 {
1336         struct txbd8 *new_bd = bdp + stride;
1337
1338         return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
1339 }
1340
1341 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
1342                 int ring_size)
1343 {
1344         return skip_txbd(bdp, 1, base, ring_size);
1345 }
1346
1347 /* This is called by the kernel when a frame is ready for transmission. */
1348 /* It is pointed to by the dev->hard_start_xmit function pointer */
1349 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1350 {
1351         struct gfar_private *priv = netdev_priv(dev);
1352         struct txfcb *fcb = NULL;
1353         struct txbd8 *txbdp, *txbdp_start, *base;
1354         u32 lstatus;
1355         int i;
1356         u32 bufaddr;
1357         unsigned long flags;
1358         unsigned int nr_frags, length;
1359
1360         base = priv->tx_bd_base;
1361
1362         /* make space for additional header when fcb is needed */
1363         if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
1364                         (priv->vlgrp && vlan_tx_tag_present(skb))) &&
1365                         (skb_headroom(skb) < GMAC_FCB_LEN)) {
1366                 struct sk_buff *skb_new;
1367
1368                 skb_new = skb_realloc_headroom(skb, GMAC_FCB_LEN);
1369                 if (!skb_new) {
1370                         dev->stats.tx_errors++;
1371                         kfree_skb(skb);
1372                         return NETDEV_TX_OK;
1373                 }
1374                 kfree_skb(skb);
1375                 skb = skb_new;
1376         }
1377
1378         /* total number of fragments in the SKB */
1379         nr_frags = skb_shinfo(skb)->nr_frags;
1380
1381         spin_lock_irqsave(&priv->txlock, flags);
1382
1383         /* check if there is space to queue this packet */
1384         if ((nr_frags+1) > priv->num_txbdfree) {
1385                 /* no space, stop the queue */
1386                 netif_stop_queue(dev);
1387                 dev->stats.tx_fifo_errors++;
1388                 spin_unlock_irqrestore(&priv->txlock, flags);
1389                 return NETDEV_TX_BUSY;
1390         }
1391
1392         /* Update transmit stats */
1393         dev->stats.tx_bytes += skb->len;
1394
1395         txbdp = txbdp_start = priv->cur_tx;
1396
1397         if (nr_frags == 0) {
1398                 lstatus = txbdp->lstatus | BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1399         } else {
1400                 /* Place the fragment addresses and lengths into the TxBDs */
1401                 for (i = 0; i < nr_frags; i++) {
1402                         /* Point at the next BD, wrapping as needed */
1403                         txbdp = next_txbd(txbdp, base, priv->tx_ring_size);
1404
1405                         length = skb_shinfo(skb)->frags[i].size;
1406
1407                         lstatus = txbdp->lstatus | length |
1408                                 BD_LFLAG(TXBD_READY);
1409
1410                         /* Handle the last BD specially */
1411                         if (i == nr_frags - 1)
1412                                 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1413
1414                         bufaddr = dma_map_page(&priv->ofdev->dev,
1415                                         skb_shinfo(skb)->frags[i].page,
1416                                         skb_shinfo(skb)->frags[i].page_offset,
1417                                         length,
1418                                         DMA_TO_DEVICE);
1419
1420                         /* set the TxBD length and buffer pointer */
1421                         txbdp->bufPtr = bufaddr;
1422                         txbdp->lstatus = lstatus;
1423                 }
1424
1425                 lstatus = txbdp_start->lstatus;
1426         }
1427
1428         /* Set up checksumming */
1429         if (CHECKSUM_PARTIAL == skb->ip_summed) {
1430                 fcb = gfar_add_fcb(skb);
1431                 lstatus |= BD_LFLAG(TXBD_TOE);
1432                 gfar_tx_checksum(skb, fcb);
1433         }
1434
1435         if (priv->vlgrp && vlan_tx_tag_present(skb)) {
1436                 if (unlikely(NULL == fcb)) {
1437                         fcb = gfar_add_fcb(skb);
1438                         lstatus |= BD_LFLAG(TXBD_TOE);
1439                 }
1440
1441                 gfar_tx_vlan(skb, fcb);
1442         }
1443
1444         /* setup the TxBD length and buffer pointer for the first BD */
1445         priv->tx_skbuff[priv->skb_curtx] = skb;
1446         txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1447                         skb_headlen(skb), DMA_TO_DEVICE);
1448
1449         lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
1450
1451         /*
1452          * The powerpc-specific eieio() is used, as wmb() has too strong
1453          * semantics (it requires synchronization between cacheable and
1454          * uncacheable mappings, which eieio doesn't provide and which we
1455          * don't need), thus requiring a more expensive sync instruction.  At
1456          * some point, the set of architecture-independent barrier functions
1457          * should be expanded to include weaker barriers.
1458          */
1459         eieio();
1460
1461         txbdp_start->lstatus = lstatus;
1462
1463         /* Update the current skb pointer to the next entry we will use
1464          * (wrapping if necessary) */
1465         priv->skb_curtx = (priv->skb_curtx + 1) &
1466                 TX_RING_MOD_MASK(priv->tx_ring_size);
1467
1468         priv->cur_tx = next_txbd(txbdp, base, priv->tx_ring_size);
1469
1470         /* reduce TxBD free count */
1471         priv->num_txbdfree -= (nr_frags + 1);
1472
1473         dev->trans_start = jiffies;
1474
1475         /* If the next BD still needs to be cleaned up, then the bds
1476            are full.  We need to tell the kernel to stop sending us stuff. */
1477         if (!priv->num_txbdfree) {
1478                 netif_stop_queue(dev);
1479
1480                 dev->stats.tx_fifo_errors++;
1481         }
1482
1483         /* Tell the DMA to go go go */
1484         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1485
1486         /* Unlock priv */
1487         spin_unlock_irqrestore(&priv->txlock, flags);
1488
1489         return NETDEV_TX_OK;
1490 }
1491
1492 /* Stops the kernel queue, and halts the controller */
1493 static int gfar_close(struct net_device *dev)
1494 {
1495         struct gfar_private *priv = netdev_priv(dev);
1496
1497         napi_disable(&priv->napi);
1498
1499         skb_queue_purge(&priv->rx_recycle);
1500         cancel_work_sync(&priv->reset_task);
1501         stop_gfar(dev);
1502
1503         /* Disconnect from the PHY */
1504         phy_disconnect(priv->phydev);
1505         priv->phydev = NULL;
1506
1507         netif_stop_queue(dev);
1508
1509         return 0;
1510 }
1511
1512 /* Changes the mac address if the controller is not running. */
1513 static int gfar_set_mac_address(struct net_device *dev)
1514 {
1515         gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1516
1517         return 0;
1518 }
1519
1520
1521 /* Enables and disables VLAN insertion/extraction */
1522 static void gfar_vlan_rx_register(struct net_device *dev,
1523                 struct vlan_group *grp)
1524 {
1525         struct gfar_private *priv = netdev_priv(dev);
1526         unsigned long flags;
1527         u32 tempval;
1528
1529         spin_lock_irqsave(&priv->rxlock, flags);
1530
1531         priv->vlgrp = grp;
1532
1533         if (grp) {
1534                 /* Enable VLAN tag insertion */
1535                 tempval = gfar_read(&priv->regs->tctrl);
1536                 tempval |= TCTRL_VLINS;
1537
1538                 gfar_write(&priv->regs->tctrl, tempval);
1539
1540                 /* Enable VLAN tag extraction */
1541                 tempval = gfar_read(&priv->regs->rctrl);
1542                 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1543                 gfar_write(&priv->regs->rctrl, tempval);
1544         } else {
1545                 /* Disable VLAN tag insertion */
1546                 tempval = gfar_read(&priv->regs->tctrl);
1547                 tempval &= ~TCTRL_VLINS;
1548                 gfar_write(&priv->regs->tctrl, tempval);
1549
1550                 /* Disable VLAN tag extraction */
1551                 tempval = gfar_read(&priv->regs->rctrl);
1552                 tempval &= ~RCTRL_VLEX;
1553                 /* If parse is no longer required, then disable parser */
1554                 if (tempval & RCTRL_REQ_PARSER)
1555                         tempval |= RCTRL_PRSDEP_INIT;
1556                 else
1557                         tempval &= ~RCTRL_PRSDEP_INIT;
1558                 gfar_write(&priv->regs->rctrl, tempval);
1559         }
1560
1561         gfar_change_mtu(dev, dev->mtu);
1562
1563         spin_unlock_irqrestore(&priv->rxlock, flags);
1564 }
1565
1566 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1567 {
1568         int tempsize, tempval;
1569         struct gfar_private *priv = netdev_priv(dev);
1570         int oldsize = priv->rx_buffer_size;
1571         int frame_size = new_mtu + ETH_HLEN;
1572
1573         if (priv->vlgrp)
1574                 frame_size += VLAN_HLEN;
1575
1576         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1577                 if (netif_msg_drv(priv))
1578                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1579                                         dev->name);
1580                 return -EINVAL;
1581         }
1582
1583         if (gfar_uses_fcb(priv))
1584                 frame_size += GMAC_FCB_LEN;
1585
1586         frame_size += priv->padding;
1587
1588         tempsize =
1589             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1590             INCREMENTAL_BUFFER_SIZE;
1591
1592         /* Only stop and start the controller if it isn't already
1593          * stopped, and we changed something */
1594         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1595                 stop_gfar(dev);
1596
1597         priv->rx_buffer_size = tempsize;
1598
1599         dev->mtu = new_mtu;
1600
1601         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1602         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1603
1604         /* If the mtu is larger than the max size for standard
1605          * ethernet frames (ie, a jumbo frame), then set maccfg2
1606          * to allow huge frames, and to check the length */
1607         tempval = gfar_read(&priv->regs->maccfg2);
1608
1609         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1610                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1611         else
1612                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1613
1614         gfar_write(&priv->regs->maccfg2, tempval);
1615
1616         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1617                 startup_gfar(dev);
1618
1619         return 0;
1620 }
1621
1622 /* gfar_reset_task gets scheduled when a packet has not been
1623  * transmitted after a set amount of time.
1624  * For now, assume that clearing out all the structures, and
1625  * starting over will fix the problem.
1626  */
1627 static void gfar_reset_task(struct work_struct *work)
1628 {
1629         struct gfar_private *priv = container_of(work, struct gfar_private,
1630                         reset_task);
1631         struct net_device *dev = priv->ndev;
1632
1633         if (dev->flags & IFF_UP) {
1634                 netif_stop_queue(dev);
1635                 stop_gfar(dev);
1636                 startup_gfar(dev);
1637                 netif_start_queue(dev);
1638         }
1639
1640         netif_tx_schedule_all(dev);
1641 }
1642
1643 static void gfar_timeout(struct net_device *dev)
1644 {
1645         struct gfar_private *priv = netdev_priv(dev);
1646
1647         dev->stats.tx_errors++;
1648         schedule_work(&priv->reset_task);
1649 }
1650
1651 /* Interrupt Handler for Transmit complete */
1652 static int gfar_clean_tx_ring(struct net_device *dev)
1653 {
1654         struct gfar_private *priv = netdev_priv(dev);
1655         struct txbd8 *bdp;
1656         struct txbd8 *lbdp = NULL;
1657         struct txbd8 *base = priv->tx_bd_base;
1658         struct sk_buff *skb;
1659         int skb_dirtytx;
1660         int tx_ring_size = priv->tx_ring_size;
1661         int frags = 0;
1662         int i;
1663         int howmany = 0;
1664         u32 lstatus;
1665
1666         bdp = priv->dirty_tx;
1667         skb_dirtytx = priv->skb_dirtytx;
1668
1669         while ((skb = priv->tx_skbuff[skb_dirtytx])) {
1670                 frags = skb_shinfo(skb)->nr_frags;
1671                 lbdp = skip_txbd(bdp, frags, base, tx_ring_size);
1672
1673                 lstatus = lbdp->lstatus;
1674
1675                 /* Only clean completed frames */
1676                 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
1677                                 (lstatus & BD_LENGTH_MASK))
1678                         break;
1679
1680                 dma_unmap_single(&priv->ofdev->dev,
1681                                 bdp->bufPtr,
1682                                 bdp->length,
1683                                 DMA_TO_DEVICE);
1684
1685                 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1686                 bdp = next_txbd(bdp, base, tx_ring_size);
1687
1688                 for (i = 0; i < frags; i++) {
1689                         dma_unmap_page(&priv->ofdev->dev,
1690                                         bdp->bufPtr,
1691                                         bdp->length,
1692                                         DMA_TO_DEVICE);
1693                         bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1694                         bdp = next_txbd(bdp, base, tx_ring_size);
1695                 }
1696
1697                 /*
1698                  * If there's room in the queue (limit it to rx_buffer_size)
1699                  * we add this skb back into the pool, if it's the right size
1700                  */
1701                 if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
1702                                 skb_recycle_check(skb, priv->rx_buffer_size +
1703                                         RXBUF_ALIGNMENT))
1704                         __skb_queue_head(&priv->rx_recycle, skb);
1705                 else
1706                         dev_kfree_skb_any(skb);
1707
1708                 priv->tx_skbuff[skb_dirtytx] = NULL;
1709
1710                 skb_dirtytx = (skb_dirtytx + 1) &
1711                         TX_RING_MOD_MASK(tx_ring_size);
1712
1713                 howmany++;
1714                 priv->num_txbdfree += frags + 1;
1715         }
1716
1717         /* If we freed a buffer, we can restart transmission, if necessary */
1718         if (netif_queue_stopped(dev) && priv->num_txbdfree)
1719                 netif_wake_queue(dev);
1720
1721         /* Update dirty indicators */
1722         priv->skb_dirtytx = skb_dirtytx;
1723         priv->dirty_tx = bdp;
1724
1725         dev->stats.tx_packets += howmany;
1726
1727         return howmany;
1728 }
1729
1730 static void gfar_schedule_cleanup(struct net_device *dev)
1731 {
1732         struct gfar_private *priv = netdev_priv(dev);
1733         unsigned long flags;
1734
1735         spin_lock_irqsave(&priv->txlock, flags);
1736         spin_lock(&priv->rxlock);
1737
1738         if (napi_schedule_prep(&priv->napi)) {
1739                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
1740                 __napi_schedule(&priv->napi);
1741         } else {
1742                 /*
1743                  * Clear IEVENT, so interrupts aren't called again
1744                  * because of the packets that have already arrived.
1745                  */
1746                 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1747         }
1748
1749         spin_unlock(&priv->rxlock);
1750         spin_unlock_irqrestore(&priv->txlock, flags);
1751 }
1752
1753 /* Interrupt Handler for Transmit complete */
1754 static irqreturn_t gfar_transmit(int irq, void *dev_id)
1755 {
1756         gfar_schedule_cleanup((struct net_device *)dev_id);
1757         return IRQ_HANDLED;
1758 }
1759
1760 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1761                 struct sk_buff *skb)
1762 {
1763         struct gfar_private *priv = netdev_priv(dev);
1764         dma_addr_t buf;
1765
1766         buf = dma_map_single(&priv->ofdev->dev, skb->data,
1767                              priv->rx_buffer_size, DMA_FROM_DEVICE);
1768         gfar_init_rxbdp(dev, bdp, buf);
1769 }
1770
1771
1772 struct sk_buff * gfar_new_skb(struct net_device *dev)
1773 {
1774         unsigned int alignamount;
1775         struct gfar_private *priv = netdev_priv(dev);
1776         struct sk_buff *skb = NULL;
1777
1778         skb = __skb_dequeue(&priv->rx_recycle);
1779         if (!skb)
1780                 skb = netdev_alloc_skb(dev,
1781                                 priv->rx_buffer_size + RXBUF_ALIGNMENT);
1782
1783         if (!skb)
1784                 return NULL;
1785
1786         alignamount = RXBUF_ALIGNMENT -
1787                 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1));
1788
1789         /* We need the data buffer to be aligned properly.  We will reserve
1790          * as many bytes as needed to align the data properly
1791          */
1792         skb_reserve(skb, alignamount);
1793
1794         return skb;
1795 }
1796
1797 static inline void count_errors(unsigned short status, struct net_device *dev)
1798 {
1799         struct gfar_private *priv = netdev_priv(dev);
1800         struct net_device_stats *stats = &dev->stats;
1801         struct gfar_extra_stats *estats = &priv->extra_stats;
1802
1803         /* If the packet was truncated, none of the other errors
1804          * matter */
1805         if (status & RXBD_TRUNCATED) {
1806                 stats->rx_length_errors++;
1807
1808                 estats->rx_trunc++;
1809
1810                 return;
1811         }
1812         /* Count the errors, if there were any */
1813         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1814                 stats->rx_length_errors++;
1815
1816                 if (status & RXBD_LARGE)
1817                         estats->rx_large++;
1818                 else
1819                         estats->rx_short++;
1820         }
1821         if (status & RXBD_NONOCTET) {
1822                 stats->rx_frame_errors++;
1823                 estats->rx_nonoctet++;
1824         }
1825         if (status & RXBD_CRCERR) {
1826                 estats->rx_crcerr++;
1827                 stats->rx_crc_errors++;
1828         }
1829         if (status & RXBD_OVERRUN) {
1830                 estats->rx_overrun++;
1831                 stats->rx_crc_errors++;
1832         }
1833 }
1834
1835 irqreturn_t gfar_receive(int irq, void *dev_id)
1836 {
1837         gfar_schedule_cleanup((struct net_device *)dev_id);
1838         return IRQ_HANDLED;
1839 }
1840
1841 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1842 {
1843         /* If valid headers were found, and valid sums
1844          * were verified, then we tell the kernel that no
1845          * checksumming is necessary.  Otherwise, it is */
1846         if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
1847                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1848         else
1849                 skb->ip_summed = CHECKSUM_NONE;
1850 }
1851
1852
1853 /* gfar_process_frame() -- handle one incoming packet if skb
1854  * isn't NULL.  */
1855 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1856                               int amount_pull)
1857 {
1858         struct gfar_private *priv = netdev_priv(dev);
1859         struct rxfcb *fcb = NULL;
1860
1861         int ret;
1862
1863         /* fcb is at the beginning if exists */
1864         fcb = (struct rxfcb *)skb->data;
1865
1866         /* Remove the FCB from the skb */
1867         /* Remove the padded bytes, if there are any */
1868         if (amount_pull)
1869                 skb_pull(skb, amount_pull);
1870
1871         if (priv->rx_csum_enable)
1872                 gfar_rx_checksum(skb, fcb);
1873
1874         /* Tell the skb what kind of packet this is */
1875         skb->protocol = eth_type_trans(skb, dev);
1876
1877         /* Send the packet up the stack */
1878         if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN)))
1879                 ret = vlan_hwaccel_receive_skb(skb, priv->vlgrp, fcb->vlctl);
1880         else
1881                 ret = netif_receive_skb(skb);
1882
1883         if (NET_RX_DROP == ret)
1884                 priv->extra_stats.kernel_dropped++;
1885
1886         return 0;
1887 }
1888
1889 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1890  *   until the budget/quota has been reached. Returns the number
1891  *   of frames handled
1892  */
1893 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1894 {
1895         struct rxbd8 *bdp, *base;
1896         struct sk_buff *skb;
1897         int pkt_len;
1898         int amount_pull;
1899         int howmany = 0;
1900         struct gfar_private *priv = netdev_priv(dev);
1901
1902         /* Get the first full descriptor */
1903         bdp = priv->cur_rx;
1904         base = priv->rx_bd_base;
1905
1906         amount_pull = (gfar_uses_fcb(priv) ? GMAC_FCB_LEN : 0) +
1907                 priv->padding;
1908
1909         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1910                 struct sk_buff *newskb;
1911                 rmb();
1912
1913                 /* Add another skb for the future */
1914                 newskb = gfar_new_skb(dev);
1915
1916                 skb = priv->rx_skbuff[priv->skb_currx];
1917
1918                 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
1919                                 priv->rx_buffer_size, DMA_FROM_DEVICE);
1920
1921                 /* We drop the frame if we failed to allocate a new buffer */
1922                 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1923                                  bdp->status & RXBD_ERR)) {
1924                         count_errors(bdp->status, dev);
1925
1926                         if (unlikely(!newskb))
1927                                 newskb = skb;
1928                         else if (skb) {
1929                                 /*
1930                                  * We need to reset ->data to what it
1931                                  * was before gfar_new_skb() re-aligned
1932                                  * it to an RXBUF_ALIGNMENT boundary
1933                                  * before we put the skb back on the
1934                                  * recycle list.
1935                                  */
1936                                 skb->data = skb->head + NET_SKB_PAD;
1937                                 __skb_queue_head(&priv->rx_recycle, skb);
1938                         }
1939                 } else {
1940                         /* Increment the number of packets */
1941                         dev->stats.rx_packets++;
1942                         howmany++;
1943
1944                         if (likely(skb)) {
1945                                 pkt_len = bdp->length - ETH_FCS_LEN;
1946                                 /* Remove the FCS from the packet length */
1947                                 skb_put(skb, pkt_len);
1948                                 dev->stats.rx_bytes += pkt_len;
1949
1950                                 if (in_irq() || irqs_disabled())
1951                                         printk("Interrupt problem!\n");
1952                                 gfar_process_frame(dev, skb, amount_pull);
1953
1954                         } else {
1955                                 if (netif_msg_rx_err(priv))
1956                                         printk(KERN_WARNING
1957                                                "%s: Missing skb!\n", dev->name);
1958                                 dev->stats.rx_dropped++;
1959                                 priv->extra_stats.rx_skbmissing++;
1960                         }
1961
1962                 }
1963
1964                 priv->rx_skbuff[priv->skb_currx] = newskb;
1965
1966                 /* Setup the new bdp */
1967                 gfar_new_rxbdp(dev, bdp, newskb);
1968
1969                 /* Update to the next pointer */
1970                 bdp = next_bd(bdp, base, priv->rx_ring_size);
1971
1972                 /* update to point at the next skb */
1973                 priv->skb_currx =
1974                     (priv->skb_currx + 1) &
1975                     RX_RING_MOD_MASK(priv->rx_ring_size);
1976         }
1977
1978         /* Update the current rxbd pointer to be the next one */
1979         priv->cur_rx = bdp;
1980
1981         return howmany;
1982 }
1983
1984 static int gfar_poll(struct napi_struct *napi, int budget)
1985 {
1986         struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
1987         struct net_device *dev = priv->ndev;
1988         int tx_cleaned = 0;
1989         int rx_cleaned = 0;
1990         unsigned long flags;
1991
1992         /* Clear IEVENT, so interrupts aren't called again
1993          * because of the packets that have already arrived */
1994         gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1995
1996         /* If we fail to get the lock, don't bother with the TX BDs */
1997         if (spin_trylock_irqsave(&priv->txlock, flags)) {
1998                 tx_cleaned = gfar_clean_tx_ring(dev);
1999                 spin_unlock_irqrestore(&priv->txlock, flags);
2000         }
2001
2002         rx_cleaned = gfar_clean_rx_ring(dev, budget);
2003
2004         if (tx_cleaned)
2005                 return budget;
2006
2007         if (rx_cleaned < budget) {
2008                 napi_complete(napi);
2009
2010                 /* Clear the halt bit in RSTAT */
2011                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
2012
2013                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
2014
2015                 /* If we are coalescing interrupts, update the timer */
2016                 /* Otherwise, clear it */
2017                 if (likely(priv->rxcoalescing)) {
2018                         gfar_write(&priv->regs->rxic, 0);
2019                         gfar_write(&priv->regs->rxic, priv->rxic);
2020                 }
2021                 if (likely(priv->txcoalescing)) {
2022                         gfar_write(&priv->regs->txic, 0);
2023                         gfar_write(&priv->regs->txic, priv->txic);
2024                 }
2025         }
2026
2027         return rx_cleaned;
2028 }
2029
2030 #ifdef CONFIG_NET_POLL_CONTROLLER
2031 /*
2032  * Polling 'interrupt' - used by things like netconsole to send skbs
2033  * without having to re-enable interrupts. It's not called while
2034  * the interrupt routine is executing.
2035  */
2036 static void gfar_netpoll(struct net_device *dev)
2037 {
2038         struct gfar_private *priv = netdev_priv(dev);
2039
2040         /* If the device has multiple interrupts, run tx/rx */
2041         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
2042                 disable_irq(priv->interruptTransmit);
2043                 disable_irq(priv->interruptReceive);
2044                 disable_irq(priv->interruptError);
2045                 gfar_interrupt(priv->interruptTransmit, dev);
2046                 enable_irq(priv->interruptError);
2047                 enable_irq(priv->interruptReceive);
2048                 enable_irq(priv->interruptTransmit);
2049         } else {
2050                 disable_irq(priv->interruptTransmit);
2051                 gfar_interrupt(priv->interruptTransmit, dev);
2052                 enable_irq(priv->interruptTransmit);
2053         }
2054 }
2055 #endif
2056
2057 /* The interrupt handler for devices with one interrupt */
2058 static irqreturn_t gfar_interrupt(int irq, void *dev_id)
2059 {
2060         struct net_device *dev = dev_id;
2061         struct gfar_private *priv = netdev_priv(dev);
2062
2063         /* Save ievent for future reference */
2064         u32 events = gfar_read(&priv->regs->ievent);
2065
2066         /* Check for reception */
2067         if (events & IEVENT_RX_MASK)
2068                 gfar_receive(irq, dev_id);
2069
2070         /* Check for transmit completion */
2071         if (events & IEVENT_TX_MASK)
2072                 gfar_transmit(irq, dev_id);
2073
2074         /* Check for errors */
2075         if (events & IEVENT_ERR_MASK)
2076                 gfar_error(irq, dev_id);
2077
2078         return IRQ_HANDLED;
2079 }
2080
2081 /* Called every time the controller might need to be made
2082  * aware of new link state.  The PHY code conveys this
2083  * information through variables in the phydev structure, and this
2084  * function converts those variables into the appropriate
2085  * register values, and can bring down the device if needed.
2086  */
2087 static void adjust_link(struct net_device *dev)
2088 {
2089         struct gfar_private *priv = netdev_priv(dev);
2090         struct gfar __iomem *regs = priv->regs;
2091         unsigned long flags;
2092         struct phy_device *phydev = priv->phydev;
2093         int new_state = 0;
2094
2095         spin_lock_irqsave(&priv->txlock, flags);
2096         if (phydev->link) {
2097                 u32 tempval = gfar_read(&regs->maccfg2);
2098                 u32 ecntrl = gfar_read(&regs->ecntrl);
2099
2100                 /* Now we make sure that we can be in full duplex mode.
2101                  * If not, we operate in half-duplex mode. */
2102                 if (phydev->duplex != priv->oldduplex) {
2103                         new_state = 1;
2104                         if (!(phydev->duplex))
2105                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
2106                         else
2107                                 tempval |= MACCFG2_FULL_DUPLEX;
2108
2109                         priv->oldduplex = phydev->duplex;
2110                 }
2111
2112                 if (phydev->speed != priv->oldspeed) {
2113                         new_state = 1;
2114                         switch (phydev->speed) {
2115                         case 1000:
2116                                 tempval =
2117                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
2118
2119                                 ecntrl &= ~(ECNTRL_R100);
2120                                 break;
2121                         case 100:
2122                         case 10:
2123                                 tempval =
2124                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
2125
2126                                 /* Reduced mode distinguishes
2127                                  * between 10 and 100 */
2128                                 if (phydev->speed == SPEED_100)
2129                                         ecntrl |= ECNTRL_R100;
2130                                 else
2131                                         ecntrl &= ~(ECNTRL_R100);
2132                                 break;
2133                         default:
2134                                 if (netif_msg_link(priv))
2135                                         printk(KERN_WARNING
2136                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
2137                                                 dev->name, phydev->speed);
2138                                 break;
2139                         }
2140
2141                         priv->oldspeed = phydev->speed;
2142                 }
2143
2144                 gfar_write(&regs->maccfg2, tempval);
2145                 gfar_write(&regs->ecntrl, ecntrl);
2146
2147                 if (!priv->oldlink) {
2148                         new_state = 1;
2149                         priv->oldlink = 1;
2150                 }
2151         } else if (priv->oldlink) {
2152                 new_state = 1;
2153                 priv->oldlink = 0;
2154                 priv->oldspeed = 0;
2155                 priv->oldduplex = -1;
2156         }
2157
2158         if (new_state && netif_msg_link(priv))
2159                 phy_print_status(phydev);
2160
2161         spin_unlock_irqrestore(&priv->txlock, flags);
2162 }
2163
2164 /* Update the hash table based on the current list of multicast
2165  * addresses we subscribe to.  Also, change the promiscuity of
2166  * the device based on the flags (this function is called
2167  * whenever dev->flags is changed */
2168 static void gfar_set_multi(struct net_device *dev)
2169 {
2170         struct dev_mc_list *mc_ptr;
2171         struct gfar_private *priv = netdev_priv(dev);
2172         struct gfar __iomem *regs = priv->regs;
2173         u32 tempval;
2174
2175         if(dev->flags & IFF_PROMISC) {
2176                 /* Set RCTRL to PROM */
2177                 tempval = gfar_read(&regs->rctrl);
2178                 tempval |= RCTRL_PROM;
2179                 gfar_write(&regs->rctrl, tempval);
2180         } else {
2181                 /* Set RCTRL to not PROM */
2182                 tempval = gfar_read(&regs->rctrl);
2183                 tempval &= ~(RCTRL_PROM);
2184                 gfar_write(&regs->rctrl, tempval);
2185         }
2186
2187         if(dev->flags & IFF_ALLMULTI) {
2188                 /* Set the hash to rx all multicast frames */
2189                 gfar_write(&regs->igaddr0, 0xffffffff);
2190                 gfar_write(&regs->igaddr1, 0xffffffff);
2191                 gfar_write(&regs->igaddr2, 0xffffffff);
2192                 gfar_write(&regs->igaddr3, 0xffffffff);
2193                 gfar_write(&regs->igaddr4, 0xffffffff);
2194                 gfar_write(&regs->igaddr5, 0xffffffff);
2195                 gfar_write(&regs->igaddr6, 0xffffffff);
2196                 gfar_write(&regs->igaddr7, 0xffffffff);
2197                 gfar_write(&regs->gaddr0, 0xffffffff);
2198                 gfar_write(&regs->gaddr1, 0xffffffff);
2199                 gfar_write(&regs->gaddr2, 0xffffffff);
2200                 gfar_write(&regs->gaddr3, 0xffffffff);
2201                 gfar_write(&regs->gaddr4, 0xffffffff);
2202                 gfar_write(&regs->gaddr5, 0xffffffff);
2203                 gfar_write(&regs->gaddr6, 0xffffffff);
2204                 gfar_write(&regs->gaddr7, 0xffffffff);
2205         } else {
2206                 int em_num;
2207                 int idx;
2208
2209                 /* zero out the hash */
2210                 gfar_write(&regs->igaddr0, 0x0);
2211                 gfar_write(&regs->igaddr1, 0x0);
2212                 gfar_write(&regs->igaddr2, 0x0);
2213                 gfar_write(&regs->igaddr3, 0x0);
2214                 gfar_write(&regs->igaddr4, 0x0);
2215                 gfar_write(&regs->igaddr5, 0x0);
2216                 gfar_write(&regs->igaddr6, 0x0);
2217                 gfar_write(&regs->igaddr7, 0x0);
2218                 gfar_write(&regs->gaddr0, 0x0);
2219                 gfar_write(&regs->gaddr1, 0x0);
2220                 gfar_write(&regs->gaddr2, 0x0);
2221                 gfar_write(&regs->gaddr3, 0x0);
2222                 gfar_write(&regs->gaddr4, 0x0);
2223                 gfar_write(&regs->gaddr5, 0x0);
2224                 gfar_write(&regs->gaddr6, 0x0);
2225                 gfar_write(&regs->gaddr7, 0x0);
2226
2227                 /* If we have extended hash tables, we need to
2228                  * clear the exact match registers to prepare for
2229                  * setting them */
2230                 if (priv->extended_hash) {
2231                         em_num = GFAR_EM_NUM + 1;
2232                         gfar_clear_exact_match(dev);
2233                         idx = 1;
2234                 } else {
2235                         idx = 0;
2236                         em_num = 0;
2237                 }
2238
2239                 if(dev->mc_count == 0)
2240                         return;
2241
2242                 /* Parse the list, and set the appropriate bits */
2243                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
2244                         if (idx < em_num) {
2245                                 gfar_set_mac_for_addr(dev, idx,
2246                                                 mc_ptr->dmi_addr);
2247                                 idx++;
2248                         } else
2249                                 gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
2250                 }
2251         }
2252
2253         return;
2254 }
2255
2256
2257 /* Clears each of the exact match registers to zero, so they
2258  * don't interfere with normal reception */
2259 static void gfar_clear_exact_match(struct net_device *dev)
2260 {
2261         int idx;
2262         u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0};
2263
2264         for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
2265                 gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr);
2266 }
2267
2268 /* Set the appropriate hash bit for the given addr */
2269 /* The algorithm works like so:
2270  * 1) Take the Destination Address (ie the multicast address), and
2271  * do a CRC on it (little endian), and reverse the bits of the
2272  * result.
2273  * 2) Use the 8 most significant bits as a hash into a 256-entry
2274  * table.  The table is controlled through 8 32-bit registers:
2275  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
2276  * gaddr7.  This means that the 3 most significant bits in the
2277  * hash index which gaddr register to use, and the 5 other bits
2278  * indicate which bit (assuming an IBM numbering scheme, which
2279  * for PowerPC (tm) is usually the case) in the register holds
2280  * the entry. */
2281 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2282 {
2283         u32 tempval;
2284         struct gfar_private *priv = netdev_priv(dev);
2285         u32 result = ether_crc(MAC_ADDR_LEN, addr);
2286         int width = priv->hash_width;
2287         u8 whichbit = (result >> (32 - width)) & 0x1f;
2288         u8 whichreg = result >> (32 - width + 5);
2289         u32 value = (1 << (31-whichbit));
2290
2291         tempval = gfar_read(priv->hash_regs[whichreg]);
2292         tempval |= value;
2293         gfar_write(priv->hash_regs[whichreg], tempval);
2294
2295         return;
2296 }
2297
2298
2299 /* There are multiple MAC Address register pairs on some controllers
2300  * This function sets the numth pair to a given address
2301  */
2302 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2303 {
2304         struct gfar_private *priv = netdev_priv(dev);
2305         int idx;
2306         char tmpbuf[MAC_ADDR_LEN];
2307         u32 tempval;
2308         u32 __iomem *macptr = &priv->regs->macstnaddr1;
2309
2310         macptr += num*2;
2311
2312         /* Now copy it into the mac registers backwards, cuz */
2313         /* little endian is silly */
2314         for (idx = 0; idx < MAC_ADDR_LEN; idx++)
2315                 tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx];
2316
2317         gfar_write(macptr, *((u32 *) (tmpbuf)));
2318
2319         tempval = *((u32 *) (tmpbuf + 4));
2320
2321         gfar_write(macptr+1, tempval);
2322 }
2323
2324 /* GFAR error interrupt handler */
2325 static irqreturn_t gfar_error(int irq, void *dev_id)
2326 {
2327         struct net_device *dev = dev_id;
2328         struct gfar_private *priv = netdev_priv(dev);
2329
2330         /* Save ievent for future reference */
2331         u32 events = gfar_read(&priv->regs->ievent);
2332
2333         /* Clear IEVENT */
2334         gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK);
2335
2336         /* Magic Packet is not an error. */
2337         if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
2338             (events & IEVENT_MAG))
2339                 events &= ~IEVENT_MAG;
2340
2341         /* Hmm... */
2342         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2343                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2344                        dev->name, events, gfar_read(&priv->regs->imask));
2345
2346         /* Update the error counters */
2347         if (events & IEVENT_TXE) {
2348                 dev->stats.tx_errors++;
2349
2350                 if (events & IEVENT_LC)
2351                         dev->stats.tx_window_errors++;
2352                 if (events & IEVENT_CRL)
2353                         dev->stats.tx_aborted_errors++;
2354                 if (events & IEVENT_XFUN) {
2355                         if (netif_msg_tx_err(priv))
2356                                 printk(KERN_DEBUG "%s: TX FIFO underrun, "
2357                                        "packet dropped.\n", dev->name);
2358                         dev->stats.tx_dropped++;
2359                         priv->extra_stats.tx_underrun++;
2360
2361                         /* Reactivate the Tx Queues */
2362                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
2363                 }
2364                 if (netif_msg_tx_err(priv))
2365                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
2366         }
2367         if (events & IEVENT_BSY) {
2368                 dev->stats.rx_errors++;
2369                 priv->extra_stats.rx_bsy++;
2370
2371                 gfar_receive(irq, dev_id);
2372
2373                 if (netif_msg_rx_err(priv))
2374                         printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2375                                dev->name, gfar_read(&priv->regs->rstat));
2376         }
2377         if (events & IEVENT_BABR) {
2378                 dev->stats.rx_errors++;
2379                 priv->extra_stats.rx_babr++;
2380
2381                 if (netif_msg_rx_err(priv))
2382                         printk(KERN_DEBUG "%s: babbling RX error\n", dev->name);
2383         }
2384         if (events & IEVENT_EBERR) {
2385                 priv->extra_stats.eberr++;
2386                 if (netif_msg_rx_err(priv))
2387                         printk(KERN_DEBUG "%s: bus error\n", dev->name);
2388         }
2389         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
2390                 printk(KERN_DEBUG "%s: control frame\n", dev->name);
2391
2392         if (events & IEVENT_BABT) {
2393                 priv->extra_stats.tx_babt++;
2394                 if (netif_msg_tx_err(priv))
2395                         printk(KERN_DEBUG "%s: babbling TX error\n", dev->name);
2396         }
2397         return IRQ_HANDLED;
2398 }
2399
2400 static struct of_device_id gfar_match[] =
2401 {
2402         {
2403                 .type = "network",
2404                 .compatible = "gianfar",
2405         },
2406         {},
2407 };
2408 MODULE_DEVICE_TABLE(of, gfar_match);
2409
2410 /* Structure for a device driver */
2411 static struct of_platform_driver gfar_driver = {
2412         .name = "fsl-gianfar",
2413         .match_table = gfar_match,
2414
2415         .probe = gfar_probe,
2416         .remove = gfar_remove,
2417         .suspend = gfar_legacy_suspend,
2418         .resume = gfar_legacy_resume,
2419         .driver.pm = GFAR_PM_OPS,
2420 };
2421
2422 static int __init gfar_init(void)
2423 {
2424         return of_register_platform_driver(&gfar_driver);
2425 }
2426
2427 static void __exit gfar_exit(void)
2428 {
2429         of_unregister_platform_driver(&gfar_driver);
2430 }
2431
2432 module_init(gfar_init);
2433 module_exit(gfar_exit);
2434