gianfar: remove unused DECLARE_MAC_BUF
[linux-2.6.git] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * This driver is designed for the non-CPM ethernet controllers
6  * on the 85xx and 83xx family of integrated processors
7  * Based on 8260_io/fcc_enet.c
8  *
9  * Author: Andy Fleming
10  * Maintainer: Kumar Gala
11  *
12  * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13  * Copyright (c) 2007 MontaVista Software, Inc.
14  *
15  * This program is free software; you can redistribute  it and/or modify it
16  * under  the terms of  the GNU General  Public License as published by the
17  * Free Software Foundation;  either version 2 of the  License, or (at your
18  * option) any later version.
19  *
20  *  Gianfar:  AKA Lambda Draconis, "Dragon"
21  *  RA 11 31 24.2
22  *  Dec +69 19 52
23  *  V 3.84
24  *  B-V +1.62
25  *
26  *  Theory of operation
27  *
28  *  The driver is initialized through of_device. Configuration information
29  *  is therefore conveyed through an OF-style device tree.
30  *
31  *  The Gianfar Ethernet Controller uses a ring of buffer
32  *  descriptors.  The beginning is indicated by a register
33  *  pointing to the physical address of the start of the ring.
34  *  The end is determined by a "wrap" bit being set in the
35  *  last descriptor of the ring.
36  *
37  *  When a packet is received, the RXF bit in the
38  *  IEVENT register is set, triggering an interrupt when the
39  *  corresponding bit in the IMASK register is also set (if
40  *  interrupt coalescing is active, then the interrupt may not
41  *  happen immediately, but will wait until either a set number
42  *  of frames or amount of time have passed).  In NAPI, the
43  *  interrupt handler will signal there is work to be done, and
44  *  exit. This method will start at the last known empty
45  *  descriptor, and process every subsequent descriptor until there
46  *  are none left with data (NAPI will stop after a set number of
47  *  packets to give time to other tasks, but will eventually
48  *  process all the packets).  The data arrives inside a
49  *  pre-allocated skb, and so after the skb is passed up to the
50  *  stack, a new skb must be allocated, and the address field in
51  *  the buffer descriptor must be updated to indicate this new
52  *  skb.
53  *
54  *  When the kernel requests that a packet be transmitted, the
55  *  driver starts where it left off last time, and points the
56  *  descriptor at the buffer which was passed in.  The driver
57  *  then informs the DMA engine that there are packets ready to
58  *  be transmitted.  Once the controller is finished transmitting
59  *  the packet, an interrupt may be triggered (under the same
60  *  conditions as for reception, but depending on the TXF bit).
61  *  The driver then cleans up the buffer.
62  */
63
64 #include <linux/kernel.h>
65 #include <linux/string.h>
66 #include <linux/errno.h>
67 #include <linux/unistd.h>
68 #include <linux/slab.h>
69 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #include <linux/if_vlan.h>
76 #include <linux/spinlock.h>
77 #include <linux/mm.h>
78 #include <linux/of_mdio.h>
79 #include <linux/of_platform.h>
80 #include <linux/ip.h>
81 #include <linux/tcp.h>
82 #include <linux/udp.h>
83 #include <linux/in.h>
84
85 #include <asm/io.h>
86 #include <asm/irq.h>
87 #include <asm/uaccess.h>
88 #include <linux/module.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/crc32.h>
91 #include <linux/mii.h>
92 #include <linux/phy.h>
93 #include <linux/phy_fixed.h>
94 #include <linux/of.h>
95
96 #include "gianfar.h"
97 #include "fsl_pq_mdio.h"
98
99 #define TX_TIMEOUT      (1*HZ)
100 #undef BRIEF_GFAR_ERRORS
101 #undef VERBOSE_GFAR_ERRORS
102
103 const char gfar_driver_name[] = "Gianfar Ethernet";
104 const char gfar_driver_version[] = "1.3";
105
106 static int gfar_enet_open(struct net_device *dev);
107 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
108 static void gfar_reset_task(struct work_struct *work);
109 static void gfar_timeout(struct net_device *dev);
110 static int gfar_close(struct net_device *dev);
111 struct sk_buff *gfar_new_skb(struct net_device *dev);
112 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
113                 struct sk_buff *skb);
114 static int gfar_set_mac_address(struct net_device *dev);
115 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
116 static irqreturn_t gfar_error(int irq, void *dev_id);
117 static irqreturn_t gfar_transmit(int irq, void *dev_id);
118 static irqreturn_t gfar_interrupt(int irq, void *dev_id);
119 static void adjust_link(struct net_device *dev);
120 static void init_registers(struct net_device *dev);
121 static int init_phy(struct net_device *dev);
122 static int gfar_probe(struct of_device *ofdev,
123                 const struct of_device_id *match);
124 static int gfar_remove(struct of_device *ofdev);
125 static void free_skb_resources(struct gfar_private *priv);
126 static void gfar_set_multi(struct net_device *dev);
127 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
128 static void gfar_configure_serdes(struct net_device *dev);
129 static int gfar_poll(struct napi_struct *napi, int budget);
130 #ifdef CONFIG_NET_POLL_CONTROLLER
131 static void gfar_netpoll(struct net_device *dev);
132 #endif
133 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
134 static int gfar_clean_tx_ring(struct net_device *dev);
135 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
136                               int amount_pull);
137 static void gfar_vlan_rx_register(struct net_device *netdev,
138                                 struct vlan_group *grp);
139 void gfar_halt(struct net_device *dev);
140 static void gfar_halt_nodisable(struct net_device *dev);
141 void gfar_start(struct net_device *dev);
142 static void gfar_clear_exact_match(struct net_device *dev);
143 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
144 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
145
146 MODULE_AUTHOR("Freescale Semiconductor, Inc");
147 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
148 MODULE_LICENSE("GPL");
149
150 static const struct net_device_ops gfar_netdev_ops = {
151         .ndo_open = gfar_enet_open,
152         .ndo_start_xmit = gfar_start_xmit,
153         .ndo_stop = gfar_close,
154         .ndo_change_mtu = gfar_change_mtu,
155         .ndo_set_multicast_list = gfar_set_multi,
156         .ndo_tx_timeout = gfar_timeout,
157         .ndo_do_ioctl = gfar_ioctl,
158         .ndo_vlan_rx_register = gfar_vlan_rx_register,
159 #ifdef CONFIG_NET_POLL_CONTROLLER
160         .ndo_poll_controller = gfar_netpoll,
161 #endif
162 };
163
164 /* Returns 1 if incoming frames use an FCB */
165 static inline int gfar_uses_fcb(struct gfar_private *priv)
166 {
167         return priv->vlgrp || priv->rx_csum_enable;
168 }
169
170 static int gfar_of_init(struct net_device *dev)
171 {
172         const char *model;
173         const char *ctype;
174         const void *mac_addr;
175         u64 addr, size;
176         int err = 0;
177         struct gfar_private *priv = netdev_priv(dev);
178         struct device_node *np = priv->node;
179         const u32 *stash;
180         const u32 *stash_len;
181         const u32 *stash_idx;
182
183         if (!np || !of_device_is_available(np))
184                 return -ENODEV;
185
186         /* get a pointer to the register memory */
187         addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
188         priv->regs = ioremap(addr, size);
189
190         if (priv->regs == NULL)
191                 return -ENOMEM;
192
193         priv->interruptTransmit = irq_of_parse_and_map(np, 0);
194
195         model = of_get_property(np, "model", NULL);
196
197         /* If we aren't the FEC we have multiple interrupts */
198         if (model && strcasecmp(model, "FEC")) {
199                 priv->interruptReceive = irq_of_parse_and_map(np, 1);
200
201                 priv->interruptError = irq_of_parse_and_map(np, 2);
202
203                 if (priv->interruptTransmit < 0 ||
204                                 priv->interruptReceive < 0 ||
205                                 priv->interruptError < 0) {
206                         err = -EINVAL;
207                         goto err_out;
208                 }
209         }
210
211         stash = of_get_property(np, "bd-stash", NULL);
212
213         if(stash) {
214                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
215                 priv->bd_stash_en = 1;
216         }
217
218         stash_len = of_get_property(np, "rx-stash-len", NULL);
219
220         if (stash_len)
221                 priv->rx_stash_size = *stash_len;
222
223         stash_idx = of_get_property(np, "rx-stash-idx", NULL);
224
225         if (stash_idx)
226                 priv->rx_stash_index = *stash_idx;
227
228         if (stash_len || stash_idx)
229                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
230
231         mac_addr = of_get_mac_address(np);
232         if (mac_addr)
233                 memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
234
235         if (model && !strcasecmp(model, "TSEC"))
236                 priv->device_flags =
237                         FSL_GIANFAR_DEV_HAS_GIGABIT |
238                         FSL_GIANFAR_DEV_HAS_COALESCE |
239                         FSL_GIANFAR_DEV_HAS_RMON |
240                         FSL_GIANFAR_DEV_HAS_MULTI_INTR;
241         if (model && !strcasecmp(model, "eTSEC"))
242                 priv->device_flags =
243                         FSL_GIANFAR_DEV_HAS_GIGABIT |
244                         FSL_GIANFAR_DEV_HAS_COALESCE |
245                         FSL_GIANFAR_DEV_HAS_RMON |
246                         FSL_GIANFAR_DEV_HAS_MULTI_INTR |
247                         FSL_GIANFAR_DEV_HAS_PADDING |
248                         FSL_GIANFAR_DEV_HAS_CSUM |
249                         FSL_GIANFAR_DEV_HAS_VLAN |
250                         FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
251                         FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
252
253         ctype = of_get_property(np, "phy-connection-type", NULL);
254
255         /* We only care about rgmii-id.  The rest are autodetected */
256         if (ctype && !strcmp(ctype, "rgmii-id"))
257                 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
258         else
259                 priv->interface = PHY_INTERFACE_MODE_MII;
260
261         if (of_get_property(np, "fsl,magic-packet", NULL))
262                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
263
264         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
265         if (!priv->phy_node) {
266                 u32 *fixed_link;
267
268                 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
269                 if (!fixed_link) {
270                         err = -ENODEV;
271                         goto err_out;
272                 }
273         }
274
275         /* Find the TBI PHY.  If it's not there, we don't support SGMII */
276         priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
277
278         return 0;
279
280 err_out:
281         iounmap(priv->regs);
282         return err;
283 }
284
285 /* Ioctl MII Interface */
286 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
287 {
288         struct gfar_private *priv = netdev_priv(dev);
289
290         if (!netif_running(dev))
291                 return -EINVAL;
292
293         if (!priv->phydev)
294                 return -ENODEV;
295
296         return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
297 }
298
299 /* Set up the ethernet device structure, private data,
300  * and anything else we need before we start */
301 static int gfar_probe(struct of_device *ofdev,
302                 const struct of_device_id *match)
303 {
304         u32 tempval;
305         struct net_device *dev = NULL;
306         struct gfar_private *priv = NULL;
307         int err = 0;
308         int len_devname;
309
310         /* Create an ethernet device instance */
311         dev = alloc_etherdev(sizeof (*priv));
312
313         if (NULL == dev)
314                 return -ENOMEM;
315
316         priv = netdev_priv(dev);
317         priv->ndev = dev;
318         priv->ofdev = ofdev;
319         priv->node = ofdev->node;
320         SET_NETDEV_DEV(dev, &ofdev->dev);
321
322         err = gfar_of_init(dev);
323
324         if (err)
325                 goto regs_fail;
326
327         spin_lock_init(&priv->txlock);
328         spin_lock_init(&priv->rxlock);
329         spin_lock_init(&priv->bflock);
330         INIT_WORK(&priv->reset_task, gfar_reset_task);
331
332         dev_set_drvdata(&ofdev->dev, priv);
333
334         /* Stop the DMA engine now, in case it was running before */
335         /* (The firmware could have used it, and left it running). */
336         gfar_halt(dev);
337
338         /* Reset MAC layer */
339         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
340
341         /* We need to delay at least 3 TX clocks */
342         udelay(2);
343
344         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
345         gfar_write(&priv->regs->maccfg1, tempval);
346
347         /* Initialize MACCFG2. */
348         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
349
350         /* Initialize ECNTRL */
351         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
352
353         /* Set the dev->base_addr to the gfar reg region */
354         dev->base_addr = (unsigned long) (priv->regs);
355
356         SET_NETDEV_DEV(dev, &ofdev->dev);
357
358         /* Fill in the dev structure */
359         dev->watchdog_timeo = TX_TIMEOUT;
360         netif_napi_add(dev, &priv->napi, gfar_poll, GFAR_DEV_WEIGHT);
361         dev->mtu = 1500;
362
363         dev->netdev_ops = &gfar_netdev_ops;
364         dev->ethtool_ops = &gfar_ethtool_ops;
365
366         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
367                 priv->rx_csum_enable = 1;
368                 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA;
369         } else
370                 priv->rx_csum_enable = 0;
371
372         priv->vlgrp = NULL;
373
374         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN)
375                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
376
377         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
378                 priv->extended_hash = 1;
379                 priv->hash_width = 9;
380
381                 priv->hash_regs[0] = &priv->regs->igaddr0;
382                 priv->hash_regs[1] = &priv->regs->igaddr1;
383                 priv->hash_regs[2] = &priv->regs->igaddr2;
384                 priv->hash_regs[3] = &priv->regs->igaddr3;
385                 priv->hash_regs[4] = &priv->regs->igaddr4;
386                 priv->hash_regs[5] = &priv->regs->igaddr5;
387                 priv->hash_regs[6] = &priv->regs->igaddr6;
388                 priv->hash_regs[7] = &priv->regs->igaddr7;
389                 priv->hash_regs[8] = &priv->regs->gaddr0;
390                 priv->hash_regs[9] = &priv->regs->gaddr1;
391                 priv->hash_regs[10] = &priv->regs->gaddr2;
392                 priv->hash_regs[11] = &priv->regs->gaddr3;
393                 priv->hash_regs[12] = &priv->regs->gaddr4;
394                 priv->hash_regs[13] = &priv->regs->gaddr5;
395                 priv->hash_regs[14] = &priv->regs->gaddr6;
396                 priv->hash_regs[15] = &priv->regs->gaddr7;
397
398         } else {
399                 priv->extended_hash = 0;
400                 priv->hash_width = 8;
401
402                 priv->hash_regs[0] = &priv->regs->gaddr0;
403                 priv->hash_regs[1] = &priv->regs->gaddr1;
404                 priv->hash_regs[2] = &priv->regs->gaddr2;
405                 priv->hash_regs[3] = &priv->regs->gaddr3;
406                 priv->hash_regs[4] = &priv->regs->gaddr4;
407                 priv->hash_regs[5] = &priv->regs->gaddr5;
408                 priv->hash_regs[6] = &priv->regs->gaddr6;
409                 priv->hash_regs[7] = &priv->regs->gaddr7;
410         }
411
412         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
413                 priv->padding = DEFAULT_PADDING;
414         else
415                 priv->padding = 0;
416
417         if (dev->features & NETIF_F_IP_CSUM)
418                 dev->hard_header_len += GMAC_FCB_LEN;
419
420         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
421         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
422         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
423         priv->num_txbdfree = DEFAULT_TX_RING_SIZE;
424
425         priv->txcoalescing = DEFAULT_TX_COALESCE;
426         priv->txic = DEFAULT_TXIC;
427         priv->rxcoalescing = DEFAULT_RX_COALESCE;
428         priv->rxic = DEFAULT_RXIC;
429
430         /* Enable most messages by default */
431         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
432
433         /* Carrier starts down, phylib will bring it up */
434         netif_carrier_off(dev);
435
436         err = register_netdev(dev);
437
438         if (err) {
439                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
440                                 dev->name);
441                 goto register_fail;
442         }
443
444         device_init_wakeup(&dev->dev,
445                 priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
446
447         /* fill out IRQ number and name fields */
448         len_devname = strlen(dev->name);
449         strncpy(&priv->int_name_tx[0], dev->name, len_devname);
450         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
451                 strncpy(&priv->int_name_tx[len_devname],
452                         "_tx", sizeof("_tx") + 1);
453
454                 strncpy(&priv->int_name_rx[0], dev->name, len_devname);
455                 strncpy(&priv->int_name_rx[len_devname],
456                         "_rx", sizeof("_rx") + 1);
457
458                 strncpy(&priv->int_name_er[0], dev->name, len_devname);
459                 strncpy(&priv->int_name_er[len_devname],
460                         "_er", sizeof("_er") + 1);
461         } else
462                 priv->int_name_tx[len_devname] = '\0';
463
464         /* Create all the sysfs files */
465         gfar_init_sysfs(dev);
466
467         /* Print out the device info */
468         printk(KERN_INFO DEVICE_NAME "%pM\n", dev->name, dev->dev_addr);
469
470         /* Even more device info helps when determining which kernel */
471         /* provided which set of benchmarks. */
472         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
473         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
474                dev->name, priv->rx_ring_size, priv->tx_ring_size);
475
476         return 0;
477
478 register_fail:
479         iounmap(priv->regs);
480 regs_fail:
481         if (priv->phy_node)
482                 of_node_put(priv->phy_node);
483         if (priv->tbi_node)
484                 of_node_put(priv->tbi_node);
485         free_netdev(dev);
486         return err;
487 }
488
489 static int gfar_remove(struct of_device *ofdev)
490 {
491         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
492
493         if (priv->phy_node)
494                 of_node_put(priv->phy_node);
495         if (priv->tbi_node)
496                 of_node_put(priv->tbi_node);
497
498         dev_set_drvdata(&ofdev->dev, NULL);
499
500         iounmap(priv->regs);
501         free_netdev(priv->ndev);
502
503         return 0;
504 }
505
506 #ifdef CONFIG_PM
507 static int gfar_suspend(struct of_device *ofdev, pm_message_t state)
508 {
509         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
510         struct net_device *dev = priv->ndev;
511         unsigned long flags;
512         u32 tempval;
513
514         int magic_packet = priv->wol_en &&
515                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
516
517         netif_device_detach(dev);
518
519         if (netif_running(dev)) {
520                 spin_lock_irqsave(&priv->txlock, flags);
521                 spin_lock(&priv->rxlock);
522
523                 gfar_halt_nodisable(dev);
524
525                 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
526                 tempval = gfar_read(&priv->regs->maccfg1);
527
528                 tempval &= ~MACCFG1_TX_EN;
529
530                 if (!magic_packet)
531                         tempval &= ~MACCFG1_RX_EN;
532
533                 gfar_write(&priv->regs->maccfg1, tempval);
534
535                 spin_unlock(&priv->rxlock);
536                 spin_unlock_irqrestore(&priv->txlock, flags);
537
538                 napi_disable(&priv->napi);
539
540                 if (magic_packet) {
541                         /* Enable interrupt on Magic Packet */
542                         gfar_write(&priv->regs->imask, IMASK_MAG);
543
544                         /* Enable Magic Packet mode */
545                         tempval = gfar_read(&priv->regs->maccfg2);
546                         tempval |= MACCFG2_MPEN;
547                         gfar_write(&priv->regs->maccfg2, tempval);
548                 } else {
549                         phy_stop(priv->phydev);
550                 }
551         }
552
553         return 0;
554 }
555
556 static int gfar_resume(struct of_device *ofdev)
557 {
558         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
559         struct net_device *dev = priv->ndev;
560         unsigned long flags;
561         u32 tempval;
562         int magic_packet = priv->wol_en &&
563                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
564
565         if (!netif_running(dev)) {
566                 netif_device_attach(dev);
567                 return 0;
568         }
569
570         if (!magic_packet && priv->phydev)
571                 phy_start(priv->phydev);
572
573         /* Disable Magic Packet mode, in case something
574          * else woke us up.
575          */
576
577         spin_lock_irqsave(&priv->txlock, flags);
578         spin_lock(&priv->rxlock);
579
580         tempval = gfar_read(&priv->regs->maccfg2);
581         tempval &= ~MACCFG2_MPEN;
582         gfar_write(&priv->regs->maccfg2, tempval);
583
584         gfar_start(dev);
585
586         spin_unlock(&priv->rxlock);
587         spin_unlock_irqrestore(&priv->txlock, flags);
588
589         netif_device_attach(dev);
590
591         napi_enable(&priv->napi);
592
593         return 0;
594 }
595 #else
596 #define gfar_suspend NULL
597 #define gfar_resume NULL
598 #endif
599
600 /* Reads the controller's registers to determine what interface
601  * connects it to the PHY.
602  */
603 static phy_interface_t gfar_get_interface(struct net_device *dev)
604 {
605         struct gfar_private *priv = netdev_priv(dev);
606         u32 ecntrl = gfar_read(&priv->regs->ecntrl);
607
608         if (ecntrl & ECNTRL_SGMII_MODE)
609                 return PHY_INTERFACE_MODE_SGMII;
610
611         if (ecntrl & ECNTRL_TBI_MODE) {
612                 if (ecntrl & ECNTRL_REDUCED_MODE)
613                         return PHY_INTERFACE_MODE_RTBI;
614                 else
615                         return PHY_INTERFACE_MODE_TBI;
616         }
617
618         if (ecntrl & ECNTRL_REDUCED_MODE) {
619                 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
620                         return PHY_INTERFACE_MODE_RMII;
621                 else {
622                         phy_interface_t interface = priv->interface;
623
624                         /*
625                          * This isn't autodetected right now, so it must
626                          * be set by the device tree or platform code.
627                          */
628                         if (interface == PHY_INTERFACE_MODE_RGMII_ID)
629                                 return PHY_INTERFACE_MODE_RGMII_ID;
630
631                         return PHY_INTERFACE_MODE_RGMII;
632                 }
633         }
634
635         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
636                 return PHY_INTERFACE_MODE_GMII;
637
638         return PHY_INTERFACE_MODE_MII;
639 }
640
641
642 /* Initializes driver's PHY state, and attaches to the PHY.
643  * Returns 0 on success.
644  */
645 static int init_phy(struct net_device *dev)
646 {
647         struct gfar_private *priv = netdev_priv(dev);
648         uint gigabit_support =
649                 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
650                 SUPPORTED_1000baseT_Full : 0;
651         phy_interface_t interface;
652
653         priv->oldlink = 0;
654         priv->oldspeed = 0;
655         priv->oldduplex = -1;
656
657         interface = gfar_get_interface(dev);
658
659         if (priv->phy_node) {
660                 priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link,
661                                               0, interface);
662                 if (!priv->phydev) {
663                         dev_err(&dev->dev, "error: Could not attach to PHY\n");
664                         return -ENODEV;
665                 }
666         }
667
668         if (interface == PHY_INTERFACE_MODE_SGMII)
669                 gfar_configure_serdes(dev);
670
671         /* Remove any features not supported by the controller */
672         priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
673         priv->phydev->advertising = priv->phydev->supported;
674
675         return 0;
676 }
677
678 /*
679  * Initialize TBI PHY interface for communicating with the
680  * SERDES lynx PHY on the chip.  We communicate with this PHY
681  * through the MDIO bus on each controller, treating it as a
682  * "normal" PHY at the address found in the TBIPA register.  We assume
683  * that the TBIPA register is valid.  Either the MDIO bus code will set
684  * it to a value that doesn't conflict with other PHYs on the bus, or the
685  * value doesn't matter, as there are no other PHYs on the bus.
686  */
687 static void gfar_configure_serdes(struct net_device *dev)
688 {
689         struct gfar_private *priv = netdev_priv(dev);
690         struct phy_device *tbiphy;
691
692         if (!priv->tbi_node) {
693                 dev_warn(&dev->dev, "error: SGMII mode requires that the "
694                                     "device tree specify a tbi-handle\n");
695                 return;
696         }
697
698         tbiphy = of_phy_find_device(priv->tbi_node);
699         if (!tbiphy) {
700                 dev_err(&dev->dev, "error: Could not get TBI device\n");
701                 return;
702         }
703
704         /*
705          * If the link is already up, we must already be ok, and don't need to
706          * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
707          * everything for us?  Resetting it takes the link down and requires
708          * several seconds for it to come back.
709          */
710         if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
711                 return;
712
713         /* Single clk mode, mii mode off(for serdes communication) */
714         phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
715
716         phy_write(tbiphy, MII_ADVERTISE,
717                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
718                         ADVERTISE_1000XPSE_ASYM);
719
720         phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
721                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
722 }
723
724 static void init_registers(struct net_device *dev)
725 {
726         struct gfar_private *priv = netdev_priv(dev);
727
728         /* Clear IEVENT */
729         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
730
731         /* Initialize IMASK */
732         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
733
734         /* Init hash registers to zero */
735         gfar_write(&priv->regs->igaddr0, 0);
736         gfar_write(&priv->regs->igaddr1, 0);
737         gfar_write(&priv->regs->igaddr2, 0);
738         gfar_write(&priv->regs->igaddr3, 0);
739         gfar_write(&priv->regs->igaddr4, 0);
740         gfar_write(&priv->regs->igaddr5, 0);
741         gfar_write(&priv->regs->igaddr6, 0);
742         gfar_write(&priv->regs->igaddr7, 0);
743
744         gfar_write(&priv->regs->gaddr0, 0);
745         gfar_write(&priv->regs->gaddr1, 0);
746         gfar_write(&priv->regs->gaddr2, 0);
747         gfar_write(&priv->regs->gaddr3, 0);
748         gfar_write(&priv->regs->gaddr4, 0);
749         gfar_write(&priv->regs->gaddr5, 0);
750         gfar_write(&priv->regs->gaddr6, 0);
751         gfar_write(&priv->regs->gaddr7, 0);
752
753         /* Zero out the rmon mib registers if it has them */
754         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
755                 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib));
756
757                 /* Mask off the CAM interrupts */
758                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
759                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
760         }
761
762         /* Initialize the max receive buffer length */
763         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
764
765         /* Initialize the Minimum Frame Length Register */
766         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
767 }
768
769
770 /* Halt the receive and transmit queues */
771 static void gfar_halt_nodisable(struct net_device *dev)
772 {
773         struct gfar_private *priv = netdev_priv(dev);
774         struct gfar __iomem *regs = priv->regs;
775         u32 tempval;
776
777         /* Mask all interrupts */
778         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
779
780         /* Clear all interrupts */
781         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
782
783         /* Stop the DMA, and wait for it to stop */
784         tempval = gfar_read(&priv->regs->dmactrl);
785         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
786             != (DMACTRL_GRS | DMACTRL_GTS)) {
787                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
788                 gfar_write(&priv->regs->dmactrl, tempval);
789
790                 while (!(gfar_read(&priv->regs->ievent) &
791                          (IEVENT_GRSC | IEVENT_GTSC)))
792                         cpu_relax();
793         }
794 }
795
796 /* Halt the receive and transmit queues */
797 void gfar_halt(struct net_device *dev)
798 {
799         struct gfar_private *priv = netdev_priv(dev);
800         struct gfar __iomem *regs = priv->regs;
801         u32 tempval;
802
803         gfar_halt_nodisable(dev);
804
805         /* Disable Rx and Tx */
806         tempval = gfar_read(&regs->maccfg1);
807         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
808         gfar_write(&regs->maccfg1, tempval);
809 }
810
811 void stop_gfar(struct net_device *dev)
812 {
813         struct gfar_private *priv = netdev_priv(dev);
814         struct gfar __iomem *regs = priv->regs;
815         unsigned long flags;
816
817         phy_stop(priv->phydev);
818
819         /* Lock it down */
820         spin_lock_irqsave(&priv->txlock, flags);
821         spin_lock(&priv->rxlock);
822
823         gfar_halt(dev);
824
825         spin_unlock(&priv->rxlock);
826         spin_unlock_irqrestore(&priv->txlock, flags);
827
828         /* Free the IRQs */
829         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
830                 free_irq(priv->interruptError, dev);
831                 free_irq(priv->interruptTransmit, dev);
832                 free_irq(priv->interruptReceive, dev);
833         } else {
834                 free_irq(priv->interruptTransmit, dev);
835         }
836
837         free_skb_resources(priv);
838
839         dma_free_coherent(&priv->ofdev->dev,
840                         sizeof(struct txbd8)*priv->tx_ring_size
841                         + sizeof(struct rxbd8)*priv->rx_ring_size,
842                         priv->tx_bd_base,
843                         gfar_read(&regs->tbase0));
844 }
845
846 /* If there are any tx skbs or rx skbs still around, free them.
847  * Then free tx_skbuff and rx_skbuff */
848 static void free_skb_resources(struct gfar_private *priv)
849 {
850         struct rxbd8 *rxbdp;
851         struct txbd8 *txbdp;
852         int i, j;
853
854         /* Go through all the buffer descriptors and free their data buffers */
855         txbdp = priv->tx_bd_base;
856
857         for (i = 0; i < priv->tx_ring_size; i++) {
858                 if (!priv->tx_skbuff[i])
859                         continue;
860
861                 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
862                                 txbdp->length, DMA_TO_DEVICE);
863                 txbdp->lstatus = 0;
864                 for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
865                         txbdp++;
866                         dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
867                                         txbdp->length, DMA_TO_DEVICE);
868                 }
869                 txbdp++;
870                 dev_kfree_skb_any(priv->tx_skbuff[i]);
871                 priv->tx_skbuff[i] = NULL;
872         }
873
874         kfree(priv->tx_skbuff);
875
876         rxbdp = priv->rx_bd_base;
877
878         /* rx_skbuff is not guaranteed to be allocated, so only
879          * free it and its contents if it is allocated */
880         if(priv->rx_skbuff != NULL) {
881                 for (i = 0; i < priv->rx_ring_size; i++) {
882                         if (priv->rx_skbuff[i]) {
883                                 dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
884                                                 priv->rx_buffer_size,
885                                                 DMA_FROM_DEVICE);
886
887                                 dev_kfree_skb_any(priv->rx_skbuff[i]);
888                                 priv->rx_skbuff[i] = NULL;
889                         }
890
891                         rxbdp->lstatus = 0;
892                         rxbdp->bufPtr = 0;
893
894                         rxbdp++;
895                 }
896
897                 kfree(priv->rx_skbuff);
898         }
899 }
900
901 void gfar_start(struct net_device *dev)
902 {
903         struct gfar_private *priv = netdev_priv(dev);
904         struct gfar __iomem *regs = priv->regs;
905         u32 tempval;
906
907         /* Enable Rx and Tx in MACCFG1 */
908         tempval = gfar_read(&regs->maccfg1);
909         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
910         gfar_write(&regs->maccfg1, tempval);
911
912         /* Initialize DMACTRL to have WWR and WOP */
913         tempval = gfar_read(&priv->regs->dmactrl);
914         tempval |= DMACTRL_INIT_SETTINGS;
915         gfar_write(&priv->regs->dmactrl, tempval);
916
917         /* Make sure we aren't stopped */
918         tempval = gfar_read(&priv->regs->dmactrl);
919         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
920         gfar_write(&priv->regs->dmactrl, tempval);
921
922         /* Clear THLT/RHLT, so that the DMA starts polling now */
923         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
924         gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
925
926         /* Unmask the interrupts we look for */
927         gfar_write(&regs->imask, IMASK_DEFAULT);
928
929         dev->trans_start = jiffies;
930 }
931
932 /* Bring the controller up and running */
933 int startup_gfar(struct net_device *dev)
934 {
935         struct txbd8 *txbdp;
936         struct rxbd8 *rxbdp;
937         dma_addr_t addr = 0;
938         unsigned long vaddr;
939         int i;
940         struct gfar_private *priv = netdev_priv(dev);
941         struct gfar __iomem *regs = priv->regs;
942         int err = 0;
943         u32 rctrl = 0;
944         u32 attrs = 0;
945
946         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
947
948         /* Allocate memory for the buffer descriptors */
949         vaddr = (unsigned long) dma_alloc_coherent(&priv->ofdev->dev,
950                         sizeof (struct txbd8) * priv->tx_ring_size +
951                         sizeof (struct rxbd8) * priv->rx_ring_size,
952                         &addr, GFP_KERNEL);
953
954         if (vaddr == 0) {
955                 if (netif_msg_ifup(priv))
956                         printk(KERN_ERR "%s: Could not allocate buffer descriptors!\n",
957                                         dev->name);
958                 return -ENOMEM;
959         }
960
961         priv->tx_bd_base = (struct txbd8 *) vaddr;
962
963         /* enet DMA only understands physical addresses */
964         gfar_write(&regs->tbase0, addr);
965
966         /* Start the rx descriptor ring where the tx ring leaves off */
967         addr = addr + sizeof (struct txbd8) * priv->tx_ring_size;
968         vaddr = vaddr + sizeof (struct txbd8) * priv->tx_ring_size;
969         priv->rx_bd_base = (struct rxbd8 *) vaddr;
970         gfar_write(&regs->rbase0, addr);
971
972         /* Setup the skbuff rings */
973         priv->tx_skbuff =
974             (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) *
975                                         priv->tx_ring_size, GFP_KERNEL);
976
977         if (NULL == priv->tx_skbuff) {
978                 if (netif_msg_ifup(priv))
979                         printk(KERN_ERR "%s: Could not allocate tx_skbuff\n",
980                                         dev->name);
981                 err = -ENOMEM;
982                 goto tx_skb_fail;
983         }
984
985         for (i = 0; i < priv->tx_ring_size; i++)
986                 priv->tx_skbuff[i] = NULL;
987
988         priv->rx_skbuff =
989             (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) *
990                                         priv->rx_ring_size, GFP_KERNEL);
991
992         if (NULL == priv->rx_skbuff) {
993                 if (netif_msg_ifup(priv))
994                         printk(KERN_ERR "%s: Could not allocate rx_skbuff\n",
995                                         dev->name);
996                 err = -ENOMEM;
997                 goto rx_skb_fail;
998         }
999
1000         for (i = 0; i < priv->rx_ring_size; i++)
1001                 priv->rx_skbuff[i] = NULL;
1002
1003         /* Initialize some variables in our dev structure */
1004         priv->num_txbdfree = priv->tx_ring_size;
1005         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
1006         priv->cur_rx = priv->rx_bd_base;
1007         priv->skb_curtx = priv->skb_dirtytx = 0;
1008         priv->skb_currx = 0;
1009
1010         /* Initialize Transmit Descriptor Ring */
1011         txbdp = priv->tx_bd_base;
1012         for (i = 0; i < priv->tx_ring_size; i++) {
1013                 txbdp->lstatus = 0;
1014                 txbdp->bufPtr = 0;
1015                 txbdp++;
1016         }
1017
1018         /* Set the last descriptor in the ring to indicate wrap */
1019         txbdp--;
1020         txbdp->status |= TXBD_WRAP;
1021
1022         rxbdp = priv->rx_bd_base;
1023         for (i = 0; i < priv->rx_ring_size; i++) {
1024                 struct sk_buff *skb;
1025
1026                 skb = gfar_new_skb(dev);
1027
1028                 if (!skb) {
1029                         printk(KERN_ERR "%s: Can't allocate RX buffers\n",
1030                                         dev->name);
1031
1032                         goto err_rxalloc_fail;
1033                 }
1034
1035                 priv->rx_skbuff[i] = skb;
1036
1037                 gfar_new_rxbdp(dev, rxbdp, skb);
1038
1039                 rxbdp++;
1040         }
1041
1042         /* Set the last descriptor in the ring to wrap */
1043         rxbdp--;
1044         rxbdp->status |= RXBD_WRAP;
1045
1046         /* If the device has multiple interrupts, register for
1047          * them.  Otherwise, only register for the one */
1048         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1049                 /* Install our interrupt handlers for Error,
1050                  * Transmit, and Receive */
1051                 if (request_irq(priv->interruptError, gfar_error,
1052                                 0, priv->int_name_er, dev) < 0) {
1053                         if (netif_msg_intr(priv))
1054                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
1055                                         dev->name, priv->interruptError);
1056
1057                         err = -1;
1058                         goto err_irq_fail;
1059                 }
1060
1061                 if (request_irq(priv->interruptTransmit, gfar_transmit,
1062                                 0, priv->int_name_tx, dev) < 0) {
1063                         if (netif_msg_intr(priv))
1064                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
1065                                         dev->name, priv->interruptTransmit);
1066
1067                         err = -1;
1068
1069                         goto tx_irq_fail;
1070                 }
1071
1072                 if (request_irq(priv->interruptReceive, gfar_receive,
1073                                 0, priv->int_name_rx, dev) < 0) {
1074                         if (netif_msg_intr(priv))
1075                                 printk(KERN_ERR "%s: Can't get IRQ %d (receive0)\n",
1076                                                 dev->name, priv->interruptReceive);
1077
1078                         err = -1;
1079                         goto rx_irq_fail;
1080                 }
1081         } else {
1082                 if (request_irq(priv->interruptTransmit, gfar_interrupt,
1083                                 0, priv->int_name_tx, dev) < 0) {
1084                         if (netif_msg_intr(priv))
1085                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
1086                                         dev->name, priv->interruptTransmit);
1087
1088                         err = -1;
1089                         goto err_irq_fail;
1090                 }
1091         }
1092
1093         phy_start(priv->phydev);
1094
1095         /* Configure the coalescing support */
1096         gfar_write(&regs->txic, 0);
1097         if (priv->txcoalescing)
1098                 gfar_write(&regs->txic, priv->txic);
1099
1100         gfar_write(&regs->rxic, 0);
1101         if (priv->rxcoalescing)
1102                 gfar_write(&regs->rxic, priv->rxic);
1103
1104         if (priv->rx_csum_enable)
1105                 rctrl |= RCTRL_CHECKSUMMING;
1106
1107         if (priv->extended_hash) {
1108                 rctrl |= RCTRL_EXTHASH;
1109
1110                 gfar_clear_exact_match(dev);
1111                 rctrl |= RCTRL_EMEN;
1112         }
1113
1114         if (priv->padding) {
1115                 rctrl &= ~RCTRL_PAL_MASK;
1116                 rctrl |= RCTRL_PADDING(priv->padding);
1117         }
1118
1119         /* Init rctrl based on our settings */
1120         gfar_write(&priv->regs->rctrl, rctrl);
1121
1122         if (dev->features & NETIF_F_IP_CSUM)
1123                 gfar_write(&priv->regs->tctrl, TCTRL_INIT_CSUM);
1124
1125         /* Set the extraction length and index */
1126         attrs = ATTRELI_EL(priv->rx_stash_size) |
1127                 ATTRELI_EI(priv->rx_stash_index);
1128
1129         gfar_write(&priv->regs->attreli, attrs);
1130
1131         /* Start with defaults, and add stashing or locking
1132          * depending on the approprate variables */
1133         attrs = ATTR_INIT_SETTINGS;
1134
1135         if (priv->bd_stash_en)
1136                 attrs |= ATTR_BDSTASH;
1137
1138         if (priv->rx_stash_size != 0)
1139                 attrs |= ATTR_BUFSTASH;
1140
1141         gfar_write(&priv->regs->attr, attrs);
1142
1143         gfar_write(&priv->regs->fifo_tx_thr, priv->fifo_threshold);
1144         gfar_write(&priv->regs->fifo_tx_starve, priv->fifo_starve);
1145         gfar_write(&priv->regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
1146
1147         /* Start the controller */
1148         gfar_start(dev);
1149
1150         return 0;
1151
1152 rx_irq_fail:
1153         free_irq(priv->interruptTransmit, dev);
1154 tx_irq_fail:
1155         free_irq(priv->interruptError, dev);
1156 err_irq_fail:
1157 err_rxalloc_fail:
1158 rx_skb_fail:
1159         free_skb_resources(priv);
1160 tx_skb_fail:
1161         dma_free_coherent(&priv->ofdev->dev,
1162                         sizeof(struct txbd8)*priv->tx_ring_size
1163                         + sizeof(struct rxbd8)*priv->rx_ring_size,
1164                         priv->tx_bd_base,
1165                         gfar_read(&regs->tbase0));
1166
1167         return err;
1168 }
1169
1170 /* Called when something needs to use the ethernet device */
1171 /* Returns 0 for success. */
1172 static int gfar_enet_open(struct net_device *dev)
1173 {
1174         struct gfar_private *priv = netdev_priv(dev);
1175         int err;
1176
1177         napi_enable(&priv->napi);
1178
1179         skb_queue_head_init(&priv->rx_recycle);
1180
1181         /* Initialize a bunch of registers */
1182         init_registers(dev);
1183
1184         gfar_set_mac_address(dev);
1185
1186         err = init_phy(dev);
1187
1188         if(err) {
1189                 napi_disable(&priv->napi);
1190                 return err;
1191         }
1192
1193         err = startup_gfar(dev);
1194         if (err) {
1195                 napi_disable(&priv->napi);
1196                 return err;
1197         }
1198
1199         netif_start_queue(dev);
1200
1201         device_set_wakeup_enable(&dev->dev, priv->wol_en);
1202
1203         return err;
1204 }
1205
1206 static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1207 {
1208         struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1209
1210         memset(fcb, 0, GMAC_FCB_LEN);
1211
1212         return fcb;
1213 }
1214
1215 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
1216 {
1217         u8 flags = 0;
1218
1219         /* If we're here, it's a IP packet with a TCP or UDP
1220          * payload.  We set it to checksum, using a pseudo-header
1221          * we provide
1222          */
1223         flags = TXFCB_DEFAULT;
1224
1225         /* Tell the controller what the protocol is */
1226         /* And provide the already calculated phcs */
1227         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
1228                 flags |= TXFCB_UDP;
1229                 fcb->phcs = udp_hdr(skb)->check;
1230         } else
1231                 fcb->phcs = tcp_hdr(skb)->check;
1232
1233         /* l3os is the distance between the start of the
1234          * frame (skb->data) and the start of the IP hdr.
1235          * l4os is the distance between the start of the
1236          * l3 hdr and the l4 hdr */
1237         fcb->l3os = (u16)(skb_network_offset(skb) - GMAC_FCB_LEN);
1238         fcb->l4os = skb_network_header_len(skb);
1239
1240         fcb->flags = flags;
1241 }
1242
1243 void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
1244 {
1245         fcb->flags |= TXFCB_VLN;
1246         fcb->vlctl = vlan_tx_tag_get(skb);
1247 }
1248
1249 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
1250                                struct txbd8 *base, int ring_size)
1251 {
1252         struct txbd8 *new_bd = bdp + stride;
1253
1254         return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
1255 }
1256
1257 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
1258                 int ring_size)
1259 {
1260         return skip_txbd(bdp, 1, base, ring_size);
1261 }
1262
1263 /* This is called by the kernel when a frame is ready for transmission. */
1264 /* It is pointed to by the dev->hard_start_xmit function pointer */
1265 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1266 {
1267         struct gfar_private *priv = netdev_priv(dev);
1268         struct txfcb *fcb = NULL;
1269         struct txbd8 *txbdp, *txbdp_start, *base;
1270         u32 lstatus;
1271         int i;
1272         u32 bufaddr;
1273         unsigned long flags;
1274         unsigned int nr_frags, length;
1275
1276         base = priv->tx_bd_base;
1277
1278         /* make space for additional header when fcb is needed */
1279         if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
1280                         (priv->vlgrp && vlan_tx_tag_present(skb))) &&
1281                         (skb_headroom(skb) < GMAC_FCB_LEN)) {
1282                 struct sk_buff *skb_new;
1283
1284                 skb_new = skb_realloc_headroom(skb, GMAC_FCB_LEN);
1285                 if (!skb_new) {
1286                         dev->stats.tx_errors++;
1287                         kfree_skb(skb);
1288                         return NETDEV_TX_OK;
1289                 }
1290                 kfree_skb(skb);
1291                 skb = skb_new;
1292         }
1293
1294         /* total number of fragments in the SKB */
1295         nr_frags = skb_shinfo(skb)->nr_frags;
1296
1297         spin_lock_irqsave(&priv->txlock, flags);
1298
1299         /* check if there is space to queue this packet */
1300         if ((nr_frags+1) > priv->num_txbdfree) {
1301                 /* no space, stop the queue */
1302                 netif_stop_queue(dev);
1303                 dev->stats.tx_fifo_errors++;
1304                 spin_unlock_irqrestore(&priv->txlock, flags);
1305                 return NETDEV_TX_BUSY;
1306         }
1307
1308         /* Update transmit stats */
1309         dev->stats.tx_bytes += skb->len;
1310
1311         txbdp = txbdp_start = priv->cur_tx;
1312
1313         if (nr_frags == 0) {
1314                 lstatus = txbdp->lstatus | BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1315         } else {
1316                 /* Place the fragment addresses and lengths into the TxBDs */
1317                 for (i = 0; i < nr_frags; i++) {
1318                         /* Point at the next BD, wrapping as needed */
1319                         txbdp = next_txbd(txbdp, base, priv->tx_ring_size);
1320
1321                         length = skb_shinfo(skb)->frags[i].size;
1322
1323                         lstatus = txbdp->lstatus | length |
1324                                 BD_LFLAG(TXBD_READY);
1325
1326                         /* Handle the last BD specially */
1327                         if (i == nr_frags - 1)
1328                                 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1329
1330                         bufaddr = dma_map_page(&priv->ofdev->dev,
1331                                         skb_shinfo(skb)->frags[i].page,
1332                                         skb_shinfo(skb)->frags[i].page_offset,
1333                                         length,
1334                                         DMA_TO_DEVICE);
1335
1336                         /* set the TxBD length and buffer pointer */
1337                         txbdp->bufPtr = bufaddr;
1338                         txbdp->lstatus = lstatus;
1339                 }
1340
1341                 lstatus = txbdp_start->lstatus;
1342         }
1343
1344         /* Set up checksumming */
1345         if (CHECKSUM_PARTIAL == skb->ip_summed) {
1346                 fcb = gfar_add_fcb(skb);
1347                 lstatus |= BD_LFLAG(TXBD_TOE);
1348                 gfar_tx_checksum(skb, fcb);
1349         }
1350
1351         if (priv->vlgrp && vlan_tx_tag_present(skb)) {
1352                 if (unlikely(NULL == fcb)) {
1353                         fcb = gfar_add_fcb(skb);
1354                         lstatus |= BD_LFLAG(TXBD_TOE);
1355                 }
1356
1357                 gfar_tx_vlan(skb, fcb);
1358         }
1359
1360         /* setup the TxBD length and buffer pointer for the first BD */
1361         priv->tx_skbuff[priv->skb_curtx] = skb;
1362         txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1363                         skb_headlen(skb), DMA_TO_DEVICE);
1364
1365         lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
1366
1367         /*
1368          * The powerpc-specific eieio() is used, as wmb() has too strong
1369          * semantics (it requires synchronization between cacheable and
1370          * uncacheable mappings, which eieio doesn't provide and which we
1371          * don't need), thus requiring a more expensive sync instruction.  At
1372          * some point, the set of architecture-independent barrier functions
1373          * should be expanded to include weaker barriers.
1374          */
1375         eieio();
1376
1377         txbdp_start->lstatus = lstatus;
1378
1379         /* Update the current skb pointer to the next entry we will use
1380          * (wrapping if necessary) */
1381         priv->skb_curtx = (priv->skb_curtx + 1) &
1382                 TX_RING_MOD_MASK(priv->tx_ring_size);
1383
1384         priv->cur_tx = next_txbd(txbdp, base, priv->tx_ring_size);
1385
1386         /* reduce TxBD free count */
1387         priv->num_txbdfree -= (nr_frags + 1);
1388
1389         dev->trans_start = jiffies;
1390
1391         /* If the next BD still needs to be cleaned up, then the bds
1392            are full.  We need to tell the kernel to stop sending us stuff. */
1393         if (!priv->num_txbdfree) {
1394                 netif_stop_queue(dev);
1395
1396                 dev->stats.tx_fifo_errors++;
1397         }
1398
1399         /* Tell the DMA to go go go */
1400         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1401
1402         /* Unlock priv */
1403         spin_unlock_irqrestore(&priv->txlock, flags);
1404
1405         return NETDEV_TX_OK;
1406 }
1407
1408 /* Stops the kernel queue, and halts the controller */
1409 static int gfar_close(struct net_device *dev)
1410 {
1411         struct gfar_private *priv = netdev_priv(dev);
1412
1413         napi_disable(&priv->napi);
1414
1415         skb_queue_purge(&priv->rx_recycle);
1416         cancel_work_sync(&priv->reset_task);
1417         stop_gfar(dev);
1418
1419         /* Disconnect from the PHY */
1420         phy_disconnect(priv->phydev);
1421         priv->phydev = NULL;
1422
1423         netif_stop_queue(dev);
1424
1425         return 0;
1426 }
1427
1428 /* Changes the mac address if the controller is not running. */
1429 static int gfar_set_mac_address(struct net_device *dev)
1430 {
1431         gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1432
1433         return 0;
1434 }
1435
1436
1437 /* Enables and disables VLAN insertion/extraction */
1438 static void gfar_vlan_rx_register(struct net_device *dev,
1439                 struct vlan_group *grp)
1440 {
1441         struct gfar_private *priv = netdev_priv(dev);
1442         unsigned long flags;
1443         u32 tempval;
1444
1445         spin_lock_irqsave(&priv->rxlock, flags);
1446
1447         priv->vlgrp = grp;
1448
1449         if (grp) {
1450                 /* Enable VLAN tag insertion */
1451                 tempval = gfar_read(&priv->regs->tctrl);
1452                 tempval |= TCTRL_VLINS;
1453
1454                 gfar_write(&priv->regs->tctrl, tempval);
1455
1456                 /* Enable VLAN tag extraction */
1457                 tempval = gfar_read(&priv->regs->rctrl);
1458                 tempval |= RCTRL_VLEX;
1459                 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1460                 gfar_write(&priv->regs->rctrl, tempval);
1461         } else {
1462                 /* Disable VLAN tag insertion */
1463                 tempval = gfar_read(&priv->regs->tctrl);
1464                 tempval &= ~TCTRL_VLINS;
1465                 gfar_write(&priv->regs->tctrl, tempval);
1466
1467                 /* Disable VLAN tag extraction */
1468                 tempval = gfar_read(&priv->regs->rctrl);
1469                 tempval &= ~RCTRL_VLEX;
1470                 /* If parse is no longer required, then disable parser */
1471                 if (tempval & RCTRL_REQ_PARSER)
1472                         tempval |= RCTRL_PRSDEP_INIT;
1473                 else
1474                         tempval &= ~RCTRL_PRSDEP_INIT;
1475                 gfar_write(&priv->regs->rctrl, tempval);
1476         }
1477
1478         gfar_change_mtu(dev, dev->mtu);
1479
1480         spin_unlock_irqrestore(&priv->rxlock, flags);
1481 }
1482
1483 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1484 {
1485         int tempsize, tempval;
1486         struct gfar_private *priv = netdev_priv(dev);
1487         int oldsize = priv->rx_buffer_size;
1488         int frame_size = new_mtu + ETH_HLEN;
1489
1490         if (priv->vlgrp)
1491                 frame_size += VLAN_HLEN;
1492
1493         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1494                 if (netif_msg_drv(priv))
1495                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1496                                         dev->name);
1497                 return -EINVAL;
1498         }
1499
1500         if (gfar_uses_fcb(priv))
1501                 frame_size += GMAC_FCB_LEN;
1502
1503         frame_size += priv->padding;
1504
1505         tempsize =
1506             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1507             INCREMENTAL_BUFFER_SIZE;
1508
1509         /* Only stop and start the controller if it isn't already
1510          * stopped, and we changed something */
1511         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1512                 stop_gfar(dev);
1513
1514         priv->rx_buffer_size = tempsize;
1515
1516         dev->mtu = new_mtu;
1517
1518         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1519         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1520
1521         /* If the mtu is larger than the max size for standard
1522          * ethernet frames (ie, a jumbo frame), then set maccfg2
1523          * to allow huge frames, and to check the length */
1524         tempval = gfar_read(&priv->regs->maccfg2);
1525
1526         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1527                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1528         else
1529                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1530
1531         gfar_write(&priv->regs->maccfg2, tempval);
1532
1533         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1534                 startup_gfar(dev);
1535
1536         return 0;
1537 }
1538
1539 /* gfar_reset_task gets scheduled when a packet has not been
1540  * transmitted after a set amount of time.
1541  * For now, assume that clearing out all the structures, and
1542  * starting over will fix the problem.
1543  */
1544 static void gfar_reset_task(struct work_struct *work)
1545 {
1546         struct gfar_private *priv = container_of(work, struct gfar_private,
1547                         reset_task);
1548         struct net_device *dev = priv->ndev;
1549
1550         if (dev->flags & IFF_UP) {
1551                 netif_stop_queue(dev);
1552                 stop_gfar(dev);
1553                 startup_gfar(dev);
1554                 netif_start_queue(dev);
1555         }
1556
1557         netif_tx_schedule_all(dev);
1558 }
1559
1560 static void gfar_timeout(struct net_device *dev)
1561 {
1562         struct gfar_private *priv = netdev_priv(dev);
1563
1564         dev->stats.tx_errors++;
1565         schedule_work(&priv->reset_task);
1566 }
1567
1568 /* Interrupt Handler for Transmit complete */
1569 static int gfar_clean_tx_ring(struct net_device *dev)
1570 {
1571         struct gfar_private *priv = netdev_priv(dev);
1572         struct txbd8 *bdp;
1573         struct txbd8 *lbdp = NULL;
1574         struct txbd8 *base = priv->tx_bd_base;
1575         struct sk_buff *skb;
1576         int skb_dirtytx;
1577         int tx_ring_size = priv->tx_ring_size;
1578         int frags = 0;
1579         int i;
1580         int howmany = 0;
1581         u32 lstatus;
1582
1583         bdp = priv->dirty_tx;
1584         skb_dirtytx = priv->skb_dirtytx;
1585
1586         while ((skb = priv->tx_skbuff[skb_dirtytx])) {
1587                 frags = skb_shinfo(skb)->nr_frags;
1588                 lbdp = skip_txbd(bdp, frags, base, tx_ring_size);
1589
1590                 lstatus = lbdp->lstatus;
1591
1592                 /* Only clean completed frames */
1593                 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
1594                                 (lstatus & BD_LENGTH_MASK))
1595                         break;
1596
1597                 dma_unmap_single(&priv->ofdev->dev,
1598                                 bdp->bufPtr,
1599                                 bdp->length,
1600                                 DMA_TO_DEVICE);
1601
1602                 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1603                 bdp = next_txbd(bdp, base, tx_ring_size);
1604
1605                 for (i = 0; i < frags; i++) {
1606                         dma_unmap_page(&priv->ofdev->dev,
1607                                         bdp->bufPtr,
1608                                         bdp->length,
1609                                         DMA_TO_DEVICE);
1610                         bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1611                         bdp = next_txbd(bdp, base, tx_ring_size);
1612                 }
1613
1614                 /*
1615                  * If there's room in the queue (limit it to rx_buffer_size)
1616                  * we add this skb back into the pool, if it's the right size
1617                  */
1618                 if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
1619                                 skb_recycle_check(skb, priv->rx_buffer_size +
1620                                         RXBUF_ALIGNMENT))
1621                         __skb_queue_head(&priv->rx_recycle, skb);
1622                 else
1623                         dev_kfree_skb_any(skb);
1624
1625                 priv->tx_skbuff[skb_dirtytx] = NULL;
1626
1627                 skb_dirtytx = (skb_dirtytx + 1) &
1628                         TX_RING_MOD_MASK(tx_ring_size);
1629
1630                 howmany++;
1631                 priv->num_txbdfree += frags + 1;
1632         }
1633
1634         /* If we freed a buffer, we can restart transmission, if necessary */
1635         if (netif_queue_stopped(dev) && priv->num_txbdfree)
1636                 netif_wake_queue(dev);
1637
1638         /* Update dirty indicators */
1639         priv->skb_dirtytx = skb_dirtytx;
1640         priv->dirty_tx = bdp;
1641
1642         dev->stats.tx_packets += howmany;
1643
1644         return howmany;
1645 }
1646
1647 static void gfar_schedule_cleanup(struct net_device *dev)
1648 {
1649         struct gfar_private *priv = netdev_priv(dev);
1650         unsigned long flags;
1651
1652         spin_lock_irqsave(&priv->txlock, flags);
1653         spin_lock(&priv->rxlock);
1654
1655         if (napi_schedule_prep(&priv->napi)) {
1656                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
1657                 __napi_schedule(&priv->napi);
1658         } else {
1659                 /*
1660                  * Clear IEVENT, so interrupts aren't called again
1661                  * because of the packets that have already arrived.
1662                  */
1663                 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1664         }
1665
1666         spin_unlock(&priv->rxlock);
1667         spin_unlock_irqrestore(&priv->txlock, flags);
1668 }
1669
1670 /* Interrupt Handler for Transmit complete */
1671 static irqreturn_t gfar_transmit(int irq, void *dev_id)
1672 {
1673         gfar_schedule_cleanup((struct net_device *)dev_id);
1674         return IRQ_HANDLED;
1675 }
1676
1677 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1678                 struct sk_buff *skb)
1679 {
1680         struct gfar_private *priv = netdev_priv(dev);
1681         u32 lstatus;
1682
1683         bdp->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1684                         priv->rx_buffer_size, DMA_FROM_DEVICE);
1685
1686         lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
1687
1688         if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
1689                 lstatus |= BD_LFLAG(RXBD_WRAP);
1690
1691         eieio();
1692
1693         bdp->lstatus = lstatus;
1694 }
1695
1696
1697 struct sk_buff * gfar_new_skb(struct net_device *dev)
1698 {
1699         unsigned int alignamount;
1700         struct gfar_private *priv = netdev_priv(dev);
1701         struct sk_buff *skb = NULL;
1702
1703         skb = __skb_dequeue(&priv->rx_recycle);
1704         if (!skb)
1705                 skb = netdev_alloc_skb(dev,
1706                                 priv->rx_buffer_size + RXBUF_ALIGNMENT);
1707
1708         if (!skb)
1709                 return NULL;
1710
1711         alignamount = RXBUF_ALIGNMENT -
1712                 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1));
1713
1714         /* We need the data buffer to be aligned properly.  We will reserve
1715          * as many bytes as needed to align the data properly
1716          */
1717         skb_reserve(skb, alignamount);
1718
1719         return skb;
1720 }
1721
1722 static inline void count_errors(unsigned short status, struct net_device *dev)
1723 {
1724         struct gfar_private *priv = netdev_priv(dev);
1725         struct net_device_stats *stats = &dev->stats;
1726         struct gfar_extra_stats *estats = &priv->extra_stats;
1727
1728         /* If the packet was truncated, none of the other errors
1729          * matter */
1730         if (status & RXBD_TRUNCATED) {
1731                 stats->rx_length_errors++;
1732
1733                 estats->rx_trunc++;
1734
1735                 return;
1736         }
1737         /* Count the errors, if there were any */
1738         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1739                 stats->rx_length_errors++;
1740
1741                 if (status & RXBD_LARGE)
1742                         estats->rx_large++;
1743                 else
1744                         estats->rx_short++;
1745         }
1746         if (status & RXBD_NONOCTET) {
1747                 stats->rx_frame_errors++;
1748                 estats->rx_nonoctet++;
1749         }
1750         if (status & RXBD_CRCERR) {
1751                 estats->rx_crcerr++;
1752                 stats->rx_crc_errors++;
1753         }
1754         if (status & RXBD_OVERRUN) {
1755                 estats->rx_overrun++;
1756                 stats->rx_crc_errors++;
1757         }
1758 }
1759
1760 irqreturn_t gfar_receive(int irq, void *dev_id)
1761 {
1762         gfar_schedule_cleanup((struct net_device *)dev_id);
1763         return IRQ_HANDLED;
1764 }
1765
1766 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1767 {
1768         /* If valid headers were found, and valid sums
1769          * were verified, then we tell the kernel that no
1770          * checksumming is necessary.  Otherwise, it is */
1771         if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
1772                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1773         else
1774                 skb->ip_summed = CHECKSUM_NONE;
1775 }
1776
1777
1778 /* gfar_process_frame() -- handle one incoming packet if skb
1779  * isn't NULL.  */
1780 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1781                               int amount_pull)
1782 {
1783         struct gfar_private *priv = netdev_priv(dev);
1784         struct rxfcb *fcb = NULL;
1785
1786         int ret;
1787
1788         /* fcb is at the beginning if exists */
1789         fcb = (struct rxfcb *)skb->data;
1790
1791         /* Remove the FCB from the skb */
1792         /* Remove the padded bytes, if there are any */
1793         if (amount_pull)
1794                 skb_pull(skb, amount_pull);
1795
1796         if (priv->rx_csum_enable)
1797                 gfar_rx_checksum(skb, fcb);
1798
1799         /* Tell the skb what kind of packet this is */
1800         skb->protocol = eth_type_trans(skb, dev);
1801
1802         /* Send the packet up the stack */
1803         if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN)))
1804                 ret = vlan_hwaccel_receive_skb(skb, priv->vlgrp, fcb->vlctl);
1805         else
1806                 ret = netif_receive_skb(skb);
1807
1808         if (NET_RX_DROP == ret)
1809                 priv->extra_stats.kernel_dropped++;
1810
1811         return 0;
1812 }
1813
1814 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1815  *   until the budget/quota has been reached. Returns the number
1816  *   of frames handled
1817  */
1818 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1819 {
1820         struct rxbd8 *bdp, *base;
1821         struct sk_buff *skb;
1822         int pkt_len;
1823         int amount_pull;
1824         int howmany = 0;
1825         struct gfar_private *priv = netdev_priv(dev);
1826
1827         /* Get the first full descriptor */
1828         bdp = priv->cur_rx;
1829         base = priv->rx_bd_base;
1830
1831         amount_pull = (gfar_uses_fcb(priv) ? GMAC_FCB_LEN : 0) +
1832                 priv->padding;
1833
1834         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1835                 struct sk_buff *newskb;
1836                 rmb();
1837
1838                 /* Add another skb for the future */
1839                 newskb = gfar_new_skb(dev);
1840
1841                 skb = priv->rx_skbuff[priv->skb_currx];
1842
1843                 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
1844                                 priv->rx_buffer_size, DMA_FROM_DEVICE);
1845
1846                 /* We drop the frame if we failed to allocate a new buffer */
1847                 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1848                                  bdp->status & RXBD_ERR)) {
1849                         count_errors(bdp->status, dev);
1850
1851                         if (unlikely(!newskb))
1852                                 newskb = skb;
1853                         else if (skb) {
1854                                 /*
1855                                  * We need to reset ->data to what it
1856                                  * was before gfar_new_skb() re-aligned
1857                                  * it to an RXBUF_ALIGNMENT boundary
1858                                  * before we put the skb back on the
1859                                  * recycle list.
1860                                  */
1861                                 skb->data = skb->head + NET_SKB_PAD;
1862                                 __skb_queue_head(&priv->rx_recycle, skb);
1863                         }
1864                 } else {
1865                         /* Increment the number of packets */
1866                         dev->stats.rx_packets++;
1867                         howmany++;
1868
1869                         if (likely(skb)) {
1870                                 pkt_len = bdp->length - ETH_FCS_LEN;
1871                                 /* Remove the FCS from the packet length */
1872                                 skb_put(skb, pkt_len);
1873                                 dev->stats.rx_bytes += pkt_len;
1874
1875                                 if (in_irq() || irqs_disabled())
1876                                         printk("Interrupt problem!\n");
1877                                 gfar_process_frame(dev, skb, amount_pull);
1878
1879                         } else {
1880                                 if (netif_msg_rx_err(priv))
1881                                         printk(KERN_WARNING
1882                                                "%s: Missing skb!\n", dev->name);
1883                                 dev->stats.rx_dropped++;
1884                                 priv->extra_stats.rx_skbmissing++;
1885                         }
1886
1887                 }
1888
1889                 priv->rx_skbuff[priv->skb_currx] = newskb;
1890
1891                 /* Setup the new bdp */
1892                 gfar_new_rxbdp(dev, bdp, newskb);
1893
1894                 /* Update to the next pointer */
1895                 bdp = next_bd(bdp, base, priv->rx_ring_size);
1896
1897                 /* update to point at the next skb */
1898                 priv->skb_currx =
1899                     (priv->skb_currx + 1) &
1900                     RX_RING_MOD_MASK(priv->rx_ring_size);
1901         }
1902
1903         /* Update the current rxbd pointer to be the next one */
1904         priv->cur_rx = bdp;
1905
1906         return howmany;
1907 }
1908
1909 static int gfar_poll(struct napi_struct *napi, int budget)
1910 {
1911         struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
1912         struct net_device *dev = priv->ndev;
1913         int tx_cleaned = 0;
1914         int rx_cleaned = 0;
1915         unsigned long flags;
1916
1917         /* Clear IEVENT, so interrupts aren't called again
1918          * because of the packets that have already arrived */
1919         gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1920
1921         /* If we fail to get the lock, don't bother with the TX BDs */
1922         if (spin_trylock_irqsave(&priv->txlock, flags)) {
1923                 tx_cleaned = gfar_clean_tx_ring(dev);
1924                 spin_unlock_irqrestore(&priv->txlock, flags);
1925         }
1926
1927         rx_cleaned = gfar_clean_rx_ring(dev, budget);
1928
1929         if (tx_cleaned)
1930                 return budget;
1931
1932         if (rx_cleaned < budget) {
1933                 napi_complete(napi);
1934
1935                 /* Clear the halt bit in RSTAT */
1936                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1937
1938                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
1939
1940                 /* If we are coalescing interrupts, update the timer */
1941                 /* Otherwise, clear it */
1942                 if (likely(priv->rxcoalescing)) {
1943                         gfar_write(&priv->regs->rxic, 0);
1944                         gfar_write(&priv->regs->rxic, priv->rxic);
1945                 }
1946                 if (likely(priv->txcoalescing)) {
1947                         gfar_write(&priv->regs->txic, 0);
1948                         gfar_write(&priv->regs->txic, priv->txic);
1949                 }
1950         }
1951
1952         return rx_cleaned;
1953 }
1954
1955 #ifdef CONFIG_NET_POLL_CONTROLLER
1956 /*
1957  * Polling 'interrupt' - used by things like netconsole to send skbs
1958  * without having to re-enable interrupts. It's not called while
1959  * the interrupt routine is executing.
1960  */
1961 static void gfar_netpoll(struct net_device *dev)
1962 {
1963         struct gfar_private *priv = netdev_priv(dev);
1964
1965         /* If the device has multiple interrupts, run tx/rx */
1966         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1967                 disable_irq(priv->interruptTransmit);
1968                 disable_irq(priv->interruptReceive);
1969                 disable_irq(priv->interruptError);
1970                 gfar_interrupt(priv->interruptTransmit, dev);
1971                 enable_irq(priv->interruptError);
1972                 enable_irq(priv->interruptReceive);
1973                 enable_irq(priv->interruptTransmit);
1974         } else {
1975                 disable_irq(priv->interruptTransmit);
1976                 gfar_interrupt(priv->interruptTransmit, dev);
1977                 enable_irq(priv->interruptTransmit);
1978         }
1979 }
1980 #endif
1981
1982 /* The interrupt handler for devices with one interrupt */
1983 static irqreturn_t gfar_interrupt(int irq, void *dev_id)
1984 {
1985         struct net_device *dev = dev_id;
1986         struct gfar_private *priv = netdev_priv(dev);
1987
1988         /* Save ievent for future reference */
1989         u32 events = gfar_read(&priv->regs->ievent);
1990
1991         /* Check for reception */
1992         if (events & IEVENT_RX_MASK)
1993                 gfar_receive(irq, dev_id);
1994
1995         /* Check for transmit completion */
1996         if (events & IEVENT_TX_MASK)
1997                 gfar_transmit(irq, dev_id);
1998
1999         /* Check for errors */
2000         if (events & IEVENT_ERR_MASK)
2001                 gfar_error(irq, dev_id);
2002
2003         return IRQ_HANDLED;
2004 }
2005
2006 /* Called every time the controller might need to be made
2007  * aware of new link state.  The PHY code conveys this
2008  * information through variables in the phydev structure, and this
2009  * function converts those variables into the appropriate
2010  * register values, and can bring down the device if needed.
2011  */
2012 static void adjust_link(struct net_device *dev)
2013 {
2014         struct gfar_private *priv = netdev_priv(dev);
2015         struct gfar __iomem *regs = priv->regs;
2016         unsigned long flags;
2017         struct phy_device *phydev = priv->phydev;
2018         int new_state = 0;
2019
2020         spin_lock_irqsave(&priv->txlock, flags);
2021         if (phydev->link) {
2022                 u32 tempval = gfar_read(&regs->maccfg2);
2023                 u32 ecntrl = gfar_read(&regs->ecntrl);
2024
2025                 /* Now we make sure that we can be in full duplex mode.
2026                  * If not, we operate in half-duplex mode. */
2027                 if (phydev->duplex != priv->oldduplex) {
2028                         new_state = 1;
2029                         if (!(phydev->duplex))
2030                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
2031                         else
2032                                 tempval |= MACCFG2_FULL_DUPLEX;
2033
2034                         priv->oldduplex = phydev->duplex;
2035                 }
2036
2037                 if (phydev->speed != priv->oldspeed) {
2038                         new_state = 1;
2039                         switch (phydev->speed) {
2040                         case 1000:
2041                                 tempval =
2042                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
2043
2044                                 ecntrl &= ~(ECNTRL_R100);
2045                                 break;
2046                         case 100:
2047                         case 10:
2048                                 tempval =
2049                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
2050
2051                                 /* Reduced mode distinguishes
2052                                  * between 10 and 100 */
2053                                 if (phydev->speed == SPEED_100)
2054                                         ecntrl |= ECNTRL_R100;
2055                                 else
2056                                         ecntrl &= ~(ECNTRL_R100);
2057                                 break;
2058                         default:
2059                                 if (netif_msg_link(priv))
2060                                         printk(KERN_WARNING
2061                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
2062                                                 dev->name, phydev->speed);
2063                                 break;
2064                         }
2065
2066                         priv->oldspeed = phydev->speed;
2067                 }
2068
2069                 gfar_write(&regs->maccfg2, tempval);
2070                 gfar_write(&regs->ecntrl, ecntrl);
2071
2072                 if (!priv->oldlink) {
2073                         new_state = 1;
2074                         priv->oldlink = 1;
2075                 }
2076         } else if (priv->oldlink) {
2077                 new_state = 1;
2078                 priv->oldlink = 0;
2079                 priv->oldspeed = 0;
2080                 priv->oldduplex = -1;
2081         }
2082
2083         if (new_state && netif_msg_link(priv))
2084                 phy_print_status(phydev);
2085
2086         spin_unlock_irqrestore(&priv->txlock, flags);
2087 }
2088
2089 /* Update the hash table based on the current list of multicast
2090  * addresses we subscribe to.  Also, change the promiscuity of
2091  * the device based on the flags (this function is called
2092  * whenever dev->flags is changed */
2093 static void gfar_set_multi(struct net_device *dev)
2094 {
2095         struct dev_mc_list *mc_ptr;
2096         struct gfar_private *priv = netdev_priv(dev);
2097         struct gfar __iomem *regs = priv->regs;
2098         u32 tempval;
2099
2100         if(dev->flags & IFF_PROMISC) {
2101                 /* Set RCTRL to PROM */
2102                 tempval = gfar_read(&regs->rctrl);
2103                 tempval |= RCTRL_PROM;
2104                 gfar_write(&regs->rctrl, tempval);
2105         } else {
2106                 /* Set RCTRL to not PROM */
2107                 tempval = gfar_read(&regs->rctrl);
2108                 tempval &= ~(RCTRL_PROM);
2109                 gfar_write(&regs->rctrl, tempval);
2110         }
2111
2112         if(dev->flags & IFF_ALLMULTI) {
2113                 /* Set the hash to rx all multicast frames */
2114                 gfar_write(&regs->igaddr0, 0xffffffff);
2115                 gfar_write(&regs->igaddr1, 0xffffffff);
2116                 gfar_write(&regs->igaddr2, 0xffffffff);
2117                 gfar_write(&regs->igaddr3, 0xffffffff);
2118                 gfar_write(&regs->igaddr4, 0xffffffff);
2119                 gfar_write(&regs->igaddr5, 0xffffffff);
2120                 gfar_write(&regs->igaddr6, 0xffffffff);
2121                 gfar_write(&regs->igaddr7, 0xffffffff);
2122                 gfar_write(&regs->gaddr0, 0xffffffff);
2123                 gfar_write(&regs->gaddr1, 0xffffffff);
2124                 gfar_write(&regs->gaddr2, 0xffffffff);
2125                 gfar_write(&regs->gaddr3, 0xffffffff);
2126                 gfar_write(&regs->gaddr4, 0xffffffff);
2127                 gfar_write(&regs->gaddr5, 0xffffffff);
2128                 gfar_write(&regs->gaddr6, 0xffffffff);
2129                 gfar_write(&regs->gaddr7, 0xffffffff);
2130         } else {
2131                 int em_num;
2132                 int idx;
2133
2134                 /* zero out the hash */
2135                 gfar_write(&regs->igaddr0, 0x0);
2136                 gfar_write(&regs->igaddr1, 0x0);
2137                 gfar_write(&regs->igaddr2, 0x0);
2138                 gfar_write(&regs->igaddr3, 0x0);
2139                 gfar_write(&regs->igaddr4, 0x0);
2140                 gfar_write(&regs->igaddr5, 0x0);
2141                 gfar_write(&regs->igaddr6, 0x0);
2142                 gfar_write(&regs->igaddr7, 0x0);
2143                 gfar_write(&regs->gaddr0, 0x0);
2144                 gfar_write(&regs->gaddr1, 0x0);
2145                 gfar_write(&regs->gaddr2, 0x0);
2146                 gfar_write(&regs->gaddr3, 0x0);
2147                 gfar_write(&regs->gaddr4, 0x0);
2148                 gfar_write(&regs->gaddr5, 0x0);
2149                 gfar_write(&regs->gaddr6, 0x0);
2150                 gfar_write(&regs->gaddr7, 0x0);
2151
2152                 /* If we have extended hash tables, we need to
2153                  * clear the exact match registers to prepare for
2154                  * setting them */
2155                 if (priv->extended_hash) {
2156                         em_num = GFAR_EM_NUM + 1;
2157                         gfar_clear_exact_match(dev);
2158                         idx = 1;
2159                 } else {
2160                         idx = 0;
2161                         em_num = 0;
2162                 }
2163
2164                 if(dev->mc_count == 0)
2165                         return;
2166
2167                 /* Parse the list, and set the appropriate bits */
2168                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
2169                         if (idx < em_num) {
2170                                 gfar_set_mac_for_addr(dev, idx,
2171                                                 mc_ptr->dmi_addr);
2172                                 idx++;
2173                         } else
2174                                 gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
2175                 }
2176         }
2177
2178         return;
2179 }
2180
2181
2182 /* Clears each of the exact match registers to zero, so they
2183  * don't interfere with normal reception */
2184 static void gfar_clear_exact_match(struct net_device *dev)
2185 {
2186         int idx;
2187         u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0};
2188
2189         for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
2190                 gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr);
2191 }
2192
2193 /* Set the appropriate hash bit for the given addr */
2194 /* The algorithm works like so:
2195  * 1) Take the Destination Address (ie the multicast address), and
2196  * do a CRC on it (little endian), and reverse the bits of the
2197  * result.
2198  * 2) Use the 8 most significant bits as a hash into a 256-entry
2199  * table.  The table is controlled through 8 32-bit registers:
2200  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
2201  * gaddr7.  This means that the 3 most significant bits in the
2202  * hash index which gaddr register to use, and the 5 other bits
2203  * indicate which bit (assuming an IBM numbering scheme, which
2204  * for PowerPC (tm) is usually the case) in the register holds
2205  * the entry. */
2206 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2207 {
2208         u32 tempval;
2209         struct gfar_private *priv = netdev_priv(dev);
2210         u32 result = ether_crc(MAC_ADDR_LEN, addr);
2211         int width = priv->hash_width;
2212         u8 whichbit = (result >> (32 - width)) & 0x1f;
2213         u8 whichreg = result >> (32 - width + 5);
2214         u32 value = (1 << (31-whichbit));
2215
2216         tempval = gfar_read(priv->hash_regs[whichreg]);
2217         tempval |= value;
2218         gfar_write(priv->hash_regs[whichreg], tempval);
2219
2220         return;
2221 }
2222
2223
2224 /* There are multiple MAC Address register pairs on some controllers
2225  * This function sets the numth pair to a given address
2226  */
2227 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2228 {
2229         struct gfar_private *priv = netdev_priv(dev);
2230         int idx;
2231         char tmpbuf[MAC_ADDR_LEN];
2232         u32 tempval;
2233         u32 __iomem *macptr = &priv->regs->macstnaddr1;
2234
2235         macptr += num*2;
2236
2237         /* Now copy it into the mac registers backwards, cuz */
2238         /* little endian is silly */
2239         for (idx = 0; idx < MAC_ADDR_LEN; idx++)
2240                 tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx];
2241
2242         gfar_write(macptr, *((u32 *) (tmpbuf)));
2243
2244         tempval = *((u32 *) (tmpbuf + 4));
2245
2246         gfar_write(macptr+1, tempval);
2247 }
2248
2249 /* GFAR error interrupt handler */
2250 static irqreturn_t gfar_error(int irq, void *dev_id)
2251 {
2252         struct net_device *dev = dev_id;
2253         struct gfar_private *priv = netdev_priv(dev);
2254
2255         /* Save ievent for future reference */
2256         u32 events = gfar_read(&priv->regs->ievent);
2257
2258         /* Clear IEVENT */
2259         gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK);
2260
2261         /* Magic Packet is not an error. */
2262         if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
2263             (events & IEVENT_MAG))
2264                 events &= ~IEVENT_MAG;
2265
2266         /* Hmm... */
2267         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2268                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2269                        dev->name, events, gfar_read(&priv->regs->imask));
2270
2271         /* Update the error counters */
2272         if (events & IEVENT_TXE) {
2273                 dev->stats.tx_errors++;
2274
2275                 if (events & IEVENT_LC)
2276                         dev->stats.tx_window_errors++;
2277                 if (events & IEVENT_CRL)
2278                         dev->stats.tx_aborted_errors++;
2279                 if (events & IEVENT_XFUN) {
2280                         if (netif_msg_tx_err(priv))
2281                                 printk(KERN_DEBUG "%s: TX FIFO underrun, "
2282                                        "packet dropped.\n", dev->name);
2283                         dev->stats.tx_dropped++;
2284                         priv->extra_stats.tx_underrun++;
2285
2286                         /* Reactivate the Tx Queues */
2287                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
2288                 }
2289                 if (netif_msg_tx_err(priv))
2290                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
2291         }
2292         if (events & IEVENT_BSY) {
2293                 dev->stats.rx_errors++;
2294                 priv->extra_stats.rx_bsy++;
2295
2296                 gfar_receive(irq, dev_id);
2297
2298                 if (netif_msg_rx_err(priv))
2299                         printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2300                                dev->name, gfar_read(&priv->regs->rstat));
2301         }
2302         if (events & IEVENT_BABR) {
2303                 dev->stats.rx_errors++;
2304                 priv->extra_stats.rx_babr++;
2305
2306                 if (netif_msg_rx_err(priv))
2307                         printk(KERN_DEBUG "%s: babbling RX error\n", dev->name);
2308         }
2309         if (events & IEVENT_EBERR) {
2310                 priv->extra_stats.eberr++;
2311                 if (netif_msg_rx_err(priv))
2312                         printk(KERN_DEBUG "%s: bus error\n", dev->name);
2313         }
2314         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
2315                 printk(KERN_DEBUG "%s: control frame\n", dev->name);
2316
2317         if (events & IEVENT_BABT) {
2318                 priv->extra_stats.tx_babt++;
2319                 if (netif_msg_tx_err(priv))
2320                         printk(KERN_DEBUG "%s: babbling TX error\n", dev->name);
2321         }
2322         return IRQ_HANDLED;
2323 }
2324
2325 /* work with hotplug and coldplug */
2326 MODULE_ALIAS("platform:fsl-gianfar");
2327
2328 static struct of_device_id gfar_match[] =
2329 {
2330         {
2331                 .type = "network",
2332                 .compatible = "gianfar",
2333         },
2334         {},
2335 };
2336
2337 /* Structure for a device driver */
2338 static struct of_platform_driver gfar_driver = {
2339         .name = "fsl-gianfar",
2340         .match_table = gfar_match,
2341
2342         .probe = gfar_probe,
2343         .remove = gfar_remove,
2344         .suspend = gfar_suspend,
2345         .resume = gfar_resume,
2346 };
2347
2348 static int __init gfar_init(void)
2349 {
2350         return of_register_platform_driver(&gfar_driver);
2351 }
2352
2353 static void __exit gfar_exit(void)
2354 {
2355         of_unregister_platform_driver(&gfar_driver);
2356 }
2357
2358 module_init(gfar_init);
2359 module_exit(gfar_exit);
2360