gianfar: Factor out RX BDs initialization from gfar_new_rxbdp()
[linux-2.6.git] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * This driver is designed for the non-CPM ethernet controllers
6  * on the 85xx and 83xx family of integrated processors
7  * Based on 8260_io/fcc_enet.c
8  *
9  * Author: Andy Fleming
10  * Maintainer: Kumar Gala
11  *
12  * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13  * Copyright (c) 2007 MontaVista Software, Inc.
14  *
15  * This program is free software; you can redistribute  it and/or modify it
16  * under  the terms of  the GNU General  Public License as published by the
17  * Free Software Foundation;  either version 2 of the  License, or (at your
18  * option) any later version.
19  *
20  *  Gianfar:  AKA Lambda Draconis, "Dragon"
21  *  RA 11 31 24.2
22  *  Dec +69 19 52
23  *  V 3.84
24  *  B-V +1.62
25  *
26  *  Theory of operation
27  *
28  *  The driver is initialized through of_device. Configuration information
29  *  is therefore conveyed through an OF-style device tree.
30  *
31  *  The Gianfar Ethernet Controller uses a ring of buffer
32  *  descriptors.  The beginning is indicated by a register
33  *  pointing to the physical address of the start of the ring.
34  *  The end is determined by a "wrap" bit being set in the
35  *  last descriptor of the ring.
36  *
37  *  When a packet is received, the RXF bit in the
38  *  IEVENT register is set, triggering an interrupt when the
39  *  corresponding bit in the IMASK register is also set (if
40  *  interrupt coalescing is active, then the interrupt may not
41  *  happen immediately, but will wait until either a set number
42  *  of frames or amount of time have passed).  In NAPI, the
43  *  interrupt handler will signal there is work to be done, and
44  *  exit. This method will start at the last known empty
45  *  descriptor, and process every subsequent descriptor until there
46  *  are none left with data (NAPI will stop after a set number of
47  *  packets to give time to other tasks, but will eventually
48  *  process all the packets).  The data arrives inside a
49  *  pre-allocated skb, and so after the skb is passed up to the
50  *  stack, a new skb must be allocated, and the address field in
51  *  the buffer descriptor must be updated to indicate this new
52  *  skb.
53  *
54  *  When the kernel requests that a packet be transmitted, the
55  *  driver starts where it left off last time, and points the
56  *  descriptor at the buffer which was passed in.  The driver
57  *  then informs the DMA engine that there are packets ready to
58  *  be transmitted.  Once the controller is finished transmitting
59  *  the packet, an interrupt may be triggered (under the same
60  *  conditions as for reception, but depending on the TXF bit).
61  *  The driver then cleans up the buffer.
62  */
63
64 #include <linux/kernel.h>
65 #include <linux/string.h>
66 #include <linux/errno.h>
67 #include <linux/unistd.h>
68 #include <linux/slab.h>
69 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #include <linux/if_vlan.h>
76 #include <linux/spinlock.h>
77 #include <linux/mm.h>
78 #include <linux/of_mdio.h>
79 #include <linux/of_platform.h>
80 #include <linux/ip.h>
81 #include <linux/tcp.h>
82 #include <linux/udp.h>
83 #include <linux/in.h>
84
85 #include <asm/io.h>
86 #include <asm/irq.h>
87 #include <asm/uaccess.h>
88 #include <linux/module.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/crc32.h>
91 #include <linux/mii.h>
92 #include <linux/phy.h>
93 #include <linux/phy_fixed.h>
94 #include <linux/of.h>
95
96 #include "gianfar.h"
97 #include "fsl_pq_mdio.h"
98
99 #define TX_TIMEOUT      (1*HZ)
100 #undef BRIEF_GFAR_ERRORS
101 #undef VERBOSE_GFAR_ERRORS
102
103 const char gfar_driver_name[] = "Gianfar Ethernet";
104 const char gfar_driver_version[] = "1.3";
105
106 static int gfar_enet_open(struct net_device *dev);
107 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
108 static void gfar_reset_task(struct work_struct *work);
109 static void gfar_timeout(struct net_device *dev);
110 static int gfar_close(struct net_device *dev);
111 struct sk_buff *gfar_new_skb(struct net_device *dev);
112 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
113                 struct sk_buff *skb);
114 static int gfar_set_mac_address(struct net_device *dev);
115 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
116 static irqreturn_t gfar_error(int irq, void *dev_id);
117 static irqreturn_t gfar_transmit(int irq, void *dev_id);
118 static irqreturn_t gfar_interrupt(int irq, void *dev_id);
119 static void adjust_link(struct net_device *dev);
120 static void init_registers(struct net_device *dev);
121 static int init_phy(struct net_device *dev);
122 static int gfar_probe(struct of_device *ofdev,
123                 const struct of_device_id *match);
124 static int gfar_remove(struct of_device *ofdev);
125 static void free_skb_resources(struct gfar_private *priv);
126 static void gfar_set_multi(struct net_device *dev);
127 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
128 static void gfar_configure_serdes(struct net_device *dev);
129 static int gfar_poll(struct napi_struct *napi, int budget);
130 #ifdef CONFIG_NET_POLL_CONTROLLER
131 static void gfar_netpoll(struct net_device *dev);
132 #endif
133 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
134 static int gfar_clean_tx_ring(struct net_device *dev);
135 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
136                               int amount_pull);
137 static void gfar_vlan_rx_register(struct net_device *netdev,
138                                 struct vlan_group *grp);
139 void gfar_halt(struct net_device *dev);
140 static void gfar_halt_nodisable(struct net_device *dev);
141 void gfar_start(struct net_device *dev);
142 static void gfar_clear_exact_match(struct net_device *dev);
143 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
144 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
145
146 MODULE_AUTHOR("Freescale Semiconductor, Inc");
147 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
148 MODULE_LICENSE("GPL");
149
150 static void gfar_init_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
151                             dma_addr_t buf)
152 {
153         struct gfar_private *priv = netdev_priv(dev);
154         u32 lstatus;
155
156         bdp->bufPtr = buf;
157
158         lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
159         if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
160                 lstatus |= BD_LFLAG(RXBD_WRAP);
161
162         eieio();
163
164         bdp->lstatus = lstatus;
165 }
166
167 static int gfar_alloc_skb_resources(struct net_device *ndev)
168 {
169         struct txbd8 *txbdp;
170         struct rxbd8 *rxbdp;
171         void *vaddr;
172         int i;
173         struct gfar_private *priv = netdev_priv(ndev);
174         struct device *dev = &priv->ofdev->dev;
175
176         /* Allocate memory for the buffer descriptors */
177         vaddr = dma_alloc_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
178                                         sizeof(*rxbdp) * priv->rx_ring_size,
179                                    &priv->tx_bd_dma_base, GFP_KERNEL);
180         if (!vaddr) {
181                 if (netif_msg_ifup(priv))
182                         pr_err("%s: Could not allocate buffer descriptors!\n",
183                                ndev->name);
184                 return -ENOMEM;
185         }
186
187         priv->tx_bd_base = vaddr;
188
189         /* Start the rx descriptor ring where the tx ring leaves off */
190         vaddr = vaddr + sizeof(*txbdp) * priv->tx_ring_size;
191         priv->rx_bd_base = vaddr;
192
193         /* Setup the skbuff rings */
194         priv->tx_skbuff = kmalloc(sizeof(*priv->tx_skbuff) *
195                                   priv->tx_ring_size, GFP_KERNEL);
196         if (!priv->tx_skbuff) {
197                 if (netif_msg_ifup(priv))
198                         pr_err("%s: Could not allocate tx_skbuff\n",
199                                ndev->name);
200                 goto cleanup;
201         }
202
203         for (i = 0; i < priv->tx_ring_size; i++)
204                 priv->tx_skbuff[i] = NULL;
205
206         priv->rx_skbuff = kmalloc(sizeof(*priv->rx_skbuff) *
207                                   priv->rx_ring_size, GFP_KERNEL);
208         if (!priv->rx_skbuff) {
209                 if (netif_msg_ifup(priv))
210                         pr_err("%s: Could not allocate rx_skbuff\n",
211                                ndev->name);
212                 goto cleanup;
213         }
214
215         for (i = 0; i < priv->rx_ring_size; i++)
216                 priv->rx_skbuff[i] = NULL;
217
218         /* Initialize some variables in our dev structure */
219         priv->num_txbdfree = priv->tx_ring_size;
220         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
221         priv->cur_rx = priv->rx_bd_base;
222         priv->skb_curtx = priv->skb_dirtytx = 0;
223         priv->skb_currx = 0;
224
225         /* Initialize Transmit Descriptor Ring */
226         txbdp = priv->tx_bd_base;
227         for (i = 0; i < priv->tx_ring_size; i++) {
228                 txbdp->lstatus = 0;
229                 txbdp->bufPtr = 0;
230                 txbdp++;
231         }
232
233         /* Set the last descriptor in the ring to indicate wrap */
234         txbdp--;
235         txbdp->status |= TXBD_WRAP;
236
237         rxbdp = priv->rx_bd_base;
238         for (i = 0; i < priv->rx_ring_size; i++) {
239                 struct sk_buff *skb;
240
241                 skb = gfar_new_skb(ndev);
242                 if (!skb) {
243                         pr_err("%s: Can't allocate RX buffers\n", ndev->name);
244                         goto cleanup;
245                 }
246
247                 priv->rx_skbuff[i] = skb;
248
249                 gfar_new_rxbdp(ndev, rxbdp, skb);
250
251                 rxbdp++;
252         }
253
254         return 0;
255
256 cleanup:
257         free_skb_resources(priv);
258         return -ENOMEM;
259 }
260
261 static void gfar_init_mac(struct net_device *ndev)
262 {
263         struct gfar_private *priv = netdev_priv(ndev);
264         struct gfar __iomem *regs = priv->regs;
265         u32 rctrl = 0;
266         u32 tctrl = 0;
267         u32 attrs = 0;
268
269         /* enet DMA only understands physical addresses */
270         gfar_write(&regs->tbase0, priv->tx_bd_dma_base);
271         gfar_write(&regs->rbase0, priv->tx_bd_dma_base +
272                                   sizeof(*priv->tx_bd_base) *
273                                   priv->tx_ring_size);
274
275         /* Configure the coalescing support */
276         gfar_write(&regs->txic, 0);
277         if (priv->txcoalescing)
278                 gfar_write(&regs->txic, priv->txic);
279
280         gfar_write(&regs->rxic, 0);
281         if (priv->rxcoalescing)
282                 gfar_write(&regs->rxic, priv->rxic);
283
284         if (priv->rx_csum_enable)
285                 rctrl |= RCTRL_CHECKSUMMING;
286
287         if (priv->extended_hash) {
288                 rctrl |= RCTRL_EXTHASH;
289
290                 gfar_clear_exact_match(ndev);
291                 rctrl |= RCTRL_EMEN;
292         }
293
294         if (priv->padding) {
295                 rctrl &= ~RCTRL_PAL_MASK;
296                 rctrl |= RCTRL_PADDING(priv->padding);
297         }
298
299         /* keep vlan related bits if it's enabled */
300         if (priv->vlgrp) {
301                 rctrl |= RCTRL_VLEX | RCTRL_PRSDEP_INIT;
302                 tctrl |= TCTRL_VLINS;
303         }
304
305         /* Init rctrl based on our settings */
306         gfar_write(&regs->rctrl, rctrl);
307
308         if (ndev->features & NETIF_F_IP_CSUM)
309                 tctrl |= TCTRL_INIT_CSUM;
310
311         gfar_write(&regs->tctrl, tctrl);
312
313         /* Set the extraction length and index */
314         attrs = ATTRELI_EL(priv->rx_stash_size) |
315                 ATTRELI_EI(priv->rx_stash_index);
316
317         gfar_write(&regs->attreli, attrs);
318
319         /* Start with defaults, and add stashing or locking
320          * depending on the approprate variables */
321         attrs = ATTR_INIT_SETTINGS;
322
323         if (priv->bd_stash_en)
324                 attrs |= ATTR_BDSTASH;
325
326         if (priv->rx_stash_size != 0)
327                 attrs |= ATTR_BUFSTASH;
328
329         gfar_write(&regs->attr, attrs);
330
331         gfar_write(&regs->fifo_tx_thr, priv->fifo_threshold);
332         gfar_write(&regs->fifo_tx_starve, priv->fifo_starve);
333         gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
334 }
335
336 static const struct net_device_ops gfar_netdev_ops = {
337         .ndo_open = gfar_enet_open,
338         .ndo_start_xmit = gfar_start_xmit,
339         .ndo_stop = gfar_close,
340         .ndo_change_mtu = gfar_change_mtu,
341         .ndo_set_multicast_list = gfar_set_multi,
342         .ndo_tx_timeout = gfar_timeout,
343         .ndo_do_ioctl = gfar_ioctl,
344         .ndo_vlan_rx_register = gfar_vlan_rx_register,
345         .ndo_set_mac_address = eth_mac_addr,
346         .ndo_validate_addr = eth_validate_addr,
347 #ifdef CONFIG_NET_POLL_CONTROLLER
348         .ndo_poll_controller = gfar_netpoll,
349 #endif
350 };
351
352 /* Returns 1 if incoming frames use an FCB */
353 static inline int gfar_uses_fcb(struct gfar_private *priv)
354 {
355         return priv->vlgrp || priv->rx_csum_enable;
356 }
357
358 static int gfar_of_init(struct net_device *dev)
359 {
360         const char *model;
361         const char *ctype;
362         const void *mac_addr;
363         u64 addr, size;
364         int err = 0;
365         struct gfar_private *priv = netdev_priv(dev);
366         struct device_node *np = priv->node;
367         const u32 *stash;
368         const u32 *stash_len;
369         const u32 *stash_idx;
370
371         if (!np || !of_device_is_available(np))
372                 return -ENODEV;
373
374         /* get a pointer to the register memory */
375         addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
376         priv->regs = ioremap(addr, size);
377
378         if (priv->regs == NULL)
379                 return -ENOMEM;
380
381         priv->interruptTransmit = irq_of_parse_and_map(np, 0);
382
383         model = of_get_property(np, "model", NULL);
384
385         /* If we aren't the FEC we have multiple interrupts */
386         if (model && strcasecmp(model, "FEC")) {
387                 priv->interruptReceive = irq_of_parse_and_map(np, 1);
388
389                 priv->interruptError = irq_of_parse_and_map(np, 2);
390
391                 if (priv->interruptTransmit < 0 ||
392                                 priv->interruptReceive < 0 ||
393                                 priv->interruptError < 0) {
394                         err = -EINVAL;
395                         goto err_out;
396                 }
397         }
398
399         stash = of_get_property(np, "bd-stash", NULL);
400
401         if(stash) {
402                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
403                 priv->bd_stash_en = 1;
404         }
405
406         stash_len = of_get_property(np, "rx-stash-len", NULL);
407
408         if (stash_len)
409                 priv->rx_stash_size = *stash_len;
410
411         stash_idx = of_get_property(np, "rx-stash-idx", NULL);
412
413         if (stash_idx)
414                 priv->rx_stash_index = *stash_idx;
415
416         if (stash_len || stash_idx)
417                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
418
419         mac_addr = of_get_mac_address(np);
420         if (mac_addr)
421                 memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
422
423         if (model && !strcasecmp(model, "TSEC"))
424                 priv->device_flags =
425                         FSL_GIANFAR_DEV_HAS_GIGABIT |
426                         FSL_GIANFAR_DEV_HAS_COALESCE |
427                         FSL_GIANFAR_DEV_HAS_RMON |
428                         FSL_GIANFAR_DEV_HAS_MULTI_INTR;
429         if (model && !strcasecmp(model, "eTSEC"))
430                 priv->device_flags =
431                         FSL_GIANFAR_DEV_HAS_GIGABIT |
432                         FSL_GIANFAR_DEV_HAS_COALESCE |
433                         FSL_GIANFAR_DEV_HAS_RMON |
434                         FSL_GIANFAR_DEV_HAS_MULTI_INTR |
435                         FSL_GIANFAR_DEV_HAS_PADDING |
436                         FSL_GIANFAR_DEV_HAS_CSUM |
437                         FSL_GIANFAR_DEV_HAS_VLAN |
438                         FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
439                         FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
440
441         ctype = of_get_property(np, "phy-connection-type", NULL);
442
443         /* We only care about rgmii-id.  The rest are autodetected */
444         if (ctype && !strcmp(ctype, "rgmii-id"))
445                 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
446         else
447                 priv->interface = PHY_INTERFACE_MODE_MII;
448
449         if (of_get_property(np, "fsl,magic-packet", NULL))
450                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
451
452         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
453
454         /* Find the TBI PHY.  If it's not there, we don't support SGMII */
455         priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
456
457         return 0;
458
459 err_out:
460         iounmap(priv->regs);
461         return err;
462 }
463
464 /* Ioctl MII Interface */
465 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
466 {
467         struct gfar_private *priv = netdev_priv(dev);
468
469         if (!netif_running(dev))
470                 return -EINVAL;
471
472         if (!priv->phydev)
473                 return -ENODEV;
474
475         return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
476 }
477
478 /* Set up the ethernet device structure, private data,
479  * and anything else we need before we start */
480 static int gfar_probe(struct of_device *ofdev,
481                 const struct of_device_id *match)
482 {
483         u32 tempval;
484         struct net_device *dev = NULL;
485         struct gfar_private *priv = NULL;
486         int err = 0;
487         int len_devname;
488
489         /* Create an ethernet device instance */
490         dev = alloc_etherdev(sizeof (*priv));
491
492         if (NULL == dev)
493                 return -ENOMEM;
494
495         priv = netdev_priv(dev);
496         priv->ndev = dev;
497         priv->ofdev = ofdev;
498         priv->node = ofdev->node;
499         SET_NETDEV_DEV(dev, &ofdev->dev);
500
501         err = gfar_of_init(dev);
502
503         if (err)
504                 goto regs_fail;
505
506         spin_lock_init(&priv->txlock);
507         spin_lock_init(&priv->rxlock);
508         spin_lock_init(&priv->bflock);
509         INIT_WORK(&priv->reset_task, gfar_reset_task);
510
511         dev_set_drvdata(&ofdev->dev, priv);
512
513         /* Stop the DMA engine now, in case it was running before */
514         /* (The firmware could have used it, and left it running). */
515         gfar_halt(dev);
516
517         /* Reset MAC layer */
518         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
519
520         /* We need to delay at least 3 TX clocks */
521         udelay(2);
522
523         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
524         gfar_write(&priv->regs->maccfg1, tempval);
525
526         /* Initialize MACCFG2. */
527         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
528
529         /* Initialize ECNTRL */
530         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
531
532         /* Set the dev->base_addr to the gfar reg region */
533         dev->base_addr = (unsigned long) (priv->regs);
534
535         SET_NETDEV_DEV(dev, &ofdev->dev);
536
537         /* Fill in the dev structure */
538         dev->watchdog_timeo = TX_TIMEOUT;
539         netif_napi_add(dev, &priv->napi, gfar_poll, GFAR_DEV_WEIGHT);
540         dev->mtu = 1500;
541
542         dev->netdev_ops = &gfar_netdev_ops;
543         dev->ethtool_ops = &gfar_ethtool_ops;
544
545         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
546                 priv->rx_csum_enable = 1;
547                 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA;
548         } else
549                 priv->rx_csum_enable = 0;
550
551         priv->vlgrp = NULL;
552
553         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN)
554                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
555
556         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
557                 priv->extended_hash = 1;
558                 priv->hash_width = 9;
559
560                 priv->hash_regs[0] = &priv->regs->igaddr0;
561                 priv->hash_regs[1] = &priv->regs->igaddr1;
562                 priv->hash_regs[2] = &priv->regs->igaddr2;
563                 priv->hash_regs[3] = &priv->regs->igaddr3;
564                 priv->hash_regs[4] = &priv->regs->igaddr4;
565                 priv->hash_regs[5] = &priv->regs->igaddr5;
566                 priv->hash_regs[6] = &priv->regs->igaddr6;
567                 priv->hash_regs[7] = &priv->regs->igaddr7;
568                 priv->hash_regs[8] = &priv->regs->gaddr0;
569                 priv->hash_regs[9] = &priv->regs->gaddr1;
570                 priv->hash_regs[10] = &priv->regs->gaddr2;
571                 priv->hash_regs[11] = &priv->regs->gaddr3;
572                 priv->hash_regs[12] = &priv->regs->gaddr4;
573                 priv->hash_regs[13] = &priv->regs->gaddr5;
574                 priv->hash_regs[14] = &priv->regs->gaddr6;
575                 priv->hash_regs[15] = &priv->regs->gaddr7;
576
577         } else {
578                 priv->extended_hash = 0;
579                 priv->hash_width = 8;
580
581                 priv->hash_regs[0] = &priv->regs->gaddr0;
582                 priv->hash_regs[1] = &priv->regs->gaddr1;
583                 priv->hash_regs[2] = &priv->regs->gaddr2;
584                 priv->hash_regs[3] = &priv->regs->gaddr3;
585                 priv->hash_regs[4] = &priv->regs->gaddr4;
586                 priv->hash_regs[5] = &priv->regs->gaddr5;
587                 priv->hash_regs[6] = &priv->regs->gaddr6;
588                 priv->hash_regs[7] = &priv->regs->gaddr7;
589         }
590
591         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
592                 priv->padding = DEFAULT_PADDING;
593         else
594                 priv->padding = 0;
595
596         if (dev->features & NETIF_F_IP_CSUM)
597                 dev->hard_header_len += GMAC_FCB_LEN;
598
599         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
600         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
601         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
602         priv->num_txbdfree = DEFAULT_TX_RING_SIZE;
603
604         priv->txcoalescing = DEFAULT_TX_COALESCE;
605         priv->txic = DEFAULT_TXIC;
606         priv->rxcoalescing = DEFAULT_RX_COALESCE;
607         priv->rxic = DEFAULT_RXIC;
608
609         /* Enable most messages by default */
610         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
611
612         /* Carrier starts down, phylib will bring it up */
613         netif_carrier_off(dev);
614
615         err = register_netdev(dev);
616
617         if (err) {
618                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
619                                 dev->name);
620                 goto register_fail;
621         }
622
623         device_init_wakeup(&dev->dev,
624                 priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
625
626         /* fill out IRQ number and name fields */
627         len_devname = strlen(dev->name);
628         strncpy(&priv->int_name_tx[0], dev->name, len_devname);
629         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
630                 strncpy(&priv->int_name_tx[len_devname],
631                         "_tx", sizeof("_tx") + 1);
632
633                 strncpy(&priv->int_name_rx[0], dev->name, len_devname);
634                 strncpy(&priv->int_name_rx[len_devname],
635                         "_rx", sizeof("_rx") + 1);
636
637                 strncpy(&priv->int_name_er[0], dev->name, len_devname);
638                 strncpy(&priv->int_name_er[len_devname],
639                         "_er", sizeof("_er") + 1);
640         } else
641                 priv->int_name_tx[len_devname] = '\0';
642
643         /* Create all the sysfs files */
644         gfar_init_sysfs(dev);
645
646         /* Print out the device info */
647         printk(KERN_INFO DEVICE_NAME "%pM\n", dev->name, dev->dev_addr);
648
649         /* Even more device info helps when determining which kernel */
650         /* provided which set of benchmarks. */
651         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
652         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
653                dev->name, priv->rx_ring_size, priv->tx_ring_size);
654
655         return 0;
656
657 register_fail:
658         iounmap(priv->regs);
659 regs_fail:
660         if (priv->phy_node)
661                 of_node_put(priv->phy_node);
662         if (priv->tbi_node)
663                 of_node_put(priv->tbi_node);
664         free_netdev(dev);
665         return err;
666 }
667
668 static int gfar_remove(struct of_device *ofdev)
669 {
670         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
671
672         if (priv->phy_node)
673                 of_node_put(priv->phy_node);
674         if (priv->tbi_node)
675                 of_node_put(priv->tbi_node);
676
677         dev_set_drvdata(&ofdev->dev, NULL);
678
679         unregister_netdev(priv->ndev);
680         iounmap(priv->regs);
681         free_netdev(priv->ndev);
682
683         return 0;
684 }
685
686 #ifdef CONFIG_PM
687 static int gfar_suspend(struct of_device *ofdev, pm_message_t state)
688 {
689         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
690         struct net_device *dev = priv->ndev;
691         unsigned long flags;
692         u32 tempval;
693
694         int magic_packet = priv->wol_en &&
695                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
696
697         netif_device_detach(dev);
698
699         if (netif_running(dev)) {
700                 spin_lock_irqsave(&priv->txlock, flags);
701                 spin_lock(&priv->rxlock);
702
703                 gfar_halt_nodisable(dev);
704
705                 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
706                 tempval = gfar_read(&priv->regs->maccfg1);
707
708                 tempval &= ~MACCFG1_TX_EN;
709
710                 if (!magic_packet)
711                         tempval &= ~MACCFG1_RX_EN;
712
713                 gfar_write(&priv->regs->maccfg1, tempval);
714
715                 spin_unlock(&priv->rxlock);
716                 spin_unlock_irqrestore(&priv->txlock, flags);
717
718                 napi_disable(&priv->napi);
719
720                 if (magic_packet) {
721                         /* Enable interrupt on Magic Packet */
722                         gfar_write(&priv->regs->imask, IMASK_MAG);
723
724                         /* Enable Magic Packet mode */
725                         tempval = gfar_read(&priv->regs->maccfg2);
726                         tempval |= MACCFG2_MPEN;
727                         gfar_write(&priv->regs->maccfg2, tempval);
728                 } else {
729                         phy_stop(priv->phydev);
730                 }
731         }
732
733         return 0;
734 }
735
736 static int gfar_resume(struct of_device *ofdev)
737 {
738         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
739         struct net_device *dev = priv->ndev;
740         unsigned long flags;
741         u32 tempval;
742         int magic_packet = priv->wol_en &&
743                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
744
745         if (!netif_running(dev)) {
746                 netif_device_attach(dev);
747                 return 0;
748         }
749
750         if (!magic_packet && priv->phydev)
751                 phy_start(priv->phydev);
752
753         /* Disable Magic Packet mode, in case something
754          * else woke us up.
755          */
756
757         spin_lock_irqsave(&priv->txlock, flags);
758         spin_lock(&priv->rxlock);
759
760         tempval = gfar_read(&priv->regs->maccfg2);
761         tempval &= ~MACCFG2_MPEN;
762         gfar_write(&priv->regs->maccfg2, tempval);
763
764         gfar_start(dev);
765
766         spin_unlock(&priv->rxlock);
767         spin_unlock_irqrestore(&priv->txlock, flags);
768
769         netif_device_attach(dev);
770
771         napi_enable(&priv->napi);
772
773         return 0;
774 }
775 #else
776 #define gfar_suspend NULL
777 #define gfar_resume NULL
778 #endif
779
780 /* Reads the controller's registers to determine what interface
781  * connects it to the PHY.
782  */
783 static phy_interface_t gfar_get_interface(struct net_device *dev)
784 {
785         struct gfar_private *priv = netdev_priv(dev);
786         u32 ecntrl = gfar_read(&priv->regs->ecntrl);
787
788         if (ecntrl & ECNTRL_SGMII_MODE)
789                 return PHY_INTERFACE_MODE_SGMII;
790
791         if (ecntrl & ECNTRL_TBI_MODE) {
792                 if (ecntrl & ECNTRL_REDUCED_MODE)
793                         return PHY_INTERFACE_MODE_RTBI;
794                 else
795                         return PHY_INTERFACE_MODE_TBI;
796         }
797
798         if (ecntrl & ECNTRL_REDUCED_MODE) {
799                 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
800                         return PHY_INTERFACE_MODE_RMII;
801                 else {
802                         phy_interface_t interface = priv->interface;
803
804                         /*
805                          * This isn't autodetected right now, so it must
806                          * be set by the device tree or platform code.
807                          */
808                         if (interface == PHY_INTERFACE_MODE_RGMII_ID)
809                                 return PHY_INTERFACE_MODE_RGMII_ID;
810
811                         return PHY_INTERFACE_MODE_RGMII;
812                 }
813         }
814
815         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
816                 return PHY_INTERFACE_MODE_GMII;
817
818         return PHY_INTERFACE_MODE_MII;
819 }
820
821
822 /* Initializes driver's PHY state, and attaches to the PHY.
823  * Returns 0 on success.
824  */
825 static int init_phy(struct net_device *dev)
826 {
827         struct gfar_private *priv = netdev_priv(dev);
828         uint gigabit_support =
829                 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
830                 SUPPORTED_1000baseT_Full : 0;
831         phy_interface_t interface;
832
833         priv->oldlink = 0;
834         priv->oldspeed = 0;
835         priv->oldduplex = -1;
836
837         interface = gfar_get_interface(dev);
838
839         priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
840                                       interface);
841         if (!priv->phydev)
842                 priv->phydev = of_phy_connect_fixed_link(dev, &adjust_link,
843                                                          interface);
844         if (!priv->phydev) {
845                 dev_err(&dev->dev, "could not attach to PHY\n");
846                 return -ENODEV;
847         }
848
849         if (interface == PHY_INTERFACE_MODE_SGMII)
850                 gfar_configure_serdes(dev);
851
852         /* Remove any features not supported by the controller */
853         priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
854         priv->phydev->advertising = priv->phydev->supported;
855
856         return 0;
857 }
858
859 /*
860  * Initialize TBI PHY interface for communicating with the
861  * SERDES lynx PHY on the chip.  We communicate with this PHY
862  * through the MDIO bus on each controller, treating it as a
863  * "normal" PHY at the address found in the TBIPA register.  We assume
864  * that the TBIPA register is valid.  Either the MDIO bus code will set
865  * it to a value that doesn't conflict with other PHYs on the bus, or the
866  * value doesn't matter, as there are no other PHYs on the bus.
867  */
868 static void gfar_configure_serdes(struct net_device *dev)
869 {
870         struct gfar_private *priv = netdev_priv(dev);
871         struct phy_device *tbiphy;
872
873         if (!priv->tbi_node) {
874                 dev_warn(&dev->dev, "error: SGMII mode requires that the "
875                                     "device tree specify a tbi-handle\n");
876                 return;
877         }
878
879         tbiphy = of_phy_find_device(priv->tbi_node);
880         if (!tbiphy) {
881                 dev_err(&dev->dev, "error: Could not get TBI device\n");
882                 return;
883         }
884
885         /*
886          * If the link is already up, we must already be ok, and don't need to
887          * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
888          * everything for us?  Resetting it takes the link down and requires
889          * several seconds for it to come back.
890          */
891         if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
892                 return;
893
894         /* Single clk mode, mii mode off(for serdes communication) */
895         phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
896
897         phy_write(tbiphy, MII_ADVERTISE,
898                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
899                         ADVERTISE_1000XPSE_ASYM);
900
901         phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
902                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
903 }
904
905 static void init_registers(struct net_device *dev)
906 {
907         struct gfar_private *priv = netdev_priv(dev);
908
909         /* Clear IEVENT */
910         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
911
912         /* Initialize IMASK */
913         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
914
915         /* Init hash registers to zero */
916         gfar_write(&priv->regs->igaddr0, 0);
917         gfar_write(&priv->regs->igaddr1, 0);
918         gfar_write(&priv->regs->igaddr2, 0);
919         gfar_write(&priv->regs->igaddr3, 0);
920         gfar_write(&priv->regs->igaddr4, 0);
921         gfar_write(&priv->regs->igaddr5, 0);
922         gfar_write(&priv->regs->igaddr6, 0);
923         gfar_write(&priv->regs->igaddr7, 0);
924
925         gfar_write(&priv->regs->gaddr0, 0);
926         gfar_write(&priv->regs->gaddr1, 0);
927         gfar_write(&priv->regs->gaddr2, 0);
928         gfar_write(&priv->regs->gaddr3, 0);
929         gfar_write(&priv->regs->gaddr4, 0);
930         gfar_write(&priv->regs->gaddr5, 0);
931         gfar_write(&priv->regs->gaddr6, 0);
932         gfar_write(&priv->regs->gaddr7, 0);
933
934         /* Zero out the rmon mib registers if it has them */
935         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
936                 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib));
937
938                 /* Mask off the CAM interrupts */
939                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
940                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
941         }
942
943         /* Initialize the max receive buffer length */
944         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
945
946         /* Initialize the Minimum Frame Length Register */
947         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
948 }
949
950
951 /* Halt the receive and transmit queues */
952 static void gfar_halt_nodisable(struct net_device *dev)
953 {
954         struct gfar_private *priv = netdev_priv(dev);
955         struct gfar __iomem *regs = priv->regs;
956         u32 tempval;
957
958         /* Mask all interrupts */
959         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
960
961         /* Clear all interrupts */
962         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
963
964         /* Stop the DMA, and wait for it to stop */
965         tempval = gfar_read(&priv->regs->dmactrl);
966         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
967             != (DMACTRL_GRS | DMACTRL_GTS)) {
968                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
969                 gfar_write(&priv->regs->dmactrl, tempval);
970
971                 while (!(gfar_read(&priv->regs->ievent) &
972                          (IEVENT_GRSC | IEVENT_GTSC)))
973                         cpu_relax();
974         }
975 }
976
977 /* Halt the receive and transmit queues */
978 void gfar_halt(struct net_device *dev)
979 {
980         struct gfar_private *priv = netdev_priv(dev);
981         struct gfar __iomem *regs = priv->regs;
982         u32 tempval;
983
984         gfar_halt_nodisable(dev);
985
986         /* Disable Rx and Tx */
987         tempval = gfar_read(&regs->maccfg1);
988         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
989         gfar_write(&regs->maccfg1, tempval);
990 }
991
992 void stop_gfar(struct net_device *dev)
993 {
994         struct gfar_private *priv = netdev_priv(dev);
995         unsigned long flags;
996
997         phy_stop(priv->phydev);
998
999         /* Lock it down */
1000         spin_lock_irqsave(&priv->txlock, flags);
1001         spin_lock(&priv->rxlock);
1002
1003         gfar_halt(dev);
1004
1005         spin_unlock(&priv->rxlock);
1006         spin_unlock_irqrestore(&priv->txlock, flags);
1007
1008         /* Free the IRQs */
1009         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1010                 free_irq(priv->interruptError, dev);
1011                 free_irq(priv->interruptTransmit, dev);
1012                 free_irq(priv->interruptReceive, dev);
1013         } else {
1014                 free_irq(priv->interruptTransmit, dev);
1015         }
1016
1017         free_skb_resources(priv);
1018 }
1019
1020 /* If there are any tx skbs or rx skbs still around, free them.
1021  * Then free tx_skbuff and rx_skbuff */
1022 static void free_skb_resources(struct gfar_private *priv)
1023 {
1024         struct device *dev = &priv->ofdev->dev;
1025         struct rxbd8 *rxbdp;
1026         struct txbd8 *txbdp;
1027         int i, j;
1028
1029         /* Go through all the buffer descriptors and free their data buffers */
1030         txbdp = priv->tx_bd_base;
1031
1032         if (!priv->tx_skbuff)
1033                 goto skip_tx_skbuff;
1034
1035         for (i = 0; i < priv->tx_ring_size; i++) {
1036                 if (!priv->tx_skbuff[i])
1037                         continue;
1038
1039                 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
1040                                 txbdp->length, DMA_TO_DEVICE);
1041                 txbdp->lstatus = 0;
1042                 for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
1043                         txbdp++;
1044                         dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
1045                                         txbdp->length, DMA_TO_DEVICE);
1046                 }
1047                 txbdp++;
1048                 dev_kfree_skb_any(priv->tx_skbuff[i]);
1049                 priv->tx_skbuff[i] = NULL;
1050         }
1051
1052         kfree(priv->tx_skbuff);
1053 skip_tx_skbuff:
1054
1055         rxbdp = priv->rx_bd_base;
1056
1057         if (!priv->rx_skbuff)
1058                 goto skip_rx_skbuff;
1059
1060         for (i = 0; i < priv->rx_ring_size; i++) {
1061                 if (priv->rx_skbuff[i]) {
1062                         dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
1063                                          priv->rx_buffer_size,
1064                                         DMA_FROM_DEVICE);
1065                         dev_kfree_skb_any(priv->rx_skbuff[i]);
1066                         priv->rx_skbuff[i] = NULL;
1067                 }
1068
1069                 rxbdp->lstatus = 0;
1070                 rxbdp->bufPtr = 0;
1071                 rxbdp++;
1072         }
1073
1074         kfree(priv->rx_skbuff);
1075 skip_rx_skbuff:
1076
1077         dma_free_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
1078                                sizeof(*rxbdp) * priv->rx_ring_size,
1079                           priv->tx_bd_base, priv->tx_bd_dma_base);
1080 }
1081
1082 void gfar_start(struct net_device *dev)
1083 {
1084         struct gfar_private *priv = netdev_priv(dev);
1085         struct gfar __iomem *regs = priv->regs;
1086         u32 tempval;
1087
1088         /* Enable Rx and Tx in MACCFG1 */
1089         tempval = gfar_read(&regs->maccfg1);
1090         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
1091         gfar_write(&regs->maccfg1, tempval);
1092
1093         /* Initialize DMACTRL to have WWR and WOP */
1094         tempval = gfar_read(&priv->regs->dmactrl);
1095         tempval |= DMACTRL_INIT_SETTINGS;
1096         gfar_write(&priv->regs->dmactrl, tempval);
1097
1098         /* Make sure we aren't stopped */
1099         tempval = gfar_read(&priv->regs->dmactrl);
1100         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
1101         gfar_write(&priv->regs->dmactrl, tempval);
1102
1103         /* Clear THLT/RHLT, so that the DMA starts polling now */
1104         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
1105         gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
1106
1107         /* Unmask the interrupts we look for */
1108         gfar_write(&regs->imask, IMASK_DEFAULT);
1109
1110         dev->trans_start = jiffies;
1111 }
1112
1113 /* Bring the controller up and running */
1114 int startup_gfar(struct net_device *ndev)
1115 {
1116         struct gfar_private *priv = netdev_priv(ndev);
1117         struct gfar __iomem *regs = priv->regs;
1118         int err;
1119
1120         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1121
1122         err = gfar_alloc_skb_resources(ndev);
1123         if (err)
1124                 return err;
1125
1126         gfar_init_mac(ndev);
1127
1128         /* If the device has multiple interrupts, register for
1129          * them.  Otherwise, only register for the one */
1130         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1131                 /* Install our interrupt handlers for Error,
1132                  * Transmit, and Receive */
1133                 err = request_irq(priv->interruptError, gfar_error, 0,
1134                                   priv->int_name_er, ndev);
1135                 if (err) {
1136                         if (netif_msg_intr(priv))
1137                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1138                                        priv->interruptError);
1139                         goto err_irq_fail;
1140                 }
1141
1142                 err = request_irq(priv->interruptTransmit, gfar_transmit, 0,
1143                                   priv->int_name_tx, ndev);
1144                 if (err) {
1145                         if (netif_msg_intr(priv))
1146                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1147                                        priv->interruptTransmit);
1148                         goto tx_irq_fail;
1149                 }
1150
1151                 err = request_irq(priv->interruptReceive, gfar_receive, 0,
1152                                   priv->int_name_rx, ndev);
1153                 if (err) {
1154                         if (netif_msg_intr(priv))
1155                                 pr_err("%s: Can't get IRQ %d (receive0)\n",
1156                                        ndev->name, priv->interruptReceive);
1157                         goto rx_irq_fail;
1158                 }
1159         } else {
1160                 err = request_irq(priv->interruptTransmit, gfar_interrupt,
1161                                 0, priv->int_name_tx, ndev);
1162                 if (err) {
1163                         if (netif_msg_intr(priv))
1164                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1165                                        priv->interruptTransmit);
1166                         goto err_irq_fail;
1167                 }
1168         }
1169
1170         /* Start the controller */
1171         gfar_start(ndev);
1172
1173         phy_start(priv->phydev);
1174
1175         return 0;
1176
1177 rx_irq_fail:
1178         free_irq(priv->interruptTransmit, ndev);
1179 tx_irq_fail:
1180         free_irq(priv->interruptError, ndev);
1181 err_irq_fail:
1182         free_skb_resources(priv);
1183         return err;
1184 }
1185
1186 /* Called when something needs to use the ethernet device */
1187 /* Returns 0 for success. */
1188 static int gfar_enet_open(struct net_device *dev)
1189 {
1190         struct gfar_private *priv = netdev_priv(dev);
1191         int err;
1192
1193         napi_enable(&priv->napi);
1194
1195         skb_queue_head_init(&priv->rx_recycle);
1196
1197         /* Initialize a bunch of registers */
1198         init_registers(dev);
1199
1200         gfar_set_mac_address(dev);
1201
1202         err = init_phy(dev);
1203
1204         if(err) {
1205                 napi_disable(&priv->napi);
1206                 return err;
1207         }
1208
1209         err = startup_gfar(dev);
1210         if (err) {
1211                 napi_disable(&priv->napi);
1212                 return err;
1213         }
1214
1215         netif_start_queue(dev);
1216
1217         device_set_wakeup_enable(&dev->dev, priv->wol_en);
1218
1219         return err;
1220 }
1221
1222 static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1223 {
1224         struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1225
1226         memset(fcb, 0, GMAC_FCB_LEN);
1227
1228         return fcb;
1229 }
1230
1231 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
1232 {
1233         u8 flags = 0;
1234
1235         /* If we're here, it's a IP packet with a TCP or UDP
1236          * payload.  We set it to checksum, using a pseudo-header
1237          * we provide
1238          */
1239         flags = TXFCB_DEFAULT;
1240
1241         /* Tell the controller what the protocol is */
1242         /* And provide the already calculated phcs */
1243         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
1244                 flags |= TXFCB_UDP;
1245                 fcb->phcs = udp_hdr(skb)->check;
1246         } else
1247                 fcb->phcs = tcp_hdr(skb)->check;
1248
1249         /* l3os is the distance between the start of the
1250          * frame (skb->data) and the start of the IP hdr.
1251          * l4os is the distance between the start of the
1252          * l3 hdr and the l4 hdr */
1253         fcb->l3os = (u16)(skb_network_offset(skb) - GMAC_FCB_LEN);
1254         fcb->l4os = skb_network_header_len(skb);
1255
1256         fcb->flags = flags;
1257 }
1258
1259 void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
1260 {
1261         fcb->flags |= TXFCB_VLN;
1262         fcb->vlctl = vlan_tx_tag_get(skb);
1263 }
1264
1265 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
1266                                struct txbd8 *base, int ring_size)
1267 {
1268         struct txbd8 *new_bd = bdp + stride;
1269
1270         return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
1271 }
1272
1273 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
1274                 int ring_size)
1275 {
1276         return skip_txbd(bdp, 1, base, ring_size);
1277 }
1278
1279 /* This is called by the kernel when a frame is ready for transmission. */
1280 /* It is pointed to by the dev->hard_start_xmit function pointer */
1281 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1282 {
1283         struct gfar_private *priv = netdev_priv(dev);
1284         struct txfcb *fcb = NULL;
1285         struct txbd8 *txbdp, *txbdp_start, *base;
1286         u32 lstatus;
1287         int i;
1288         u32 bufaddr;
1289         unsigned long flags;
1290         unsigned int nr_frags, length;
1291
1292         base = priv->tx_bd_base;
1293
1294         /* make space for additional header when fcb is needed */
1295         if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
1296                         (priv->vlgrp && vlan_tx_tag_present(skb))) &&
1297                         (skb_headroom(skb) < GMAC_FCB_LEN)) {
1298                 struct sk_buff *skb_new;
1299
1300                 skb_new = skb_realloc_headroom(skb, GMAC_FCB_LEN);
1301                 if (!skb_new) {
1302                         dev->stats.tx_errors++;
1303                         kfree_skb(skb);
1304                         return NETDEV_TX_OK;
1305                 }
1306                 kfree_skb(skb);
1307                 skb = skb_new;
1308         }
1309
1310         /* total number of fragments in the SKB */
1311         nr_frags = skb_shinfo(skb)->nr_frags;
1312
1313         spin_lock_irqsave(&priv->txlock, flags);
1314
1315         /* check if there is space to queue this packet */
1316         if ((nr_frags+1) > priv->num_txbdfree) {
1317                 /* no space, stop the queue */
1318                 netif_stop_queue(dev);
1319                 dev->stats.tx_fifo_errors++;
1320                 spin_unlock_irqrestore(&priv->txlock, flags);
1321                 return NETDEV_TX_BUSY;
1322         }
1323
1324         /* Update transmit stats */
1325         dev->stats.tx_bytes += skb->len;
1326
1327         txbdp = txbdp_start = priv->cur_tx;
1328
1329         if (nr_frags == 0) {
1330                 lstatus = txbdp->lstatus | BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1331         } else {
1332                 /* Place the fragment addresses and lengths into the TxBDs */
1333                 for (i = 0; i < nr_frags; i++) {
1334                         /* Point at the next BD, wrapping as needed */
1335                         txbdp = next_txbd(txbdp, base, priv->tx_ring_size);
1336
1337                         length = skb_shinfo(skb)->frags[i].size;
1338
1339                         lstatus = txbdp->lstatus | length |
1340                                 BD_LFLAG(TXBD_READY);
1341
1342                         /* Handle the last BD specially */
1343                         if (i == nr_frags - 1)
1344                                 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1345
1346                         bufaddr = dma_map_page(&priv->ofdev->dev,
1347                                         skb_shinfo(skb)->frags[i].page,
1348                                         skb_shinfo(skb)->frags[i].page_offset,
1349                                         length,
1350                                         DMA_TO_DEVICE);
1351
1352                         /* set the TxBD length and buffer pointer */
1353                         txbdp->bufPtr = bufaddr;
1354                         txbdp->lstatus = lstatus;
1355                 }
1356
1357                 lstatus = txbdp_start->lstatus;
1358         }
1359
1360         /* Set up checksumming */
1361         if (CHECKSUM_PARTIAL == skb->ip_summed) {
1362                 fcb = gfar_add_fcb(skb);
1363                 lstatus |= BD_LFLAG(TXBD_TOE);
1364                 gfar_tx_checksum(skb, fcb);
1365         }
1366
1367         if (priv->vlgrp && vlan_tx_tag_present(skb)) {
1368                 if (unlikely(NULL == fcb)) {
1369                         fcb = gfar_add_fcb(skb);
1370                         lstatus |= BD_LFLAG(TXBD_TOE);
1371                 }
1372
1373                 gfar_tx_vlan(skb, fcb);
1374         }
1375
1376         /* setup the TxBD length and buffer pointer for the first BD */
1377         priv->tx_skbuff[priv->skb_curtx] = skb;
1378         txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1379                         skb_headlen(skb), DMA_TO_DEVICE);
1380
1381         lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
1382
1383         /*
1384          * The powerpc-specific eieio() is used, as wmb() has too strong
1385          * semantics (it requires synchronization between cacheable and
1386          * uncacheable mappings, which eieio doesn't provide and which we
1387          * don't need), thus requiring a more expensive sync instruction.  At
1388          * some point, the set of architecture-independent barrier functions
1389          * should be expanded to include weaker barriers.
1390          */
1391         eieio();
1392
1393         txbdp_start->lstatus = lstatus;
1394
1395         /* Update the current skb pointer to the next entry we will use
1396          * (wrapping if necessary) */
1397         priv->skb_curtx = (priv->skb_curtx + 1) &
1398                 TX_RING_MOD_MASK(priv->tx_ring_size);
1399
1400         priv->cur_tx = next_txbd(txbdp, base, priv->tx_ring_size);
1401
1402         /* reduce TxBD free count */
1403         priv->num_txbdfree -= (nr_frags + 1);
1404
1405         dev->trans_start = jiffies;
1406
1407         /* If the next BD still needs to be cleaned up, then the bds
1408            are full.  We need to tell the kernel to stop sending us stuff. */
1409         if (!priv->num_txbdfree) {
1410                 netif_stop_queue(dev);
1411
1412                 dev->stats.tx_fifo_errors++;
1413         }
1414
1415         /* Tell the DMA to go go go */
1416         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1417
1418         /* Unlock priv */
1419         spin_unlock_irqrestore(&priv->txlock, flags);
1420
1421         return NETDEV_TX_OK;
1422 }
1423
1424 /* Stops the kernel queue, and halts the controller */
1425 static int gfar_close(struct net_device *dev)
1426 {
1427         struct gfar_private *priv = netdev_priv(dev);
1428
1429         napi_disable(&priv->napi);
1430
1431         skb_queue_purge(&priv->rx_recycle);
1432         cancel_work_sync(&priv->reset_task);
1433         stop_gfar(dev);
1434
1435         /* Disconnect from the PHY */
1436         phy_disconnect(priv->phydev);
1437         priv->phydev = NULL;
1438
1439         netif_stop_queue(dev);
1440
1441         return 0;
1442 }
1443
1444 /* Changes the mac address if the controller is not running. */
1445 static int gfar_set_mac_address(struct net_device *dev)
1446 {
1447         gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1448
1449         return 0;
1450 }
1451
1452
1453 /* Enables and disables VLAN insertion/extraction */
1454 static void gfar_vlan_rx_register(struct net_device *dev,
1455                 struct vlan_group *grp)
1456 {
1457         struct gfar_private *priv = netdev_priv(dev);
1458         unsigned long flags;
1459         u32 tempval;
1460
1461         spin_lock_irqsave(&priv->rxlock, flags);
1462
1463         priv->vlgrp = grp;
1464
1465         if (grp) {
1466                 /* Enable VLAN tag insertion */
1467                 tempval = gfar_read(&priv->regs->tctrl);
1468                 tempval |= TCTRL_VLINS;
1469
1470                 gfar_write(&priv->regs->tctrl, tempval);
1471
1472                 /* Enable VLAN tag extraction */
1473                 tempval = gfar_read(&priv->regs->rctrl);
1474                 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1475                 gfar_write(&priv->regs->rctrl, tempval);
1476         } else {
1477                 /* Disable VLAN tag insertion */
1478                 tempval = gfar_read(&priv->regs->tctrl);
1479                 tempval &= ~TCTRL_VLINS;
1480                 gfar_write(&priv->regs->tctrl, tempval);
1481
1482                 /* Disable VLAN tag extraction */
1483                 tempval = gfar_read(&priv->regs->rctrl);
1484                 tempval &= ~RCTRL_VLEX;
1485                 /* If parse is no longer required, then disable parser */
1486                 if (tempval & RCTRL_REQ_PARSER)
1487                         tempval |= RCTRL_PRSDEP_INIT;
1488                 else
1489                         tempval &= ~RCTRL_PRSDEP_INIT;
1490                 gfar_write(&priv->regs->rctrl, tempval);
1491         }
1492
1493         gfar_change_mtu(dev, dev->mtu);
1494
1495         spin_unlock_irqrestore(&priv->rxlock, flags);
1496 }
1497
1498 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1499 {
1500         int tempsize, tempval;
1501         struct gfar_private *priv = netdev_priv(dev);
1502         int oldsize = priv->rx_buffer_size;
1503         int frame_size = new_mtu + ETH_HLEN;
1504
1505         if (priv->vlgrp)
1506                 frame_size += VLAN_HLEN;
1507
1508         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1509                 if (netif_msg_drv(priv))
1510                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1511                                         dev->name);
1512                 return -EINVAL;
1513         }
1514
1515         if (gfar_uses_fcb(priv))
1516                 frame_size += GMAC_FCB_LEN;
1517
1518         frame_size += priv->padding;
1519
1520         tempsize =
1521             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1522             INCREMENTAL_BUFFER_SIZE;
1523
1524         /* Only stop and start the controller if it isn't already
1525          * stopped, and we changed something */
1526         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1527                 stop_gfar(dev);
1528
1529         priv->rx_buffer_size = tempsize;
1530
1531         dev->mtu = new_mtu;
1532
1533         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1534         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1535
1536         /* If the mtu is larger than the max size for standard
1537          * ethernet frames (ie, a jumbo frame), then set maccfg2
1538          * to allow huge frames, and to check the length */
1539         tempval = gfar_read(&priv->regs->maccfg2);
1540
1541         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1542                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1543         else
1544                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1545
1546         gfar_write(&priv->regs->maccfg2, tempval);
1547
1548         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1549                 startup_gfar(dev);
1550
1551         return 0;
1552 }
1553
1554 /* gfar_reset_task gets scheduled when a packet has not been
1555  * transmitted after a set amount of time.
1556  * For now, assume that clearing out all the structures, and
1557  * starting over will fix the problem.
1558  */
1559 static void gfar_reset_task(struct work_struct *work)
1560 {
1561         struct gfar_private *priv = container_of(work, struct gfar_private,
1562                         reset_task);
1563         struct net_device *dev = priv->ndev;
1564
1565         if (dev->flags & IFF_UP) {
1566                 netif_stop_queue(dev);
1567                 stop_gfar(dev);
1568                 startup_gfar(dev);
1569                 netif_start_queue(dev);
1570         }
1571
1572         netif_tx_schedule_all(dev);
1573 }
1574
1575 static void gfar_timeout(struct net_device *dev)
1576 {
1577         struct gfar_private *priv = netdev_priv(dev);
1578
1579         dev->stats.tx_errors++;
1580         schedule_work(&priv->reset_task);
1581 }
1582
1583 /* Interrupt Handler for Transmit complete */
1584 static int gfar_clean_tx_ring(struct net_device *dev)
1585 {
1586         struct gfar_private *priv = netdev_priv(dev);
1587         struct txbd8 *bdp;
1588         struct txbd8 *lbdp = NULL;
1589         struct txbd8 *base = priv->tx_bd_base;
1590         struct sk_buff *skb;
1591         int skb_dirtytx;
1592         int tx_ring_size = priv->tx_ring_size;
1593         int frags = 0;
1594         int i;
1595         int howmany = 0;
1596         u32 lstatus;
1597
1598         bdp = priv->dirty_tx;
1599         skb_dirtytx = priv->skb_dirtytx;
1600
1601         while ((skb = priv->tx_skbuff[skb_dirtytx])) {
1602                 frags = skb_shinfo(skb)->nr_frags;
1603                 lbdp = skip_txbd(bdp, frags, base, tx_ring_size);
1604
1605                 lstatus = lbdp->lstatus;
1606
1607                 /* Only clean completed frames */
1608                 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
1609                                 (lstatus & BD_LENGTH_MASK))
1610                         break;
1611
1612                 dma_unmap_single(&priv->ofdev->dev,
1613                                 bdp->bufPtr,
1614                                 bdp->length,
1615                                 DMA_TO_DEVICE);
1616
1617                 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1618                 bdp = next_txbd(bdp, base, tx_ring_size);
1619
1620                 for (i = 0; i < frags; i++) {
1621                         dma_unmap_page(&priv->ofdev->dev,
1622                                         bdp->bufPtr,
1623                                         bdp->length,
1624                                         DMA_TO_DEVICE);
1625                         bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1626                         bdp = next_txbd(bdp, base, tx_ring_size);
1627                 }
1628
1629                 /*
1630                  * If there's room in the queue (limit it to rx_buffer_size)
1631                  * we add this skb back into the pool, if it's the right size
1632                  */
1633                 if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
1634                                 skb_recycle_check(skb, priv->rx_buffer_size +
1635                                         RXBUF_ALIGNMENT))
1636                         __skb_queue_head(&priv->rx_recycle, skb);
1637                 else
1638                         dev_kfree_skb_any(skb);
1639
1640                 priv->tx_skbuff[skb_dirtytx] = NULL;
1641
1642                 skb_dirtytx = (skb_dirtytx + 1) &
1643                         TX_RING_MOD_MASK(tx_ring_size);
1644
1645                 howmany++;
1646                 priv->num_txbdfree += frags + 1;
1647         }
1648
1649         /* If we freed a buffer, we can restart transmission, if necessary */
1650         if (netif_queue_stopped(dev) && priv->num_txbdfree)
1651                 netif_wake_queue(dev);
1652
1653         /* Update dirty indicators */
1654         priv->skb_dirtytx = skb_dirtytx;
1655         priv->dirty_tx = bdp;
1656
1657         dev->stats.tx_packets += howmany;
1658
1659         return howmany;
1660 }
1661
1662 static void gfar_schedule_cleanup(struct net_device *dev)
1663 {
1664         struct gfar_private *priv = netdev_priv(dev);
1665         unsigned long flags;
1666
1667         spin_lock_irqsave(&priv->txlock, flags);
1668         spin_lock(&priv->rxlock);
1669
1670         if (napi_schedule_prep(&priv->napi)) {
1671                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
1672                 __napi_schedule(&priv->napi);
1673         } else {
1674                 /*
1675                  * Clear IEVENT, so interrupts aren't called again
1676                  * because of the packets that have already arrived.
1677                  */
1678                 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1679         }
1680
1681         spin_unlock(&priv->rxlock);
1682         spin_unlock_irqrestore(&priv->txlock, flags);
1683 }
1684
1685 /* Interrupt Handler for Transmit complete */
1686 static irqreturn_t gfar_transmit(int irq, void *dev_id)
1687 {
1688         gfar_schedule_cleanup((struct net_device *)dev_id);
1689         return IRQ_HANDLED;
1690 }
1691
1692 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1693                 struct sk_buff *skb)
1694 {
1695         struct gfar_private *priv = netdev_priv(dev);
1696         dma_addr_t buf;
1697
1698         buf = dma_map_single(&priv->ofdev->dev, skb->data,
1699                              priv->rx_buffer_size, DMA_FROM_DEVICE);
1700         gfar_init_rxbdp(dev, bdp, buf);
1701 }
1702
1703
1704 struct sk_buff * gfar_new_skb(struct net_device *dev)
1705 {
1706         unsigned int alignamount;
1707         struct gfar_private *priv = netdev_priv(dev);
1708         struct sk_buff *skb = NULL;
1709
1710         skb = __skb_dequeue(&priv->rx_recycle);
1711         if (!skb)
1712                 skb = netdev_alloc_skb(dev,
1713                                 priv->rx_buffer_size + RXBUF_ALIGNMENT);
1714
1715         if (!skb)
1716                 return NULL;
1717
1718         alignamount = RXBUF_ALIGNMENT -
1719                 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1));
1720
1721         /* We need the data buffer to be aligned properly.  We will reserve
1722          * as many bytes as needed to align the data properly
1723          */
1724         skb_reserve(skb, alignamount);
1725
1726         return skb;
1727 }
1728
1729 static inline void count_errors(unsigned short status, struct net_device *dev)
1730 {
1731         struct gfar_private *priv = netdev_priv(dev);
1732         struct net_device_stats *stats = &dev->stats;
1733         struct gfar_extra_stats *estats = &priv->extra_stats;
1734
1735         /* If the packet was truncated, none of the other errors
1736          * matter */
1737         if (status & RXBD_TRUNCATED) {
1738                 stats->rx_length_errors++;
1739
1740                 estats->rx_trunc++;
1741
1742                 return;
1743         }
1744         /* Count the errors, if there were any */
1745         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1746                 stats->rx_length_errors++;
1747
1748                 if (status & RXBD_LARGE)
1749                         estats->rx_large++;
1750                 else
1751                         estats->rx_short++;
1752         }
1753         if (status & RXBD_NONOCTET) {
1754                 stats->rx_frame_errors++;
1755                 estats->rx_nonoctet++;
1756         }
1757         if (status & RXBD_CRCERR) {
1758                 estats->rx_crcerr++;
1759                 stats->rx_crc_errors++;
1760         }
1761         if (status & RXBD_OVERRUN) {
1762                 estats->rx_overrun++;
1763                 stats->rx_crc_errors++;
1764         }
1765 }
1766
1767 irqreturn_t gfar_receive(int irq, void *dev_id)
1768 {
1769         gfar_schedule_cleanup((struct net_device *)dev_id);
1770         return IRQ_HANDLED;
1771 }
1772
1773 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1774 {
1775         /* If valid headers were found, and valid sums
1776          * were verified, then we tell the kernel that no
1777          * checksumming is necessary.  Otherwise, it is */
1778         if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
1779                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1780         else
1781                 skb->ip_summed = CHECKSUM_NONE;
1782 }
1783
1784
1785 /* gfar_process_frame() -- handle one incoming packet if skb
1786  * isn't NULL.  */
1787 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1788                               int amount_pull)
1789 {
1790         struct gfar_private *priv = netdev_priv(dev);
1791         struct rxfcb *fcb = NULL;
1792
1793         int ret;
1794
1795         /* fcb is at the beginning if exists */
1796         fcb = (struct rxfcb *)skb->data;
1797
1798         /* Remove the FCB from the skb */
1799         /* Remove the padded bytes, if there are any */
1800         if (amount_pull)
1801                 skb_pull(skb, amount_pull);
1802
1803         if (priv->rx_csum_enable)
1804                 gfar_rx_checksum(skb, fcb);
1805
1806         /* Tell the skb what kind of packet this is */
1807         skb->protocol = eth_type_trans(skb, dev);
1808
1809         /* Send the packet up the stack */
1810         if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN)))
1811                 ret = vlan_hwaccel_receive_skb(skb, priv->vlgrp, fcb->vlctl);
1812         else
1813                 ret = netif_receive_skb(skb);
1814
1815         if (NET_RX_DROP == ret)
1816                 priv->extra_stats.kernel_dropped++;
1817
1818         return 0;
1819 }
1820
1821 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1822  *   until the budget/quota has been reached. Returns the number
1823  *   of frames handled
1824  */
1825 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1826 {
1827         struct rxbd8 *bdp, *base;
1828         struct sk_buff *skb;
1829         int pkt_len;
1830         int amount_pull;
1831         int howmany = 0;
1832         struct gfar_private *priv = netdev_priv(dev);
1833
1834         /* Get the first full descriptor */
1835         bdp = priv->cur_rx;
1836         base = priv->rx_bd_base;
1837
1838         amount_pull = (gfar_uses_fcb(priv) ? GMAC_FCB_LEN : 0) +
1839                 priv->padding;
1840
1841         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1842                 struct sk_buff *newskb;
1843                 rmb();
1844
1845                 /* Add another skb for the future */
1846                 newskb = gfar_new_skb(dev);
1847
1848                 skb = priv->rx_skbuff[priv->skb_currx];
1849
1850                 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
1851                                 priv->rx_buffer_size, DMA_FROM_DEVICE);
1852
1853                 /* We drop the frame if we failed to allocate a new buffer */
1854                 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1855                                  bdp->status & RXBD_ERR)) {
1856                         count_errors(bdp->status, dev);
1857
1858                         if (unlikely(!newskb))
1859                                 newskb = skb;
1860                         else if (skb) {
1861                                 /*
1862                                  * We need to reset ->data to what it
1863                                  * was before gfar_new_skb() re-aligned
1864                                  * it to an RXBUF_ALIGNMENT boundary
1865                                  * before we put the skb back on the
1866                                  * recycle list.
1867                                  */
1868                                 skb->data = skb->head + NET_SKB_PAD;
1869                                 __skb_queue_head(&priv->rx_recycle, skb);
1870                         }
1871                 } else {
1872                         /* Increment the number of packets */
1873                         dev->stats.rx_packets++;
1874                         howmany++;
1875
1876                         if (likely(skb)) {
1877                                 pkt_len = bdp->length - ETH_FCS_LEN;
1878                                 /* Remove the FCS from the packet length */
1879                                 skb_put(skb, pkt_len);
1880                                 dev->stats.rx_bytes += pkt_len;
1881
1882                                 if (in_irq() || irqs_disabled())
1883                                         printk("Interrupt problem!\n");
1884                                 gfar_process_frame(dev, skb, amount_pull);
1885
1886                         } else {
1887                                 if (netif_msg_rx_err(priv))
1888                                         printk(KERN_WARNING
1889                                                "%s: Missing skb!\n", dev->name);
1890                                 dev->stats.rx_dropped++;
1891                                 priv->extra_stats.rx_skbmissing++;
1892                         }
1893
1894                 }
1895
1896                 priv->rx_skbuff[priv->skb_currx] = newskb;
1897
1898                 /* Setup the new bdp */
1899                 gfar_new_rxbdp(dev, bdp, newskb);
1900
1901                 /* Update to the next pointer */
1902                 bdp = next_bd(bdp, base, priv->rx_ring_size);
1903
1904                 /* update to point at the next skb */
1905                 priv->skb_currx =
1906                     (priv->skb_currx + 1) &
1907                     RX_RING_MOD_MASK(priv->rx_ring_size);
1908         }
1909
1910         /* Update the current rxbd pointer to be the next one */
1911         priv->cur_rx = bdp;
1912
1913         return howmany;
1914 }
1915
1916 static int gfar_poll(struct napi_struct *napi, int budget)
1917 {
1918         struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
1919         struct net_device *dev = priv->ndev;
1920         int tx_cleaned = 0;
1921         int rx_cleaned = 0;
1922         unsigned long flags;
1923
1924         /* Clear IEVENT, so interrupts aren't called again
1925          * because of the packets that have already arrived */
1926         gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1927
1928         /* If we fail to get the lock, don't bother with the TX BDs */
1929         if (spin_trylock_irqsave(&priv->txlock, flags)) {
1930                 tx_cleaned = gfar_clean_tx_ring(dev);
1931                 spin_unlock_irqrestore(&priv->txlock, flags);
1932         }
1933
1934         rx_cleaned = gfar_clean_rx_ring(dev, budget);
1935
1936         if (tx_cleaned)
1937                 return budget;
1938
1939         if (rx_cleaned < budget) {
1940                 napi_complete(napi);
1941
1942                 /* Clear the halt bit in RSTAT */
1943                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1944
1945                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
1946
1947                 /* If we are coalescing interrupts, update the timer */
1948                 /* Otherwise, clear it */
1949                 if (likely(priv->rxcoalescing)) {
1950                         gfar_write(&priv->regs->rxic, 0);
1951                         gfar_write(&priv->regs->rxic, priv->rxic);
1952                 }
1953                 if (likely(priv->txcoalescing)) {
1954                         gfar_write(&priv->regs->txic, 0);
1955                         gfar_write(&priv->regs->txic, priv->txic);
1956                 }
1957         }
1958
1959         return rx_cleaned;
1960 }
1961
1962 #ifdef CONFIG_NET_POLL_CONTROLLER
1963 /*
1964  * Polling 'interrupt' - used by things like netconsole to send skbs
1965  * without having to re-enable interrupts. It's not called while
1966  * the interrupt routine is executing.
1967  */
1968 static void gfar_netpoll(struct net_device *dev)
1969 {
1970         struct gfar_private *priv = netdev_priv(dev);
1971
1972         /* If the device has multiple interrupts, run tx/rx */
1973         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1974                 disable_irq(priv->interruptTransmit);
1975                 disable_irq(priv->interruptReceive);
1976                 disable_irq(priv->interruptError);
1977                 gfar_interrupt(priv->interruptTransmit, dev);
1978                 enable_irq(priv->interruptError);
1979                 enable_irq(priv->interruptReceive);
1980                 enable_irq(priv->interruptTransmit);
1981         } else {
1982                 disable_irq(priv->interruptTransmit);
1983                 gfar_interrupt(priv->interruptTransmit, dev);
1984                 enable_irq(priv->interruptTransmit);
1985         }
1986 }
1987 #endif
1988
1989 /* The interrupt handler for devices with one interrupt */
1990 static irqreturn_t gfar_interrupt(int irq, void *dev_id)
1991 {
1992         struct net_device *dev = dev_id;
1993         struct gfar_private *priv = netdev_priv(dev);
1994
1995         /* Save ievent for future reference */
1996         u32 events = gfar_read(&priv->regs->ievent);
1997
1998         /* Check for reception */
1999         if (events & IEVENT_RX_MASK)
2000                 gfar_receive(irq, dev_id);
2001
2002         /* Check for transmit completion */
2003         if (events & IEVENT_TX_MASK)
2004                 gfar_transmit(irq, dev_id);
2005
2006         /* Check for errors */
2007         if (events & IEVENT_ERR_MASK)
2008                 gfar_error(irq, dev_id);
2009
2010         return IRQ_HANDLED;
2011 }
2012
2013 /* Called every time the controller might need to be made
2014  * aware of new link state.  The PHY code conveys this
2015  * information through variables in the phydev structure, and this
2016  * function converts those variables into the appropriate
2017  * register values, and can bring down the device if needed.
2018  */
2019 static void adjust_link(struct net_device *dev)
2020 {
2021         struct gfar_private *priv = netdev_priv(dev);
2022         struct gfar __iomem *regs = priv->regs;
2023         unsigned long flags;
2024         struct phy_device *phydev = priv->phydev;
2025         int new_state = 0;
2026
2027         spin_lock_irqsave(&priv->txlock, flags);
2028         if (phydev->link) {
2029                 u32 tempval = gfar_read(&regs->maccfg2);
2030                 u32 ecntrl = gfar_read(&regs->ecntrl);
2031
2032                 /* Now we make sure that we can be in full duplex mode.
2033                  * If not, we operate in half-duplex mode. */
2034                 if (phydev->duplex != priv->oldduplex) {
2035                         new_state = 1;
2036                         if (!(phydev->duplex))
2037                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
2038                         else
2039                                 tempval |= MACCFG2_FULL_DUPLEX;
2040
2041                         priv->oldduplex = phydev->duplex;
2042                 }
2043
2044                 if (phydev->speed != priv->oldspeed) {
2045                         new_state = 1;
2046                         switch (phydev->speed) {
2047                         case 1000:
2048                                 tempval =
2049                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
2050
2051                                 ecntrl &= ~(ECNTRL_R100);
2052                                 break;
2053                         case 100:
2054                         case 10:
2055                                 tempval =
2056                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
2057
2058                                 /* Reduced mode distinguishes
2059                                  * between 10 and 100 */
2060                                 if (phydev->speed == SPEED_100)
2061                                         ecntrl |= ECNTRL_R100;
2062                                 else
2063                                         ecntrl &= ~(ECNTRL_R100);
2064                                 break;
2065                         default:
2066                                 if (netif_msg_link(priv))
2067                                         printk(KERN_WARNING
2068                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
2069                                                 dev->name, phydev->speed);
2070                                 break;
2071                         }
2072
2073                         priv->oldspeed = phydev->speed;
2074                 }
2075
2076                 gfar_write(&regs->maccfg2, tempval);
2077                 gfar_write(&regs->ecntrl, ecntrl);
2078
2079                 if (!priv->oldlink) {
2080                         new_state = 1;
2081                         priv->oldlink = 1;
2082                 }
2083         } else if (priv->oldlink) {
2084                 new_state = 1;
2085                 priv->oldlink = 0;
2086                 priv->oldspeed = 0;
2087                 priv->oldduplex = -1;
2088         }
2089
2090         if (new_state && netif_msg_link(priv))
2091                 phy_print_status(phydev);
2092
2093         spin_unlock_irqrestore(&priv->txlock, flags);
2094 }
2095
2096 /* Update the hash table based on the current list of multicast
2097  * addresses we subscribe to.  Also, change the promiscuity of
2098  * the device based on the flags (this function is called
2099  * whenever dev->flags is changed */
2100 static void gfar_set_multi(struct net_device *dev)
2101 {
2102         struct dev_mc_list *mc_ptr;
2103         struct gfar_private *priv = netdev_priv(dev);
2104         struct gfar __iomem *regs = priv->regs;
2105         u32 tempval;
2106
2107         if(dev->flags & IFF_PROMISC) {
2108                 /* Set RCTRL to PROM */
2109                 tempval = gfar_read(&regs->rctrl);
2110                 tempval |= RCTRL_PROM;
2111                 gfar_write(&regs->rctrl, tempval);
2112         } else {
2113                 /* Set RCTRL to not PROM */
2114                 tempval = gfar_read(&regs->rctrl);
2115                 tempval &= ~(RCTRL_PROM);
2116                 gfar_write(&regs->rctrl, tempval);
2117         }
2118
2119         if(dev->flags & IFF_ALLMULTI) {
2120                 /* Set the hash to rx all multicast frames */
2121                 gfar_write(&regs->igaddr0, 0xffffffff);
2122                 gfar_write(&regs->igaddr1, 0xffffffff);
2123                 gfar_write(&regs->igaddr2, 0xffffffff);
2124                 gfar_write(&regs->igaddr3, 0xffffffff);
2125                 gfar_write(&regs->igaddr4, 0xffffffff);
2126                 gfar_write(&regs->igaddr5, 0xffffffff);
2127                 gfar_write(&regs->igaddr6, 0xffffffff);
2128                 gfar_write(&regs->igaddr7, 0xffffffff);
2129                 gfar_write(&regs->gaddr0, 0xffffffff);
2130                 gfar_write(&regs->gaddr1, 0xffffffff);
2131                 gfar_write(&regs->gaddr2, 0xffffffff);
2132                 gfar_write(&regs->gaddr3, 0xffffffff);
2133                 gfar_write(&regs->gaddr4, 0xffffffff);
2134                 gfar_write(&regs->gaddr5, 0xffffffff);
2135                 gfar_write(&regs->gaddr6, 0xffffffff);
2136                 gfar_write(&regs->gaddr7, 0xffffffff);
2137         } else {
2138                 int em_num;
2139                 int idx;
2140
2141                 /* zero out the hash */
2142                 gfar_write(&regs->igaddr0, 0x0);
2143                 gfar_write(&regs->igaddr1, 0x0);
2144                 gfar_write(&regs->igaddr2, 0x0);
2145                 gfar_write(&regs->igaddr3, 0x0);
2146                 gfar_write(&regs->igaddr4, 0x0);
2147                 gfar_write(&regs->igaddr5, 0x0);
2148                 gfar_write(&regs->igaddr6, 0x0);
2149                 gfar_write(&regs->igaddr7, 0x0);
2150                 gfar_write(&regs->gaddr0, 0x0);
2151                 gfar_write(&regs->gaddr1, 0x0);
2152                 gfar_write(&regs->gaddr2, 0x0);
2153                 gfar_write(&regs->gaddr3, 0x0);
2154                 gfar_write(&regs->gaddr4, 0x0);
2155                 gfar_write(&regs->gaddr5, 0x0);
2156                 gfar_write(&regs->gaddr6, 0x0);
2157                 gfar_write(&regs->gaddr7, 0x0);
2158
2159                 /* If we have extended hash tables, we need to
2160                  * clear the exact match registers to prepare for
2161                  * setting them */
2162                 if (priv->extended_hash) {
2163                         em_num = GFAR_EM_NUM + 1;
2164                         gfar_clear_exact_match(dev);
2165                         idx = 1;
2166                 } else {
2167                         idx = 0;
2168                         em_num = 0;
2169                 }
2170
2171                 if(dev->mc_count == 0)
2172                         return;
2173
2174                 /* Parse the list, and set the appropriate bits */
2175                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
2176                         if (idx < em_num) {
2177                                 gfar_set_mac_for_addr(dev, idx,
2178                                                 mc_ptr->dmi_addr);
2179                                 idx++;
2180                         } else
2181                                 gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
2182                 }
2183         }
2184
2185         return;
2186 }
2187
2188
2189 /* Clears each of the exact match registers to zero, so they
2190  * don't interfere with normal reception */
2191 static void gfar_clear_exact_match(struct net_device *dev)
2192 {
2193         int idx;
2194         u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0};
2195
2196         for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
2197                 gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr);
2198 }
2199
2200 /* Set the appropriate hash bit for the given addr */
2201 /* The algorithm works like so:
2202  * 1) Take the Destination Address (ie the multicast address), and
2203  * do a CRC on it (little endian), and reverse the bits of the
2204  * result.
2205  * 2) Use the 8 most significant bits as a hash into a 256-entry
2206  * table.  The table is controlled through 8 32-bit registers:
2207  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
2208  * gaddr7.  This means that the 3 most significant bits in the
2209  * hash index which gaddr register to use, and the 5 other bits
2210  * indicate which bit (assuming an IBM numbering scheme, which
2211  * for PowerPC (tm) is usually the case) in the register holds
2212  * the entry. */
2213 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2214 {
2215         u32 tempval;
2216         struct gfar_private *priv = netdev_priv(dev);
2217         u32 result = ether_crc(MAC_ADDR_LEN, addr);
2218         int width = priv->hash_width;
2219         u8 whichbit = (result >> (32 - width)) & 0x1f;
2220         u8 whichreg = result >> (32 - width + 5);
2221         u32 value = (1 << (31-whichbit));
2222
2223         tempval = gfar_read(priv->hash_regs[whichreg]);
2224         tempval |= value;
2225         gfar_write(priv->hash_regs[whichreg], tempval);
2226
2227         return;
2228 }
2229
2230
2231 /* There are multiple MAC Address register pairs on some controllers
2232  * This function sets the numth pair to a given address
2233  */
2234 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2235 {
2236         struct gfar_private *priv = netdev_priv(dev);
2237         int idx;
2238         char tmpbuf[MAC_ADDR_LEN];
2239         u32 tempval;
2240         u32 __iomem *macptr = &priv->regs->macstnaddr1;
2241
2242         macptr += num*2;
2243
2244         /* Now copy it into the mac registers backwards, cuz */
2245         /* little endian is silly */
2246         for (idx = 0; idx < MAC_ADDR_LEN; idx++)
2247                 tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx];
2248
2249         gfar_write(macptr, *((u32 *) (tmpbuf)));
2250
2251         tempval = *((u32 *) (tmpbuf + 4));
2252
2253         gfar_write(macptr+1, tempval);
2254 }
2255
2256 /* GFAR error interrupt handler */
2257 static irqreturn_t gfar_error(int irq, void *dev_id)
2258 {
2259         struct net_device *dev = dev_id;
2260         struct gfar_private *priv = netdev_priv(dev);
2261
2262         /* Save ievent for future reference */
2263         u32 events = gfar_read(&priv->regs->ievent);
2264
2265         /* Clear IEVENT */
2266         gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK);
2267
2268         /* Magic Packet is not an error. */
2269         if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
2270             (events & IEVENT_MAG))
2271                 events &= ~IEVENT_MAG;
2272
2273         /* Hmm... */
2274         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2275                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2276                        dev->name, events, gfar_read(&priv->regs->imask));
2277
2278         /* Update the error counters */
2279         if (events & IEVENT_TXE) {
2280                 dev->stats.tx_errors++;
2281
2282                 if (events & IEVENT_LC)
2283                         dev->stats.tx_window_errors++;
2284                 if (events & IEVENT_CRL)
2285                         dev->stats.tx_aborted_errors++;
2286                 if (events & IEVENT_XFUN) {
2287                         if (netif_msg_tx_err(priv))
2288                                 printk(KERN_DEBUG "%s: TX FIFO underrun, "
2289                                        "packet dropped.\n", dev->name);
2290                         dev->stats.tx_dropped++;
2291                         priv->extra_stats.tx_underrun++;
2292
2293                         /* Reactivate the Tx Queues */
2294                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
2295                 }
2296                 if (netif_msg_tx_err(priv))
2297                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
2298         }
2299         if (events & IEVENT_BSY) {
2300                 dev->stats.rx_errors++;
2301                 priv->extra_stats.rx_bsy++;
2302
2303                 gfar_receive(irq, dev_id);
2304
2305                 if (netif_msg_rx_err(priv))
2306                         printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2307                                dev->name, gfar_read(&priv->regs->rstat));
2308         }
2309         if (events & IEVENT_BABR) {
2310                 dev->stats.rx_errors++;
2311                 priv->extra_stats.rx_babr++;
2312
2313                 if (netif_msg_rx_err(priv))
2314                         printk(KERN_DEBUG "%s: babbling RX error\n", dev->name);
2315         }
2316         if (events & IEVENT_EBERR) {
2317                 priv->extra_stats.eberr++;
2318                 if (netif_msg_rx_err(priv))
2319                         printk(KERN_DEBUG "%s: bus error\n", dev->name);
2320         }
2321         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
2322                 printk(KERN_DEBUG "%s: control frame\n", dev->name);
2323
2324         if (events & IEVENT_BABT) {
2325                 priv->extra_stats.tx_babt++;
2326                 if (netif_msg_tx_err(priv))
2327                         printk(KERN_DEBUG "%s: babbling TX error\n", dev->name);
2328         }
2329         return IRQ_HANDLED;
2330 }
2331
2332 /* work with hotplug and coldplug */
2333 MODULE_ALIAS("platform:fsl-gianfar");
2334
2335 static struct of_device_id gfar_match[] =
2336 {
2337         {
2338                 .type = "network",
2339                 .compatible = "gianfar",
2340         },
2341         {},
2342 };
2343
2344 /* Structure for a device driver */
2345 static struct of_platform_driver gfar_driver = {
2346         .name = "fsl-gianfar",
2347         .match_table = gfar_match,
2348
2349         .probe = gfar_probe,
2350         .remove = gfar_remove,
2351         .suspend = gfar_suspend,
2352         .resume = gfar_resume,
2353 };
2354
2355 static int __init gfar_init(void)
2356 {
2357         return of_register_platform_driver(&gfar_driver);
2358 }
2359
2360 static void __exit gfar_exit(void)
2361 {
2362         of_unregister_platform_driver(&gfar_driver);
2363 }
2364
2365 module_init(gfar_init);
2366 module_exit(gfar_exit);
2367