gianfar: Factor out gfar_init_bds() from gfar_alloc_skb_resources()
[linux-2.6.git] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * This driver is designed for the non-CPM ethernet controllers
6  * on the 85xx and 83xx family of integrated processors
7  * Based on 8260_io/fcc_enet.c
8  *
9  * Author: Andy Fleming
10  * Maintainer: Kumar Gala
11  *
12  * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13  * Copyright (c) 2007 MontaVista Software, Inc.
14  *
15  * This program is free software; you can redistribute  it and/or modify it
16  * under  the terms of  the GNU General  Public License as published by the
17  * Free Software Foundation;  either version 2 of the  License, or (at your
18  * option) any later version.
19  *
20  *  Gianfar:  AKA Lambda Draconis, "Dragon"
21  *  RA 11 31 24.2
22  *  Dec +69 19 52
23  *  V 3.84
24  *  B-V +1.62
25  *
26  *  Theory of operation
27  *
28  *  The driver is initialized through of_device. Configuration information
29  *  is therefore conveyed through an OF-style device tree.
30  *
31  *  The Gianfar Ethernet Controller uses a ring of buffer
32  *  descriptors.  The beginning is indicated by a register
33  *  pointing to the physical address of the start of the ring.
34  *  The end is determined by a "wrap" bit being set in the
35  *  last descriptor of the ring.
36  *
37  *  When a packet is received, the RXF bit in the
38  *  IEVENT register is set, triggering an interrupt when the
39  *  corresponding bit in the IMASK register is also set (if
40  *  interrupt coalescing is active, then the interrupt may not
41  *  happen immediately, but will wait until either a set number
42  *  of frames or amount of time have passed).  In NAPI, the
43  *  interrupt handler will signal there is work to be done, and
44  *  exit. This method will start at the last known empty
45  *  descriptor, and process every subsequent descriptor until there
46  *  are none left with data (NAPI will stop after a set number of
47  *  packets to give time to other tasks, but will eventually
48  *  process all the packets).  The data arrives inside a
49  *  pre-allocated skb, and so after the skb is passed up to the
50  *  stack, a new skb must be allocated, and the address field in
51  *  the buffer descriptor must be updated to indicate this new
52  *  skb.
53  *
54  *  When the kernel requests that a packet be transmitted, the
55  *  driver starts where it left off last time, and points the
56  *  descriptor at the buffer which was passed in.  The driver
57  *  then informs the DMA engine that there are packets ready to
58  *  be transmitted.  Once the controller is finished transmitting
59  *  the packet, an interrupt may be triggered (under the same
60  *  conditions as for reception, but depending on the TXF bit).
61  *  The driver then cleans up the buffer.
62  */
63
64 #include <linux/kernel.h>
65 #include <linux/string.h>
66 #include <linux/errno.h>
67 #include <linux/unistd.h>
68 #include <linux/slab.h>
69 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #include <linux/if_vlan.h>
76 #include <linux/spinlock.h>
77 #include <linux/mm.h>
78 #include <linux/of_mdio.h>
79 #include <linux/of_platform.h>
80 #include <linux/ip.h>
81 #include <linux/tcp.h>
82 #include <linux/udp.h>
83 #include <linux/in.h>
84
85 #include <asm/io.h>
86 #include <asm/irq.h>
87 #include <asm/uaccess.h>
88 #include <linux/module.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/crc32.h>
91 #include <linux/mii.h>
92 #include <linux/phy.h>
93 #include <linux/phy_fixed.h>
94 #include <linux/of.h>
95
96 #include "gianfar.h"
97 #include "fsl_pq_mdio.h"
98
99 #define TX_TIMEOUT      (1*HZ)
100 #undef BRIEF_GFAR_ERRORS
101 #undef VERBOSE_GFAR_ERRORS
102
103 const char gfar_driver_name[] = "Gianfar Ethernet";
104 const char gfar_driver_version[] = "1.3";
105
106 static int gfar_enet_open(struct net_device *dev);
107 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
108 static void gfar_reset_task(struct work_struct *work);
109 static void gfar_timeout(struct net_device *dev);
110 static int gfar_close(struct net_device *dev);
111 struct sk_buff *gfar_new_skb(struct net_device *dev);
112 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
113                 struct sk_buff *skb);
114 static int gfar_set_mac_address(struct net_device *dev);
115 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
116 static irqreturn_t gfar_error(int irq, void *dev_id);
117 static irqreturn_t gfar_transmit(int irq, void *dev_id);
118 static irqreturn_t gfar_interrupt(int irq, void *dev_id);
119 static void adjust_link(struct net_device *dev);
120 static void init_registers(struct net_device *dev);
121 static int init_phy(struct net_device *dev);
122 static int gfar_probe(struct of_device *ofdev,
123                 const struct of_device_id *match);
124 static int gfar_remove(struct of_device *ofdev);
125 static void free_skb_resources(struct gfar_private *priv);
126 static void gfar_set_multi(struct net_device *dev);
127 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
128 static void gfar_configure_serdes(struct net_device *dev);
129 static int gfar_poll(struct napi_struct *napi, int budget);
130 #ifdef CONFIG_NET_POLL_CONTROLLER
131 static void gfar_netpoll(struct net_device *dev);
132 #endif
133 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
134 static int gfar_clean_tx_ring(struct net_device *dev);
135 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
136                               int amount_pull);
137 static void gfar_vlan_rx_register(struct net_device *netdev,
138                                 struct vlan_group *grp);
139 void gfar_halt(struct net_device *dev);
140 static void gfar_halt_nodisable(struct net_device *dev);
141 void gfar_start(struct net_device *dev);
142 static void gfar_clear_exact_match(struct net_device *dev);
143 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
144 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
145
146 MODULE_AUTHOR("Freescale Semiconductor, Inc");
147 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
148 MODULE_LICENSE("GPL");
149
150 static void gfar_init_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
151                             dma_addr_t buf)
152 {
153         struct gfar_private *priv = netdev_priv(dev);
154         u32 lstatus;
155
156         bdp->bufPtr = buf;
157
158         lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
159         if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
160                 lstatus |= BD_LFLAG(RXBD_WRAP);
161
162         eieio();
163
164         bdp->lstatus = lstatus;
165 }
166
167 static int gfar_init_bds(struct net_device *ndev)
168 {
169         struct gfar_private *priv = netdev_priv(ndev);
170         struct txbd8 *txbdp;
171         struct rxbd8 *rxbdp;
172         int i;
173
174         /* Initialize some variables in our dev structure */
175         priv->num_txbdfree = priv->tx_ring_size;
176         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
177         priv->cur_rx = priv->rx_bd_base;
178         priv->skb_curtx = priv->skb_dirtytx = 0;
179         priv->skb_currx = 0;
180
181         /* Initialize Transmit Descriptor Ring */
182         txbdp = priv->tx_bd_base;
183         for (i = 0; i < priv->tx_ring_size; i++) {
184                 txbdp->lstatus = 0;
185                 txbdp->bufPtr = 0;
186                 txbdp++;
187         }
188
189         /* Set the last descriptor in the ring to indicate wrap */
190         txbdp--;
191         txbdp->status |= TXBD_WRAP;
192
193         rxbdp = priv->rx_bd_base;
194         for (i = 0; i < priv->rx_ring_size; i++) {
195                 struct sk_buff *skb = priv->rx_skbuff[i];
196
197                 if (skb) {
198                         gfar_init_rxbdp(ndev, rxbdp, rxbdp->bufPtr);
199                 } else {
200                         skb = gfar_new_skb(ndev);
201                         if (!skb) {
202                                 pr_err("%s: Can't allocate RX buffers\n",
203                                        ndev->name);
204                                 return -ENOMEM;
205                         }
206                         priv->rx_skbuff[i] = skb;
207
208                         gfar_new_rxbdp(ndev, rxbdp, skb);
209                 }
210
211                 rxbdp++;
212         }
213
214         return 0;
215 }
216
217 static int gfar_alloc_skb_resources(struct net_device *ndev)
218 {
219         void *vaddr;
220         int i;
221         struct gfar_private *priv = netdev_priv(ndev);
222         struct device *dev = &priv->ofdev->dev;
223
224         /* Allocate memory for the buffer descriptors */
225         vaddr = dma_alloc_coherent(dev,
226                         sizeof(*priv->tx_bd_base) * priv->tx_ring_size +
227                         sizeof(*priv->rx_bd_base) * priv->rx_ring_size,
228                         &priv->tx_bd_dma_base, GFP_KERNEL);
229         if (!vaddr) {
230                 if (netif_msg_ifup(priv))
231                         pr_err("%s: Could not allocate buffer descriptors!\n",
232                                ndev->name);
233                 return -ENOMEM;
234         }
235
236         priv->tx_bd_base = vaddr;
237
238         /* Start the rx descriptor ring where the tx ring leaves off */
239         vaddr = vaddr + sizeof(*priv->tx_bd_base) * priv->tx_ring_size;
240         priv->rx_bd_base = vaddr;
241
242         /* Setup the skbuff rings */
243         priv->tx_skbuff = kmalloc(sizeof(*priv->tx_skbuff) *
244                                   priv->tx_ring_size, GFP_KERNEL);
245         if (!priv->tx_skbuff) {
246                 if (netif_msg_ifup(priv))
247                         pr_err("%s: Could not allocate tx_skbuff\n",
248                                ndev->name);
249                 goto cleanup;
250         }
251
252         for (i = 0; i < priv->tx_ring_size; i++)
253                 priv->tx_skbuff[i] = NULL;
254
255         priv->rx_skbuff = kmalloc(sizeof(*priv->rx_skbuff) *
256                                   priv->rx_ring_size, GFP_KERNEL);
257         if (!priv->rx_skbuff) {
258                 if (netif_msg_ifup(priv))
259                         pr_err("%s: Could not allocate rx_skbuff\n",
260                                ndev->name);
261                 goto cleanup;
262         }
263
264         for (i = 0; i < priv->rx_ring_size; i++)
265                 priv->rx_skbuff[i] = NULL;
266
267         if (gfar_init_bds(ndev))
268                 goto cleanup;
269
270         return 0;
271
272 cleanup:
273         free_skb_resources(priv);
274         return -ENOMEM;
275 }
276
277 static void gfar_init_mac(struct net_device *ndev)
278 {
279         struct gfar_private *priv = netdev_priv(ndev);
280         struct gfar __iomem *regs = priv->regs;
281         u32 rctrl = 0;
282         u32 tctrl = 0;
283         u32 attrs = 0;
284
285         /* enet DMA only understands physical addresses */
286         gfar_write(&regs->tbase0, priv->tx_bd_dma_base);
287         gfar_write(&regs->rbase0, priv->tx_bd_dma_base +
288                                   sizeof(*priv->tx_bd_base) *
289                                   priv->tx_ring_size);
290
291         /* Configure the coalescing support */
292         gfar_write(&regs->txic, 0);
293         if (priv->txcoalescing)
294                 gfar_write(&regs->txic, priv->txic);
295
296         gfar_write(&regs->rxic, 0);
297         if (priv->rxcoalescing)
298                 gfar_write(&regs->rxic, priv->rxic);
299
300         if (priv->rx_csum_enable)
301                 rctrl |= RCTRL_CHECKSUMMING;
302
303         if (priv->extended_hash) {
304                 rctrl |= RCTRL_EXTHASH;
305
306                 gfar_clear_exact_match(ndev);
307                 rctrl |= RCTRL_EMEN;
308         }
309
310         if (priv->padding) {
311                 rctrl &= ~RCTRL_PAL_MASK;
312                 rctrl |= RCTRL_PADDING(priv->padding);
313         }
314
315         /* keep vlan related bits if it's enabled */
316         if (priv->vlgrp) {
317                 rctrl |= RCTRL_VLEX | RCTRL_PRSDEP_INIT;
318                 tctrl |= TCTRL_VLINS;
319         }
320
321         /* Init rctrl based on our settings */
322         gfar_write(&regs->rctrl, rctrl);
323
324         if (ndev->features & NETIF_F_IP_CSUM)
325                 tctrl |= TCTRL_INIT_CSUM;
326
327         gfar_write(&regs->tctrl, tctrl);
328
329         /* Set the extraction length and index */
330         attrs = ATTRELI_EL(priv->rx_stash_size) |
331                 ATTRELI_EI(priv->rx_stash_index);
332
333         gfar_write(&regs->attreli, attrs);
334
335         /* Start with defaults, and add stashing or locking
336          * depending on the approprate variables */
337         attrs = ATTR_INIT_SETTINGS;
338
339         if (priv->bd_stash_en)
340                 attrs |= ATTR_BDSTASH;
341
342         if (priv->rx_stash_size != 0)
343                 attrs |= ATTR_BUFSTASH;
344
345         gfar_write(&regs->attr, attrs);
346
347         gfar_write(&regs->fifo_tx_thr, priv->fifo_threshold);
348         gfar_write(&regs->fifo_tx_starve, priv->fifo_starve);
349         gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
350 }
351
352 static const struct net_device_ops gfar_netdev_ops = {
353         .ndo_open = gfar_enet_open,
354         .ndo_start_xmit = gfar_start_xmit,
355         .ndo_stop = gfar_close,
356         .ndo_change_mtu = gfar_change_mtu,
357         .ndo_set_multicast_list = gfar_set_multi,
358         .ndo_tx_timeout = gfar_timeout,
359         .ndo_do_ioctl = gfar_ioctl,
360         .ndo_vlan_rx_register = gfar_vlan_rx_register,
361         .ndo_set_mac_address = eth_mac_addr,
362         .ndo_validate_addr = eth_validate_addr,
363 #ifdef CONFIG_NET_POLL_CONTROLLER
364         .ndo_poll_controller = gfar_netpoll,
365 #endif
366 };
367
368 /* Returns 1 if incoming frames use an FCB */
369 static inline int gfar_uses_fcb(struct gfar_private *priv)
370 {
371         return priv->vlgrp || priv->rx_csum_enable;
372 }
373
374 static int gfar_of_init(struct net_device *dev)
375 {
376         const char *model;
377         const char *ctype;
378         const void *mac_addr;
379         u64 addr, size;
380         int err = 0;
381         struct gfar_private *priv = netdev_priv(dev);
382         struct device_node *np = priv->node;
383         const u32 *stash;
384         const u32 *stash_len;
385         const u32 *stash_idx;
386
387         if (!np || !of_device_is_available(np))
388                 return -ENODEV;
389
390         /* get a pointer to the register memory */
391         addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
392         priv->regs = ioremap(addr, size);
393
394         if (priv->regs == NULL)
395                 return -ENOMEM;
396
397         priv->interruptTransmit = irq_of_parse_and_map(np, 0);
398
399         model = of_get_property(np, "model", NULL);
400
401         /* If we aren't the FEC we have multiple interrupts */
402         if (model && strcasecmp(model, "FEC")) {
403                 priv->interruptReceive = irq_of_parse_and_map(np, 1);
404
405                 priv->interruptError = irq_of_parse_and_map(np, 2);
406
407                 if (priv->interruptTransmit < 0 ||
408                                 priv->interruptReceive < 0 ||
409                                 priv->interruptError < 0) {
410                         err = -EINVAL;
411                         goto err_out;
412                 }
413         }
414
415         stash = of_get_property(np, "bd-stash", NULL);
416
417         if(stash) {
418                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
419                 priv->bd_stash_en = 1;
420         }
421
422         stash_len = of_get_property(np, "rx-stash-len", NULL);
423
424         if (stash_len)
425                 priv->rx_stash_size = *stash_len;
426
427         stash_idx = of_get_property(np, "rx-stash-idx", NULL);
428
429         if (stash_idx)
430                 priv->rx_stash_index = *stash_idx;
431
432         if (stash_len || stash_idx)
433                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
434
435         mac_addr = of_get_mac_address(np);
436         if (mac_addr)
437                 memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
438
439         if (model && !strcasecmp(model, "TSEC"))
440                 priv->device_flags =
441                         FSL_GIANFAR_DEV_HAS_GIGABIT |
442                         FSL_GIANFAR_DEV_HAS_COALESCE |
443                         FSL_GIANFAR_DEV_HAS_RMON |
444                         FSL_GIANFAR_DEV_HAS_MULTI_INTR;
445         if (model && !strcasecmp(model, "eTSEC"))
446                 priv->device_flags =
447                         FSL_GIANFAR_DEV_HAS_GIGABIT |
448                         FSL_GIANFAR_DEV_HAS_COALESCE |
449                         FSL_GIANFAR_DEV_HAS_RMON |
450                         FSL_GIANFAR_DEV_HAS_MULTI_INTR |
451                         FSL_GIANFAR_DEV_HAS_PADDING |
452                         FSL_GIANFAR_DEV_HAS_CSUM |
453                         FSL_GIANFAR_DEV_HAS_VLAN |
454                         FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
455                         FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
456
457         ctype = of_get_property(np, "phy-connection-type", NULL);
458
459         /* We only care about rgmii-id.  The rest are autodetected */
460         if (ctype && !strcmp(ctype, "rgmii-id"))
461                 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
462         else
463                 priv->interface = PHY_INTERFACE_MODE_MII;
464
465         if (of_get_property(np, "fsl,magic-packet", NULL))
466                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
467
468         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
469
470         /* Find the TBI PHY.  If it's not there, we don't support SGMII */
471         priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
472
473         return 0;
474
475 err_out:
476         iounmap(priv->regs);
477         return err;
478 }
479
480 /* Ioctl MII Interface */
481 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
482 {
483         struct gfar_private *priv = netdev_priv(dev);
484
485         if (!netif_running(dev))
486                 return -EINVAL;
487
488         if (!priv->phydev)
489                 return -ENODEV;
490
491         return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
492 }
493
494 /* Set up the ethernet device structure, private data,
495  * and anything else we need before we start */
496 static int gfar_probe(struct of_device *ofdev,
497                 const struct of_device_id *match)
498 {
499         u32 tempval;
500         struct net_device *dev = NULL;
501         struct gfar_private *priv = NULL;
502         int err = 0;
503         int len_devname;
504
505         /* Create an ethernet device instance */
506         dev = alloc_etherdev(sizeof (*priv));
507
508         if (NULL == dev)
509                 return -ENOMEM;
510
511         priv = netdev_priv(dev);
512         priv->ndev = dev;
513         priv->ofdev = ofdev;
514         priv->node = ofdev->node;
515         SET_NETDEV_DEV(dev, &ofdev->dev);
516
517         err = gfar_of_init(dev);
518
519         if (err)
520                 goto regs_fail;
521
522         spin_lock_init(&priv->txlock);
523         spin_lock_init(&priv->rxlock);
524         spin_lock_init(&priv->bflock);
525         INIT_WORK(&priv->reset_task, gfar_reset_task);
526
527         dev_set_drvdata(&ofdev->dev, priv);
528
529         /* Stop the DMA engine now, in case it was running before */
530         /* (The firmware could have used it, and left it running). */
531         gfar_halt(dev);
532
533         /* Reset MAC layer */
534         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
535
536         /* We need to delay at least 3 TX clocks */
537         udelay(2);
538
539         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
540         gfar_write(&priv->regs->maccfg1, tempval);
541
542         /* Initialize MACCFG2. */
543         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
544
545         /* Initialize ECNTRL */
546         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
547
548         /* Set the dev->base_addr to the gfar reg region */
549         dev->base_addr = (unsigned long) (priv->regs);
550
551         SET_NETDEV_DEV(dev, &ofdev->dev);
552
553         /* Fill in the dev structure */
554         dev->watchdog_timeo = TX_TIMEOUT;
555         netif_napi_add(dev, &priv->napi, gfar_poll, GFAR_DEV_WEIGHT);
556         dev->mtu = 1500;
557
558         dev->netdev_ops = &gfar_netdev_ops;
559         dev->ethtool_ops = &gfar_ethtool_ops;
560
561         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
562                 priv->rx_csum_enable = 1;
563                 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA;
564         } else
565                 priv->rx_csum_enable = 0;
566
567         priv->vlgrp = NULL;
568
569         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN)
570                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
571
572         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
573                 priv->extended_hash = 1;
574                 priv->hash_width = 9;
575
576                 priv->hash_regs[0] = &priv->regs->igaddr0;
577                 priv->hash_regs[1] = &priv->regs->igaddr1;
578                 priv->hash_regs[2] = &priv->regs->igaddr2;
579                 priv->hash_regs[3] = &priv->regs->igaddr3;
580                 priv->hash_regs[4] = &priv->regs->igaddr4;
581                 priv->hash_regs[5] = &priv->regs->igaddr5;
582                 priv->hash_regs[6] = &priv->regs->igaddr6;
583                 priv->hash_regs[7] = &priv->regs->igaddr7;
584                 priv->hash_regs[8] = &priv->regs->gaddr0;
585                 priv->hash_regs[9] = &priv->regs->gaddr1;
586                 priv->hash_regs[10] = &priv->regs->gaddr2;
587                 priv->hash_regs[11] = &priv->regs->gaddr3;
588                 priv->hash_regs[12] = &priv->regs->gaddr4;
589                 priv->hash_regs[13] = &priv->regs->gaddr5;
590                 priv->hash_regs[14] = &priv->regs->gaddr6;
591                 priv->hash_regs[15] = &priv->regs->gaddr7;
592
593         } else {
594                 priv->extended_hash = 0;
595                 priv->hash_width = 8;
596
597                 priv->hash_regs[0] = &priv->regs->gaddr0;
598                 priv->hash_regs[1] = &priv->regs->gaddr1;
599                 priv->hash_regs[2] = &priv->regs->gaddr2;
600                 priv->hash_regs[3] = &priv->regs->gaddr3;
601                 priv->hash_regs[4] = &priv->regs->gaddr4;
602                 priv->hash_regs[5] = &priv->regs->gaddr5;
603                 priv->hash_regs[6] = &priv->regs->gaddr6;
604                 priv->hash_regs[7] = &priv->regs->gaddr7;
605         }
606
607         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
608                 priv->padding = DEFAULT_PADDING;
609         else
610                 priv->padding = 0;
611
612         if (dev->features & NETIF_F_IP_CSUM)
613                 dev->hard_header_len += GMAC_FCB_LEN;
614
615         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
616         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
617         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
618         priv->num_txbdfree = DEFAULT_TX_RING_SIZE;
619
620         priv->txcoalescing = DEFAULT_TX_COALESCE;
621         priv->txic = DEFAULT_TXIC;
622         priv->rxcoalescing = DEFAULT_RX_COALESCE;
623         priv->rxic = DEFAULT_RXIC;
624
625         /* Enable most messages by default */
626         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
627
628         /* Carrier starts down, phylib will bring it up */
629         netif_carrier_off(dev);
630
631         err = register_netdev(dev);
632
633         if (err) {
634                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
635                                 dev->name);
636                 goto register_fail;
637         }
638
639         device_init_wakeup(&dev->dev,
640                 priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
641
642         /* fill out IRQ number and name fields */
643         len_devname = strlen(dev->name);
644         strncpy(&priv->int_name_tx[0], dev->name, len_devname);
645         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
646                 strncpy(&priv->int_name_tx[len_devname],
647                         "_tx", sizeof("_tx") + 1);
648
649                 strncpy(&priv->int_name_rx[0], dev->name, len_devname);
650                 strncpy(&priv->int_name_rx[len_devname],
651                         "_rx", sizeof("_rx") + 1);
652
653                 strncpy(&priv->int_name_er[0], dev->name, len_devname);
654                 strncpy(&priv->int_name_er[len_devname],
655                         "_er", sizeof("_er") + 1);
656         } else
657                 priv->int_name_tx[len_devname] = '\0';
658
659         /* Create all the sysfs files */
660         gfar_init_sysfs(dev);
661
662         /* Print out the device info */
663         printk(KERN_INFO DEVICE_NAME "%pM\n", dev->name, dev->dev_addr);
664
665         /* Even more device info helps when determining which kernel */
666         /* provided which set of benchmarks. */
667         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
668         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
669                dev->name, priv->rx_ring_size, priv->tx_ring_size);
670
671         return 0;
672
673 register_fail:
674         iounmap(priv->regs);
675 regs_fail:
676         if (priv->phy_node)
677                 of_node_put(priv->phy_node);
678         if (priv->tbi_node)
679                 of_node_put(priv->tbi_node);
680         free_netdev(dev);
681         return err;
682 }
683
684 static int gfar_remove(struct of_device *ofdev)
685 {
686         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
687
688         if (priv->phy_node)
689                 of_node_put(priv->phy_node);
690         if (priv->tbi_node)
691                 of_node_put(priv->tbi_node);
692
693         dev_set_drvdata(&ofdev->dev, NULL);
694
695         unregister_netdev(priv->ndev);
696         iounmap(priv->regs);
697         free_netdev(priv->ndev);
698
699         return 0;
700 }
701
702 #ifdef CONFIG_PM
703 static int gfar_suspend(struct of_device *ofdev, pm_message_t state)
704 {
705         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
706         struct net_device *dev = priv->ndev;
707         unsigned long flags;
708         u32 tempval;
709
710         int magic_packet = priv->wol_en &&
711                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
712
713         netif_device_detach(dev);
714
715         if (netif_running(dev)) {
716                 spin_lock_irqsave(&priv->txlock, flags);
717                 spin_lock(&priv->rxlock);
718
719                 gfar_halt_nodisable(dev);
720
721                 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
722                 tempval = gfar_read(&priv->regs->maccfg1);
723
724                 tempval &= ~MACCFG1_TX_EN;
725
726                 if (!magic_packet)
727                         tempval &= ~MACCFG1_RX_EN;
728
729                 gfar_write(&priv->regs->maccfg1, tempval);
730
731                 spin_unlock(&priv->rxlock);
732                 spin_unlock_irqrestore(&priv->txlock, flags);
733
734                 napi_disable(&priv->napi);
735
736                 if (magic_packet) {
737                         /* Enable interrupt on Magic Packet */
738                         gfar_write(&priv->regs->imask, IMASK_MAG);
739
740                         /* Enable Magic Packet mode */
741                         tempval = gfar_read(&priv->regs->maccfg2);
742                         tempval |= MACCFG2_MPEN;
743                         gfar_write(&priv->regs->maccfg2, tempval);
744                 } else {
745                         phy_stop(priv->phydev);
746                 }
747         }
748
749         return 0;
750 }
751
752 static int gfar_resume(struct of_device *ofdev)
753 {
754         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
755         struct net_device *dev = priv->ndev;
756         unsigned long flags;
757         u32 tempval;
758         int magic_packet = priv->wol_en &&
759                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
760
761         if (!netif_running(dev)) {
762                 netif_device_attach(dev);
763                 return 0;
764         }
765
766         if (!magic_packet && priv->phydev)
767                 phy_start(priv->phydev);
768
769         /* Disable Magic Packet mode, in case something
770          * else woke us up.
771          */
772
773         spin_lock_irqsave(&priv->txlock, flags);
774         spin_lock(&priv->rxlock);
775
776         tempval = gfar_read(&priv->regs->maccfg2);
777         tempval &= ~MACCFG2_MPEN;
778         gfar_write(&priv->regs->maccfg2, tempval);
779
780         gfar_start(dev);
781
782         spin_unlock(&priv->rxlock);
783         spin_unlock_irqrestore(&priv->txlock, flags);
784
785         netif_device_attach(dev);
786
787         napi_enable(&priv->napi);
788
789         return 0;
790 }
791 #else
792 #define gfar_suspend NULL
793 #define gfar_resume NULL
794 #endif
795
796 /* Reads the controller's registers to determine what interface
797  * connects it to the PHY.
798  */
799 static phy_interface_t gfar_get_interface(struct net_device *dev)
800 {
801         struct gfar_private *priv = netdev_priv(dev);
802         u32 ecntrl = gfar_read(&priv->regs->ecntrl);
803
804         if (ecntrl & ECNTRL_SGMII_MODE)
805                 return PHY_INTERFACE_MODE_SGMII;
806
807         if (ecntrl & ECNTRL_TBI_MODE) {
808                 if (ecntrl & ECNTRL_REDUCED_MODE)
809                         return PHY_INTERFACE_MODE_RTBI;
810                 else
811                         return PHY_INTERFACE_MODE_TBI;
812         }
813
814         if (ecntrl & ECNTRL_REDUCED_MODE) {
815                 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
816                         return PHY_INTERFACE_MODE_RMII;
817                 else {
818                         phy_interface_t interface = priv->interface;
819
820                         /*
821                          * This isn't autodetected right now, so it must
822                          * be set by the device tree or platform code.
823                          */
824                         if (interface == PHY_INTERFACE_MODE_RGMII_ID)
825                                 return PHY_INTERFACE_MODE_RGMII_ID;
826
827                         return PHY_INTERFACE_MODE_RGMII;
828                 }
829         }
830
831         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
832                 return PHY_INTERFACE_MODE_GMII;
833
834         return PHY_INTERFACE_MODE_MII;
835 }
836
837
838 /* Initializes driver's PHY state, and attaches to the PHY.
839  * Returns 0 on success.
840  */
841 static int init_phy(struct net_device *dev)
842 {
843         struct gfar_private *priv = netdev_priv(dev);
844         uint gigabit_support =
845                 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
846                 SUPPORTED_1000baseT_Full : 0;
847         phy_interface_t interface;
848
849         priv->oldlink = 0;
850         priv->oldspeed = 0;
851         priv->oldduplex = -1;
852
853         interface = gfar_get_interface(dev);
854
855         priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
856                                       interface);
857         if (!priv->phydev)
858                 priv->phydev = of_phy_connect_fixed_link(dev, &adjust_link,
859                                                          interface);
860         if (!priv->phydev) {
861                 dev_err(&dev->dev, "could not attach to PHY\n");
862                 return -ENODEV;
863         }
864
865         if (interface == PHY_INTERFACE_MODE_SGMII)
866                 gfar_configure_serdes(dev);
867
868         /* Remove any features not supported by the controller */
869         priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
870         priv->phydev->advertising = priv->phydev->supported;
871
872         return 0;
873 }
874
875 /*
876  * Initialize TBI PHY interface for communicating with the
877  * SERDES lynx PHY on the chip.  We communicate with this PHY
878  * through the MDIO bus on each controller, treating it as a
879  * "normal" PHY at the address found in the TBIPA register.  We assume
880  * that the TBIPA register is valid.  Either the MDIO bus code will set
881  * it to a value that doesn't conflict with other PHYs on the bus, or the
882  * value doesn't matter, as there are no other PHYs on the bus.
883  */
884 static void gfar_configure_serdes(struct net_device *dev)
885 {
886         struct gfar_private *priv = netdev_priv(dev);
887         struct phy_device *tbiphy;
888
889         if (!priv->tbi_node) {
890                 dev_warn(&dev->dev, "error: SGMII mode requires that the "
891                                     "device tree specify a tbi-handle\n");
892                 return;
893         }
894
895         tbiphy = of_phy_find_device(priv->tbi_node);
896         if (!tbiphy) {
897                 dev_err(&dev->dev, "error: Could not get TBI device\n");
898                 return;
899         }
900
901         /*
902          * If the link is already up, we must already be ok, and don't need to
903          * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
904          * everything for us?  Resetting it takes the link down and requires
905          * several seconds for it to come back.
906          */
907         if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
908                 return;
909
910         /* Single clk mode, mii mode off(for serdes communication) */
911         phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
912
913         phy_write(tbiphy, MII_ADVERTISE,
914                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
915                         ADVERTISE_1000XPSE_ASYM);
916
917         phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
918                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
919 }
920
921 static void init_registers(struct net_device *dev)
922 {
923         struct gfar_private *priv = netdev_priv(dev);
924
925         /* Clear IEVENT */
926         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
927
928         /* Initialize IMASK */
929         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
930
931         /* Init hash registers to zero */
932         gfar_write(&priv->regs->igaddr0, 0);
933         gfar_write(&priv->regs->igaddr1, 0);
934         gfar_write(&priv->regs->igaddr2, 0);
935         gfar_write(&priv->regs->igaddr3, 0);
936         gfar_write(&priv->regs->igaddr4, 0);
937         gfar_write(&priv->regs->igaddr5, 0);
938         gfar_write(&priv->regs->igaddr6, 0);
939         gfar_write(&priv->regs->igaddr7, 0);
940
941         gfar_write(&priv->regs->gaddr0, 0);
942         gfar_write(&priv->regs->gaddr1, 0);
943         gfar_write(&priv->regs->gaddr2, 0);
944         gfar_write(&priv->regs->gaddr3, 0);
945         gfar_write(&priv->regs->gaddr4, 0);
946         gfar_write(&priv->regs->gaddr5, 0);
947         gfar_write(&priv->regs->gaddr6, 0);
948         gfar_write(&priv->regs->gaddr7, 0);
949
950         /* Zero out the rmon mib registers if it has them */
951         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
952                 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib));
953
954                 /* Mask off the CAM interrupts */
955                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
956                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
957         }
958
959         /* Initialize the max receive buffer length */
960         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
961
962         /* Initialize the Minimum Frame Length Register */
963         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
964 }
965
966
967 /* Halt the receive and transmit queues */
968 static void gfar_halt_nodisable(struct net_device *dev)
969 {
970         struct gfar_private *priv = netdev_priv(dev);
971         struct gfar __iomem *regs = priv->regs;
972         u32 tempval;
973
974         /* Mask all interrupts */
975         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
976
977         /* Clear all interrupts */
978         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
979
980         /* Stop the DMA, and wait for it to stop */
981         tempval = gfar_read(&priv->regs->dmactrl);
982         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
983             != (DMACTRL_GRS | DMACTRL_GTS)) {
984                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
985                 gfar_write(&priv->regs->dmactrl, tempval);
986
987                 while (!(gfar_read(&priv->regs->ievent) &
988                          (IEVENT_GRSC | IEVENT_GTSC)))
989                         cpu_relax();
990         }
991 }
992
993 /* Halt the receive and transmit queues */
994 void gfar_halt(struct net_device *dev)
995 {
996         struct gfar_private *priv = netdev_priv(dev);
997         struct gfar __iomem *regs = priv->regs;
998         u32 tempval;
999
1000         gfar_halt_nodisable(dev);
1001
1002         /* Disable Rx and Tx */
1003         tempval = gfar_read(&regs->maccfg1);
1004         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
1005         gfar_write(&regs->maccfg1, tempval);
1006 }
1007
1008 void stop_gfar(struct net_device *dev)
1009 {
1010         struct gfar_private *priv = netdev_priv(dev);
1011         unsigned long flags;
1012
1013         phy_stop(priv->phydev);
1014
1015         /* Lock it down */
1016         spin_lock_irqsave(&priv->txlock, flags);
1017         spin_lock(&priv->rxlock);
1018
1019         gfar_halt(dev);
1020
1021         spin_unlock(&priv->rxlock);
1022         spin_unlock_irqrestore(&priv->txlock, flags);
1023
1024         /* Free the IRQs */
1025         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1026                 free_irq(priv->interruptError, dev);
1027                 free_irq(priv->interruptTransmit, dev);
1028                 free_irq(priv->interruptReceive, dev);
1029         } else {
1030                 free_irq(priv->interruptTransmit, dev);
1031         }
1032
1033         free_skb_resources(priv);
1034 }
1035
1036 /* If there are any tx skbs or rx skbs still around, free them.
1037  * Then free tx_skbuff and rx_skbuff */
1038 static void free_skb_resources(struct gfar_private *priv)
1039 {
1040         struct device *dev = &priv->ofdev->dev;
1041         struct rxbd8 *rxbdp;
1042         struct txbd8 *txbdp;
1043         int i, j;
1044
1045         /* Go through all the buffer descriptors and free their data buffers */
1046         txbdp = priv->tx_bd_base;
1047
1048         if (!priv->tx_skbuff)
1049                 goto skip_tx_skbuff;
1050
1051         for (i = 0; i < priv->tx_ring_size; i++) {
1052                 if (!priv->tx_skbuff[i])
1053                         continue;
1054
1055                 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
1056                                 txbdp->length, DMA_TO_DEVICE);
1057                 txbdp->lstatus = 0;
1058                 for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
1059                         txbdp++;
1060                         dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
1061                                         txbdp->length, DMA_TO_DEVICE);
1062                 }
1063                 txbdp++;
1064                 dev_kfree_skb_any(priv->tx_skbuff[i]);
1065                 priv->tx_skbuff[i] = NULL;
1066         }
1067
1068         kfree(priv->tx_skbuff);
1069 skip_tx_skbuff:
1070
1071         rxbdp = priv->rx_bd_base;
1072
1073         if (!priv->rx_skbuff)
1074                 goto skip_rx_skbuff;
1075
1076         for (i = 0; i < priv->rx_ring_size; i++) {
1077                 if (priv->rx_skbuff[i]) {
1078                         dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
1079                                          priv->rx_buffer_size,
1080                                         DMA_FROM_DEVICE);
1081                         dev_kfree_skb_any(priv->rx_skbuff[i]);
1082                         priv->rx_skbuff[i] = NULL;
1083                 }
1084
1085                 rxbdp->lstatus = 0;
1086                 rxbdp->bufPtr = 0;
1087                 rxbdp++;
1088         }
1089
1090         kfree(priv->rx_skbuff);
1091 skip_rx_skbuff:
1092
1093         dma_free_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
1094                                sizeof(*rxbdp) * priv->rx_ring_size,
1095                           priv->tx_bd_base, priv->tx_bd_dma_base);
1096 }
1097
1098 void gfar_start(struct net_device *dev)
1099 {
1100         struct gfar_private *priv = netdev_priv(dev);
1101         struct gfar __iomem *regs = priv->regs;
1102         u32 tempval;
1103
1104         /* Enable Rx and Tx in MACCFG1 */
1105         tempval = gfar_read(&regs->maccfg1);
1106         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
1107         gfar_write(&regs->maccfg1, tempval);
1108
1109         /* Initialize DMACTRL to have WWR and WOP */
1110         tempval = gfar_read(&priv->regs->dmactrl);
1111         tempval |= DMACTRL_INIT_SETTINGS;
1112         gfar_write(&priv->regs->dmactrl, tempval);
1113
1114         /* Make sure we aren't stopped */
1115         tempval = gfar_read(&priv->regs->dmactrl);
1116         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
1117         gfar_write(&priv->regs->dmactrl, tempval);
1118
1119         /* Clear THLT/RHLT, so that the DMA starts polling now */
1120         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
1121         gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
1122
1123         /* Unmask the interrupts we look for */
1124         gfar_write(&regs->imask, IMASK_DEFAULT);
1125
1126         dev->trans_start = jiffies;
1127 }
1128
1129 /* Bring the controller up and running */
1130 int startup_gfar(struct net_device *ndev)
1131 {
1132         struct gfar_private *priv = netdev_priv(ndev);
1133         struct gfar __iomem *regs = priv->regs;
1134         int err;
1135
1136         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1137
1138         err = gfar_alloc_skb_resources(ndev);
1139         if (err)
1140                 return err;
1141
1142         gfar_init_mac(ndev);
1143
1144         /* If the device has multiple interrupts, register for
1145          * them.  Otherwise, only register for the one */
1146         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1147                 /* Install our interrupt handlers for Error,
1148                  * Transmit, and Receive */
1149                 err = request_irq(priv->interruptError, gfar_error, 0,
1150                                   priv->int_name_er, ndev);
1151                 if (err) {
1152                         if (netif_msg_intr(priv))
1153                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1154                                        priv->interruptError);
1155                         goto err_irq_fail;
1156                 }
1157
1158                 err = request_irq(priv->interruptTransmit, gfar_transmit, 0,
1159                                   priv->int_name_tx, ndev);
1160                 if (err) {
1161                         if (netif_msg_intr(priv))
1162                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1163                                        priv->interruptTransmit);
1164                         goto tx_irq_fail;
1165                 }
1166
1167                 err = request_irq(priv->interruptReceive, gfar_receive, 0,
1168                                   priv->int_name_rx, ndev);
1169                 if (err) {
1170                         if (netif_msg_intr(priv))
1171                                 pr_err("%s: Can't get IRQ %d (receive0)\n",
1172                                        ndev->name, priv->interruptReceive);
1173                         goto rx_irq_fail;
1174                 }
1175         } else {
1176                 err = request_irq(priv->interruptTransmit, gfar_interrupt,
1177                                 0, priv->int_name_tx, ndev);
1178                 if (err) {
1179                         if (netif_msg_intr(priv))
1180                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1181                                        priv->interruptTransmit);
1182                         goto err_irq_fail;
1183                 }
1184         }
1185
1186         /* Start the controller */
1187         gfar_start(ndev);
1188
1189         phy_start(priv->phydev);
1190
1191         return 0;
1192
1193 rx_irq_fail:
1194         free_irq(priv->interruptTransmit, ndev);
1195 tx_irq_fail:
1196         free_irq(priv->interruptError, ndev);
1197 err_irq_fail:
1198         free_skb_resources(priv);
1199         return err;
1200 }
1201
1202 /* Called when something needs to use the ethernet device */
1203 /* Returns 0 for success. */
1204 static int gfar_enet_open(struct net_device *dev)
1205 {
1206         struct gfar_private *priv = netdev_priv(dev);
1207         int err;
1208
1209         napi_enable(&priv->napi);
1210
1211         skb_queue_head_init(&priv->rx_recycle);
1212
1213         /* Initialize a bunch of registers */
1214         init_registers(dev);
1215
1216         gfar_set_mac_address(dev);
1217
1218         err = init_phy(dev);
1219
1220         if(err) {
1221                 napi_disable(&priv->napi);
1222                 return err;
1223         }
1224
1225         err = startup_gfar(dev);
1226         if (err) {
1227                 napi_disable(&priv->napi);
1228                 return err;
1229         }
1230
1231         netif_start_queue(dev);
1232
1233         device_set_wakeup_enable(&dev->dev, priv->wol_en);
1234
1235         return err;
1236 }
1237
1238 static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1239 {
1240         struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1241
1242         memset(fcb, 0, GMAC_FCB_LEN);
1243
1244         return fcb;
1245 }
1246
1247 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
1248 {
1249         u8 flags = 0;
1250
1251         /* If we're here, it's a IP packet with a TCP or UDP
1252          * payload.  We set it to checksum, using a pseudo-header
1253          * we provide
1254          */
1255         flags = TXFCB_DEFAULT;
1256
1257         /* Tell the controller what the protocol is */
1258         /* And provide the already calculated phcs */
1259         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
1260                 flags |= TXFCB_UDP;
1261                 fcb->phcs = udp_hdr(skb)->check;
1262         } else
1263                 fcb->phcs = tcp_hdr(skb)->check;
1264
1265         /* l3os is the distance between the start of the
1266          * frame (skb->data) and the start of the IP hdr.
1267          * l4os is the distance between the start of the
1268          * l3 hdr and the l4 hdr */
1269         fcb->l3os = (u16)(skb_network_offset(skb) - GMAC_FCB_LEN);
1270         fcb->l4os = skb_network_header_len(skb);
1271
1272         fcb->flags = flags;
1273 }
1274
1275 void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
1276 {
1277         fcb->flags |= TXFCB_VLN;
1278         fcb->vlctl = vlan_tx_tag_get(skb);
1279 }
1280
1281 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
1282                                struct txbd8 *base, int ring_size)
1283 {
1284         struct txbd8 *new_bd = bdp + stride;
1285
1286         return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
1287 }
1288
1289 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
1290                 int ring_size)
1291 {
1292         return skip_txbd(bdp, 1, base, ring_size);
1293 }
1294
1295 /* This is called by the kernel when a frame is ready for transmission. */
1296 /* It is pointed to by the dev->hard_start_xmit function pointer */
1297 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1298 {
1299         struct gfar_private *priv = netdev_priv(dev);
1300         struct txfcb *fcb = NULL;
1301         struct txbd8 *txbdp, *txbdp_start, *base;
1302         u32 lstatus;
1303         int i;
1304         u32 bufaddr;
1305         unsigned long flags;
1306         unsigned int nr_frags, length;
1307
1308         base = priv->tx_bd_base;
1309
1310         /* make space for additional header when fcb is needed */
1311         if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
1312                         (priv->vlgrp && vlan_tx_tag_present(skb))) &&
1313                         (skb_headroom(skb) < GMAC_FCB_LEN)) {
1314                 struct sk_buff *skb_new;
1315
1316                 skb_new = skb_realloc_headroom(skb, GMAC_FCB_LEN);
1317                 if (!skb_new) {
1318                         dev->stats.tx_errors++;
1319                         kfree_skb(skb);
1320                         return NETDEV_TX_OK;
1321                 }
1322                 kfree_skb(skb);
1323                 skb = skb_new;
1324         }
1325
1326         /* total number of fragments in the SKB */
1327         nr_frags = skb_shinfo(skb)->nr_frags;
1328
1329         spin_lock_irqsave(&priv->txlock, flags);
1330
1331         /* check if there is space to queue this packet */
1332         if ((nr_frags+1) > priv->num_txbdfree) {
1333                 /* no space, stop the queue */
1334                 netif_stop_queue(dev);
1335                 dev->stats.tx_fifo_errors++;
1336                 spin_unlock_irqrestore(&priv->txlock, flags);
1337                 return NETDEV_TX_BUSY;
1338         }
1339
1340         /* Update transmit stats */
1341         dev->stats.tx_bytes += skb->len;
1342
1343         txbdp = txbdp_start = priv->cur_tx;
1344
1345         if (nr_frags == 0) {
1346                 lstatus = txbdp->lstatus | BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1347         } else {
1348                 /* Place the fragment addresses and lengths into the TxBDs */
1349                 for (i = 0; i < nr_frags; i++) {
1350                         /* Point at the next BD, wrapping as needed */
1351                         txbdp = next_txbd(txbdp, base, priv->tx_ring_size);
1352
1353                         length = skb_shinfo(skb)->frags[i].size;
1354
1355                         lstatus = txbdp->lstatus | length |
1356                                 BD_LFLAG(TXBD_READY);
1357
1358                         /* Handle the last BD specially */
1359                         if (i == nr_frags - 1)
1360                                 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1361
1362                         bufaddr = dma_map_page(&priv->ofdev->dev,
1363                                         skb_shinfo(skb)->frags[i].page,
1364                                         skb_shinfo(skb)->frags[i].page_offset,
1365                                         length,
1366                                         DMA_TO_DEVICE);
1367
1368                         /* set the TxBD length and buffer pointer */
1369                         txbdp->bufPtr = bufaddr;
1370                         txbdp->lstatus = lstatus;
1371                 }
1372
1373                 lstatus = txbdp_start->lstatus;
1374         }
1375
1376         /* Set up checksumming */
1377         if (CHECKSUM_PARTIAL == skb->ip_summed) {
1378                 fcb = gfar_add_fcb(skb);
1379                 lstatus |= BD_LFLAG(TXBD_TOE);
1380                 gfar_tx_checksum(skb, fcb);
1381         }
1382
1383         if (priv->vlgrp && vlan_tx_tag_present(skb)) {
1384                 if (unlikely(NULL == fcb)) {
1385                         fcb = gfar_add_fcb(skb);
1386                         lstatus |= BD_LFLAG(TXBD_TOE);
1387                 }
1388
1389                 gfar_tx_vlan(skb, fcb);
1390         }
1391
1392         /* setup the TxBD length and buffer pointer for the first BD */
1393         priv->tx_skbuff[priv->skb_curtx] = skb;
1394         txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1395                         skb_headlen(skb), DMA_TO_DEVICE);
1396
1397         lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
1398
1399         /*
1400          * The powerpc-specific eieio() is used, as wmb() has too strong
1401          * semantics (it requires synchronization between cacheable and
1402          * uncacheable mappings, which eieio doesn't provide and which we
1403          * don't need), thus requiring a more expensive sync instruction.  At
1404          * some point, the set of architecture-independent barrier functions
1405          * should be expanded to include weaker barriers.
1406          */
1407         eieio();
1408
1409         txbdp_start->lstatus = lstatus;
1410
1411         /* Update the current skb pointer to the next entry we will use
1412          * (wrapping if necessary) */
1413         priv->skb_curtx = (priv->skb_curtx + 1) &
1414                 TX_RING_MOD_MASK(priv->tx_ring_size);
1415
1416         priv->cur_tx = next_txbd(txbdp, base, priv->tx_ring_size);
1417
1418         /* reduce TxBD free count */
1419         priv->num_txbdfree -= (nr_frags + 1);
1420
1421         dev->trans_start = jiffies;
1422
1423         /* If the next BD still needs to be cleaned up, then the bds
1424            are full.  We need to tell the kernel to stop sending us stuff. */
1425         if (!priv->num_txbdfree) {
1426                 netif_stop_queue(dev);
1427
1428                 dev->stats.tx_fifo_errors++;
1429         }
1430
1431         /* Tell the DMA to go go go */
1432         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1433
1434         /* Unlock priv */
1435         spin_unlock_irqrestore(&priv->txlock, flags);
1436
1437         return NETDEV_TX_OK;
1438 }
1439
1440 /* Stops the kernel queue, and halts the controller */
1441 static int gfar_close(struct net_device *dev)
1442 {
1443         struct gfar_private *priv = netdev_priv(dev);
1444
1445         napi_disable(&priv->napi);
1446
1447         skb_queue_purge(&priv->rx_recycle);
1448         cancel_work_sync(&priv->reset_task);
1449         stop_gfar(dev);
1450
1451         /* Disconnect from the PHY */
1452         phy_disconnect(priv->phydev);
1453         priv->phydev = NULL;
1454
1455         netif_stop_queue(dev);
1456
1457         return 0;
1458 }
1459
1460 /* Changes the mac address if the controller is not running. */
1461 static int gfar_set_mac_address(struct net_device *dev)
1462 {
1463         gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1464
1465         return 0;
1466 }
1467
1468
1469 /* Enables and disables VLAN insertion/extraction */
1470 static void gfar_vlan_rx_register(struct net_device *dev,
1471                 struct vlan_group *grp)
1472 {
1473         struct gfar_private *priv = netdev_priv(dev);
1474         unsigned long flags;
1475         u32 tempval;
1476
1477         spin_lock_irqsave(&priv->rxlock, flags);
1478
1479         priv->vlgrp = grp;
1480
1481         if (grp) {
1482                 /* Enable VLAN tag insertion */
1483                 tempval = gfar_read(&priv->regs->tctrl);
1484                 tempval |= TCTRL_VLINS;
1485
1486                 gfar_write(&priv->regs->tctrl, tempval);
1487
1488                 /* Enable VLAN tag extraction */
1489                 tempval = gfar_read(&priv->regs->rctrl);
1490                 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1491                 gfar_write(&priv->regs->rctrl, tempval);
1492         } else {
1493                 /* Disable VLAN tag insertion */
1494                 tempval = gfar_read(&priv->regs->tctrl);
1495                 tempval &= ~TCTRL_VLINS;
1496                 gfar_write(&priv->regs->tctrl, tempval);
1497
1498                 /* Disable VLAN tag extraction */
1499                 tempval = gfar_read(&priv->regs->rctrl);
1500                 tempval &= ~RCTRL_VLEX;
1501                 /* If parse is no longer required, then disable parser */
1502                 if (tempval & RCTRL_REQ_PARSER)
1503                         tempval |= RCTRL_PRSDEP_INIT;
1504                 else
1505                         tempval &= ~RCTRL_PRSDEP_INIT;
1506                 gfar_write(&priv->regs->rctrl, tempval);
1507         }
1508
1509         gfar_change_mtu(dev, dev->mtu);
1510
1511         spin_unlock_irqrestore(&priv->rxlock, flags);
1512 }
1513
1514 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1515 {
1516         int tempsize, tempval;
1517         struct gfar_private *priv = netdev_priv(dev);
1518         int oldsize = priv->rx_buffer_size;
1519         int frame_size = new_mtu + ETH_HLEN;
1520
1521         if (priv->vlgrp)
1522                 frame_size += VLAN_HLEN;
1523
1524         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1525                 if (netif_msg_drv(priv))
1526                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1527                                         dev->name);
1528                 return -EINVAL;
1529         }
1530
1531         if (gfar_uses_fcb(priv))
1532                 frame_size += GMAC_FCB_LEN;
1533
1534         frame_size += priv->padding;
1535
1536         tempsize =
1537             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1538             INCREMENTAL_BUFFER_SIZE;
1539
1540         /* Only stop and start the controller if it isn't already
1541          * stopped, and we changed something */
1542         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1543                 stop_gfar(dev);
1544
1545         priv->rx_buffer_size = tempsize;
1546
1547         dev->mtu = new_mtu;
1548
1549         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1550         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1551
1552         /* If the mtu is larger than the max size for standard
1553          * ethernet frames (ie, a jumbo frame), then set maccfg2
1554          * to allow huge frames, and to check the length */
1555         tempval = gfar_read(&priv->regs->maccfg2);
1556
1557         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1558                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1559         else
1560                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1561
1562         gfar_write(&priv->regs->maccfg2, tempval);
1563
1564         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1565                 startup_gfar(dev);
1566
1567         return 0;
1568 }
1569
1570 /* gfar_reset_task gets scheduled when a packet has not been
1571  * transmitted after a set amount of time.
1572  * For now, assume that clearing out all the structures, and
1573  * starting over will fix the problem.
1574  */
1575 static void gfar_reset_task(struct work_struct *work)
1576 {
1577         struct gfar_private *priv = container_of(work, struct gfar_private,
1578                         reset_task);
1579         struct net_device *dev = priv->ndev;
1580
1581         if (dev->flags & IFF_UP) {
1582                 netif_stop_queue(dev);
1583                 stop_gfar(dev);
1584                 startup_gfar(dev);
1585                 netif_start_queue(dev);
1586         }
1587
1588         netif_tx_schedule_all(dev);
1589 }
1590
1591 static void gfar_timeout(struct net_device *dev)
1592 {
1593         struct gfar_private *priv = netdev_priv(dev);
1594
1595         dev->stats.tx_errors++;
1596         schedule_work(&priv->reset_task);
1597 }
1598
1599 /* Interrupt Handler for Transmit complete */
1600 static int gfar_clean_tx_ring(struct net_device *dev)
1601 {
1602         struct gfar_private *priv = netdev_priv(dev);
1603         struct txbd8 *bdp;
1604         struct txbd8 *lbdp = NULL;
1605         struct txbd8 *base = priv->tx_bd_base;
1606         struct sk_buff *skb;
1607         int skb_dirtytx;
1608         int tx_ring_size = priv->tx_ring_size;
1609         int frags = 0;
1610         int i;
1611         int howmany = 0;
1612         u32 lstatus;
1613
1614         bdp = priv->dirty_tx;
1615         skb_dirtytx = priv->skb_dirtytx;
1616
1617         while ((skb = priv->tx_skbuff[skb_dirtytx])) {
1618                 frags = skb_shinfo(skb)->nr_frags;
1619                 lbdp = skip_txbd(bdp, frags, base, tx_ring_size);
1620
1621                 lstatus = lbdp->lstatus;
1622
1623                 /* Only clean completed frames */
1624                 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
1625                                 (lstatus & BD_LENGTH_MASK))
1626                         break;
1627
1628                 dma_unmap_single(&priv->ofdev->dev,
1629                                 bdp->bufPtr,
1630                                 bdp->length,
1631                                 DMA_TO_DEVICE);
1632
1633                 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1634                 bdp = next_txbd(bdp, base, tx_ring_size);
1635
1636                 for (i = 0; i < frags; i++) {
1637                         dma_unmap_page(&priv->ofdev->dev,
1638                                         bdp->bufPtr,
1639                                         bdp->length,
1640                                         DMA_TO_DEVICE);
1641                         bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1642                         bdp = next_txbd(bdp, base, tx_ring_size);
1643                 }
1644
1645                 /*
1646                  * If there's room in the queue (limit it to rx_buffer_size)
1647                  * we add this skb back into the pool, if it's the right size
1648                  */
1649                 if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
1650                                 skb_recycle_check(skb, priv->rx_buffer_size +
1651                                         RXBUF_ALIGNMENT))
1652                         __skb_queue_head(&priv->rx_recycle, skb);
1653                 else
1654                         dev_kfree_skb_any(skb);
1655
1656                 priv->tx_skbuff[skb_dirtytx] = NULL;
1657
1658                 skb_dirtytx = (skb_dirtytx + 1) &
1659                         TX_RING_MOD_MASK(tx_ring_size);
1660
1661                 howmany++;
1662                 priv->num_txbdfree += frags + 1;
1663         }
1664
1665         /* If we freed a buffer, we can restart transmission, if necessary */
1666         if (netif_queue_stopped(dev) && priv->num_txbdfree)
1667                 netif_wake_queue(dev);
1668
1669         /* Update dirty indicators */
1670         priv->skb_dirtytx = skb_dirtytx;
1671         priv->dirty_tx = bdp;
1672
1673         dev->stats.tx_packets += howmany;
1674
1675         return howmany;
1676 }
1677
1678 static void gfar_schedule_cleanup(struct net_device *dev)
1679 {
1680         struct gfar_private *priv = netdev_priv(dev);
1681         unsigned long flags;
1682
1683         spin_lock_irqsave(&priv->txlock, flags);
1684         spin_lock(&priv->rxlock);
1685
1686         if (napi_schedule_prep(&priv->napi)) {
1687                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
1688                 __napi_schedule(&priv->napi);
1689         } else {
1690                 /*
1691                  * Clear IEVENT, so interrupts aren't called again
1692                  * because of the packets that have already arrived.
1693                  */
1694                 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1695         }
1696
1697         spin_unlock(&priv->rxlock);
1698         spin_unlock_irqrestore(&priv->txlock, flags);
1699 }
1700
1701 /* Interrupt Handler for Transmit complete */
1702 static irqreturn_t gfar_transmit(int irq, void *dev_id)
1703 {
1704         gfar_schedule_cleanup((struct net_device *)dev_id);
1705         return IRQ_HANDLED;
1706 }
1707
1708 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1709                 struct sk_buff *skb)
1710 {
1711         struct gfar_private *priv = netdev_priv(dev);
1712         dma_addr_t buf;
1713
1714         buf = dma_map_single(&priv->ofdev->dev, skb->data,
1715                              priv->rx_buffer_size, DMA_FROM_DEVICE);
1716         gfar_init_rxbdp(dev, bdp, buf);
1717 }
1718
1719
1720 struct sk_buff * gfar_new_skb(struct net_device *dev)
1721 {
1722         unsigned int alignamount;
1723         struct gfar_private *priv = netdev_priv(dev);
1724         struct sk_buff *skb = NULL;
1725
1726         skb = __skb_dequeue(&priv->rx_recycle);
1727         if (!skb)
1728                 skb = netdev_alloc_skb(dev,
1729                                 priv->rx_buffer_size + RXBUF_ALIGNMENT);
1730
1731         if (!skb)
1732                 return NULL;
1733
1734         alignamount = RXBUF_ALIGNMENT -
1735                 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1));
1736
1737         /* We need the data buffer to be aligned properly.  We will reserve
1738          * as many bytes as needed to align the data properly
1739          */
1740         skb_reserve(skb, alignamount);
1741
1742         return skb;
1743 }
1744
1745 static inline void count_errors(unsigned short status, struct net_device *dev)
1746 {
1747         struct gfar_private *priv = netdev_priv(dev);
1748         struct net_device_stats *stats = &dev->stats;
1749         struct gfar_extra_stats *estats = &priv->extra_stats;
1750
1751         /* If the packet was truncated, none of the other errors
1752          * matter */
1753         if (status & RXBD_TRUNCATED) {
1754                 stats->rx_length_errors++;
1755
1756                 estats->rx_trunc++;
1757
1758                 return;
1759         }
1760         /* Count the errors, if there were any */
1761         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1762                 stats->rx_length_errors++;
1763
1764                 if (status & RXBD_LARGE)
1765                         estats->rx_large++;
1766                 else
1767                         estats->rx_short++;
1768         }
1769         if (status & RXBD_NONOCTET) {
1770                 stats->rx_frame_errors++;
1771                 estats->rx_nonoctet++;
1772         }
1773         if (status & RXBD_CRCERR) {
1774                 estats->rx_crcerr++;
1775                 stats->rx_crc_errors++;
1776         }
1777         if (status & RXBD_OVERRUN) {
1778                 estats->rx_overrun++;
1779                 stats->rx_crc_errors++;
1780         }
1781 }
1782
1783 irqreturn_t gfar_receive(int irq, void *dev_id)
1784 {
1785         gfar_schedule_cleanup((struct net_device *)dev_id);
1786         return IRQ_HANDLED;
1787 }
1788
1789 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1790 {
1791         /* If valid headers were found, and valid sums
1792          * were verified, then we tell the kernel that no
1793          * checksumming is necessary.  Otherwise, it is */
1794         if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
1795                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1796         else
1797                 skb->ip_summed = CHECKSUM_NONE;
1798 }
1799
1800
1801 /* gfar_process_frame() -- handle one incoming packet if skb
1802  * isn't NULL.  */
1803 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1804                               int amount_pull)
1805 {
1806         struct gfar_private *priv = netdev_priv(dev);
1807         struct rxfcb *fcb = NULL;
1808
1809         int ret;
1810
1811         /* fcb is at the beginning if exists */
1812         fcb = (struct rxfcb *)skb->data;
1813
1814         /* Remove the FCB from the skb */
1815         /* Remove the padded bytes, if there are any */
1816         if (amount_pull)
1817                 skb_pull(skb, amount_pull);
1818
1819         if (priv->rx_csum_enable)
1820                 gfar_rx_checksum(skb, fcb);
1821
1822         /* Tell the skb what kind of packet this is */
1823         skb->protocol = eth_type_trans(skb, dev);
1824
1825         /* Send the packet up the stack */
1826         if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN)))
1827                 ret = vlan_hwaccel_receive_skb(skb, priv->vlgrp, fcb->vlctl);
1828         else
1829                 ret = netif_receive_skb(skb);
1830
1831         if (NET_RX_DROP == ret)
1832                 priv->extra_stats.kernel_dropped++;
1833
1834         return 0;
1835 }
1836
1837 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1838  *   until the budget/quota has been reached. Returns the number
1839  *   of frames handled
1840  */
1841 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1842 {
1843         struct rxbd8 *bdp, *base;
1844         struct sk_buff *skb;
1845         int pkt_len;
1846         int amount_pull;
1847         int howmany = 0;
1848         struct gfar_private *priv = netdev_priv(dev);
1849
1850         /* Get the first full descriptor */
1851         bdp = priv->cur_rx;
1852         base = priv->rx_bd_base;
1853
1854         amount_pull = (gfar_uses_fcb(priv) ? GMAC_FCB_LEN : 0) +
1855                 priv->padding;
1856
1857         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1858                 struct sk_buff *newskb;
1859                 rmb();
1860
1861                 /* Add another skb for the future */
1862                 newskb = gfar_new_skb(dev);
1863
1864                 skb = priv->rx_skbuff[priv->skb_currx];
1865
1866                 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
1867                                 priv->rx_buffer_size, DMA_FROM_DEVICE);
1868
1869                 /* We drop the frame if we failed to allocate a new buffer */
1870                 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1871                                  bdp->status & RXBD_ERR)) {
1872                         count_errors(bdp->status, dev);
1873
1874                         if (unlikely(!newskb))
1875                                 newskb = skb;
1876                         else if (skb) {
1877                                 /*
1878                                  * We need to reset ->data to what it
1879                                  * was before gfar_new_skb() re-aligned
1880                                  * it to an RXBUF_ALIGNMENT boundary
1881                                  * before we put the skb back on the
1882                                  * recycle list.
1883                                  */
1884                                 skb->data = skb->head + NET_SKB_PAD;
1885                                 __skb_queue_head(&priv->rx_recycle, skb);
1886                         }
1887                 } else {
1888                         /* Increment the number of packets */
1889                         dev->stats.rx_packets++;
1890                         howmany++;
1891
1892                         if (likely(skb)) {
1893                                 pkt_len = bdp->length - ETH_FCS_LEN;
1894                                 /* Remove the FCS from the packet length */
1895                                 skb_put(skb, pkt_len);
1896                                 dev->stats.rx_bytes += pkt_len;
1897
1898                                 if (in_irq() || irqs_disabled())
1899                                         printk("Interrupt problem!\n");
1900                                 gfar_process_frame(dev, skb, amount_pull);
1901
1902                         } else {
1903                                 if (netif_msg_rx_err(priv))
1904                                         printk(KERN_WARNING
1905                                                "%s: Missing skb!\n", dev->name);
1906                                 dev->stats.rx_dropped++;
1907                                 priv->extra_stats.rx_skbmissing++;
1908                         }
1909
1910                 }
1911
1912                 priv->rx_skbuff[priv->skb_currx] = newskb;
1913
1914                 /* Setup the new bdp */
1915                 gfar_new_rxbdp(dev, bdp, newskb);
1916
1917                 /* Update to the next pointer */
1918                 bdp = next_bd(bdp, base, priv->rx_ring_size);
1919
1920                 /* update to point at the next skb */
1921                 priv->skb_currx =
1922                     (priv->skb_currx + 1) &
1923                     RX_RING_MOD_MASK(priv->rx_ring_size);
1924         }
1925
1926         /* Update the current rxbd pointer to be the next one */
1927         priv->cur_rx = bdp;
1928
1929         return howmany;
1930 }
1931
1932 static int gfar_poll(struct napi_struct *napi, int budget)
1933 {
1934         struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
1935         struct net_device *dev = priv->ndev;
1936         int tx_cleaned = 0;
1937         int rx_cleaned = 0;
1938         unsigned long flags;
1939
1940         /* Clear IEVENT, so interrupts aren't called again
1941          * because of the packets that have already arrived */
1942         gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1943
1944         /* If we fail to get the lock, don't bother with the TX BDs */
1945         if (spin_trylock_irqsave(&priv->txlock, flags)) {
1946                 tx_cleaned = gfar_clean_tx_ring(dev);
1947                 spin_unlock_irqrestore(&priv->txlock, flags);
1948         }
1949
1950         rx_cleaned = gfar_clean_rx_ring(dev, budget);
1951
1952         if (tx_cleaned)
1953                 return budget;
1954
1955         if (rx_cleaned < budget) {
1956                 napi_complete(napi);
1957
1958                 /* Clear the halt bit in RSTAT */
1959                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1960
1961                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
1962
1963                 /* If we are coalescing interrupts, update the timer */
1964                 /* Otherwise, clear it */
1965                 if (likely(priv->rxcoalescing)) {
1966                         gfar_write(&priv->regs->rxic, 0);
1967                         gfar_write(&priv->regs->rxic, priv->rxic);
1968                 }
1969                 if (likely(priv->txcoalescing)) {
1970                         gfar_write(&priv->regs->txic, 0);
1971                         gfar_write(&priv->regs->txic, priv->txic);
1972                 }
1973         }
1974
1975         return rx_cleaned;
1976 }
1977
1978 #ifdef CONFIG_NET_POLL_CONTROLLER
1979 /*
1980  * Polling 'interrupt' - used by things like netconsole to send skbs
1981  * without having to re-enable interrupts. It's not called while
1982  * the interrupt routine is executing.
1983  */
1984 static void gfar_netpoll(struct net_device *dev)
1985 {
1986         struct gfar_private *priv = netdev_priv(dev);
1987
1988         /* If the device has multiple interrupts, run tx/rx */
1989         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1990                 disable_irq(priv->interruptTransmit);
1991                 disable_irq(priv->interruptReceive);
1992                 disable_irq(priv->interruptError);
1993                 gfar_interrupt(priv->interruptTransmit, dev);
1994                 enable_irq(priv->interruptError);
1995                 enable_irq(priv->interruptReceive);
1996                 enable_irq(priv->interruptTransmit);
1997         } else {
1998                 disable_irq(priv->interruptTransmit);
1999                 gfar_interrupt(priv->interruptTransmit, dev);
2000                 enable_irq(priv->interruptTransmit);
2001         }
2002 }
2003 #endif
2004
2005 /* The interrupt handler for devices with one interrupt */
2006 static irqreturn_t gfar_interrupt(int irq, void *dev_id)
2007 {
2008         struct net_device *dev = dev_id;
2009         struct gfar_private *priv = netdev_priv(dev);
2010
2011         /* Save ievent for future reference */
2012         u32 events = gfar_read(&priv->regs->ievent);
2013
2014         /* Check for reception */
2015         if (events & IEVENT_RX_MASK)
2016                 gfar_receive(irq, dev_id);
2017
2018         /* Check for transmit completion */
2019         if (events & IEVENT_TX_MASK)
2020                 gfar_transmit(irq, dev_id);
2021
2022         /* Check for errors */
2023         if (events & IEVENT_ERR_MASK)
2024                 gfar_error(irq, dev_id);
2025
2026         return IRQ_HANDLED;
2027 }
2028
2029 /* Called every time the controller might need to be made
2030  * aware of new link state.  The PHY code conveys this
2031  * information through variables in the phydev structure, and this
2032  * function converts those variables into the appropriate
2033  * register values, and can bring down the device if needed.
2034  */
2035 static void adjust_link(struct net_device *dev)
2036 {
2037         struct gfar_private *priv = netdev_priv(dev);
2038         struct gfar __iomem *regs = priv->regs;
2039         unsigned long flags;
2040         struct phy_device *phydev = priv->phydev;
2041         int new_state = 0;
2042
2043         spin_lock_irqsave(&priv->txlock, flags);
2044         if (phydev->link) {
2045                 u32 tempval = gfar_read(&regs->maccfg2);
2046                 u32 ecntrl = gfar_read(&regs->ecntrl);
2047
2048                 /* Now we make sure that we can be in full duplex mode.
2049                  * If not, we operate in half-duplex mode. */
2050                 if (phydev->duplex != priv->oldduplex) {
2051                         new_state = 1;
2052                         if (!(phydev->duplex))
2053                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
2054                         else
2055                                 tempval |= MACCFG2_FULL_DUPLEX;
2056
2057                         priv->oldduplex = phydev->duplex;
2058                 }
2059
2060                 if (phydev->speed != priv->oldspeed) {
2061                         new_state = 1;
2062                         switch (phydev->speed) {
2063                         case 1000:
2064                                 tempval =
2065                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
2066
2067                                 ecntrl &= ~(ECNTRL_R100);
2068                                 break;
2069                         case 100:
2070                         case 10:
2071                                 tempval =
2072                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
2073
2074                                 /* Reduced mode distinguishes
2075                                  * between 10 and 100 */
2076                                 if (phydev->speed == SPEED_100)
2077                                         ecntrl |= ECNTRL_R100;
2078                                 else
2079                                         ecntrl &= ~(ECNTRL_R100);
2080                                 break;
2081                         default:
2082                                 if (netif_msg_link(priv))
2083                                         printk(KERN_WARNING
2084                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
2085                                                 dev->name, phydev->speed);
2086                                 break;
2087                         }
2088
2089                         priv->oldspeed = phydev->speed;
2090                 }
2091
2092                 gfar_write(&regs->maccfg2, tempval);
2093                 gfar_write(&regs->ecntrl, ecntrl);
2094
2095                 if (!priv->oldlink) {
2096                         new_state = 1;
2097                         priv->oldlink = 1;
2098                 }
2099         } else if (priv->oldlink) {
2100                 new_state = 1;
2101                 priv->oldlink = 0;
2102                 priv->oldspeed = 0;
2103                 priv->oldduplex = -1;
2104         }
2105
2106         if (new_state && netif_msg_link(priv))
2107                 phy_print_status(phydev);
2108
2109         spin_unlock_irqrestore(&priv->txlock, flags);
2110 }
2111
2112 /* Update the hash table based on the current list of multicast
2113  * addresses we subscribe to.  Also, change the promiscuity of
2114  * the device based on the flags (this function is called
2115  * whenever dev->flags is changed */
2116 static void gfar_set_multi(struct net_device *dev)
2117 {
2118         struct dev_mc_list *mc_ptr;
2119         struct gfar_private *priv = netdev_priv(dev);
2120         struct gfar __iomem *regs = priv->regs;
2121         u32 tempval;
2122
2123         if(dev->flags & IFF_PROMISC) {
2124                 /* Set RCTRL to PROM */
2125                 tempval = gfar_read(&regs->rctrl);
2126                 tempval |= RCTRL_PROM;
2127                 gfar_write(&regs->rctrl, tempval);
2128         } else {
2129                 /* Set RCTRL to not PROM */
2130                 tempval = gfar_read(&regs->rctrl);
2131                 tempval &= ~(RCTRL_PROM);
2132                 gfar_write(&regs->rctrl, tempval);
2133         }
2134
2135         if(dev->flags & IFF_ALLMULTI) {
2136                 /* Set the hash to rx all multicast frames */
2137                 gfar_write(&regs->igaddr0, 0xffffffff);
2138                 gfar_write(&regs->igaddr1, 0xffffffff);
2139                 gfar_write(&regs->igaddr2, 0xffffffff);
2140                 gfar_write(&regs->igaddr3, 0xffffffff);
2141                 gfar_write(&regs->igaddr4, 0xffffffff);
2142                 gfar_write(&regs->igaddr5, 0xffffffff);
2143                 gfar_write(&regs->igaddr6, 0xffffffff);
2144                 gfar_write(&regs->igaddr7, 0xffffffff);
2145                 gfar_write(&regs->gaddr0, 0xffffffff);
2146                 gfar_write(&regs->gaddr1, 0xffffffff);
2147                 gfar_write(&regs->gaddr2, 0xffffffff);
2148                 gfar_write(&regs->gaddr3, 0xffffffff);
2149                 gfar_write(&regs->gaddr4, 0xffffffff);
2150                 gfar_write(&regs->gaddr5, 0xffffffff);
2151                 gfar_write(&regs->gaddr6, 0xffffffff);
2152                 gfar_write(&regs->gaddr7, 0xffffffff);
2153         } else {
2154                 int em_num;
2155                 int idx;
2156
2157                 /* zero out the hash */
2158                 gfar_write(&regs->igaddr0, 0x0);
2159                 gfar_write(&regs->igaddr1, 0x0);
2160                 gfar_write(&regs->igaddr2, 0x0);
2161                 gfar_write(&regs->igaddr3, 0x0);
2162                 gfar_write(&regs->igaddr4, 0x0);
2163                 gfar_write(&regs->igaddr5, 0x0);
2164                 gfar_write(&regs->igaddr6, 0x0);
2165                 gfar_write(&regs->igaddr7, 0x0);
2166                 gfar_write(&regs->gaddr0, 0x0);
2167                 gfar_write(&regs->gaddr1, 0x0);
2168                 gfar_write(&regs->gaddr2, 0x0);
2169                 gfar_write(&regs->gaddr3, 0x0);
2170                 gfar_write(&regs->gaddr4, 0x0);
2171                 gfar_write(&regs->gaddr5, 0x0);
2172                 gfar_write(&regs->gaddr6, 0x0);
2173                 gfar_write(&regs->gaddr7, 0x0);
2174
2175                 /* If we have extended hash tables, we need to
2176                  * clear the exact match registers to prepare for
2177                  * setting them */
2178                 if (priv->extended_hash) {
2179                         em_num = GFAR_EM_NUM + 1;
2180                         gfar_clear_exact_match(dev);
2181                         idx = 1;
2182                 } else {
2183                         idx = 0;
2184                         em_num = 0;
2185                 }
2186
2187                 if(dev->mc_count == 0)
2188                         return;
2189
2190                 /* Parse the list, and set the appropriate bits */
2191                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
2192                         if (idx < em_num) {
2193                                 gfar_set_mac_for_addr(dev, idx,
2194                                                 mc_ptr->dmi_addr);
2195                                 idx++;
2196                         } else
2197                                 gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
2198                 }
2199         }
2200
2201         return;
2202 }
2203
2204
2205 /* Clears each of the exact match registers to zero, so they
2206  * don't interfere with normal reception */
2207 static void gfar_clear_exact_match(struct net_device *dev)
2208 {
2209         int idx;
2210         u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0};
2211
2212         for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
2213                 gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr);
2214 }
2215
2216 /* Set the appropriate hash bit for the given addr */
2217 /* The algorithm works like so:
2218  * 1) Take the Destination Address (ie the multicast address), and
2219  * do a CRC on it (little endian), and reverse the bits of the
2220  * result.
2221  * 2) Use the 8 most significant bits as a hash into a 256-entry
2222  * table.  The table is controlled through 8 32-bit registers:
2223  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
2224  * gaddr7.  This means that the 3 most significant bits in the
2225  * hash index which gaddr register to use, and the 5 other bits
2226  * indicate which bit (assuming an IBM numbering scheme, which
2227  * for PowerPC (tm) is usually the case) in the register holds
2228  * the entry. */
2229 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2230 {
2231         u32 tempval;
2232         struct gfar_private *priv = netdev_priv(dev);
2233         u32 result = ether_crc(MAC_ADDR_LEN, addr);
2234         int width = priv->hash_width;
2235         u8 whichbit = (result >> (32 - width)) & 0x1f;
2236         u8 whichreg = result >> (32 - width + 5);
2237         u32 value = (1 << (31-whichbit));
2238
2239         tempval = gfar_read(priv->hash_regs[whichreg]);
2240         tempval |= value;
2241         gfar_write(priv->hash_regs[whichreg], tempval);
2242
2243         return;
2244 }
2245
2246
2247 /* There are multiple MAC Address register pairs on some controllers
2248  * This function sets the numth pair to a given address
2249  */
2250 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2251 {
2252         struct gfar_private *priv = netdev_priv(dev);
2253         int idx;
2254         char tmpbuf[MAC_ADDR_LEN];
2255         u32 tempval;
2256         u32 __iomem *macptr = &priv->regs->macstnaddr1;
2257
2258         macptr += num*2;
2259
2260         /* Now copy it into the mac registers backwards, cuz */
2261         /* little endian is silly */
2262         for (idx = 0; idx < MAC_ADDR_LEN; idx++)
2263                 tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx];
2264
2265         gfar_write(macptr, *((u32 *) (tmpbuf)));
2266
2267         tempval = *((u32 *) (tmpbuf + 4));
2268
2269         gfar_write(macptr+1, tempval);
2270 }
2271
2272 /* GFAR error interrupt handler */
2273 static irqreturn_t gfar_error(int irq, void *dev_id)
2274 {
2275         struct net_device *dev = dev_id;
2276         struct gfar_private *priv = netdev_priv(dev);
2277
2278         /* Save ievent for future reference */
2279         u32 events = gfar_read(&priv->regs->ievent);
2280
2281         /* Clear IEVENT */
2282         gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK);
2283
2284         /* Magic Packet is not an error. */
2285         if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
2286             (events & IEVENT_MAG))
2287                 events &= ~IEVENT_MAG;
2288
2289         /* Hmm... */
2290         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2291                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2292                        dev->name, events, gfar_read(&priv->regs->imask));
2293
2294         /* Update the error counters */
2295         if (events & IEVENT_TXE) {
2296                 dev->stats.tx_errors++;
2297
2298                 if (events & IEVENT_LC)
2299                         dev->stats.tx_window_errors++;
2300                 if (events & IEVENT_CRL)
2301                         dev->stats.tx_aborted_errors++;
2302                 if (events & IEVENT_XFUN) {
2303                         if (netif_msg_tx_err(priv))
2304                                 printk(KERN_DEBUG "%s: TX FIFO underrun, "
2305                                        "packet dropped.\n", dev->name);
2306                         dev->stats.tx_dropped++;
2307                         priv->extra_stats.tx_underrun++;
2308
2309                         /* Reactivate the Tx Queues */
2310                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
2311                 }
2312                 if (netif_msg_tx_err(priv))
2313                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
2314         }
2315         if (events & IEVENT_BSY) {
2316                 dev->stats.rx_errors++;
2317                 priv->extra_stats.rx_bsy++;
2318
2319                 gfar_receive(irq, dev_id);
2320
2321                 if (netif_msg_rx_err(priv))
2322                         printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2323                                dev->name, gfar_read(&priv->regs->rstat));
2324         }
2325         if (events & IEVENT_BABR) {
2326                 dev->stats.rx_errors++;
2327                 priv->extra_stats.rx_babr++;
2328
2329                 if (netif_msg_rx_err(priv))
2330                         printk(KERN_DEBUG "%s: babbling RX error\n", dev->name);
2331         }
2332         if (events & IEVENT_EBERR) {
2333                 priv->extra_stats.eberr++;
2334                 if (netif_msg_rx_err(priv))
2335                         printk(KERN_DEBUG "%s: bus error\n", dev->name);
2336         }
2337         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
2338                 printk(KERN_DEBUG "%s: control frame\n", dev->name);
2339
2340         if (events & IEVENT_BABT) {
2341                 priv->extra_stats.tx_babt++;
2342                 if (netif_msg_tx_err(priv))
2343                         printk(KERN_DEBUG "%s: babbling TX error\n", dev->name);
2344         }
2345         return IRQ_HANDLED;
2346 }
2347
2348 /* work with hotplug and coldplug */
2349 MODULE_ALIAS("platform:fsl-gianfar");
2350
2351 static struct of_device_id gfar_match[] =
2352 {
2353         {
2354                 .type = "network",
2355                 .compatible = "gianfar",
2356         },
2357         {},
2358 };
2359
2360 /* Structure for a device driver */
2361 static struct of_platform_driver gfar_driver = {
2362         .name = "fsl-gianfar",
2363         .match_table = gfar_match,
2364
2365         .probe = gfar_probe,
2366         .remove = gfar_remove,
2367         .suspend = gfar_suspend,
2368         .resume = gfar_resume,
2369 };
2370
2371 static int __init gfar_init(void)
2372 {
2373         return of_register_platform_driver(&gfar_driver);
2374 }
2375
2376 static void __exit gfar_exit(void)
2377 {
2378         of_unregister_platform_driver(&gfar_driver);
2379 }
2380
2381 module_init(gfar_init);
2382 module_exit(gfar_exit);
2383