gianfar: Split allocation and initialization steps out of startup_gfar()
[linux-2.6.git] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * This driver is designed for the non-CPM ethernet controllers
6  * on the 85xx and 83xx family of integrated processors
7  * Based on 8260_io/fcc_enet.c
8  *
9  * Author: Andy Fleming
10  * Maintainer: Kumar Gala
11  *
12  * Copyright (c) 2002-2006 Freescale Semiconductor, Inc.
13  * Copyright (c) 2007 MontaVista Software, Inc.
14  *
15  * This program is free software; you can redistribute  it and/or modify it
16  * under  the terms of  the GNU General  Public License as published by the
17  * Free Software Foundation;  either version 2 of the  License, or (at your
18  * option) any later version.
19  *
20  *  Gianfar:  AKA Lambda Draconis, "Dragon"
21  *  RA 11 31 24.2
22  *  Dec +69 19 52
23  *  V 3.84
24  *  B-V +1.62
25  *
26  *  Theory of operation
27  *
28  *  The driver is initialized through of_device. Configuration information
29  *  is therefore conveyed through an OF-style device tree.
30  *
31  *  The Gianfar Ethernet Controller uses a ring of buffer
32  *  descriptors.  The beginning is indicated by a register
33  *  pointing to the physical address of the start of the ring.
34  *  The end is determined by a "wrap" bit being set in the
35  *  last descriptor of the ring.
36  *
37  *  When a packet is received, the RXF bit in the
38  *  IEVENT register is set, triggering an interrupt when the
39  *  corresponding bit in the IMASK register is also set (if
40  *  interrupt coalescing is active, then the interrupt may not
41  *  happen immediately, but will wait until either a set number
42  *  of frames or amount of time have passed).  In NAPI, the
43  *  interrupt handler will signal there is work to be done, and
44  *  exit. This method will start at the last known empty
45  *  descriptor, and process every subsequent descriptor until there
46  *  are none left with data (NAPI will stop after a set number of
47  *  packets to give time to other tasks, but will eventually
48  *  process all the packets).  The data arrives inside a
49  *  pre-allocated skb, and so after the skb is passed up to the
50  *  stack, a new skb must be allocated, and the address field in
51  *  the buffer descriptor must be updated to indicate this new
52  *  skb.
53  *
54  *  When the kernel requests that a packet be transmitted, the
55  *  driver starts where it left off last time, and points the
56  *  descriptor at the buffer which was passed in.  The driver
57  *  then informs the DMA engine that there are packets ready to
58  *  be transmitted.  Once the controller is finished transmitting
59  *  the packet, an interrupt may be triggered (under the same
60  *  conditions as for reception, but depending on the TXF bit).
61  *  The driver then cleans up the buffer.
62  */
63
64 #include <linux/kernel.h>
65 #include <linux/string.h>
66 #include <linux/errno.h>
67 #include <linux/unistd.h>
68 #include <linux/slab.h>
69 #include <linux/interrupt.h>
70 #include <linux/init.h>
71 #include <linux/delay.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #include <linux/if_vlan.h>
76 #include <linux/spinlock.h>
77 #include <linux/mm.h>
78 #include <linux/of_mdio.h>
79 #include <linux/of_platform.h>
80 #include <linux/ip.h>
81 #include <linux/tcp.h>
82 #include <linux/udp.h>
83 #include <linux/in.h>
84
85 #include <asm/io.h>
86 #include <asm/irq.h>
87 #include <asm/uaccess.h>
88 #include <linux/module.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/crc32.h>
91 #include <linux/mii.h>
92 #include <linux/phy.h>
93 #include <linux/phy_fixed.h>
94 #include <linux/of.h>
95
96 #include "gianfar.h"
97 #include "fsl_pq_mdio.h"
98
99 #define TX_TIMEOUT      (1*HZ)
100 #undef BRIEF_GFAR_ERRORS
101 #undef VERBOSE_GFAR_ERRORS
102
103 const char gfar_driver_name[] = "Gianfar Ethernet";
104 const char gfar_driver_version[] = "1.3";
105
106 static int gfar_enet_open(struct net_device *dev);
107 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
108 static void gfar_reset_task(struct work_struct *work);
109 static void gfar_timeout(struct net_device *dev);
110 static int gfar_close(struct net_device *dev);
111 struct sk_buff *gfar_new_skb(struct net_device *dev);
112 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
113                 struct sk_buff *skb);
114 static int gfar_set_mac_address(struct net_device *dev);
115 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
116 static irqreturn_t gfar_error(int irq, void *dev_id);
117 static irqreturn_t gfar_transmit(int irq, void *dev_id);
118 static irqreturn_t gfar_interrupt(int irq, void *dev_id);
119 static void adjust_link(struct net_device *dev);
120 static void init_registers(struct net_device *dev);
121 static int init_phy(struct net_device *dev);
122 static int gfar_probe(struct of_device *ofdev,
123                 const struct of_device_id *match);
124 static int gfar_remove(struct of_device *ofdev);
125 static void free_skb_resources(struct gfar_private *priv);
126 static void gfar_set_multi(struct net_device *dev);
127 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
128 static void gfar_configure_serdes(struct net_device *dev);
129 static int gfar_poll(struct napi_struct *napi, int budget);
130 #ifdef CONFIG_NET_POLL_CONTROLLER
131 static void gfar_netpoll(struct net_device *dev);
132 #endif
133 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
134 static int gfar_clean_tx_ring(struct net_device *dev);
135 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
136                               int amount_pull);
137 static void gfar_vlan_rx_register(struct net_device *netdev,
138                                 struct vlan_group *grp);
139 void gfar_halt(struct net_device *dev);
140 static void gfar_halt_nodisable(struct net_device *dev);
141 void gfar_start(struct net_device *dev);
142 static void gfar_clear_exact_match(struct net_device *dev);
143 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
144 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
145
146 MODULE_AUTHOR("Freescale Semiconductor, Inc");
147 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
148 MODULE_LICENSE("GPL");
149
150 static int gfar_alloc_skb_resources(struct net_device *ndev)
151 {
152         struct txbd8 *txbdp;
153         struct rxbd8 *rxbdp;
154         dma_addr_t addr = 0;
155         void *vaddr;
156         int i;
157         struct gfar_private *priv = netdev_priv(ndev);
158         struct device *dev = &priv->ofdev->dev;
159         struct gfar __iomem *regs = priv->regs;
160
161         /* Allocate memory for the buffer descriptors */
162         vaddr = dma_alloc_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
163                                         sizeof(*rxbdp) * priv->rx_ring_size,
164                                    &addr, GFP_KERNEL);
165         if (!vaddr) {
166                 if (netif_msg_ifup(priv))
167                         pr_err("%s: Could not allocate buffer descriptors!\n",
168                                ndev->name);
169                 return -ENOMEM;
170         }
171
172         priv->tx_bd_base = vaddr;
173
174         /* enet DMA only understands physical addresses */
175         gfar_write(&regs->tbase0, addr);
176
177         /* Start the rx descriptor ring where the tx ring leaves off */
178         addr = addr + sizeof(*txbdp) * priv->tx_ring_size;
179         vaddr = vaddr + sizeof(*txbdp) * priv->tx_ring_size;
180         priv->rx_bd_base = vaddr;
181         gfar_write(&regs->rbase0, addr);
182
183         /* Setup the skbuff rings */
184         priv->tx_skbuff = kmalloc(sizeof(*priv->tx_skbuff) *
185                                   priv->tx_ring_size, GFP_KERNEL);
186         if (!priv->tx_skbuff) {
187                 if (netif_msg_ifup(priv))
188                         pr_err("%s: Could not allocate tx_skbuff\n",
189                                ndev->name);
190                 goto cleanup;
191         }
192
193         for (i = 0; i < priv->tx_ring_size; i++)
194                 priv->tx_skbuff[i] = NULL;
195
196         priv->rx_skbuff = kmalloc(sizeof(*priv->rx_skbuff) *
197                                   priv->rx_ring_size, GFP_KERNEL);
198         if (!priv->rx_skbuff) {
199                 if (netif_msg_ifup(priv))
200                         pr_err("%s: Could not allocate rx_skbuff\n",
201                                ndev->name);
202                 goto cleanup;
203         }
204
205         for (i = 0; i < priv->rx_ring_size; i++)
206                 priv->rx_skbuff[i] = NULL;
207
208         /* Initialize some variables in our dev structure */
209         priv->num_txbdfree = priv->tx_ring_size;
210         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
211         priv->cur_rx = priv->rx_bd_base;
212         priv->skb_curtx = priv->skb_dirtytx = 0;
213         priv->skb_currx = 0;
214
215         /* Initialize Transmit Descriptor Ring */
216         txbdp = priv->tx_bd_base;
217         for (i = 0; i < priv->tx_ring_size; i++) {
218                 txbdp->lstatus = 0;
219                 txbdp->bufPtr = 0;
220                 txbdp++;
221         }
222
223         /* Set the last descriptor in the ring to indicate wrap */
224         txbdp--;
225         txbdp->status |= TXBD_WRAP;
226
227         rxbdp = priv->rx_bd_base;
228         for (i = 0; i < priv->rx_ring_size; i++) {
229                 struct sk_buff *skb;
230
231                 skb = gfar_new_skb(ndev);
232                 if (!skb) {
233                         pr_err("%s: Can't allocate RX buffers\n", ndev->name);
234                         goto cleanup;
235                 }
236
237                 priv->rx_skbuff[i] = skb;
238
239                 gfar_new_rxbdp(ndev, rxbdp, skb);
240
241                 rxbdp++;
242         }
243
244         return 0;
245
246 cleanup:
247         free_skb_resources(priv);
248         return -ENOMEM;
249 }
250
251 static void gfar_init_mac(struct net_device *ndev)
252 {
253         struct gfar_private *priv = netdev_priv(ndev);
254         struct gfar __iomem *regs = priv->regs;
255         u32 rctrl = 0;
256         u32 tctrl = 0;
257         u32 attrs = 0;
258
259         /* Configure the coalescing support */
260         gfar_write(&regs->txic, 0);
261         if (priv->txcoalescing)
262                 gfar_write(&regs->txic, priv->txic);
263
264         gfar_write(&regs->rxic, 0);
265         if (priv->rxcoalescing)
266                 gfar_write(&regs->rxic, priv->rxic);
267
268         if (priv->rx_csum_enable)
269                 rctrl |= RCTRL_CHECKSUMMING;
270
271         if (priv->extended_hash) {
272                 rctrl |= RCTRL_EXTHASH;
273
274                 gfar_clear_exact_match(ndev);
275                 rctrl |= RCTRL_EMEN;
276         }
277
278         if (priv->padding) {
279                 rctrl &= ~RCTRL_PAL_MASK;
280                 rctrl |= RCTRL_PADDING(priv->padding);
281         }
282
283         /* keep vlan related bits if it's enabled */
284         if (priv->vlgrp) {
285                 rctrl |= RCTRL_VLEX | RCTRL_PRSDEP_INIT;
286                 tctrl |= TCTRL_VLINS;
287         }
288
289         /* Init rctrl based on our settings */
290         gfar_write(&regs->rctrl, rctrl);
291
292         if (ndev->features & NETIF_F_IP_CSUM)
293                 tctrl |= TCTRL_INIT_CSUM;
294
295         gfar_write(&regs->tctrl, tctrl);
296
297         /* Set the extraction length and index */
298         attrs = ATTRELI_EL(priv->rx_stash_size) |
299                 ATTRELI_EI(priv->rx_stash_index);
300
301         gfar_write(&regs->attreli, attrs);
302
303         /* Start with defaults, and add stashing or locking
304          * depending on the approprate variables */
305         attrs = ATTR_INIT_SETTINGS;
306
307         if (priv->bd_stash_en)
308                 attrs |= ATTR_BDSTASH;
309
310         if (priv->rx_stash_size != 0)
311                 attrs |= ATTR_BUFSTASH;
312
313         gfar_write(&regs->attr, attrs);
314
315         gfar_write(&regs->fifo_tx_thr, priv->fifo_threshold);
316         gfar_write(&regs->fifo_tx_starve, priv->fifo_starve);
317         gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
318 }
319
320 static const struct net_device_ops gfar_netdev_ops = {
321         .ndo_open = gfar_enet_open,
322         .ndo_start_xmit = gfar_start_xmit,
323         .ndo_stop = gfar_close,
324         .ndo_change_mtu = gfar_change_mtu,
325         .ndo_set_multicast_list = gfar_set_multi,
326         .ndo_tx_timeout = gfar_timeout,
327         .ndo_do_ioctl = gfar_ioctl,
328         .ndo_vlan_rx_register = gfar_vlan_rx_register,
329         .ndo_set_mac_address = eth_mac_addr,
330         .ndo_validate_addr = eth_validate_addr,
331 #ifdef CONFIG_NET_POLL_CONTROLLER
332         .ndo_poll_controller = gfar_netpoll,
333 #endif
334 };
335
336 /* Returns 1 if incoming frames use an FCB */
337 static inline int gfar_uses_fcb(struct gfar_private *priv)
338 {
339         return priv->vlgrp || priv->rx_csum_enable;
340 }
341
342 static int gfar_of_init(struct net_device *dev)
343 {
344         const char *model;
345         const char *ctype;
346         const void *mac_addr;
347         u64 addr, size;
348         int err = 0;
349         struct gfar_private *priv = netdev_priv(dev);
350         struct device_node *np = priv->node;
351         const u32 *stash;
352         const u32 *stash_len;
353         const u32 *stash_idx;
354
355         if (!np || !of_device_is_available(np))
356                 return -ENODEV;
357
358         /* get a pointer to the register memory */
359         addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
360         priv->regs = ioremap(addr, size);
361
362         if (priv->regs == NULL)
363                 return -ENOMEM;
364
365         priv->interruptTransmit = irq_of_parse_and_map(np, 0);
366
367         model = of_get_property(np, "model", NULL);
368
369         /* If we aren't the FEC we have multiple interrupts */
370         if (model && strcasecmp(model, "FEC")) {
371                 priv->interruptReceive = irq_of_parse_and_map(np, 1);
372
373                 priv->interruptError = irq_of_parse_and_map(np, 2);
374
375                 if (priv->interruptTransmit < 0 ||
376                                 priv->interruptReceive < 0 ||
377                                 priv->interruptError < 0) {
378                         err = -EINVAL;
379                         goto err_out;
380                 }
381         }
382
383         stash = of_get_property(np, "bd-stash", NULL);
384
385         if(stash) {
386                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BD_STASHING;
387                 priv->bd_stash_en = 1;
388         }
389
390         stash_len = of_get_property(np, "rx-stash-len", NULL);
391
392         if (stash_len)
393                 priv->rx_stash_size = *stash_len;
394
395         stash_idx = of_get_property(np, "rx-stash-idx", NULL);
396
397         if (stash_idx)
398                 priv->rx_stash_index = *stash_idx;
399
400         if (stash_len || stash_idx)
401                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_BUF_STASHING;
402
403         mac_addr = of_get_mac_address(np);
404         if (mac_addr)
405                 memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
406
407         if (model && !strcasecmp(model, "TSEC"))
408                 priv->device_flags =
409                         FSL_GIANFAR_DEV_HAS_GIGABIT |
410                         FSL_GIANFAR_DEV_HAS_COALESCE |
411                         FSL_GIANFAR_DEV_HAS_RMON |
412                         FSL_GIANFAR_DEV_HAS_MULTI_INTR;
413         if (model && !strcasecmp(model, "eTSEC"))
414                 priv->device_flags =
415                         FSL_GIANFAR_DEV_HAS_GIGABIT |
416                         FSL_GIANFAR_DEV_HAS_COALESCE |
417                         FSL_GIANFAR_DEV_HAS_RMON |
418                         FSL_GIANFAR_DEV_HAS_MULTI_INTR |
419                         FSL_GIANFAR_DEV_HAS_PADDING |
420                         FSL_GIANFAR_DEV_HAS_CSUM |
421                         FSL_GIANFAR_DEV_HAS_VLAN |
422                         FSL_GIANFAR_DEV_HAS_MAGIC_PACKET |
423                         FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
424
425         ctype = of_get_property(np, "phy-connection-type", NULL);
426
427         /* We only care about rgmii-id.  The rest are autodetected */
428         if (ctype && !strcmp(ctype, "rgmii-id"))
429                 priv->interface = PHY_INTERFACE_MODE_RGMII_ID;
430         else
431                 priv->interface = PHY_INTERFACE_MODE_MII;
432
433         if (of_get_property(np, "fsl,magic-packet", NULL))
434                 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
435
436         priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
437
438         /* Find the TBI PHY.  If it's not there, we don't support SGMII */
439         priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
440
441         return 0;
442
443 err_out:
444         iounmap(priv->regs);
445         return err;
446 }
447
448 /* Ioctl MII Interface */
449 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
450 {
451         struct gfar_private *priv = netdev_priv(dev);
452
453         if (!netif_running(dev))
454                 return -EINVAL;
455
456         if (!priv->phydev)
457                 return -ENODEV;
458
459         return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
460 }
461
462 /* Set up the ethernet device structure, private data,
463  * and anything else we need before we start */
464 static int gfar_probe(struct of_device *ofdev,
465                 const struct of_device_id *match)
466 {
467         u32 tempval;
468         struct net_device *dev = NULL;
469         struct gfar_private *priv = NULL;
470         int err = 0;
471         int len_devname;
472
473         /* Create an ethernet device instance */
474         dev = alloc_etherdev(sizeof (*priv));
475
476         if (NULL == dev)
477                 return -ENOMEM;
478
479         priv = netdev_priv(dev);
480         priv->ndev = dev;
481         priv->ofdev = ofdev;
482         priv->node = ofdev->node;
483         SET_NETDEV_DEV(dev, &ofdev->dev);
484
485         err = gfar_of_init(dev);
486
487         if (err)
488                 goto regs_fail;
489
490         spin_lock_init(&priv->txlock);
491         spin_lock_init(&priv->rxlock);
492         spin_lock_init(&priv->bflock);
493         INIT_WORK(&priv->reset_task, gfar_reset_task);
494
495         dev_set_drvdata(&ofdev->dev, priv);
496
497         /* Stop the DMA engine now, in case it was running before */
498         /* (The firmware could have used it, and left it running). */
499         gfar_halt(dev);
500
501         /* Reset MAC layer */
502         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
503
504         /* We need to delay at least 3 TX clocks */
505         udelay(2);
506
507         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
508         gfar_write(&priv->regs->maccfg1, tempval);
509
510         /* Initialize MACCFG2. */
511         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
512
513         /* Initialize ECNTRL */
514         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
515
516         /* Set the dev->base_addr to the gfar reg region */
517         dev->base_addr = (unsigned long) (priv->regs);
518
519         SET_NETDEV_DEV(dev, &ofdev->dev);
520
521         /* Fill in the dev structure */
522         dev->watchdog_timeo = TX_TIMEOUT;
523         netif_napi_add(dev, &priv->napi, gfar_poll, GFAR_DEV_WEIGHT);
524         dev->mtu = 1500;
525
526         dev->netdev_ops = &gfar_netdev_ops;
527         dev->ethtool_ops = &gfar_ethtool_ops;
528
529         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
530                 priv->rx_csum_enable = 1;
531                 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA;
532         } else
533                 priv->rx_csum_enable = 0;
534
535         priv->vlgrp = NULL;
536
537         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN)
538                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
539
540         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
541                 priv->extended_hash = 1;
542                 priv->hash_width = 9;
543
544                 priv->hash_regs[0] = &priv->regs->igaddr0;
545                 priv->hash_regs[1] = &priv->regs->igaddr1;
546                 priv->hash_regs[2] = &priv->regs->igaddr2;
547                 priv->hash_regs[3] = &priv->regs->igaddr3;
548                 priv->hash_regs[4] = &priv->regs->igaddr4;
549                 priv->hash_regs[5] = &priv->regs->igaddr5;
550                 priv->hash_regs[6] = &priv->regs->igaddr6;
551                 priv->hash_regs[7] = &priv->regs->igaddr7;
552                 priv->hash_regs[8] = &priv->regs->gaddr0;
553                 priv->hash_regs[9] = &priv->regs->gaddr1;
554                 priv->hash_regs[10] = &priv->regs->gaddr2;
555                 priv->hash_regs[11] = &priv->regs->gaddr3;
556                 priv->hash_regs[12] = &priv->regs->gaddr4;
557                 priv->hash_regs[13] = &priv->regs->gaddr5;
558                 priv->hash_regs[14] = &priv->regs->gaddr6;
559                 priv->hash_regs[15] = &priv->regs->gaddr7;
560
561         } else {
562                 priv->extended_hash = 0;
563                 priv->hash_width = 8;
564
565                 priv->hash_regs[0] = &priv->regs->gaddr0;
566                 priv->hash_regs[1] = &priv->regs->gaddr1;
567                 priv->hash_regs[2] = &priv->regs->gaddr2;
568                 priv->hash_regs[3] = &priv->regs->gaddr3;
569                 priv->hash_regs[4] = &priv->regs->gaddr4;
570                 priv->hash_regs[5] = &priv->regs->gaddr5;
571                 priv->hash_regs[6] = &priv->regs->gaddr6;
572                 priv->hash_regs[7] = &priv->regs->gaddr7;
573         }
574
575         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
576                 priv->padding = DEFAULT_PADDING;
577         else
578                 priv->padding = 0;
579
580         if (dev->features & NETIF_F_IP_CSUM)
581                 dev->hard_header_len += GMAC_FCB_LEN;
582
583         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
584         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
585         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
586         priv->num_txbdfree = DEFAULT_TX_RING_SIZE;
587
588         priv->txcoalescing = DEFAULT_TX_COALESCE;
589         priv->txic = DEFAULT_TXIC;
590         priv->rxcoalescing = DEFAULT_RX_COALESCE;
591         priv->rxic = DEFAULT_RXIC;
592
593         /* Enable most messages by default */
594         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
595
596         /* Carrier starts down, phylib will bring it up */
597         netif_carrier_off(dev);
598
599         err = register_netdev(dev);
600
601         if (err) {
602                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
603                                 dev->name);
604                 goto register_fail;
605         }
606
607         device_init_wakeup(&dev->dev,
608                 priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
609
610         /* fill out IRQ number and name fields */
611         len_devname = strlen(dev->name);
612         strncpy(&priv->int_name_tx[0], dev->name, len_devname);
613         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
614                 strncpy(&priv->int_name_tx[len_devname],
615                         "_tx", sizeof("_tx") + 1);
616
617                 strncpy(&priv->int_name_rx[0], dev->name, len_devname);
618                 strncpy(&priv->int_name_rx[len_devname],
619                         "_rx", sizeof("_rx") + 1);
620
621                 strncpy(&priv->int_name_er[0], dev->name, len_devname);
622                 strncpy(&priv->int_name_er[len_devname],
623                         "_er", sizeof("_er") + 1);
624         } else
625                 priv->int_name_tx[len_devname] = '\0';
626
627         /* Create all the sysfs files */
628         gfar_init_sysfs(dev);
629
630         /* Print out the device info */
631         printk(KERN_INFO DEVICE_NAME "%pM\n", dev->name, dev->dev_addr);
632
633         /* Even more device info helps when determining which kernel */
634         /* provided which set of benchmarks. */
635         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
636         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
637                dev->name, priv->rx_ring_size, priv->tx_ring_size);
638
639         return 0;
640
641 register_fail:
642         iounmap(priv->regs);
643 regs_fail:
644         if (priv->phy_node)
645                 of_node_put(priv->phy_node);
646         if (priv->tbi_node)
647                 of_node_put(priv->tbi_node);
648         free_netdev(dev);
649         return err;
650 }
651
652 static int gfar_remove(struct of_device *ofdev)
653 {
654         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
655
656         if (priv->phy_node)
657                 of_node_put(priv->phy_node);
658         if (priv->tbi_node)
659                 of_node_put(priv->tbi_node);
660
661         dev_set_drvdata(&ofdev->dev, NULL);
662
663         unregister_netdev(priv->ndev);
664         iounmap(priv->regs);
665         free_netdev(priv->ndev);
666
667         return 0;
668 }
669
670 #ifdef CONFIG_PM
671 static int gfar_suspend(struct of_device *ofdev, pm_message_t state)
672 {
673         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
674         struct net_device *dev = priv->ndev;
675         unsigned long flags;
676         u32 tempval;
677
678         int magic_packet = priv->wol_en &&
679                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
680
681         netif_device_detach(dev);
682
683         if (netif_running(dev)) {
684                 spin_lock_irqsave(&priv->txlock, flags);
685                 spin_lock(&priv->rxlock);
686
687                 gfar_halt_nodisable(dev);
688
689                 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
690                 tempval = gfar_read(&priv->regs->maccfg1);
691
692                 tempval &= ~MACCFG1_TX_EN;
693
694                 if (!magic_packet)
695                         tempval &= ~MACCFG1_RX_EN;
696
697                 gfar_write(&priv->regs->maccfg1, tempval);
698
699                 spin_unlock(&priv->rxlock);
700                 spin_unlock_irqrestore(&priv->txlock, flags);
701
702                 napi_disable(&priv->napi);
703
704                 if (magic_packet) {
705                         /* Enable interrupt on Magic Packet */
706                         gfar_write(&priv->regs->imask, IMASK_MAG);
707
708                         /* Enable Magic Packet mode */
709                         tempval = gfar_read(&priv->regs->maccfg2);
710                         tempval |= MACCFG2_MPEN;
711                         gfar_write(&priv->regs->maccfg2, tempval);
712                 } else {
713                         phy_stop(priv->phydev);
714                 }
715         }
716
717         return 0;
718 }
719
720 static int gfar_resume(struct of_device *ofdev)
721 {
722         struct gfar_private *priv = dev_get_drvdata(&ofdev->dev);
723         struct net_device *dev = priv->ndev;
724         unsigned long flags;
725         u32 tempval;
726         int magic_packet = priv->wol_en &&
727                 (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
728
729         if (!netif_running(dev)) {
730                 netif_device_attach(dev);
731                 return 0;
732         }
733
734         if (!magic_packet && priv->phydev)
735                 phy_start(priv->phydev);
736
737         /* Disable Magic Packet mode, in case something
738          * else woke us up.
739          */
740
741         spin_lock_irqsave(&priv->txlock, flags);
742         spin_lock(&priv->rxlock);
743
744         tempval = gfar_read(&priv->regs->maccfg2);
745         tempval &= ~MACCFG2_MPEN;
746         gfar_write(&priv->regs->maccfg2, tempval);
747
748         gfar_start(dev);
749
750         spin_unlock(&priv->rxlock);
751         spin_unlock_irqrestore(&priv->txlock, flags);
752
753         netif_device_attach(dev);
754
755         napi_enable(&priv->napi);
756
757         return 0;
758 }
759 #else
760 #define gfar_suspend NULL
761 #define gfar_resume NULL
762 #endif
763
764 /* Reads the controller's registers to determine what interface
765  * connects it to the PHY.
766  */
767 static phy_interface_t gfar_get_interface(struct net_device *dev)
768 {
769         struct gfar_private *priv = netdev_priv(dev);
770         u32 ecntrl = gfar_read(&priv->regs->ecntrl);
771
772         if (ecntrl & ECNTRL_SGMII_MODE)
773                 return PHY_INTERFACE_MODE_SGMII;
774
775         if (ecntrl & ECNTRL_TBI_MODE) {
776                 if (ecntrl & ECNTRL_REDUCED_MODE)
777                         return PHY_INTERFACE_MODE_RTBI;
778                 else
779                         return PHY_INTERFACE_MODE_TBI;
780         }
781
782         if (ecntrl & ECNTRL_REDUCED_MODE) {
783                 if (ecntrl & ECNTRL_REDUCED_MII_MODE)
784                         return PHY_INTERFACE_MODE_RMII;
785                 else {
786                         phy_interface_t interface = priv->interface;
787
788                         /*
789                          * This isn't autodetected right now, so it must
790                          * be set by the device tree or platform code.
791                          */
792                         if (interface == PHY_INTERFACE_MODE_RGMII_ID)
793                                 return PHY_INTERFACE_MODE_RGMII_ID;
794
795                         return PHY_INTERFACE_MODE_RGMII;
796                 }
797         }
798
799         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT)
800                 return PHY_INTERFACE_MODE_GMII;
801
802         return PHY_INTERFACE_MODE_MII;
803 }
804
805
806 /* Initializes driver's PHY state, and attaches to the PHY.
807  * Returns 0 on success.
808  */
809 static int init_phy(struct net_device *dev)
810 {
811         struct gfar_private *priv = netdev_priv(dev);
812         uint gigabit_support =
813                 priv->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
814                 SUPPORTED_1000baseT_Full : 0;
815         phy_interface_t interface;
816
817         priv->oldlink = 0;
818         priv->oldspeed = 0;
819         priv->oldduplex = -1;
820
821         interface = gfar_get_interface(dev);
822
823         priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
824                                       interface);
825         if (!priv->phydev)
826                 priv->phydev = of_phy_connect_fixed_link(dev, &adjust_link,
827                                                          interface);
828         if (!priv->phydev) {
829                 dev_err(&dev->dev, "could not attach to PHY\n");
830                 return -ENODEV;
831         }
832
833         if (interface == PHY_INTERFACE_MODE_SGMII)
834                 gfar_configure_serdes(dev);
835
836         /* Remove any features not supported by the controller */
837         priv->phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
838         priv->phydev->advertising = priv->phydev->supported;
839
840         return 0;
841 }
842
843 /*
844  * Initialize TBI PHY interface for communicating with the
845  * SERDES lynx PHY on the chip.  We communicate with this PHY
846  * through the MDIO bus on each controller, treating it as a
847  * "normal" PHY at the address found in the TBIPA register.  We assume
848  * that the TBIPA register is valid.  Either the MDIO bus code will set
849  * it to a value that doesn't conflict with other PHYs on the bus, or the
850  * value doesn't matter, as there are no other PHYs on the bus.
851  */
852 static void gfar_configure_serdes(struct net_device *dev)
853 {
854         struct gfar_private *priv = netdev_priv(dev);
855         struct phy_device *tbiphy;
856
857         if (!priv->tbi_node) {
858                 dev_warn(&dev->dev, "error: SGMII mode requires that the "
859                                     "device tree specify a tbi-handle\n");
860                 return;
861         }
862
863         tbiphy = of_phy_find_device(priv->tbi_node);
864         if (!tbiphy) {
865                 dev_err(&dev->dev, "error: Could not get TBI device\n");
866                 return;
867         }
868
869         /*
870          * If the link is already up, we must already be ok, and don't need to
871          * configure and reset the TBI<->SerDes link.  Maybe U-Boot configured
872          * everything for us?  Resetting it takes the link down and requires
873          * several seconds for it to come back.
874          */
875         if (phy_read(tbiphy, MII_BMSR) & BMSR_LSTATUS)
876                 return;
877
878         /* Single clk mode, mii mode off(for serdes communication) */
879         phy_write(tbiphy, MII_TBICON, TBICON_CLK_SELECT);
880
881         phy_write(tbiphy, MII_ADVERTISE,
882                         ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
883                         ADVERTISE_1000XPSE_ASYM);
884
885         phy_write(tbiphy, MII_BMCR, BMCR_ANENABLE |
886                         BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
887 }
888
889 static void init_registers(struct net_device *dev)
890 {
891         struct gfar_private *priv = netdev_priv(dev);
892
893         /* Clear IEVENT */
894         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
895
896         /* Initialize IMASK */
897         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
898
899         /* Init hash registers to zero */
900         gfar_write(&priv->regs->igaddr0, 0);
901         gfar_write(&priv->regs->igaddr1, 0);
902         gfar_write(&priv->regs->igaddr2, 0);
903         gfar_write(&priv->regs->igaddr3, 0);
904         gfar_write(&priv->regs->igaddr4, 0);
905         gfar_write(&priv->regs->igaddr5, 0);
906         gfar_write(&priv->regs->igaddr6, 0);
907         gfar_write(&priv->regs->igaddr7, 0);
908
909         gfar_write(&priv->regs->gaddr0, 0);
910         gfar_write(&priv->regs->gaddr1, 0);
911         gfar_write(&priv->regs->gaddr2, 0);
912         gfar_write(&priv->regs->gaddr3, 0);
913         gfar_write(&priv->regs->gaddr4, 0);
914         gfar_write(&priv->regs->gaddr5, 0);
915         gfar_write(&priv->regs->gaddr6, 0);
916         gfar_write(&priv->regs->gaddr7, 0);
917
918         /* Zero out the rmon mib registers if it has them */
919         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
920                 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib));
921
922                 /* Mask off the CAM interrupts */
923                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
924                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
925         }
926
927         /* Initialize the max receive buffer length */
928         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
929
930         /* Initialize the Minimum Frame Length Register */
931         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
932 }
933
934
935 /* Halt the receive and transmit queues */
936 static void gfar_halt_nodisable(struct net_device *dev)
937 {
938         struct gfar_private *priv = netdev_priv(dev);
939         struct gfar __iomem *regs = priv->regs;
940         u32 tempval;
941
942         /* Mask all interrupts */
943         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
944
945         /* Clear all interrupts */
946         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
947
948         /* Stop the DMA, and wait for it to stop */
949         tempval = gfar_read(&priv->regs->dmactrl);
950         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
951             != (DMACTRL_GRS | DMACTRL_GTS)) {
952                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
953                 gfar_write(&priv->regs->dmactrl, tempval);
954
955                 while (!(gfar_read(&priv->regs->ievent) &
956                          (IEVENT_GRSC | IEVENT_GTSC)))
957                         cpu_relax();
958         }
959 }
960
961 /* Halt the receive and transmit queues */
962 void gfar_halt(struct net_device *dev)
963 {
964         struct gfar_private *priv = netdev_priv(dev);
965         struct gfar __iomem *regs = priv->regs;
966         u32 tempval;
967
968         gfar_halt_nodisable(dev);
969
970         /* Disable Rx and Tx */
971         tempval = gfar_read(&regs->maccfg1);
972         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
973         gfar_write(&regs->maccfg1, tempval);
974 }
975
976 void stop_gfar(struct net_device *dev)
977 {
978         struct gfar_private *priv = netdev_priv(dev);
979         unsigned long flags;
980
981         phy_stop(priv->phydev);
982
983         /* Lock it down */
984         spin_lock_irqsave(&priv->txlock, flags);
985         spin_lock(&priv->rxlock);
986
987         gfar_halt(dev);
988
989         spin_unlock(&priv->rxlock);
990         spin_unlock_irqrestore(&priv->txlock, flags);
991
992         /* Free the IRQs */
993         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
994                 free_irq(priv->interruptError, dev);
995                 free_irq(priv->interruptTransmit, dev);
996                 free_irq(priv->interruptReceive, dev);
997         } else {
998                 free_irq(priv->interruptTransmit, dev);
999         }
1000
1001         free_skb_resources(priv);
1002 }
1003
1004 /* If there are any tx skbs or rx skbs still around, free them.
1005  * Then free tx_skbuff and rx_skbuff */
1006 static void free_skb_resources(struct gfar_private *priv)
1007 {
1008         struct device *dev = &priv->ofdev->dev;
1009         struct rxbd8 *rxbdp;
1010         struct txbd8 *txbdp;
1011         int i, j;
1012
1013         /* Go through all the buffer descriptors and free their data buffers */
1014         txbdp = priv->tx_bd_base;
1015
1016         if (!priv->tx_skbuff)
1017                 goto skip_tx_skbuff;
1018
1019         for (i = 0; i < priv->tx_ring_size; i++) {
1020                 if (!priv->tx_skbuff[i])
1021                         continue;
1022
1023                 dma_unmap_single(&priv->ofdev->dev, txbdp->bufPtr,
1024                                 txbdp->length, DMA_TO_DEVICE);
1025                 txbdp->lstatus = 0;
1026                 for (j = 0; j < skb_shinfo(priv->tx_skbuff[i])->nr_frags; j++) {
1027                         txbdp++;
1028                         dma_unmap_page(&priv->ofdev->dev, txbdp->bufPtr,
1029                                         txbdp->length, DMA_TO_DEVICE);
1030                 }
1031                 txbdp++;
1032                 dev_kfree_skb_any(priv->tx_skbuff[i]);
1033                 priv->tx_skbuff[i] = NULL;
1034         }
1035
1036         kfree(priv->tx_skbuff);
1037 skip_tx_skbuff:
1038
1039         rxbdp = priv->rx_bd_base;
1040
1041         if (!priv->rx_skbuff)
1042                 goto skip_rx_skbuff;
1043
1044         for (i = 0; i < priv->rx_ring_size; i++) {
1045                 if (priv->rx_skbuff[i]) {
1046                         dma_unmap_single(&priv->ofdev->dev, rxbdp->bufPtr,
1047                                          priv->rx_buffer_size,
1048                                         DMA_FROM_DEVICE);
1049                         dev_kfree_skb_any(priv->rx_skbuff[i]);
1050                         priv->rx_skbuff[i] = NULL;
1051                 }
1052
1053                 rxbdp->lstatus = 0;
1054                 rxbdp->bufPtr = 0;
1055                 rxbdp++;
1056         }
1057
1058         kfree(priv->rx_skbuff);
1059 skip_rx_skbuff:
1060
1061         dma_free_coherent(dev, sizeof(*txbdp) * priv->tx_ring_size +
1062                                sizeof(*rxbdp) * priv->rx_ring_size,
1063                           priv->tx_bd_base, gfar_read(&priv->regs->tbase0));
1064 }
1065
1066 void gfar_start(struct net_device *dev)
1067 {
1068         struct gfar_private *priv = netdev_priv(dev);
1069         struct gfar __iomem *regs = priv->regs;
1070         u32 tempval;
1071
1072         /* Enable Rx and Tx in MACCFG1 */
1073         tempval = gfar_read(&regs->maccfg1);
1074         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
1075         gfar_write(&regs->maccfg1, tempval);
1076
1077         /* Initialize DMACTRL to have WWR and WOP */
1078         tempval = gfar_read(&priv->regs->dmactrl);
1079         tempval |= DMACTRL_INIT_SETTINGS;
1080         gfar_write(&priv->regs->dmactrl, tempval);
1081
1082         /* Make sure we aren't stopped */
1083         tempval = gfar_read(&priv->regs->dmactrl);
1084         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
1085         gfar_write(&priv->regs->dmactrl, tempval);
1086
1087         /* Clear THLT/RHLT, so that the DMA starts polling now */
1088         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
1089         gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
1090
1091         /* Unmask the interrupts we look for */
1092         gfar_write(&regs->imask, IMASK_DEFAULT);
1093
1094         dev->trans_start = jiffies;
1095 }
1096
1097 /* Bring the controller up and running */
1098 int startup_gfar(struct net_device *ndev)
1099 {
1100         struct gfar_private *priv = netdev_priv(ndev);
1101         struct gfar __iomem *regs = priv->regs;
1102         int err;
1103
1104         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1105
1106         err = gfar_alloc_skb_resources(ndev);
1107         if (err)
1108                 return err;
1109
1110         gfar_init_mac(ndev);
1111
1112         /* If the device has multiple interrupts, register for
1113          * them.  Otherwise, only register for the one */
1114         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1115                 /* Install our interrupt handlers for Error,
1116                  * Transmit, and Receive */
1117                 err = request_irq(priv->interruptError, gfar_error, 0,
1118                                   priv->int_name_er, ndev);
1119                 if (err) {
1120                         if (netif_msg_intr(priv))
1121                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1122                                        priv->interruptError);
1123                         goto err_irq_fail;
1124                 }
1125
1126                 err = request_irq(priv->interruptTransmit, gfar_transmit, 0,
1127                                   priv->int_name_tx, ndev);
1128                 if (err) {
1129                         if (netif_msg_intr(priv))
1130                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1131                                        priv->interruptTransmit);
1132                         goto tx_irq_fail;
1133                 }
1134
1135                 err = request_irq(priv->interruptReceive, gfar_receive, 0,
1136                                   priv->int_name_rx, ndev);
1137                 if (err) {
1138                         if (netif_msg_intr(priv))
1139                                 pr_err("%s: Can't get IRQ %d (receive0)\n",
1140                                        ndev->name, priv->interruptReceive);
1141                         goto rx_irq_fail;
1142                 }
1143         } else {
1144                 err = request_irq(priv->interruptTransmit, gfar_interrupt,
1145                                 0, priv->int_name_tx, ndev);
1146                 if (err) {
1147                         if (netif_msg_intr(priv))
1148                                 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1149                                        priv->interruptTransmit);
1150                         goto err_irq_fail;
1151                 }
1152         }
1153
1154         /* Start the controller */
1155         gfar_start(ndev);
1156
1157         phy_start(priv->phydev);
1158
1159         return 0;
1160
1161 rx_irq_fail:
1162         free_irq(priv->interruptTransmit, ndev);
1163 tx_irq_fail:
1164         free_irq(priv->interruptError, ndev);
1165 err_irq_fail:
1166         free_skb_resources(priv);
1167         return err;
1168 }
1169
1170 /* Called when something needs to use the ethernet device */
1171 /* Returns 0 for success. */
1172 static int gfar_enet_open(struct net_device *dev)
1173 {
1174         struct gfar_private *priv = netdev_priv(dev);
1175         int err;
1176
1177         napi_enable(&priv->napi);
1178
1179         skb_queue_head_init(&priv->rx_recycle);
1180
1181         /* Initialize a bunch of registers */
1182         init_registers(dev);
1183
1184         gfar_set_mac_address(dev);
1185
1186         err = init_phy(dev);
1187
1188         if(err) {
1189                 napi_disable(&priv->napi);
1190                 return err;
1191         }
1192
1193         err = startup_gfar(dev);
1194         if (err) {
1195                 napi_disable(&priv->napi);
1196                 return err;
1197         }
1198
1199         netif_start_queue(dev);
1200
1201         device_set_wakeup_enable(&dev->dev, priv->wol_en);
1202
1203         return err;
1204 }
1205
1206 static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb)
1207 {
1208         struct txfcb *fcb = (struct txfcb *)skb_push(skb, GMAC_FCB_LEN);
1209
1210         memset(fcb, 0, GMAC_FCB_LEN);
1211
1212         return fcb;
1213 }
1214
1215 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
1216 {
1217         u8 flags = 0;
1218
1219         /* If we're here, it's a IP packet with a TCP or UDP
1220          * payload.  We set it to checksum, using a pseudo-header
1221          * we provide
1222          */
1223         flags = TXFCB_DEFAULT;
1224
1225         /* Tell the controller what the protocol is */
1226         /* And provide the already calculated phcs */
1227         if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
1228                 flags |= TXFCB_UDP;
1229                 fcb->phcs = udp_hdr(skb)->check;
1230         } else
1231                 fcb->phcs = tcp_hdr(skb)->check;
1232
1233         /* l3os is the distance between the start of the
1234          * frame (skb->data) and the start of the IP hdr.
1235          * l4os is the distance between the start of the
1236          * l3 hdr and the l4 hdr */
1237         fcb->l3os = (u16)(skb_network_offset(skb) - GMAC_FCB_LEN);
1238         fcb->l4os = skb_network_header_len(skb);
1239
1240         fcb->flags = flags;
1241 }
1242
1243 void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
1244 {
1245         fcb->flags |= TXFCB_VLN;
1246         fcb->vlctl = vlan_tx_tag_get(skb);
1247 }
1248
1249 static inline struct txbd8 *skip_txbd(struct txbd8 *bdp, int stride,
1250                                struct txbd8 *base, int ring_size)
1251 {
1252         struct txbd8 *new_bd = bdp + stride;
1253
1254         return (new_bd >= (base + ring_size)) ? (new_bd - ring_size) : new_bd;
1255 }
1256
1257 static inline struct txbd8 *next_txbd(struct txbd8 *bdp, struct txbd8 *base,
1258                 int ring_size)
1259 {
1260         return skip_txbd(bdp, 1, base, ring_size);
1261 }
1262
1263 /* This is called by the kernel when a frame is ready for transmission. */
1264 /* It is pointed to by the dev->hard_start_xmit function pointer */
1265 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1266 {
1267         struct gfar_private *priv = netdev_priv(dev);
1268         struct txfcb *fcb = NULL;
1269         struct txbd8 *txbdp, *txbdp_start, *base;
1270         u32 lstatus;
1271         int i;
1272         u32 bufaddr;
1273         unsigned long flags;
1274         unsigned int nr_frags, length;
1275
1276         base = priv->tx_bd_base;
1277
1278         /* make space for additional header when fcb is needed */
1279         if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
1280                         (priv->vlgrp && vlan_tx_tag_present(skb))) &&
1281                         (skb_headroom(skb) < GMAC_FCB_LEN)) {
1282                 struct sk_buff *skb_new;
1283
1284                 skb_new = skb_realloc_headroom(skb, GMAC_FCB_LEN);
1285                 if (!skb_new) {
1286                         dev->stats.tx_errors++;
1287                         kfree_skb(skb);
1288                         return NETDEV_TX_OK;
1289                 }
1290                 kfree_skb(skb);
1291                 skb = skb_new;
1292         }
1293
1294         /* total number of fragments in the SKB */
1295         nr_frags = skb_shinfo(skb)->nr_frags;
1296
1297         spin_lock_irqsave(&priv->txlock, flags);
1298
1299         /* check if there is space to queue this packet */
1300         if ((nr_frags+1) > priv->num_txbdfree) {
1301                 /* no space, stop the queue */
1302                 netif_stop_queue(dev);
1303                 dev->stats.tx_fifo_errors++;
1304                 spin_unlock_irqrestore(&priv->txlock, flags);
1305                 return NETDEV_TX_BUSY;
1306         }
1307
1308         /* Update transmit stats */
1309         dev->stats.tx_bytes += skb->len;
1310
1311         txbdp = txbdp_start = priv->cur_tx;
1312
1313         if (nr_frags == 0) {
1314                 lstatus = txbdp->lstatus | BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1315         } else {
1316                 /* Place the fragment addresses and lengths into the TxBDs */
1317                 for (i = 0; i < nr_frags; i++) {
1318                         /* Point at the next BD, wrapping as needed */
1319                         txbdp = next_txbd(txbdp, base, priv->tx_ring_size);
1320
1321                         length = skb_shinfo(skb)->frags[i].size;
1322
1323                         lstatus = txbdp->lstatus | length |
1324                                 BD_LFLAG(TXBD_READY);
1325
1326                         /* Handle the last BD specially */
1327                         if (i == nr_frags - 1)
1328                                 lstatus |= BD_LFLAG(TXBD_LAST | TXBD_INTERRUPT);
1329
1330                         bufaddr = dma_map_page(&priv->ofdev->dev,
1331                                         skb_shinfo(skb)->frags[i].page,
1332                                         skb_shinfo(skb)->frags[i].page_offset,
1333                                         length,
1334                                         DMA_TO_DEVICE);
1335
1336                         /* set the TxBD length and buffer pointer */
1337                         txbdp->bufPtr = bufaddr;
1338                         txbdp->lstatus = lstatus;
1339                 }
1340
1341                 lstatus = txbdp_start->lstatus;
1342         }
1343
1344         /* Set up checksumming */
1345         if (CHECKSUM_PARTIAL == skb->ip_summed) {
1346                 fcb = gfar_add_fcb(skb);
1347                 lstatus |= BD_LFLAG(TXBD_TOE);
1348                 gfar_tx_checksum(skb, fcb);
1349         }
1350
1351         if (priv->vlgrp && vlan_tx_tag_present(skb)) {
1352                 if (unlikely(NULL == fcb)) {
1353                         fcb = gfar_add_fcb(skb);
1354                         lstatus |= BD_LFLAG(TXBD_TOE);
1355                 }
1356
1357                 gfar_tx_vlan(skb, fcb);
1358         }
1359
1360         /* setup the TxBD length and buffer pointer for the first BD */
1361         priv->tx_skbuff[priv->skb_curtx] = skb;
1362         txbdp_start->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1363                         skb_headlen(skb), DMA_TO_DEVICE);
1364
1365         lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
1366
1367         /*
1368          * The powerpc-specific eieio() is used, as wmb() has too strong
1369          * semantics (it requires synchronization between cacheable and
1370          * uncacheable mappings, which eieio doesn't provide and which we
1371          * don't need), thus requiring a more expensive sync instruction.  At
1372          * some point, the set of architecture-independent barrier functions
1373          * should be expanded to include weaker barriers.
1374          */
1375         eieio();
1376
1377         txbdp_start->lstatus = lstatus;
1378
1379         /* Update the current skb pointer to the next entry we will use
1380          * (wrapping if necessary) */
1381         priv->skb_curtx = (priv->skb_curtx + 1) &
1382                 TX_RING_MOD_MASK(priv->tx_ring_size);
1383
1384         priv->cur_tx = next_txbd(txbdp, base, priv->tx_ring_size);
1385
1386         /* reduce TxBD free count */
1387         priv->num_txbdfree -= (nr_frags + 1);
1388
1389         dev->trans_start = jiffies;
1390
1391         /* If the next BD still needs to be cleaned up, then the bds
1392            are full.  We need to tell the kernel to stop sending us stuff. */
1393         if (!priv->num_txbdfree) {
1394                 netif_stop_queue(dev);
1395
1396                 dev->stats.tx_fifo_errors++;
1397         }
1398
1399         /* Tell the DMA to go go go */
1400         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1401
1402         /* Unlock priv */
1403         spin_unlock_irqrestore(&priv->txlock, flags);
1404
1405         return NETDEV_TX_OK;
1406 }
1407
1408 /* Stops the kernel queue, and halts the controller */
1409 static int gfar_close(struct net_device *dev)
1410 {
1411         struct gfar_private *priv = netdev_priv(dev);
1412
1413         napi_disable(&priv->napi);
1414
1415         skb_queue_purge(&priv->rx_recycle);
1416         cancel_work_sync(&priv->reset_task);
1417         stop_gfar(dev);
1418
1419         /* Disconnect from the PHY */
1420         phy_disconnect(priv->phydev);
1421         priv->phydev = NULL;
1422
1423         netif_stop_queue(dev);
1424
1425         return 0;
1426 }
1427
1428 /* Changes the mac address if the controller is not running. */
1429 static int gfar_set_mac_address(struct net_device *dev)
1430 {
1431         gfar_set_mac_for_addr(dev, 0, dev->dev_addr);
1432
1433         return 0;
1434 }
1435
1436
1437 /* Enables and disables VLAN insertion/extraction */
1438 static void gfar_vlan_rx_register(struct net_device *dev,
1439                 struct vlan_group *grp)
1440 {
1441         struct gfar_private *priv = netdev_priv(dev);
1442         unsigned long flags;
1443         u32 tempval;
1444
1445         spin_lock_irqsave(&priv->rxlock, flags);
1446
1447         priv->vlgrp = grp;
1448
1449         if (grp) {
1450                 /* Enable VLAN tag insertion */
1451                 tempval = gfar_read(&priv->regs->tctrl);
1452                 tempval |= TCTRL_VLINS;
1453
1454                 gfar_write(&priv->regs->tctrl, tempval);
1455
1456                 /* Enable VLAN tag extraction */
1457                 tempval = gfar_read(&priv->regs->rctrl);
1458                 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1459                 gfar_write(&priv->regs->rctrl, tempval);
1460         } else {
1461                 /* Disable VLAN tag insertion */
1462                 tempval = gfar_read(&priv->regs->tctrl);
1463                 tempval &= ~TCTRL_VLINS;
1464                 gfar_write(&priv->regs->tctrl, tempval);
1465
1466                 /* Disable VLAN tag extraction */
1467                 tempval = gfar_read(&priv->regs->rctrl);
1468                 tempval &= ~RCTRL_VLEX;
1469                 /* If parse is no longer required, then disable parser */
1470                 if (tempval & RCTRL_REQ_PARSER)
1471                         tempval |= RCTRL_PRSDEP_INIT;
1472                 else
1473                         tempval &= ~RCTRL_PRSDEP_INIT;
1474                 gfar_write(&priv->regs->rctrl, tempval);
1475         }
1476
1477         gfar_change_mtu(dev, dev->mtu);
1478
1479         spin_unlock_irqrestore(&priv->rxlock, flags);
1480 }
1481
1482 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1483 {
1484         int tempsize, tempval;
1485         struct gfar_private *priv = netdev_priv(dev);
1486         int oldsize = priv->rx_buffer_size;
1487         int frame_size = new_mtu + ETH_HLEN;
1488
1489         if (priv->vlgrp)
1490                 frame_size += VLAN_HLEN;
1491
1492         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1493                 if (netif_msg_drv(priv))
1494                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1495                                         dev->name);
1496                 return -EINVAL;
1497         }
1498
1499         if (gfar_uses_fcb(priv))
1500                 frame_size += GMAC_FCB_LEN;
1501
1502         frame_size += priv->padding;
1503
1504         tempsize =
1505             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1506             INCREMENTAL_BUFFER_SIZE;
1507
1508         /* Only stop and start the controller if it isn't already
1509          * stopped, and we changed something */
1510         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1511                 stop_gfar(dev);
1512
1513         priv->rx_buffer_size = tempsize;
1514
1515         dev->mtu = new_mtu;
1516
1517         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1518         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1519
1520         /* If the mtu is larger than the max size for standard
1521          * ethernet frames (ie, a jumbo frame), then set maccfg2
1522          * to allow huge frames, and to check the length */
1523         tempval = gfar_read(&priv->regs->maccfg2);
1524
1525         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1526                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1527         else
1528                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1529
1530         gfar_write(&priv->regs->maccfg2, tempval);
1531
1532         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1533                 startup_gfar(dev);
1534
1535         return 0;
1536 }
1537
1538 /* gfar_reset_task gets scheduled when a packet has not been
1539  * transmitted after a set amount of time.
1540  * For now, assume that clearing out all the structures, and
1541  * starting over will fix the problem.
1542  */
1543 static void gfar_reset_task(struct work_struct *work)
1544 {
1545         struct gfar_private *priv = container_of(work, struct gfar_private,
1546                         reset_task);
1547         struct net_device *dev = priv->ndev;
1548
1549         if (dev->flags & IFF_UP) {
1550                 netif_stop_queue(dev);
1551                 stop_gfar(dev);
1552                 startup_gfar(dev);
1553                 netif_start_queue(dev);
1554         }
1555
1556         netif_tx_schedule_all(dev);
1557 }
1558
1559 static void gfar_timeout(struct net_device *dev)
1560 {
1561         struct gfar_private *priv = netdev_priv(dev);
1562
1563         dev->stats.tx_errors++;
1564         schedule_work(&priv->reset_task);
1565 }
1566
1567 /* Interrupt Handler for Transmit complete */
1568 static int gfar_clean_tx_ring(struct net_device *dev)
1569 {
1570         struct gfar_private *priv = netdev_priv(dev);
1571         struct txbd8 *bdp;
1572         struct txbd8 *lbdp = NULL;
1573         struct txbd8 *base = priv->tx_bd_base;
1574         struct sk_buff *skb;
1575         int skb_dirtytx;
1576         int tx_ring_size = priv->tx_ring_size;
1577         int frags = 0;
1578         int i;
1579         int howmany = 0;
1580         u32 lstatus;
1581
1582         bdp = priv->dirty_tx;
1583         skb_dirtytx = priv->skb_dirtytx;
1584
1585         while ((skb = priv->tx_skbuff[skb_dirtytx])) {
1586                 frags = skb_shinfo(skb)->nr_frags;
1587                 lbdp = skip_txbd(bdp, frags, base, tx_ring_size);
1588
1589                 lstatus = lbdp->lstatus;
1590
1591                 /* Only clean completed frames */
1592                 if ((lstatus & BD_LFLAG(TXBD_READY)) &&
1593                                 (lstatus & BD_LENGTH_MASK))
1594                         break;
1595
1596                 dma_unmap_single(&priv->ofdev->dev,
1597                                 bdp->bufPtr,
1598                                 bdp->length,
1599                                 DMA_TO_DEVICE);
1600
1601                 bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1602                 bdp = next_txbd(bdp, base, tx_ring_size);
1603
1604                 for (i = 0; i < frags; i++) {
1605                         dma_unmap_page(&priv->ofdev->dev,
1606                                         bdp->bufPtr,
1607                                         bdp->length,
1608                                         DMA_TO_DEVICE);
1609                         bdp->lstatus &= BD_LFLAG(TXBD_WRAP);
1610                         bdp = next_txbd(bdp, base, tx_ring_size);
1611                 }
1612
1613                 /*
1614                  * If there's room in the queue (limit it to rx_buffer_size)
1615                  * we add this skb back into the pool, if it's the right size
1616                  */
1617                 if (skb_queue_len(&priv->rx_recycle) < priv->rx_ring_size &&
1618                                 skb_recycle_check(skb, priv->rx_buffer_size +
1619                                         RXBUF_ALIGNMENT))
1620                         __skb_queue_head(&priv->rx_recycle, skb);
1621                 else
1622                         dev_kfree_skb_any(skb);
1623
1624                 priv->tx_skbuff[skb_dirtytx] = NULL;
1625
1626                 skb_dirtytx = (skb_dirtytx + 1) &
1627                         TX_RING_MOD_MASK(tx_ring_size);
1628
1629                 howmany++;
1630                 priv->num_txbdfree += frags + 1;
1631         }
1632
1633         /* If we freed a buffer, we can restart transmission, if necessary */
1634         if (netif_queue_stopped(dev) && priv->num_txbdfree)
1635                 netif_wake_queue(dev);
1636
1637         /* Update dirty indicators */
1638         priv->skb_dirtytx = skb_dirtytx;
1639         priv->dirty_tx = bdp;
1640
1641         dev->stats.tx_packets += howmany;
1642
1643         return howmany;
1644 }
1645
1646 static void gfar_schedule_cleanup(struct net_device *dev)
1647 {
1648         struct gfar_private *priv = netdev_priv(dev);
1649         unsigned long flags;
1650
1651         spin_lock_irqsave(&priv->txlock, flags);
1652         spin_lock(&priv->rxlock);
1653
1654         if (napi_schedule_prep(&priv->napi)) {
1655                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
1656                 __napi_schedule(&priv->napi);
1657         } else {
1658                 /*
1659                  * Clear IEVENT, so interrupts aren't called again
1660                  * because of the packets that have already arrived.
1661                  */
1662                 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1663         }
1664
1665         spin_unlock(&priv->rxlock);
1666         spin_unlock_irqrestore(&priv->txlock, flags);
1667 }
1668
1669 /* Interrupt Handler for Transmit complete */
1670 static irqreturn_t gfar_transmit(int irq, void *dev_id)
1671 {
1672         gfar_schedule_cleanup((struct net_device *)dev_id);
1673         return IRQ_HANDLED;
1674 }
1675
1676 static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1677                 struct sk_buff *skb)
1678 {
1679         struct gfar_private *priv = netdev_priv(dev);
1680         u32 lstatus;
1681
1682         bdp->bufPtr = dma_map_single(&priv->ofdev->dev, skb->data,
1683                         priv->rx_buffer_size, DMA_FROM_DEVICE);
1684
1685         lstatus = BD_LFLAG(RXBD_EMPTY | RXBD_INTERRUPT);
1686
1687         if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
1688                 lstatus |= BD_LFLAG(RXBD_WRAP);
1689
1690         eieio();
1691
1692         bdp->lstatus = lstatus;
1693 }
1694
1695
1696 struct sk_buff * gfar_new_skb(struct net_device *dev)
1697 {
1698         unsigned int alignamount;
1699         struct gfar_private *priv = netdev_priv(dev);
1700         struct sk_buff *skb = NULL;
1701
1702         skb = __skb_dequeue(&priv->rx_recycle);
1703         if (!skb)
1704                 skb = netdev_alloc_skb(dev,
1705                                 priv->rx_buffer_size + RXBUF_ALIGNMENT);
1706
1707         if (!skb)
1708                 return NULL;
1709
1710         alignamount = RXBUF_ALIGNMENT -
1711                 (((unsigned long) skb->data) & (RXBUF_ALIGNMENT - 1));
1712
1713         /* We need the data buffer to be aligned properly.  We will reserve
1714          * as many bytes as needed to align the data properly
1715          */
1716         skb_reserve(skb, alignamount);
1717
1718         return skb;
1719 }
1720
1721 static inline void count_errors(unsigned short status, struct net_device *dev)
1722 {
1723         struct gfar_private *priv = netdev_priv(dev);
1724         struct net_device_stats *stats = &dev->stats;
1725         struct gfar_extra_stats *estats = &priv->extra_stats;
1726
1727         /* If the packet was truncated, none of the other errors
1728          * matter */
1729         if (status & RXBD_TRUNCATED) {
1730                 stats->rx_length_errors++;
1731
1732                 estats->rx_trunc++;
1733
1734                 return;
1735         }
1736         /* Count the errors, if there were any */
1737         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1738                 stats->rx_length_errors++;
1739
1740                 if (status & RXBD_LARGE)
1741                         estats->rx_large++;
1742                 else
1743                         estats->rx_short++;
1744         }
1745         if (status & RXBD_NONOCTET) {
1746                 stats->rx_frame_errors++;
1747                 estats->rx_nonoctet++;
1748         }
1749         if (status & RXBD_CRCERR) {
1750                 estats->rx_crcerr++;
1751                 stats->rx_crc_errors++;
1752         }
1753         if (status & RXBD_OVERRUN) {
1754                 estats->rx_overrun++;
1755                 stats->rx_crc_errors++;
1756         }
1757 }
1758
1759 irqreturn_t gfar_receive(int irq, void *dev_id)
1760 {
1761         gfar_schedule_cleanup((struct net_device *)dev_id);
1762         return IRQ_HANDLED;
1763 }
1764
1765 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1766 {
1767         /* If valid headers were found, and valid sums
1768          * were verified, then we tell the kernel that no
1769          * checksumming is necessary.  Otherwise, it is */
1770         if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU))
1771                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1772         else
1773                 skb->ip_summed = CHECKSUM_NONE;
1774 }
1775
1776
1777 /* gfar_process_frame() -- handle one incoming packet if skb
1778  * isn't NULL.  */
1779 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1780                               int amount_pull)
1781 {
1782         struct gfar_private *priv = netdev_priv(dev);
1783         struct rxfcb *fcb = NULL;
1784
1785         int ret;
1786
1787         /* fcb is at the beginning if exists */
1788         fcb = (struct rxfcb *)skb->data;
1789
1790         /* Remove the FCB from the skb */
1791         /* Remove the padded bytes, if there are any */
1792         if (amount_pull)
1793                 skb_pull(skb, amount_pull);
1794
1795         if (priv->rx_csum_enable)
1796                 gfar_rx_checksum(skb, fcb);
1797
1798         /* Tell the skb what kind of packet this is */
1799         skb->protocol = eth_type_trans(skb, dev);
1800
1801         /* Send the packet up the stack */
1802         if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN)))
1803                 ret = vlan_hwaccel_receive_skb(skb, priv->vlgrp, fcb->vlctl);
1804         else
1805                 ret = netif_receive_skb(skb);
1806
1807         if (NET_RX_DROP == ret)
1808                 priv->extra_stats.kernel_dropped++;
1809
1810         return 0;
1811 }
1812
1813 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1814  *   until the budget/quota has been reached. Returns the number
1815  *   of frames handled
1816  */
1817 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1818 {
1819         struct rxbd8 *bdp, *base;
1820         struct sk_buff *skb;
1821         int pkt_len;
1822         int amount_pull;
1823         int howmany = 0;
1824         struct gfar_private *priv = netdev_priv(dev);
1825
1826         /* Get the first full descriptor */
1827         bdp = priv->cur_rx;
1828         base = priv->rx_bd_base;
1829
1830         amount_pull = (gfar_uses_fcb(priv) ? GMAC_FCB_LEN : 0) +
1831                 priv->padding;
1832
1833         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1834                 struct sk_buff *newskb;
1835                 rmb();
1836
1837                 /* Add another skb for the future */
1838                 newskb = gfar_new_skb(dev);
1839
1840                 skb = priv->rx_skbuff[priv->skb_currx];
1841
1842                 dma_unmap_single(&priv->ofdev->dev, bdp->bufPtr,
1843                                 priv->rx_buffer_size, DMA_FROM_DEVICE);
1844
1845                 /* We drop the frame if we failed to allocate a new buffer */
1846                 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1847                                  bdp->status & RXBD_ERR)) {
1848                         count_errors(bdp->status, dev);
1849
1850                         if (unlikely(!newskb))
1851                                 newskb = skb;
1852                         else if (skb) {
1853                                 /*
1854                                  * We need to reset ->data to what it
1855                                  * was before gfar_new_skb() re-aligned
1856                                  * it to an RXBUF_ALIGNMENT boundary
1857                                  * before we put the skb back on the
1858                                  * recycle list.
1859                                  */
1860                                 skb->data = skb->head + NET_SKB_PAD;
1861                                 __skb_queue_head(&priv->rx_recycle, skb);
1862                         }
1863                 } else {
1864                         /* Increment the number of packets */
1865                         dev->stats.rx_packets++;
1866                         howmany++;
1867
1868                         if (likely(skb)) {
1869                                 pkt_len = bdp->length - ETH_FCS_LEN;
1870                                 /* Remove the FCS from the packet length */
1871                                 skb_put(skb, pkt_len);
1872                                 dev->stats.rx_bytes += pkt_len;
1873
1874                                 if (in_irq() || irqs_disabled())
1875                                         printk("Interrupt problem!\n");
1876                                 gfar_process_frame(dev, skb, amount_pull);
1877
1878                         } else {
1879                                 if (netif_msg_rx_err(priv))
1880                                         printk(KERN_WARNING
1881                                                "%s: Missing skb!\n", dev->name);
1882                                 dev->stats.rx_dropped++;
1883                                 priv->extra_stats.rx_skbmissing++;
1884                         }
1885
1886                 }
1887
1888                 priv->rx_skbuff[priv->skb_currx] = newskb;
1889
1890                 /* Setup the new bdp */
1891                 gfar_new_rxbdp(dev, bdp, newskb);
1892
1893                 /* Update to the next pointer */
1894                 bdp = next_bd(bdp, base, priv->rx_ring_size);
1895
1896                 /* update to point at the next skb */
1897                 priv->skb_currx =
1898                     (priv->skb_currx + 1) &
1899                     RX_RING_MOD_MASK(priv->rx_ring_size);
1900         }
1901
1902         /* Update the current rxbd pointer to be the next one */
1903         priv->cur_rx = bdp;
1904
1905         return howmany;
1906 }
1907
1908 static int gfar_poll(struct napi_struct *napi, int budget)
1909 {
1910         struct gfar_private *priv = container_of(napi, struct gfar_private, napi);
1911         struct net_device *dev = priv->ndev;
1912         int tx_cleaned = 0;
1913         int rx_cleaned = 0;
1914         unsigned long flags;
1915
1916         /* Clear IEVENT, so interrupts aren't called again
1917          * because of the packets that have already arrived */
1918         gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
1919
1920         /* If we fail to get the lock, don't bother with the TX BDs */
1921         if (spin_trylock_irqsave(&priv->txlock, flags)) {
1922                 tx_cleaned = gfar_clean_tx_ring(dev);
1923                 spin_unlock_irqrestore(&priv->txlock, flags);
1924         }
1925
1926         rx_cleaned = gfar_clean_rx_ring(dev, budget);
1927
1928         if (tx_cleaned)
1929                 return budget;
1930
1931         if (rx_cleaned < budget) {
1932                 napi_complete(napi);
1933
1934                 /* Clear the halt bit in RSTAT */
1935                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1936
1937                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
1938
1939                 /* If we are coalescing interrupts, update the timer */
1940                 /* Otherwise, clear it */
1941                 if (likely(priv->rxcoalescing)) {
1942                         gfar_write(&priv->regs->rxic, 0);
1943                         gfar_write(&priv->regs->rxic, priv->rxic);
1944                 }
1945                 if (likely(priv->txcoalescing)) {
1946                         gfar_write(&priv->regs->txic, 0);
1947                         gfar_write(&priv->regs->txic, priv->txic);
1948                 }
1949         }
1950
1951         return rx_cleaned;
1952 }
1953
1954 #ifdef CONFIG_NET_POLL_CONTROLLER
1955 /*
1956  * Polling 'interrupt' - used by things like netconsole to send skbs
1957  * without having to re-enable interrupts. It's not called while
1958  * the interrupt routine is executing.
1959  */
1960 static void gfar_netpoll(struct net_device *dev)
1961 {
1962         struct gfar_private *priv = netdev_priv(dev);
1963
1964         /* If the device has multiple interrupts, run tx/rx */
1965         if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1966                 disable_irq(priv->interruptTransmit);
1967                 disable_irq(priv->interruptReceive);
1968                 disable_irq(priv->interruptError);
1969                 gfar_interrupt(priv->interruptTransmit, dev);
1970                 enable_irq(priv->interruptError);
1971                 enable_irq(priv->interruptReceive);
1972                 enable_irq(priv->interruptTransmit);
1973         } else {
1974                 disable_irq(priv->interruptTransmit);
1975                 gfar_interrupt(priv->interruptTransmit, dev);
1976                 enable_irq(priv->interruptTransmit);
1977         }
1978 }
1979 #endif
1980
1981 /* The interrupt handler for devices with one interrupt */
1982 static irqreturn_t gfar_interrupt(int irq, void *dev_id)
1983 {
1984         struct net_device *dev = dev_id;
1985         struct gfar_private *priv = netdev_priv(dev);
1986
1987         /* Save ievent for future reference */
1988         u32 events = gfar_read(&priv->regs->ievent);
1989
1990         /* Check for reception */
1991         if (events & IEVENT_RX_MASK)
1992                 gfar_receive(irq, dev_id);
1993
1994         /* Check for transmit completion */
1995         if (events & IEVENT_TX_MASK)
1996                 gfar_transmit(irq, dev_id);
1997
1998         /* Check for errors */
1999         if (events & IEVENT_ERR_MASK)
2000                 gfar_error(irq, dev_id);
2001
2002         return IRQ_HANDLED;
2003 }
2004
2005 /* Called every time the controller might need to be made
2006  * aware of new link state.  The PHY code conveys this
2007  * information through variables in the phydev structure, and this
2008  * function converts those variables into the appropriate
2009  * register values, and can bring down the device if needed.
2010  */
2011 static void adjust_link(struct net_device *dev)
2012 {
2013         struct gfar_private *priv = netdev_priv(dev);
2014         struct gfar __iomem *regs = priv->regs;
2015         unsigned long flags;
2016         struct phy_device *phydev = priv->phydev;
2017         int new_state = 0;
2018
2019         spin_lock_irqsave(&priv->txlock, flags);
2020         if (phydev->link) {
2021                 u32 tempval = gfar_read(&regs->maccfg2);
2022                 u32 ecntrl = gfar_read(&regs->ecntrl);
2023
2024                 /* Now we make sure that we can be in full duplex mode.
2025                  * If not, we operate in half-duplex mode. */
2026                 if (phydev->duplex != priv->oldduplex) {
2027                         new_state = 1;
2028                         if (!(phydev->duplex))
2029                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
2030                         else
2031                                 tempval |= MACCFG2_FULL_DUPLEX;
2032
2033                         priv->oldduplex = phydev->duplex;
2034                 }
2035
2036                 if (phydev->speed != priv->oldspeed) {
2037                         new_state = 1;
2038                         switch (phydev->speed) {
2039                         case 1000:
2040                                 tempval =
2041                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
2042
2043                                 ecntrl &= ~(ECNTRL_R100);
2044                                 break;
2045                         case 100:
2046                         case 10:
2047                                 tempval =
2048                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
2049
2050                                 /* Reduced mode distinguishes
2051                                  * between 10 and 100 */
2052                                 if (phydev->speed == SPEED_100)
2053                                         ecntrl |= ECNTRL_R100;
2054                                 else
2055                                         ecntrl &= ~(ECNTRL_R100);
2056                                 break;
2057                         default:
2058                                 if (netif_msg_link(priv))
2059                                         printk(KERN_WARNING
2060                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
2061                                                 dev->name, phydev->speed);
2062                                 break;
2063                         }
2064
2065                         priv->oldspeed = phydev->speed;
2066                 }
2067
2068                 gfar_write(&regs->maccfg2, tempval);
2069                 gfar_write(&regs->ecntrl, ecntrl);
2070
2071                 if (!priv->oldlink) {
2072                         new_state = 1;
2073                         priv->oldlink = 1;
2074                 }
2075         } else if (priv->oldlink) {
2076                 new_state = 1;
2077                 priv->oldlink = 0;
2078                 priv->oldspeed = 0;
2079                 priv->oldduplex = -1;
2080         }
2081
2082         if (new_state && netif_msg_link(priv))
2083                 phy_print_status(phydev);
2084
2085         spin_unlock_irqrestore(&priv->txlock, flags);
2086 }
2087
2088 /* Update the hash table based on the current list of multicast
2089  * addresses we subscribe to.  Also, change the promiscuity of
2090  * the device based on the flags (this function is called
2091  * whenever dev->flags is changed */
2092 static void gfar_set_multi(struct net_device *dev)
2093 {
2094         struct dev_mc_list *mc_ptr;
2095         struct gfar_private *priv = netdev_priv(dev);
2096         struct gfar __iomem *regs = priv->regs;
2097         u32 tempval;
2098
2099         if(dev->flags & IFF_PROMISC) {
2100                 /* Set RCTRL to PROM */
2101                 tempval = gfar_read(&regs->rctrl);
2102                 tempval |= RCTRL_PROM;
2103                 gfar_write(&regs->rctrl, tempval);
2104         } else {
2105                 /* Set RCTRL to not PROM */
2106                 tempval = gfar_read(&regs->rctrl);
2107                 tempval &= ~(RCTRL_PROM);
2108                 gfar_write(&regs->rctrl, tempval);
2109         }
2110
2111         if(dev->flags & IFF_ALLMULTI) {
2112                 /* Set the hash to rx all multicast frames */
2113                 gfar_write(&regs->igaddr0, 0xffffffff);
2114                 gfar_write(&regs->igaddr1, 0xffffffff);
2115                 gfar_write(&regs->igaddr2, 0xffffffff);
2116                 gfar_write(&regs->igaddr3, 0xffffffff);
2117                 gfar_write(&regs->igaddr4, 0xffffffff);
2118                 gfar_write(&regs->igaddr5, 0xffffffff);
2119                 gfar_write(&regs->igaddr6, 0xffffffff);
2120                 gfar_write(&regs->igaddr7, 0xffffffff);
2121                 gfar_write(&regs->gaddr0, 0xffffffff);
2122                 gfar_write(&regs->gaddr1, 0xffffffff);
2123                 gfar_write(&regs->gaddr2, 0xffffffff);
2124                 gfar_write(&regs->gaddr3, 0xffffffff);
2125                 gfar_write(&regs->gaddr4, 0xffffffff);
2126                 gfar_write(&regs->gaddr5, 0xffffffff);
2127                 gfar_write(&regs->gaddr6, 0xffffffff);
2128                 gfar_write(&regs->gaddr7, 0xffffffff);
2129         } else {
2130                 int em_num;
2131                 int idx;
2132
2133                 /* zero out the hash */
2134                 gfar_write(&regs->igaddr0, 0x0);
2135                 gfar_write(&regs->igaddr1, 0x0);
2136                 gfar_write(&regs->igaddr2, 0x0);
2137                 gfar_write(&regs->igaddr3, 0x0);
2138                 gfar_write(&regs->igaddr4, 0x0);
2139                 gfar_write(&regs->igaddr5, 0x0);
2140                 gfar_write(&regs->igaddr6, 0x0);
2141                 gfar_write(&regs->igaddr7, 0x0);
2142                 gfar_write(&regs->gaddr0, 0x0);
2143                 gfar_write(&regs->gaddr1, 0x0);
2144                 gfar_write(&regs->gaddr2, 0x0);
2145                 gfar_write(&regs->gaddr3, 0x0);
2146                 gfar_write(&regs->gaddr4, 0x0);
2147                 gfar_write(&regs->gaddr5, 0x0);
2148                 gfar_write(&regs->gaddr6, 0x0);
2149                 gfar_write(&regs->gaddr7, 0x0);
2150
2151                 /* If we have extended hash tables, we need to
2152                  * clear the exact match registers to prepare for
2153                  * setting them */
2154                 if (priv->extended_hash) {
2155                         em_num = GFAR_EM_NUM + 1;
2156                         gfar_clear_exact_match(dev);
2157                         idx = 1;
2158                 } else {
2159                         idx = 0;
2160                         em_num = 0;
2161                 }
2162
2163                 if(dev->mc_count == 0)
2164                         return;
2165
2166                 /* Parse the list, and set the appropriate bits */
2167                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
2168                         if (idx < em_num) {
2169                                 gfar_set_mac_for_addr(dev, idx,
2170                                                 mc_ptr->dmi_addr);
2171                                 idx++;
2172                         } else
2173                                 gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
2174                 }
2175         }
2176
2177         return;
2178 }
2179
2180
2181 /* Clears each of the exact match registers to zero, so they
2182  * don't interfere with normal reception */
2183 static void gfar_clear_exact_match(struct net_device *dev)
2184 {
2185         int idx;
2186         u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0};
2187
2188         for(idx = 1;idx < GFAR_EM_NUM + 1;idx++)
2189                 gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr);
2190 }
2191
2192 /* Set the appropriate hash bit for the given addr */
2193 /* The algorithm works like so:
2194  * 1) Take the Destination Address (ie the multicast address), and
2195  * do a CRC on it (little endian), and reverse the bits of the
2196  * result.
2197  * 2) Use the 8 most significant bits as a hash into a 256-entry
2198  * table.  The table is controlled through 8 32-bit registers:
2199  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
2200  * gaddr7.  This means that the 3 most significant bits in the
2201  * hash index which gaddr register to use, and the 5 other bits
2202  * indicate which bit (assuming an IBM numbering scheme, which
2203  * for PowerPC (tm) is usually the case) in the register holds
2204  * the entry. */
2205 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2206 {
2207         u32 tempval;
2208         struct gfar_private *priv = netdev_priv(dev);
2209         u32 result = ether_crc(MAC_ADDR_LEN, addr);
2210         int width = priv->hash_width;
2211         u8 whichbit = (result >> (32 - width)) & 0x1f;
2212         u8 whichreg = result >> (32 - width + 5);
2213         u32 value = (1 << (31-whichbit));
2214
2215         tempval = gfar_read(priv->hash_regs[whichreg]);
2216         tempval |= value;
2217         gfar_write(priv->hash_regs[whichreg], tempval);
2218
2219         return;
2220 }
2221
2222
2223 /* There are multiple MAC Address register pairs on some controllers
2224  * This function sets the numth pair to a given address
2225  */
2226 static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2227 {
2228         struct gfar_private *priv = netdev_priv(dev);
2229         int idx;
2230         char tmpbuf[MAC_ADDR_LEN];
2231         u32 tempval;
2232         u32 __iomem *macptr = &priv->regs->macstnaddr1;
2233
2234         macptr += num*2;
2235
2236         /* Now copy it into the mac registers backwards, cuz */
2237         /* little endian is silly */
2238         for (idx = 0; idx < MAC_ADDR_LEN; idx++)
2239                 tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx];
2240
2241         gfar_write(macptr, *((u32 *) (tmpbuf)));
2242
2243         tempval = *((u32 *) (tmpbuf + 4));
2244
2245         gfar_write(macptr+1, tempval);
2246 }
2247
2248 /* GFAR error interrupt handler */
2249 static irqreturn_t gfar_error(int irq, void *dev_id)
2250 {
2251         struct net_device *dev = dev_id;
2252         struct gfar_private *priv = netdev_priv(dev);
2253
2254         /* Save ievent for future reference */
2255         u32 events = gfar_read(&priv->regs->ievent);
2256
2257         /* Clear IEVENT */
2258         gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK);
2259
2260         /* Magic Packet is not an error. */
2261         if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
2262             (events & IEVENT_MAG))
2263                 events &= ~IEVENT_MAG;
2264
2265         /* Hmm... */
2266         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2267                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2268                        dev->name, events, gfar_read(&priv->regs->imask));
2269
2270         /* Update the error counters */
2271         if (events & IEVENT_TXE) {
2272                 dev->stats.tx_errors++;
2273
2274                 if (events & IEVENT_LC)
2275                         dev->stats.tx_window_errors++;
2276                 if (events & IEVENT_CRL)
2277                         dev->stats.tx_aborted_errors++;
2278                 if (events & IEVENT_XFUN) {
2279                         if (netif_msg_tx_err(priv))
2280                                 printk(KERN_DEBUG "%s: TX FIFO underrun, "
2281                                        "packet dropped.\n", dev->name);
2282                         dev->stats.tx_dropped++;
2283                         priv->extra_stats.tx_underrun++;
2284
2285                         /* Reactivate the Tx Queues */
2286                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
2287                 }
2288                 if (netif_msg_tx_err(priv))
2289                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
2290         }
2291         if (events & IEVENT_BSY) {
2292                 dev->stats.rx_errors++;
2293                 priv->extra_stats.rx_bsy++;
2294
2295                 gfar_receive(irq, dev_id);
2296
2297                 if (netif_msg_rx_err(priv))
2298                         printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2299                                dev->name, gfar_read(&priv->regs->rstat));
2300         }
2301         if (events & IEVENT_BABR) {
2302                 dev->stats.rx_errors++;
2303                 priv->extra_stats.rx_babr++;
2304
2305                 if (netif_msg_rx_err(priv))
2306                         printk(KERN_DEBUG "%s: babbling RX error\n", dev->name);
2307         }
2308         if (events & IEVENT_EBERR) {
2309                 priv->extra_stats.eberr++;
2310                 if (netif_msg_rx_err(priv))
2311                         printk(KERN_DEBUG "%s: bus error\n", dev->name);
2312         }
2313         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
2314                 printk(KERN_DEBUG "%s: control frame\n", dev->name);
2315
2316         if (events & IEVENT_BABT) {
2317                 priv->extra_stats.tx_babt++;
2318                 if (netif_msg_tx_err(priv))
2319                         printk(KERN_DEBUG "%s: babbling TX error\n", dev->name);
2320         }
2321         return IRQ_HANDLED;
2322 }
2323
2324 /* work with hotplug and coldplug */
2325 MODULE_ALIAS("platform:fsl-gianfar");
2326
2327 static struct of_device_id gfar_match[] =
2328 {
2329         {
2330                 .type = "network",
2331                 .compatible = "gianfar",
2332         },
2333         {},
2334 };
2335
2336 /* Structure for a device driver */
2337 static struct of_platform_driver gfar_driver = {
2338         .name = "fsl-gianfar",
2339         .match_table = gfar_match,
2340
2341         .probe = gfar_probe,
2342         .remove = gfar_remove,
2343         .suspend = gfar_suspend,
2344         .resume = gfar_resume,
2345 };
2346
2347 static int __init gfar_init(void)
2348 {
2349         return of_register_platform_driver(&gfar_driver);
2350 }
2351
2352 static void __exit gfar_exit(void)
2353 {
2354         of_unregister_platform_driver(&gfar_driver);
2355 }
2356
2357 module_init(gfar_init);
2358 module_exit(gfar_exit);
2359