[NET]: Nuke SET_MODULE_OWNER macro.
[linux-2.6.git] / drivers / net / defxx.c
1 /*
2  * File Name:
3  *   defxx.c
4  *
5  * Copyright Information:
6  *   Copyright Digital Equipment Corporation 1996.
7  *
8  *   This software may be used and distributed according to the terms of
9  *   the GNU General Public License, incorporated herein by reference.
10  *
11  * Abstract:
12  *   A Linux device driver supporting the Digital Equipment Corporation
13  *   FDDI TURBOchannel, EISA and PCI controller families.  Supported
14  *   adapters include:
15  *
16  *              DEC FDDIcontroller/TURBOchannel (DEFTA)
17  *              DEC FDDIcontroller/EISA         (DEFEA)
18  *              DEC FDDIcontroller/PCI          (DEFPA)
19  *
20  * The original author:
21  *   LVS        Lawrence V. Stefani <lstefani@yahoo.com>
22  *
23  * Maintainers:
24  *   macro      Maciej W. Rozycki <macro@linux-mips.org>
25  *
26  * Credits:
27  *   I'd like to thank Patricia Cross for helping me get started with
28  *   Linux, David Davies for a lot of help upgrading and configuring
29  *   my development system and for answering many OS and driver
30  *   development questions, and Alan Cox for recommendations and
31  *   integration help on getting FDDI support into Linux.  LVS
32  *
33  * Driver Architecture:
34  *   The driver architecture is largely based on previous driver work
35  *   for other operating systems.  The upper edge interface and
36  *   functions were largely taken from existing Linux device drivers
37  *   such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
38  *   driver.
39  *
40  *   Adapter Probe -
41  *              The driver scans for supported EISA adapters by reading the
42  *              SLOT ID register for each EISA slot and making a match
43  *              against the expected value.
44  *
45  *   Bus-Specific Initialization -
46  *              This driver currently supports both EISA and PCI controller
47  *              families.  While the custom DMA chip and FDDI logic is similar
48  *              or identical, the bus logic is very different.  After
49  *              initialization, the     only bus-specific differences is in how the
50  *              driver enables and disables interrupts.  Other than that, the
51  *              run-time critical code behaves the same on both families.
52  *              It's important to note that both adapter families are configured
53  *              to I/O map, rather than memory map, the adapter registers.
54  *
55  *   Driver Open/Close -
56  *              In the driver open routine, the driver ISR (interrupt service
57  *              routine) is registered and the adapter is brought to an
58  *              operational state.  In the driver close routine, the opposite
59  *              occurs; the driver ISR is deregistered and the adapter is
60  *              brought to a safe, but closed state.  Users may use consecutive
61  *              commands to bring the adapter up and down as in the following
62  *              example:
63  *                                      ifconfig fddi0 up
64  *                                      ifconfig fddi0 down
65  *                                      ifconfig fddi0 up
66  *
67  *   Driver Shutdown -
68  *              Apparently, there is no shutdown or halt routine support under
69  *              Linux.  This routine would be called during "reboot" or
70  *              "shutdown" to allow the driver to place the adapter in a safe
71  *              state before a warm reboot occurs.  To be really safe, the user
72  *              should close the adapter before shutdown (eg. ifconfig fddi0 down)
73  *              to ensure that the adapter DMA engine is taken off-line.  However,
74  *              the current driver code anticipates this problem and always issues
75  *              a soft reset of the adapter     at the beginning of driver initialization.
76  *              A future driver enhancement in this area may occur in 2.1.X where
77  *              Alan indicated that a shutdown handler may be implemented.
78  *
79  *   Interrupt Service Routine -
80  *              The driver supports shared interrupts, so the ISR is registered for
81  *              each board with the appropriate flag and the pointer to that board's
82  *              device structure.  This provides the context during interrupt
83  *              processing to support shared interrupts and multiple boards.
84  *
85  *              Interrupt enabling/disabling can occur at many levels.  At the host
86  *              end, you can disable system interrupts, or disable interrupts at the
87  *              PIC (on Intel systems).  Across the bus, both EISA and PCI adapters
88  *              have a bus-logic chip interrupt enable/disable as well as a DMA
89  *              controller interrupt enable/disable.
90  *
91  *              The driver currently enables and disables adapter interrupts at the
92  *              bus-logic chip and assumes that Linux will take care of clearing or
93  *              acknowledging any host-based interrupt chips.
94  *
95  *   Control Functions -
96  *              Control functions are those used to support functions such as adding
97  *              or deleting multicast addresses, enabling or disabling packet
98  *              reception filters, or other custom/proprietary commands.  Presently,
99  *              the driver supports the "get statistics", "set multicast list", and
100  *              "set mac address" functions defined by Linux.  A list of possible
101  *              enhancements include:
102  *
103  *                              - Custom ioctl interface for executing port interface commands
104  *                              - Custom ioctl interface for adding unicast addresses to
105  *                                adapter CAM (to support bridge functions).
106  *                              - Custom ioctl interface for supporting firmware upgrades.
107  *
108  *   Hardware (port interface) Support Routines -
109  *              The driver function names that start with "dfx_hw_" represent
110  *              low-level port interface routines that are called frequently.  They
111  *              include issuing a DMA or port control command to the adapter,
112  *              resetting the adapter, or reading the adapter state.  Since the
113  *              driver initialization and run-time code must make calls into the
114  *              port interface, these routines were written to be as generic and
115  *              usable as possible.
116  *
117  *   Receive Path -
118  *              The adapter DMA engine supports a 256 entry receive descriptor block
119  *              of which up to 255 entries can be used at any given time.  The
120  *              architecture is a standard producer, consumer, completion model in
121  *              which the driver "produces" receive buffers to the adapter, the
122  *              adapter "consumes" the receive buffers by DMAing incoming packet data,
123  *              and the driver "completes" the receive buffers by servicing the
124  *              incoming packet, then "produces" a new buffer and starts the cycle
125  *              again.  Receive buffers can be fragmented in up to 16 fragments
126  *              (descriptor     entries).  For simplicity, this driver posts
127  *              single-fragment receive buffers of 4608 bytes, then allocates a
128  *              sk_buff, copies the data, then reposts the buffer.  To reduce CPU
129  *              utilization, a better approach would be to pass up the receive
130  *              buffer (no extra copy) then allocate and post a replacement buffer.
131  *              This is a performance enhancement that should be looked into at
132  *              some point.
133  *
134  *   Transmit Path -
135  *              Like the receive path, the adapter DMA engine supports a 256 entry
136  *              transmit descriptor block of which up to 255 entries can be used at
137  *              any     given time.  Transmit buffers can be fragmented in up to 255
138  *              fragments (descriptor entries).  This driver always posts one
139  *              fragment per transmit packet request.
140  *
141  *              The fragment contains the entire packet from FC to end of data.
142  *              Before posting the buffer to the adapter, the driver sets a three-byte
143  *              packet request header (PRH) which is required by the Motorola MAC chip
144  *              used on the adapters.  The PRH tells the MAC the type of token to
145  *              receive/send, whether or not to generate and append the CRC, whether
146  *              synchronous or asynchronous framing is used, etc.  Since the PRH
147  *              definition is not necessarily consistent across all FDDI chipsets,
148  *              the driver, rather than the common FDDI packet handler routines,
149  *              sets these bytes.
150  *
151  *              To reduce the amount of descriptor fetches needed per transmit request,
152  *              the driver takes advantage of the fact that there are at least three
153  *              bytes available before the skb->data field on the outgoing transmit
154  *              request.  This is guaranteed by having fddi_setup() in net_init.c set
155  *              dev->hard_header_len to 24 bytes.  21 bytes accounts for the largest
156  *              header in an 802.2 SNAP frame.  The other 3 bytes are the extra "pad"
157  *              bytes which we'll use to store the PRH.
158  *
159  *              There's a subtle advantage to adding these pad bytes to the
160  *              hard_header_len, it ensures that the data portion of the packet for
161  *              an 802.2 SNAP frame is longword aligned.  Other FDDI driver
162  *              implementations may not need the extra padding and can start copying
163  *              or DMAing directly from the FC byte which starts at skb->data.  Should
164  *              another driver implementation need ADDITIONAL padding, the net_init.c
165  *              module should be updated and dev->hard_header_len should be increased.
166  *              NOTE: To maintain the alignment on the data portion of the packet,
167  *              dev->hard_header_len should always be evenly divisible by 4 and at
168  *              least 24 bytes in size.
169  *
170  * Modification History:
171  *              Date            Name    Description
172  *              16-Aug-96       LVS             Created.
173  *              20-Aug-96       LVS             Updated dfx_probe so that version information
174  *                                                      string is only displayed if 1 or more cards are
175  *                                                      found.  Changed dfx_rcv_queue_process to copy
176  *                                                      3 NULL bytes before FC to ensure that data is
177  *                                                      longword aligned in receive buffer.
178  *              09-Sep-96       LVS             Updated dfx_ctl_set_multicast_list to enable
179  *                                                      LLC group promiscuous mode if multicast list
180  *                                                      is too large.  LLC individual/group promiscuous
181  *                                                      mode is now disabled if IFF_PROMISC flag not set.
182  *                                                      dfx_xmt_queue_pkt no longer checks for NULL skb
183  *                                                      on Alan Cox recommendation.  Added node address
184  *                                                      override support.
185  *              12-Sep-96       LVS             Reset current address to factory address during
186  *                                                      device open.  Updated transmit path to post a
187  *                                                      single fragment which includes PRH->end of data.
188  *              Mar 2000        AC              Did various cleanups for 2.3.x
189  *              Jun 2000        jgarzik         PCI and resource alloc cleanups
190  *              Jul 2000        tjeerd          Much cleanup and some bug fixes
191  *              Sep 2000        tjeerd          Fix leak on unload, cosmetic code cleanup
192  *              Feb 2001                        Skb allocation fixes
193  *              Feb 2001        davej           PCI enable cleanups.
194  *              04 Aug 2003     macro           Converted to the DMA API.
195  *              14 Aug 2004     macro           Fix device names reported.
196  *              14 Jun 2005     macro           Use irqreturn_t.
197  *              23 Oct 2006     macro           Big-endian host support.
198  *              14 Dec 2006     macro           TURBOchannel support.
199  */
200
201 /* Include files */
202 #include <linux/bitops.h>
203 #include <linux/compiler.h>
204 #include <linux/delay.h>
205 #include <linux/dma-mapping.h>
206 #include <linux/eisa.h>
207 #include <linux/errno.h>
208 #include <linux/fddidevice.h>
209 #include <linux/init.h>
210 #include <linux/interrupt.h>
211 #include <linux/ioport.h>
212 #include <linux/kernel.h>
213 #include <linux/module.h>
214 #include <linux/netdevice.h>
215 #include <linux/pci.h>
216 #include <linux/skbuff.h>
217 #include <linux/slab.h>
218 #include <linux/string.h>
219 #include <linux/tc.h>
220
221 #include <asm/byteorder.h>
222 #include <asm/io.h>
223
224 #include "defxx.h"
225
226 /* Version information string should be updated prior to each new release!  */
227 #define DRV_NAME "defxx"
228 #define DRV_VERSION "v1.10"
229 #define DRV_RELDATE "2006/12/14"
230
231 static char version[] __devinitdata =
232         DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
233         "  Lawrence V. Stefani and others\n";
234
235 #define DYNAMIC_BUFFERS 1
236
237 #define SKBUFF_RX_COPYBREAK 200
238 /*
239  * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
240  * alignment for compatibility with old EISA boards.
241  */
242 #define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
243
244 #ifdef CONFIG_PCI
245 #define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
246 #else
247 #define DFX_BUS_PCI(dev) 0
248 #endif
249
250 #ifdef CONFIG_EISA
251 #define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
252 #else
253 #define DFX_BUS_EISA(dev) 0
254 #endif
255
256 #ifdef CONFIG_TC
257 #define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
258 #else
259 #define DFX_BUS_TC(dev) 0
260 #endif
261
262 #ifdef CONFIG_DEFXX_MMIO
263 #define DFX_MMIO 1
264 #else
265 #define DFX_MMIO 0
266 #endif
267
268 /* Define module-wide (static) routines */
269
270 static void             dfx_bus_init(struct net_device *dev);
271 static void             dfx_bus_uninit(struct net_device *dev);
272 static void             dfx_bus_config_check(DFX_board_t *bp);
273
274 static int              dfx_driver_init(struct net_device *dev,
275                                         const char *print_name,
276                                         resource_size_t bar_start);
277 static int              dfx_adap_init(DFX_board_t *bp, int get_buffers);
278
279 static int              dfx_open(struct net_device *dev);
280 static int              dfx_close(struct net_device *dev);
281
282 static void             dfx_int_pr_halt_id(DFX_board_t *bp);
283 static void             dfx_int_type_0_process(DFX_board_t *bp);
284 static void             dfx_int_common(struct net_device *dev);
285 static irqreturn_t      dfx_interrupt(int irq, void *dev_id);
286
287 static struct           net_device_stats *dfx_ctl_get_stats(struct net_device *dev);
288 static void             dfx_ctl_set_multicast_list(struct net_device *dev);
289 static int              dfx_ctl_set_mac_address(struct net_device *dev, void *addr);
290 static int              dfx_ctl_update_cam(DFX_board_t *bp);
291 static int              dfx_ctl_update_filters(DFX_board_t *bp);
292
293 static int              dfx_hw_dma_cmd_req(DFX_board_t *bp);
294 static int              dfx_hw_port_ctrl_req(DFX_board_t *bp, PI_UINT32 command, PI_UINT32 data_a, PI_UINT32 data_b, PI_UINT32 *host_data);
295 static void             dfx_hw_adap_reset(DFX_board_t *bp, PI_UINT32 type);
296 static int              dfx_hw_adap_state_rd(DFX_board_t *bp);
297 static int              dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type);
298
299 static int              dfx_rcv_init(DFX_board_t *bp, int get_buffers);
300 static void             dfx_rcv_queue_process(DFX_board_t *bp);
301 static void             dfx_rcv_flush(DFX_board_t *bp);
302
303 static int              dfx_xmt_queue_pkt(struct sk_buff *skb, struct net_device *dev);
304 static int              dfx_xmt_done(DFX_board_t *bp);
305 static void             dfx_xmt_flush(DFX_board_t *bp);
306
307 /* Define module-wide (static) variables */
308
309 static struct pci_driver dfx_pci_driver;
310 static struct eisa_driver dfx_eisa_driver;
311 static struct tc_driver dfx_tc_driver;
312
313
314 /*
315  * =======================
316  * = dfx_port_write_long =
317  * = dfx_port_read_long  =
318  * =======================
319  *
320  * Overview:
321  *   Routines for reading and writing values from/to adapter
322  *
323  * Returns:
324  *   None
325  *
326  * Arguments:
327  *   bp         - pointer to board information
328  *   offset     - register offset from base I/O address
329  *   data       - for dfx_port_write_long, this is a value to write;
330  *                for dfx_port_read_long, this is a pointer to store
331  *                the read value
332  *
333  * Functional Description:
334  *   These routines perform the correct operation to read or write
335  *   the adapter register.
336  *
337  *   EISA port block base addresses are based on the slot number in which the
338  *   controller is installed.  For example, if the EISA controller is installed
339  *   in slot 4, the port block base address is 0x4000.  If the controller is
340  *   installed in slot 2, the port block base address is 0x2000, and so on.
341  *   This port block can be used to access PDQ, ESIC, and DEFEA on-board
342  *   registers using the register offsets defined in DEFXX.H.
343  *
344  *   PCI port block base addresses are assigned by the PCI BIOS or system
345  *   firmware.  There is one 128 byte port block which can be accessed.  It
346  *   allows for I/O mapping of both PDQ and PFI registers using the register
347  *   offsets defined in DEFXX.H.
348  *
349  * Return Codes:
350  *   None
351  *
352  * Assumptions:
353  *   bp->base is a valid base I/O address for this adapter.
354  *   offset is a valid register offset for this adapter.
355  *
356  * Side Effects:
357  *   Rather than produce macros for these functions, these routines
358  *   are defined using "inline" to ensure that the compiler will
359  *   generate inline code and not waste a procedure call and return.
360  *   This provides all the benefits of macros, but with the
361  *   advantage of strict data type checking.
362  */
363
364 static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data)
365 {
366         writel(data, bp->base.mem + offset);
367         mb();
368 }
369
370 static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
371 {
372         outl(data, bp->base.port + offset);
373 }
374
375 static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
376 {
377         struct device __maybe_unused *bdev = bp->bus_dev;
378         int dfx_bus_tc = DFX_BUS_TC(bdev);
379         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
380
381         if (dfx_use_mmio)
382                 dfx_writel(bp, offset, data);
383         else
384                 dfx_outl(bp, offset, data);
385 }
386
387
388 static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data)
389 {
390         mb();
391         *data = readl(bp->base.mem + offset);
392 }
393
394 static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
395 {
396         *data = inl(bp->base.port + offset);
397 }
398
399 static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
400 {
401         struct device __maybe_unused *bdev = bp->bus_dev;
402         int dfx_bus_tc = DFX_BUS_TC(bdev);
403         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
404
405         if (dfx_use_mmio)
406                 dfx_readl(bp, offset, data);
407         else
408                 dfx_inl(bp, offset, data);
409 }
410
411
412 /*
413  * ================
414  * = dfx_get_bars =
415  * ================
416  *
417  * Overview:
418  *   Retrieves the address range used to access control and status
419  *   registers.
420  *
421  * Returns:
422  *   None
423  *
424  * Arguments:
425  *   bdev       - pointer to device information
426  *   bar_start  - pointer to store the start address
427  *   bar_len    - pointer to store the length of the area
428  *
429  * Assumptions:
430  *   I am sure there are some.
431  *
432  * Side Effects:
433  *   None
434  */
435 static void dfx_get_bars(struct device *bdev,
436                          resource_size_t *bar_start, resource_size_t *bar_len)
437 {
438         int dfx_bus_pci = DFX_BUS_PCI(bdev);
439         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
440         int dfx_bus_tc = DFX_BUS_TC(bdev);
441         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
442
443         if (dfx_bus_pci) {
444                 int num = dfx_use_mmio ? 0 : 1;
445
446                 *bar_start = pci_resource_start(to_pci_dev(bdev), num);
447                 *bar_len = pci_resource_len(to_pci_dev(bdev), num);
448         }
449         if (dfx_bus_eisa) {
450                 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
451                 resource_size_t bar;
452
453                 if (dfx_use_mmio) {
454                         bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2);
455                         bar <<= 8;
456                         bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1);
457                         bar <<= 8;
458                         bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0);
459                         bar <<= 16;
460                         *bar_start = bar;
461                         bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2);
462                         bar <<= 8;
463                         bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1);
464                         bar <<= 8;
465                         bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0);
466                         bar <<= 16;
467                         *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1;
468                 } else {
469                         *bar_start = base_addr;
470                         *bar_len = PI_ESIC_K_CSR_IO_LEN;
471                 }
472         }
473         if (dfx_bus_tc) {
474                 *bar_start = to_tc_dev(bdev)->resource.start +
475                              PI_TC_K_CSR_OFFSET;
476                 *bar_len = PI_TC_K_CSR_LEN;
477         }
478 }
479
480 /*
481  * ================
482  * = dfx_register =
483  * ================
484  *
485  * Overview:
486  *   Initializes a supported FDDI controller
487  *
488  * Returns:
489  *   Condition code
490  *
491  * Arguments:
492  *   bdev - pointer to device information
493  *
494  * Functional Description:
495  *
496  * Return Codes:
497  *   0           - This device (fddi0, fddi1, etc) configured successfully
498  *   -EBUSY      - Failed to get resources, or dfx_driver_init failed.
499  *
500  * Assumptions:
501  *   It compiles so it should work :-( (PCI cards do :-)
502  *
503  * Side Effects:
504  *   Device structures for FDDI adapters (fddi0, fddi1, etc) are
505  *   initialized and the board resources are read and stored in
506  *   the device structure.
507  */
508 static int __devinit dfx_register(struct device *bdev)
509 {
510         static int version_disp;
511         int dfx_bus_pci = DFX_BUS_PCI(bdev);
512         int dfx_bus_tc = DFX_BUS_TC(bdev);
513         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
514         char *print_name = bdev->bus_id;
515         struct net_device *dev;
516         DFX_board_t       *bp;                  /* board pointer */
517         resource_size_t bar_start = 0;          /* pointer to port */
518         resource_size_t bar_len = 0;            /* resource length */
519         int alloc_size;                         /* total buffer size used */
520         struct resource *region;
521         int err = 0;
522
523         if (!version_disp) {    /* display version info if adapter is found */
524                 version_disp = 1;       /* set display flag to TRUE so that */
525                 printk(version);        /* we only display this string ONCE */
526         }
527
528         dev = alloc_fddidev(sizeof(*bp));
529         if (!dev) {
530                 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n",
531                        print_name);
532                 return -ENOMEM;
533         }
534
535         /* Enable PCI device. */
536         if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) {
537                 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n",
538                        print_name);
539                 goto err_out;
540         }
541
542         SET_NETDEV_DEV(dev, bdev);
543
544         bp = netdev_priv(dev);
545         bp->bus_dev = bdev;
546         dev_set_drvdata(bdev, dev);
547
548         dfx_get_bars(bdev, &bar_start, &bar_len);
549
550         if (dfx_use_mmio)
551                 region = request_mem_region(bar_start, bar_len, print_name);
552         else
553                 region = request_region(bar_start, bar_len, print_name);
554         if (!region) {
555                 printk(KERN_ERR "%s: Cannot reserve I/O resource "
556                        "0x%lx @ 0x%lx, aborting\n",
557                        print_name, (long)bar_len, (long)bar_start);
558                 err = -EBUSY;
559                 goto err_out_disable;
560         }
561
562         /* Set up I/O base address. */
563         if (dfx_use_mmio) {
564                 bp->base.mem = ioremap_nocache(bar_start, bar_len);
565                 if (!bp->base.mem) {
566                         printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
567                         err = -ENOMEM;
568                         goto err_out_region;
569                 }
570         } else {
571                 bp->base.port = bar_start;
572                 dev->base_addr = bar_start;
573         }
574
575         /* Initialize new device structure */
576
577         dev->get_stats                  = dfx_ctl_get_stats;
578         dev->open                       = dfx_open;
579         dev->stop                       = dfx_close;
580         dev->hard_start_xmit            = dfx_xmt_queue_pkt;
581         dev->set_multicast_list         = dfx_ctl_set_multicast_list;
582         dev->set_mac_address            = dfx_ctl_set_mac_address;
583
584         if (dfx_bus_pci)
585                 pci_set_master(to_pci_dev(bdev));
586
587         if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) {
588                 err = -ENODEV;
589                 goto err_out_unmap;
590         }
591
592         err = register_netdev(dev);
593         if (err)
594                 goto err_out_kfree;
595
596         printk("%s: registered as %s\n", print_name, dev->name);
597         return 0;
598
599 err_out_kfree:
600         alloc_size = sizeof(PI_DESCR_BLOCK) +
601                      PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
602 #ifndef DYNAMIC_BUFFERS
603                      (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
604 #endif
605                      sizeof(PI_CONSUMER_BLOCK) +
606                      (PI_ALIGN_K_DESC_BLK - 1);
607         if (bp->kmalloced)
608                 dma_free_coherent(bdev, alloc_size,
609                                   bp->kmalloced, bp->kmalloced_dma);
610
611 err_out_unmap:
612         if (dfx_use_mmio)
613                 iounmap(bp->base.mem);
614
615 err_out_region:
616         if (dfx_use_mmio)
617                 release_mem_region(bar_start, bar_len);
618         else
619                 release_region(bar_start, bar_len);
620
621 err_out_disable:
622         if (dfx_bus_pci)
623                 pci_disable_device(to_pci_dev(bdev));
624
625 err_out:
626         free_netdev(dev);
627         return err;
628 }
629
630
631 /*
632  * ================
633  * = dfx_bus_init =
634  * ================
635  *
636  * Overview:
637  *   Initializes the bus-specific controller logic.
638  *
639  * Returns:
640  *   None
641  *
642  * Arguments:
643  *   dev - pointer to device information
644  *
645  * Functional Description:
646  *   Determine and save adapter IRQ in device table,
647  *   then perform bus-specific logic initialization.
648  *
649  * Return Codes:
650  *   None
651  *
652  * Assumptions:
653  *   bp->base has already been set with the proper
654  *       base I/O address for this device.
655  *
656  * Side Effects:
657  *   Interrupts are enabled at the adapter bus-specific logic.
658  *   Note:  Interrupts at the DMA engine (PDQ chip) are not
659  *   enabled yet.
660  */
661
662 static void __devinit dfx_bus_init(struct net_device *dev)
663 {
664         DFX_board_t *bp = netdev_priv(dev);
665         struct device *bdev = bp->bus_dev;
666         int dfx_bus_pci = DFX_BUS_PCI(bdev);
667         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
668         int dfx_bus_tc = DFX_BUS_TC(bdev);
669         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
670         u8 val;
671
672         DBG_printk("In dfx_bus_init...\n");
673
674         /* Initialize a pointer back to the net_device struct */
675         bp->dev = dev;
676
677         /* Initialize adapter based on bus type */
678
679         if (dfx_bus_tc)
680                 dev->irq = to_tc_dev(bdev)->interrupt;
681         if (dfx_bus_eisa) {
682                 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
683
684                 /* Get the interrupt level from the ESIC chip.  */
685                 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
686                 val &= PI_CONFIG_STAT_0_M_IRQ;
687                 val >>= PI_CONFIG_STAT_0_V_IRQ;
688
689                 switch (val) {
690                 case PI_CONFIG_STAT_0_IRQ_K_9:
691                         dev->irq = 9;
692                         break;
693
694                 case PI_CONFIG_STAT_0_IRQ_K_10:
695                         dev->irq = 10;
696                         break;
697
698                 case PI_CONFIG_STAT_0_IRQ_K_11:
699                         dev->irq = 11;
700                         break;
701
702                 case PI_CONFIG_STAT_0_IRQ_K_15:
703                         dev->irq = 15;
704                         break;
705                 }
706
707                 /*
708                  * Enable memory decoding (MEMCS0) and/or port decoding
709                  * (IOCS1/IOCS0) as appropriate in Function Control
710                  * Register.  One of the port chip selects seems to be
711                  * used for the Burst Holdoff register, but this bit of
712                  * documentation is missing and as yet it has not been
713                  * determined which of the two.  This is also the reason
714                  * the size of the decoded port range is twice as large
715                  * as one required by the PDQ.
716                  */
717
718                 /* Set the decode range of the board.  */
719                 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT);
720                 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val);
721                 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0);
722                 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val);
723                 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0);
724                 val = PI_ESIC_K_CSR_IO_LEN - 1;
725                 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff);
726                 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff);
727                 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff);
728                 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff);
729
730                 /* Enable the decoders.  */
731                 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0;
732                 if (dfx_use_mmio)
733                         val |= PI_FUNCTION_CNTRL_M_MEMCS0;
734                 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val);
735
736                 /*
737                  * Enable access to the rest of the module
738                  * (including PDQ and packet memory).
739                  */
740                 val = PI_SLOT_CNTRL_M_ENB;
741                 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val);
742
743                 /*
744                  * Map PDQ registers into memory or port space.  This is
745                  * done with a bit in the Burst Holdoff register.
746                  */
747                 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
748                 if (dfx_use_mmio)
749                         val |= PI_BURST_HOLDOFF_V_MEM_MAP;
750                 else
751                         val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
752                 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val);
753
754                 /* Enable interrupts at EISA bus interface chip (ESIC) */
755                 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
756                 val |= PI_CONFIG_STAT_0_M_INT_ENB;
757                 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
758         }
759         if (dfx_bus_pci) {
760                 struct pci_dev *pdev = to_pci_dev(bdev);
761
762                 /* Get the interrupt level from the PCI Configuration Table */
763
764                 dev->irq = pdev->irq;
765
766                 /* Check Latency Timer and set if less than minimal */
767
768                 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
769                 if (val < PFI_K_LAT_TIMER_MIN) {
770                         val = PFI_K_LAT_TIMER_DEF;
771                         pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val);
772                 }
773
774                 /* Enable interrupts at PCI bus interface chip (PFI) */
775                 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB;
776                 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val);
777         }
778 }
779
780 /*
781  * ==================
782  * = dfx_bus_uninit =
783  * ==================
784  *
785  * Overview:
786  *   Uninitializes the bus-specific controller logic.
787  *
788  * Returns:
789  *   None
790  *
791  * Arguments:
792  *   dev - pointer to device information
793  *
794  * Functional Description:
795  *   Perform bus-specific logic uninitialization.
796  *
797  * Return Codes:
798  *   None
799  *
800  * Assumptions:
801  *   bp->base has already been set with the proper
802  *       base I/O address for this device.
803  *
804  * Side Effects:
805  *   Interrupts are disabled at the adapter bus-specific logic.
806  */
807
808 static void __devinit dfx_bus_uninit(struct net_device *dev)
809 {
810         DFX_board_t *bp = netdev_priv(dev);
811         struct device *bdev = bp->bus_dev;
812         int dfx_bus_pci = DFX_BUS_PCI(bdev);
813         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
814         u8 val;
815
816         DBG_printk("In dfx_bus_uninit...\n");
817
818         /* Uninitialize adapter based on bus type */
819
820         if (dfx_bus_eisa) {
821                 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
822
823                 /* Disable interrupts at EISA bus interface chip (ESIC) */
824                 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
825                 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
826                 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
827         }
828         if (dfx_bus_pci) {
829                 /* Disable interrupts at PCI bus interface chip (PFI) */
830                 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0);
831         }
832 }
833
834
835 /*
836  * ========================
837  * = dfx_bus_config_check =
838  * ========================
839  *
840  * Overview:
841  *   Checks the configuration (burst size, full-duplex, etc.)  If any parameters
842  *   are illegal, then this routine will set new defaults.
843  *
844  * Returns:
845  *   None
846  *
847  * Arguments:
848  *   bp - pointer to board information
849  *
850  * Functional Description:
851  *   For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
852  *   PDQ, and all FDDI PCI controllers, all values are legal.
853  *
854  * Return Codes:
855  *   None
856  *
857  * Assumptions:
858  *   dfx_adap_init has NOT been called yet so burst size and other items have
859  *   not been set.
860  *
861  * Side Effects:
862  *   None
863  */
864
865 static void __devinit dfx_bus_config_check(DFX_board_t *bp)
866 {
867         struct device __maybe_unused *bdev = bp->bus_dev;
868         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
869         int     status;                         /* return code from adapter port control call */
870         u32     host_data;                      /* LW data returned from port control call */
871
872         DBG_printk("In dfx_bus_config_check...\n");
873
874         /* Configuration check only valid for EISA adapter */
875
876         if (dfx_bus_eisa) {
877                 /*
878                  * First check if revision 2 EISA controller.  Rev. 1 cards used
879                  * PDQ revision B, so no workaround needed in this case.  Rev. 3
880                  * cards used PDQ revision E, so no workaround needed in this
881                  * case, either.  Only Rev. 2 cards used either Rev. D or E
882                  * chips, so we must verify the chip revision on Rev. 2 cards.
883                  */
884                 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) {
885                         /*
886                          * Revision 2 FDDI EISA controller found,
887                          * so let's check PDQ revision of adapter.
888                          */
889                         status = dfx_hw_port_ctrl_req(bp,
890                                                                                         PI_PCTRL_M_SUB_CMD,
891                                                                                         PI_SUB_CMD_K_PDQ_REV_GET,
892                                                                                         0,
893                                                                                         &host_data);
894                         if ((status != DFX_K_SUCCESS) || (host_data == 2))
895                                 {
896                                 /*
897                                  * Either we couldn't determine the PDQ revision, or
898                                  * we determined that it is at revision D.  In either case,
899                                  * we need to implement the workaround.
900                                  */
901
902                                 /* Ensure that the burst size is set to 8 longwords or less */
903
904                                 switch (bp->burst_size)
905                                         {
906                                         case PI_PDATA_B_DMA_BURST_SIZE_32:
907                                         case PI_PDATA_B_DMA_BURST_SIZE_16:
908                                                 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_8;
909                                                 break;
910
911                                         default:
912                                                 break;
913                                         }
914
915                                 /* Ensure that full-duplex mode is not enabled */
916
917                                 bp->full_duplex_enb = PI_SNMP_K_FALSE;
918                                 }
919                         }
920                 }
921         }
922
923
924 /*
925  * ===================
926  * = dfx_driver_init =
927  * ===================
928  *
929  * Overview:
930  *   Initializes remaining adapter board structure information
931  *   and makes sure adapter is in a safe state prior to dfx_open().
932  *
933  * Returns:
934  *   Condition code
935  *
936  * Arguments:
937  *   dev - pointer to device information
938  *   print_name - printable device name
939  *
940  * Functional Description:
941  *   This function allocates additional resources such as the host memory
942  *   blocks needed by the adapter (eg. descriptor and consumer blocks).
943  *       Remaining bus initialization steps are also completed.  The adapter
944  *   is also reset so that it is in the DMA_UNAVAILABLE state.  The OS
945  *   must call dfx_open() to open the adapter and bring it on-line.
946  *
947  * Return Codes:
948  *   DFX_K_SUCCESS      - initialization succeeded
949  *   DFX_K_FAILURE      - initialization failed - could not allocate memory
950  *                                              or read adapter MAC address
951  *
952  * Assumptions:
953  *   Memory allocated from pci_alloc_consistent() call is physically
954  *   contiguous, locked memory.
955  *
956  * Side Effects:
957  *   Adapter is reset and should be in DMA_UNAVAILABLE state before
958  *   returning from this routine.
959  */
960
961 static int __devinit dfx_driver_init(struct net_device *dev,
962                                      const char *print_name,
963                                      resource_size_t bar_start)
964 {
965         DFX_board_t *bp = netdev_priv(dev);
966         struct device *bdev = bp->bus_dev;
967         int dfx_bus_pci = DFX_BUS_PCI(bdev);
968         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
969         int dfx_bus_tc = DFX_BUS_TC(bdev);
970         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
971         int alloc_size;                 /* total buffer size needed */
972         char *top_v, *curr_v;           /* virtual addrs into memory block */
973         dma_addr_t top_p, curr_p;       /* physical addrs into memory block */
974         u32 data, le32;                 /* host data register value */
975         char *board_name = NULL;
976
977         DBG_printk("In dfx_driver_init...\n");
978
979         /* Initialize bus-specific hardware registers */
980
981         dfx_bus_init(dev);
982
983         /*
984          * Initialize default values for configurable parameters
985          *
986          * Note: All of these parameters are ones that a user may
987          *       want to customize.  It'd be nice to break these
988          *               out into Space.c or someplace else that's more
989          *               accessible/understandable than this file.
990          */
991
992         bp->full_duplex_enb             = PI_SNMP_K_FALSE;
993         bp->req_ttrt                    = 8 * 12500;            /* 8ms in 80 nanosec units */
994         bp->burst_size                  = PI_PDATA_B_DMA_BURST_SIZE_DEF;
995         bp->rcv_bufs_to_post    = RCV_BUFS_DEF;
996
997         /*
998          * Ensure that HW configuration is OK
999          *
1000          * Note: Depending on the hardware revision, we may need to modify
1001          *       some of the configurable parameters to workaround hardware
1002          *       limitations.  We'll perform this configuration check AFTER
1003          *       setting the parameters to their default values.
1004          */
1005
1006         dfx_bus_config_check(bp);
1007
1008         /* Disable PDQ interrupts first */
1009
1010         dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1011
1012         /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1013
1014         (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1015
1016         /*  Read the factory MAC address from the adapter then save it */
1017
1018         if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
1019                                  &data) != DFX_K_SUCCESS) {
1020                 printk("%s: Could not read adapter factory MAC address!\n",
1021                        print_name);
1022                 return(DFX_K_FAILURE);
1023         }
1024         le32 = cpu_to_le32(data);
1025         memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32));
1026
1027         if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
1028                                  &data) != DFX_K_SUCCESS) {
1029                 printk("%s: Could not read adapter factory MAC address!\n",
1030                        print_name);
1031                 return(DFX_K_FAILURE);
1032         }
1033         le32 = cpu_to_le32(data);
1034         memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16));
1035
1036         /*
1037          * Set current address to factory address
1038          *
1039          * Note: Node address override support is handled through
1040          *       dfx_ctl_set_mac_address.
1041          */
1042
1043         memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1044         if (dfx_bus_tc)
1045                 board_name = "DEFTA";
1046         if (dfx_bus_eisa)
1047                 board_name = "DEFEA";
1048         if (dfx_bus_pci)
1049                 board_name = "DEFPA";
1050         pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
1051                 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
1052                 print_name, board_name, dfx_use_mmio ? "" : "I/O ",
1053                 (long long)bar_start, dev->irq,
1054                 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1055                 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1056
1057         /*
1058          * Get memory for descriptor block, consumer block, and other buffers
1059          * that need to be DMA read or written to by the adapter.
1060          */
1061
1062         alloc_size = sizeof(PI_DESCR_BLOCK) +
1063                                         PI_CMD_REQ_K_SIZE_MAX +
1064                                         PI_CMD_RSP_K_SIZE_MAX +
1065 #ifndef DYNAMIC_BUFFERS
1066                                         (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
1067 #endif
1068                                         sizeof(PI_CONSUMER_BLOCK) +
1069                                         (PI_ALIGN_K_DESC_BLK - 1);
1070         bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size,
1071                                                    &bp->kmalloced_dma,
1072                                                    GFP_ATOMIC);
1073         if (top_v == NULL) {
1074                 printk("%s: Could not allocate memory for host buffers "
1075                        "and structures!\n", print_name);
1076                 return(DFX_K_FAILURE);
1077         }
1078         memset(top_v, 0, alloc_size);   /* zero out memory before continuing */
1079         top_p = bp->kmalloced_dma;      /* get physical address of buffer */
1080
1081         /*
1082          *  To guarantee the 8K alignment required for the descriptor block, 8K - 1
1083          *  plus the amount of memory needed was allocated.  The physical address
1084          *      is now 8K aligned.  By carving up the memory in a specific order,
1085          *  we'll guarantee the alignment requirements for all other structures.
1086          *
1087          *  Note: If the assumptions change regarding the non-paged, non-cached,
1088          *                physically contiguous nature of the memory block or the address
1089          *                alignments, then we'll need to implement a different algorithm
1090          *                for allocating the needed memory.
1091          */
1092
1093         curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
1094         curr_v = top_v + (curr_p - top_p);
1095
1096         /* Reserve space for descriptor block */
1097
1098         bp->descr_block_virt = (PI_DESCR_BLOCK *) curr_v;
1099         bp->descr_block_phys = curr_p;
1100         curr_v += sizeof(PI_DESCR_BLOCK);
1101         curr_p += sizeof(PI_DESCR_BLOCK);
1102
1103         /* Reserve space for command request buffer */
1104
1105         bp->cmd_req_virt = (PI_DMA_CMD_REQ *) curr_v;
1106         bp->cmd_req_phys = curr_p;
1107         curr_v += PI_CMD_REQ_K_SIZE_MAX;
1108         curr_p += PI_CMD_REQ_K_SIZE_MAX;
1109
1110         /* Reserve space for command response buffer */
1111
1112         bp->cmd_rsp_virt = (PI_DMA_CMD_RSP *) curr_v;
1113         bp->cmd_rsp_phys = curr_p;
1114         curr_v += PI_CMD_RSP_K_SIZE_MAX;
1115         curr_p += PI_CMD_RSP_K_SIZE_MAX;
1116
1117         /* Reserve space for the LLC host receive queue buffers */
1118
1119         bp->rcv_block_virt = curr_v;
1120         bp->rcv_block_phys = curr_p;
1121
1122 #ifndef DYNAMIC_BUFFERS
1123         curr_v += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1124         curr_p += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1125 #endif
1126
1127         /* Reserve space for the consumer block */
1128
1129         bp->cons_block_virt = (PI_CONSUMER_BLOCK *) curr_v;
1130         bp->cons_block_phys = curr_p;
1131
1132         /* Display virtual and physical addresses if debug driver */
1133
1134         DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1135                    print_name,
1136                    (long)bp->descr_block_virt, bp->descr_block_phys);
1137         DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1138                    print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
1139         DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1140                    print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
1141         DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1142                    print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
1143         DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1144                    print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
1145
1146         return(DFX_K_SUCCESS);
1147 }
1148
1149
1150 /*
1151  * =================
1152  * = dfx_adap_init =
1153  * =================
1154  *
1155  * Overview:
1156  *   Brings the adapter to the link avail/link unavailable state.
1157  *
1158  * Returns:
1159  *   Condition code
1160  *
1161  * Arguments:
1162  *   bp - pointer to board information
1163  *   get_buffers - non-zero if buffers to be allocated
1164  *
1165  * Functional Description:
1166  *   Issues the low-level firmware/hardware calls necessary to bring
1167  *   the adapter up, or to properly reset and restore adapter during
1168  *   run-time.
1169  *
1170  * Return Codes:
1171  *   DFX_K_SUCCESS - Adapter brought up successfully
1172  *   DFX_K_FAILURE - Adapter initialization failed
1173  *
1174  * Assumptions:
1175  *   bp->reset_type should be set to a valid reset type value before
1176  *   calling this routine.
1177  *
1178  * Side Effects:
1179  *   Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1180  *   upon a successful return of this routine.
1181  */
1182
1183 static int dfx_adap_init(DFX_board_t *bp, int get_buffers)
1184         {
1185         DBG_printk("In dfx_adap_init...\n");
1186
1187         /* Disable PDQ interrupts first */
1188
1189         dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1190
1191         /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1192
1193         if (dfx_hw_dma_uninit(bp, bp->reset_type) != DFX_K_SUCCESS)
1194                 {
1195                 printk("%s: Could not uninitialize/reset adapter!\n", bp->dev->name);
1196                 return(DFX_K_FAILURE);
1197                 }
1198
1199         /*
1200          * When the PDQ is reset, some false Type 0 interrupts may be pending,
1201          * so we'll acknowledge all Type 0 interrupts now before continuing.
1202          */
1203
1204         dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, PI_HOST_INT_K_ACK_ALL_TYPE_0);
1205
1206         /*
1207          * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1208          *
1209          * Note: We only need to clear host copies of these registers.  The PDQ reset
1210          *       takes care of the on-board register values.
1211          */
1212
1213         bp->cmd_req_reg.lword   = 0;
1214         bp->cmd_rsp_reg.lword   = 0;
1215         bp->rcv_xmt_reg.lword   = 0;
1216
1217         /* Clear consumer block before going to DMA_AVAILABLE state */
1218
1219         memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1220
1221         /* Initialize the DMA Burst Size */
1222
1223         if (dfx_hw_port_ctrl_req(bp,
1224                                                         PI_PCTRL_M_SUB_CMD,
1225                                                         PI_SUB_CMD_K_BURST_SIZE_SET,
1226                                                         bp->burst_size,
1227                                                         NULL) != DFX_K_SUCCESS)
1228                 {
1229                 printk("%s: Could not set adapter burst size!\n", bp->dev->name);
1230                 return(DFX_K_FAILURE);
1231                 }
1232
1233         /*
1234          * Set base address of Consumer Block
1235          *
1236          * Assumption: 32-bit physical address of consumer block is 64 byte
1237          *                         aligned.  That is, bits 0-5 of the address must be zero.
1238          */
1239
1240         if (dfx_hw_port_ctrl_req(bp,
1241                                                         PI_PCTRL_M_CONS_BLOCK,
1242                                                         bp->cons_block_phys,
1243                                                         0,
1244                                                         NULL) != DFX_K_SUCCESS)
1245                 {
1246                 printk("%s: Could not set consumer block address!\n", bp->dev->name);
1247                 return(DFX_K_FAILURE);
1248                 }
1249
1250         /*
1251          * Set the base address of Descriptor Block and bring adapter
1252          * to DMA_AVAILABLE state.
1253          *
1254          * Note: We also set the literal and data swapping requirements
1255          *       in this command.
1256          *
1257          * Assumption: 32-bit physical address of descriptor block
1258          *       is 8Kbyte aligned.
1259          */
1260         if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_INIT,
1261                                  (u32)(bp->descr_block_phys |
1262                                        PI_PDATA_A_INIT_M_BSWAP_INIT),
1263                                  0, NULL) != DFX_K_SUCCESS) {
1264                 printk("%s: Could not set descriptor block address!\n",
1265                        bp->dev->name);
1266                 return DFX_K_FAILURE;
1267         }
1268
1269         /* Set transmit flush timeout value */
1270
1271         bp->cmd_req_virt->cmd_type = PI_CMD_K_CHARS_SET;
1272         bp->cmd_req_virt->char_set.item[0].item_code    = PI_ITEM_K_FLUSH_TIME;
1273         bp->cmd_req_virt->char_set.item[0].value                = 3;    /* 3 seconds */
1274         bp->cmd_req_virt->char_set.item[0].item_index   = 0;
1275         bp->cmd_req_virt->char_set.item[1].item_code    = PI_ITEM_K_EOL;
1276         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1277                 {
1278                 printk("%s: DMA command request failed!\n", bp->dev->name);
1279                 return(DFX_K_FAILURE);
1280                 }
1281
1282         /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1283
1284         bp->cmd_req_virt->cmd_type = PI_CMD_K_SNMP_SET;
1285         bp->cmd_req_virt->snmp_set.item[0].item_code    = PI_ITEM_K_FDX_ENB_DIS;
1286         bp->cmd_req_virt->snmp_set.item[0].value                = bp->full_duplex_enb;
1287         bp->cmd_req_virt->snmp_set.item[0].item_index   = 0;
1288         bp->cmd_req_virt->snmp_set.item[1].item_code    = PI_ITEM_K_MAC_T_REQ;
1289         bp->cmd_req_virt->snmp_set.item[1].value                = bp->req_ttrt;
1290         bp->cmd_req_virt->snmp_set.item[1].item_index   = 0;
1291         bp->cmd_req_virt->snmp_set.item[2].item_code    = PI_ITEM_K_EOL;
1292         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1293                 {
1294                 printk("%s: DMA command request failed!\n", bp->dev->name);
1295                 return(DFX_K_FAILURE);
1296                 }
1297
1298         /* Initialize adapter CAM */
1299
1300         if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
1301                 {
1302                 printk("%s: Adapter CAM update failed!\n", bp->dev->name);
1303                 return(DFX_K_FAILURE);
1304                 }
1305
1306         /* Initialize adapter filters */
1307
1308         if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
1309                 {
1310                 printk("%s: Adapter filters update failed!\n", bp->dev->name);
1311                 return(DFX_K_FAILURE);
1312                 }
1313
1314         /*
1315          * Remove any existing dynamic buffers (i.e. if the adapter is being
1316          * reinitialized)
1317          */
1318
1319         if (get_buffers)
1320                 dfx_rcv_flush(bp);
1321
1322         /* Initialize receive descriptor block and produce buffers */
1323
1324         if (dfx_rcv_init(bp, get_buffers))
1325                 {
1326                 printk("%s: Receive buffer allocation failed\n", bp->dev->name);
1327                 if (get_buffers)
1328                         dfx_rcv_flush(bp);
1329                 return(DFX_K_FAILURE);
1330                 }
1331
1332         /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1333
1334         bp->cmd_req_virt->cmd_type = PI_CMD_K_START;
1335         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1336                 {
1337                 printk("%s: Start command failed\n", bp->dev->name);
1338                 if (get_buffers)
1339                         dfx_rcv_flush(bp);
1340                 return(DFX_K_FAILURE);
1341                 }
1342
1343         /* Initialization succeeded, reenable PDQ interrupts */
1344
1345         dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_ENABLE_DEF_INTS);
1346         return(DFX_K_SUCCESS);
1347         }
1348
1349
1350 /*
1351  * ============
1352  * = dfx_open =
1353  * ============
1354  *
1355  * Overview:
1356  *   Opens the adapter
1357  *
1358  * Returns:
1359  *   Condition code
1360  *
1361  * Arguments:
1362  *   dev - pointer to device information
1363  *
1364  * Functional Description:
1365  *   This function brings the adapter to an operational state.
1366  *
1367  * Return Codes:
1368  *   0           - Adapter was successfully opened
1369  *   -EAGAIN - Could not register IRQ or adapter initialization failed
1370  *
1371  * Assumptions:
1372  *   This routine should only be called for a device that was
1373  *   initialized successfully.
1374  *
1375  * Side Effects:
1376  *   Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1377  *   if the open is successful.
1378  */
1379
1380 static int dfx_open(struct net_device *dev)
1381 {
1382         DFX_board_t *bp = netdev_priv(dev);
1383         int ret;
1384
1385         DBG_printk("In dfx_open...\n");
1386
1387         /* Register IRQ - support shared interrupts by passing device ptr */
1388
1389         ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name,
1390                           dev);
1391         if (ret) {
1392                 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
1393                 return ret;
1394         }
1395
1396         /*
1397          * Set current address to factory MAC address
1398          *
1399          * Note: We've already done this step in dfx_driver_init.
1400          *       However, it's possible that a user has set a node
1401          *               address override, then closed and reopened the
1402          *               adapter.  Unless we reset the device address field
1403          *               now, we'll continue to use the existing modified
1404          *               address.
1405          */
1406
1407         memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1408
1409         /* Clear local unicast/multicast address tables and counts */
1410
1411         memset(bp->uc_table, 0, sizeof(bp->uc_table));
1412         memset(bp->mc_table, 0, sizeof(bp->mc_table));
1413         bp->uc_count = 0;
1414         bp->mc_count = 0;
1415
1416         /* Disable promiscuous filter settings */
1417
1418         bp->ind_group_prom      = PI_FSTATE_K_BLOCK;
1419         bp->group_prom          = PI_FSTATE_K_BLOCK;
1420
1421         spin_lock_init(&bp->lock);
1422
1423         /* Reset and initialize adapter */
1424
1425         bp->reset_type = PI_PDATA_A_RESET_M_SKIP_ST;    /* skip self-test */
1426         if (dfx_adap_init(bp, 1) != DFX_K_SUCCESS)
1427         {
1428                 printk(KERN_ERR "%s: Adapter open failed!\n", dev->name);
1429                 free_irq(dev->irq, dev);
1430                 return -EAGAIN;
1431         }
1432
1433         /* Set device structure info */
1434         netif_start_queue(dev);
1435         return(0);
1436 }
1437
1438
1439 /*
1440  * =============
1441  * = dfx_close =
1442  * =============
1443  *
1444  * Overview:
1445  *   Closes the device/module.
1446  *
1447  * Returns:
1448  *   Condition code
1449  *
1450  * Arguments:
1451  *   dev - pointer to device information
1452  *
1453  * Functional Description:
1454  *   This routine closes the adapter and brings it to a safe state.
1455  *   The interrupt service routine is deregistered with the OS.
1456  *   The adapter can be opened again with another call to dfx_open().
1457  *
1458  * Return Codes:
1459  *   Always return 0.
1460  *
1461  * Assumptions:
1462  *   No further requests for this adapter are made after this routine is
1463  *   called.  dfx_open() can be called to reset and reinitialize the
1464  *   adapter.
1465  *
1466  * Side Effects:
1467  *   Adapter should be in DMA_UNAVAILABLE state upon completion of this
1468  *   routine.
1469  */
1470
1471 static int dfx_close(struct net_device *dev)
1472 {
1473         DFX_board_t *bp = netdev_priv(dev);
1474
1475         DBG_printk("In dfx_close...\n");
1476
1477         /* Disable PDQ interrupts first */
1478
1479         dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1480
1481         /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1482
1483         (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1484
1485         /*
1486          * Flush any pending transmit buffers
1487          *
1488          * Note: It's important that we flush the transmit buffers
1489          *               BEFORE we clear our copy of the Type 2 register.
1490          *               Otherwise, we'll have no idea how many buffers
1491          *               we need to free.
1492          */
1493
1494         dfx_xmt_flush(bp);
1495
1496         /*
1497          * Clear Type 1 and Type 2 registers after adapter reset
1498          *
1499          * Note: Even though we're closing the adapter, it's
1500          *       possible that an interrupt will occur after
1501          *               dfx_close is called.  Without some assurance to
1502          *               the contrary we want to make sure that we don't
1503          *               process receive and transmit LLC frames and update
1504          *               the Type 2 register with bad information.
1505          */
1506
1507         bp->cmd_req_reg.lword   = 0;
1508         bp->cmd_rsp_reg.lword   = 0;
1509         bp->rcv_xmt_reg.lword   = 0;
1510
1511         /* Clear consumer block for the same reason given above */
1512
1513         memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1514
1515         /* Release all dynamically allocate skb in the receive ring. */
1516
1517         dfx_rcv_flush(bp);
1518
1519         /* Clear device structure flags */
1520
1521         netif_stop_queue(dev);
1522
1523         /* Deregister (free) IRQ */
1524
1525         free_irq(dev->irq, dev);
1526
1527         return(0);
1528 }
1529
1530
1531 /*
1532  * ======================
1533  * = dfx_int_pr_halt_id =
1534  * ======================
1535  *
1536  * Overview:
1537  *   Displays halt id's in string form.
1538  *
1539  * Returns:
1540  *   None
1541  *
1542  * Arguments:
1543  *   bp - pointer to board information
1544  *
1545  * Functional Description:
1546  *   Determine current halt id and display appropriate string.
1547  *
1548  * Return Codes:
1549  *   None
1550  *
1551  * Assumptions:
1552  *   None
1553  *
1554  * Side Effects:
1555  *   None
1556  */
1557
1558 static void dfx_int_pr_halt_id(DFX_board_t      *bp)
1559         {
1560         PI_UINT32       port_status;                    /* PDQ port status register value */
1561         PI_UINT32       halt_id;                                /* PDQ port status halt ID */
1562
1563         /* Read the latest port status */
1564
1565         dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1566
1567         /* Display halt state transition information */
1568
1569         halt_id = (port_status & PI_PSTATUS_M_HALT_ID) >> PI_PSTATUS_V_HALT_ID;
1570         switch (halt_id)
1571                 {
1572                 case PI_HALT_ID_K_SELFTEST_TIMEOUT:
1573                         printk("%s: Halt ID: Selftest Timeout\n", bp->dev->name);
1574                         break;
1575
1576                 case PI_HALT_ID_K_PARITY_ERROR:
1577                         printk("%s: Halt ID: Host Bus Parity Error\n", bp->dev->name);
1578                         break;
1579
1580                 case PI_HALT_ID_K_HOST_DIR_HALT:
1581                         printk("%s: Halt ID: Host-Directed Halt\n", bp->dev->name);
1582                         break;
1583
1584                 case PI_HALT_ID_K_SW_FAULT:
1585                         printk("%s: Halt ID: Adapter Software Fault\n", bp->dev->name);
1586                         break;
1587
1588                 case PI_HALT_ID_K_HW_FAULT:
1589                         printk("%s: Halt ID: Adapter Hardware Fault\n", bp->dev->name);
1590                         break;
1591
1592                 case PI_HALT_ID_K_PC_TRACE:
1593                         printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp->dev->name);
1594                         break;
1595
1596                 case PI_HALT_ID_K_DMA_ERROR:
1597                         printk("%s: Halt ID: Adapter DMA Error\n", bp->dev->name);
1598                         break;
1599
1600                 case PI_HALT_ID_K_IMAGE_CRC_ERROR:
1601                         printk("%s: Halt ID: Firmware Image CRC Error\n", bp->dev->name);
1602                         break;
1603
1604                 case PI_HALT_ID_K_BUS_EXCEPTION:
1605                         printk("%s: Halt ID: 68000 Bus Exception\n", bp->dev->name);
1606                         break;
1607
1608                 default:
1609                         printk("%s: Halt ID: Unknown (code = %X)\n", bp->dev->name, halt_id);
1610                         break;
1611                 }
1612         }
1613
1614
1615 /*
1616  * ==========================
1617  * = dfx_int_type_0_process =
1618  * ==========================
1619  *
1620  * Overview:
1621  *   Processes Type 0 interrupts.
1622  *
1623  * Returns:
1624  *   None
1625  *
1626  * Arguments:
1627  *   bp - pointer to board information
1628  *
1629  * Functional Description:
1630  *   Processes all enabled Type 0 interrupts.  If the reason for the interrupt
1631  *   is a serious fault on the adapter, then an error message is displayed
1632  *   and the adapter is reset.
1633  *
1634  *   One tricky potential timing window is the rapid succession of "link avail"
1635  *   "link unavail" state change interrupts.  The acknowledgement of the Type 0
1636  *   interrupt must be done before reading the state from the Port Status
1637  *   register.  This is true because a state change could occur after reading
1638  *   the data, but before acknowledging the interrupt.  If this state change
1639  *   does happen, it would be lost because the driver is using the old state,
1640  *   and it will never know about the new state because it subsequently
1641  *   acknowledges the state change interrupt.
1642  *
1643  *          INCORRECT                                      CORRECT
1644  *      read type 0 int reasons                   read type 0 int reasons
1645  *      read adapter state                        ack type 0 interrupts
1646  *      ack type 0 interrupts                     read adapter state
1647  *      ... process interrupt ...                 ... process interrupt ...
1648  *
1649  * Return Codes:
1650  *   None
1651  *
1652  * Assumptions:
1653  *   None
1654  *
1655  * Side Effects:
1656  *   An adapter reset may occur if the adapter has any Type 0 error interrupts
1657  *   or if the port status indicates that the adapter is halted.  The driver
1658  *   is responsible for reinitializing the adapter with the current CAM
1659  *   contents and adapter filter settings.
1660  */
1661
1662 static void dfx_int_type_0_process(DFX_board_t  *bp)
1663
1664         {
1665         PI_UINT32       type_0_status;          /* Host Interrupt Type 0 register */
1666         PI_UINT32       state;                          /* current adap state (from port status) */
1667
1668         /*
1669          * Read host interrupt Type 0 register to determine which Type 0
1670          * interrupts are pending.  Immediately write it back out to clear
1671          * those interrupts.
1672          */
1673
1674         dfx_port_read_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, &type_0_status);
1675         dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, type_0_status);
1676
1677         /* Check for Type 0 error interrupts */
1678
1679         if (type_0_status & (PI_TYPE_0_STAT_M_NXM |
1680                                                         PI_TYPE_0_STAT_M_PM_PAR_ERR |
1681                                                         PI_TYPE_0_STAT_M_BUS_PAR_ERR))
1682                 {
1683                 /* Check for Non-Existent Memory error */
1684
1685                 if (type_0_status & PI_TYPE_0_STAT_M_NXM)
1686                         printk("%s: Non-Existent Memory Access Error\n", bp->dev->name);
1687
1688                 /* Check for Packet Memory Parity error */
1689
1690                 if (type_0_status & PI_TYPE_0_STAT_M_PM_PAR_ERR)
1691                         printk("%s: Packet Memory Parity Error\n", bp->dev->name);
1692
1693                 /* Check for Host Bus Parity error */
1694
1695                 if (type_0_status & PI_TYPE_0_STAT_M_BUS_PAR_ERR)
1696                         printk("%s: Host Bus Parity Error\n", bp->dev->name);
1697
1698                 /* Reset adapter and bring it back on-line */
1699
1700                 bp->link_available = PI_K_FALSE;        /* link is no longer available */
1701                 bp->reset_type = 0;                                     /* rerun on-board diagnostics */
1702                 printk("%s: Resetting adapter...\n", bp->dev->name);
1703                 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1704                         {
1705                         printk("%s: Adapter reset failed!  Disabling adapter interrupts.\n", bp->dev->name);
1706                         dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1707                         return;
1708                         }
1709                 printk("%s: Adapter reset successful!\n", bp->dev->name);
1710                 return;
1711                 }
1712
1713         /* Check for transmit flush interrupt */
1714
1715         if (type_0_status & PI_TYPE_0_STAT_M_XMT_FLUSH)
1716                 {
1717                 /* Flush any pending xmt's and acknowledge the flush interrupt */
1718
1719                 bp->link_available = PI_K_FALSE;                /* link is no longer available */
1720                 dfx_xmt_flush(bp);                                              /* flush any outstanding packets */
1721                 (void) dfx_hw_port_ctrl_req(bp,
1722                                                                         PI_PCTRL_M_XMT_DATA_FLUSH_DONE,
1723                                                                         0,
1724                                                                         0,
1725                                                                         NULL);
1726                 }
1727
1728         /* Check for adapter state change */
1729
1730         if (type_0_status & PI_TYPE_0_STAT_M_STATE_CHANGE)
1731                 {
1732                 /* Get latest adapter state */
1733
1734                 state = dfx_hw_adap_state_rd(bp);       /* get adapter state */
1735                 if (state == PI_STATE_K_HALTED)
1736                         {
1737                         /*
1738                          * Adapter has transitioned to HALTED state, try to reset
1739                          * adapter to bring it back on-line.  If reset fails,
1740                          * leave the adapter in the broken state.
1741                          */
1742
1743                         printk("%s: Controller has transitioned to HALTED state!\n", bp->dev->name);
1744                         dfx_int_pr_halt_id(bp);                 /* display halt id as string */
1745
1746                         /* Reset adapter and bring it back on-line */
1747
1748                         bp->link_available = PI_K_FALSE;        /* link is no longer available */
1749                         bp->reset_type = 0;                                     /* rerun on-board diagnostics */
1750                         printk("%s: Resetting adapter...\n", bp->dev->name);
1751                         if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1752                                 {
1753                                 printk("%s: Adapter reset failed!  Disabling adapter interrupts.\n", bp->dev->name);
1754                                 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1755                                 return;
1756                                 }
1757                         printk("%s: Adapter reset successful!\n", bp->dev->name);
1758                         }
1759                 else if (state == PI_STATE_K_LINK_AVAIL)
1760                         {
1761                         bp->link_available = PI_K_TRUE;         /* set link available flag */
1762                         }
1763                 }
1764         }
1765
1766
1767 /*
1768  * ==================
1769  * = dfx_int_common =
1770  * ==================
1771  *
1772  * Overview:
1773  *   Interrupt service routine (ISR)
1774  *
1775  * Returns:
1776  *   None
1777  *
1778  * Arguments:
1779  *   bp - pointer to board information
1780  *
1781  * Functional Description:
1782  *   This is the ISR which processes incoming adapter interrupts.
1783  *
1784  * Return Codes:
1785  *   None
1786  *
1787  * Assumptions:
1788  *   This routine assumes PDQ interrupts have not been disabled.
1789  *   When interrupts are disabled at the PDQ, the Port Status register
1790  *   is automatically cleared.  This routine uses the Port Status
1791  *   register value to determine whether a Type 0 interrupt occurred,
1792  *   so it's important that adapter interrupts are not normally
1793  *   enabled/disabled at the PDQ.
1794  *
1795  *   It's vital that this routine is NOT reentered for the
1796  *   same board and that the OS is not in another section of
1797  *   code (eg. dfx_xmt_queue_pkt) for the same board on a
1798  *   different thread.
1799  *
1800  * Side Effects:
1801  *   Pending interrupts are serviced.  Depending on the type of
1802  *   interrupt, acknowledging and clearing the interrupt at the
1803  *   PDQ involves writing a register to clear the interrupt bit
1804  *   or updating completion indices.
1805  */
1806
1807 static void dfx_int_common(struct net_device *dev)
1808 {
1809         DFX_board_t *bp = netdev_priv(dev);
1810         PI_UINT32       port_status;            /* Port Status register */
1811
1812         /* Process xmt interrupts - frequent case, so always call this routine */
1813
1814         if(dfx_xmt_done(bp))                            /* free consumed xmt packets */
1815                 netif_wake_queue(dev);
1816
1817         /* Process rcv interrupts - frequent case, so always call this routine */
1818
1819         dfx_rcv_queue_process(bp);              /* service received LLC frames */
1820
1821         /*
1822          * Transmit and receive producer and completion indices are updated on the
1823          * adapter by writing to the Type 2 Producer register.  Since the frequent
1824          * case is that we'll be processing either LLC transmit or receive buffers,
1825          * we'll optimize I/O writes by doing a single register write here.
1826          */
1827
1828         dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
1829
1830         /* Read PDQ Port Status register to find out which interrupts need processing */
1831
1832         dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1833
1834         /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1835
1836         if (port_status & PI_PSTATUS_M_TYPE_0_PENDING)
1837                 dfx_int_type_0_process(bp);     /* process Type 0 interrupts */
1838         }
1839
1840
1841 /*
1842  * =================
1843  * = dfx_interrupt =
1844  * =================
1845  *
1846  * Overview:
1847  *   Interrupt processing routine
1848  *
1849  * Returns:
1850  *   Whether a valid interrupt was seen.
1851  *
1852  * Arguments:
1853  *   irq        - interrupt vector
1854  *   dev_id     - pointer to device information
1855  *
1856  * Functional Description:
1857  *   This routine calls the interrupt processing routine for this adapter.  It
1858  *   disables and reenables adapter interrupts, as appropriate.  We can support
1859  *   shared interrupts since the incoming dev_id pointer provides our device
1860  *   structure context.
1861  *
1862  * Return Codes:
1863  *   IRQ_HANDLED - an IRQ was handled.
1864  *   IRQ_NONE    - no IRQ was handled.
1865  *
1866  * Assumptions:
1867  *   The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1868  *   on Intel-based systems) is done by the operating system outside this
1869  *   routine.
1870  *
1871  *       System interrupts are enabled through this call.
1872  *
1873  * Side Effects:
1874  *   Interrupts are disabled, then reenabled at the adapter.
1875  */
1876
1877 static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1878 {
1879         struct net_device *dev = dev_id;
1880         DFX_board_t *bp = netdev_priv(dev);
1881         struct device *bdev = bp->bus_dev;
1882         int dfx_bus_pci = DFX_BUS_PCI(bdev);
1883         int dfx_bus_eisa = DFX_BUS_EISA(bdev);
1884         int dfx_bus_tc = DFX_BUS_TC(bdev);
1885
1886         /* Service adapter interrupts */
1887
1888         if (dfx_bus_pci) {
1889                 u32 status;
1890
1891                 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status);
1892                 if (!(status & PFI_STATUS_M_PDQ_INT))
1893                         return IRQ_NONE;
1894
1895                 spin_lock(&bp->lock);
1896
1897                 /* Disable PDQ-PFI interrupts at PFI */
1898                 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1899                                     PFI_MODE_M_DMA_ENB);
1900
1901                 /* Call interrupt service routine for this adapter */
1902                 dfx_int_common(dev);
1903
1904                 /* Clear PDQ interrupt status bit and reenable interrupts */
1905                 dfx_port_write_long(bp, PFI_K_REG_STATUS,
1906                                     PFI_STATUS_M_PDQ_INT);
1907                 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1908                                     (PFI_MODE_M_PDQ_INT_ENB |
1909                                      PFI_MODE_M_DMA_ENB));
1910
1911                 spin_unlock(&bp->lock);
1912         }
1913         if (dfx_bus_eisa) {
1914                 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
1915                 u8 status;
1916
1917                 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1918                 if (!(status & PI_CONFIG_STAT_0_M_PEND))
1919                         return IRQ_NONE;
1920
1921                 spin_lock(&bp->lock);
1922
1923                 /* Disable interrupts at the ESIC */
1924                 status &= ~PI_CONFIG_STAT_0_M_INT_ENB;
1925                 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1926
1927                 /* Call interrupt service routine for this adapter */
1928                 dfx_int_common(dev);
1929
1930                 /* Reenable interrupts at the ESIC */
1931                 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1932                 status |= PI_CONFIG_STAT_0_M_INT_ENB;
1933                 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1934
1935                 spin_unlock(&bp->lock);
1936         }
1937         if (dfx_bus_tc) {
1938                 u32 status;
1939
1940                 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status);
1941                 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING |
1942                                 PI_PSTATUS_M_XMT_DATA_PENDING |
1943                                 PI_PSTATUS_M_SMT_HOST_PENDING |
1944                                 PI_PSTATUS_M_UNSOL_PENDING |
1945                                 PI_PSTATUS_M_CMD_RSP_PENDING |
1946                                 PI_PSTATUS_M_CMD_REQ_PENDING |
1947                                 PI_PSTATUS_M_TYPE_0_PENDING)))
1948                         return IRQ_NONE;
1949
1950                 spin_lock(&bp->lock);
1951
1952                 /* Call interrupt service routine for this adapter */
1953                 dfx_int_common(dev);
1954
1955                 spin_unlock(&bp->lock);
1956         }
1957
1958         return IRQ_HANDLED;
1959 }
1960
1961
1962 /*
1963  * =====================
1964  * = dfx_ctl_get_stats =
1965  * =====================
1966  *
1967  * Overview:
1968  *   Get statistics for FDDI adapter
1969  *
1970  * Returns:
1971  *   Pointer to FDDI statistics structure
1972  *
1973  * Arguments:
1974  *   dev - pointer to device information
1975  *
1976  * Functional Description:
1977  *   Gets current MIB objects from adapter, then
1978  *   returns FDDI statistics structure as defined
1979  *   in if_fddi.h.
1980  *
1981  *   Note: Since the FDDI statistics structure is
1982  *   still new and the device structure doesn't
1983  *   have an FDDI-specific get statistics handler,
1984  *   we'll return the FDDI statistics structure as
1985  *   a pointer to an Ethernet statistics structure.
1986  *   That way, at least the first part of the statistics
1987  *   structure can be decoded properly, and it allows
1988  *   "smart" applications to perform a second cast to
1989  *   decode the FDDI-specific statistics.
1990  *
1991  *   We'll have to pay attention to this routine as the
1992  *   device structure becomes more mature and LAN media
1993  *   independent.
1994  *
1995  * Return Codes:
1996  *   None
1997  *
1998  * Assumptions:
1999  *   None
2000  *
2001  * Side Effects:
2002  *   None
2003  */
2004
2005 static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
2006         {
2007         DFX_board_t *bp = netdev_priv(dev);
2008
2009         /* Fill the bp->stats structure with driver-maintained counters */
2010
2011         bp->stats.gen.rx_packets = bp->rcv_total_frames;
2012         bp->stats.gen.tx_packets = bp->xmt_total_frames;
2013         bp->stats.gen.rx_bytes   = bp->rcv_total_bytes;
2014         bp->stats.gen.tx_bytes   = bp->xmt_total_bytes;
2015         bp->stats.gen.rx_errors  = bp->rcv_crc_errors +
2016                                    bp->rcv_frame_status_errors +
2017                                    bp->rcv_length_errors;
2018         bp->stats.gen.tx_errors  = bp->xmt_length_errors;
2019         bp->stats.gen.rx_dropped = bp->rcv_discards;
2020         bp->stats.gen.tx_dropped = bp->xmt_discards;
2021         bp->stats.gen.multicast  = bp->rcv_multicast_frames;
2022         bp->stats.gen.collisions = 0;           /* always zero (0) for FDDI */
2023
2024         /* Get FDDI SMT MIB objects */
2025
2026         bp->cmd_req_virt->cmd_type = PI_CMD_K_SMT_MIB_GET;
2027         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2028                 return((struct net_device_stats *) &bp->stats);
2029
2030         /* Fill the bp->stats structure with the SMT MIB object values */
2031
2032         memcpy(bp->stats.smt_station_id, &bp->cmd_rsp_virt->smt_mib_get.smt_station_id, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_station_id));
2033         bp->stats.smt_op_version_id                                     = bp->cmd_rsp_virt->smt_mib_get.smt_op_version_id;
2034         bp->stats.smt_hi_version_id                                     = bp->cmd_rsp_virt->smt_mib_get.smt_hi_version_id;
2035         bp->stats.smt_lo_version_id                                     = bp->cmd_rsp_virt->smt_mib_get.smt_lo_version_id;
2036         memcpy(bp->stats.smt_user_data, &bp->cmd_rsp_virt->smt_mib_get.smt_user_data, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_user_data));
2037         bp->stats.smt_mib_version_id                            = bp->cmd_rsp_virt->smt_mib_get.smt_mib_version_id;
2038         bp->stats.smt_mac_cts                                           = bp->cmd_rsp_virt->smt_mib_get.smt_mac_ct;
2039         bp->stats.smt_non_master_cts                            = bp->cmd_rsp_virt->smt_mib_get.smt_non_master_ct;
2040         bp->stats.smt_master_cts                                        = bp->cmd_rsp_virt->smt_mib_get.smt_master_ct;
2041         bp->stats.smt_available_paths                           = bp->cmd_rsp_virt->smt_mib_get.smt_available_paths;
2042         bp->stats.smt_config_capabilities                       = bp->cmd_rsp_virt->smt_mib_get.smt_config_capabilities;
2043         bp->stats.smt_config_policy                                     = bp->cmd_rsp_virt->smt_mib_get.smt_config_policy;
2044         bp->stats.smt_connection_policy                         = bp->cmd_rsp_virt->smt_mib_get.smt_connection_policy;
2045         bp->stats.smt_t_notify                                          = bp->cmd_rsp_virt->smt_mib_get.smt_t_notify;
2046         bp->stats.smt_stat_rpt_policy                           = bp->cmd_rsp_virt->smt_mib_get.smt_stat_rpt_policy;
2047         bp->stats.smt_trace_max_expiration                      = bp->cmd_rsp_virt->smt_mib_get.smt_trace_max_expiration;
2048         bp->stats.smt_bypass_present                            = bp->cmd_rsp_virt->smt_mib_get.smt_bypass_present;
2049         bp->stats.smt_ecm_state                                         = bp->cmd_rsp_virt->smt_mib_get.smt_ecm_state;
2050         bp->stats.smt_cf_state                                          = bp->cmd_rsp_virt->smt_mib_get.smt_cf_state;
2051         bp->stats.smt_remote_disconnect_flag            = bp->cmd_rsp_virt->smt_mib_get.smt_remote_disconnect_flag;
2052         bp->stats.smt_station_status                            = bp->cmd_rsp_virt->smt_mib_get.smt_station_status;
2053         bp->stats.smt_peer_wrap_flag                            = bp->cmd_rsp_virt->smt_mib_get.smt_peer_wrap_flag;
2054         bp->stats.smt_time_stamp                                        = bp->cmd_rsp_virt->smt_mib_get.smt_msg_time_stamp.ls;
2055         bp->stats.smt_transition_time_stamp                     = bp->cmd_rsp_virt->smt_mib_get.smt_transition_time_stamp.ls;
2056         bp->stats.mac_frame_status_functions            = bp->cmd_rsp_virt->smt_mib_get.mac_frame_status_functions;
2057         bp->stats.mac_t_max_capability                          = bp->cmd_rsp_virt->smt_mib_get.mac_t_max_capability;
2058         bp->stats.mac_tvx_capability                            = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_capability;
2059         bp->stats.mac_available_paths                           = bp->cmd_rsp_virt->smt_mib_get.mac_available_paths;
2060         bp->stats.mac_current_path                                      = bp->cmd_rsp_virt->smt_mib_get.mac_current_path;
2061         memcpy(bp->stats.mac_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_upstream_nbr, FDDI_K_ALEN);
2062         memcpy(bp->stats.mac_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_downstream_nbr, FDDI_K_ALEN);
2063         memcpy(bp->stats.mac_old_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_upstream_nbr, FDDI_K_ALEN);
2064         memcpy(bp->stats.mac_old_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_downstream_nbr, FDDI_K_ALEN);
2065         bp->stats.mac_dup_address_test                          = bp->cmd_rsp_virt->smt_mib_get.mac_dup_address_test;
2066         bp->stats.mac_requested_paths                           = bp->cmd_rsp_virt->smt_mib_get.mac_requested_paths;
2067         bp->stats.mac_downstream_port_type                      = bp->cmd_rsp_virt->smt_mib_get.mac_downstream_port_type;
2068         memcpy(bp->stats.mac_smt_address, &bp->cmd_rsp_virt->smt_mib_get.mac_smt_address, FDDI_K_ALEN);
2069         bp->stats.mac_t_req                                                     = bp->cmd_rsp_virt->smt_mib_get.mac_t_req;
2070         bp->stats.mac_t_neg                                                     = bp->cmd_rsp_virt->smt_mib_get.mac_t_neg;
2071         bp->stats.mac_t_max                                                     = bp->cmd_rsp_virt->smt_mib_get.mac_t_max;
2072         bp->stats.mac_tvx_value                                         = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_value;
2073         bp->stats.mac_frame_error_threshold                     = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_threshold;
2074         bp->stats.mac_frame_error_ratio                         = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_ratio;
2075         bp->stats.mac_rmt_state                                         = bp->cmd_rsp_virt->smt_mib_get.mac_rmt_state;
2076         bp->stats.mac_da_flag                                           = bp->cmd_rsp_virt->smt_mib_get.mac_da_flag;
2077         bp->stats.mac_una_da_flag                                       = bp->cmd_rsp_virt->smt_mib_get.mac_unda_flag;
2078         bp->stats.mac_frame_error_flag                          = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_flag;
2079         bp->stats.mac_ma_unitdata_available                     = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_available;
2080         bp->stats.mac_hardware_present                          = bp->cmd_rsp_virt->smt_mib_get.mac_hardware_present;
2081         bp->stats.mac_ma_unitdata_enable                        = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_enable;
2082         bp->stats.path_tvx_lower_bound                          = bp->cmd_rsp_virt->smt_mib_get.path_tvx_lower_bound;
2083         bp->stats.path_t_max_lower_bound                        = bp->cmd_rsp_virt->smt_mib_get.path_t_max_lower_bound;
2084         bp->stats.path_max_t_req                                        = bp->cmd_rsp_virt->smt_mib_get.path_max_t_req;
2085         memcpy(bp->stats.path_configuration, &bp->cmd_rsp_virt->smt_mib_get.path_configuration, sizeof(bp->cmd_rsp_virt->smt_mib_get.path_configuration));
2086         bp->stats.port_my_type[0]                                       = bp->cmd_rsp_virt->smt_mib_get.port_my_type[0];
2087         bp->stats.port_my_type[1]                                       = bp->cmd_rsp_virt->smt_mib_get.port_my_type[1];
2088         bp->stats.port_neighbor_type[0]                         = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[0];
2089         bp->stats.port_neighbor_type[1]                         = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[1];
2090         bp->stats.port_connection_policies[0]           = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[0];
2091         bp->stats.port_connection_policies[1]           = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[1];
2092         bp->stats.port_mac_indicated[0]                         = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[0];
2093         bp->stats.port_mac_indicated[1]                         = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[1];
2094         bp->stats.port_current_path[0]                          = bp->cmd_rsp_virt->smt_mib_get.port_current_path[0];
2095         bp->stats.port_current_path[1]                          = bp->cmd_rsp_virt->smt_mib_get.port_current_path[1];
2096         memcpy(&bp->stats.port_requested_paths[0*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[0], 3);
2097         memcpy(&bp->stats.port_requested_paths[1*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[1], 3);
2098         bp->stats.port_mac_placement[0]                         = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[0];
2099         bp->stats.port_mac_placement[1]                         = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[1];
2100         bp->stats.port_available_paths[0]                       = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[0];
2101         bp->stats.port_available_paths[1]                       = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[1];
2102         bp->stats.port_pmd_class[0]                                     = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[0];
2103         bp->stats.port_pmd_class[1]                                     = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[1];
2104         bp->stats.port_connection_capabilities[0]       = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[0];
2105         bp->stats.port_connection_capabilities[1]       = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[1];
2106         bp->stats.port_bs_flag[0]                                       = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[0];
2107         bp->stats.port_bs_flag[1]                                       = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[1];
2108         bp->stats.port_ler_estimate[0]                          = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[0];
2109         bp->stats.port_ler_estimate[1]                          = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[1];
2110         bp->stats.port_ler_cutoff[0]                            = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[0];
2111         bp->stats.port_ler_cutoff[1]                            = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[1];
2112         bp->stats.port_ler_alarm[0]                                     = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[0];
2113         bp->stats.port_ler_alarm[1]                                     = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[1];
2114         bp->stats.port_connect_state[0]                         = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[0];
2115         bp->stats.port_connect_state[1]                         = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[1];
2116         bp->stats.port_pcm_state[0]                                     = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[0];
2117         bp->stats.port_pcm_state[1]                                     = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[1];
2118         bp->stats.port_pc_withhold[0]                           = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[0];
2119         bp->stats.port_pc_withhold[1]                           = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[1];
2120         bp->stats.port_ler_flag[0]                                      = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[0];
2121         bp->stats.port_ler_flag[1]                                      = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[1];
2122         bp->stats.port_hardware_present[0]                      = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[0];
2123         bp->stats.port_hardware_present[1]                      = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[1];
2124
2125         /* Get FDDI counters */
2126
2127         bp->cmd_req_virt->cmd_type = PI_CMD_K_CNTRS_GET;
2128         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2129                 return((struct net_device_stats *) &bp->stats);
2130
2131         /* Fill the bp->stats structure with the FDDI counter values */
2132
2133         bp->stats.mac_frame_cts                         = bp->cmd_rsp_virt->cntrs_get.cntrs.frame_cnt.ls;
2134         bp->stats.mac_copied_cts                        = bp->cmd_rsp_virt->cntrs_get.cntrs.copied_cnt.ls;
2135         bp->stats.mac_transmit_cts                      = bp->cmd_rsp_virt->cntrs_get.cntrs.transmit_cnt.ls;
2136         bp->stats.mac_error_cts                         = bp->cmd_rsp_virt->cntrs_get.cntrs.error_cnt.ls;
2137         bp->stats.mac_lost_cts                          = bp->cmd_rsp_virt->cntrs_get.cntrs.lost_cnt.ls;
2138         bp->stats.port_lct_fail_cts[0]          = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[0].ls;
2139         bp->stats.port_lct_fail_cts[1]          = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[1].ls;
2140         bp->stats.port_lem_reject_cts[0]        = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[0].ls;
2141         bp->stats.port_lem_reject_cts[1]        = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[1].ls;
2142         bp->stats.port_lem_cts[0]                       = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[0].ls;
2143         bp->stats.port_lem_cts[1]                       = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[1].ls;
2144
2145         return((struct net_device_stats *) &bp->stats);
2146         }
2147
2148
2149 /*
2150  * ==============================
2151  * = dfx_ctl_set_multicast_list =
2152  * ==============================
2153  *
2154  * Overview:
2155  *   Enable/Disable LLC frame promiscuous mode reception
2156  *   on the adapter and/or update multicast address table.
2157  *
2158  * Returns:
2159  *   None
2160  *
2161  * Arguments:
2162  *   dev - pointer to device information
2163  *
2164  * Functional Description:
2165  *   This routine follows a fairly simple algorithm for setting the
2166  *   adapter filters and CAM:
2167  *
2168  *              if IFF_PROMISC flag is set
2169  *                      enable LLC individual/group promiscuous mode
2170  *              else
2171  *                      disable LLC individual/group promiscuous mode
2172  *                      if number of incoming multicast addresses >
2173  *                                      (CAM max size - number of unicast addresses in CAM)
2174  *                              enable LLC group promiscuous mode
2175  *                              set driver-maintained multicast address count to zero
2176  *                      else
2177  *                              disable LLC group promiscuous mode
2178  *                              set driver-maintained multicast address count to incoming count
2179  *                      update adapter CAM
2180  *              update adapter filters
2181  *
2182  * Return Codes:
2183  *   None
2184  *
2185  * Assumptions:
2186  *   Multicast addresses are presented in canonical (LSB) format.
2187  *
2188  * Side Effects:
2189  *   On-board adapter CAM and filters are updated.
2190  */
2191
2192 static void dfx_ctl_set_multicast_list(struct net_device *dev)
2193 {
2194         DFX_board_t *bp = netdev_priv(dev);
2195         int                                     i;                      /* used as index in for loop */
2196         struct dev_mc_list      *dmi;           /* ptr to multicast addr entry */
2197
2198         /* Enable LLC frame promiscuous mode, if necessary */
2199
2200         if (dev->flags & IFF_PROMISC)
2201                 bp->ind_group_prom = PI_FSTATE_K_PASS;          /* Enable LLC ind/group prom mode */
2202
2203         /* Else, update multicast address table */
2204
2205         else
2206                 {
2207                 bp->ind_group_prom = PI_FSTATE_K_BLOCK;         /* Disable LLC ind/group prom mode */
2208                 /*
2209                  * Check whether incoming multicast address count exceeds table size
2210                  *
2211                  * Note: The adapters utilize an on-board 64 entry CAM for
2212                  *       supporting perfect filtering of multicast packets
2213                  *               and bridge functions when adding unicast addresses.
2214                  *               There is no hash function available.  To support
2215                  *               additional multicast addresses, the all multicast
2216                  *               filter (LLC group promiscuous mode) must be enabled.
2217                  *
2218                  *               The firmware reserves two CAM entries for SMT-related
2219                  *               multicast addresses, which leaves 62 entries available.
2220                  *               The following code ensures that we're not being asked
2221                  *               to add more than 62 addresses to the CAM.  If we are,
2222                  *               the driver will enable the all multicast filter.
2223                  *               Should the number of multicast addresses drop below
2224                  *               the high water mark, the filter will be disabled and
2225                  *               perfect filtering will be used.
2226                  */
2227
2228                 if (dev->mc_count > (PI_CMD_ADDR_FILTER_K_SIZE - bp->uc_count))
2229                         {
2230                         bp->group_prom  = PI_FSTATE_K_PASS;             /* Enable LLC group prom mode */
2231                         bp->mc_count    = 0;                                    /* Don't add mc addrs to CAM */
2232                         }
2233                 else
2234                         {
2235                         bp->group_prom  = PI_FSTATE_K_BLOCK;    /* Disable LLC group prom mode */
2236                         bp->mc_count    = dev->mc_count;                /* Add mc addrs to CAM */
2237                         }
2238
2239                 /* Copy addresses to multicast address table, then update adapter CAM */
2240
2241                 dmi = dev->mc_list;                             /* point to first multicast addr */
2242                 for (i=0; i < bp->mc_count; i++)
2243                         {
2244                         memcpy(&bp->mc_table[i*FDDI_K_ALEN], dmi->dmi_addr, FDDI_K_ALEN);
2245                         dmi = dmi->next;                        /* point to next multicast addr */
2246                         }
2247                 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2248                         {
2249                         DBG_printk("%s: Could not update multicast address table!\n", dev->name);
2250                         }
2251                 else
2252                         {
2253                         DBG_printk("%s: Multicast address table updated!  Added %d addresses.\n", dev->name, bp->mc_count);
2254                         }
2255                 }
2256
2257         /* Update adapter filters */
2258
2259         if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2260                 {
2261                 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2262                 }
2263         else
2264                 {
2265                 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2266                 }
2267         }
2268
2269
2270 /*
2271  * ===========================
2272  * = dfx_ctl_set_mac_address =
2273  * ===========================
2274  *
2275  * Overview:
2276  *   Add node address override (unicast address) to adapter
2277  *   CAM and update dev_addr field in device table.
2278  *
2279  * Returns:
2280  *   None
2281  *
2282  * Arguments:
2283  *   dev  - pointer to device information
2284  *   addr - pointer to sockaddr structure containing unicast address to add
2285  *
2286  * Functional Description:
2287  *   The adapter supports node address overrides by adding one or more
2288  *   unicast addresses to the adapter CAM.  This is similar to adding
2289  *   multicast addresses.  In this routine we'll update the driver and
2290  *   device structures with the new address, then update the adapter CAM
2291  *   to ensure that the adapter will copy and strip frames destined and
2292  *   sourced by that address.
2293  *
2294  * Return Codes:
2295  *   Always returns zero.
2296  *
2297  * Assumptions:
2298  *   The address pointed to by addr->sa_data is a valid unicast
2299  *   address and is presented in canonical (LSB) format.
2300  *
2301  * Side Effects:
2302  *   On-board adapter CAM is updated.  On-board adapter filters
2303  *   may be updated.
2304  */
2305
2306 static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr)
2307         {
2308         struct sockaddr *p_sockaddr = (struct sockaddr *)addr;
2309         DFX_board_t *bp = netdev_priv(dev);
2310
2311         /* Copy unicast address to driver-maintained structs and update count */
2312
2313         memcpy(dev->dev_addr, p_sockaddr->sa_data, FDDI_K_ALEN);        /* update device struct */
2314         memcpy(&bp->uc_table[0], p_sockaddr->sa_data, FDDI_K_ALEN);     /* update driver struct */
2315         bp->uc_count = 1;
2316
2317         /*
2318          * Verify we're not exceeding the CAM size by adding unicast address
2319          *
2320          * Note: It's possible that before entering this routine we've
2321          *       already filled the CAM with 62 multicast addresses.
2322          *               Since we need to place the node address override into
2323          *               the CAM, we have to check to see that we're not
2324          *               exceeding the CAM size.  If we are, we have to enable
2325          *               the LLC group (multicast) promiscuous mode filter as
2326          *               in dfx_ctl_set_multicast_list.
2327          */
2328
2329         if ((bp->uc_count + bp->mc_count) > PI_CMD_ADDR_FILTER_K_SIZE)
2330                 {
2331                 bp->group_prom  = PI_FSTATE_K_PASS;             /* Enable LLC group prom mode */
2332                 bp->mc_count    = 0;                                    /* Don't add mc addrs to CAM */
2333
2334                 /* Update adapter filters */
2335
2336                 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2337                         {
2338                         DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2339                         }
2340                 else
2341                         {
2342                         DBG_printk("%s: Adapter filters updated!\n", dev->name);
2343                         }
2344                 }
2345
2346         /* Update adapter CAM with new unicast address */
2347
2348         if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2349                 {
2350                 DBG_printk("%s: Could not set new MAC address!\n", dev->name);
2351                 }
2352         else
2353                 {
2354                 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev->name);
2355                 }
2356         return(0);                      /* always return zero */
2357         }
2358
2359
2360 /*
2361  * ======================
2362  * = dfx_ctl_update_cam =
2363  * ======================
2364  *
2365  * Overview:
2366  *   Procedure to update adapter CAM (Content Addressable Memory)
2367  *   with desired unicast and multicast address entries.
2368  *
2369  * Returns:
2370  *   Condition code
2371  *
2372  * Arguments:
2373  *   bp - pointer to board information
2374  *
2375  * Functional Description:
2376  *   Updates adapter CAM with current contents of board structure
2377  *   unicast and multicast address tables.  Since there are only 62
2378  *   free entries in CAM, this routine ensures that the command
2379  *   request buffer is not overrun.
2380  *
2381  * Return Codes:
2382  *   DFX_K_SUCCESS - Request succeeded
2383  *   DFX_K_FAILURE - Request failed
2384  *
2385  * Assumptions:
2386  *   All addresses being added (unicast and multicast) are in canonical
2387  *   order.
2388  *
2389  * Side Effects:
2390  *   On-board adapter CAM is updated.
2391  */
2392
2393 static int dfx_ctl_update_cam(DFX_board_t *bp)
2394         {
2395         int                     i;                              /* used as index */
2396         PI_LAN_ADDR     *p_addr;                /* pointer to CAM entry */
2397
2398         /*
2399          * Fill in command request information
2400          *
2401          * Note: Even though both the unicast and multicast address
2402          *       table entries are stored as contiguous 6 byte entries,
2403          *               the firmware address filter set command expects each
2404          *               entry to be two longwords (8 bytes total).  We must be
2405          *               careful to only copy the six bytes of each unicast and
2406          *               multicast table entry into each command entry.  This
2407          *               is also why we must first clear the entire command
2408          *               request buffer.
2409          */
2410
2411         memset(bp->cmd_req_virt, 0, PI_CMD_REQ_K_SIZE_MAX);     /* first clear buffer */
2412         bp->cmd_req_virt->cmd_type = PI_CMD_K_ADDR_FILTER_SET;
2413         p_addr = &bp->cmd_req_virt->addr_filter_set.entry[0];
2414
2415         /* Now add unicast addresses to command request buffer, if any */
2416
2417         for (i=0; i < (int)bp->uc_count; i++)
2418                 {
2419                 if (i < PI_CMD_ADDR_FILTER_K_SIZE)
2420                         {
2421                         memcpy(p_addr, &bp->uc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2422                         p_addr++;                       /* point to next command entry */
2423                         }
2424                 }
2425
2426         /* Now add multicast addresses to command request buffer, if any */
2427
2428         for (i=0; i < (int)bp->mc_count; i++)
2429                 {
2430                 if ((i + bp->uc_count) < PI_CMD_ADDR_FILTER_K_SIZE)
2431                         {
2432                         memcpy(p_addr, &bp->mc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2433                         p_addr++;                       /* point to next command entry */
2434                         }
2435                 }
2436
2437         /* Issue command to update adapter CAM, then return */
2438
2439         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2440                 return(DFX_K_FAILURE);
2441         return(DFX_K_SUCCESS);
2442         }
2443
2444
2445 /*
2446  * ==========================
2447  * = dfx_ctl_update_filters =
2448  * ==========================
2449  *
2450  * Overview:
2451  *   Procedure to update adapter filters with desired
2452  *   filter settings.
2453  *
2454  * Returns:
2455  *   Condition code
2456  *
2457  * Arguments:
2458  *   bp - pointer to board information
2459  *
2460  * Functional Description:
2461  *   Enables or disables filter using current filter settings.
2462  *
2463  * Return Codes:
2464  *   DFX_K_SUCCESS - Request succeeded.
2465  *   DFX_K_FAILURE - Request failed.
2466  *
2467  * Assumptions:
2468  *   We must always pass up packets destined to the broadcast
2469  *   address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2470  *   broadcast filter enabled.
2471  *
2472  * Side Effects:
2473  *   On-board adapter filters are updated.
2474  */
2475
2476 static int dfx_ctl_update_filters(DFX_board_t *bp)
2477         {
2478         int     i = 0;                                  /* used as index */
2479
2480         /* Fill in command request information */
2481
2482         bp->cmd_req_virt->cmd_type = PI_CMD_K_FILTERS_SET;
2483
2484         /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2485
2486         bp->cmd_req_virt->filter_set.item[i].item_code  = PI_ITEM_K_BROADCAST;
2487         bp->cmd_req_virt->filter_set.item[i++].value    = PI_FSTATE_K_PASS;
2488
2489         /* Initialize LLC Individual/Group Promiscuous filter */
2490
2491         bp->cmd_req_virt->filter_set.item[i].item_code  = PI_ITEM_K_IND_GROUP_PROM;
2492         bp->cmd_req_virt->filter_set.item[i++].value    = bp->ind_group_prom;
2493
2494         /* Initialize LLC Group Promiscuous filter */
2495
2496         bp->cmd_req_virt->filter_set.item[i].item_code  = PI_ITEM_K_GROUP_PROM;
2497         bp->cmd_req_virt->filter_set.item[i++].value    = bp->group_prom;
2498
2499         /* Terminate the item code list */
2500
2501         bp->cmd_req_virt->filter_set.item[i].item_code  = PI_ITEM_K_EOL;
2502
2503         /* Issue command to update adapter filters, then return */
2504
2505         if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2506                 return(DFX_K_FAILURE);
2507         return(DFX_K_SUCCESS);
2508         }
2509
2510
2511 /*
2512  * ======================
2513  * = dfx_hw_dma_cmd_req =
2514  * ======================
2515  *
2516  * Overview:
2517  *   Sends PDQ DMA command to adapter firmware
2518  *
2519  * Returns:
2520  *   Condition code
2521  *
2522  * Arguments:
2523  *   bp - pointer to board information
2524  *
2525  * Functional Description:
2526  *   The command request and response buffers are posted to the adapter in the manner
2527  *   described in the PDQ Port Specification:
2528  *
2529  *              1. Command Response Buffer is posted to adapter.
2530  *              2. Command Request Buffer is posted to adapter.
2531  *              3. Command Request consumer index is polled until it indicates that request
2532  *         buffer has been DMA'd to adapter.
2533  *              4. Command Response consumer index is polled until it indicates that response
2534  *         buffer has been DMA'd from adapter.
2535  *
2536  *   This ordering ensures that a response buffer is already available for the firmware
2537  *   to use once it's done processing the request buffer.
2538  *
2539  * Return Codes:
2540  *   DFX_K_SUCCESS        - DMA command succeeded
2541  *       DFX_K_OUTSTATE   - Adapter is NOT in proper state
2542  *   DFX_K_HW_TIMEOUT - DMA command timed out
2543  *
2544  * Assumptions:
2545  *   Command request buffer has already been filled with desired DMA command.
2546  *
2547  * Side Effects:
2548  *   None
2549  */
2550
2551 static int dfx_hw_dma_cmd_req(DFX_board_t *bp)
2552         {
2553         int status;                     /* adapter status */
2554         int timeout_cnt;        /* used in for loops */
2555
2556         /* Make sure the adapter is in a state that we can issue the DMA command in */
2557
2558         status = dfx_hw_adap_state_rd(bp);
2559         if ((status == PI_STATE_K_RESET)                ||
2560                 (status == PI_STATE_K_HALTED)           ||
2561                 (status == PI_STATE_K_DMA_UNAVAIL)      ||
2562                 (status == PI_STATE_K_UPGRADE))
2563                 return(DFX_K_OUTSTATE);
2564
2565         /* Put response buffer on the command response queue */
2566
2567         bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2568                         ((PI_CMD_RSP_K_SIZE_MAX / PI_ALIGN_K_CMD_RSP_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2569         bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_1 = bp->cmd_rsp_phys;
2570
2571         /* Bump (and wrap) the producer index and write out to register */
2572
2573         bp->cmd_rsp_reg.index.prod += 1;
2574         bp->cmd_rsp_reg.index.prod &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2575         dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2576
2577         /* Put request buffer on the command request queue */
2578
2579         bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_0 = (u32) (PI_XMT_DESCR_M_SOP |
2580                         PI_XMT_DESCR_M_EOP | (PI_CMD_REQ_K_SIZE_MAX << PI_XMT_DESCR_V_SEG_LEN));
2581         bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_1 = bp->cmd_req_phys;
2582
2583         /* Bump (and wrap) the producer index and write out to register */
2584
2585         bp->cmd_req_reg.index.prod += 1;
2586         bp->cmd_req_reg.index.prod &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2587         dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2588
2589         /*
2590          * Here we wait for the command request consumer index to be equal
2591          * to the producer, indicating that the adapter has DMAed the request.
2592          */
2593
2594         for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2595                 {
2596                 if (bp->cmd_req_reg.index.prod == (u8)(bp->cons_block_virt->cmd_req))
2597                         break;
2598                 udelay(100);                    /* wait for 100 microseconds */
2599                 }
2600         if (timeout_cnt == 0)
2601                 return(DFX_K_HW_TIMEOUT);
2602
2603         /* Bump (and wrap) the completion index and write out to register */
2604
2605         bp->cmd_req_reg.index.comp += 1;
2606         bp->cmd_req_reg.index.comp &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2607         dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2608
2609         /*
2610          * Here we wait for the command response consumer index to be equal
2611          * to the producer, indicating that the adapter has DMAed the response.
2612          */
2613
2614         for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2615                 {
2616                 if (bp->cmd_rsp_reg.index.prod == (u8)(bp->cons_block_virt->cmd_rsp))
2617                         break;
2618                 udelay(100);                    /* wait for 100 microseconds */
2619                 }
2620         if (timeout_cnt == 0)
2621                 return(DFX_K_HW_TIMEOUT);
2622
2623         /* Bump (and wrap) the completion index and write out to register */
2624
2625         bp->cmd_rsp_reg.index.comp += 1;
2626         bp->cmd_rsp_reg.index.comp &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2627         dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2628         return(DFX_K_SUCCESS);
2629         }
2630
2631
2632 /*
2633  * ========================
2634  * = dfx_hw_port_ctrl_req =
2635  * ========================
2636  *
2637  * Overview:
2638  *   Sends PDQ port control command to adapter firmware
2639  *
2640  * Returns:
2641  *   Host data register value in host_data if ptr is not NULL
2642  *
2643  * Arguments:
2644  *   bp                 - pointer to board information
2645  *       command        - port control command
2646  *       data_a         - port data A register value
2647  *       data_b         - port data B register value
2648  *       host_data      - ptr to host data register value
2649  *
2650  * Functional Description:
2651  *   Send generic port control command to adapter by writing
2652  *   to various PDQ port registers, then polling for completion.
2653  *
2654  * Return Codes:
2655  *   DFX_K_SUCCESS        - port control command succeeded
2656  *   DFX_K_HW_TIMEOUT - port control command timed out
2657  *
2658  * Assumptions:
2659  *   None
2660  *
2661  * Side Effects:
2662  *   None
2663  */
2664
2665 static int dfx_hw_port_ctrl_req(
2666         DFX_board_t     *bp,
2667         PI_UINT32       command,
2668         PI_UINT32       data_a,
2669         PI_UINT32       data_b,
2670         PI_UINT32       *host_data
2671         )
2672
2673         {
2674         PI_UINT32       port_cmd;               /* Port Control command register value */
2675         int                     timeout_cnt;    /* used in for loops */
2676
2677         /* Set Command Error bit in command longword */
2678
2679         port_cmd = (PI_UINT32) (command | PI_PCTRL_M_CMD_ERROR);
2680
2681         /* Issue port command to the adapter */
2682
2683         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, data_a);
2684         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_B, data_b);
2685         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_CTRL, port_cmd);
2686
2687         /* Now wait for command to complete */
2688
2689         if (command == PI_PCTRL_M_BLAST_FLASH)
2690                 timeout_cnt = 600000;   /* set command timeout count to 60 seconds */
2691         else
2692                 timeout_cnt = 20000;    /* set command timeout count to 2 seconds */
2693
2694         for (; timeout_cnt > 0; timeout_cnt--)
2695                 {
2696                 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_CTRL, &port_cmd);
2697                 if (!(port_cmd & PI_PCTRL_M_CMD_ERROR))
2698                         break;
2699                 udelay(100);                    /* wait for 100 microseconds */
2700                 }
2701         if (timeout_cnt == 0)
2702                 return(DFX_K_HW_TIMEOUT);
2703
2704         /*
2705          * If the address of host_data is non-zero, assume caller has supplied a
2706          * non NULL pointer, and return the contents of the HOST_DATA register in
2707          * it.
2708          */
2709
2710         if (host_data != NULL)
2711                 dfx_port_read_long(bp, PI_PDQ_K_REG_HOST_DATA, host_data);
2712         return(DFX_K_SUCCESS);
2713         }
2714
2715
2716 /*
2717  * =====================
2718  * = dfx_hw_adap_reset =
2719  * =====================
2720  *
2721  * Overview:
2722  *   Resets adapter
2723  *
2724  * Returns:
2725  *   None
2726  *
2727  * Arguments:
2728  *   bp   - pointer to board information
2729  *   type - type of reset to perform
2730  *
2731  * Functional Description:
2732  *   Issue soft reset to adapter by writing to PDQ Port Reset
2733  *   register.  Use incoming reset type to tell adapter what
2734  *   kind of reset operation to perform.
2735  *
2736  * Return Codes:
2737  *   None
2738  *
2739  * Assumptions:
2740  *   This routine merely issues a soft reset to the adapter.
2741  *   It is expected that after this routine returns, the caller
2742  *   will appropriately poll the Port Status register for the
2743  *   adapter to enter the proper state.
2744  *
2745  * Side Effects:
2746  *   Internal adapter registers are cleared.
2747  */
2748
2749 static void dfx_hw_adap_reset(
2750         DFX_board_t     *bp,
2751         PI_UINT32       type
2752         )
2753
2754         {
2755         /* Set Reset type and assert reset */
2756
2757         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, type);        /* tell adapter type of reset */
2758         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, PI_RESET_M_ASSERT_RESET);
2759
2760         /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2761
2762         udelay(20);
2763
2764         /* Deassert reset */
2765
2766         dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, 0);
2767         }
2768
2769
2770 /*
2771  * ========================
2772  * = dfx_hw_adap_state_rd =
2773  * ========================
2774  *
2775  * Overview:
2776  *   Returns current adapter state
2777  *
2778  * Returns:
2779  *   Adapter state per PDQ Port Specification
2780  *
2781  * Arguments:
2782  *   bp - pointer to board information
2783  *
2784  * Functional Description:
2785  *   Reads PDQ Port Status register and returns adapter state.
2786  *
2787  * Return Codes:
2788  *   None
2789  *
2790  * Assumptions:
2791  *   None
2792  *
2793  * Side Effects:
2794  *   None
2795  */
2796
2797 static int dfx_hw_adap_state_rd(DFX_board_t *bp)
2798         {
2799         PI_UINT32 port_status;          /* Port Status register value */
2800
2801         dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
2802         return((port_status & PI_PSTATUS_M_STATE) >> PI_PSTATUS_V_STATE);
2803         }
2804
2805
2806 /*
2807  * =====================
2808  * = dfx_hw_dma_uninit =
2809  * =====================
2810  *
2811  * Overview:
2812  *   Brings adapter to DMA_UNAVAILABLE state
2813  *
2814  * Returns:
2815  *   Condition code
2816  *
2817  * Arguments:
2818  *   bp   - pointer to board information
2819  *   type - type of reset to perform
2820  *
2821  * Functional Description:
2822  *   Bring adapter to DMA_UNAVAILABLE state by performing the following:
2823  *              1. Set reset type bit in Port Data A Register then reset adapter.
2824  *              2. Check that adapter is in DMA_UNAVAILABLE state.
2825  *
2826  * Return Codes:
2827  *   DFX_K_SUCCESS        - adapter is in DMA_UNAVAILABLE state
2828  *   DFX_K_HW_TIMEOUT - adapter did not reset properly
2829  *
2830  * Assumptions:
2831  *   None
2832  *
2833  * Side Effects:
2834  *   Internal adapter registers are cleared.
2835  */
2836
2837 static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type)
2838         {
2839         int timeout_cnt;        /* used in for loops */
2840
2841         /* Set reset type bit and reset adapter */
2842
2843         dfx_hw_adap_reset(bp, type);
2844
2845         /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2846
2847         for (timeout_cnt = 100000; timeout_cnt > 0; timeout_cnt--)
2848                 {
2849                 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_DMA_UNAVAIL)
2850                         break;
2851                 udelay(100);                                    /* wait for 100 microseconds */
2852                 }
2853         if (timeout_cnt == 0)
2854                 return(DFX_K_HW_TIMEOUT);
2855         return(DFX_K_SUCCESS);
2856         }
2857
2858 /*
2859  *      Align an sk_buff to a boundary power of 2
2860  *
2861  */
2862
2863 static void my_skb_align(struct sk_buff *skb, int n)
2864 {
2865         unsigned long x = (unsigned long)skb->data;
2866         unsigned long v;
2867
2868         v = ALIGN(x, n);        /* Where we want to be */
2869
2870         skb_reserve(skb, v - x);
2871 }
2872
2873
2874 /*
2875  * ================
2876  * = dfx_rcv_init =
2877  * ================
2878  *
2879  * Overview:
2880  *   Produces buffers to adapter LLC Host receive descriptor block
2881  *
2882  * Returns:
2883  *   None
2884  *
2885  * Arguments:
2886  *   bp - pointer to board information
2887  *   get_buffers - non-zero if buffers to be allocated
2888  *
2889  * Functional Description:
2890  *   This routine can be called during dfx_adap_init() or during an adapter
2891  *       reset.  It initializes the descriptor block and produces all allocated
2892  *   LLC Host queue receive buffers.
2893  *
2894  * Return Codes:
2895  *   Return 0 on success or -ENOMEM if buffer allocation failed (when using
2896  *   dynamic buffer allocation). If the buffer allocation failed, the
2897  *   already allocated buffers will not be released and the caller should do
2898  *   this.
2899  *
2900  * Assumptions:
2901  *   The PDQ has been reset and the adapter and driver maintained Type 2
2902  *   register indices are cleared.
2903  *
2904  * Side Effects:
2905  *   Receive buffers are posted to the adapter LLC queue and the adapter
2906  *   is notified.
2907  */
2908
2909 static int dfx_rcv_init(DFX_board_t *bp, int get_buffers)
2910         {
2911         int     i, j;                                   /* used in for loop */
2912
2913         /*
2914          *  Since each receive buffer is a single fragment of same length, initialize
2915          *  first longword in each receive descriptor for entire LLC Host descriptor
2916          *  block.  Also initialize second longword in each receive descriptor with
2917          *  physical address of receive buffer.  We'll always allocate receive
2918          *  buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2919          *  block and produce new receive buffers by simply updating the receive
2920          *  producer index.
2921          *
2922          *      Assumptions:
2923          *              To support all shipping versions of PDQ, the receive buffer size
2924          *              must be mod 128 in length and the physical address must be 128 byte
2925          *              aligned.  In other words, bits 0-6 of the length and address must
2926          *              be zero for the following descriptor field entries to be correct on
2927          *              all PDQ-based boards.  We guaranteed both requirements during
2928          *              driver initialization when we allocated memory for the receive buffers.
2929          */
2930
2931         if (get_buffers) {
2932 #ifdef DYNAMIC_BUFFERS
2933         for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
2934                 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2935                 {
2936                         struct sk_buff *newskb = __dev_alloc_skb(NEW_SKB_SIZE, GFP_NOIO);
2937                         if (!newskb)
2938                                 return -ENOMEM;
2939                         bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2940                                 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2941                         /*
2942                          * align to 128 bytes for compatibility with
2943                          * the old EISA boards.
2944                          */
2945
2946                         my_skb_align(newskb, 128);
2947                         bp->descr_block_virt->rcv_data[i + j].long_1 =
2948                                 (u32)dma_map_single(bp->bus_dev, newskb->data,
2949                                                     NEW_SKB_SIZE,
2950                                                     DMA_FROM_DEVICE);
2951                         /*
2952                          * p_rcv_buff_va is only used inside the
2953                          * kernel so we put the skb pointer here.
2954                          */
2955                         bp->p_rcv_buff_va[i+j] = (char *) newskb;
2956                 }
2957 #else
2958         for (i=0; i < (int)(bp->rcv_bufs_to_post); i++)
2959                 for (j=0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2960                         {
2961                         bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2962                                 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2963                         bp->descr_block_virt->rcv_data[i+j].long_1 = (u32) (bp->rcv_block_phys + (i * PI_RCV_DATA_K_SIZE_MAX));
2964                         bp->p_rcv_buff_va[i+j] = (char *) (bp->rcv_block_virt + (i * PI_RCV_DATA_K_SIZE_MAX));
2965                         }
2966 #endif
2967         }
2968
2969         /* Update receive producer and Type 2 register */
2970
2971         bp->rcv_xmt_reg.index.rcv_prod = bp->rcv_bufs_to_post;
2972         dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
2973         return 0;
2974         }
2975
2976
2977 /*
2978  * =========================
2979  * = dfx_rcv_queue_process =
2980  * =========================
2981  *
2982  * Overview:
2983  *   Process received LLC frames.
2984  *
2985  * Returns:
2986  *   None
2987  *
2988  * Arguments:
2989  *   bp - pointer to board information
2990  *
2991  * Functional Description:
2992  *   Received LLC frames are processed until there are no more consumed frames.
2993  *   Once all frames are processed, the receive buffers are returned to the
2994  *   adapter.  Note that this algorithm fixes the length of time that can be spent
2995  *   in this routine, because there are a fixed number of receive buffers to
2996  *   process and buffers are not produced until this routine exits and returns
2997  *   to the ISR.
2998  *
2999  * Return Codes:
3000  *   None
3001  *
3002  * Assumptions:
3003  *   None
3004  *
3005  * Side Effects:
3006  *   None
3007  */
3008
3009 static void dfx_rcv_queue_process(
3010         DFX_board_t *bp
3011         )
3012
3013         {
3014         PI_TYPE_2_CONSUMER      *p_type_2_cons;         /* ptr to rcv/xmt consumer block register */
3015         char                            *p_buff;                        /* ptr to start of packet receive buffer (FMC descriptor) */
3016         u32                                     descr, pkt_len;         /* FMC descriptor field and packet length */
3017         struct sk_buff          *skb;                           /* pointer to a sk_buff to hold incoming packet data */
3018
3019         /* Service all consumed LLC receive frames */
3020
3021         p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3022         while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons)
3023                 {
3024                 /* Process any errors */
3025
3026                 int entry;
3027
3028                 entry = bp->rcv_xmt_reg.index.rcv_comp;
3029 #ifdef DYNAMIC_BUFFERS
3030                 p_buff = (char *) (((struct sk_buff *)bp->p_rcv_buff_va[entry])->data);
3031 #else
3032                 p_buff = (char *) bp->p_rcv_buff_va[entry];
3033 #endif
3034                 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32));
3035
3036                 if (descr & PI_FMC_DESCR_M_RCC_FLUSH)
3037                         {
3038                         if (descr & PI_FMC_DESCR_M_RCC_CRC)
3039                                 bp->rcv_crc_errors++;
3040                         else
3041                                 bp->rcv_frame_status_errors++;
3042                         }
3043                 else
3044                 {
3045                         int rx_in_place = 0;
3046
3047                         /* The frame was received without errors - verify packet length */
3048
3049                         pkt_len = (u32)((descr & PI_FMC_DESCR_M_LEN) >> PI_FMC_DESCR_V_LEN);
3050                         pkt_len -= 4;                           /* subtract 4 byte CRC */
3051                         if (!IN_RANGE(pkt_len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3052                                 bp->rcv_length_errors++;
3053                         else{
3054 #ifdef DYNAMIC_BUFFERS
3055                                 if (pkt_len > SKBUFF_RX_COPYBREAK) {
3056                                         struct sk_buff *newskb;
3057
3058                                         newskb = dev_alloc_skb(NEW_SKB_SIZE);
3059                                         if (newskb){
3060                                                 rx_in_place = 1;
3061
3062                                                 my_skb_align(newskb, 128);
3063                                                 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
3064                                                 dma_unmap_single(bp->bus_dev,
3065                                                         bp->descr_block_virt->rcv_data[entry].long_1,
3066                                                         NEW_SKB_SIZE,
3067                                                         DMA_FROM_DEVICE);
3068                                                 skb_reserve(skb, RCV_BUFF_K_PADDING);
3069                                                 bp->p_rcv_buff_va[entry] = (char *)newskb;
3070                                                 bp->descr_block_virt->rcv_data[entry].long_1 =
3071                                                         (u32)dma_map_single(bp->bus_dev,
3072                                                                 newskb->data,
3073                                                                 NEW_SKB_SIZE,
3074                                                                 DMA_FROM_DEVICE);
3075                                         } else
3076                                                 skb = NULL;
3077                                 } else
3078 #endif
3079                                         skb = dev_alloc_skb(pkt_len+3); /* alloc new buffer to pass up, add room for PRH */
3080                                 if (skb == NULL)
3081                                         {
3082                                         printk("%s: Could not allocate receive buffer.  Dropping packet.\n", bp->dev->name);
3083                                         bp->rcv_discards++;
3084                                         break;
3085                                         }
3086                                 else {
3087 #ifndef DYNAMIC_BUFFERS
3088                                         if (! rx_in_place)
3089 #endif
3090                                         {
3091                                                 /* Receive buffer allocated, pass receive packet up */
3092
3093                                                 skb_copy_to_linear_data(skb,
3094                                                                p_buff + RCV_BUFF_K_PADDING,
3095                                                                pkt_len + 3);
3096                                         }
3097
3098                                         skb_reserve(skb,3);             /* adjust data field so that it points to FC byte */
3099                                         skb_put(skb, pkt_len);          /* pass up packet length, NOT including CRC */
3100                                         skb->protocol = fddi_type_trans(skb, bp->dev);
3101                                         bp->rcv_total_bytes += skb->len;
3102                                         netif_rx(skb);
3103
3104                                         /* Update the rcv counters */
3105                                         bp->dev->last_rx = jiffies;
3106                                         bp->rcv_total_frames++;
3107                                         if (*(p_buff + RCV_BUFF_K_DA) & 0x01)
3108                                                 bp->rcv_multicast_frames++;
3109                                 }
3110                         }
3111                         }
3112
3113                 /*
3114                  * Advance the producer (for recycling) and advance the completion
3115                  * (for servicing received frames).  Note that it is okay to
3116                  * advance the producer without checking that it passes the
3117                  * completion index because they are both advanced at the same
3118                  * rate.
3119                  */
3120
3121                 bp->rcv_xmt_reg.index.rcv_prod += 1;
3122                 bp->rcv_xmt_reg.index.rcv_comp += 1;
3123                 }
3124         }
3125
3126
3127 /*
3128  * =====================
3129  * = dfx_xmt_queue_pkt =
3130  * =====================
3131  *
3132  * Overview:
3133  *   Queues packets for transmission
3134  *
3135  * Returns:
3136  *   Condition code
3137  *
3138  * Arguments:
3139  *   skb - pointer to sk_buff to queue for transmission
3140  *   dev - pointer to device information
3141  *
3142  * Functional Description:
3143  *   Here we assume that an incoming skb transmit request
3144  *   is contained in a single physically contiguous buffer
3145  *   in which the virtual address of the start of packet
3146  *   (skb->data) can be converted to a physical address
3147  *   by using pci_map_single().
3148  *
3149  *   Since the adapter architecture requires a three byte
3150  *   packet request header to prepend the start of packet,
3151  *   we'll write the three byte field immediately prior to
3152  *   the FC byte.  This assumption is valid because we've
3153  *   ensured that dev->hard_header_len includes three pad
3154  *   bytes.  By posting a single fragment to the adapter,
3155  *   we'll reduce the number of descriptor fetches and
3156  *   bus traffic needed to send the request.
3157  *
3158  *   Also, we can't free the skb until after it's been DMA'd
3159  *   out by the adapter, so we'll queue it in the driver and
3160  *   return it in dfx_xmt_done.
3161  *
3162  * Return Codes:
3163  *   0 - driver queued packet, link is unavailable, or skbuff was bad
3164  *       1 - caller should requeue the sk_buff for later transmission
3165  *
3166  * Assumptions:
3167  *       First and foremost, we assume the incoming skb pointer
3168  *   is NOT NULL and is pointing to a valid sk_buff structure.
3169  *
3170  *   The outgoing packet is complete, starting with the
3171  *   frame control byte including the last byte of data,
3172  *   but NOT including the 4 byte CRC.  We'll let the
3173  *   adapter hardware generate and append the CRC.
3174  *
3175  *   The entire packet is stored in one physically
3176  *   contiguous buffer which is not cached and whose
3177  *   32-bit physical address can be determined.
3178  *
3179  *   It's vital that this routine is NOT reentered for the
3180  *   same board and that the OS is not in another section of
3181  *   code (eg. dfx_int_common) for the same board on a
3182  *   different thread.
3183  *
3184  * Side Effects:
3185  *   None
3186  */
3187
3188 static int dfx_xmt_queue_pkt(
3189         struct sk_buff  *skb,
3190         struct net_device       *dev
3191         )
3192
3193         {
3194         DFX_board_t             *bp = netdev_priv(dev);
3195         u8                      prod;                           /* local transmit producer index */
3196         PI_XMT_DESCR            *p_xmt_descr;           /* ptr to transmit descriptor block entry */
3197         XMT_DRIVER_DESCR        *p_xmt_drv_descr;       /* ptr to transmit driver descriptor */
3198         unsigned long           flags;
3199
3200         netif_stop_queue(dev);
3201
3202         /*
3203          * Verify that incoming transmit request is OK
3204          *
3205          * Note: The packet size check is consistent with other
3206          *               Linux device drivers, although the correct packet
3207          *               size should be verified before calling the
3208          *               transmit routine.
3209          */
3210
3211         if (!IN_RANGE(skb->len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3212         {
3213                 printk("%s: Invalid packet length - %u bytes\n",
3214                         dev->name, skb->len);
3215                 bp->xmt_length_errors++;                /* bump error counter */
3216                 netif_wake_queue(dev);
3217                 dev_kfree_skb(skb);
3218                 return(0);                              /* return "success" */
3219         }
3220         /*
3221          * See if adapter link is available, if not, free buffer
3222          *
3223          * Note: If the link isn't available, free buffer and return 0
3224          *               rather than tell the upper layer to requeue the packet.
3225          *               The methodology here is that by the time the link
3226          *               becomes available, the packet to be sent will be
3227          *               fairly stale.  By simply dropping the packet, the
3228          *               higher layer protocols will eventually time out
3229          *               waiting for response packets which it won't receive.
3230          */
3231
3232         if (bp->link_available == PI_K_FALSE)
3233                 {
3234                 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_LINK_AVAIL)  /* is link really available? */
3235                         bp->link_available = PI_K_TRUE;         /* if so, set flag and continue */
3236                 else
3237                         {
3238                         bp->xmt_discards++;                                     /* bump error counter */
3239                         dev_kfree_skb(skb);             /* free sk_buff now */
3240                         netif_wake_queue(dev);
3241                         return(0);                                                      /* return "success" */
3242                         }
3243                 }
3244
3245         spin_lock_irqsave(&bp->lock, flags);
3246
3247         /* Get the current producer and the next free xmt data descriptor */
3248
3249         prod            = bp->rcv_xmt_reg.index.xmt_prod;
3250         p_xmt_descr = &(bp->descr_block_virt->xmt_data[prod]);
3251
3252         /*
3253          * Get pointer to auxiliary queue entry to contain information
3254          * for this packet.
3255          *
3256          * Note: The current xmt producer index will become the
3257          *       current xmt completion index when we complete this
3258          *       packet later on.  So, we'll get the pointer to the
3259          *       next auxiliary queue entry now before we bump the
3260          *       producer index.
3261          */
3262
3263         p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[prod++]);     /* also bump producer index */
3264
3265         /* Write the three PRH bytes immediately before the FC byte */
3266
3267         skb_push(skb,3);
3268         skb->data[0] = DFX_PRH0_BYTE;   /* these byte values are defined */
3269         skb->data[1] = DFX_PRH1_BYTE;   /* in the Motorola FDDI MAC chip */
3270         skb->data[2] = DFX_PRH2_BYTE;   /* specification */
3271
3272         /*
3273          * Write the descriptor with buffer info and bump producer
3274          *
3275          * Note: Since we need to start DMA from the packet request
3276          *               header, we'll add 3 bytes to the DMA buffer length,
3277          *               and we'll determine the physical address of the
3278          *               buffer from the PRH, not skb->data.
3279          *
3280          * Assumptions:
3281          *               1. Packet starts with the frame control (FC) byte
3282          *                  at skb->data.
3283          *               2. The 4-byte CRC is not appended to the buffer or
3284          *                      included in the length.
3285          *               3. Packet length (skb->len) is from FC to end of
3286          *                      data, inclusive.
3287          *               4. The packet length does not exceed the maximum
3288          *                      FDDI LLC frame length of 4491 bytes.
3289          *               5. The entire packet is contained in a physically
3290          *                      contiguous, non-cached, locked memory space
3291          *                      comprised of a single buffer pointed to by
3292          *                      skb->data.
3293          *               6. The physical address of the start of packet
3294          *                      can be determined from the virtual address
3295          *                      by using pci_map_single() and is only 32-bits
3296          *                      wide.
3297          */
3298
3299         p_xmt_descr->long_0     = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
3300         p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data,
3301                                                   skb->len, DMA_TO_DEVICE);
3302
3303         /*
3304          * Verify that descriptor is actually available
3305          *
3306          * Note: If descriptor isn't available, return 1 which tells
3307          *       the upper layer to requeue the packet for later
3308          *       transmission.
3309          *
3310          *       We need to ensure that the producer never reaches the
3311          *       completion, except to indicate that the queue is empty.
3312          */
3313
3314         if (prod == bp->rcv_xmt_reg.index.xmt_comp)
3315         {
3316                 skb_pull(skb,3);
3317                 spin_unlock_irqrestore(&bp->lock, flags);
3318                 return(1);                      /* requeue packet for later */
3319         }
3320
3321         /*
3322          * Save info for this packet for xmt done indication routine
3323          *
3324          * Normally, we'd save the producer index in the p_xmt_drv_descr
3325          * structure so that we'd have it handy when we complete this
3326          * packet later (in dfx_xmt_done).  However, since the current
3327          * transmit architecture guarantees a single fragment for the
3328          * entire packet, we can simply bump the completion index by
3329          * one (1) for each completed packet.
3330          *
3331          * Note: If this assumption changes and we're presented with
3332          *       an inconsistent number of transmit fragments for packet
3333          *       data, we'll need to modify this code to save the current
3334          *       transmit producer index.
3335          */
3336
3337         p_xmt_drv_descr->p_skb = skb;
3338
3339         /* Update Type 2 register */
3340
3341         bp->rcv_xmt_reg.index.xmt_prod = prod;
3342         dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
3343         spin_unlock_irqrestore(&bp->lock, flags);
3344         netif_wake_queue(dev);
3345         return(0);                                                      /* packet queued to adapter */
3346         }
3347
3348
3349 /*
3350  * ================
3351  * = dfx_xmt_done =
3352  * ================
3353  *
3354  * Overview:
3355  *   Processes all frames that have been transmitted.
3356  *
3357  * Returns:
3358  *   None
3359  *
3360  * Arguments:
3361  *   bp - pointer to board information
3362  *
3363  * Functional Description:
3364  *   For all consumed transmit descriptors that have not
3365  *   yet been completed, we'll free the skb we were holding
3366  *   onto using dev_kfree_skb and bump the appropriate
3367  *   counters.
3368  *
3369  * Return Codes:
3370  *   None
3371  *
3372  * Assumptions:
3373  *   The Type 2 register is not updated in this routine.  It is
3374  *   assumed that it will be updated in the ISR when dfx_xmt_done
3375  *   returns.
3376  *
3377  * Side Effects:
3378  *   None
3379  */
3380
3381 static int dfx_xmt_done(DFX_board_t *bp)
3382         {
3383         XMT_DRIVER_DESCR        *p_xmt_drv_descr;       /* ptr to transmit driver descriptor */
3384         PI_TYPE_2_CONSUMER      *p_type_2_cons;         /* ptr to rcv/xmt consumer block register */
3385         u8                      comp;                   /* local transmit completion index */
3386         int                     freed = 0;              /* buffers freed */
3387
3388         /* Service all consumed transmit frames */
3389
3390         p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3391         while (bp->rcv_xmt_reg.index.xmt_comp != p_type_2_cons->index.xmt_cons)
3392                 {
3393                 /* Get pointer to the transmit driver descriptor block information */
3394
3395                 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3396
3397                 /* Increment transmit counters */
3398
3399                 bp->xmt_total_frames++;
3400                 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
3401
3402                 /* Return skb to operating system */
3403                 comp = bp->rcv_xmt_reg.index.xmt_comp;
3404                 dma_unmap_single(bp->bus_dev,
3405                                  bp->descr_block_virt->xmt_data[comp].long_1,
3406                                  p_xmt_drv_descr->p_skb->len,
3407                                  DMA_TO_DEVICE);
3408                 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
3409
3410                 /*
3411                  * Move to start of next packet by updating completion index
3412                  *
3413                  * Here we assume that a transmit packet request is always
3414                  * serviced by posting one fragment.  We can therefore
3415                  * simplify the completion code by incrementing the
3416                  * completion index by one.  This code will need to be
3417                  * modified if this assumption changes.  See comments
3418                  * in dfx_xmt_queue_pkt for more details.
3419                  */
3420
3421                 bp->rcv_xmt_reg.index.xmt_comp += 1;
3422                 freed++;
3423                 }
3424         return freed;
3425         }
3426
3427
3428 /*
3429  * =================
3430  * = dfx_rcv_flush =
3431  * =================
3432  *
3433  * Overview:
3434  *   Remove all skb's in the receive ring.
3435  *
3436  * Returns:
3437  *   None
3438  *
3439  * Arguments:
3440  *   bp - pointer to board information
3441  *
3442  * Functional Description:
3443  *   Free's all the dynamically allocated skb's that are
3444  *   currently attached to the device receive ring. This
3445  *   function is typically only used when the device is
3446  *   initialized or reinitialized.
3447  *
3448  * Return Codes:
3449  *   None
3450  *
3451  * Side Effects:
3452  *   None
3453  */
3454 #ifdef DYNAMIC_BUFFERS
3455 static void dfx_rcv_flush( DFX_board_t *bp )
3456         {
3457         int i, j;
3458
3459         for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
3460                 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
3461                 {
3462                         struct sk_buff *skb;
3463                         skb = (struct sk_buff *)bp->p_rcv_buff_va[i+j];
3464                         if (skb)
3465                                 dev_kfree_skb(skb);
3466                         bp->p_rcv_buff_va[i+j] = NULL;
3467                 }
3468
3469         }
3470 #else
3471 static inline void dfx_rcv_flush( DFX_board_t *bp )
3472 {
3473 }
3474 #endif /* DYNAMIC_BUFFERS */
3475
3476 /*
3477  * =================
3478  * = dfx_xmt_flush =
3479  * =================
3480  *
3481  * Overview:
3482  *   Processes all frames whether they've been transmitted
3483  *   or not.
3484  *
3485  * Returns:
3486  *   None
3487  *
3488  * Arguments:
3489  *   bp - pointer to board information
3490  *
3491  * Functional Description:
3492  *   For all produced transmit descriptors that have not
3493  *   yet been completed, we'll free the skb we were holding
3494  *   onto using dev_kfree_skb and bump the appropriate
3495  *   counters.  Of course, it's possible that some of
3496  *   these transmit requests actually did go out, but we
3497  *   won't make that distinction here.  Finally, we'll
3498  *   update the consumer index to match the producer.
3499  *
3500  * Return Codes:
3501  *   None
3502  *
3503  * Assumptions:
3504  *   This routine does NOT update the Type 2 register.  It
3505  *   is assumed that this routine is being called during a
3506  *   transmit flush interrupt, or a shutdown or close routine.
3507  *
3508  * Side Effects:
3509  *   None
3510  */
3511
3512 static void dfx_xmt_flush( DFX_board_t *bp )
3513         {
3514         u32                     prod_cons;              /* rcv/xmt consumer block longword */
3515         XMT_DRIVER_DESCR        *p_xmt_drv_descr;       /* ptr to transmit driver descriptor */
3516         u8                      comp;                   /* local transmit completion index */
3517
3518         /* Flush all outstanding transmit frames */
3519
3520         while (bp->rcv_xmt_reg.index.xmt_comp != bp->rcv_xmt_reg.index.xmt_prod)
3521                 {
3522                 /* Get pointer to the transmit driver descriptor block information */
3523
3524                 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3525
3526                 /* Return skb to operating system */
3527                 comp = bp->rcv_xmt_reg.index.xmt_comp;
3528                 dma_unmap_single(bp->bus_dev,
3529                                  bp->descr_block_virt->xmt_data[comp].long_1,
3530                                  p_xmt_drv_descr->p_skb->len,
3531                                  DMA_TO_DEVICE);
3532                 dev_kfree_skb(p_xmt_drv_descr->p_skb);
3533
3534                 /* Increment transmit error counter */
3535
3536                 bp->xmt_discards++;
3537
3538                 /*
3539                  * Move to start of next packet by updating completion index
3540                  *
3541                  * Here we assume that a transmit packet request is always
3542                  * serviced by posting one fragment.  We can therefore
3543                  * simplify the completion code by incrementing the
3544                  * completion index by one.  This code will need to be
3545                  * modified if this assumption changes.  See comments
3546                  * in dfx_xmt_queue_pkt for more details.
3547                  */
3548
3549                 bp->rcv_xmt_reg.index.xmt_comp += 1;
3550                 }
3551
3552         /* Update the transmit consumer index in the consumer block */
3553
3554         prod_cons = (u32)(bp->cons_block_virt->xmt_rcv_data & ~PI_CONS_M_XMT_INDEX);
3555         prod_cons |= (u32)(bp->rcv_xmt_reg.index.xmt_prod << PI_CONS_V_XMT_INDEX);
3556         bp->cons_block_virt->xmt_rcv_data = prod_cons;
3557         }
3558
3559 /*
3560  * ==================
3561  * = dfx_unregister =
3562  * ==================
3563  *
3564  * Overview:
3565  *   Shuts down an FDDI controller
3566  *
3567  * Returns:
3568  *   Condition code
3569  *
3570  * Arguments:
3571  *   bdev - pointer to device information
3572  *
3573  * Functional Description:
3574  *
3575  * Return Codes:
3576  *   None
3577  *
3578  * Assumptions:
3579  *   It compiles so it should work :-( (PCI cards do :-)
3580  *
3581  * Side Effects:
3582  *   Device structures for FDDI adapters (fddi0, fddi1, etc) are
3583  *   freed.
3584  */
3585 static void __devexit dfx_unregister(struct device *bdev)
3586 {
3587         struct net_device *dev = dev_get_drvdata(bdev);
3588         DFX_board_t *bp = netdev_priv(dev);
3589         int dfx_bus_pci = DFX_BUS_PCI(bdev);
3590         int dfx_bus_tc = DFX_BUS_TC(bdev);
3591         int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3592         resource_size_t bar_start = 0;          /* pointer to port */
3593         resource_size_t bar_len = 0;            /* resource length */
3594         int             alloc_size;             /* total buffer size used */
3595
3596         unregister_netdev(dev);
3597
3598         alloc_size = sizeof(PI_DESCR_BLOCK) +
3599                      PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
3600 #ifndef DYNAMIC_BUFFERS
3601                      (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
3602 #endif
3603                      sizeof(PI_CONSUMER_BLOCK) +
3604                      (PI_ALIGN_K_DESC_BLK - 1);
3605         if (bp->kmalloced)
3606                 dma_free_coherent(bdev, alloc_size,
3607                                   bp->kmalloced, bp->kmalloced_dma);
3608
3609         dfx_bus_uninit(dev);
3610
3611         dfx_get_bars(bdev, &bar_start, &bar_len);
3612         if (dfx_use_mmio) {
3613                 iounmap(bp->base.mem);
3614                 release_mem_region(bar_start, bar_len);
3615         } else
3616                 release_region(bar_start, bar_len);
3617
3618         if (dfx_bus_pci)
3619                 pci_disable_device(to_pci_dev(bdev));
3620
3621         free_netdev(dev);
3622 }
3623
3624
3625 static int __devinit __maybe_unused dfx_dev_register(struct device *);
3626 static int __devexit __maybe_unused dfx_dev_unregister(struct device *);
3627
3628 #ifdef CONFIG_PCI
3629 static int __devinit dfx_pci_register(struct pci_dev *,
3630                                       const struct pci_device_id *);
3631 static void __devexit dfx_pci_unregister(struct pci_dev *);
3632
3633 static struct pci_device_id dfx_pci_table[] = {
3634         { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) },
3635         { }
3636 };
3637 MODULE_DEVICE_TABLE(pci, dfx_pci_table);
3638
3639 static struct pci_driver dfx_pci_driver = {
3640         .name           = "defxx",
3641         .id_table       = dfx_pci_table,
3642         .probe          = dfx_pci_register,
3643         .remove         = __devexit_p(dfx_pci_unregister),
3644 };
3645
3646 static __devinit int dfx_pci_register(struct pci_dev *pdev,
3647                                       const struct pci_device_id *ent)
3648 {
3649         return dfx_register(&pdev->dev);
3650 }
3651
3652 static void __devexit dfx_pci_unregister(struct pci_dev *pdev)
3653 {
3654         dfx_unregister(&pdev->dev);
3655 }
3656 #endif /* CONFIG_PCI */
3657
3658 #ifdef CONFIG_EISA
3659 static struct eisa_device_id dfx_eisa_table[] = {
3660         { "DEC3001", DEFEA_PROD_ID_1 },
3661         { "DEC3002", DEFEA_PROD_ID_2 },
3662         { "DEC3003", DEFEA_PROD_ID_3 },
3663         { "DEC3004", DEFEA_PROD_ID_4 },
3664         { }
3665 };
3666 MODULE_DEVICE_TABLE(eisa, dfx_eisa_table);
3667
3668 static struct eisa_driver dfx_eisa_driver = {
3669         .id_table       = dfx_eisa_table,
3670         .driver         = {
3671                 .name   = "defxx",
3672                 .bus    = &eisa_bus_type,
3673                 .probe  = dfx_dev_register,
3674                 .remove = __devexit_p(dfx_dev_unregister),
3675         },
3676 };
3677 #endif /* CONFIG_EISA */
3678
3679 #ifdef CONFIG_TC
3680 static struct tc_device_id const dfx_tc_table[] = {
3681         { "DEC     ", "PMAF-FA " },
3682         { "DEC     ", "PMAF-FD " },
3683         { "DEC     ", "PMAF-FS " },
3684         { "DEC     ", "PMAF-FU " },
3685         { }
3686 };
3687 MODULE_DEVICE_TABLE(tc, dfx_tc_table);
3688
3689 static struct tc_driver dfx_tc_driver = {
3690         .id_table       = dfx_tc_table,
3691         .driver         = {
3692                 .name   = "defxx",
3693                 .bus    = &tc_bus_type,
3694                 .probe  = dfx_dev_register,
3695                 .remove = __devexit_p(dfx_dev_unregister),
3696         },
3697 };
3698 #endif /* CONFIG_TC */
3699
3700 static int __devinit __maybe_unused dfx_dev_register(struct device *dev)
3701 {
3702         int status;
3703
3704         status = dfx_register(dev);
3705         if (!status)
3706                 get_device(dev);
3707         return status;
3708 }
3709
3710 static int __devexit __maybe_unused dfx_dev_unregister(struct device *dev)
3711 {
3712         put_device(dev);
3713         dfx_unregister(dev);
3714         return 0;
3715 }
3716
3717
3718 static int __devinit dfx_init(void)
3719 {
3720         int status;
3721
3722         status = pci_register_driver(&dfx_pci_driver);
3723         if (!status)
3724                 status = eisa_driver_register(&dfx_eisa_driver);
3725         if (!status)
3726                 status = tc_register_driver(&dfx_tc_driver);
3727         return status;
3728 }
3729
3730 static void __devexit dfx_cleanup(void)
3731 {
3732         tc_unregister_driver(&dfx_tc_driver);
3733         eisa_driver_unregister(&dfx_eisa_driver);
3734         pci_unregister_driver(&dfx_pci_driver);
3735 }
3736
3737 module_init(dfx_init);
3738 module_exit(dfx_cleanup);
3739 MODULE_AUTHOR("Lawrence V. Stefani");
3740 MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
3741                    DRV_VERSION " " DRV_RELDATE);
3742 MODULE_LICENSE("GPL");
3743
3744
3745 /*
3746  * Local variables:
3747  * kernel-compile-command: "gcc -D__KERNEL__ -I/root/linux/include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -c defxx.c"
3748  * End:
3749  */