net drivers: fix platform driver hotplug/coldplug
[linux-2.6.git] / drivers / net / bfin_mac.c
1 /*
2  * Blackfin On-Chip MAC Driver
3  *
4  * Copyright 2004-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/ethtool.h>
26 #include <linux/mii.h>
27 #include <linux/phy.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
32
33 #include <asm/dma.h>
34 #include <linux/dma-mapping.h>
35
36 #include <asm/blackfin.h>
37 #include <asm/cacheflush.h>
38 #include <asm/portmux.h>
39
40 #include "bfin_mac.h"
41
42 #define DRV_NAME        "bfin_mac"
43 #define DRV_VERSION     "1.1"
44 #define DRV_AUTHOR      "Bryan Wu, Luke Yang"
45 #define DRV_DESC        "Blackfin BF53[67] BF527 on-chip Ethernet MAC driver"
46
47 MODULE_AUTHOR(DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49 MODULE_DESCRIPTION(DRV_DESC);
50 MODULE_ALIAS("platform:bfin_mac");
51
52 #if defined(CONFIG_BFIN_MAC_USE_L1)
53 # define bfin_mac_alloc(dma_handle, size)  l1_data_sram_zalloc(size)
54 # define bfin_mac_free(dma_handle, ptr)    l1_data_sram_free(ptr)
55 #else
56 # define bfin_mac_alloc(dma_handle, size) \
57         dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
58 # define bfin_mac_free(dma_handle, ptr) \
59         dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
60 #endif
61
62 #define PKT_BUF_SZ 1580
63
64 #define MAX_TIMEOUT_CNT 500
65
66 /* pointers to maintain transmit list */
67 static struct net_dma_desc_tx *tx_list_head;
68 static struct net_dma_desc_tx *tx_list_tail;
69 static struct net_dma_desc_rx *rx_list_head;
70 static struct net_dma_desc_rx *rx_list_tail;
71 static struct net_dma_desc_rx *current_rx_ptr;
72 static struct net_dma_desc_tx *current_tx_ptr;
73 static struct net_dma_desc_tx *tx_desc;
74 static struct net_dma_desc_rx *rx_desc;
75
76 static void bf537mac_disable(void);
77 static void bf537mac_enable(void);
78
79 static void desc_list_free(void)
80 {
81         struct net_dma_desc_rx *r;
82         struct net_dma_desc_tx *t;
83         int i;
84 #if !defined(CONFIG_BFIN_MAC_USE_L1)
85         dma_addr_t dma_handle = 0;
86 #endif
87
88         if (tx_desc) {
89                 t = tx_list_head;
90                 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
91                         if (t) {
92                                 if (t->skb) {
93                                         dev_kfree_skb(t->skb);
94                                         t->skb = NULL;
95                                 }
96                                 t = t->next;
97                         }
98                 }
99                 bfin_mac_free(dma_handle, tx_desc);
100         }
101
102         if (rx_desc) {
103                 r = rx_list_head;
104                 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
105                         if (r) {
106                                 if (r->skb) {
107                                         dev_kfree_skb(r->skb);
108                                         r->skb = NULL;
109                                 }
110                                 r = r->next;
111                         }
112                 }
113                 bfin_mac_free(dma_handle, rx_desc);
114         }
115 }
116
117 static int desc_list_init(void)
118 {
119         int i;
120         struct sk_buff *new_skb;
121 #if !defined(CONFIG_BFIN_MAC_USE_L1)
122         /*
123          * This dma_handle is useless in Blackfin dma_alloc_coherent().
124          * The real dma handler is the return value of dma_alloc_coherent().
125          */
126         dma_addr_t dma_handle;
127 #endif
128
129         tx_desc = bfin_mac_alloc(&dma_handle,
130                                 sizeof(struct net_dma_desc_tx) *
131                                 CONFIG_BFIN_TX_DESC_NUM);
132         if (tx_desc == NULL)
133                 goto init_error;
134
135         rx_desc = bfin_mac_alloc(&dma_handle,
136                                 sizeof(struct net_dma_desc_rx) *
137                                 CONFIG_BFIN_RX_DESC_NUM);
138         if (rx_desc == NULL)
139                 goto init_error;
140
141         /* init tx_list */
142         tx_list_head = tx_list_tail = tx_desc;
143
144         for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
145                 struct net_dma_desc_tx *t = tx_desc + i;
146                 struct dma_descriptor *a = &(t->desc_a);
147                 struct dma_descriptor *b = &(t->desc_b);
148
149                 /*
150                  * disable DMA
151                  * read from memory WNR = 0
152                  * wordsize is 32 bits
153                  * 6 half words is desc size
154                  * large desc flow
155                  */
156                 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
157                 a->start_addr = (unsigned long)t->packet;
158                 a->x_count = 0;
159                 a->next_dma_desc = b;
160
161                 /*
162                  * enabled DMA
163                  * write to memory WNR = 1
164                  * wordsize is 32 bits
165                  * disable interrupt
166                  * 6 half words is desc size
167                  * large desc flow
168                  */
169                 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
170                 b->start_addr = (unsigned long)(&(t->status));
171                 b->x_count = 0;
172
173                 t->skb = NULL;
174                 tx_list_tail->desc_b.next_dma_desc = a;
175                 tx_list_tail->next = t;
176                 tx_list_tail = t;
177         }
178         tx_list_tail->next = tx_list_head;      /* tx_list is a circle */
179         tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
180         current_tx_ptr = tx_list_head;
181
182         /* init rx_list */
183         rx_list_head = rx_list_tail = rx_desc;
184
185         for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
186                 struct net_dma_desc_rx *r = rx_desc + i;
187                 struct dma_descriptor *a = &(r->desc_a);
188                 struct dma_descriptor *b = &(r->desc_b);
189
190                 /* allocate a new skb for next time receive */
191                 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
192                 if (!new_skb) {
193                         printk(KERN_NOTICE DRV_NAME
194                                ": init: low on mem - packet dropped\n");
195                         goto init_error;
196                 }
197                 skb_reserve(new_skb, 2);
198                 r->skb = new_skb;
199
200                 /*
201                  * enabled DMA
202                  * write to memory WNR = 1
203                  * wordsize is 32 bits
204                  * disable interrupt
205                  * 6 half words is desc size
206                  * large desc flow
207                  */
208                 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
209                 /* since RXDWA is enabled */
210                 a->start_addr = (unsigned long)new_skb->data - 2;
211                 a->x_count = 0;
212                 a->next_dma_desc = b;
213
214                 /*
215                  * enabled DMA
216                  * write to memory WNR = 1
217                  * wordsize is 32 bits
218                  * enable interrupt
219                  * 6 half words is desc size
220                  * large desc flow
221                  */
222                 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
223                                 NDSIZE_6 | DMAFLOW_LARGE;
224                 b->start_addr = (unsigned long)(&(r->status));
225                 b->x_count = 0;
226
227                 rx_list_tail->desc_b.next_dma_desc = a;
228                 rx_list_tail->next = r;
229                 rx_list_tail = r;
230         }
231         rx_list_tail->next = rx_list_head;      /* rx_list is a circle */
232         rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
233         current_rx_ptr = rx_list_head;
234
235         return 0;
236
237 init_error:
238         desc_list_free();
239         printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
240         return -ENOMEM;
241 }
242
243
244 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
245
246 /* Set FER regs to MUX in Ethernet pins */
247 static int setup_pin_mux(int action)
248 {
249 #if defined(CONFIG_BFIN_MAC_RMII)
250         u16 pin_req[] = P_RMII0;
251 #else
252         u16 pin_req[] = P_MII0;
253 #endif
254
255         if (action) {
256                 if (peripheral_request_list(pin_req, DRV_NAME)) {
257                         printk(KERN_ERR DRV_NAME
258                         ": Requesting Peripherals failed\n");
259                         return -EFAULT;
260                 }
261         } else
262                 peripheral_free_list(pin_req);
263
264         return 0;
265 }
266
267 /*
268  * MII operations
269  */
270 /* Wait until the previous MDC/MDIO transaction has completed */
271 static void mdio_poll(void)
272 {
273         int timeout_cnt = MAX_TIMEOUT_CNT;
274
275         /* poll the STABUSY bit */
276         while ((bfin_read_EMAC_STAADD()) & STABUSY) {
277                 udelay(1);
278                 if (timeout_cnt-- < 0) {
279                         printk(KERN_ERR DRV_NAME
280                         ": wait MDC/MDIO transaction to complete timeout\n");
281                         break;
282                 }
283         }
284 }
285
286 /* Read an off-chip register in a PHY through the MDC/MDIO port */
287 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
288 {
289         mdio_poll();
290
291         /* read mode */
292         bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
293                                 SET_REGAD((u16) regnum) |
294                                 STABUSY);
295
296         mdio_poll();
297
298         return (int) bfin_read_EMAC_STADAT();
299 }
300
301 /* Write an off-chip register in a PHY through the MDC/MDIO port */
302 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
303                          u16 value)
304 {
305         mdio_poll();
306
307         bfin_write_EMAC_STADAT((u32) value);
308
309         /* write mode */
310         bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
311                                 SET_REGAD((u16) regnum) |
312                                 STAOP |
313                                 STABUSY);
314
315         mdio_poll();
316
317         return 0;
318 }
319
320 static int mdiobus_reset(struct mii_bus *bus)
321 {
322         return 0;
323 }
324
325 static void bf537_adjust_link(struct net_device *dev)
326 {
327         struct bf537mac_local *lp = netdev_priv(dev);
328         struct phy_device *phydev = lp->phydev;
329         unsigned long flags;
330         int new_state = 0;
331
332         spin_lock_irqsave(&lp->lock, flags);
333         if (phydev->link) {
334                 /* Now we make sure that we can be in full duplex mode.
335                  * If not, we operate in half-duplex mode. */
336                 if (phydev->duplex != lp->old_duplex) {
337                         u32 opmode = bfin_read_EMAC_OPMODE();
338                         new_state = 1;
339
340                         if (phydev->duplex)
341                                 opmode |= FDMODE;
342                         else
343                                 opmode &= ~(FDMODE);
344
345                         bfin_write_EMAC_OPMODE(opmode);
346                         lp->old_duplex = phydev->duplex;
347                 }
348
349                 if (phydev->speed != lp->old_speed) {
350 #if defined(CONFIG_BFIN_MAC_RMII)
351                         u32 opmode = bfin_read_EMAC_OPMODE();
352                         switch (phydev->speed) {
353                         case 10:
354                                 opmode |= RMII_10;
355                                 break;
356                         case 100:
357                                 opmode &= ~(RMII_10);
358                                 break;
359                         default:
360                                 printk(KERN_WARNING
361                                         "%s: Ack!  Speed (%d) is not 10/100!\n",
362                                         DRV_NAME, phydev->speed);
363                                 break;
364                         }
365                         bfin_write_EMAC_OPMODE(opmode);
366 #endif
367
368                         new_state = 1;
369                         lp->old_speed = phydev->speed;
370                 }
371
372                 if (!lp->old_link) {
373                         new_state = 1;
374                         lp->old_link = 1;
375                         netif_schedule(dev);
376                 }
377         } else if (lp->old_link) {
378                 new_state = 1;
379                 lp->old_link = 0;
380                 lp->old_speed = 0;
381                 lp->old_duplex = -1;
382         }
383
384         if (new_state) {
385                 u32 opmode = bfin_read_EMAC_OPMODE();
386                 phy_print_status(phydev);
387                 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
388         }
389
390         spin_unlock_irqrestore(&lp->lock, flags);
391 }
392
393 /* MDC  = 2.5 MHz */
394 #define MDC_CLK 2500000
395
396 static int mii_probe(struct net_device *dev)
397 {
398         struct bf537mac_local *lp = netdev_priv(dev);
399         struct phy_device *phydev = NULL;
400         unsigned short sysctl;
401         int i;
402         u32 sclk, mdc_div;
403
404         /* Enable PHY output early */
405         if (!(bfin_read_VR_CTL() & PHYCLKOE))
406                 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
407
408         sclk = get_sclk();
409         mdc_div = ((sclk / MDC_CLK) / 2) - 1;
410
411         sysctl = bfin_read_EMAC_SYSCTL();
412         sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
413         bfin_write_EMAC_SYSCTL(sysctl);
414
415         /* search for connect PHY device */
416         for (i = 0; i < PHY_MAX_ADDR; i++) {
417                 struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
418
419                 if (!tmp_phydev)
420                         continue; /* no PHY here... */
421
422                 phydev = tmp_phydev;
423                 break; /* found it */
424         }
425
426         /* now we are supposed to have a proper phydev, to attach to... */
427         if (!phydev) {
428                 printk(KERN_INFO "%s: Don't found any phy device at all\n",
429                         dev->name);
430                 return -ENODEV;
431         }
432
433 #if defined(CONFIG_BFIN_MAC_RMII)
434         phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
435                         PHY_INTERFACE_MODE_RMII);
436 #else
437         phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
438                         PHY_INTERFACE_MODE_MII);
439 #endif
440
441         if (IS_ERR(phydev)) {
442                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
443                 return PTR_ERR(phydev);
444         }
445
446         /* mask with MAC supported features */
447         phydev->supported &= (SUPPORTED_10baseT_Half
448                               | SUPPORTED_10baseT_Full
449                               | SUPPORTED_100baseT_Half
450                               | SUPPORTED_100baseT_Full
451                               | SUPPORTED_Autoneg
452                               | SUPPORTED_Pause | SUPPORTED_Asym_Pause
453                               | SUPPORTED_MII
454                               | SUPPORTED_TP);
455
456         phydev->advertising = phydev->supported;
457
458         lp->old_link = 0;
459         lp->old_speed = 0;
460         lp->old_duplex = -1;
461         lp->phydev = phydev;
462
463         printk(KERN_INFO "%s: attached PHY driver [%s] "
464                "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
465                "@sclk=%dMHz)\n",
466                DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq,
467                MDC_CLK, mdc_div, sclk/1000000);
468
469         return 0;
470 }
471
472 /**************************************************************************/
473 void setup_system_regs(struct net_device *dev)
474 {
475         unsigned short sysctl;
476
477         /*
478          * Odd word alignment for Receive Frame DMA word
479          * Configure checksum support and rcve frame word alignment
480          */
481         sysctl = bfin_read_EMAC_SYSCTL();
482 #if defined(BFIN_MAC_CSUM_OFFLOAD)
483         sysctl |= RXDWA | RXCKS;
484 #else
485         sysctl |= RXDWA;
486 #endif
487         bfin_write_EMAC_SYSCTL(sysctl);
488
489         bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
490
491         /* Initialize the TX DMA channel registers */
492         bfin_write_DMA2_X_COUNT(0);
493         bfin_write_DMA2_X_MODIFY(4);
494         bfin_write_DMA2_Y_COUNT(0);
495         bfin_write_DMA2_Y_MODIFY(0);
496
497         /* Initialize the RX DMA channel registers */
498         bfin_write_DMA1_X_COUNT(0);
499         bfin_write_DMA1_X_MODIFY(4);
500         bfin_write_DMA1_Y_COUNT(0);
501         bfin_write_DMA1_Y_MODIFY(0);
502 }
503
504 static void setup_mac_addr(u8 *mac_addr)
505 {
506         u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
507         u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
508
509         /* this depends on a little-endian machine */
510         bfin_write_EMAC_ADDRLO(addr_low);
511         bfin_write_EMAC_ADDRHI(addr_hi);
512 }
513
514 static int bf537mac_set_mac_address(struct net_device *dev, void *p)
515 {
516         struct sockaddr *addr = p;
517         if (netif_running(dev))
518                 return -EBUSY;
519         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
520         setup_mac_addr(dev->dev_addr);
521         return 0;
522 }
523
524 static void adjust_tx_list(void)
525 {
526         int timeout_cnt = MAX_TIMEOUT_CNT;
527
528         if (tx_list_head->status.status_word != 0
529             && current_tx_ptr != tx_list_head) {
530                 goto adjust_head;       /* released something, just return; */
531         }
532
533         /*
534          * if nothing released, check wait condition
535          * current's next can not be the head,
536          * otherwise the dma will not stop as we want
537          */
538         if (current_tx_ptr->next->next == tx_list_head) {
539                 while (tx_list_head->status.status_word == 0) {
540                         mdelay(1);
541                         if (tx_list_head->status.status_word != 0
542                             || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
543                                 goto adjust_head;
544                         }
545                         if (timeout_cnt-- < 0) {
546                                 printk(KERN_ERR DRV_NAME
547                                 ": wait for adjust tx list head timeout\n");
548                                 break;
549                         }
550                 }
551                 if (tx_list_head->status.status_word != 0) {
552                         goto adjust_head;
553                 }
554         }
555
556         return;
557
558 adjust_head:
559         do {
560                 tx_list_head->desc_a.config &= ~DMAEN;
561                 tx_list_head->status.status_word = 0;
562                 if (tx_list_head->skb) {
563                         dev_kfree_skb(tx_list_head->skb);
564                         tx_list_head->skb = NULL;
565                 } else {
566                         printk(KERN_ERR DRV_NAME
567                                ": no sk_buff in a transmitted frame!\n");
568                 }
569                 tx_list_head = tx_list_head->next;
570         } while (tx_list_head->status.status_word != 0
571                  && current_tx_ptr != tx_list_head);
572         return;
573
574 }
575
576 static int bf537mac_hard_start_xmit(struct sk_buff *skb,
577                                 struct net_device *dev)
578 {
579         unsigned int data;
580
581         current_tx_ptr->skb = skb;
582
583         /*
584          * Is skb->data always 16-bit aligned?
585          * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
586          */
587         if ((((unsigned int)(skb->data)) & 0x02) == 2) {
588                 /* move skb->data to current_tx_ptr payload */
589                 data = (unsigned int)(skb->data) - 2;
590                 *((unsigned short *)data) = (unsigned short)(skb->len);
591                 current_tx_ptr->desc_a.start_addr = (unsigned long)data;
592                 /* this is important! */
593                 blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
594
595         } else {
596                 *((unsigned short *)(current_tx_ptr->packet)) =
597                     (unsigned short)(skb->len);
598                 memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
599                        (skb->len));
600                 current_tx_ptr->desc_a.start_addr =
601                     (unsigned long)current_tx_ptr->packet;
602                 if (current_tx_ptr->status.status_word != 0)
603                         current_tx_ptr->status.status_word = 0;
604                 blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
605                                             packet,
606                                             (unsigned int)(current_tx_ptr->
607                                                            packet + skb->len) +
608                                             2);
609         }
610
611         /* enable this packet's dma */
612         current_tx_ptr->desc_a.config |= DMAEN;
613
614         /* tx dma is running, just return */
615         if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
616                 goto out;
617
618         /* tx dma is not running */
619         bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
620         /* dma enabled, read from memory, size is 6 */
621         bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
622         /* Turn on the EMAC tx */
623         bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
624
625 out:
626         adjust_tx_list();
627         current_tx_ptr = current_tx_ptr->next;
628         dev->trans_start = jiffies;
629         dev->stats.tx_packets++;
630         dev->stats.tx_bytes += (skb->len);
631         return 0;
632 }
633
634 static void bf537mac_rx(struct net_device *dev)
635 {
636         struct sk_buff *skb, *new_skb;
637         unsigned short len;
638
639         /* allocate a new skb for next time receive */
640         skb = current_rx_ptr->skb;
641         new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
642         if (!new_skb) {
643                 printk(KERN_NOTICE DRV_NAME
644                        ": rx: low on mem - packet dropped\n");
645                 dev->stats.rx_dropped++;
646                 goto out;
647         }
648         /* reserve 2 bytes for RXDWA padding */
649         skb_reserve(new_skb, 2);
650         current_rx_ptr->skb = new_skb;
651         current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
652
653         /* Invidate the data cache of skb->data range when it is write back
654          * cache. It will prevent overwritting the new data from DMA
655          */
656         blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
657                                          (unsigned long)new_skb->end);
658
659         len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
660         skb_put(skb, len);
661         blackfin_dcache_invalidate_range((unsigned long)skb->head,
662                                          (unsigned long)skb->tail);
663
664         dev->last_rx = jiffies;
665         skb->dev = dev;
666         skb->protocol = eth_type_trans(skb, dev);
667 #if defined(BFIN_MAC_CSUM_OFFLOAD)
668         skb->csum = current_rx_ptr->status.ip_payload_csum;
669         skb->ip_summed = CHECKSUM_COMPLETE;
670 #endif
671
672         netif_rx(skb);
673         dev->stats.rx_packets++;
674         dev->stats.rx_bytes += len;
675         current_rx_ptr->status.status_word = 0x00000000;
676         current_rx_ptr = current_rx_ptr->next;
677
678 out:
679         return;
680 }
681
682 /* interrupt routine to handle rx and error signal */
683 static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
684 {
685         struct net_device *dev = dev_id;
686         int number = 0;
687
688 get_one_packet:
689         if (current_rx_ptr->status.status_word == 0) {
690                 /* no more new packet received */
691                 if (number == 0) {
692                         if (current_rx_ptr->next->status.status_word != 0) {
693                                 current_rx_ptr = current_rx_ptr->next;
694                                 goto real_rx;
695                         }
696                 }
697                 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
698                                            DMA_DONE | DMA_ERR);
699                 return IRQ_HANDLED;
700         }
701
702 real_rx:
703         bf537mac_rx(dev);
704         number++;
705         goto get_one_packet;
706 }
707
708 #ifdef CONFIG_NET_POLL_CONTROLLER
709 static void bf537mac_poll(struct net_device *dev)
710 {
711         disable_irq(IRQ_MAC_RX);
712         bf537mac_interrupt(IRQ_MAC_RX, dev);
713         enable_irq(IRQ_MAC_RX);
714 }
715 #endif                          /* CONFIG_NET_POLL_CONTROLLER */
716
717 static void bf537mac_disable(void)
718 {
719         unsigned int opmode;
720
721         opmode = bfin_read_EMAC_OPMODE();
722         opmode &= (~RE);
723         opmode &= (~TE);
724         /* Turn off the EMAC */
725         bfin_write_EMAC_OPMODE(opmode);
726 }
727
728 /*
729  * Enable Interrupts, Receive, and Transmit
730  */
731 static void bf537mac_enable(void)
732 {
733         u32 opmode;
734
735         pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
736
737         /* Set RX DMA */
738         bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
739         bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
740
741         /* Wait MII done */
742         mdio_poll();
743
744         /* We enable only RX here */
745         /* ASTP   : Enable Automatic Pad Stripping
746            PR     : Promiscuous Mode for test
747            PSF    : Receive frames with total length less than 64 bytes.
748            FDMODE : Full Duplex Mode
749            LB     : Internal Loopback for test
750            RE     : Receiver Enable */
751         opmode = bfin_read_EMAC_OPMODE();
752         if (opmode & FDMODE)
753                 opmode |= PSF;
754         else
755                 opmode |= DRO | DC | PSF;
756         opmode |= RE;
757
758 #if defined(CONFIG_BFIN_MAC_RMII)
759         opmode |= RMII; /* For Now only 100MBit are supported */
760 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
761         opmode |= TE;
762 #endif
763 #endif
764         /* Turn on the EMAC rx */
765         bfin_write_EMAC_OPMODE(opmode);
766 }
767
768 /* Our watchdog timed out. Called by the networking layer */
769 static void bf537mac_timeout(struct net_device *dev)
770 {
771         pr_debug("%s: %s\n", dev->name, __FUNCTION__);
772
773         bf537mac_disable();
774
775         /* reset tx queue */
776         tx_list_tail = tx_list_head->next;
777
778         bf537mac_enable();
779
780         /* We can accept TX packets again */
781         dev->trans_start = jiffies;
782         netif_wake_queue(dev);
783 }
784
785 static void bf537mac_multicast_hash(struct net_device *dev)
786 {
787         u32 emac_hashhi, emac_hashlo;
788         struct dev_mc_list *dmi = dev->mc_list;
789         char *addrs;
790         int i;
791         u32 crc;
792
793         emac_hashhi = emac_hashlo = 0;
794
795         for (i = 0; i < dev->mc_count; i++) {
796                 addrs = dmi->dmi_addr;
797                 dmi = dmi->next;
798
799                 /* skip non-multicast addresses */
800                 if (!(*addrs & 1))
801                         continue;
802
803                 crc = ether_crc(ETH_ALEN, addrs);
804                 crc >>= 26;
805
806                 if (crc & 0x20)
807                         emac_hashhi |= 1 << (crc & 0x1f);
808                 else
809                         emac_hashlo |= 1 << (crc & 0x1f);
810         }
811
812         bfin_write_EMAC_HASHHI(emac_hashhi);
813         bfin_write_EMAC_HASHLO(emac_hashlo);
814
815         return;
816 }
817
818 /*
819  * This routine will, depending on the values passed to it,
820  * either make it accept multicast packets, go into
821  * promiscuous mode (for TCPDUMP and cousins) or accept
822  * a select set of multicast packets
823  */
824 static void bf537mac_set_multicast_list(struct net_device *dev)
825 {
826         u32 sysctl;
827
828         if (dev->flags & IFF_PROMISC) {
829                 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
830                 sysctl = bfin_read_EMAC_OPMODE();
831                 sysctl |= RAF;
832                 bfin_write_EMAC_OPMODE(sysctl);
833         } else if (dev->flags & IFF_ALLMULTI) {
834                 /* accept all multicast */
835                 sysctl = bfin_read_EMAC_OPMODE();
836                 sysctl |= PAM;
837                 bfin_write_EMAC_OPMODE(sysctl);
838         } else if (dev->mc_count) {
839                 /* set up multicast hash table */
840                 sysctl = bfin_read_EMAC_OPMODE();
841                 sysctl |= HM;
842                 bfin_write_EMAC_OPMODE(sysctl);
843                 bf537mac_multicast_hash(dev);
844         } else {
845                 /* clear promisc or multicast mode */
846                 sysctl = bfin_read_EMAC_OPMODE();
847                 sysctl &= ~(RAF | PAM);
848                 bfin_write_EMAC_OPMODE(sysctl);
849         }
850 }
851
852 /*
853  * this puts the device in an inactive state
854  */
855 static void bf537mac_shutdown(struct net_device *dev)
856 {
857         /* Turn off the EMAC */
858         bfin_write_EMAC_OPMODE(0x00000000);
859         /* Turn off the EMAC RX DMA */
860         bfin_write_DMA1_CONFIG(0x0000);
861         bfin_write_DMA2_CONFIG(0x0000);
862 }
863
864 /*
865  * Open and Initialize the interface
866  *
867  * Set up everything, reset the card, etc..
868  */
869 static int bf537mac_open(struct net_device *dev)
870 {
871         struct bf537mac_local *lp = netdev_priv(dev);
872         int retval;
873         pr_debug("%s: %s\n", dev->name, __FUNCTION__);
874
875         /*
876          * Check that the address is valid.  If its not, refuse
877          * to bring the device up.  The user must specify an
878          * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
879          */
880         if (!is_valid_ether_addr(dev->dev_addr)) {
881                 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
882                 return -EINVAL;
883         }
884
885         /* initial rx and tx list */
886         retval = desc_list_init();
887
888         if (retval)
889                 return retval;
890
891         phy_start(lp->phydev);
892         phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
893         setup_system_regs(dev);
894         bf537mac_disable();
895         bf537mac_enable();
896         pr_debug("hardware init finished\n");
897         netif_start_queue(dev);
898         netif_carrier_on(dev);
899
900         return 0;
901 }
902
903 /*
904  *
905  * this makes the board clean up everything that it can
906  * and not talk to the outside world.   Caused by
907  * an 'ifconfig ethX down'
908  */
909 static int bf537mac_close(struct net_device *dev)
910 {
911         struct bf537mac_local *lp = netdev_priv(dev);
912         pr_debug("%s: %s\n", dev->name, __FUNCTION__);
913
914         netif_stop_queue(dev);
915         netif_carrier_off(dev);
916
917         phy_stop(lp->phydev);
918         phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
919
920         /* clear everything */
921         bf537mac_shutdown(dev);
922
923         /* free the rx/tx buffers */
924         desc_list_free();
925
926         return 0;
927 }
928
929 static int __init bf537mac_probe(struct net_device *dev)
930 {
931         struct bf537mac_local *lp = netdev_priv(dev);
932         int retval;
933         int i;
934
935         /* Grab the MAC address in the MAC */
936         *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
937         *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
938
939         /* probe mac */
940         /*todo: how to proble? which is revision_register */
941         bfin_write_EMAC_ADDRLO(0x12345678);
942         if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
943                 pr_debug("can't detect bf537 mac!\n");
944                 retval = -ENODEV;
945                 goto err_out;
946         }
947
948         /* set the GPIO pins to Ethernet mode */
949         retval = setup_pin_mux(1);
950         if (retval)
951                 return retval;
952
953         /*Is it valid? (Did bootloader initialize it?) */
954         if (!is_valid_ether_addr(dev->dev_addr)) {
955                 /* Grab the MAC from the board somehow - this is done in the
956                    arch/blackfin/mach-bf537/boards/eth_mac.c */
957                 bfin_get_ether_addr(dev->dev_addr);
958         }
959
960         /* If still not valid, get a random one */
961         if (!is_valid_ether_addr(dev->dev_addr)) {
962                 random_ether_addr(dev->dev_addr);
963         }
964
965         setup_mac_addr(dev->dev_addr);
966
967         /* MDIO bus initial */
968         lp->mii_bus.priv = dev;
969         lp->mii_bus.read = mdiobus_read;
970         lp->mii_bus.write = mdiobus_write;
971         lp->mii_bus.reset = mdiobus_reset;
972         lp->mii_bus.name = "bfin_mac_mdio";
973         snprintf(lp->mii_bus.id, MII_BUS_ID_SIZE, "0");
974         lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
975         for (i = 0; i < PHY_MAX_ADDR; ++i)
976                 lp->mii_bus.irq[i] = PHY_POLL;
977
978         mdiobus_register(&lp->mii_bus);
979
980         retval = mii_probe(dev);
981         if (retval)
982                 return retval;
983
984         /* Fill in the fields of the device structure with ethernet values. */
985         ether_setup(dev);
986
987         dev->open = bf537mac_open;
988         dev->stop = bf537mac_close;
989         dev->hard_start_xmit = bf537mac_hard_start_xmit;
990         dev->set_mac_address = bf537mac_set_mac_address;
991         dev->tx_timeout = bf537mac_timeout;
992         dev->set_multicast_list = bf537mac_set_multicast_list;
993 #ifdef CONFIG_NET_POLL_CONTROLLER
994         dev->poll_controller = bf537mac_poll;
995 #endif
996
997         spin_lock_init(&lp->lock);
998
999         /* now, enable interrupts */
1000         /* register irq handler */
1001         if (request_irq
1002             (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
1003              "EMAC_RX", dev)) {
1004                 printk(KERN_WARNING DRV_NAME
1005                        ": Unable to attach BlackFin MAC RX interrupt\n");
1006                 return -EBUSY;
1007         }
1008
1009
1010         retval = register_netdev(dev);
1011         if (retval == 0) {
1012                 /* now, print out the card info, in a short format.. */
1013                 printk(KERN_INFO "%s: Version %s, %s\n",
1014                          DRV_NAME, DRV_VERSION, DRV_DESC);
1015         }
1016
1017 err_out:
1018         return retval;
1019 }
1020
1021 static int bfin_mac_probe(struct platform_device *pdev)
1022 {
1023         struct net_device *ndev;
1024
1025         ndev = alloc_etherdev(sizeof(struct bf537mac_local));
1026         if (!ndev) {
1027                 printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
1028                 return -ENOMEM;
1029         }
1030
1031         SET_NETDEV_DEV(ndev, &pdev->dev);
1032
1033         platform_set_drvdata(pdev, ndev);
1034
1035         if (bf537mac_probe(ndev) != 0) {
1036                 platform_set_drvdata(pdev, NULL);
1037                 free_netdev(ndev);
1038                 printk(KERN_WARNING DRV_NAME ": not found\n");
1039                 return -ENODEV;
1040         }
1041
1042         return 0;
1043 }
1044
1045 static int bfin_mac_remove(struct platform_device *pdev)
1046 {
1047         struct net_device *ndev = platform_get_drvdata(pdev);
1048
1049         platform_set_drvdata(pdev, NULL);
1050
1051         unregister_netdev(ndev);
1052
1053         free_irq(IRQ_MAC_RX, ndev);
1054
1055         free_netdev(ndev);
1056
1057         setup_pin_mux(0);
1058
1059         return 0;
1060 }
1061
1062 #ifdef CONFIG_PM
1063 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1064 {
1065         struct net_device *net_dev = platform_get_drvdata(pdev);
1066
1067         if (netif_running(net_dev))
1068                 bf537mac_close(net_dev);
1069
1070         return 0;
1071 }
1072
1073 static int bfin_mac_resume(struct platform_device *pdev)
1074 {
1075         struct net_device *net_dev = platform_get_drvdata(pdev);
1076
1077         if (netif_running(net_dev))
1078                 bf537mac_open(net_dev);
1079
1080         return 0;
1081 }
1082 #else
1083 #define bfin_mac_suspend NULL
1084 #define bfin_mac_resume NULL
1085 #endif  /* CONFIG_PM */
1086
1087 static struct platform_driver bfin_mac_driver = {
1088         .probe = bfin_mac_probe,
1089         .remove = bfin_mac_remove,
1090         .resume = bfin_mac_resume,
1091         .suspend = bfin_mac_suspend,
1092         .driver = {
1093                 .name = DRV_NAME,
1094                 .owner  = THIS_MODULE,
1095         },
1096 };
1097
1098 static int __init bfin_mac_init(void)
1099 {
1100         return platform_driver_register(&bfin_mac_driver);
1101 }
1102
1103 module_init(bfin_mac_init);
1104
1105 static void __exit bfin_mac_cleanup(void)
1106 {
1107         platform_driver_unregister(&bfin_mac_driver);
1108 }
1109
1110 module_exit(bfin_mac_cleanup);
1111